sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget'/translations/zh_CN/gpu/drm-kms-helpersmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/zh_TW/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/it_IT/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ja_JP/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ko_KR/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/pt_BR/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/sp_SP/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hMode Setting Helper Functionsh]hMode Setting Helper Functions}(hhhhhNhNubah}(h]h ]h"]h$]h&]refidid7uh1hhhhhhA/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers.rsthKubh paragraph)}(hXThe DRM subsystem aims for a strong separation between core code and helper libraries. Core code takes care of general setup and teardown and decoding userspace requests to kernel internal objects. Everything else is handled by a large set of helper libraries, which can be combined freely to pick and choose for each driver what fits, and avoid shared code where special behaviour is needed.h]hXThe DRM subsystem aims for a strong separation between core code and helper libraries. Core code takes care of general setup and teardown and decoding userspace requests to kernel internal objects. Everything else is handled by a large set of helper libraries, which can be combined freely to pick and choose for each driver what fits, and avoid shared code where special behaviour is needed.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXThis distinction between core code and helpers is especially strong in the modesetting code, where there's a shared userspace ABI for all drivers. This is in contrast to the render side, where pretty much everything (with very few exceptions) can be considered optional helper code.h]hXThis distinction between core code and helpers is especially strong in the modesetting code, where there’s a shared userspace ABI for all drivers. This is in contrast to the render side, where pretty much everything (with very few exceptions) can be considered optional helper code.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(h5There are a few areas these helpers can grouped into:h]h5There are a few areas these helpers can grouped into:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh bullet_list)}(hhh](h list_item)}(hXTHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there's also the simple display pipe helpers. h]h)}(hXSHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there's also the simple display pipe helpers.h]hXUHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there’s also the simple display pipe helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhhhhhhNubh)}(hXThere's a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally there's also generic helpers for handling output probing, and for dealing with EDIDs. h]h)}(hXThere's a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally there's also generic helpers for handling output probing, and for dealing with EDIDs.h]hXThere’s a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). 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Reference for Common Vtables}(hj) hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj& hhhhhK'ubh)}(hX`The DRM mode setting helper functions are common code for drivers to use if they wish. Drivers are not forced to use this code in their implementations but it would be useful if the code they do use at least provides a consistent interface and operation to userspace. Therefore it is highly recommended to use the provided helpers as much as possible.h]hX`The DRM mode setting helper functions are common code for drivers to use if they wish. Drivers are not forced to use this code in their implementations but it would be useful if the code they do use at least provides a consistent interface and operation to userspace. Therefore it is highly recommended to use the provided helpers as much as possible.}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:41: ./include/drm/drm_modeset_helper_vtables.hhK$hj& hhubh)}(hBecause there is only one pointer per modeset object to hold a vfunc table for helper libraries they are by necessity shared among the different helpers.h]hBecause there is only one pointer per modeset object to hold a vfunc table for helper libraries they are by necessity shared among the different helpers.}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:41: ./include/drm/drm_modeset_helper_vtables.hhK*hj& hhubh)}(hTTo make this clear all the helper vtables are pulled together in this location here.h]hTTo make this clear all the helper vtables are pulled together in this location here.}(hjU hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:41: ./include/drm/drm_modeset_helper_vtables.hhK.hj& hhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single drm_crtc_helper_funcs (C struct)c.drm_crtc_helper_funcshNtauh1jd hj& hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhNubhdesc)}(hhh](hdesc_signature)}(hdrm_crtc_helper_funcsh]hdesc_signature_line)}(hstruct drm_crtc_helper_funcsh](hdesc_sig_keyword)}(hstructh]hstruct}(hj hhhNhNubah}(h]h ]kah"]h$]h&]uh1j hj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKubhdesc_sig_space)}(h h]h }(hj hhhNhNubah}(h]h ]wah"]h$]h&]uh1j hj hhhj hKubh desc_name)}(hdrm_crtc_helper_funcsh]h desc_sig_name)}(hj h]hdrm_crtc_helper_funcs}(hj hhhNhNubah}(h]h ]nah"]h$]h&]uh1j hj ubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1j hj hhhj hKubeh}(h]h ]h"]h$]h&]j j add_permalinkuh1j sphinx_line_type declaratorhj} hhhj hKubah}(h]js ah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j{ hj hKhjx hhubh desc_content)}(hhh]h)}(hhelper operations for CRTCsh]hhelper operations for CRTCs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK8hj hhubah}(h]h ]h"]h$]h&]uh1j hjx hhhj hKubeh}(h]h ](cstructeh"]h$]h&]domainj objtypej desctypej noindex noindexentrynocontentsentryuh1jv hhhj& hju hNubh container)}(hX@**Definition**:: struct drm_crtc_helper_funcs { void (*dpms)(struct drm_crtc *crtc, int mode); void (*prepare)(struct drm_crtc *crtc); void (*commit)(struct drm_crtc *crtc); enum drm_mode_status (*mode_valid)(struct drm_crtc *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, int x, int y, struct drm_framebuffer *old_fb); void (*mode_set_nofb)(struct drm_crtc *crtc); int (*mode_set_base)(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb); void (*disable)(struct drm_crtc *crtc); int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_crtc *crtc, struct drm_atomic_commit *state); bool (*get_scanout_position)(struct drm_crtc *crtc, bool in_vblank_irq, int *vpos, int *hpos, ktime_t *stime, ktime_t *etime, const struct drm_display_mode *mode); bool (*handle_vblank_timeout)(struct drm_crtc *crtc); }; **Members** ``dpms`` Callback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used. ``prepare`` This callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used. ``commit`` This callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used. ``mode_valid`` This callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``mode_set`` This callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. ``mode_set_nofb`` This callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers. Note that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback. This callback is optional. ``mode_set_base`` This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by the CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. ``disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one. NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. ``atomic_check`` Drivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check(). When using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_begin`` Drivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display. This hook is called before any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_flush`` Drivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates. Simple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates. This hook is called after any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_enable`` This callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers. This function is optional. ``atomic_disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. This function is optional. ``get_scanout_position`` Called by vblank timestamping code. Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback. Parameters: crtc: The CRTC. in_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set. vpos: Target location for current vertical scanout position. hpos: Target location for current horizontal scanout position. stime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp. etime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp. mode: Current display timings. Returns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank." Returns: True on success, false if a reliable scanout position counter could not be read out. ``handle_vblank_timeout`` Handles timeouts of the vblank timer. Called by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout. This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h](h)}(h**Definition**::h](hstrong)}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(h **Members**h]j )}(hj> h]hMembers}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj< ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKQhj ubhdefinition_list)}(hhh](hdefinition_list_item)}(hXn``dpms`` Callback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used. h](hterm)}(h``dpms``h]hliteral)}(hjc h]hdpms}(hjg hhhNhNubah}(h]h ]h"]h$]h&]uh1je hja ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKKhj[ ubh definition)}(hhh](h)}(hCallback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms().h]hCallback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK@hj} ubh)}(huThis callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used.h](hYThis callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the }(hj hhhNhNubj )}(h **disable**h]hdisable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh hook isn’t used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKEhj} ubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hj hhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh and }(hj hhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh should be used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKHhj} ubeh}(h]h ]h"]h$]h&]uh1j{ hj[ ubeh}(h]h ]h"]h$]h&]uh1jY hjz hKKhjV ubjZ )}(hX``prepare`` This callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used. h](j` )}(h ``prepare``h]jf )}(hj h]hprepare}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKZhj ubj| )}(hhh](h)}(hThis callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF.h](hThis callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their }(hj hhhNhNubj )}(h**dpms**h]hdpms}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh hook with DRM_MODE_DPMS_OFF.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKRhj ubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hj/ hhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ ubh should be used.}(hj/ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKWhj ubeh}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hKZhjV ubjZ )}(hX``commit`` This callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used. h](j` )}(h ``commit``h]jf )}(hjb h]hcommit}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj` ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKihj\ ubj| )}(hhh](h)}(hThis callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON.h](hThis callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their }(hj{ hhhNhNubj )}(h**dpms**h]hdpms}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ ubh hook with DRM_MODE_DPMS_ON.}(hj{ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKahjx ubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hj hhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh should be used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKfhjx ubeh}(h]h ]h"]h$]h&]uh1j{ hj\ ubeh}(h]h ]h"]h$]h&]uh1jY hjw hKihjV ubjZ )}(hX?``mode_valid`` This callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum h](j` )}(h``mode_valid``h]jf )}(hj h]h mode_valid}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubj| )}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKphj ubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKxhj ubh)}(hThis function is optional.h]hThis function is optional.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK}hj ubh)}(hNOTE:h]hNOTE:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXrSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hj$ hhhNhNubj )}(h**mode_fixup**h]h mode_fixup}(hj, hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ ubh or }(hj$ hhhNhNubj )}(h**atomic_check**h]h atomic_check}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ ubh.}(hj$ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hRETURNS:h]hRETURNS:}(hjW hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubeh}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hKhjV ubjZ )}(hX4``mode_fixup`` This callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](j` )}(h``mode_fixup``h]jf )}(hj h]h mode_fixup}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubj| )}(hhh](h)}(hXThis callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the }(hj hhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hj h]h drm_encoder}(hj hhhNhNubah}(h]h ](xrefj c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocgpu/drm-kms-helpers refdomainj reftypetype refexplicitrefwarn c:parent_keysphinx.domains.c LookupKey)}data]sb reftarget drm_encoderuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh and }(hj hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_fixup `h]jf )}(hj h]hdrm_bridge_funcs.mode_fixup}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj hKhj ubh~ vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also }(hj hhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jf )}(hj h]hdrm_crtc_state.adjusted_mode}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhj hKhj ubh for more details.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKhj ubh)}(hiThis function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional.h]hiThis function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional.}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hNOTE:h]hNOTE:}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXIThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.h]hXKThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hFThis is in contrast to the legacy CRTC helpers where this was allowed.h]hFThis is in contrast to the legacy CRTC helpers where this was allowed.}(hjO hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXaAtomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only.h](hRAtomic drivers which need to inspect and adjust more state should instead use the }(hj^ hhhNhNubj )}(h**atomic_check**h]h atomic_check}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ ubh= callback, but note that they’re not perfectly equivalent: }(hj^ hhhNhNubj )}(h**mode_valid**h]h mode_valid}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ ubh7 is called from drm_atomic_helper_check_modeset(), but }(hj^ hhhNhNubj )}(h**atomic_check**h]h atomic_check}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ ubho is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only.}(hj^ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXLAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hj hhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jf )}(hj h]hdrm_connector.modes}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubha. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into }(hj hhhNhNubj )}(h**mode_valid**h]h mode_valid}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKhj ubh)}(hRETURNS:h]hRETURNS:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubeh}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hKhjV ubjZ )}(hX``mode_set`` This callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. h](j` )}(h ``mode_set``h]jf )}(hjh]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubj| )}(hhh](h)}(hXThis callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support.h]hXThis callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can’t update other planes it’s incompatible with atomic modeset support.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj-ubh)}(h:This callback is only used by CRTC helpers and deprecated.h]h:This callback is only used by CRTC helpers and deprecated.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj-ubh)}(hRETURNS:h]hRETURNS:}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj-ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj-ubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj,hKhjV ubjZ )}(hXZ``mode_set_nofb`` This callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers. Note that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback. This callback is optional. h](j` )}(h``mode_set_nofb``h]jf )}(hj}h]h mode_set_nofb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjwubj| )}(hhh](h)}(hThis callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers.h]hThis callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hXdNote that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback.h](hXMNote that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new “ACTIVE” property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the }(hjhhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hThis callback is optional.h]hThis callback is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjV ubjZ )}(hX0``mode_set_base`` This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by the CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. h](j` )}(h``mode_set_base``h]jf )}(hjh]h mode_set_base}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubj| )}(hhh](h)}(hXThis callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support.h](hX8This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the }(hjhhhNhNubj )}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh` callback. Since it can’t update other planes it’s incompatible with atomic modeset support.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(h>This callback is only used by the CRTC helpers and deprecated.h]h>This callback is only used by the CRTC helpers and deprecated.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hRETURNS:h]hRETURNS:}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjV ubjZ )}(hXd``disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one. NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. h](j` )}(h ``disable``h]jf )}(hj^h]hdisable}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjXubj| )}(hhh](h)}(hXThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own }(hjwhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jf )}(hjh]h drm_encoder_helper_funcs.disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjwubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjtubh)}(hXThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one.h](hXThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjhhhNhNubj )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh must be the inverse of }(hjhhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh; for atomic drivers. Atomic drivers should consider to use }(hjhhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh instead of this one.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjtubh)}(hNOTE:h]hNOTE:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hjtubh)}(hX[With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers).h](hEWith legacy CRTC helpers there’s a big semantic difference between }(hjhhhNhNubj )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and other hooks (like }(hjhhhNhNubj )}(h **prepare**h]hprepare}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh or }(hjhhhNhNubj )}(h**dpms**h]hdpms}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh) used to shut down a CRTC: }(hjhhhNhNubj )}(h **disable**h]hdisable}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhr is only called when also logically disabling the display pipeline and needs to release any resources acquired in }(hjhhhNhNubj )}(h **mode_set**h]hmode_set}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh: (like shared PLLs, or again release pinned framebuffers).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjtubh)}(hTherefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic.h](h Therefore }(hjfhhhNhNubj )}(h **disable**h]hdisable}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubh must be the inverse of }(hjfhhhNhNubj )}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubh plus }(hjfhhhNhNubj )}(h **commit**h]hcommit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubh] for drivers still using legacy CRTC helpers, which is different from the rules under atomic.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjtubeh}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjshMhjV ubjZ )}(hX``atomic_check`` Drivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check(). When using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](j` )}(h``atomic_check``h]jf )}(hjh]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMKhjubj| )}(hhh](h)}(hXfDrivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check().h]hXfDrivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXWhen using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.h](hJWhen using drm_atomic_helper_check_planes() this hook is called after the }(hjhhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jf )}(hjh]h#drm_plane_helper_funcs.atomic_check}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM)hjubhX  hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hM)hjubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM0hjubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM7hjubh)}(hNOTE:h]hNOTE:}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM:hjubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in.h]hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM<hjubh)}(hXLAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjShhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jf )}(hj]h]hdrm_connector.modes}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM@hjSubha. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into }(hjShhhNhNubj )}(h**mode_valid**h]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubh.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjzhM@hjubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhjubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jf )}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMHhjubh deadlock.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMHhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMKhjV ubjZ )}(hX``atomic_begin`` Drivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display. This hook is called before any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](j` )}(h``atomic_begin``h]jf )}(hjh]h atomic_begin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM`hjubj| )}(hhh](h)}(hDrivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display.h]hDrivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMShjubh)}(hAThis hook is called before any plane commit functions are called.h]hAThis hook is called before any plane commit functions are called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMXhjubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMZhjubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM_hjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM`hjV ubjZ )}(hXS``atomic_flush`` Drivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates. Simple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates. This hook is called after any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](j` )}(h``atomic_flush``h]jf )}(hjQh]h atomic_flush}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhjKubj| )}(hhh](h)}(hDrivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates.h]hDrivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMghjgubh)}(hSimple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates.h]hSimple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMlhjgubh)}(h@This hook is called after any plane commit functions are called.h]h@This hook is called after any plane commit functions are called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMphjgubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMrhjgubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMwhjgubeh}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjfhMxhjV ubjZ )}(hX;``atomic_enable`` This callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers. This function is optional. h](j` )}(h``atomic_enable``h]jf )}(hjh]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh](h)}(hXThis callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder’s own }(hjhhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.enable `h]jf )}(hjh]hdrm_encoder_helper_funcs.enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hX\This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers.h](hhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh for atomic drivers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hThis function is optional.h]hThis function is optional.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjV ubjZ )}(hXr``atomic_disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. This function is optional. h](j` )}(h``atomic_disable``h]jf )}(hjwh]hatomic_disable}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjuubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjqubj| )}(hhh](h)}(hXThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own }(hjhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jf )}(hjh]h drm_encoder_helper_funcs.disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level.h]hThis hook is used only by atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the CRTC level.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjV ubjZ )}(hXD``get_scanout_position`` Called by vblank timestamping code. Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback. Parameters: crtc: The CRTC. in_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set. vpos: Target location for current vertical scanout position. hpos: Target location for current horizontal scanout position. stime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp. etime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp. mode: Current display timings. Returns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank." Returns: True on success, false if a reliable scanout position counter could not be read out. h](j` )}(h``get_scanout_position``h]jf )}(hjh]hget_scanout_position}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh](h)}(h#Called by vblank timestamping code.h]h#Called by vblank timestamping code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX:Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback.h](hX Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the }(hjhhhNhNubj )}(h'**drm_crtc_funcs.get_vblank_timestamp**h]h#drm_crtc_funcs.get_vblank_timestamp}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(h Parameters:h]h Parameters:}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubjU )}(hhh](jZ )}(hcrtc: The CRTC.h](j` )}(hcrtc:h]hcrtc:}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjLubj| )}(hhh]h)}(h The CRTC.h]h The CRTC.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj_ubah}(h]h ]h"]h$]h&]uh1j{ hjLubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhjIubjZ )}(hin_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.h](j` )}(hin_vblank_irq:h]hin_vblank_irq:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj}ubj| )}(hhh]h)}(hTrue when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.h]hTrue when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjIubjZ )}(hhpos: Target location for current horizontal scanout position.h](j` )}(hhpos:h]hhpos:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh]h)}(h8Target location for current horizontal scanout position.h]h8Target location for current horizontal scanout position.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjIubjZ )}(htstime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.h](j` )}(hstime:h]hstime:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh]h)}(hmTarget location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.h]hmTarget location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMhj#ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj"hMhjIubjZ )}(hsetime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.h](j` )}(hetime:h]hetime:}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubj| )}(hhh]h)}(hlTarget location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.h]hlTarget location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhMhjSubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hjRhMhjIubjZ )}(hmode: Current display timings. h](j` )}(hmode:h]hmode:}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjpubj| )}(hhh]h)}(hCurrent display timings.h]hCurrent display timings.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjIubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(hReturns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank."h]hReturns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means “one scanline until start of active scanout / end of vblank.”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hReturns:h]hReturns:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hTTrue on success, false if a reliable scanout position counter could not be read out.h]hTTrue on success, false if a reliable scanout position counter could not be read out.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjV ubjZ )}(hXe``handle_vblank_timeout`` Handles timeouts of the vblank timer. Called by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout. This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h](j` )}(h``handle_vblank_timeout``h]jf )}(hjh]hhandle_vblank_timeout}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh](h)}(h%Handles timeouts of the vblank timer.h]h%Handles timeouts of the vblank timer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hCalled by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout.h]hCalled by CRTC’s the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(h`This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h]h`This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjV ubeh}(h]h ]h"]h$]h&]uh1jT hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubh)}(h**Description**h]j )}(hjEh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj& hhubh)}(hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.h]hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK9hj& hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_crtc_helper_add (C function)c.drm_crtc_helper_addhNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(h[void drm_crtc_helper_add (struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h]j )}(hZvoid drm_crtc_helper_add(struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h](hdesc_sig_keyword_type)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_crtc_helper_addh]j )}(hdrm_crtc_helper_addh]hdrm_crtc_helper_add}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubhdesc_parameterlist)}(hB(struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h](hdesc_parameter)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftype identifier reftargetjmodnameN classnameNj j )}j ]j ASTIdentifier)}jjsbc.drm_crtc_helper_addasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubhdesc_sig_punctuation)}(hjOh]h*}(hjhhhNhNubah}(h]h ]pah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h)const struct drm_crtc_helper_funcs *funcsh](j )}(hconsth]hconst}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(hj h]hstruct}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_crtc_helper_funcsh]hdrm_crtc_helper_funcs}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{modnameN classnameNj j )}j ]jc.drm_crtc_helper_addasbuh1hhj;ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;ubj )}(hfuncsh]hfuncs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{hhhjhMubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjxhhubj )}(hhh]h)}(h!sets the helper vtable for a crtch]h!sets the helper vtable for a crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj& hju hNubj )}(h**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``const struct drm_crtc_helper_funcs *funcs`` helper vtable to set for **crtc**h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj3ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj2hMhjubjZ )}(hO``const struct drm_crtc_helper_funcs *funcs`` helper vtable to set for **crtc**h](j` )}(h-``const struct drm_crtc_helper_funcs *funcs``h]jf )}(hjVh]h)const struct drm_crtc_helper_funcs *funcs}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjPubj| )}(hhh]h)}(h!helper vtable to set for **crtc**h](hhelper vtable to set for }(hjohhhNhNubj )}(h**crtc**h]hcrtc}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjlubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjkhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_encoder_helper_funcs (C struct)c.drm_encoder_helper_funcshNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(hdrm_encoder_helper_funcsh]j )}(hstruct drm_encoder_helper_funcsh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_encoder_helper_funcsh]j )}(hjh]hdrm_encoder_helper_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hhelper operations for encodersh]hhelper operations for encoders}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j structeh"]h$]h&]j j j jj jj j j uh1jv hhhj& hju hNubj )}(hX4**Definition**:: struct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); }; **Members** ``dpms`` Callback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used. ``mode_valid`` This callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``prepare`` This callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used. ``commit`` This callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used. ``mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers. NOTE: If the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead. ``atomic_mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector. ``detect`` This callback can be used by drivers who want to do detection on the encoder object instead of in connector functions. It is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks. FIXME: This should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it. ``atomic_disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers. This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**. ``atomic_enable`` This callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers. This hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**. ``disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers. For atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below! NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. ``enable`` This callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers. ``atomic_check`` This callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector. Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented. This function is used by the atomic helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj, )}(hXstruct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); };h]hXstruct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); };}hj=sbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(h **Members**h]j )}(hjNh]hMembers}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubjU )}(hhh](jZ )}(hXn``dpms`` Callback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used. h](j` )}(h``dpms``h]jf )}(hjmh]hdpms}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjgubj| )}(hhh](h)}(hCallback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms().h]hCallback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hyThis callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used.h](h]This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the }(hjhhhNhNubj )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh hook isn’t used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubjZ )}(hXH``mode_valid`` This callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum h](j` )}(h``mode_valid``h]jf )}(hjh]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM$hjubj| )}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hjubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hThis function is optional.h]hThis function is optional.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hNOTE:h]hNOTE:}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXrSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hjPhhhNhNubj )}(h**mode_fixup**h]h mode_fixup}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubh or }(hjPhhhNhNubj )}(h**atomic_check**h]h atomic_check}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubh.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM"hjubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM$hjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM$hjdubjZ )}(hXz``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](j` )}(h``mode_fixup``h]jf )}(hjh]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMOhjubj| )}(hhh](h)}(hXThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM,hjubh or a }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjhM,hjubh. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also }(hjhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jf )}(hjh]hdrm_crtc_state.adjusted_mode}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjhM,hjubh for more details.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM,hjubh)}(h\This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional.h]h\This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM3hjubh)}(hNOTE:h]hNOTE:}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM6hjubh)}(hXIThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.h]hXKThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM8hjubh)}(hFThis is in contrast to the legacy CRTC helpers where this was allowed.h]hFThis is in contrast to the legacy CRTC helpers where this was allowed.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM>hjubh)}(hAtomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**.h](hRAtomic drivers which need to inspect and adjust more state should instead use the }(hjhhhNhNubj )}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh callback. If }(hjhhhNhNubj )}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh) is used, this hook isn’t called since }(hjhhhNhNubj )}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 allows a strict superset of the functionality of }(hjhhhNhNubj )}(h**mode_fixup**h]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMAhjubh)}(hXOAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jf )}(hjh]hdrm_connector.modes}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhjubhd. To ensure that modes are filtered consistently put any encoder constraints and limits checks into }(hjhhhNhNubj )}(h**mode_valid**h]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMFhjubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMLhjubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMOhjdubjZ )}(hX``prepare`` This callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used. h](j` )}(h ``prepare``h]jf )}(hjJh]hprepare}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM`hjDubj| )}(hhh](h)}(hThis callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF.h](hThis callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their }(hjchhhNhNubj )}(h**dpms**h]hdpms}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubh hook with DRM_MODE_DPMS_OFF.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMXhj`ubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM]hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hj_hM`hjdubjZ )}(hX``commit`` This callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used. h](j` )}(h ``commit``h]jf )}(hjh]hcommit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMohjubj| )}(hhh](h)}(hThis callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON.h](hThis callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their }(hjhhhNhNubj )}(h**dpms**h]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh hook with DRM_MODE_DPMS_ON.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMghjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMlhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMohjdubjZ )}(hXF``mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers. NOTE: If the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead. h](j` )}(h ``mode_set``h]jf )}(hj$h]hmode_set}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh](h)}(h?This callback is used to update the display mode of an encoder.h]h?This callback is used to update the display mode of an encoder.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMvhj:ubh)}(hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback.h](hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new “ACTIVE” property. Such drivers should instead move all their encoder setup into the }(hjLhhhNhNubj )}(h **enable**h]henable}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubh callback.}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhj:ubh)}(h{This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers.h]h{This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj:ubh)}(hNOTE:h]hNOTE:}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj:ubh)}(hIf the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead.h](hIf the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, }(hjhhhNhNubj )}(h**atomic_mode_set**h]hatomic_mode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh can be used instead.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj:ubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhjdubjZ )}(hXY``atomic_mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector. h](j` )}(h``atomic_mode_set``h]jf )}(hjh]hatomic_mode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh](h)}(h?This callback is used to update the display mode of an encoder.h]h?This callback is used to update the display mode of an encoder.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback.h](hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new “ACTIVE” property. Such drivers should instead move all their encoder setup into the }(hjhhhNhNubj )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX<This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector.h](hDThis callback is used by the atomic modeset helpers in place of the }(hjhhhNhNubj )}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhN callback, if set by the driver. It is optional and should be used instead of }(hjhhhNhNubj )}(h **mode_set**h]hmode_set}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubjZ )}(hX``detect`` This callback can be used by drivers who want to do detection on the encoder object instead of in connector functions. It is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks. FIXME: This should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it. h](j` )}(h ``detect``h]jf )}(hjLh]hdetect}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjFubj| )}(hhh](h)}(hvThis callback can be used by drivers who want to do detection on the encoder object instead of in connector functions.h]hvThis callback can be used by drivers who want to do detection on the encoder object instead of in connector functions.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjbubh)}(hIt is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks.h]hIt is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn’t use this and instead just implement their own private callbacks.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjbubh)}(hFIXME:h]hFIXME:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjbubh)}(hnThis should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it.h]hnThis should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjbubeh}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahMhjdubjZ )}(hX``atomic_disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers. This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**. h](j` )}(h``atomic_disable``h]jf )}(hjh]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh](h)}(hXThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder’s CRTC has been shut off using their own }(hjhhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]jf )}(hjh]h$drm_crtc_helper_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers.h](hThis callback is a variant of }(hjhhhNhNubj )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 that provides the atomic state to the driver. If }(hjhhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh is implemented, }(hjhhhNhNubj )}(h **disable**h]hdisable}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh is not called by the helpers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX'This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**.h](hThis hook is only used by atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjChhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubh must be the inverse of }(hjChhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubh.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubjZ )}(hXn``atomic_enable`` This callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers. This hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**. h](j` )}(h``atomic_enable``h]jf )}(hjh]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj| )}(hhh](h)}(hXThis callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](h~This callback should be used to enable the encoder. It is called after this encoder’s CRTC has been enabled using their own }(hjhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]jf )}(hjh]h#drm_crtc_helper_funcs.atomic_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers.h](hThis callback is a variant of }(hjhhhNhNubj )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 that provides the atomic state to the driver. If }(hjhhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh is implemented, }(hjhhhNhNubj )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh is not called by the helpers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXThis hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**.h](h@This hook is only used by atomic helpers, it is the opposite of }(hj hhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh. Atomic drivers don’t need to implement it if there’s no need to enable anything at the encoder level. To ensure that runtime PM handling works }(hj hhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh must be the inverse of }(hj hhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubjZ )}(hXw``disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers. For atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below! NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. h](j` )}(h ``disable``h]jf )}(hjo h]hdisable}(hjq hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjm ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhji ubj| )}(hhh](h)}(hXThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder’s CRTC has been shut off using their own }(hj hhhNhNubh)}(h?:c:type:`drm_crtc_helper_funcs.disable `h]jf )}(hj h]hdrm_crtc_helper_funcs.disable}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubh)}(hXDThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers.h](hX This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hj hhhNhNubj )}(h **disable**h]hdisable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh must be the inverse of }(hj hhhNhNubj )}(h **enable**h]henable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh for atomic drivers.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hiFor atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below!h](h!For atomic drivers also consider }(hj hhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh6 and save yourself from having to read the NOTE below!}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hNOTE:h]hNOTE:}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hX^With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers).h](hEWith legacy CRTC helpers there’s a big semantic difference between }(hj!hhhNhNubj )}(h **disable**h]hdisable}(hj%!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh and other hooks (like }(hj!hhhNhNubj )}(h **prepare**h]hprepare}(hj7!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh or }(hj!hhhNhNubj )}(h**dpms**h]hdpms}(hjI!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh) used to shut down a encoder: }(hj!hhhNhNubj )}(h **disable**h]hdisable}(hj[!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubhr is only called when also logically disabling the display pipeline and needs to release any resources acquired in }(hj!hhhNhNubj )}(h **mode_set**h]hmode_set}(hjm!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh: (like shared PLLs, or again release pinned framebuffers).}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hTherefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic.h](h Therefore }(hj!hhhNhNubj )}(h **disable**h]hdisable}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh must be the inverse of }(hj!hhhNhNubj )}(h **mode_set**h]hmode_set}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh plus }(hj!hhhNhNubj )}(h **commit**h]hcommit}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh] for drivers still using legacy CRTC helpers, which is different from the rules under atomic.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubeh}(h]h ]h"]h$]h&]uh1j{ hji ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjdubjZ )}(hX``enable`` This callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers. h](j` )}(h ``enable``h]jf )}(hj!h]henable}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubj| )}(hhh](h)}(hXThis callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to enable the encoder. With the atomic drivers it is called after this encoder’s CRTC has been enabled using their own }(hj!hhhNhNubh)}(h>:c:type:`drm_crtc_helper_funcs.enable `h]jf )}(hj"h]hdrm_crtc_helper_funcs.enable}(hj"hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"hMhj!ubh)}(hXNThis hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers.h](h@This hook is only used by atomic helpers, it is the opposite of }(hj("hhhNhNubj )}(h **disable**h]hdisable}(hj0"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj("ubh. Atomic drivers don’t need to implement it if there’s no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hj("hhhNhNubj )}(h **enable**h]henable}(hjB"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj("ubh must be the inverse of }(hj("hhhNhNubj )}(h **disable**h]hdisable}(hjT"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj("ubh for atomic drivers.}(hj("hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj!hMhjdubjZ )}(hX``atomic_check`` This callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector. Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented. This function is used by the atomic helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](j` )}(h``atomic_check``h]jf )}(hj"h]h atomic_check}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}"ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM8hjy"ubj| )}(hhh](h)}(hXThis callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector.h]hXThis callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"ubh)}(hX Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented.h](h>Since this provides a strict superset of the functionality of }(hj"hhhNhNubj )}(h**mode_fixup**h]h mode_fixup}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubhL (the requested and adjusted modes are both available through the passed in }(hj"hhhNhNubh)}(h0:c:type:`struct drm_crtc_state `h]jf )}(hj"h]hstruct drm_crtc_state}(hj"hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hj"ubh) }(hj"hhhNhNubj )}(h**mode_fixup**h]h mode_fixup}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubh is not called when }(hj"hhhNhNubj )}(h**atomic_check**h]h atomic_check}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubh is implemented.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"hM hj"ubh)}(h@This function is used by the atomic helpers, but it is optional.h]h@This function is used by the atomic helpers, but it is optional.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM%hj"ubh)}(hNOTE:h]hNOTE:}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM'hj"ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure.h](hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall }(hj-#hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]jf )}(hj7#h]hdrm_atomic_commit}(hj9#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj5#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM)hj-#ubh update tracking structure.}(hj-#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjT#hM)hj"ubh)}(hXOAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hj_#hhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jf )}(hji#h]hdrm_connector.modes}(hjk#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjg#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM.hj_#ubhd. To ensure that modes are filtered consistently put any encoder constraints and limits checks into }(hj_#hhhNhNubj )}(h**mode_valid**h]h mode_valid}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_#ubh.}(hj_#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hM.hj"ubh)}(hRETURNS:h]hRETURNS:}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM4hj"ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj#hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jf )}(hj#h]hdrm_modeset_lock}(hj#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM6hj#ubh deadlock.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hM6hj"ubeh}(h]h ]h"]h$]h&]uh1j{ hjy"ubeh}(h]h ]h"]h$]h&]uh1jY hj"hM8hjdubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubh)}(h**Description**h]j )}(hj#h]h Description}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM<hj& hhubh)}(hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.h]hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj& hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_encoder_helper_add (C function)c.drm_encoder_helper_addhNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(hgvoid drm_encoder_helper_add (struct drm_encoder *encoder, const struct drm_encoder_helper_funcs *funcs)h]j )}(hfvoid drm_encoder_helper_add(struct drm_encoder *encoder, const struct drm_encoder_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hj=$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9$hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMBubj )}(h h]h }(hjL$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9$hhhjK$hMBubj )}(hdrm_encoder_helper_addh]j )}(hdrm_encoder_helper_addh]hdrm_encoder_helper_add}(hj^$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj9$hhhjK$hMBubj)}(hK(struct drm_encoder *encoder, const struct drm_encoder_helper_funcs *funcs)h](j)}(hstruct drm_encoder *encoderh](j )}(hj h]hstruct}(hjz$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv$ubh)}(hhh]j )}(h drm_encoderh]h drm_encoder}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j)}jj`$sbc.drm_encoder_helper_addasbuh1hhjv$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv$ubj)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjv$ubj )}(hencoderh]hencoder}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjr$ubj)}(h,const struct drm_encoder_helper_funcs *funcsh](j )}(hjAh]hconst}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(hdrm_encoder_helper_funcsh]hdrm_encoder_helper_funcs}(hj%%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'%modnameN classnameNj j )}j ]j$c.drm_encoder_helper_addasbuh1hhj$ubj )}(h h]h }(hjC%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(hjOh]h*}(hjQ%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$ubj )}(hfuncsh]hfuncs}(hj^%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjr$ubeh}(h]h ]h"]h$]h&]j j uh1jhj9$hhhjK$hMBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5$hhhjK$hMBubah}(h]j0$ah ](j j eh"]h$]h&]j j )j huh1j{ hjK$hMBhj2$hhubj )}(hhh]h)}(h%sets the helper vtable for an encoderh]h%sets the helper vtable for an encoder}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMBhj%hhubah}(h]h ]h"]h$]h&]uh1j hj2$hhhjK$hMBubeh}(h]h ](j functioneh"]h$]h&]j j j j%j j%j j j uh1jv hhhj& hju hNubj )}(h**Parameters** ``struct drm_encoder *encoder`` DRM encoder ``const struct drm_encoder_helper_funcs *funcs`` helper vtable to set for **encoder**h](h)}(h**Parameters**h]j )}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhj%ubjU )}(hhh](jZ )}(h,``struct drm_encoder *encoder`` DRM encoder h](j` )}(h``struct drm_encoder *encoder``h]jf )}(hj%h]hstruct drm_encoder *encoder}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMChj%ubj| )}(hhh]h)}(h DRM encoderh]h DRM encoder}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMChj%ubah}(h]h ]h"]h$]h&]uh1j{ hj%ubeh}(h]h ]h"]h$]h&]uh1jY hj%hMChj%ubjZ )}(hU``const struct drm_encoder_helper_funcs *funcs`` helper vtable to set for **encoder**h](j` )}(h0``const struct drm_encoder_helper_funcs *funcs``h]jf )}(hj&h]h,const struct drm_encoder_helper_funcs *funcs}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMEhj%ubj| )}(hhh]h)}(h$helper vtable to set for **encoder**h](hhelper vtable to set for }(hj&hhhNhNubj )}(h **encoder**h]hencoder}(hj#&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMDhj&ubah}(h]h ]h"]h$]h&]uh1j{ hj%ubeh}(h]h ]h"]h$]h&]uh1jY hj&hMEhj%ubeh}(h]h ]h"]h$]h&]uh1jT hj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_connector_helper_funcs (C struct)c.drm_connector_helper_funcshNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(hdrm_connector_helper_funcsh]j )}(h!struct drm_connector_helper_funcsh](j )}(hj h]hstruct}(hjj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf&hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMIubj )}(h h]h }(hjx&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf&hhhjw&hMIubj )}(hdrm_connector_helper_funcsh]j )}(hjd&h]hdrm_connector_helper_funcs}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjf&hhhjw&hMIubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjb&hhhjw&hMIubah}(h]j]&ah ](j j eh"]h$]h&]j j )j huh1j{ hjw&hMIhj_&hhubj )}(hhh]h)}(h helper operations for connectorsh]h helper operations for connectors}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMMhj&hhubah}(h]h ]h"]h$]h&]uh1j hj_&hhhjw&hMIubeh}(h]h ](j structeh"]h$]h&]j j j j&j j&j j j uh1jv hhhj& hju hNubj )}(hXX0**Definition**:: struct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_commit *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); }; **Members** ``get_modes`` This function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property(). The usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in. Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case. Virtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode(). This function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline. This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes(). To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes. ``detect_ctx`` Check to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing. This callback is optional, if not implemented the connector will be considered as always being attached. This is the atomic version of :c:type:`drm_connector_funcs.detect `. To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required. RETURNS: :c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK. ``mode_valid`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional. NOTE: This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here. To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. ``mode_valid_ctx`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `. To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required. Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state. Returns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise. ``best_encoder`` This function should select the best encoder for the given connector. This function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers. NOTE: In atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**. You can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. ``atomic_best_encoder`` This is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically. This function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL). NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure passed in. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. ``atomic_check`` This hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced. Because :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_commit`` This hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `. This hook is optional. This callback is used by the atomic modeset helpers. ``prepare_writeback_job`` As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only. This operation is optional. This callback is used by the atomic modeset helpers. ``cleanup_writeback_job`` This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes. This operation is optional. This callback is used by the atomic modeset helpers. ``enable_hpd`` Enable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_enable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced. ``disable_hpd`` Disable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_disable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubh:}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMQhj&ubj, )}(hXstruct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_commit *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); };h]hXstruct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_commit *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); };}hj&sbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMShj&ubh)}(h **Members**h]j )}(hj&h]hMembers}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMbhj&ubjU )}(hhh](jZ )}(hX``get_modes`` This function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property(). The usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in. Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case. Virtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode(). This function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline. This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes(). To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes. h](j` )}(h ``get_modes``h]jf )}(hj'h]h get_modes}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM{hj'ubj| )}(hhh](h)}(hThis function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property().h](hMThis function should fill in all modes currently valid for the sink into the }(hj2'hhhNhNubh)}(h4:c:type:`drm_connector.probed_modes `h]jf )}(hj<'h]hdrm_connector.probed_modes}(hj>'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMUhj2'ubh_ list. It should also update the EDID property by calling drm_connector_update_edid_property().}(hj2'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjY'hMUhj/'ubh)}(hXNThe usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in.h](hXThe usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the }(hjd'hhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]jf )}(hjn'h]hdrm_connector.display_info}(hjp'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjl'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMYhjd'ubh, }(hjd'hhhNhNubh)}(h0:c:type:`drm_connector.width_mm `h]jf )}(hj'h]hdrm_connector.width_mm}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj'hMYhjd'ubh and }(hjd'hhhNhNubh)}(h1:c:type:`drm_connector.height_mm `h]jf )}(hj'h]hdrm_connector.height_mm}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj'hMYhjd'ubh fields are filled in.}(hjd'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hMYhj/'ubh)}(hX.Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case.h]hX.Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMchj/'ubh)}(hVirtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode().h]hVirtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode().}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMihj/'ubh)}(hThis function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline.h](h'This function is only called after the }(hj'hhhNhNubj )}(h **detect**h]hdetect}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubhz hook has indicated that a sink is connected and when the EDID isn’t overridden through sysfs or the kernel commandline.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMmhj/'ubh)}(h]This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes().h]h]This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes().}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMqhj/'ubh)}(hTo avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `.h](hgTo avoid races with concurrent connector state updates, the helper libraries always call this with the }(hj*(hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jf )}(hj4(h]h drm_mode_config.connection_mutex}(hj6(hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj2(ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMthj*(ubh. held. Because of this it’s safe to inspect }(hj*(hhhNhNubh)}(h.:c:type:`drm_connector->state `h]jf )}(hjX(h]hdrm_connector->state}(hjZ(hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjV(ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjQ(hMthj*(ubh.}(hj*(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQ(hMthj/'ubh)}(hRETURNS:h]hRETURNS:}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhj/'ubh)}(h|The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes.h]h|The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMzhj/'ubeh}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hj.'hM{hj'ubjZ )}(hX``detect_ctx`` Check to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing. This callback is optional, if not implemented the connector will be considered as always being attached. This is the atomic version of :c:type:`drm_connector_funcs.detect `. To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required. RETURNS: :c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK. h](j` )}(h``detect_ctx``h]jf )}(hj(h]h detect_ctx}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubj| )}(hhh](h)}(hXCheck to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing.h]hXCheck to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(hhThis callback is optional, if not implemented the connector will be considered as always being attached.h]hhThis callback is optional, if not implemented the connector will be considered as always being attached.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(hYThis is the atomic version of :c:type:`drm_connector_funcs.detect `.h](hThis is the atomic version of }(hj(hhhNhNubh)}(h::c:type:`drm_connector_funcs.detect `h]jf )}(hj(h]hdrm_connector_funcs.detect}(hj(hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj )hMhj(ubh)}(hX1To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required.h](hTo avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and }(hj)hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jf )}(hj")h]h drm_mode_config.connection_mutex}(hj$)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj )ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubho will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?)hMhj(ubh)}(hRETURNS:h]hRETURNS:}(hjJ)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(h}:c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK.h](h)}(h:c:type:`drm_connector_status`h]jf )}(hj_)h]hdrm_connector_status}(hja)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj])ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_statusuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjY)ubha indicating the connector’s status, or the error code returned by drm_modeset_lock(), -EDEADLK.}(hjY)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj|)hMhj(ubeh}(h]h ]h"]h$]h&]uh1j{ hj(ubeh}(h]h ]h"]h$]h&]uh1jY hj(hMhj'ubjZ )}(hX``mode_valid`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional. NOTE: This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here. To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. h](j` )}(h``mode_valid``h]jf )}(hj)h]h mode_valid}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubj| )}(hhh](h)}(h`Callback to validate a mode for a connector, irrespective of the specific display configuration.h]h`Callback to validate a mode for a connector, irrespective of the specific display configuration.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().h]hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hThis function is optional.h]hThis function is optional.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hNOTE:h]hNOTE:}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hXThis only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here.h](h]This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to }(hj)hhhNhNubh)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]jf )}(hj)h]h#drm_encoder_helper_funcs.mode_valid}(hj)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh, }(hj)hhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]jf )}(hj*h]h drm_crtc_helper_funcs.mode_valid}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhj*hMhj)ubh and }(hj)hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jf )}(hj?*h]hdrm_bridge_funcs.mode_valid}(hjA*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj=*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj*hMhj)ubhX, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen’s EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*hMhj)ubh)}(hTo avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `.h](hgTo avoid races with concurrent connector state updates, the helper libraries always call this with the }(hjf*hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jf )}(hjp*h]h drm_mode_config.connection_mutex}(hjr*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjn*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjf*ubh. held. Because of this it’s safe to inspect }(hjf*hhhNhNubh)}(h.:c:type:`drm_connector->state `h]jf )}(hj*h]hdrm_connector->state}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj*hMhjf*ubh.}(hjf*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*hMhj)ubh)}(hRETURNS:h]hRETURNS:}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hEither :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `.h](hEither }(hj*hhhNhNubh)}(h3:c:type:`drm_mode_status.MODE_OK `h]jf )}(hj*h]hdrm_mode_status.MODE_OK}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj*ubh" or one of the failure reasons in }(hj*hhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]jf )}(hj*h]henum drm_mode_status}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhj*hMhj*ubh.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*hMhj)ubeh}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hj)hMhj'ubjZ )}(hX,``mode_valid_ctx`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `. To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required. Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state. Returns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise. h](j` )}(h``mode_valid_ctx``h]jf )}(hj1+h]hmode_valid_ctx}(hj3+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/+ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj++ubj| )}(hhh](h)}(h`Callback to validate a mode for a connector, irrespective of the specific display configuration.h]h`Callback to validate a mode for a connector, irrespective of the specific display configuration.}(hjJ+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjG+ubh)}(hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().h]hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().}(hjY+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjG+ubh)}(hThis function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `.h](h8This function is optional, and is the atomic version of }(hjh+hhhNhNubh)}(hL:c:type:`drm_connector_helper_funcs.mode_valid `h]jf )}(hjr+h]h%drm_connector_helper_funcs.mode_valid}(hjt+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjp+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjh+ubh.}(hjh+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hMhjG+ubh)}(hX9To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required.h](hTo allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and }(hj+hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jf )}(hj+h]h drm_mode_config.connection_mutex}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj+ubh5 will always be locked with the ctx parameter set to }(hj+hhhNhNubj )}(h**ctx**h]hctx}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubh6. This allows for taking additional locks as required.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hMhjG+ubh)}(hXWEven though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state.h]hX[Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver’s atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn’t be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjG+ubh)}(hReturns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise.h](hReturns: 0 if }(hj+hhhNhNubh)}(hP:c:type:`drm_connector_helper_funcs.mode_valid_ctx `h]jf )}(hj+h]h)drm_connector_helper_funcs.mode_valid_ctx}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj+ubh succeeded and wrote the }(hj+hhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]jf )}(hj,h]henum drm_mode_status}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhj,hMhj+ubh value to }(hj+hhhNhNubj )}(h **status**h]hstatus}(hj<,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubh%, or a negative error code otherwise.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,hMhjG+ubeh}(h]h ]h"]h$]h&]uh1j{ hj++ubeh}(h]h ]h"]h$]h&]uh1jY hjF+hMhj'ubjZ )}(hX``best_encoder`` This function should select the best encoder for the given connector. This function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers. NOTE: In atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**. You can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. h](j` )}(h``best_encoder``h]jf )}(hjf,h]h best_encoder}(hjh,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjd,ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj`,ubj| )}(hhh](h)}(hEThis function should select the best encoder for the given connector.h]hEThis function should select the best encoder for the given connector.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|,ubh)}(hThis function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers.h]hThis function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|,ubh)}(hNOTE:h]hNOTE:}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|,ubh)}(hXIn atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**.h](hIn atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use }(hj,hhhNhNubj )}(h**atomic_best_encoder**h]hatomic_best_encoder}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubh.}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|,ubh)}(hYou can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you.h]hYou can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|,ubh)}(hRETURNS:h]hRETURNS:}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|,ubh)}(hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this.h]hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren’t used twice, drivers should not check for this.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|,ubeh}(h]h ]h"]h$]h&]uh1j{ hj`,ubeh}(h]h ]h"]h$]h&]uh1jY hj{,hMhj'ubjZ )}(hX6``atomic_best_encoder`` This is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically. This function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL). NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure passed in. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. h](j` )}(h``atomic_best_encoder``h]jf )}(hj -h]hatomic_best_encoder}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj -ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj-ubj| )}(hhh](h)}(hThis is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically.h](hThis is the atomic version of }(hj%-hhhNhNubj )}(h**best_encoder**h]h best_encoder}(hj--hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%-ubh for atomic drivers which need to select the best encoder depending upon the desired configuration and can’t select it statically.}(hj%-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hj"-ubh)}(hThis function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL).h](hpThis function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to }(hjF-hhhNhNubj )}(h**best_encoder**h]h best_encoder}(hjN-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjF-ubh+ (or drm_connector_get_single_encoder() if }(hjF-hhhNhNubj )}(h**best_encoder**h]h best_encoder}(hj`-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjF-ubh is NULL).}(hjF-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"-ubh)}(hNOTE:h]hNOTE:}(hjy-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"-ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure passed in.h](h|This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the }(hj-hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]jf )}(hj-h]hdrm_atomic_commit}(hj-hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj-ubh% update tracking structure passed in.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMhj"-ubh)}(hRETURNS:h]hRETURNS:}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"-ubh)}(hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this.h]hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren’t used twice, drivers should not check for this.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"-ubeh}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hj!-hMhj'ubjZ )}(hX``atomic_check`` This hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced. Because :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](j` )}(h``atomic_check``h]jf )}(hj-h]h atomic_check}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM?hj-ubj| )}(hhh](h)}(hThis hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced.h](hLThis hook is used to validate connector state. This function is called from }(hj.hhhNhNubh)}(h):c:type:`drm_atomic_helper_check_modeset`h]jf )}(hj .h]hdrm_atomic_helper_check_modeset}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj .ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_helper_check_modesetuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM%hj.ubhU, and is called when a connector property is set, or a modeset on the crtc is forced.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*.hM%hj.ubh)}(hBecause :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well.h](hBecause }(hj5.hhhNhNubh)}(h):c:type:`drm_atomic_helper_check_modeset`h]jf )}(hj?.h]hdrm_atomic_helper_check_modeset}(hjA.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj=.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_helper_check_modesetuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM)hj5.ubh_ may be called multiple times, this function should handle being called multiple times as well.}(hj5.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\.hM)hj.ubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hjg.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM,hj.ubh)}(hNOTE:h]hNOTE:}(hjv.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM3hj.ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure.h](hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall }(hj.hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]jf )}(hj.h]hdrm_atomic_commit}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM5hj.ubh update tracking structure.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj.hM5hj.ubh)}(hRETURNS:h]hRETURNS:}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM:hj.ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj.hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jf )}(hj.h]hdrm_modeset_lock}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM<hj.ubh deadlock.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj.hM<hj.ubeh}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hj-hM?hj'ubjZ )}(hXt``atomic_commit`` This hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `. This hook is optional. This callback is used by the atomic modeset helpers. h](j` )}(h``atomic_commit``h]jf )}(hj /h]h atomic_commit}(hj /hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhj/ubj| )}(hhh](h)}(hXThis hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `.h](hThis hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in }(hj#/hhhNhNubh)}(hA:c:type:`drm_connector_state.writeback_job `h]jf )}(hj-/h]h!drm_connector_state.writeback_job}(hj//hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj+/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMGhj#/ubh.}(hj#/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjJ/hMGhj /ubh)}(hThis hook is optional.h]hThis hook is optional.}(hjU/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMLhj /ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hjd/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMNhj /ubeh}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hj/hMNhj'ubjZ )}(hX``prepare_writeback_job`` As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only. This operation is optional. This callback is used by the atomic modeset helpers. h](j` )}(h``prepare_writeback_job``h]jf )}(hj/h]hprepare_writeback_job}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM_hj~/ubj| )}(hhh](h)}(hX|As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only.h](hXJAs writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct }(hj/hhhNhNubh)}(h!:c:type:`drm_writeback_connector`h]jf )}(hj/h]hdrm_writeback_connector}(hj/hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_writeback_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMVhj/ubh connectors only.}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/hMVhj/ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM]hj/ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM_hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hj~/ubeh}(h]h ]h"]h$]h&]uh1jY hj/hM_hj'ubjZ )}(hX{``cleanup_writeback_job`` This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes. This operation is optional. This callback is used by the atomic modeset helpers. h](j` )}(h``cleanup_writeback_job``h]jf )}(hj/h]hcleanup_writeback_job}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMnhj/ubj| )}(hhh](h)}(hX This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes.h]hX This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMfhj0ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj&0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMlhj0ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hj50hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMnhj0ubeh}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hj0hMnhj'ubjZ )}(hXD``enable_hpd`` Enable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_enable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced. h](j` )}(h``enable_hpd``h]jf )}(hjU0h]h enable_hpd}(hjW0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjS0ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM~hjO0ubj| )}(hhh](h)}(h,Enable hot-plug detection for the connector.h]h,Enable hot-plug detection for the connector.}(hjn0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMvhjk0ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj}0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhjk0ubh)}(hBThis callback is used by the drm_kms_helper_poll_enable() helpers.h]hBThis callback is used by the drm_kms_helper_poll_enable() helpers.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMzhjk0ubh)}(hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h]hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM|hjk0ubeh}(h]h ]h"]h$]h&]uh1j{ hjO0ubeh}(h]h ]h"]h$]h&]uh1jY hjj0hM~hj'ubjZ )}(hXF``disable_hpd`` Disable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_disable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h](j` )}(h``disable_hpd``h]jf )}(hj0h]h disable_hpd}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubj| )}(hhh](h)}(h-Disable hot-plug detection for the connector.h]h-Disable hot-plug detection for the connector.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh)}(hCThis callback is used by the drm_kms_helper_poll_disable() helpers.h]hCThis callback is used by the drm_kms_helper_poll_disable() helpers.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh)}(hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h]hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubeh}(h]h ]h"]h$]h&]uh1j{ hj0ubeh}(h]h ]h"]h$]h&]uh1jY hj0hMhj'ubeh}(h]h ]h"]h$]h&]uh1jT hj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubh)}(h**Description**h]j )}(hj,1h]h Description}(hj.1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj& hhubh)}(h[These functions are used by the atomic and legacy modeset helpers and by the probe helpers.h]h[These functions are used by the atomic and legacy modeset helpers and by the probe helpers.}(hjB1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhj& hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_connector_helper_add (C function)c.drm_connector_helper_addhNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(hovoid drm_connector_helper_add (struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h]j )}(hnvoid drm_connector_helper_add(struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hjj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf1hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hjy1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf1hhhjx1hMubj )}(hdrm_connector_helper_addh]j )}(hdrm_connector_helper_addh]hdrm_connector_helper_add}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjf1hhhjx1hMubj)}(hQ(struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j)}jj1sbc.drm_connector_helper_addasbuh1hhj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(h connectorh]h connector}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(h.const struct drm_connector_helper_funcs *funcsh](j )}(hjAh]hconst}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj&2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(hj h]hstruct}(hj42hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hjA2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(hdrm_connector_helper_funcsh]hdrm_connector_helper_funcs}(hjR2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjT2modnameN classnameNj j )}j ]j1c.drm_connector_helper_addasbuh1hhj2ubj )}(h h]h }(hjp2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj)}(hjOh]h*}(hj~2hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj2ubj )}(hfuncsh]hfuncs}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhjf1hhhjx1hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjb1hhhjx1hMubah}(h]j]1ah ](j j eh"]h$]h&]j j )j huh1j{ hjx1hMhj_1hhubj )}(hhh]h)}(h&sets the helper vtable for a connectorh]h&sets the helper vtable for a connector}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj2hhubah}(h]h ]h"]h$]h&]uh1j hj_1hhhjx1hMubeh}(h]h ](j functioneh"]h$]h&]j j j j2j j2j j j uh1jv hhhj& hju hNubj )}(h**Parameters** ``struct drm_connector *connector`` DRM connector ``const struct drm_connector_helper_funcs *funcs`` helper vtable to set for **connector**h](h)}(h**Parameters**h]j )}(hj2h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj2ubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` DRM connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj2h]hstruct drm_connector *connector}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj2ubj| )}(hhh]h)}(h DRM connectorh]h DRM connector}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 3hMhj 3ubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hj 3hMhj2ubjZ )}(hY``const struct drm_connector_helper_funcs *funcs`` helper vtable to set for **connector**h](j` )}(h2``const struct drm_connector_helper_funcs *funcs``h]jf )}(hj/3h]h.const struct drm_connector_helper_funcs *funcs}(hj13hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-3ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)3ubj| )}(hhh]h)}(h&helper vtable to set for **connector**h](hhelper vtable to set for }(hjH3hhhNhNubj )}(h **connector**h]h connector}(hjP3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjH3ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjE3ubah}(h]h ]h"]h$]h&]uh1j{ hj)3ubeh}(h]h ]h"]h$]h&]uh1jY hjD3hMhj2ubeh}(h]h ]h"]h$]h&]uh1jT hj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_plane_helper_funcs (C struct)c.drm_plane_helper_funcshNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(hdrm_plane_helper_funcsh]j )}(hstruct drm_plane_helper_funcsh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhj3hMubj )}(hdrm_plane_helper_funcsh]j )}(hj3h]hdrm_plane_helper_funcs}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhj3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhj3hMubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j{ hj3hMhj3hhubj )}(hhh]h)}(hhelper operations for planesh]hhelper operations for planes}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3hhubah}(h]h ]h"]h$]h&]uh1j hj3hhhj3hMubeh}(h]h ](j structeh"]h$]h&]j j j j3j j3j j j uh1jv hhhj& hju hNubj )}(hX"/**Definition**:: struct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_commit *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); }; **Members** ``prepare_fb`` This hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches. This function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. The resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit. The helpers will call **cleanup_fb** with matching arguments for every successful call to this hook. This callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources. RETURNS: 0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully. ``cleanup_fb`` This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**. This callback is used by the atomic modeset helpers, but it is optional. ``begin_fb_access`` This hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**. For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. The callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip. Returns: 0 on success, or a negative errno code otherwise. ``end_fb_access`` This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state. ``atomic_check`` Drivers should check plane specific constraints in this hook. When using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_update`` Drivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_enable`` Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**. ``atomic_disable`` Drivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented. This hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**. ``atomic_async_check`` Drivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized". This hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update. This function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip. RETURNS: Return 0 on success and any error returned indicates that the update can not be applied in asynchronous manner. ``atomic_async_update`` Drivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized". This hook is called by drm_atomic_helper_async_commit(). An async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane. When doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state. Drivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit. FIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. ``get_scanout_buffer`` Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned. Return: ``0`` on success, negative errno on failure. ``panic_flush`` It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubh:}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubj, )}(hXstruct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_commit *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); };h]hXstruct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_commit *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); };}hj4sbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(h **Members**h]j )}(hj'4h]hMembers}(hj)4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%4ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubjU )}(hhh](jZ )}(hX``prepare_fb`` This hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches. This function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. The resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit. The helpers will call **cleanup_fb** with matching arguments for every successful call to this hook. This callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources. RETURNS: 0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully. h](j` )}(h``prepare_fb``h]jf )}(hjF4h]h prepare_fb}(hjH4hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjD4ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@4ubj| )}(hhh](h)}(hThis hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches.h]hThis hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches.}(hj_4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\4ubh)}(hXThis function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure.h](hThis function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the }(hjn4hhhNhNubh)}(h1:c:type:`drm_plane_state.fence `h]jf )}(hjx4h]hdrm_plane_state.fence}(hjz4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjv4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjn4ubh of the passed-in }(hjn4hhhNhNubh)}(h:c:type:`drm_plane_state`h]jf )}(hj4h]hdrm_plane_state}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_stateuh1hhj4hMhjn4ubh. If the driver doesn’t support native fences then equivalent functionality should be implemented through private members in the plane structure.}(hjn4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hMhj\4ubh)}(hXFor GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook.h](h#For GEM drivers who neither have a }(hj4hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubh nor }(hj4hhhNhNubj )}(h**cleanup_fb**h]h cleanup_fb}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubh hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their }(hj4hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubh hook.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\4ubh)}(hXThe resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit.h](hThe resources acquired in }(hj5hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubhw persist after the end of the atomic commit. Resources that can be release at the commit’s end should be acquired in }(hj5hhhNhNubj )}(h**begin_fb_access**h]hbegin_fb_access}(hj"5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubh and released in }(hj5hhhNhNubj )}(h**end_fb_access**h]h end_fb_access}(hj45hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubh;. For example, a GEM buffer’s pin operation belongs into }(hj5hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hjF5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubhh to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into }(hj5hhhNhNubj )}(h**begin_fb_access**h]hbegin_fb_access}(hjX5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubhE, so that atomic helpers remove the mapping at the end of the commit.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\4ubh)}(hdThe helpers will call **cleanup_fb** with matching arguments for every successful call to this hook.h](hThe helpers will call }(hjq5hhhNhNubj )}(h**cleanup_fb**h]h cleanup_fb}(hjy5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjq5ubh@ with matching arguments for every successful call to this hook.}(hjq5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\4ubh)}(hThis callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources.h](hMThis callback is used by the atomic modeset helpers, but it is optional. See }(hj5hhhNhNubj )}(h**begin_fb_access**h]hbegin_fb_access}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubh$ for preparing per-commit resources.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\4ubh)}(hRETURNS:h]hRETURNS:}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\4ubh)}(hX0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully.h](hI0 on success or one of the following negative error codes allowed by the }(hj5hhhNhNubh)}(hE:c:type:`drm_mode_config_funcs.atomic_commit `h]jf )}(hj5h]h#drm_mode_config_funcs.atomic_commit}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj5ubh vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj5hMhj\4ubeh}(h]h ]h"]h$]h&]uh1j{ hj@4ubeh}(h]h ]h"]h$]h&]uh1jY hj[4hMhj=4ubjZ )}(h``cleanup_fb`` This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**. This callback is used by the atomic modeset helpers, but it is optional. h](j` )}(h``cleanup_fb``h]jf )}(hj6h]h cleanup_fb}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj6ubj| )}(hhh](h)}(h|This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**.h](hmThis hook is called to clean up any resources allocated for the given framebuffer and plane configuration in }(hj6hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hj'6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubh.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj6ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj@6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj6ubeh}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhj=4ubjZ )}(hX!``begin_fb_access`` This hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**. For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. The callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip. Returns: 0 on success, or a negative errno code otherwise. h](j` )}(h``begin_fb_access``h]jf )}(hja6h]hbegin_fb_access}(hjc6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_6ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj[6ubj| )}(hhh](h)}(hThis hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**.h](hPThis hook prepares the plane for access during an atomic commit. In contrast to }(hjz6hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz6ubh, resources acquired in }(hjz6hhhNhNubj )}(h**begin_fb_access**h]hbegin_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz6ubh2, are released at the end of the atomic commit in }(hjz6hhhNhNubj )}(h**end_fb_access**h]h end_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz6ubh.}(hjz6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjw6ubh)}(hX.For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit.h](hWFor example, with shadow-plane helpers, the GEM buffer’s vmap operation belongs into }(hj6hhhNhNubj )}(h**begin_fb_access**h]hbegin_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubhM, so that the buffer’s memory will be unmapped at the end of the commit in }(hj6hhhNhNubj )}(h**end_fb_access**h]h end_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubh2. But a GEM buffer’s pin operation belongs into }(hj6hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubh, to keep the buffer pinned after the commit.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjw6ubh)}(hThe callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip.h](hLThe callback is used by the atomic modeset helpers, but it is optional. See }(hj7hhhNhNubj )}(h**end_fb_cleanup**h]hend_fb_cleanup}(hj 7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh for undoing the effects of }(hj7hhhNhNubj )}(h**begin_fb_access**h]hbegin_fb_access}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh and }(hj7hhhNhNubj )}(h**prepare_fb**h]h prepare_fb}(hj07hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh1 for acquiring resources until the next pageflip.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjw6ubh)}(h:Returns: 0 on success, or a negative errno code otherwise.h]h:Returns: 0 on success, or a negative errno code otherwise.}(hjI7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjw6ubeh}(h]h ]h"]h$]h&]uh1j{ hj[6ubeh}(h]h ]h"]h$]h&]uh1jY hjv6hMhj=4ubjZ )}(h``end_fb_access`` This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state. h](j` )}(h``end_fb_access``h]jf )}(hjj7h]h end_fb_access}(hjl7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjh7ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjd7ubj| )}(hhh]h)}(h|This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state.h](h+This hook cleans up resources allocated by }(hj7hhhNhNubj )}(h**begin_fb_access**h]hbegin_fb_access}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh>. It it called at the end of a commit for the new plane state.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubah}(h]h ]h"]h$]h&]uh1j{ hjd7ubeh}(h]h ]h"]h$]h&]uh1jY hj7hMhj=4ubjZ )}(hX0``atomic_check`` Drivers should check plane specific constraints in this hook. When using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](j` )}(h``atomic_check``h]jf )}(hj7h]h atomic_check}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubj| )}(hhh](h)}(h=Drivers should check plane specific constraints in this hook.h]h=Drivers should check plane specific constraints in this hook.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hXrWhen using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.h](h6When using drm_atomic_helper_check_planes() plane’s }(hj7hhhNhNubj )}(h**atomic_check**h]h atomic_check}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubhX. hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hNOTE:h]hNOTE:}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure.h](h|This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the }(hj,8hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]jf )}(hj68h]hdrm_atomic_commit}(hj88hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj48ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,8ubh update tracking structure.}(hj,8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjS8hMhj7ubh)}(hRETURNS:h]hRETURNS:}(hj^8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hjm8hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jf )}(hjw8h]hdrm_modeset_lock}(hjy8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hju8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjm8ubh deadlock.}(hjm8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8hMhj7ubeh}(h]h ]h"]h$]h&]uh1j{ hj7ubeh}(h]h ]h"]h$]h&]uh1jY hj7hMhj=4ubjZ )}(hX8``atomic_update`` Drivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](j` )}(h``atomic_update``h]jf )}(hj8h]h atomic_update}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM-hj8ubj| )}(hhh](h)}(hDrivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks.h](h`Drivers should use this function to update the plane state. This hook is called in-between the }(hj8hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]jf )}(hj8h]h"drm_crtc_helper_funcs.atomic_begin}(hj8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM$hj8ubh2 and drm_crtc_helper_funcs.atomic_flush callbacks.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8hM$hj8ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM(hj8ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj 9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM-hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hj8hM-hj=4ubjZ )}(hXB``atomic_enable`` Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**. h](j` )}(h``atomic_enable``h]jf )}(hj+9h]h atomic_enable}(hj-9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)9ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhj%9ubj| )}(hhh](h)}(hX'Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**.h](hgDrivers should use this function to unconditionally enable a plane. This hook is called in-between the }(hjD9hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]jf )}(hjN9h]h"drm_crtc_helper_funcs.atomic_begin}(hjP9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjL9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM5hjD9ubhF and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after }(hjD9hhhNhNubj )}(h**atomic_update**h]h atomic_update}(hjp9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjD9ubh@, which will be called for all enabled planes. Drivers that use }(hjD9hhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjD9ubh should set up a plane in }(hjD9hhhNhNubj )}(h**atomic_update**h]h atomic_update}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjD9ubh$ and afterwards enable the plane in }(hjD9hhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjD9ubhb. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in }(hjD9hhhNhNubj )}(h**atomic_update**h]h atomic_update}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjD9ubh.}(hjD9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjk9hM5hjA9ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM>hjA9ubh)}(hXThis callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**.h](hYThis callback is used by the atomic modeset helpers, but it is optional. If implemented, }(hj9hhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubh should be the inverse of }(hj9hhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubh[. Drivers that don’t want to use either can still implement the complete plane update in }(hj9hhhNhNubj )}(h**atomic_update**h]h atomic_update}(hj :hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubh.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMChjA9ubeh}(h]h ]h"]h$]h&]uh1j{ hj%9ubeh}(h]h ]h"]h$]h&]uh1jY hj@9hMFhj=4ubjZ )}(hX``atomic_disable`` Drivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented. This hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**. h](j` )}(h``atomic_disable``h]jf )}(hj6:h]hatomic_disable}(hj8:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4:ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM_hj0:ubj| )}(hhh](h)}(hXkDrivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented.h](hhDrivers should use this function to unconditionally disable a plane. This hook is called in-between the }(hjO:hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]jf )}(hjY:h]h"drm_crtc_helper_funcs.atomic_begin}(hj[:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjW:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhjO:ubhK and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to }(hjO:hhhNhNubj )}(h**atomic_update**h]h atomic_update}(hj{:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjO:ubh9, which will be called for disabling planes, too, if the }(hjO:hhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjO:ubh hook isn’t implemented.}(hjO:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjv:hMNhjL:ubh)}(hThis hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook.h](hThis hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the }(hj:hhhNhNubh)}(h?:c:type:`drm_crtc_helper_funcs.disable `h]jf )}(hj:h]hdrm_crtc_helper_funcs.disable}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMUhj:ubh hook.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:hMUhjL:ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMYhjL:ubh)}(hThis callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**.h](hsThis callback is used by the atomic modeset helpers, but it is optional. It’s intended to reverse the effects of }(hj:hhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubh.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM^hjL:ubeh}(h]h ]h"]h$]h&]uh1j{ hj0:ubeh}(h]h ]h"]h$]h&]uh1jY hjK:hM_hj=4ubjZ )}(hX``atomic_async_check`` Drivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized". This hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update. This function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip. RETURNS: Return 0 on success and any error returned indicates that the update can not be applied in asynchronous manner. h](j` )}(h``atomic_async_check``h]jf )}(hj;h]hatomic_async_check}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMwhj;ubj| )}(hhh](h)}(hDrivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized".h]hDrivers should set this function pointer to check if the plane’s atomic state can be updated in a async fashion. Here async means “not vblank synchronized”.}(hj2;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMghj/;ubh)}(hThis hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update.h]hThis hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update.}(hjA;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMkhj/;ubh)}(hThis function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip.h]hThis function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip.}(hjP;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMohj/;ubh)}(hRETURNS:h]hRETURNS:}(hj_;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMthj/;ubh)}(hoReturn 0 on success and any error returned indicates that the update can not be applied in asynchronous manner.h]hoReturn 0 on success and any error returned indicates that the update can not be applied in asynchronous manner.}(hjn;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMvhj/;ubeh}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hj.;hMwhj=4ubjZ )}(hX<``atomic_async_update`` Drivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized". This hook is called by drm_atomic_helper_async_commit(). An async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane. When doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state. Drivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit. FIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h](j` )}(h``atomic_async_update``h]jf )}(hj;h]hatomic_async_update}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubj| )}(hhh](h)}(hDrivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized".h]hDrivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means “not vblank synchronized”.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubh)}(h8This hook is called by drm_atomic_helper_async_commit().h]h8This hook is called by drm_atomic_helper_async_commit().}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubh)}(hAn async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane.h]hAn async update will happen on legacy cursor updates. An async update won’t happen if there is an outstanding commit modifying the same plane.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubh)}(hWhen doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state.h](h8When doing async_update drivers shouldn’t replace the }(hj;hhhNhNubh)}(h:c:type:`drm_plane_state`h]jf )}(hj;h]hdrm_plane_state}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubhU but update the current one with the new plane configurations in the new plane_state.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubh)}(hXDrivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit.h](hGDrivers should also swap the framebuffers between current plane state (}(hj<hhhNhNubh)}(h%:c:type:`drm_plane.state `h]jf )}(hj<h]hdrm_plane.state}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_planeuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubhX") and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj.<hMhj;ubjU )}(hhh]jZ )}(hXUFIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h](j` )}(hFIXME:h]hFIXME:}(hj@<hhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hj;hMhj<<ubj| )}(hhh]h)}(hhh](h)}(h&It only works for single plane updatesh]h)}(hjV<h]h&It only works for single plane updates}(hjX<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjT<ubah}(h]h ]h"]h$]h&]uh1hhjQ<ubh)}(h%Async Pageflips are not supported yeth]h)}(hjn<h]h%Async Pageflips are not supported yet}(hjp<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjl<ubah}(h]h ]h"]h$]h&]uh1hhjQ<ubh)}(hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h]h)}(hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created.h]hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubah}(h]h ]h"]h$]h&]uh1hhjQ<ubeh}(h]h ]h"]h$]h&]jN-uh1hhje<hMhjN<ubah}(h]h ]h"]h$]h&]uh1j{ hj<<ubeh}(h]h ]h"]h$]h&]uh1jY hj;hMhj9<ubah}(h]h ]h"]h$]h&]uh1jT hj;ubeh}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hj;hMhj=4ubjZ )}(hX``get_scanout_buffer`` Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned. Return: ``0`` on success, negative errno on failure. h](j` )}(h``get_scanout_buffer``h]jf )}(hj<h]hget_scanout_buffer}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubj| )}(hhh](h)}(hX<Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned.h](hXGet the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device }(hj<hhhNhNubh)}(h:c:type:`dev.mode_config `h]jf )}(hj<h]hdev.mode_config}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j devuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubhP.panic_lock is taken before calling this function, so you can safely access the }(hj<hhhNhNubh)}(h:c:type:`plane.state `h]jf )}(hj=h]h plane.state}(hj=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj =ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j planeuh1hhj=hMhj<ubhX? It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what’s safe and what is not allowed. It’s a best effort mode, so it’s expected that in some complex cases the panic screen won’t be displayed. The returned }(hj<hhhNhNubh)}(h5:c:type:`drm_scanout_buffer.map `h]jf )}(hj2=h]hdrm_scanout_buffer.map}(hj4=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj0=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_scanout_bufferuh1hhj=hMhj<ubh, must be valid if no error code is returned.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj=hMhj<ubh)}(h4Return: ``0`` on success, negative errno on failure.h](hReturn: }(hjY=hhhNhNubjf )}(h``0``h]h0}(hja=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjY=ubh' on success, negative errno on failure.}(hjY=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hj<hMhj=4ubjZ )}(hX3``panic_flush`` It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](j` )}(h``panic_flush``h]jf )}(hj=h]h panic_flush}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj=ubj| )}(hhh]h)}(hX#It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](hXIt is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the }(hj=hhhNhNubh)}(h:c:type:`dev.mode_config `h]jf )}(hj=h]hdev.mode_config}(hj=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j devuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj=ubh.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what’s safe and what is not allowed.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hj=hMhj=4ubeh}(h]h ]h"]h$]h&]uh1jT hj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubh)}(h**Description**h]j )}(hj=h]h Description}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj& hhubh)}(h/These functions are used by the atomic helpers.h]h/These functions are used by the atomic helpers.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj& hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_plane_helper_add (C function)c.drm_plane_helper_addhNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(h_void drm_plane_helper_add (struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h]j )}(h^void drm_plane_helper_add(struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hj0>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,>hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hj?>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,>hhhj>>hMubj )}(hdrm_plane_helper_addh]j )}(hdrm_plane_helper_addh]hdrm_plane_helper_add}(hjQ>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,>hhhj>>hMubj)}(hE(struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjm>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji>ubj )}(h h]h }(hjz>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji>ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]j)}jjS>sbc.drm_plane_helper_addasbuh1hhji>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji>ubj)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhji>ubj )}(hplaneh]hplane}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhje>ubj)}(h*const struct drm_plane_helper_funcs *funcsh](j )}(hjAh]hconst}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubh)}(hhh]j )}(hdrm_plane_helper_funcsh]hdrm_plane_helper_funcs}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?modnameN classnameNj j )}j ]j>c.drm_plane_helper_addasbuh1hhj>ubj )}(h h]h }(hj6?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj)}(hjOh]h*}(hjD?hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>ubj )}(hfuncsh]hfuncs}(hjQ?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhje>ubeh}(h]h ]h"]h$]h&]j j uh1jhj,>hhhj>>hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(>hhhj>>hMubah}(h]j#>ah ](j j eh"]h$]h&]j j )j huh1j{ hj>>hMhj%>hhubj )}(hhh]h)}(h"sets the helper vtable for a planeh]h"sets the helper vtable for a plane}(hj{?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjx?hhubah}(h]h ]h"]h$]h&]uh1j hj%>hhhj>>hMubeh}(h]h ](j functioneh"]h$]h&]j j j j?j j?j j j uh1jv hhhj& hju hNubj )}(h**Parameters** ``struct drm_plane *plane`` DRM plane ``const struct drm_plane_helper_funcs *funcs`` helper vtable to set for **plane**h](h)}(h**Parameters**h]j )}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj?ubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` DRM plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hj?h]hstruct drm_plane *plane}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj?ubj| )}(hhh]h)}(h DRM planeh]h DRM plane}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hMhj?ubjZ )}(hQ``const struct drm_plane_helper_funcs *funcs`` helper vtable to set for **plane**h](j` )}(h.``const struct drm_plane_helper_funcs *funcs``h]jf )}(hj?h]h*const struct drm_plane_helper_funcs *funcs}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj?ubj| )}(hhh]h)}(h"helper vtable to set for **plane**h](hhelper vtable to set for }(hj@hhhNhNubj )}(h **plane**h]hplane}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj @ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj @hMhj?ubeh}(h]h ]h"]h$]h&]uh1jT hj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_mode_config_helper_funcs (C struct)c.drm_mode_config_helper_funcshNtauh1jd hj& hhhju hNubjw )}(hhh](j| )}(hdrm_mode_config_helper_funcsh]j )}(h#struct drm_mode_config_helper_funcsh](j )}(hj h]hstruct}(hj]@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY@hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hjk@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY@hhhjj@hMubj )}(hdrm_mode_config_helper_funcsh]j )}(hjW@h]hdrm_mode_config_helper_funcs}(hj}@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjY@hhhjj@hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjU@hhhjj@hMubah}(h]jP@ah ](j j eh"]h$]h&]j j )j huh1j{ hjj@hMhjR@hhubj )}(hhh]h)}(h global modeset helper operationsh]h global modeset helper operations}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@hhubah}(h]h ]h"]h$]h&]uh1j hjR@hhhjj@hMubeh}(h]h ](j structeh"]h$]h&]j j j j@j j@j j j uh1jv hhhj& hju hNubj )}(hXP **Definition**:: struct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_commit *state); int (*atomic_commit_setup)(struct drm_atomic_commit *state); }; **Members** ``atomic_commit_tail`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers This function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware. After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes(). When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely. This hook is optional, the default implementation is drm_atomic_helper_commit_tail(). ``atomic_commit_setup`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers. This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure. Note that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this. This hook is optional.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubh:}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubj, )}(hstruct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_commit *state); int (*atomic_commit_setup)(struct drm_atomic_commit *state); };h]hstruct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_commit *state); int (*atomic_commit_setup)(struct drm_atomic_commit *state); };}hj@sbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubh)}(h **Members**h]j )}(hj@h]hMembers}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubjU )}(hhh](jZ )}(hXi``atomic_commit_tail`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers This function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware. After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes(). When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely. This hook is optional, the default implementation is drm_atomic_helper_commit_tail(). h](j` )}(h``atomic_commit_tail``h]jf )}(hj Ah]hatomic_commit_tail}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj Aubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubj| )}(hhh](h)}(hX#This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpersh]hX#This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers}(hj%AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"Aubh)}(hXThis function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware.h]hXThis function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware.}(hj4AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"Aubh)}(hX\After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes().h]hX\After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes().}(hjCAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"Aubh)}(hXwWhen disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely.h]hX}When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don’t work on disabled CRTC, hence the core can’t take care of this. And it also can’t rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely.}(hjRAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"Aubh)}(hUThis hook is optional, the default implementation is drm_atomic_helper_commit_tail().h]hUThis hook is optional, the default implementation is drm_atomic_helper_commit_tail().}(hjaAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"Aubeh}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hj!AhMhjAubjZ )}(hX``atomic_commit_setup`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers. This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure. Note that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this. This hook is optional.h](j` )}(h``atomic_commit_setup``h]jf )}(hjAh]hatomic_commit_setup}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj|Aubj| )}(hhh](h)}(hThis hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers.h]hThis hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubh)}(hX4This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure.h](hXThis function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn’t related to a CRTC, plane or connector, tracked in a }(hjAhhhNhNubh)}(h:c:type:`drm_private_obj`h]jf )}(hjAh]hdrm_private_obj}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubh structure.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhMhjAubh)}(hkNote that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this.h](hNote that the documentation of }(hjAhhhNhNubh)}(h:c:type:`drm_private_obj`h]jf )}(hjAh]hdrm_private_obj}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hjAubh3 has more details on how one should implement this.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhM hjAubh)}(hThis hook is optional.h]hThis hook is optional.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubeh}(h]h ]h"]h$]h&]uh1j{ hj|Aubeh}(h]h ]h"]h$]h&]uh1jY hjAhMhjAubeh}(h]h ]h"]h$]h&]uh1jT hj@ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj& hhhju hNubh)}(h**Description**h]j )}(hj8Bh]h Description}(hj:BhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6Bubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj& hhubh)}(h6These helper functions are used by the atomic helpers.h]h6These helper functions are used by the atomic helpers.}(hjNBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj& hhubhtarget)}(h.. _drm_atomic_helper:h]h}(h]h ]h"]h$]h&]hʌdrm-atomic-helperuh1j]BhK/hj& hhhhubeh}(h]jah ]h"]+modeset helper reference for common vtablesah$]h&]uh1hhhhhhhhK'ubh)}(hhh](h)}(h)Atomic Modeset Helper Functions Referenceh]h)Atomic Modeset Helper Functions Reference}(hjtBhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjqBhhhhhK2ubh)}(hhh](h)}(hOverviewh]hOverview}(hjBhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjBhhhhhK5ubh)}(hXXThis helper library provides implementations of check and commit functions on top of the CRTC modeset helper callbacks and the plane helper callbacks. It also provides convenience implementations for the atomic state handling callbacks for drivers which don't need to subclass the drm core structures to add their own additional internal state.h]hXZThis helper library provides implementations of check and commit functions on top of the CRTC modeset helper callbacks and the plane helper callbacks. It also provides convenience implementations for the atomic state handling callbacks for drivers which don’t need to subclass the drm core structures to add their own additional internal state.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:55: ./drivers/gpu/drm/drm_atomic_helper.chK5hjBhhubh)}(hXTThis library also provides default implementations for the check callback in drm_atomic_helper_check() and for the commit callback with drm_atomic_helper_commit(). But the individual stages and callbacks are exposed to allow drivers to mix and match and e.g. use the plane helpers only together with a driver private modeset implementation.h]hXTThis library also provides default implementations for the check callback in drm_atomic_helper_check() and for the commit callback with drm_atomic_helper_commit(). But the individual stages and callbacks are exposed to allow drivers to mix and match and e.g. use the plane helpers only together with a driver private modeset implementation.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:55: ./drivers/gpu/drm/drm_atomic_helper.chK;hjBhhubh)}(hXRThis library also provides implementations for all the legacy driver interfaces on top of the atomic interface. See drm_atomic_helper_set_config(), drm_atomic_helper_disable_plane(), and the various functions to implement set_property callbacks. New drivers must not implement these functions themselves but must use the provided helpers.h]hXRThis library also provides implementations for all the legacy driver interfaces on top of the atomic interface. See drm_atomic_helper_set_config(), drm_atomic_helper_disable_plane(), and the various functions to implement set_property callbacks. New drivers must not implement these functions themselves but must use the provided helpers.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:55: ./drivers/gpu/drm/drm_atomic_helper.chKAhjBhhubh)}(hXThe atomic helper uses the same function table structures as all other modesetting helpers. See the documentation for :c:type:`struct drm_crtc_helper_funcs `, struct :c:type:`drm_encoder_helper_funcs` and :c:type:`struct drm_connector_helper_funcs `. It also shares the :c:type:`struct drm_plane_helper_funcs ` function table with the plane helpers.h](hvThe atomic helper uses the same function table structures as all other modesetting helpers. See the documentation for }(hjBhhhNhNubh)}(h>:c:type:`struct drm_crtc_helper_funcs `h]jf )}(hjBh]hstruct drm_crtc_helper_funcs}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:55: ./drivers/gpu/drm/drm_atomic_helper.chKGhjBubh , struct }(hjBhhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]jf )}(hjBh]hdrm_encoder_helper_funcs}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjBhKGhjBubh and }(hjBhhhNhNubh)}(hH:c:type:`struct drm_connector_helper_funcs `h]jf )}(hjCh]h!struct drm_connector_helper_funcs}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhjBhKGhjBubh. It also shares the }(hjBhhhNhNubh)}(h@:c:type:`struct drm_plane_helper_funcs `h]jf )}(hj4Ch]hstruct drm_plane_helper_funcs}(hj6ChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj2Cubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhjBhKGhjBubh' function table with the plane helpers.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhKGhjBhhubeh}(h]jah ]h"]h$]overviewah&]uh1hhjqBhhhhhK5 referencedKubh)}(hhh](h)}(h'Implementing Asynchronous Atomic Commith]h'Implementing Asynchronous Atomic Commit}(hjfChhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjcChhhhhK;ubh)}(hXNonblocking atomic commits should use struct :c:type:`drm_crtc_commit` to sequence different operations against each another. Locks, especially struct :c:type:`drm_modeset_lock`, should not be held in worker threads or any other asynchronous context used to commit the hardware state.h](h-Nonblocking atomic commits should use struct }(hjtChhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jf )}(hj~Ch]hdrm_crtc_commit}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj|Cubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM hjtCubhQ to sequence different operations against each another. Locks, especially struct }(hjtChhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jf )}(hjCh]hdrm_modeset_lock}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhjChM hjtCubhk, should not be held in worker threads or any other asynchronous context used to commit the hardware state.}(hjtChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChM hjcChhubh)}(hdrm_atomic_helper_commit() implements the recommended sequence for nonblocking commits, using drm_atomic_helper_setup_commit() internally:h]hdrm_atomic_helper_commit() implements the recommended sequence for nonblocking commits, using drm_atomic_helper_setup_commit() internally:}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM hjcChhubh)}(h1. Run drm_atomic_helper_prepare_planes(). Since this can fail and we need to propagate out of memory/VRAM errors to userspace, it must be called synchronously.h]h1. Run drm_atomic_helper_prepare_planes(). Since this can fail and we need to propagate out of memory/VRAM errors to userspace, it must be called synchronously.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM hjcChhubh)}(h2. Synchronize with any outstanding nonblocking commit worker threads which might be affected by the new state update. This is handled by drm_atomic_helper_setup_commit().h]h2. Synchronize with any outstanding nonblocking commit worker threads which might be affected by the new state update. This is handled by drm_atomic_helper_setup_commit().}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM hjcChhubh)}(hXAAsynchronous workers need to have sufficient parallelism to be able to run different atomic commits on different CRTCs in parallel. The simplest way to achieve this is by running them on the :c:type:`system_dfl_wq` work queue. Note that drivers are not required to split up atomic commits and run an individual commit in parallel - userspace is supposed to do that if it cares. But it might be beneficial to do that for modesets, since those necessarily must be done as one global operation, and enabling or disabling a CRTC can take a long time. But even that is not required.h](hAsynchronous workers need to have sufficient parallelism to be able to run different atomic commits on different CRTCs in parallel. The simplest way to achieve this is by running them on the }(hjChhhNhNubh)}(h:c:type:`system_dfl_wq`h]jf )}(hjDh]h system_dfl_wq}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j system_dfl_wquh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM# hjCubhXk work queue. Note that drivers are not required to split up atomic commits and run an individual commit in parallel - userspace is supposed to do that if it cares. But it might be beneficial to do that for modesets, since those necessarily must be done as one global operation, and enabling or disabling a CRTC can take a long time. But even that is not required.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhM# hjcChhubh)}(hX,IMPORTANT: A :c:type:`drm_atomic_commit` update for multiple CRTCs is sequenced against all CRTCs therein. Therefore for atomic state updates which only flip planes the driver must not get the struct :c:type:`drm_crtc_state` of unrelated CRTCs in its atomic check code: This would prevent committing of atomic updates to multiple CRTCs in parallel. In general, adding additional state structures should be avoided as much as possible, because this reduces parallelism in (nonblocking) commits, both due to locking and due to commit sequencing requirements.h](h IMPORTANT: A }(hj(DhhhNhNubh)}(h:c:type:`drm_atomic_commit`h]jf )}(hj2Dh]hdrm_atomic_commit}(hj4DhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj0Dubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM, hj(Dubh update for multiple CRTCs is sequenced against all CRTCs therein. Therefore for atomic state updates which only flip planes the driver must not get the struct }(hj(DhhhNhNubh)}(h:c:type:`drm_crtc_state`h]jf )}(hjVDh]hdrm_crtc_state}(hjXDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjTDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjODhM, hj(DubhXL of unrelated CRTCs in its atomic check code: This would prevent committing of atomic updates to multiple CRTCs in parallel. In general, adding additional state structures should be avoided as much as possible, because this reduces parallelism in (nonblocking) commits, both due to locking and due to commit sequencing requirements.}(hj(DhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjODhM, hjcChhubh)}(hX3. The software state is updated synchronously with drm_atomic_helper_swap_state(). Doing this under the protection of all modeset locks means concurrent callers never see inconsistent state. Note that commit workers do not hold any locks; their access is only coordinated through ordering. If workers would access state only through the pointers in the free-standing state objects (currently not the case for any driver) then even multiple pending commits could be in-flight at the same time.h]hX3. The software state is updated synchronously with drm_atomic_helper_swap_state(). Doing this under the protection of all modeset locks means concurrent callers never see inconsistent state. Note that commit workers do not hold any locks; their access is only coordinated through ordering. If workers would access state only through the pointers in the free-standing state objects (currently not the case for any driver) then even multiple pending commits could be in-flight at the same time.}(hj}DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM5 hjcChhubh)}(hX4. Schedule a work item to do all subsequent steps, using the split-out commit helpers: a) pre-plane commit b) plane commit c) post-plane commit and then cleaning up the framebuffers after the old framebuffer is no longer being displayed. The scheduled work should synchronize against other workers using the :c:type:`drm_crtc_commit` infrastructure as needed. See drm_atomic_helper_setup_commit() for more details.h](hX54. Schedule a work item to do all subsequent steps, using the split-out commit helpers: a) pre-plane commit b) plane commit c) post-plane commit and then cleaning up the framebuffers after the old framebuffer is no longer being displayed. The scheduled work should synchronize against other workers using the }(hjDhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jf )}(hjDh]hdrm_crtc_commit}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM= hjDubhQ infrastructure as needed. See drm_atomic_helper_setup_commit() for more details.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhM= hjcChhubeh}(h]jah ]h"]'implementing asynchronous atomic commitah$]h&]uh1hhjqBhhhhhK;ubh)}(hhh](h)}(hHelper Functions Referenceh]hHelper Functions Reference}(hjDhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjDhhhhhKAubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_atomic_crtc_for_each_plane (C macro) c.drm_atomic_crtc_for_each_planehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hdrm_atomic_crtc_for_each_planeh]j )}(hdrm_atomic_crtc_for_each_planeh]j )}(hdrm_atomic_crtc_for_each_planeh]j )}(hjDh]hdrm_atomic_crtc_for_each_plane}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ](j j eh"]h$]h&]j j uh1j hjDhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjDhhhjEhKubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j{ hjEhKhjDhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjDhhhjEhKubeh}(h]h ](j macroeh"]h$]h&]j j j jEj jEj j j uh1jv hhhjDhNhNubh)}(h0``drm_atomic_crtc_for_each_plane (plane, crtc)``h]jf )}(hj%Eh]h,drm_atomic_crtc_for_each_plane (plane, crtc)}(hj'EhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#Eubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjDhhubh block_quote)}(h/iterate over planes currently attached to CRTC h]h)}(h.iterate over planes currently attached to CRTCh]h.iterate over planes currently attached to CRTC}(hjAEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj=Eubah}(h]h ]h"]h$]h&]uh1j;EhjOEhKhjDhhubj )}(hX**Parameters** ``plane`` the loop cursor ``crtc`` the CRTC whose planes are iterated **Description** This iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which *will* be attached (more useful in code called from :c:type:`drm_mode_config_funcs.atomic_check `) see drm_atomic_crtc_state_for_each_plane().h](h)}(h**Parameters**h]j )}(hj\Eh]h Parameters}(hj^EhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZEubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjVEubjU )}(hhh](jZ )}(h``plane`` the loop cursor h](j` )}(h ``plane``h]jf )}(hj{Eh]hplane}(hj}EhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyEubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjuEubj| )}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKhjEubah}(h]h ]h"]h$]h&]uh1j{ hjuEubeh}(h]h ]h"]h$]h&]uh1jY hjEhKhjrEubjZ )}(h,``crtc`` the CRTC whose planes are iterated h](j` )}(h``crtc``h]jf )}(hjEh]hcrtc}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjEubj| )}(hhh]h)}(h"the CRTC whose planes are iteratedh]h"the CRTC whose planes are iterated}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKhjEubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hjEhKhjrEubeh}(h]h ]h"]h$]h&]uh1jT hjVEubh)}(h**Description**h]j )}(hjEh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjVEubh)}(hXDThis iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which *will* be attached (more useful in code called from :c:type:`drm_mode_config_funcs.atomic_check `) see drm_atomic_crtc_state_for_each_plane().h](hThis iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which }(hjFhhhNhNubhemphasis)}(h*will*h]hwill}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j FhjFubh. be attached (more useful in code called from }(hjFhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jf )}(hj#Fh]h"drm_mode_config_funcs.atomic_check}(hj%FhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj!Fubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjFubh-) see drm_atomic_crtc_state_for_each_plane().}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@FhKhjVEubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_atomic_crtc_state_for_each_plane (C macro)&c.drm_atomic_crtc_state_for_each_planehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h$drm_atomic_crtc_state_for_each_planeh]j )}(h$drm_atomic_crtc_state_for_each_planeh]j )}(h$drm_atomic_crtc_state_for_each_planeh]j )}(hjeFh]h$drm_atomic_crtc_state_for_each_plane}(hjoFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkFubah}(h]h ](j j eh"]h$]h&]j j uh1j hjgFhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjcFhhhjFhKubah}(h]j^Fah ](j j eh"]h$]h&]j j )j huh1j{ hjFhKhj`Fhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj`FhhhjFhKubeh}(h]h ](j macroeh"]h$]h&]j j j jFj jFj j j uh1jv hhhjDhNhNubh)}(h<``drm_atomic_crtc_state_for_each_plane (plane, crtc_state)``h]jf )}(hjFh]h8drm_atomic_crtc_state_for_each_plane (plane, crtc_state)}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjDhhubj` operations, to validate the incoming state.h](h)}(h**Parameters**h]j )}(hjFh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjFubjU )}(hhh](jZ )}(h``plane`` the loop cursor h](j` )}(h ``plane``h]jf )}(hjFh]hplane}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjFubj| )}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj GhKhj Gubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hj GhKhjFubjZ )}(h'``crtc_state`` the incoming CRTC state h](j` )}(h``crtc_state``h]jf )}(hj.Gh]h crtc_state}(hj0GhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,Gubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj(Gubj| )}(hhh]h)}(hthe incoming CRTC stateh]hthe incoming CRTC state}(hjGGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjCGhKhjDGubah}(h]h ]h"]h$]h&]uh1j{ hj(Gubeh}(h]h ]h"]h$]h&]uh1jY hjCGhKhjFubeh}(h]h ]h"]h$]h&]uh1jT hjFubh)}(h**Description**h]j )}(hjiGh]h Description}(hjkGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgGubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjFubh)}(hXSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](hSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from }(hjGhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jf )}(hjGh]h"drm_mode_config_funcs.atomic_check}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjGubh, operations, to validate the incoming state.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhKhjFubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_atomic_crtc_state_for_each_plane_state (C macro),c.drm_atomic_crtc_state_for_each_plane_statehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h*drm_atomic_crtc_state_for_each_plane_stateh]j )}(h*drm_atomic_crtc_state_for_each_plane_stateh]j )}(h*drm_atomic_crtc_state_for_each_plane_stateh]j )}(hjGh]h*drm_atomic_crtc_state_for_each_plane_state}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhjGhKubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j{ hjGhKhjGhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjGhhhjGhKubeh}(h]h ](j macroeh"]h$]h&]j j j jHj jHj j j uh1jv hhhjDhNhNubh)}(hO``drm_atomic_crtc_state_for_each_plane_state (plane, plane_state, crtc_state)``h]jf )}(hjHh]hKdrm_atomic_crtc_state_for_each_plane_state (plane, plane_state, crtc_state)}(hj HhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjDhhubj` operations, to validate the incoming state. Compared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.h](h)}(h**Parameters**h]j )}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:Hubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj6HubjU )}(hhh](jZ )}(h``plane`` the loop cursor h](j` )}(h ``plane``h]jf )}(hj[Hh]hplane}(hj]HhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYHubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjUHubj| )}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hjtHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjpHhKhjqHubah}(h]h ]h"]h$]h&]uh1j{ hjUHubeh}(h]h ]h"]h$]h&]uh1jY hjpHhKhjRHubjZ )}(hA``plane_state`` loop cursor for the plane's state, must be const h](j` )}(h``plane_state``h]jf )}(hjHh]h plane_state}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjHubj| )}(hhh]h)}(h0loop cursor for the plane's state, must be consth]h2loop cursor for the plane’s state, must be const}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhKhjHubah}(h]h ]h"]h$]h&]uh1j{ hjHubeh}(h]h ]h"]h$]h&]uh1jY hjHhKhjRHubjZ )}(h'``crtc_state`` the incoming CRTC state h](j` )}(h``crtc_state``h]jf )}(hjHh]h crtc_state}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjHubj| )}(hhh]h)}(hthe incoming CRTC stateh]hthe incoming CRTC state}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhKhjHubah}(h]h ]h"]h$]h&]uh1j{ hjHubeh}(h]h ]h"]h$]h&]uh1jY hjHhKhjRHubeh}(h]h ]h"]h$]h&]uh1jT hj6Hubh)}(h**Description**h]j )}(hjIh]h Description}(hj IhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj6Hubh)}(hXSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](hSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from }(hjIhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jf )}(hj(Ih]h"drm_mode_config_funcs.atomic_check}(hj*IhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj&Iubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjIubh, operations, to validate the incoming state.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEIhKhj6Hubh)}(hCompared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.h]hCompared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.}(hjPIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj6Hubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_atomic_plane_enabling (C function)c.drm_atomic_plane_enablinghNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hqbool drm_atomic_plane_enabling (struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h]j )}(hpbool drm_atomic_plane_enabling(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(hboolh]hbool}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{Ihhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{IhhhjIhKubj )}(hdrm_atomic_plane_enablingh]j )}(hdrm_atomic_plane_enablingh]hdrm_atomic_plane_enabling}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ](j j eh"]h$]h&]j j uh1j hj{IhhhjIhKubj)}(hR(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(h'struct drm_plane_state *old_plane_stateh](j )}(hj h]hstruct}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j)}jjIsbc.drm_atomic_plane_enablingasbuh1hhjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj)}(hjOh]h*}(hjJhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjIubj )}(hold_plane_stateh]hold_plane_state}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubj)}(h'struct drm_plane_state *new_plane_stateh](j )}(hj h]hstruct}(hj.JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Jubj )}(h h]h }(hj;JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Jubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjLJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNJmodnameN classnameNj j )}j ]jIc.drm_atomic_plane_enablingasbuh1hhj*Jubj )}(h h]h }(hjjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Jubj)}(hjOh]h*}(hjxJhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*Jubj )}(hnew_plane_stateh]hnew_plane_state}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Jubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubeh}(h]h ]h"]h$]h&]j j uh1jhj{IhhhjIhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjwIhhhjIhKubah}(h]jrIah ](j j eh"]h$]h&]j j )j huh1j{ hjIhKhjtIhhubj )}(hhh]h)}(h&check whether a plane is being enabledh]h&check whether a plane is being enabled}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJhhubah}(h]h ]h"]h$]h&]uh1j hjtIhhhjIhKubeh}(h]h ](j functioneh"]h$]h&]j j j jJj jJj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_plane_state *old_plane_state`` old atomic plane state ``struct drm_plane_state *new_plane_state`` new atomic plane state **Description** Checks the atomic state of a plane to determine whether it's being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL). **Return** True if the plane is being enabled, false otherwise.h](h)}(h**Parameters**h]j )}(hjJh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubjU )}(hhh](jZ )}(hC``struct drm_plane_state *old_plane_state`` old atomic plane state h](j` )}(h+``struct drm_plane_state *old_plane_state``h]jf )}(hjJh]h'struct drm_plane_state *old_plane_state}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubj| )}(hhh]h)}(hold atomic plane stateh]hold atomic plane state}(hj KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhKhjKubah}(h]h ]h"]h$]h&]uh1j{ hjJubeh}(h]h ]h"]h$]h&]uh1jY hjKhKhjJubjZ )}(hC``struct drm_plane_state *new_plane_state`` new atomic plane state h](j` )}(h+``struct drm_plane_state *new_plane_state``h]jf )}(hj)Kh]h'struct drm_plane_state *new_plane_state}(hj+KhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'Kubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj#Kubj| )}(hhh]h)}(hnew atomic plane stateh]hnew atomic plane state}(hjBKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>KhKhj?Kubah}(h]h ]h"]h$]h&]uh1j{ hj#Kubeh}(h]h ]h"]h$]h&]uh1jY hj>KhKhjJubeh}(h]h ]h"]h$]h&]uh1jT hjJubh)}(h**Description**h]j )}(hjdKh]h Description}(hjfKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubh)}(hChecks the atomic state of a plane to determine whether it's being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).h]hChecks the atomic state of a plane to determine whether it’s being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).}(hjzKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubh)}(h **Return**h]j )}(hjKh]hReturn}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubh)}(h4True if the plane is being enabled, false otherwise.h]h4True if the plane is being enabled, false otherwise.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_atomic_plane_disabling (C function)c.drm_atomic_plane_disablinghNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hrbool drm_atomic_plane_disabling (struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h]j )}(hqbool drm_atomic_plane_disabling(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(hjIh]hbool}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKhhhjKhMubj )}(hdrm_atomic_plane_disablingh]j )}(hdrm_atomic_plane_disablingh]hdrm_atomic_plane_disabling}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubah}(h]h ](j j eh"]h$]h&]j j uh1j hjKhhhjKhMubj)}(hR(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(h'struct drm_plane_state *old_plane_stateh](j )}(hj h]hstruct}(hj LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj*LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'Lubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,LmodnameN classnameNj j )}j ]j)}jjKsbc.drm_atomic_plane_disablingasbuh1hhjLubj )}(h h]h }(hjJLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj)}(hjOh]h*}(hjXLhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjLubj )}(hold_plane_stateh]hold_plane_state}(hjeLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(h'struct drm_plane_state *new_plane_stateh](j )}(hj h]hstruct}(hj~LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzLubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLmodnameN classnameNj j )}j ]jFLc.drm_atomic_plane_disablingasbuh1hhjzLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzLubj)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjzLubj )}(hnew_plane_stateh]hnew_plane_state}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubeh}(h]h ]h"]h$]h&]j j uh1jhjKhhhjKhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjKhhhjKhMubah}(h]jKah ](j j eh"]h$]h&]j j )j huh1j{ hjKhMhjKhhubj )}(hhh]h)}(h'check whether a plane is being disabledh]h'check whether a plane is being disabled}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMhjLhhubah}(h]h ]h"]h$]h&]uh1j hjKhhhjKhMubeh}(h]h ](j functioneh"]h$]h&]j j j jMj jMj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_plane_state *old_plane_state`` old atomic plane state ``struct drm_plane_state *new_plane_state`` new atomic plane state **Description** Checks the atomic state of a plane to determine whether it's being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL). **Return** True if the plane is being disabled, false otherwise.h](h)}(h**Parameters**h]j )}(hj!Mh]h Parameters}(hj#MhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hjMubjU )}(hhh](jZ )}(hC``struct drm_plane_state *old_plane_state`` old atomic plane state h](j` )}(h+``struct drm_plane_state *old_plane_state``h]jf )}(hj@Mh]h'struct drm_plane_state *old_plane_state}(hjBMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>Mubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hj:Mubj| )}(hhh]h)}(hold atomic plane stateh]hold atomic plane state}(hjYMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUMhM hjVMubah}(h]h ]h"]h$]h&]uh1j{ hj:Mubeh}(h]h ]h"]h$]h&]uh1jY hjUMhM hj7MubjZ )}(hC``struct drm_plane_state *new_plane_state`` new atomic plane state h](j` )}(h+``struct drm_plane_state *new_plane_state``h]jf )}(hjyMh]h'struct drm_plane_state *new_plane_state}(hj{MhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwMubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hjsMubj| )}(hhh]h)}(hnew atomic plane stateh]hnew atomic plane state}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM hjMubah}(h]h ]h"]h$]h&]uh1j{ hjsMubeh}(h]h ]h"]h$]h&]uh1jY hjMhM hj7Mubeh}(h]h ]h"]h$]h&]uh1jT hjMubh)}(h**Description**h]j )}(hjMh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hjMubh)}(hChecks the atomic state of a plane to determine whether it's being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).h]hChecks the atomic state of a plane to determine whether it’s being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hjMubh)}(h **Return**h]j )}(hjMh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMhjMubh)}(h5True if the plane is being disabled, false otherwise.h]h5True if the plane is being disabled, false otherwise.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_atomic_helper_check_modeset (C function)!c.drm_atomic_helper_check_modesethNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h]int drm_atomic_helper_check_modeset (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h\int drm_atomic_helper_check_modeset(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj NhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM^ubj )}(h h]h }(hj/NhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhj.NhM^ubj )}(hdrm_atomic_helper_check_modeseth]j )}(hdrm_atomic_helper_check_modeseth]hdrm_atomic_helper_check_modeset}(hjANhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=Nubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhj.NhM^ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj]NhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYNubj )}(h h]h }(hjjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYNubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj{NhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}NmodnameN classnameNj j )}j ]j)}jjCNsb!c.drm_atomic_helper_check_modesetasbuh1hhjYNubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYNubj)}(hjOh]h*}(hjNhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjYNubj )}(hdevh]hdev}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUNubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNmodnameN classnameNj j )}j ]jN!c.drm_atomic_helper_check_modesetasbuh1hhjNubj )}(h h]h }(hj OhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj)}(hjOh]h*}(hjOhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjNubj )}(hstateh]hstate}(hj&OhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUNubeh}(h]h ]h"]h$]h&]j j uh1jhjNhhhj.NhM^ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjNhhhj.NhM^ubah}(h]jNah ](j j eh"]h$]h&]j j )j huh1j{ hj.NhM^hjNhhubj )}(hhh]h)}(h)validate state object for modeset changesh]h)validate state object for modeset changes}(hjPOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM^hjMOhhubah}(h]h ]h"]h$]h&]uh1j hjNhhhj.NhM^ubeh}(h]h ](j functioneh"]h$]h&]j j j jhOj jhOj j j uh1jv hhhjDhNhNubj )}(hX **Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** Check the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order: 1. :c:type:`drm_connector_helper_funcs.atomic_best_encoder ` for determining the new encoder. 2. :c:type:`drm_connector_helper_funcs.atomic_check ` to validate the connector state. 3. If it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them. 4. :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components. 5. :c:type:`drm_bridge_funcs.mode_fixup ` is called on all encoder bridges. 6. :c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead. 7. :c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints. :c:type:`drm_crtc_state.mode_changed ` is set when the input mode is changed. :c:type:`drm_crtc_state.connectors_changed ` is set when a connector is added or removed from the CRTC. :c:type:`drm_crtc_state.active_changed ` is set when :c:type:`drm_crtc_state.active ` changes, which is used for DPMS. :c:type:`drm_crtc_state.no_vblank ` is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset() IMPORTANT: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the :c:type:`drm_crtc_helper_funcs.atomic_check ` functions depend upon the adjusted dotclock for fifo space allocation and watermark computation. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j )}(hjrOh]h Parameters}(hjtOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpOubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMbhjlOubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjOh]hstruct drm_device *dev}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM_hjOubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM_hjOubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjOhM_hjOubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjOh]hstruct drm_atomic_commit *state}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM`hjOubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM`hjOubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjOhM`hjOubeh}(h]h ]h"]h$]h&]uh1jT hjlOubh)}(h**Description**h]j )}(hjPh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMbhjlOubh)}(hXCheck the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order:h]hXCheck the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order:}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMahjlOubhenumerated_list)}(hhh](h)}(hv:c:type:`drm_connector_helper_funcs.atomic_best_encoder ` for determining the new encoder.h]h)}(hj1Ph](h)}(hU:c:type:`drm_connector_helper_funcs.atomic_best_encoder `h]jf )}(hj8Ph]h.drm_connector_helper_funcs.atomic_best_encoder}(hj:PhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj6Pubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMfhj3Pubh! for determining the new encoder.}(hj3PhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUPhMfhj/Pubah}(h]h ]h"]h$]h&]uh1hhj,Pubh)}(ho:c:type:`drm_connector_helper_funcs.atomic_check ` to validate the connector state.h]h)}(hjhPh](h)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]jf )}(hjoPh]h'drm_connector_helper_funcs.atomic_check}(hjqPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjmPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMghjjPubh! to validate the connector state.}(hjjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhMghjfPubah}(h]h ]h"]h$]h&]uh1hhj,Pubh)}(hIf it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them.h]h)}(hIf it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them.h](h`If it’s determined a modeset is needed then all connectors on the affected CRTC are added and }(hjPhhhNhNubh)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]jf )}(hjPh]h'drm_connector_helper_funcs.atomic_check}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhhjPubh is run on them.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhMhhjPubah}(h]h ]h"]h$]h&]uh1hhj,Pubh)}(h:c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components.h]h)}(h:c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components.h](h)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]jf )}(hjPh]h#drm_encoder_helper_funcs.mode_valid}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMjhjPubh, }(hjPhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jf )}(hjQh]hdrm_bridge_funcs.mode_valid}(hj QhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjQhMjhjPubh and }(hjPhhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]jf )}(hj*Qh]h drm_crtc_helper_funcs.mode_valid}(hj,QhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj(Qubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhjQhMjhjPubh' are called on the affected components.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhMjhjPubah}(h]h ]h"]h$]h&]uh1hhj,Pubh)}(hZ:c:type:`drm_bridge_funcs.mode_fixup ` is called on all encoder bridges.h]h)}(hjYQh](h)}(h8:c:type:`drm_bridge_funcs.mode_fixup `h]jf )}(hj`Qh]hdrm_bridge_funcs.mode_fixup}(hjbQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj^Qubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMlhj[Qubh" is called on all encoder bridges.}(hj[QhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj}QhMlhjWQubah}(h]h ]h"]h$]h&]uh1hhj,Pubh)}(hX:c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead.h]h)}(hX:c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead.h](h)}(hJ:c:type:`drm_encoder_helper_funcs.atomic_check `h]jf )}(hjQh]h%drm_encoder_helper_funcs.atomic_check}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMmhjQubh is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, }(hjQhhhNhNubh)}(hV:c:type:`drm_atomic_encoder_helper_funcs.mode_fixup `h]jf )}(hjQh]h*drm_atomic_encoder_helper_funcs.mode_fixup}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_encoder_helper_funcsuh1hhjQhMmhjQubh is called instead.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhMmhjQubah}(h]h ]h"]h$]h&]uh1hhj,Pubh)}(h}:c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints. h]h)}(h|:c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints.h](h)}(hB:c:type:`drm_crtc_helper_funcs.mode_fixup `h]jf )}(hjQh]h drm_crtc_helper_funcs.mode_fixup}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMrhjQubh: is called last, to fix up the mode with CRTC constraints.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhMrhjQubah}(h]h ]h"]h$]h&]uh1hhj,Pubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1j*PhjlOubh)}(hX:c:type:`drm_crtc_state.mode_changed ` is set when the input mode is changed. :c:type:`drm_crtc_state.connectors_changed ` is set when a connector is added or removed from the CRTC. :c:type:`drm_crtc_state.active_changed ` is set when :c:type:`drm_crtc_state.active ` changes, which is used for DPMS. :c:type:`drm_crtc_state.no_vblank ` is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset()h](h)}(h6:c:type:`drm_crtc_state.mode_changed `h]jf )}(hj2Rh]hdrm_crtc_state.mode_changed}(hj4RhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj0Rubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMthj,Rubh( is set when the input mode is changed. }(hj,RhhhNhNubh)}(h<:c:type:`drm_crtc_state.connectors_changed `h]jf )}(hjVRh]h!drm_crtc_state.connectors_changed}(hjXRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjTRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjORhMthj,Rubh= is set when a connector is added or removed from the CRTC. }(hj,RhhhNhNubh)}(h8:c:type:`drm_crtc_state.active_changed `h]jf )}(hjyRh]hdrm_crtc_state.active_changed}(hj{RhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjwRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjORhMthj,Rubh is set when }(hj,RhhhNhNubh)}(h0:c:type:`drm_crtc_state.active `h]jf )}(hjRh]hdrm_crtc_state.active}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjORhMthj,Rubh" changes, which is used for DPMS. }(hj,RhhhNhNubh)}(h3:c:type:`drm_crtc_state.no_vblank `h]jf )}(hjRh]hdrm_crtc_state.no_vblank}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjORhMthj,RubhZ is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset()}(hj,RhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjORhMthjlOubh)}(h IMPORTANT:h]h IMPORTANT:}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM{hjlOubh)}(hXDrivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the :c:type:`drm_crtc_helper_funcs.atomic_check ` functions depend upon the adjusted dotclock for fifo space allocation and watermark computation.h](hDrivers which set }(hjRhhhNhNubh)}(h6:c:type:`drm_crtc_state.mode_changed `h]jf )}(hjRh]hdrm_crtc_state.mode_changed}(hjShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM}hjRubh (e.g. in their }(hjRhhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jf )}(hj#Sh]h#drm_plane_helper_funcs.atomic_check}(hj%ShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj!Subah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhjShM}hjRubh hooks if a plane update can’t be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the }(hjRhhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]jf )}(hjFSh]h"drm_crtc_helper_funcs.atomic_check}(hjHShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhjShM}hjRubha functions depend upon the adjusted dotclock for fifo space allocation and watermark computation.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShM}hjlOubh)}(h **Return**h]j )}(hjoSh]hReturn}(hjqShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmSubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjlOubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjlOubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 7drm_atomic_helper_check_wb_connector_state (C function),c.drm_atomic_helper_check_wb_connector_statehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hqint drm_atomic_helper_check_wb_connector_state (struct drm_connector *connector, struct drm_atomic_commit *state)h]j )}(hpint drm_atomic_helper_check_wb_connector_state(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM@ubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhjShM@ubj )}(h*drm_atomic_helper_check_wb_connector_stateh]j )}(h*drm_atomic_helper_check_wb_connector_stateh]h*drm_atomic_helper_check_wb_connector_state}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ](j j eh"]h$]h&]j j uh1j hjShhhjShM@ubj)}(hB(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Tubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]j)}jjSsb,c.drm_atomic_helper_check_wb_connector_stateasbuh1hhjSubj )}(h h]h }(hj/ThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj)}(hjOh]h*}(hj=ThhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjSubj )}(h connectorh]h connector}(hjJThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjSubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjcThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_Tubj )}(h h]h }(hjpThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_Tubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~Tubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]j+T,c.drm_atomic_helper_check_wb_connector_stateasbuh1hhj_Tubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_Tubj)}(hjOh]h*}(hjThhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_Tubj )}(hstateh]hstate}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_Tubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjSubeh}(h]h ]h"]h$]h&]j j uh1jhjShhhjShM@ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjShM@ubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j{ hjShM@hjShhubj )}(hhh]h)}(hCheck writeback connector stateh]hCheck writeback connector state}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM@hjThhubah}(h]h ]h"]h$]h&]uh1j hjShhhjShM@ubeh}(h]h ](j functioneh"]h$]h&]j j j jTj jTj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` corresponding connector ``struct drm_atomic_commit *state`` the driver state object **Description** Checks if the writeback connector state is valid, and returns an error if it isn't. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j )}(hjUh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMDhjUubjU )}(hhh](jZ )}(h<``struct drm_connector *connector`` corresponding connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj%Uh]hstruct drm_connector *connector}(hj'UhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#Uubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMAhjUubj| )}(hhh]h)}(hcorresponding connectorh]hcorresponding connector}(hj>UhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:UhMAhj;Uubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hj:UhMAhjUubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj^Uh]hstruct drm_atomic_commit *state}(hj`UhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\Uubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMBhjXUubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjwUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjsUhMBhjtUubah}(h]h ]h"]h$]h&]uh1j{ hjXUubeh}(h]h ]h"]h$]h&]uh1jY hjsUhMBhjUubeh}(h]h ]h"]h$]h&]uh1jT hjUubh)}(h**Description**h]j )}(hjUh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMDhjUubh)}(hSChecks if the writeback connector state is valid, and returns an error if it isn't.h]hUChecks if the writeback connector state is valid, and returns an error if it isn’t.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMChjUubh)}(h **Return**h]j )}(hjUh]hReturn}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMFhjUubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMGhjUubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0drm_atomic_helper_check_plane_state (C function)%c.drm_atomic_helper_check_plane_statehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hint drm_atomic_helper_check_plane_state (struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h]j )}(hint drm_atomic_helper_check_plane_state(struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h](j)}(hinth]hint}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMiubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjVhMiubj )}(h#drm_atomic_helper_check_plane_stateh]j )}(h#drm_atomic_helper_check_plane_stateh]h#drm_atomic_helper_check_plane_state}(hj&VhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"Vubah}(h]h ](j j eh"]h$]h&]j j uh1j hjVhhhjVhMiubj)}(h(struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h](j)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjBVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>Vubj )}(h h]h }(hjOVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>Vubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj`VhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]Vubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbVmodnameN classnameNj j )}j ]j)}jj(Vsb%c.drm_atomic_helper_check_plane_stateasbuh1hhj>Vubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>Vubj)}(hjOh]h*}(hjVhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>Vubj )}(h plane_stateh]h plane_state}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>Vubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:Vubj)}(h'const struct drm_crtc_state *crtc_stateh](j )}(hjAh]hconst}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjVmodnameN classnameNj j )}j ]j|V%c.drm_atomic_helper_check_plane_stateasbuh1hhjVubj )}(h h]h }(hj WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjVubj )}(h crtc_stateh]h crtc_state}(hj&WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:Vubj)}(h int min_scaleh](j)}(hinth]hint}(hj?WhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;Wubj )}(h h]h }(hjMWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;Wubj )}(h min_scaleh]h min_scale}(hj[WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;Wubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:Vubj)}(h int max_scaleh](j)}(hinth]hint}(hjtWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpWubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpWubj )}(h max_scaleh]h max_scale}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:Vubj)}(hbool can_positionh](j)}(hjIh]hbool}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(h can_positionh]h can_position}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:Vubj)}(hbool can_update_disabledh](j)}(hjIh]hbool}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(hcan_update_disabledh]hcan_update_disabled}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:Vubeh}(h]h ]h"]h$]h&]j j uh1jhjVhhhjVhMiubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjUhhhjVhMiubah}(h]jUah ](j j eh"]h$]h&]j j )j huh1j{ hjVhMihjUhhubj )}(hhh]h)}(hCheck plane state for validityh]hCheck plane state for validity}(hj"XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMihjXhhubah}(h]h ]h"]h$]h&]uh1j hjUhhhjVhMiubeh}(h]h ](j functioneh"]h$]h&]j j j j:Xj j:Xj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_plane_state *plane_state`` plane state to check ``const struct drm_crtc_state *crtc_state`` CRTC state to check ``int min_scale`` minimum **src**:**dest** scaling factor in 16.16 fixed point ``int max_scale`` maximum **src**:**dest** scaling factor in 16.16 fixed point ``bool can_position`` is it legal to position the plane such that it doesn't cover the entire CRTC? This will generally only be false for primary planes. ``bool can_update_disabled`` can the plane be updated while the CRTC is disabled? **Description** Checks that a desired plane update is valid, and updates various bits of derived state (clipped coordinates etc.). Drivers that provide their own plane handling rather than helper-provided implementations may still wish to call this function to avoid duplication of error checking code. **Return** Zero if update appears valid, error code on failureh](h)}(h**Parameters**h]j )}(hjDXh]h Parameters}(hjFXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMmhj>XubjU )}(hhh](jZ )}(h=``struct drm_plane_state *plane_state`` plane state to check h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hjcXh]h#struct drm_plane_state *plane_state}(hjeXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaXubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMjhj]Xubj| )}(hhh]h)}(hplane state to checkh]hplane state to check}(hj|XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxXhMjhjyXubah}(h]h ]h"]h$]h&]uh1j{ hj]Xubeh}(h]h ]h"]h$]h&]uh1jY hjxXhMjhjZXubjZ )}(h@``const struct drm_crtc_state *crtc_state`` CRTC state to check h](j` )}(h+``const struct drm_crtc_state *crtc_state``h]jf )}(hjXh]h'const struct drm_crtc_state *crtc_state}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMkhjXubj| )}(hhh]h)}(hCRTC state to checkh]hCRTC state to check}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMkhjXubah}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjXhMkhjZXubjZ )}(hO``int min_scale`` minimum **src**:**dest** scaling factor in 16.16 fixed point h](j` )}(h``int min_scale``h]jf )}(hjXh]h int min_scale}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMlhjXubj| )}(hhh]h)}(hXubh)}(h**Description**h]j )}(hjZh]h Description}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMthj>Xubh)}(hXChecks that a desired plane update is valid, and updates various bits of derived state (clipped coordinates etc.). Drivers that provide their own plane handling rather than helper-provided implementations may still wish to call this function to avoid duplication of error checking code.h]hXChecks that a desired plane update is valid, and updates various bits of derived state (clipped coordinates etc.). Drivers that provide their own plane handling rather than helper-provided implementations may still wish to call this function to avoid duplication of error checking code.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMshj>Xubh)}(h **Return**h]j )}(hj,Zh]hReturn}(hj.ZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*Zubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMyhj>Xubh)}(h3Zero if update appears valid, error code on failureh]h3Zero if update appears valid, error code on failure}(hjBZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMzhj>Xubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 7drm_atomic_helper_check_crtc_primary_plane (C function),c.drm_atomic_helper_check_crtc_primary_planehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hRint drm_atomic_helper_check_crtc_primary_plane (struct drm_crtc_state *crtc_state)h]j )}(hQint drm_atomic_helper_check_crtc_primary_plane(struct drm_crtc_state *crtc_state)h](j)}(hinth]hint}(hjqZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmZhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmZhhhjZhMubj )}(h*drm_atomic_helper_check_crtc_primary_planeh]j )}(h*drm_atomic_helper_check_crtc_primary_planeh]h*drm_atomic_helper_check_crtc_primary_plane}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ](j j eh"]h$]h&]j j uh1j hjmZhhhjZhMubj)}(h#(struct drm_crtc_state *crtc_state)h]j)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jjZsb,c.drm_atomic_helper_check_crtc_primary_planeasbuh1hhjZubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj)}(hjOh]h*}(hjZhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZubj )}(h crtc_stateh]h crtc_state}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubah}(h]h ]h"]h$]h&]j j uh1jhjmZhhhjZhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjiZhhhjZhMubah}(h]jdZah ](j j eh"]h$]h&]j j )j huh1j{ hjZhMhjfZhhubj )}(hhh]h)}(h"Check CRTC state for primary planeh]h"Check CRTC state for primary plane}(hj1[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj.[hhubah}(h]h ]h"]h$]h&]uh1j hjfZhhhjZhMubeh}(h]h ](j functioneh"]h$]h&]j j j jI[j jI[j j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_crtc_state *crtc_state`` CRTC state to check **Description** Checks that a CRTC has at least one primary plane attached to it, which is a requirement on some hardware. Note that this only involves the CRTC side of the test. To test if the primary plane is visible or if it can be updated without the CRTC being enabled, use drm_atomic_helper_check_plane_state() in the plane's atomic check. **Return** 0 if a primary plane is attached to the CRTC, or an error code otherwiseh](h)}(h**Parameters**h]j )}(hjS[h]h Parameters}(hjU[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQ[ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjM[ubjU )}(hhh]jZ )}(h:``struct drm_crtc_state *crtc_state`` CRTC state to check h](j` )}(h%``struct drm_crtc_state *crtc_state``h]jf )}(hjr[h]h!struct drm_crtc_state *crtc_state}(hjt[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjp[ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjl[ubj| )}(hhh]h)}(hCRTC state to checkh]hCRTC state to check}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1j{ hjl[ubeh}(h]h ]h"]h$]h&]uh1jY hj[hMhji[ubah}(h]h ]h"]h$]h&]uh1jT hjM[ubh)}(h**Description**h]j )}(hj[h]h Description}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjM[ubh)}(hXIChecks that a CRTC has at least one primary plane attached to it, which is a requirement on some hardware. Note that this only involves the CRTC side of the test. To test if the primary plane is visible or if it can be updated without the CRTC being enabled, use drm_atomic_helper_check_plane_state() in the plane's atomic check.h]hXKChecks that a CRTC has at least one primary plane attached to it, which is a requirement on some hardware. Note that this only involves the CRTC side of the test. To test if the primary plane is visible or if it can be updated without the CRTC being enabled, use drm_atomic_helper_check_plane_state() in the plane’s atomic check.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjM[ubh)}(h **Return**h]j )}(hj[h]hReturn}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjM[ubh)}(hH0 if a primary plane is attached to the CRTC, or an error code otherwiseh]hH0 if a primary plane is attached to the CRTC, or an error code otherwise}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjM[ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_atomic_helper_check_planes (C function) c.drm_atomic_helper_check_planeshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h\int drm_atomic_helper_check_planes (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h[int drm_atomic_helper_check_planes(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hj(\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhj'\hMubj )}(hdrm_atomic_helper_check_planesh]j )}(hdrm_atomic_helper_check_planesh]hdrm_atomic_helper_check_planes}(hj:\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6\ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj\hhhj'\hMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjV\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubj )}(h h]h }(hjc\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjt\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjv\modnameN classnameNj j )}j ]j)}jj<\sb c.drm_atomic_helper_check_planesasbuh1hhjR\ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubj)}(hjOh]h*}(hj\hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjR\ubj )}(hdevh]hdev}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjN\ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j\ c.drm_atomic_helper_check_planesasbuh1hhj\ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj\ubj )}(hstateh]hstate}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjN\ubeh}(h]h ]h"]h$]h&]j j uh1jhj\hhhj'\hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj\hhhj'\hMubah}(h]j \ah ](j j eh"]h$]h&]j j )j huh1j{ hj'\hMhj\hhubj )}(hhh]h)}(h(validate state object for planes changesh]h(validate state object for planes changes}(hjI]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjF]hhubah}(h]h ]h"]h$]h&]uh1j hj\hhhj'\hMubeh}(h]h ](j functioneh"]h$]h&]j j j ja]j ja]j j j uh1jv hhhjDhNhNubj )}(hXf**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** Check the state object to see if the requested state is physically possible. This does all the plane update related checks using by calling into the :c:type:`drm_crtc_helper_funcs.atomic_check ` and :c:type:`drm_plane_helper_funcs.atomic_check ` hooks provided by the driver. It also sets :c:type:`drm_crtc_state.planes_changed ` to indicate that a CRTC has updated planes. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j )}(hjk]h]h Parameters}(hjm]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hji]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhje]ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj]h]hstruct drm_device *dev}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj]ubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hj]hMhj]ubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj]h]hstruct drm_atomic_commit *state}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj]ubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hj]hMhj]ubeh}(h]h ]h"]h$]h&]uh1jT hje]ubh)}(h**Description**h]j )}(hj]h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhje]ubh)}(hXBCheck the state object to see if the requested state is physically possible. This does all the plane update related checks using by calling into the :c:type:`drm_crtc_helper_funcs.atomic_check ` and :c:type:`drm_plane_helper_funcs.atomic_check ` hooks provided by the driver.h](hCheck the state object to see if the requested state is physically possible. This does all the plane update related checks using by calling into the }(hj^hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]jf )}(hj^h]h"drm_crtc_helper_funcs.atomic_check}(hj ^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj^ubh and }(hj^hhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jf )}(hjB^h]h#drm_plane_helper_funcs.atomic_check}(hjD^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj@^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhj;^hMhj^ubh hooks provided by the driver.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;^hMhje]ubh)}(hqIt also sets :c:type:`drm_crtc_state.planes_changed ` to indicate that a CRTC has updated planes.h](h It also sets }(hji^hhhNhNubh)}(h8:c:type:`drm_crtc_state.planes_changed `h]jf )}(hjs^h]hdrm_crtc_state.planes_changed}(hju^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjq^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhji^ubh, to indicate that a CRTC has updated planes.}(hji^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMhje]ubh)}(h **Return**h]j )}(hj^h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhje]ubh)}(hZero for success or -errnoh]hZero for success or -errno}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhje]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_atomic_helper_check (C function)c.drm_atomic_helper_checkhNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hUint drm_atomic_helper_check (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hTint drm_atomic_helper_check(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM1ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^hhhj^hM1ubj )}(hdrm_atomic_helper_checkh]j )}(hdrm_atomic_helper_checkh]hdrm_atomic_helper_check}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^hhhj^hM1ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj,_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj=_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?_modnameN classnameNj j )}j ]j)}jj_sbc.drm_atomic_helper_checkasbuh1hhj_ubj )}(h h]h }(hj]_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hjk_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hdevh]hdev}(hjx_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]jY_c.drm_atomic_helper_checkasbuh1hhj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hstateh]hstate}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubeh}(h]h ]h"]h$]h&]j j uh1jhj^hhhj^hM1ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^hhhj^hM1ubah}(h]j^ah ](j j eh"]h$]h&]j j )j huh1j{ hj^hM1hj^hhubj )}(hhh]h)}(hvalidate state objecth]hvalidate state object}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM1hj`hhubah}(h]h ]h"]h$]h&]uh1j hj^hhhj^hM1ubeh}(h]h ](j functioneh"]h$]h&]j j j j*`j j*`j j j uh1jv hhhjDhNhNubj )}(hXF**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** Check the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their :c:type:`drm_mode_config_funcs.atomic_check ` callback. This just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the **drm_plane_helper_funcs.atomic_check** and **drm_crtc_helper_funcs.atomic_check** functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks. Note that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change. IMPORTANT: As this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j )}(hj4`h]h Parameters}(hj6`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2`ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM5hj.`ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjS`h]hstruct drm_device *dev}(hjU`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQ`ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM2hjM`ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjl`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjh`hM2hji`ubah}(h]h ]h"]h$]h&]uh1j{ hjM`ubeh}(h]h ]h"]h$]h&]uh1jY hjh`hM2hjJ`ubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj`h]hstruct drm_atomic_commit *state}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM3hj`ubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM3hj`ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj`hM3hjJ`ubeh}(h]h ]h"]h$]h&]uh1jT hj.`ubh)}(h**Description**h]j )}(hj`h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM5hj.`ubh)}(hXkCheck the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their :c:type:`drm_mode_config_funcs.atomic_check ` callback.h](hXCheck the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their }(hj`hhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jf )}(hj`h]h"drm_mode_config_funcs.atomic_check}(hj`hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM4hj`ubh callback.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahM4hj.`ubh)}(hXThis just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the **drm_plane_helper_funcs.atomic_check** and **drm_crtc_helper_funcs.atomic_check** functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks.h](hThis just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the }(hjahhhNhNubj )}(h'**drm_plane_helper_funcs.atomic_check**h]h#drm_plane_helper_funcs.atomic_check}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubh and }(hjahhhNhNubj )}(h&**drm_crtc_helper_funcs.atomic_check**h]h"drm_crtc_helper_funcs.atomic_check}(hj)ahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubhZ functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM:hj.`ubh)}(hXNote that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change.h]hXNote that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change.}(hjBahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMAhj.`ubh)}(h IMPORTANT:h]h IMPORTANT:}(hjQahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMFhj.`ubh)}(hXAs this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change.h](htAs this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set }(hj`ahhhNhNubh)}(h6:c:type:`drm_crtc_state.mode_changed `h]jf )}(hjjah]hdrm_crtc_state.mode_changed}(hjlahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjhaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMHhj`aubh (e.g. in their }(hj`ahhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jf )}(hjah]h#drm_plane_helper_funcs.atomic_check}(hjahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhjahMHhj`aubh hooks if a plane update can’t be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change.}(hj`ahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahMHhj.`ubh)}(h **Return**h]j )}(hjah]hReturn}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMOhj.`ubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMPhj.`ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ` can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.h](h)}(h**Parameters**h]j )}(hjih]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhhjiubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjih]hstruct drm_device *dev}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMehjiubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMehjjubah}(h]h ]h"]h$]h&]uh1j{ hjiubeh}(h]h ]h"]h$]h&]uh1jY hjjhMehjiubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj$jh]hstruct drm_atomic_commit *state}(hj&jhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"jubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMfhjjubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj=jhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9jhMfhj:jubah}(h]h ]h"]h$]h&]uh1j{ hjjubeh}(h]h ]h"]h$]h&]uh1jY hj9jhMfhjiubeh}(h]h ]h"]h$]h&]uh1jT hjiubh)}(h**Description**h]j )}(hj_jh]h Description}(hjajhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]jubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhhjiubh)}(hfThis function updates all the various legacy modeset state pointers in connectors, encoders and CRTCs.h]hfThis function updates all the various legacy modeset state pointers in connectors, encoders and CRTCs.}(hjujhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMghjiubh)}(hxDrivers can use this for building their own atomic commit if they don't have a pure helper-based modeset implementation.h]hzDrivers can use this for building their own atomic commit if they don’t have a pure helper-based modeset implementation.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMjhjiubh)}(hXrSince these updates are not synchronized with lockings, only code paths called from :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.h](hTSince these updates are not synchronized with lockings, only code paths called from }(hjjhhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]jf )}(hjjh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMmhjjubh can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjhMmhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq :drm_atomic_helper_calc_timestamping_constants (C function)/c.drm_atomic_helper_calc_timestamping_constantshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hTvoid drm_atomic_helper_calc_timestamping_constants (struct drm_atomic_commit *state)h]j )}(hSvoid drm_atomic_helper_calc_timestamping_constants(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjhhhjjhMubj )}(h-drm_atomic_helper_calc_timestamping_constantsh]j )}(h-drm_atomic_helper_calc_timestamping_constantsh]h-drm_atomic_helper_calc_timestamping_constants}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ](j j eh"]h$]h&]j j uh1j hjjhhhjjhMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj"khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj/khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj@khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=kubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBkmodnameN classnameNj j )}j ]j)}jjksb/c.drm_atomic_helper_calc_timestamping_constantsasbuh1hhjkubj )}(h h]h }(hj`khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj)}(hjOh]h*}(hjnkhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjkubj )}(hstateh]hstate}(hj{khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubah}(h]h ]h"]h$]h&]j j uh1jhjjhhhjjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjjhMubah}(h]jjah ](j j eh"]h$]h&]j j )j huh1j{ hjjhMhjjhhubj )}(hhh]h)}(h$update vblank timestamping constantsh]h$update vblank timestamping constants}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjkhhubah}(h]h ]h"]h$]h&]uh1j hjjhhhjjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jkj jkj j j uh1jv hhhjDhNhNubj )}(h**Parameters** ``struct drm_atomic_commit *state`` atomic state object **Description** Updates the timestamping constants used for precise vblank timestamps by calling drm_calc_timestamping_constants() for all enabled crtcs in **state**.h](h)}(h**Parameters**h]j )}(hjkh]h Parameters}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjkubjU )}(hhh]jZ )}(h8``struct drm_atomic_commit *state`` atomic state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjkh]hstruct drm_atomic_commit *state}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjkubj| )}(hhh]h)}(hatomic state objecth]hatomic state object}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjkubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjkhMhjkubah}(h]h ]h"]h$]h&]uh1jT hjkubh)}(h**Description**h]j )}(hj!lh]h Description}(hj#lhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjkubh)}(hUpdates the timestamping constants used for precise vblank timestamps by calling drm_calc_timestamping_constants() for all enabled crtcs in **state**.h](hUpdates the timestamping constants used for precise vblank timestamps by calling drm_calc_timestamping_constants() for all enabled crtcs in }(hj7lhhhNhNubj )}(h **state**h]hstate}(hj?lhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7lubh.}(hj7lhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_atomic_helper_commit_crtc_set_mode (C function)(c.drm_atomic_helper_commit_crtc_set_modehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hevoid drm_atomic_helper_commit_crtc_set_mode (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hdvoid drm_atomic_helper_commit_crtc_set_mode(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjxlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtlhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtlhhhjlhMubj )}(h&drm_atomic_helper_commit_crtc_set_modeh]j )}(h&drm_atomic_helper_commit_crtc_set_modeh]h&drm_atomic_helper_commit_crtc_set_mode}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ](j j eh"]h$]h&]j j uh1j hjtlhhhjlhMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjlmodnameN classnameNj j )}j ]j)}jjlsb(c.drm_atomic_helper_commit_crtc_set_modeasbuh1hhjlubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjlubj )}(hdevh]hdev}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj'mhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#mubj )}(h h]h }(hj4mhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#mubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjEmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjGmmodnameN classnameNj j )}j ]jl(c.drm_atomic_helper_commit_crtc_set_modeasbuh1hhj#mubj )}(h h]h }(hjcmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#mubj)}(hjOh]h*}(hjqmhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#mubj )}(hstateh]hstate}(hj~mhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#mubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubeh}(h]h ]h"]h$]h&]j j uh1jhjtlhhhjlhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjplhhhjlhMubah}(h]jklah ](j j eh"]h$]h&]j j )j huh1j{ hjlhMhjmlhhubj )}(hhh]h)}(hset the new modeh]hset the new mode}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjmhhubah}(h]h ]h"]h$]h&]uh1j hjmlhhhjlhMubeh}(h]h ](j functioneh"]h$]h&]j j j jmj jmj j j uh1jv hhhjDhNhNubj )}(hX=**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** Loops over all connectors in the current state and if the mode has changed, change the mode of the CRTC, then call down the bridge chain and change the mode in all bridges as well.h](h)}(h**Parameters**h]j )}(hjmh]h Parameters}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjmubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjmh]hstruct drm_device *dev}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjmubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjmubah}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hjmhMhjmubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj"nh]hstruct drm_atomic_commit *state}(hj$nhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj nubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjnubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj;nhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7nhMhj8nubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hj7nhMhjmubeh}(h]h ]h"]h$]h&]uh1jT hjmubh)}(h**Description**h]j )}(hj]nh]h Description}(hj_nhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[nubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjmubh)}(hLoops over all connectors in the current state and if the mode has changed, change the mode of the CRTC, then call down the bridge chain and change the mode in all bridges as well.h]hLoops over all connectors in the current state and if the mode has changed, change the mode of the CRTC, then call down the bridge chain and change the mode in all bridges as well.}(hjsnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjmubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6drm_atomic_helper_commit_modeset_disables (C function)+c.drm_atomic_helper_commit_modeset_disableshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hhvoid drm_atomic_helper_commit_modeset_disables (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hgvoid drm_atomic_helper_commit_modeset_disables(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjnhMubj )}(h)drm_atomic_helper_commit_modeset_disablesh]j )}(h)drm_atomic_helper_commit_modeset_disablesh]h)drm_atomic_helper_commit_modeset_disables}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjnhMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]j)}jjnsb+c.drm_atomic_helper_commit_modeset_disablesasbuh1hhjnubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj)}(hjOh]h*}(hj+ohhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjnubj )}(hdevh]hdev}(hj8ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjQohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMoubj )}(h h]h }(hj^ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMoubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjoohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjloubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqomodnameN classnameNj j )}j ]jo+c.drm_atomic_helper_commit_modeset_disablesasbuh1hhjMoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMoubj)}(hjOh]h*}(hjohhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjMoubj )}(hstateh]hstate}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnhhhjnhMubah}(h]jnah ](j j eh"]h$]h&]j j )j huh1j{ hjnhMhjnhhubj )}(hhh]h)}(h!modeset commit to disable outputsh]h!modeset commit to disable outputs}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjohhubah}(h]h ]h"]h$]h&]uh1j hjnhhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j j j joj joj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function shuts down all the outputs that need to be shut down and prepares them (if required) with the new mode. For compatibility with legacy CRTC helpers this should be called before drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h](h)}(h**Parameters**h]j )}(hjoh]h Parameters}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjoubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjph]hstruct drm_device *dev}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj pubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj,phhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(phMhj)pubah}(h]h ]h"]h$]h&]uh1j{ hj pubeh}(h]h ]h"]h$]h&]uh1jY hj(phMhj pubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjLph]hstruct drm_atomic_commit *state}(hjNphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJpubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjFpubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjephhhNhNubah}(h]h ]h"]h$]h&]uh1hhjaphMhjbpubah}(h]h ]h"]h$]h&]uh1j{ hjFpubeh}(h]h ]h"]h$]h&]uh1jY hjaphMhj pubeh}(h]h ]h"]h$]h&]uh1jT hjoubh)}(h**Description**h]j )}(hjph]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjoubh)}(huThis function shuts down all the outputs that need to be shut down and prepares them (if required) with the new mode.h]huThis function shuts down all the outputs that need to be shut down and prepares them (if required) with the new mode.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjoubh)}(hX|For compatibility with legacy CRTC helpers this should be called before drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h]hX|For compatibility with legacy CRTC helpers this should be called before drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjoubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0drm_atomic_helper_commit_writebacks (C function)%c.drm_atomic_helper_commit_writebackshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hbvoid drm_atomic_helper_commit_writebacks (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(havoid drm_atomic_helper_commit_writebacks(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM+ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjphhhjphM+ubj )}(h#drm_atomic_helper_commit_writebacksh]j )}(h#drm_atomic_helper_commit_writebacksh]h#drm_atomic_helper_commit_writebacks}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ](j j eh"]h$]h&]j j uh1j hjphhhjphM+ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hj%qhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj6qhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3qubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8qmodnameN classnameNj j )}j ]j)}jjpsb%c.drm_atomic_helper_commit_writebacksasbuh1hhjqubj )}(h h]h }(hjVqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj)}(hjOh]h*}(hjdqhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjqubj )}(hdevh]hdev}(hjqqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]jRq%c.drm_atomic_helper_commit_writebacksasbuh1hhjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjqubj )}(hstateh]hstate}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubeh}(h]h ]h"]h$]h&]j j uh1jhjphhhjphM+ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjphhhjphM+ubah}(h]jpah ](j j eh"]h$]h&]j j )j huh1j{ hjphM+hjphhubj )}(hhh]h)}(hissue writebacksh]hissue writebacks}(hj rhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM+hjrhhubah}(h]h ]h"]h$]h&]uh1j hjphhhjphM+ubeh}(h]h ](j functioneh"]h$]h&]j j j j#rj j#rj j j uh1jv hhhjDhNhNubj )}(hX.**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This loops over the connectors, checks if the new state requires a writeback job to be issued and in that case issues an atomic commit on each connector.h](h)}(h**Parameters**h]j )}(hj-rh]h Parameters}(hj/rhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+rubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM/hj'rubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjLrh]hstruct drm_device *dev}(hjNrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJrubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM,hjFrubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjerhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjarhM,hjbrubah}(h]h ]h"]h$]h&]uh1j{ hjFrubeh}(h]h ]h"]h$]h&]uh1jY hjarhM,hjCrubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjrh]hstruct drm_atomic_commit *state}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM-hjrubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhM-hjrubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjrhM-hjCrubeh}(h]h ]h"]h$]h&]uh1jT hj'rubh)}(h**Description**h]j )}(hjrh]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM/hj'rubh)}(hThis loops over the connectors, checks if the new state requires a writeback job to be issued and in that case issues an atomic commit on each connector.h]hThis loops over the connectors, checks if the new state requires a writeback job to be issued and in that case issues an atomic commit on each connector.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM.hj'rubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ?drm_atomic_helper_commit_encoder_bridge_pre_enable (C function)4c.drm_atomic_helper_commit_encoder_bridge_pre_enablehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hqvoid drm_atomic_helper_commit_encoder_bridge_pre_enable (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hpvoid drm_atomic_helper_commit_encoder_bridge_pre_enable(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMJubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjshhhjshMJubj )}(h2drm_atomic_helper_commit_encoder_bridge_pre_enableh]j )}(h2drm_atomic_helper_commit_encoder_bridge_pre_enableh]h2drm_atomic_helper_commit_encoder_bridge_pre_enable}(hj&shhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"subah}(h]h ](j j eh"]h$]h&]j j uh1j hjshhhjshMJubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjBshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>subj )}(h h]h }(hjOshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>subh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj`shhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]subah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbsmodnameN classnameNj j )}j ]j)}jj(ssb4c.drm_atomic_helper_commit_encoder_bridge_pre_enableasbuh1hhj>subj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>subj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>subj )}(hdevh]hdev}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>subeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:subj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]j|s4c.drm_atomic_helper_commit_encoder_bridge_pre_enableasbuh1hhjsubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjsubj )}(hstateh]hstate}(hj thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:subeh}(h]h ]h"]h$]h&]j j uh1jhjshhhjshMJubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjshMJubah}(h]jrah ](j j eh"]h$]h&]j j )j huh1j{ hjshMJhjrhhubj )}(hhh]h)}(hpre-enable bridgesh]hpre-enable bridges}(hj5thhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMJhj2thhubah}(h]h ]h"]h$]h&]uh1j hjrhhhjshMJubeh}(h]h ](j functioneh"]h$]h&]j j j jMtj jMtj j j uh1jv hhhjDhNhNubj )}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.h](h)}(h**Parameters**h]j )}(hjWth]h Parameters}(hjYthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUtubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMNhjQtubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjvth]hstruct drm_device *dev}(hjxthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjttubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMKhjptubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMKhjtubah}(h]h ]h"]h$]h&]uh1j{ hjptubeh}(h]h ]h"]h$]h&]uh1jY hjthMKhjmtubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjth]hstruct drm_atomic_commit *state}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMLhjtubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMLhjtubah}(h]h ]h"]h$]h&]uh1j{ hjtubeh}(h]h ]h"]h$]h&]uh1jY hjthMLhjmtubeh}(h]h ]h"]h$]h&]uh1jT hjQtubh)}(h**Description**h]j )}(hjth]h Description}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMNhjQtubh)}(h]This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.h]h]This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMMhjQtubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_atomic_helper_commit_crtc_enable (C function)&c.drm_atomic_helper_commit_crtc_enablehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hcvoid drm_atomic_helper_commit_crtc_enable (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hbvoid drm_atomic_helper_commit_crtc_enable(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj/uhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+uhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMtubj )}(h h]h }(hj>uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+uhhhj=uhMtubj )}(h$drm_atomic_helper_commit_crtc_enableh]j )}(h$drm_atomic_helper_commit_crtc_enableh]h$drm_atomic_helper_commit_crtc_enable}(hjPuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLuubah}(h]h ](j j eh"]h$]h&]j j uh1j hj+uhhhj=uhMtubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjluhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhuubj )}(h h]h }(hjyuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhuubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]j)}jjRusb&c.drm_atomic_helper_commit_crtc_enableasbuh1hhjhuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhuubj)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhuubj )}(hdevh]hdev}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjduubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]ju&c.drm_atomic_helper_commit_crtc_enableasbuh1hhjuubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hjOh]h*}(hj(vhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjuubj )}(hstateh]hstate}(hj5vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjduubeh}(h]h ]h"]h$]h&]j j uh1jhj+uhhhj=uhMtubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj'uhhhj=uhMtubah}(h]j"uah ](j j eh"]h$]h&]j j )j huh1j{ hj=uhMthj$uhhubj )}(hhh]h)}(henables the CRTCsh]henables the CRTCs}(hj_vhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMthj\vhhubah}(h]h ]h"]h$]h&]uh1j hj$uhhhj=uhMtubeh}(h]h ](j functioneh"]h$]h&]j j j jwvj jwvj j j uh1jv hhhjDhNhNubj )}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This loops over CRTCs in the new state, and of the CRTC needs it, enables it.h](h)}(h**Parameters**h]j )}(hjvh]h Parameters}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMxhj{vubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjvh]hstruct drm_device *dev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMuhjvubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMuhjvubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjvhMuhjvubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjvh]hstruct drm_atomic_commit *state}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMvhjvubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMvhjvubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjvhMvhjvubeh}(h]h ]h"]h$]h&]uh1jT hj{vubh)}(h**Description**h]j )}(hjwh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMxhj{vubh)}(hMThis loops over CRTCs in the new state, and of the CRTC needs it, enables it.h]hMThis loops over CRTCs in the new state, and of the CRTC needs it, enables it.}(hj*whhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMwhj{vubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ;drm_atomic_helper_commit_encoder_bridge_enable (C function)0c.drm_atomic_helper_commit_encoder_bridge_enablehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hmvoid drm_atomic_helper_commit_encoder_bridge_enable (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hlvoid drm_atomic_helper_commit_encoder_bridge_enable(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjYwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUwhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUwhhhjgwhMubj )}(h.drm_atomic_helper_commit_encoder_bridge_enableh]j )}(h.drm_atomic_helper_commit_encoder_bridge_enableh]h.drm_atomic_helper_commit_encoder_bridge_enable}(hjzwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvwubah}(h]h ](j j eh"]h$]h&]j j uh1j hjUwhhhjgwhMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j)}jj|wsb0c.drm_atomic_helper_commit_encoder_bridge_enableasbuh1hhjwubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hjOh]h*}(hjwhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjwubj )}(hdevh]hdev}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj&xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#xubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(xmodnameN classnameNj j )}j ]jw0c.drm_atomic_helper_commit_encoder_bridge_enableasbuh1hhjxubj )}(h h]h }(hjDxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj)}(hjOh]h*}(hjRxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjxubj )}(hstateh]hstate}(hj_xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubeh}(h]h ]h"]h$]h&]j j uh1jhjUwhhhjgwhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjQwhhhjgwhMubah}(h]jLwah ](j j eh"]h$]h&]j j )j huh1j{ hjgwhMhjNwhhubj )}(hhh]h)}(henables the bridgesh]henables the bridges}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjxhhubah}(h]h ]h"]h$]h&]uh1j hjNwhhhjgwhMubeh}(h]h ](j functioneh"]h$]h&]j j j jxj jxj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This loops over all connectors in the new state, and of the CRTC needs it, enables the entire bridge chain.h](h)}(h**Parameters**h]j )}(hjxh]h Parameters}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjxubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjxh]hstruct drm_device *dev}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjxubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjxubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjxubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjxhMhjxubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjyh]hstruct drm_atomic_commit *state}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjxubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMhjyubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjyhMhjxubeh}(h]h ]h"]h$]h&]uh1jT hjxubh)}(h**Description**h]j )}(hj>yh]h Description}(hj@yhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj` hook, for drivers that do not support runtime_pm or do not need the CRTC to be enabled to perform a commit. Otherwise, see drm_atomic_helper_commit_tail_rpm(). Note that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjU )}(hhh]jZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj-h]hstruct drm_atomic_commit *state}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj'ubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjCubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hjBhMhj$ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjhh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX#This is the default implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that do not support runtime_pm or do not need the CRTC to be enabled to perform a commit. Otherwise, see drm_atomic_helper_commit_tail_rpm().h](h+This is the default implementation for the }(hj~hhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]jf )}(hjh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj~ubh hook, for drivers that do not support runtime_pm or do not need the CRTC to be enabled to perform a commit. Otherwise, see drm_atomic_helper_commit_tail_rpm().}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hzNote that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.h]hzNote that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_atomic_helper_commit_tail_rpm (C function)#c.drm_atomic_helper_commit_tail_rpmhNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hHvoid drm_atomic_helper_commit_tail_rpm (struct drm_atomic_commit *state)h]j )}(hGvoid drm_atomic_helper_commit_tail_rpm(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj߄hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjۄhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۄhhhjhMubj )}(h!drm_atomic_helper_commit_tail_rpmh]j )}(h!drm_atomic_helper_commit_tail_rpmh]h!drm_atomic_helper_commit_tail_rpm}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjۄhhhjhMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j)}jjsb#c.drm_atomic_helper_commit_tail_rpmasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjۄhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjׄhhhjhMubah}(h]j҄ah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjԄhhubj )}(hhh]h)}(h commit atomic update to hardwareh]h commit atomic update to hardware}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjԄhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` new modeset state to be committed **Description** This is an alternative implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjÅhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjU )}(hhh]jZ )}(hF``struct drm_atomic_commit *state`` new modeset state to be committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjޅubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjڅubj| )}(hhh]h)}(h!new modeset state to be committedh]h!new modeset state to be committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjڅubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjׅubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX:This is an alternative implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().h](h.This is an alternative implementation for the }(hj1hhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]jf )}(hj;h]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hj=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj1ubh hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_atomic_helper_async_check (C function)c.drm_atomic_helper_async_checkhNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h[int drm_atomic_helper_async_check (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hZint drm_atomic_helper_async_check(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM0ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM0ubj )}(hdrm_atomic_helper_async_checkh]j )}(hdrm_atomic_helper_async_checkh]hdrm_atomic_helper_async_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM0ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj͆hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjކhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۆubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_helper_async_checkasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRmodnameN classnameNj j )}j ]jc.drm_atomic_helper_async_checkasbuh1hhj.ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM0ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{hhhjhM0ubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j{ hjhM0hjxhhubj )}(hhh]h)}(h.check if state can be committed asynchronouslyh]h.check if state can be committed asynchronously}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM0hjhhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjhM0ubeh}(h]h ](j functioneh"]h$]h&]j j j jˇj jˇj j j uh1jv hhhjDhNhNubj )}(hX5**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** This helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state. It will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can't be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.h](h)}(h**Parameters**h]j )}(hjՇh]h Parameters}(hjׇhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjӇubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM4hjχubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM1hjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM1hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM1hjubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj-h]hstruct drm_atomic_commit *state}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM2hj'ubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhM2hjCubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hjBhM2hjubeh}(h]h ]h"]h$]h&]uh1jT hjχubh)}(h**Description**h]j )}(hjhh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM4hjχubh)}(hThis helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state.h]hThis helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM3hjχubh)}(hIt will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can't be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.h]hIt will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can’t be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM7hjχubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_atomic_helper_async_commit (C function) c.drm_atomic_helper_async_commithNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h]void drm_atomic_helper_async_commit (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h\void drm_atomic_helper_async_commit(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjˈhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjʈhMubj )}(hdrm_atomic_helper_async_commith]j )}(hdrm_atomic_helper_async_commith]hdrm_atomic_helper_async_commit}(hj݈hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjوubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjʈhMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj߈sb c.drm_atomic_helper_async_commitasbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j3 c.drm_atomic_helper_async_commitasbuh1hhjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjgubj )}(hstateh]hstate}(hj‰hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjʈhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjʈhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjʈhMhjhhubj )}(hhh]h)}(hcommit state asynchronouslyh]hcommit state asynchronously}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjʈhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** This function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state. TODO: Implement full swap instead of doing in-place changes.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj-h]hstruct drm_device *dev}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj'ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjCubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hjBhMhj$ubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjfh]hstruct drm_atomic_commit *state}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj`ubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj|ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj{hMhj$ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hXThis function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state.h]hXThis function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h` callback, or its default implementation drm_atomic_helper_commit_tail(). **Return** Zero for success or -errno.h](h)}(h**Parameters**h]j )}(hj{h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjuubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h<``struct drm_atomic_commit *state`` the driver state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjӌh]hstruct drm_atomic_commit *state}(hjՌhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjьubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj͌ubj| )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj͌ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h=``bool nonblock`` whether nonblocking behavior is requested. h](j` )}(h``bool nonblock``h]jf )}(hj h]h bool nonblock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h*whether nonblocking behavior is requested.h]h*whether nonblocking behavior is requested.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj!hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjuubh)}(h**Description**h]j )}(hjGh]h Description}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjuubh)}(hThis function commits a with drm_atomic_helper_check() pre-validated state object. This can still fail when e.g. the framebuffer reservation fails. This function implements nonblocking commits, using drm_atomic_helper_setup_commit() and related functions.h]hThis function commits a with drm_atomic_helper_check() pre-validated state object. This can still fail when e.g. the framebuffer reservation fails. This function implements nonblocking commits, using drm_atomic_helper_setup_commit() and related functions.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjuubh)}(hCommitting the actual hardware state is done through the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` callback, or its default implementation drm_atomic_helper_commit_tail().h](h9Committing the actual hardware state is done through the }(hjlhhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]jf )}(hjvh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjxhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjlubhI callback, or its default implementation drm_atomic_helper_commit_tail().}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjuubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjuubh)}(hZero for success or -errno.h]hZero for success or -errno.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjuubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_atomic_helper_setup_commit (C function) c.drm_atomic_helper_setup_commithNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hSint drm_atomic_helper_setup_commit (struct drm_atomic_commit *state, bool nonblock)h]j )}(hRint drm_atomic_helper_setup_commit(struct drm_atomic_commit *state, bool nonblock)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_atomic_helper_setup_commith]j )}(hdrm_atomic_helper_setup_commith]hdrm_atomic_helper_setup_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h0(struct drm_atomic_commit *state, bool nonblock)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]j)}jjsb c.drm_atomic_helper_setup_commitasbuh1hhjubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjnhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool nonblockh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hnonblockh]hnonblock}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjݍhhhjhM ubah}(h]j؍ah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjڍhhubj )}(hhh]h)}(h!setup possibly nonblocking commith]h!setup possibly nonblocking commit}(hjَhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj֎hhubah}(h]h ]h"]h$]h&]uh1j hjڍhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` new modeset state to be committed ``bool nonblock`` whether nonblocking behavior is requested. **Description** This function prepares **state** to be used by the atomic helper's support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their :c:type:`drm_mode_config_funcs.atomic_commit ` hook. Drivers that need to extend the commit setup to private objects can use the :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook. To be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver's commit hooks look at the :c:type:`drm_crtc.state `, :c:type:`drm_plane.state ` or :c:type:`drm_connector.state ` pointer directly. Completion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Only the free standing **state** with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes(). At the very end, before cleaning up **state** drivers must call drm_atomic_helper_commit_cleanup_done(). This is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook. The tracking of asynchronously executed and still pending commits is done using the core structure :c:type:`drm_crtc_commit`. By default there's no need to clean up resources allocated by this function explicitly: drm_atomic_commit_default_clear() will take care of that automatically. **Return** 0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjU )}(hhh](jZ )}(hF``struct drm_atomic_commit *state`` new modeset state to be committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj| )}(hhh]h)}(h!new modeset state to be committedh]h!new modeset state to be committed}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM hj0ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj/hM hjubjZ )}(h=``bool nonblock`` whether nonblocking behavior is requested. h](j` )}(h``bool nonblock``h]jf )}(hjSh]h bool nonblock}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjMubj| )}(hhh]h)}(h*whether nonblocking behavior is requested.h]h*whether nonblocking behavior is requested.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhM hjiubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjhhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXThis function prepares **state** to be used by the atomic helper's support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their :c:type:`drm_mode_config_funcs.atomic_commit ` hook.h](hThis function prepares }(hjhhhNhNubj )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh to be used by the atomic helper’s support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their }(hjhhhNhNubh)}(hE:c:type:`drm_mode_config_funcs.atomic_commit `h]jf )}(hjh]h#drm_mode_config_funcs.atomic_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjݏhM hjubh)}(hDrivers that need to extend the commit setup to private objects can use the :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook.h](hLDrivers that need to extend the commit setup to private objects can use the }(hjhhhNhNubh)}(hY:c:type:`drm_mode_config_helper_funcs.atomic_commit_setup `h]jf )}(hjh]h0drm_mode_config_helper_funcs.atomic_commit_setup}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hXTo be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver's commit hooks look at the :c:type:`drm_crtc.state `, :c:type:`drm_plane.state ` or :c:type:`drm_connector.state ` pointer directly.h](hXrTo be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver’s commit hooks look at the }(hjhhhNhNubh)}(h#:c:type:`drm_crtc.state `h]jf )}(hj$h]hdrm_crtc.state}(hj&hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtcuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh, }(hjhhhNhNubh)}(h%:c:type:`drm_plane.state `h]jf )}(hjHh]hdrm_plane.state}(hjJhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_planeuh1hhjAhM hjubh or }(hjhhhNhNubh)}(h-:c:type:`drm_connector.state `h]jf )}(hjkh]hdrm_connector.state}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjiubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjAhM hjubh pointer directly.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhM hjubh)}(hXCompletion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Only the free standing **state** with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes().h](hX Completion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jf )}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh locks. Only the free standing }(hjhhhNhNubj )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hhAt the very end, before cleaning up **state** drivers must call drm_atomic_helper_commit_cleanup_done().h](h$At the very end, before cleaning up }(hj֐hhhNhNubj )}(h **state**h]hstate}(hjސhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj֐ubh; drivers must call drm_atomic_helper_commit_cleanup_done().}(hj֐hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook.h]hThis is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h}The tracking of asynchronously executed and still pending commits is done using the core structure :c:type:`drm_crtc_commit`.h](hcThe tracking of asynchronously executed and still pending commits is done using the core structure }(hjhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jf )}(hjh]hdrm_crtc_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hM hjubh)}(hBy default there's no need to clean up resources allocated by this function explicitly: drm_atomic_commit_default_clear() will take care of that automatically.h]hBy default there’s no need to clean up resources allocated by this function explicitly: drm_atomic_commit_default_clear() will take care of that automatically.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h **Return**h]j )}(hjIh]hReturn}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.h]h0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_atomic_helper_wait_for_dependencies (C function))c.drm_atomic_helper_wait_for_dependencieshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hNvoid drm_atomic_helper_wait_for_dependencies (struct drm_atomic_commit *state)h]j )}(hMvoid drm_atomic_helper_wait_for_dependencies(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMA ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMA ubj )}(h'drm_atomic_helper_wait_for_dependenciesh]j )}(h'drm_atomic_helper_wait_for_dependenciesh]h'drm_atomic_helper_wait_for_dependencies}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMA ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjˑhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǑubj )}(h h]h }(hjؑhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǑubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb)c.drm_atomic_helper_wait_for_dependenciesasbuh1hhjǑubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǑubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjǑubj )}(hstateh]hstate}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǑubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjÑubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMA ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMA ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMA hjhhubj )}(hhh]h)}(h#wait for required preceding commitsh]h#wait for required preceding commits}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMA hjKhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMA ubeh}(h]h ](j functioneh"]h$]h&]j j j jfj jfj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function waits for all preceding commits that touch the same CRTC as **state** to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the :c:type:`drm_crtc_state.event `). This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j )}(hjph]h Parameters}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chME hjjubjU )}(hhh]jZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMB hjubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMB hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMB hjubah}(h]h ]h"]h$]h&]uh1jT hjjubh)}(h**Description**h]j )}(hjʒh]h Description}(hj̒hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjȒubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMD hjjubh)}(hX9This function waits for all preceding commits that touch the same CRTC as **state** to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the :c:type:`drm_crtc_state.event `).h](hJThis function waits for all preceding commits that touch the same CRTC as }(hjhhhNhNubj )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_state.event `h]jf )}(hjh]hdrm_crtc_state.event}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMC hjubh).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMC hjjubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMH hjjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_atomic_helper_fake_vblank (C function)c.drm_atomic_helper_fake_vblankhNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hDvoid drm_atomic_helper_fake_vblank (struct drm_atomic_commit *state)h]j )}(hCvoid drm_atomic_helper_fake_vblank(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMr ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOhhhjahMr ubj )}(hdrm_atomic_helper_fake_vblankh]j )}(hdrm_atomic_helper_fake_vblankh]hdrm_atomic_helper_fake_vblank}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ](j j eh"]h$]h&]j j uh1j hjOhhhjahMr ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjvsbc.drm_atomic_helper_fake_vblankasbuh1hhjubj )}(h h]h }(hjΓhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjܓhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjOhhhjahMr ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjKhhhjahMr ubah}(h]jFah ](j j eh"]h$]h&]j j )j huh1j{ hjahMr hjHhhubj )}(hhh]h)}(hfake VBLANK events if neededh]hfake VBLANK events if needed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMr hjhhubah}(h]h ]h"]h$]h&]uh1j hjHhhhjahMr ubeh}(h]h ](j functioneh"]h$]h&]j j j j+j j+j j j uh1jv hhhjDhNhNubj )}(hX|**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function walks all CRTCs and fakes VBLANK events on those with :c:type:`drm_crtc_state.no_vblank ` set to true and :c:type:`drm_crtc_state.event ` != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt. This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j )}(hj5h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMv hj/ubjU )}(hhh]jZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjTh]hstruct drm_atomic_commit *state}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMs hjNubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMs hjjubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjihMs hjKubah}(h]h ]h"]h$]h&]uh1jT hj/ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMu hj/ubh)}(hXThis function walks all CRTCs and fakes VBLANK events on those with :c:type:`drm_crtc_state.no_vblank ` set to true and :c:type:`drm_crtc_state.event ` != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt.h](hDThis function walks all CRTCs and fakes VBLANK events on those with }(hjhhhNhNubh)}(h3:c:type:`drm_crtc_state.no_vblank `h]jf )}(hjh]hdrm_crtc_state.no_vblank}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMt hjubh set to true and }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_state.event `h]jf )}(hjӔh]hdrm_crtc_state.event}(hjՔhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjєubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhj̔hMt hjubhX != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj̔hMt hj/ubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_atomic_helper_commit_hw_done (C function)"c.drm_atomic_helper_commit_hw_donehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hGvoid drm_atomic_helper_commit_hw_done (struct drm_atomic_commit *state)h]j )}(hFvoid drm_atomic_helper_commit_hw_done(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%hhhj7hM ubj )}(h drm_atomic_helper_commit_hw_doneh]j )}(h drm_atomic_helper_commit_hw_doneh]h drm_atomic_helper_commit_hw_done}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ](j j eh"]h$]h&]j j uh1j hj%hhhj7hM ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjLsb"c.drm_atomic_helper_commit_hw_doneasbuh1hhjbubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjbubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj^ubah}(h]h ]h"]h$]h&]j j uh1jhj%hhhj7hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj!hhhj7hM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj7hM hjhhubj )}(hhh]h)}(h!setup possible nonblocking commith]h!setup possible nonblocking commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj7hM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX\**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Drivers should try to postpone any expensive or delayed cleanup work after this function is called. This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjU )}(hhh]jZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj*h]hstruct drm_atomic_commit *state}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj$ubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hM hj@ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj?hM hj!ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjeh]h Description}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXThis function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks.h](hThis function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than }(hj{hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jf )}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj{ubh locks.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hcDrivers should try to postpone any expensive or delayed cleanup work after this function is called.h]hcDrivers should try to postpone any expensive or delayed cleanup work after this function is called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_atomic_helper_commit_cleanup_done (C function)'c.drm_atomic_helper_commit_cleanup_donehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hLvoid drm_atomic_helper_commit_cleanup_done (struct drm_atomic_commit *state)h]j )}(hKvoid drm_atomic_helper_commit_cleanup_done(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h%drm_atomic_helper_commit_cleanup_doneh]j )}(h%drm_atomic_helper_commit_cleanup_doneh]h%drm_atomic_helper_commit_cleanup_done}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j)}jjsb'c.drm_atomic_helper_commit_cleanup_doneasbuh1hhj$ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(hjOh]h*}(hjthhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jޖah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(hsignal completion of commith]hsignal completion of commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j×j j×j j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This signals completion of the atomic update **state**, including any cleanup work. If used, it must be called right before calling drm_atomic_commit_put(). This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j )}(hj͗h]h Parameters}(hjϗhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj˗ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjǗubjU )}(hhh]jZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubah}(h]h ]h"]h$]h&]uh1jT hjǗubh)}(h**Description**h]j )}(hj'h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjǗubh)}(hThis signals completion of the atomic update **state**, including any cleanup work. If used, it must be called right before calling drm_atomic_commit_put().h](h-This signals completion of the atomic update }(hj=hhhNhNubj )}(h **state**h]hstate}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubhf, including any cleanup work. If used, it must be called right before calling drm_atomic_commit_put().}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjǗubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjǗubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_atomic_helper_prepare_planes (C function)"c.drm_atomic_helper_prepare_planeshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h^int drm_atomic_helper_prepare_planes (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h]int drm_atomic_helper_prepare_planes(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h drm_atomic_helper_prepare_planesh]j )}(h drm_atomic_helper_prepare_planesh]h drm_atomic_helper_prepare_planes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjʘhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjƘubj )}(h h]h }(hjטhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjƘubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb"c.drm_atomic_helper_prepare_planesasbuh1hhjƘubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjƘubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjƘubj )}(hdevh]hdev}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjƘubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj˜ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j"c.drm_atomic_helper_prepare_planesasbuh1hhj8ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj8ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj˜ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h%prepare plane resources before commith]h%prepare plane resources before commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jՙj jՙj j j uh1jv hhhjDhNhNubj )}(hX1**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object with new state structures **Description** This function prepares plane state, specifically framebuffers, for the new configuration, by calling :c:type:`drm_plane_helper_funcs.prepare_fb `. If any failure is encountered this function will call :c:type:`drm_plane_helper_funcs.cleanup_fb ` on any already successfully prepared framebuffer. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjߙh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjݙubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjٙubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(hR``struct drm_atomic_commit *state`` atomic state object with new state structures h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj7h]hstruct drm_atomic_commit *state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj1ubj| )}(hhh]h)}(h-atomic state object with new state structuresh]h-atomic state object with new state structures}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhM hjMubah}(h]h ]h"]h$]h&]uh1j{ hj1ubeh}(h]h ]h"]h$]h&]uh1jY hjLhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjٙubh)}(h**Description**h]j )}(hjrh]h Description}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjٙubh)}(hXWThis function prepares plane state, specifically framebuffers, for the new configuration, by calling :c:type:`drm_plane_helper_funcs.prepare_fb `. If any failure is encountered this function will call :c:type:`drm_plane_helper_funcs.cleanup_fb ` on any already successfully prepared framebuffer.h](heThis function prepares plane state, specifically framebuffers, for the new configuration, by calling }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jf )}(hjh]h!drm_plane_helper_funcs.prepare_fb}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh8. If any failure is encountered this function will call }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]jf )}(hjh]h!drm_plane_helper_funcs.cleanup_fb}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhjhM hjubh2 on any already successfully prepared framebuffer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjٙubh)}(h **Return**h]j )}(hjߚh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjݚubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjٙubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjٙubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_atomic_helper_unprepare_planes (C function)$c.drm_atomic_helper_unprepare_planeshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(havoid drm_atomic_helper_unprepare_planes (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h`void drm_atomic_helper_unprepare_planes(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMN ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj2hMN ubj )}(h"drm_atomic_helper_unprepare_planesh]j )}(h"drm_atomic_helper_unprepare_planesh]h"drm_atomic_helper_unprepare_planes}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj2hMN ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjGsb$c.drm_atomic_helper_unprepare_planesasbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj]ubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjӛhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjϛubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjϛubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j$c.drm_atomic_helper_unprepare_planesasbuh1hhjϛubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjϛubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjϛubj )}(hstateh]hstate}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjϛubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj2hMN ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj2hMN ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj2hMN hjhhubj )}(hhh]h)}(h!release plane resources on abortsh]h!release plane resources on aborts}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMN hjQhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj2hMN ubeh}(h]h ](j functioneh"]h$]h&]j j j jlj jlj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object with old state structures **Description** This function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().h](h)}(h**Parameters**h]j )}(hjvh]h Parameters}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMR hjpubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMO hjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMO hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMO hjubjZ )}(hR``struct drm_atomic_commit *state`` atomic state object with old state structures h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjΜh]hstruct drm_atomic_commit *state}(hjМhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj̜ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMP hjȜubj| )}(hhh]h)}(h-atomic state object with old state structuresh]h-atomic state object with old state structures}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMP hjubah}(h]h ]h"]h$]h&]uh1j{ hjȜubeh}(h]h ]h"]h$]h&]uh1jY hjhMP hjubeh}(h]h ]h"]h$]h&]uh1jT hjpubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMR hjpubh)}(hXThis function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().h]hXThis function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMQ hjpubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_atomic_helper_commit_planes (C function)!c.drm_atomic_helper_commit_planeshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hnvoid drm_atomic_helper_commit_planes (struct drm_device *dev, struct drm_atomic_commit *state, uint32_t flags)h]j )}(hmvoid drm_atomic_helper_commit_planes(struct drm_device *dev, struct drm_atomic_commit *state, uint32_t flags)h](j)}(hvoidh]hvoid}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMt ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJhhhj\hMt ubj )}(hdrm_atomic_helper_commit_planesh]j )}(hdrm_atomic_helper_commit_planesh]hdrm_atomic_helper_commit_planes}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ](j j eh"]h$]h&]j j uh1j hjJhhhj\hMt ubj)}(hI(struct drm_device *dev, struct drm_atomic_commit *state, uint32_t flags)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjqsb!c.drm_atomic_helper_commit_planesasbuh1hhjubj )}(h h]h }(hjɝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjםhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jŝ!c.drm_atomic_helper_commit_planesasbuh1hhjubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjGhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t flagsh](h)}(hhh]j )}(huint32_th]huint32_t}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]jŝ!c.drm_atomic_helper_commit_planesasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjJhhhj\hMt ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjFhhhj\hMt ubah}(h]jAah ](j j eh"]h$]h&]j j )j huh1j{ hj\hMt hjChhubj )}(hhh]h)}(hcommit plane stateh]hcommit plane state}(hjƞhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMt hjÞhhubah}(h]h ]h"]h$]h&]uh1j hjChhhj\hMt ubeh}(h]h ](j functioneh"]h$]h&]j j j jޞj jޞj j j uh1jv hhhjDhNhNubj )}(hX"**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed ``uint32_t flags`` flags for committing plane state **Description** This function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail. It still requires the global state object **state** to know which planes and crtcs need to be updated though. Note that this function does all plane updates across all CRTCs in one step. If the hardware can't support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead. Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don't need to be immediately notified of plane updates for a disabled CRTC. Unless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in **flags** in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can't or just don't need to deal with updates on disabled CRTCs, for example when supporting runtime PM. Drivers may set the NO_DISABLE_AFTER_MODESET flag in **flags** if the relevant display controllers require to disable a CRTC's planes when the CRTC is disabled. This function would skip the :c:type:`drm_plane_helper_funcs.atomic_disable ` call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that. The drm_atomic_helper_commit() default implementation doesn't set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMx hjubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMu hjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMu hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMu hjubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj@h]hstruct drm_atomic_commit *state}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMv hj:ubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMv hjVubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hjUhMv hjubjZ )}(h4``uint32_t flags`` flags for committing plane state h](j` )}(h``uint32_t flags``h]jf )}(hjyh]huint32_t flags}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMw hjsubj| )}(hhh]h)}(h flags for committing plane stateh]h flags for committing plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMw hjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhMw hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMy hjubh)}(hThis function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.h]hThis function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.}(hjʟhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMx hjubh)}(hmIt still requires the global state object **state** to know which planes and crtcs need to be updated though.h](h*It still requires the global state object }(hjٟhhhNhNubj )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjٟubh: to know which planes and crtcs need to be updated though.}(hjٟhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM} hjubh)}(hNote that this function does all plane updates across all CRTCs in one step. If the hardware can't support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead.h]hNote that this function does all plane updates across all CRTCs in one step. If the hardware can’t support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hX<Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don't need to be immediately notified of plane updates for a disabled CRTC.h]hX>Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don’t need to be immediately notified of plane updates for a disabled CRTC.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXrUnless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in **flags** in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can't or just don't need to deal with updates on disabled CRTCs, for example when supporting runtime PM.h](hLUnless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in }(hjhhhNhNubj )}(h **flags**h]hflags}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhX! in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can’t or just don’t need to deal with updates on disabled CRTCs, for example when supporting runtime PM.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXDrivers may set the NO_DISABLE_AFTER_MODESET flag in **flags** if the relevant display controllers require to disable a CRTC's planes when the CRTC is disabled. This function would skip the :c:type:`drm_plane_helper_funcs.atomic_disable ` call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that.h](h5Drivers may set the NO_DISABLE_AFTER_MODESET flag in }(hj9hhhNhNubj )}(h **flags**h]hflags}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubh if the relevant display controllers require to disable a CRTC’s planes when the CRTC is disabled. This function would skip the }(hj9hhhNhNubh)}(hH:c:type:`drm_plane_helper_funcs.atomic_disable `h]jf )}(hjUh]h%drm_plane_helper_funcs.atomic_disable}(hjWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj9ubh call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjrhM hjubh)}(hThe drm_atomic_helper_commit() default implementation doesn't set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.h]hThe drm_atomic_helper_commit() default implementation doesn’t set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_atomic_helper_commit_planes_on_crtc (C function))c.drm_atomic_helper_commit_planes_on_crtchNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hTvoid drm_atomic_helper_commit_planes_on_crtc (struct drm_crtc_state *old_crtc_state)h]j )}(hSvoid drm_atomic_helper_commit_planes_on_crtc(struct drm_crtc_state *old_crtc_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h'drm_atomic_helper_commit_planes_on_crtch]j )}(h'drm_atomic_helper_commit_planes_on_crtch]h'drm_atomic_helper_commit_planes_on_crtc}(hj͠hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjɠubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h'(struct drm_crtc_state *old_crtc_state)h]j)}(h%struct drm_crtc_state *old_crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjϠsb)c.drm_atomic_helper_commit_planes_on_crtcasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hold_crtc_stateh]hold_crtc_state}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(hcommit plane state for a CRTCh]hcommit plane state for a CRTC}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjihhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX1**Parameters** ``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state **Description** This function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail. This function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does. This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn't handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjU )}(hhh]jZ )}(hV``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state h](j` )}(h)``struct drm_crtc_state *old_crtc_state``h]jf )}(hjh]h%struct drm_crtc_state *old_crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj| )}(hhh]h)}(h+atomic state object with the old CRTC stateh]h+atomic state object with the old CRTC state}(hjơhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj¡hM hjáubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj¡hM hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.h]hThis function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does.h]hThis function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hX)This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn't handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.h]hX+This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn’t handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5drm_atomic_helper_disable_planes_on_crtc (C function)*c.drm_atomic_helper_disable_planes_on_crtchNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hbvoid drm_atomic_helper_disable_planes_on_crtc (struct drm_crtc_state *old_crtc_state, bool atomic)h]j )}(havoid drm_atomic_helper_disable_planes_on_crtc(struct drm_crtc_state *old_crtc_state, bool atomic)h](j)}(hvoidh]hvoid}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMI ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGhhhjYhMI ubj )}(h(drm_atomic_helper_disable_planes_on_crtch]j )}(h(drm_atomic_helper_disable_planes_on_crtch]h(drm_atomic_helper_disable_planes_on_crtc}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhjYhMI ubj)}(h4(struct drm_crtc_state *old_crtc_state, bool atomic)h](j)}(h%struct drm_crtc_state *old_crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjnsb*c.drm_atomic_helper_disable_planes_on_crtcasbuh1hhjubj )}(h h]h }(hjƢhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjԢhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hold_crtc_stateh]hold_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool atomich](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hatomich]hatomic}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjGhhhjYhMI ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjChhhjYhMI ubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j{ hjYhMI hj@hhubj )}(hhh]h)}(hhelper to disable CRTC's planesh]h!helper to disable CRTC’s planes}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMI hj<hhubah}(h]h ]h"]h$]h&]uh1j hj@hhhjYhMI ubeh}(h]h ](j functioneh"]h$]h&]j j j jWj jWj j j uh1jv hhhjDhNhNubj )}(hXy**Parameters** ``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state ``bool atomic`` if set, synchronize with CRTC's atomic_begin/flush hooks **Description** Disables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes. If the atomic-parameter is set the function calls the CRTC's atomic_begin hook before and atomic_flush hook after disabling the planes. It is a bug to call this function without having implemented the :c:type:`drm_plane_helper_funcs.atomic_disable ` plane hook.h](h)}(h**Parameters**h]j )}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMM hj[ubjU )}(hhh](jZ )}(hV``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state h](j` )}(h)``struct drm_crtc_state *old_crtc_state``h]jf )}(hjh]h%struct drm_crtc_state *old_crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMJ hjzubj| )}(hhh]h)}(h+atomic state object with the old CRTC stateh]h+atomic state object with the old CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMJ hjubah}(h]h ]h"]h$]h&]uh1j{ hjzubeh}(h]h ]h"]h$]h&]uh1jY hjhMJ hjwubjZ )}(hI``bool atomic`` if set, synchronize with CRTC's atomic_begin/flush hooks h](j` )}(h``bool atomic``h]jf )}(hjh]h bool atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMK hjubj| )}(hhh]h)}(h8if set, synchronize with CRTC's atomic_begin/flush hooksh]h:if set, synchronize with CRTC’s atomic_begin/flush hooks}(hjңhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjΣhMK hjϣubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjΣhMK hjwubeh}(h]h ]h"]h$]h&]uh1jT hj[ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMM hj[ubh)}(hDisables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes.h]hDisables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chML hj[ubh)}(hIf the atomic-parameter is set the function calls the CRTC's atomic_begin hook before and atomic_flush hook after disabling the planes.h]hIf the atomic-parameter is set the function calls the CRTC’s atomic_begin hook before and atomic_flush hook after disabling the planes.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMP hj[ubh)}(hIt is a bug to call this function without having implemented the :c:type:`drm_plane_helper_funcs.atomic_disable ` plane hook.h](hAIt is a bug to call this function without having implemented the }(hj(hhhNhNubh)}(hH:c:type:`drm_plane_helper_funcs.atomic_disable `h]jf )}(hj2h]h%drm_plane_helper_funcs.atomic_disable}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMT hj(ubh plane hook.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjOhMT hj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_atomic_helper_cleanup_planes (C function)"c.drm_atomic_helper_cleanup_planeshNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h_void drm_atomic_helper_cleanup_planes (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h^void drm_atomic_helper_cleanup_planes(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMv ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjhMv ubj )}(h drm_atomic_helper_cleanup_planesh]j )}(h drm_atomic_helper_cleanup_planesh]h drm_atomic_helper_cleanup_planes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhjhMv ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjĤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjդhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjҤubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjפmodnameN classnameNj j )}j ]j)}jjsb"c.drm_atomic_helper_cleanup_planesasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j"c.drm_atomic_helper_cleanup_planesasbuh1hhj%ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjvhhhjhMv ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjhMv ubah}(h]jmah ](j j eh"]h$]h&]j j )j huh1j{ hjhMv hjohhubj )}(hhh]h)}(h$cleanup plane resources after commith]h$cleanup plane resources after commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMv hjhhubah}(h]h ]h"]h$]h&]uh1j hjohhhjhMv ubeh}(h]h ](j functioneh"]h$]h&]j j j j¥j j¥j j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in **state** to be able to call this function. This function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.h](h)}(h**Parameters**h]j )}(hj̥h]h Parameters}(hjΥhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjʥubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMz hjƥubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMw hjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMw hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMw hjubjZ )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj$h]hstruct drm_atomic_commit *state}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMx hjubj| )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMx hj:ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj9hMx hjubeh}(h]h ]h"]h$]h&]uh1jT hjƥubh)}(h**Description**h]j )}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMz hjƥubh)}(hThis function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in **state** to be able to call this function.h](hThis function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in }(hjuhhhNhNubj )}(h **state**h]hstate}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubh" to be able to call this function.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMy hjƥubh)}(hThis function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.h]hThis function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM} hjƥubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_atomic_helper_swap_state (C function)c.drm_atomic_helper_swap_statehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hNint drm_atomic_helper_swap_state (struct drm_atomic_commit *state, bool stall)h]j )}(hMint drm_atomic_helper_swap_state(struct drm_atomic_commit *state, bool stall)h](j)}(hinth]hint}(hjŦhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjԦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjӦhM ubj )}(hdrm_atomic_helper_swap_stateh]j )}(hdrm_atomic_helper_swap_stateh]hdrm_atomic_helper_swap_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjӦhM ubj)}(h-(struct drm_atomic_commit *state, bool stall)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_helper_swap_stateasbuh1hhjubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjNhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool stallh](j)}(hjIh]hbool}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(hstallh]hstall}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjӦhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjӦhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjӦhM hjhhubj )}(hhh]h)}(h(store atomic state into current sw stateh]h(store atomic state into current sw state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjӦhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jѧj jѧj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` atomic state ``bool stall`` stall for preceding commits **Description** This function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed. For cleanup and error recovery the current state for all changed objects will be swapped into **state**. With that sequence it fits perfectly into the plane prepare/cleanup sequence: 1. Call drm_atomic_helper_prepare_planes() with the staged atomic state. 2. Do any other steps that might fail. 3. Put the staged state into the current state pointers with this function. 4. Actually commit the hardware state. 5. Call drm_atomic_helper_cleanup_planes() with **state**, which since step 3 contains the old state. Also do any other cleanup required with that state. **stall** must be set when nonblocking commits for this driver directly access the :c:type:`drm_plane.state `, :c:type:`drm_crtc.state ` or :c:type:`drm_connector.state ` pointer. With the current atomic helpers this is almost always the case, since the helpers don't pass the right state structures to the callbacks. **Return** Returns 0 on success. Can return -ERESTARTSYS when **stall** is true and the waiting for the previous commits has been interrupted.h](h)}(h**Parameters**h]j )}(hjۧh]h Parameters}(hjݧhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj٧ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubjU )}(hhh](jZ )}(h1``struct drm_atomic_commit *state`` atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj| )}(hhh]h)}(h atomic stateh]h atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(h+``bool stall`` stall for preceding commits h](j` )}(h``bool stall``h]jf )}(hj3h]h bool stall}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj1ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj-ubj| )}(hhh]h)}(hstall for preceding commitsh]hstall for preceding commits}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhM hjIubah}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hjHhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjէubh)}(h**Description**h]j )}(hjnh]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubh)}(hThis function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed.h]hThis function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubh)}(hhFor cleanup and error recovery the current state for all changed objects will be swapped into **state**.h](h^For cleanup and error recovery the current state for all changed objects will be swapped into }(hjhhhNhNubj )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubh)}(hMWith that sequence it fits perfectly into the plane prepare/cleanup sequence:h]hMWith that sequence it fits perfectly into the plane prepare/cleanup sequence:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubj+P)}(hhh](h)}(hFCall drm_atomic_helper_prepare_planes() with the staged atomic state. h]h)}(hECall drm_atomic_helper_prepare_planes() with the staged atomic state.h]hECall drm_atomic_helper_prepare_planes() with the staged atomic state.}(hjʨhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjƨubah}(h]h ]h"]h$]h&]uh1hhjèubh)}(h$Do any other steps that might fail. h]h)}(h#Do any other steps that might fail.h]h#Do any other steps that might fail.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjߨubah}(h]h ]h"]h$]h&]uh1hhjèubh)}(hIPut the staged state into the current state pointers with this function. h]h)}(hHPut the staged state into the current state pointers with this function.h]hHPut the staged state into the current state pointers with this function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhjèubh)}(h$Actually commit the hardware state. h]h)}(h#Actually commit the hardware state.h]h#Actually commit the hardware state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhjèubeh}(h]h ]h"]h$]h&]j'Rj(Rj)Rhj*Rj+Ruh1j*Phjէubh)}(h5. Call drm_atomic_helper_cleanup_planes() with **state**, which since step 3 contains the old state. Also do any other cleanup required with that state.h](h05. Call drm_atomic_helper_cleanup_planes() with }(hj0hhhNhNubj )}(h **state**h]hstate}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubh`, which since step 3 contains the old state. Also do any other cleanup required with that state.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubh)}(hXa**stall** must be set when nonblocking commits for this driver directly access the :c:type:`drm_plane.state `, :c:type:`drm_crtc.state ` or :c:type:`drm_connector.state ` pointer. With the current atomic helpers this is almost always the case, since the helpers don't pass the right state structures to the callbacks.h](j )}(h **stall**h]hstall}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubhJ must be set when nonblocking commits for this driver directly access the }(hjQhhhNhNubh)}(h%:c:type:`drm_plane.state `h]jf )}(hjih]hdrm_plane.state}(hjkhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_planeuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjQubh, }(hjQhhhNhNubh)}(h#:c:type:`drm_crtc.state `h]jf )}(hjh]hdrm_crtc.state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtcuh1hhjhM hjQubh or }(hjQhhhNhNubh)}(h-:c:type:`drm_connector.state `h]jf )}(hjh]hdrm_connector.state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjhM hjQubh pointer. With the current atomic helpers this is almost always the case, since the helpers don’t pass the right state structures to the callbacks.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjէubh)}(h **Return**h]j )}(hj٩h]hReturn}(hj۩hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjשubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubh)}(hReturns 0 on success. Can return -ERESTARTSYS when **stall** is true and the waiting for the previous commits has been interrupted.h](h3Returns 0 on success. Can return -ERESTARTSYS when }(hjhhhNhNubj )}(h **stall**h]hstall}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhG is true and the waiting for the previous commits has been interrupted.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjէubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_atomic_helper_update_plane (C function) c.drm_atomic_helper_update_planehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hXint drm_atomic_helper_update_plane (struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h]j )}(hXint drm_atomic_helper_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM3 ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj>hM3 ubj )}(hdrm_atomic_helper_update_planeh]j )}(hdrm_atomic_helper_update_planeh]hdrm_atomic_helper_update_plane}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj>hM3 ubj)}(h(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjSsb c.drm_atomic_helper_update_planeasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjiubj )}(hplaneh]hplane}(hjƪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjߪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj۪ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj۪ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_atomic_helper_update_planeasbuh1hhj۪ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj۪ubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj۪ubj )}(hcrtch]hcrtc}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj۪ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&] refdomainj ireftypej reftargetjomodnameN classnameNj j )}j ]j c.drm_atomic_helper_update_planeasbuh1hhjKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjKubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(h int crtc_xh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjͫhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcrtc_xh]hcrtc_x}(hj۫hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(h int crtc_yh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcrtc_yh]hcrtc_y}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(hunsigned int crtc_wh](j)}(hunsignedh]hunsigned}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hinth]hint}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(hcrtc_wh]hcrtc_w}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(hunsigned int crtc_hh](j)}(hunsignedh]hunsigned}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(hcrtc_hh]hcrtc_h}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(huint32_t src_xh](h)}(hhh]j )}(huint32_th]huint32_t}(hjάhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjˬubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjЬmodnameN classnameNj j )}j ]j c.drm_atomic_helper_update_planeasbuh1hhjǬubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǬubj )}(hsrc_xh]hsrc_x}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǬubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(huint32_t src_yh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_atomic_helper_update_planeasbuh1hhjubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsrc_yh]hsrc_y}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(huint32_t src_wh](h)}(hhh]j )}(huint32_th]huint32_t}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j c.drm_atomic_helper_update_planeasbuh1hhjWubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(hsrc_wh]hsrc_w}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(huint32_t src_hh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_atomic_helper_update_planeasbuh1hhjubj )}(h h]h }(hjĭhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsrc_hh]hsrc_h}(hjҭhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j c.drm_atomic_helper_update_planeasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubeh}(h]h ]h"]h$]h&]j j uh1jhj,hhhj>hM3 ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj>hM3 ubah}(h]j#ah ](j j eh"]h$]h&]j j )j huh1j{ hj>hM3 hj%hhubj )}(hhh]h)}(h,Helper for primary plane update using atomich]h,Helper for primary plane update using atomic}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM3 hjihhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj>hM3 ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hXo**Parameters** ``struct drm_plane *plane`` plane object to update ``struct drm_crtc *crtc`` owning CRTC of owning plane ``struct drm_framebuffer *fb`` framebuffer to flip onto plane ``int crtc_x`` x offset of primary plane on **crtc** ``int crtc_y`` y offset of primary plane on **crtc** ``unsigned int crtc_w`` width of primary plane rectangle on **crtc** ``unsigned int crtc_h`` height of primary plane rectangle on **crtc** ``uint32_t src_x`` x offset of **fb** for panning ``uint32_t src_y`` y offset of **fb** for panning ``uint32_t src_w`` width of source rectangle in **fb** ``uint32_t src_h`` height of source rectangle in **fb** ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context **Description** Provides a default plane update handler using the atomic driver interface. **Return** Zero on success, error code on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM7 hjubjU )}(hhh](jZ )}(h3``struct drm_plane *plane`` plane object to update h](j` )}(h``struct drm_plane *plane``h]jf )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM4 hjubj| )}(hhh]h)}(hplane object to updateh]hplane object to update}(hjƮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj®hM4 hjîubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj®hM4 hjubjZ )}(h6``struct drm_crtc *crtc`` owning CRTC of owning plane h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM5 hjubj| )}(hhh]h)}(howning CRTC of owning planeh]howning CRTC of owning plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5 hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM5 hjubjZ )}(h>``struct drm_framebuffer *fb`` framebuffer to flip onto plane h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjh]hstruct drm_framebuffer *fb}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM6 hjubj| )}(hhh]h)}(hframebuffer to flip onto planeh]hframebuffer to flip onto plane}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hM6 hj5ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj4hM6 hjubjZ )}(h5``int crtc_x`` x offset of primary plane on **crtc** h](j` )}(h``int crtc_x``h]jf )}(hjXh]h int crtc_x}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjVubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM7 hjRubj| )}(hhh]h)}(h%x offset of primary plane on **crtc**h](hx offset of primary plane on }(hjqhhhNhNubj )}(h**crtc**h]hcrtc}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1hhjmhM7 hjnubah}(h]h ]h"]h$]h&]uh1j{ hjRubeh}(h]h ]h"]h$]h&]uh1jY hjmhM7 hjubjZ )}(h5``int crtc_y`` y offset of primary plane on **crtc** h](j` )}(h``int crtc_y``h]jf )}(hjh]h int crtc_y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM8 hjubj| )}(hhh]h)}(h%y offset of primary plane on **crtc**h](hy offset of primary plane on }(hjhhhNhNubj )}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1hhjhM8 hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM8 hjubjZ )}(hE``unsigned int crtc_w`` width of primary plane rectangle on **crtc** h](j` )}(h``unsigned int crtc_w``h]jf )}(hjh]hunsigned int crtc_w}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM9 hjubj| )}(hhh]h)}(h,width of primary plane rectangle on **crtc**h](h$width of primary plane rectangle on }(hjhhhNhNubj )}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1hhjhM9 hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM9 hjubjZ )}(hF``unsigned int crtc_h`` height of primary plane rectangle on **crtc** h](j` )}(h``unsigned int crtc_h``h]jf )}(hj-h]hunsigned int crtc_h}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM: hj'ubj| )}(hhh]h)}(h-height of primary plane rectangle on **crtc**h](h%height of primary plane rectangle on }(hjFhhhNhNubj )}(h**crtc**h]hcrtc}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1hhjBhM: hjCubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hjBhM: hjubjZ )}(h2``uint32_t src_x`` x offset of **fb** for panning h](j` )}(h``uint32_t src_x``h]jf )}(hjth]huint32_t src_x}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM; hjnubj| )}(hhh]h)}(hx offset of **fb** for panningh](h x offset of }(hjhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh for panning}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM; hjubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjhM; hjubjZ )}(h2``uint32_t src_y`` y offset of **fb** for panning h](j` )}(h``uint32_t src_y``h]jf )}(hjh]huint32_t src_y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM< hjubj| )}(hhh]h)}(hy offset of **fb** for panningh](h y offset of }(hjذhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjذubh for panning}(hjذhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj԰hM< hjհubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj԰hM< hjubjZ )}(h7``uint32_t src_w`` width of source rectangle in **fb** h](j` )}(h``uint32_t src_w``h]jf )}(hj h]huint32_t src_w}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM= hjubj| )}(hhh]h)}(h#width of source rectangle in **fb**h](hwidth of source rectangle in }(hj#hhhNhNubj )}(h**fb**h]hfb}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1hhjhM= hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM= hjubjZ )}(h8``uint32_t src_h`` height of source rectangle in **fb** h](j` )}(h``uint32_t src_h``h]jf )}(hjQh]huint32_t src_h}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM> hjKubj| )}(hhh]h)}(h$height of source rectangle in **fb**h](hheight of source rectangle in }(hjjhhhNhNubj )}(h**fb**h]hfb}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1hhjfhM> hjgubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjfhM> hjubjZ )}(h=``struct drm_modeset_acquire_ctx *ctx`` lock acquire context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM? hjubj| )}(hhh]h)}(hlock acquire contexth]hlock acquire context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM? hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM? hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjӱh]h Description}(hjձhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjѱubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMA hjubh)}(hJProvides a default plane update handler using the atomic driver interface.h]hJProvides a default plane update handler using the atomic driver interface.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM@ hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMB hjubh)}(h&Zero on success, error code on failureh]h&Zero on success, error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMC hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_atomic_helper_disable_plane (C function)!c.drm_atomic_helper_disable_planehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hbint drm_atomic_helper_disable_plane (struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h]j )}(haint drm_atomic_helper_disable_plane(struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMv ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhjMhMv ubj )}(hdrm_atomic_helper_disable_planeh]j )}(hdrm_atomic_helper_disable_planeh]hdrm_atomic_helper_disable_plane}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;hhhjMhMv ubj)}(h>(struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjbsb!c.drm_atomic_helper_disable_planeasbuh1hhjxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj)}(hjOh]h*}(hjȲhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjxubj )}(hplaneh]hplane}(hjղhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjtubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.drm_atomic_helper_disable_planeasbuh1hhjubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjtubeh}(h]h ]h"]h$]h&]j j uh1jhj;hhhjMhMv ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhjMhMv ubah}(h]j2ah ](j j eh"]h$]h&]j j )j huh1j{ hjMhMv hj4hhubj )}(hhh]h)}(h-Helper for primary plane disable using atomich]h-Helper for primary plane disable using atomic}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMv hjlhhubah}(h]h ]h"]h$]h&]uh1j hj4hhhjMhMv ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` plane to disable ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context **Description** Provides a default plane disable handler using the atomic driver interface. **Return** Zero on success, error code on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMz hjubjU )}(hhh](jZ )}(h-``struct drm_plane *plane`` plane to disable h](j` )}(h``struct drm_plane *plane``h]jf )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMw hjubj| )}(hhh]h)}(hplane to disableh]hplane to disable}(hjɳhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjųhMw hjƳubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjųhMw hjubjZ )}(h=``struct drm_modeset_acquire_ctx *ctx`` lock acquire context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMx hjubj| )}(hhh]h)}(hlock acquire contexth]hlock acquire context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMx hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMx hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMz hjubh)}(hKProvides a default plane disable handler using the atomic driver interface.h]hKProvides a default plane disable handler using the atomic driver interface.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMy hjubh)}(h **Return**h]j )}(hjKh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM{ hjubh)}(h&Zero on success, error code on failureh]h&Zero on success, error code on failure}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM| hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_atomic_helper_set_config (C function)c.drm_atomic_helper_set_confighNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h`int drm_atomic_helper_set_config (struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h]j )}(h_int drm_atomic_helper_set_config(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_atomic_helper_set_configh]j )}(hdrm_atomic_helper_set_configh]hdrm_atomic_helper_set_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h?(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_mode_set *seth](j )}(hj h]hstruct}(hjʹhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjɴubj )}(h h]h }(hjڴhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjɴubh)}(hhh]j )}(h drm_mode_seth]h drm_mode_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_helper_set_configasbuh1hhjɴubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjɴubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjɴubj )}(hseth]hset}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjɴubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjŴubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]jc.drm_atomic_helper_set_configasbuh1hhj;ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjŴubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(hset a new config from userspaceh]hset a new config from userspace}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jصj jصj j j uh1jv hhhjDhNhNubj )}(hX~**Parameters** ``struct drm_mode_set *set`` mode set configuration ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default CRTC set_config handler using the atomic driver interface. **NOTE** For backwards compatibility with old userspace this automatically resets the "link-status" property to GOOD, to force any link re-training. The SETCRTC ioctl does not define whether an update does need a full modeset or just a plane update, hence we're allowed to do that. See also drm_connector_set_link_status_property(). **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܵubjU )}(hhh](jZ )}(h4``struct drm_mode_set *set`` mode set configuration h](j` )}(h``struct drm_mode_set *set``h]jf )}(hjh]hstruct drm_mode_set *set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj| )}(hhh]h)}(hmode set configurationh]hmode set configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hj:h]h#struct drm_modeset_acquire_ctx *ctx}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj4ubj| )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM hjPubah}(h]h ]h"]h$]h&]uh1j{ hj4ubeh}(h]h ]h"]h$]h&]uh1jY hjOhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjܵubh)}(h**Description**h]j )}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܵubh)}(hMProvides a default CRTC set_config handler using the atomic driver interface.h]hMProvides a default CRTC set_config handler using the atomic driver interface.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܵubh)}(h**NOTE**h]j )}(hjh]hNOTE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܵubh)}(hXCFor backwards compatibility with old userspace this automatically resets the "link-status" property to GOOD, to force any link re-training. The SETCRTC ioctl does not define whether an update does need a full modeset or just a plane update, hence we're allowed to do that. See also drm_connector_set_link_status_property().h]hXIFor backwards compatibility with old userspace this automatically resets the “link-status” property to GOOD, to force any link re-training. The SETCRTC ioctl does not define whether an update does need a full modeset or just a plane update, hence we’re allowed to do that. See also drm_connector_set_link_status_property().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܵubh)}(h **Return**h]j )}(hjöh]hReturn}(hjŶhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܵubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjٶhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܵubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_atomic_helper_disable_all (C function)c.drm_atomic_helper_disable_allhNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h_int drm_atomic_helper_disable_all (struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h]j )}(h^int drm_atomic_helper_disable_all(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_atomic_helper_disable_allh]j )}(hdrm_atomic_helper_disable_allh]hdrm_atomic_helper_disable_all}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h=(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjemodnameN classnameNj j )}j ]j)}jj+sbc.drm_atomic_helper_disable_allasbuh1hhjAubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjAubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=ubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjķhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjշhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjҷubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj׷modnameN classnameNj j )}j ]jc.drm_atomic_helper_disable_allasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h$disable all currently active outputsh]h$disable all currently active outputs}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj5hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jPj jPj j j uh1jv hhhjDhNhNubj )}(hXG**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Loops through all connectors, finding those that aren't turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to. This is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown(). Note that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff(). See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjyh]hstruct drm_device *dev}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjsubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjpubjZ )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj| )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hj˸hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjǸhM hjȸubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjǸhM hjpubeh}(h]h ]h"]h$]h&]uh1jT hjTubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubh)}(hLoops through all connectors, finding those that aren't turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to.h]hLoops through all connectors, finding those that aren’t turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubh)}(hThis is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown().h]hThis is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubh)}(hNote that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().h]hNote that if callers haven’t already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubh)}(hcSee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown().h]hcSee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown().}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubh)}(h **Return**h]j )}(hjAh]hReturn}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjTubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_atomic_helper_reset_crtc (C function)c.drm_atomic_helper_reset_crtchNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h]int drm_atomic_helper_reset_crtc (struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h]j )}(h\int drm_atomic_helper_reset_crtc(struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_atomic_helper_reset_crtch]j )}(hdrm_atomic_helper_reset_crtch]hdrm_atomic_helper_reset_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h<(struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjùhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjйhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޹ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_helper_reset_crtcasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]jc.drm_atomic_helper_reset_crtcasbuh1hhj1ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhjhM ubah}(h]jyah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hj{hhubj )}(hhh]h)}(h"reset the active outputs of a CRTCh]h"reset the active outputs of a CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj{hhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jκj jκj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Reset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors. A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges. **NOTE** This relies on resetting :c:type:`drm_crtc_state.connectors_changed `. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjغh]h Parameters}(hjںhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjֺubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM$hjҺubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM!hjubj| )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM!hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM!hjubjZ )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hj0h]h#struct drm_modeset_acquire_ctx *ctx}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM"hj*ubj| )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM"hjFubah}(h]h ]h"]h$]h&]uh1j{ hj*ubeh}(h]h ]h"]h$]h&]uh1jY hjEhM"hjubeh}(h]h ]h"]h$]h&]uh1jT hjҺubh)}(h**Description**h]j )}(hjkh]h Description}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM$hjҺubh)}(hReset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors.h]hReset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM#hjҺubh)}(h\A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges.h]h\A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM'hjҺubh)}(h**NOTE**h]j )}(hjh]hNOTE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM*hjҺubh)}(hThis relies on resetting :c:type:`drm_crtc_state.connectors_changed `. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing.h](hThis relies on resetting }(hjhhhNhNubh)}(h<:c:type:`drm_crtc_state.connectors_changed `h]jf )}(hjh]h!drm_crtc_state.connectors_changed}(hjûhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM+hjubhl. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj޻hM+hjҺubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM/hjҺubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM/hjҺubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_atomic_helper_shutdown (C function)c.drm_atomic_helper_shutdownhNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(h8void drm_atomic_helper_shutdown (struct drm_device *dev)h]j )}(h7void drm_atomic_helper_shutdown(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMPubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj>hMPubj )}(hdrm_atomic_helper_shutdownh]j )}(hdrm_atomic_helper_shutdownh]hdrm_atomic_helper_shutdown}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj>hMPubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjSsbc.drm_atomic_helper_shutdownasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjiubj )}(hdevh]hdev}(hjƼhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubah}(h]h ]h"]h$]h&]j j uh1jhj,hhhj>hMPubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj>hMPubah}(h]j#ah ](j j eh"]h$]h&]j j )j huh1j{ hj>hMPhj%hhubj )}(hhh]h)}(hshutdown all CRTCh]hshutdown all CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMPhjhhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj>hMPubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device **Description** This shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume. This is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMThj ubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj1h]hstruct drm_device *dev}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMQhj+ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMQhjGubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hjFhMQhj(ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjlh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMShj ubh)}(hThis shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume.h]hThis shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMRhj ubh)}(hThis is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().h]hThis is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMVhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_atomic_helper_duplicate_state (C function)#c.drm_atomic_helper_duplicate_statehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hzstruct drm_atomic_commit * drm_atomic_helper_duplicate_state (struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h]j )}(hxstruct drm_atomic_commit *drm_atomic_helper_duplicate_state(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMoubj )}(h h]h }(hjνhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjͽhMoubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj߽hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܽubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j!drm_atomic_helper_duplicate_statesb#c.drm_atomic_helper_duplicate_stateasbuh1hhjhhhjͽhMoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjͽhMoubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjͽhMoubj )}(h!drm_atomic_helper_duplicate_stateh]j )}(hjh]h!drm_atomic_helper_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjͽhMoubj)}(h=(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j#c.drm_atomic_helper_duplicate_stateasbuh1hhj6ubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjȾhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjžubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjʾmodnameN classnameNj j )}j ]j#c.drm_atomic_helper_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjͽhMoubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjͽhMoubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjͽhMohjhhubj )}(hhh]h)}(h duplicate an atomic state objecth]h duplicate an atomic state object}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMohj(hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjͽhMoubeh}(h]h ](j functioneh"]h$]h&]j j j jCj jCj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Makes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume. Note that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won't result in confusion or erroneous behaviour. Note that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff(). See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() **Return** A pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.h](h)}(h**Parameters**h]j )}(hjMh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMshjGubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjlh]hstruct drm_device *dev}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMphjfubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1j{ hjfubeh}(h]h ]h"]h$]h&]uh1jY hjhMphjcubjZ )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMqhjubj| )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMqhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMqhjcubeh}(h]h ]h"]h$]h&]uh1jT hjGubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj޿ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMshjGubh)}(hMakes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume.0h]hMakes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMrhjGubh)}(hNote that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won't result in confusion or erroneous behaviour.h]hNote that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won’t result in confusion or erroneous behaviour.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMwhjGubh)}(hNote that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().h]hNote that if callers haven’t already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM{hjGubh)}(hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()h]hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjGubh)}(h **Return**h]j )}(hj4h]hReturn}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjGubh)}(hjA pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.h]hjA pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjGubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_atomic_helper_suspend (C function)c.drm_atomic_helper_suspendhNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hMstruct drm_atomic_commit * drm_atomic_helper_suspend (struct drm_device *dev)h]j )}(hKstruct drm_atomic_commit *drm_atomic_helper_suspend(struct drm_device *dev)h](j )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuhhhjhMubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_atomic_helper_suspendsbc.drm_atomic_helper_suspendasbuh1hhjuhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuhhhjhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjuhhhjhMubj )}(hdrm_atomic_helper_suspendh]j )}(hjh]hdrm_atomic_helper_suspend}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjuhhhjhMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_atomic_helper_suspendasbuh1hhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjuhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjqhhhjhMubah}(h]jlah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjnhhubj )}(hhh]h)}(hsubsystem-level suspend helperh]hsubsystem-level suspend helper}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjqhhubah}(h]h ]h"]h$]h&]uh1j hjnhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX-**Parameters** ``struct drm_device *dev`` DRM device **Description** Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend. Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device. See also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state() **Return** A pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX6Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend.h]hX6Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX!Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device.h]hX!Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hSee also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state()h]hSee also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state()}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j )}(hj5h]hReturn}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hA pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.h]hA pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6drm_atomic_helper_commit_duplicated_state (C function)+c.drm_atomic_helper_commit_duplicated_statehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(htint drm_atomic_helper_commit_duplicated_state (struct drm_atomic_commit *state, struct drm_modeset_acquire_ctx *ctx)h]j )}(hsint drm_atomic_helper_commit_duplicated_state(struct drm_atomic_commit *state, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjhMubj )}(h)drm_atomic_helper_commit_duplicated_stateh]j )}(h)drm_atomic_helper_commit_duplicated_stateh]h)drm_atomic_helper_commit_duplicated_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhjhMubj)}(hF(struct drm_atomic_commit *state, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb+c.drm_atomic_helper_commit_duplicated_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j+c.drm_atomic_helper_commit_duplicated_stateasbuh1hhj%ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjvhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjhMubah}(h]jmah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjohhubj )}(hhh]h)}(hcommit duplicated stateh]hcommit duplicated state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjohhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` duplicated atomic state to commit ``struct drm_modeset_acquire_ctx *ctx`` pointer to acquire_ctx to use for commit. **Description** The state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit. See also: drm_atomic_helper_suspend() **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjU )}(hhh](jZ )}(hF``struct drm_atomic_commit *state`` duplicated atomic state to commit h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h!duplicated atomic state to commith]h!duplicated atomic state to commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hR``struct drm_modeset_acquire_ctx *ctx`` pointer to acquire_ctx to use for commit. h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hj$h]h#struct drm_modeset_acquire_ctx *ctx}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h)pointer to acquire_ctx to use for commit.h]h)pointer to acquire_ctx to use for commit.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThe state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit.h]hThe state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h%See also: drm_atomic_helper_suspend()h]h%See also: drm_atomic_helper_suspend()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_atomic_helper_resume (C function)c.drm_atomic_helper_resumehNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hVint drm_atomic_helper_resume (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hUint drm_atomic_helper_resume(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM8ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM8ubj )}(hdrm_atomic_helper_resumeh]j )}(hdrm_atomic_helper_resumeh]hdrm_atomic_helper_resume}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM8ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_helper_resumeasbuh1hhjubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjchhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jQc.drm_atomic_helper_resumeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM8ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM8ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM8hjhhubj )}(hhh]h)}(hsubsystem-level resume helperh]hsubsystem-level resume helper}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM8hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM8ubeh}(h]h ](j functioneh"]h$]h&]j j j j"j j"j j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state to resume to **Description** Calls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting. See also: drm_atomic_helper_suspend() **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM<hj&ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjKh]hstruct drm_device *dev}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM9hjEubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM9hjaubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj`hM9hjBubjZ )}(h>``struct drm_atomic_commit *state`` atomic state to resume to h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM:hj~ubj| )}(hhh]h)}(hatomic state to resume toh]hatomic state to resume to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM:hjubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hjhM:hjBubeh}(h]h ]h"]h$]h&]uh1jT hj&ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM<hj&ubh)}(hXCalls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting.h]hXCalls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM;hj&ubh)}(h%See also: drm_atomic_helper_suspend()h]h%See also: drm_atomic_helper_suspend()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMAhj&ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMDhj&ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMAhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_atomic_helper_page_flip (C function)c.drm_atomic_helper_page_fliphNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hint drm_atomic_helper_page_flip (struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h]j )}(hint drm_atomic_helper_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6hhhjHhMubj )}(hdrm_atomic_helper_page_fliph]j )}(hdrm_atomic_helper_page_fliph]hdrm_atomic_helper_page_flip}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6hhhjHhMubj)}(h(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj]sbc.drm_atomic_helper_page_flipasbuh1hhjsubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjsubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj3hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubj)}(h&struct drm_pending_vblank_event *eventh](j )}(hj h]hstruct}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubh)}(hhh]j )}(hdrm_pending_vblank_eventh]hdrm_pending_vblank_event}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjymodnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhjUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjUubj )}(heventh]hevent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubj)}(huint32_t flagsh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhj ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hctxh]hctx}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubeh}(h]h ]h"]h$]h&]j j uh1jhj6hhhjHhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2hhhjHhMubah}(h]j-ah ](j j eh"]h$]h&]j j )j huh1j{ hjHhMhj/hhubj )}(hhh]h)}(hexecute a legacy page fliph]hexecute a legacy page flip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj/hhhjHhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjDhNhNubj )}(hXG**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_framebuffer *fb`` DRM framebuffer ``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion ``uint32_t flags`` flip flags for non-vblank sync'ed updates ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default :c:type:`drm_crtc_funcs.page_flip ` implementation using the atomic driver interface. See also: drm_atomic_helper_page_flip_target() **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h/``struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hj h]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj!hMhjubjZ )}(hX``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion h](j` )}(h*``struct drm_pending_vblank_event *event``h]jf )}(hjEh]h&struct drm_pending_vblank_event *event}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj?ubj| )}(hhh]h)}(h,optional DRM event to signal upon completionh]h,optional DRM event to signal upon completion}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hjZhMhjubjZ )}(h=``uint32_t flags`` flip flags for non-vblank sync'ed updates h](j` )}(h``uint32_t flags``h]jf )}(hj~h]huint32_t flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjxubj| )}(hhh]h)}(h)flip flags for non-vblank sync'ed updatesh]h+flip flags for non-vblank sync’ed updates}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hxProvides a default :c:type:`drm_crtc_funcs.page_flip ` implementation using the atomic driver interface.h](hProvides a default }(hjhhhNhNubh)}(h3:c:type:`drm_crtc_funcs.page_flip `h]jf )}(hjh]hdrm_crtc_funcs.page_flip}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh2 implementation using the atomic driver interface.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/hMhjubh)}(h.See also: drm_atomic_helper_page_flip_target()h]h.See also: drm_atomic_helper_page_flip_target()}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j )}(hjKh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_atomic_helper_page_flip_target (C function)$c.drm_atomic_helper_page_flip_targethNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hint drm_atomic_helper_page_flip_target (struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h]j )}(hint drm_atomic_helper_page_flip_target(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h"drm_atomic_helper_page_flip_targeth]j )}(h"drm_atomic_helper_page_flip_targeth]h"drm_atomic_helper_page_flip_target}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]j$c.drm_atomic_helper_page_flip_targetasbuh1hhj;ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_pending_vblank_event *eventh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_pending_vblank_eventh]hdrm_pending_vblank_event}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(heventh]hevent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t flagsh](h)}(hhh]j )}(huint32_th]huint32_t}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hflagsh]hflags}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t targeth](h)}(hhh]j )}(huint32_th]huint32_t}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjlmodnameN classnameNj j )}j ]j$c.drm_atomic_helper_page_flip_targetasbuh1hhjcubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj )}(htargeth]htarget}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h%do page flip on target vblank period.h]h%do page flip on target vblank period.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj-hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jHj jHj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_framebuffer *fb`` DRM framebuffer ``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion ``uint32_t flags`` flip flags for non-vblank sync'ed updates ``uint32_t target`` specifying the target vblank period when the flip to take effect ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default :c:type:`drm_crtc_funcs.page_flip_target ` implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip. **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j )}(hjRh]h Parameters}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjLubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjqh]hstruct drm_crtc *crtc}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjkubj| )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjhubjZ )}(h/``struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjhubjZ )}(hX``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion h](j` )}(h*``struct drm_pending_vblank_event *event``h]jf )}(hjh]h&struct drm_pending_vblank_event *event}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h,optional DRM event to signal upon completionh]h,optional DRM event to signal upon completion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjhubjZ )}(h=``uint32_t flags`` flip flags for non-vblank sync'ed updates h](j` )}(h``uint32_t flags``h]jf )}(hjh]huint32_t flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h)flip flags for non-vblank sync'ed updatesh]h+flip flags for non-vblank sync’ed updates}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hMhjhubjZ )}(hU``uint32_t target`` specifying the target vblank period when the flip to take effect h](j` )}(h``uint32_t target``h]jf )}(hjUh]huint32_t target}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjOubj| )}(hhh]h)}(h@specifying the target vblank period when the flip to take effecth]h@specifying the target vblank period when the flip to take effect}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjkubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjjhMhjhubjZ )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjhubeh}(h]h ]h"]h$]h&]uh1jT hjLubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjLubh)}(hProvides a default :c:type:`drm_crtc_funcs.page_flip_target ` implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip.h](hProvides a default }(hjhhhNhNubh)}(h::c:type:`drm_crtc_funcs.page_flip_target `h]jf )}(hjh]hdrm_crtc_funcs.page_flip_target}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubhw implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjLubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjLubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjLubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 7drm_atomic_helper_bridge_propagate_bus_fmt (C function),c.drm_atomic_helper_bridge_propagate_bus_fmthNtauh1jd hjDhhhNhNubjw )}(hhh](j| )}(hu32 * drm_atomic_helper_bridge_propagate_bus_fmt (struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h]j )}(hu32 *drm_atomic_helper_bridge_propagate_bus_fmt(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h](h)}(hhh]j )}(hu32h]hu32}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j)}j*drm_atomic_helper_bridge_propagate_bus_fmtsb,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjThhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjThhhj|hMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjThhhj|hMubj )}(h*drm_atomic_helper_bridge_propagate_bus_fmth]j )}(hjyh]h*drm_atomic_helper_bridge_propagate_bus_fmt}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjThhhj|hMubj)}(h(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jw,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h%struct drm_bridge_state *bridge_stateh](j )}(hj h]hstruct}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjGmodnameN classnameNj j )}j ]jw,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhj#ubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubj )}(h bridge_stateh]h bridge_state}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jw,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h crtc_stateh]h crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]jw,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjQhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h conn_stateh]h conn_state}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 output_fmth](h)}(hhh]j )}(hu32h]hu32}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]jw,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjsubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj )}(h output_fmth]h output_fmt}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int *num_input_fmtsh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hnum_input_fmtsh]hnum_input_fmts}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjThhhj|hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjPhhhj|hMubah}(h]jKah ](j j eh"]h$]h&]j j )j huh1j{ hj|hMhjMhhubj )}(hhh]h)}(h4Propagate output format to the input end of a bridgeh]h4Propagate output format to the input end of a bridge}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj+hhubah}(h]h ]h"]h$]h&]uh1j hjMhhhj|hMubeh}(h]h ](j functioneh"]h$]h&]j j j jFj jFj j j uh1jv hhhjDhNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_bridge_state *bridge_state`` new bridge state ``struct drm_crtc_state *crtc_state`` new CRTC state ``struct drm_connector_state *conn_state`` new connector state ``u32 output_fmt`` tested output bus format ``unsigned int *num_input_fmts`` will contain the size of the returned array **Description** This helper is a pluggable implementation of the :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation for bridges that don't modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to **output_fmt**. **Return** a valid format array of size **num_input_fmts**, or NULL if the allocation failedh](h)}(h**Parameters**h]j )}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjJubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjoh]hstruct drm_bridge *bridge}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjiubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjiubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjfubjZ )}(h;``struct drm_bridge_state *bridge_state`` new bridge state h](j` )}(h)``struct drm_bridge_state *bridge_state``h]jf )}(hjh]h%struct drm_bridge_state *bridge_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hnew bridge stateh]hnew bridge state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjfubjZ )}(h5``struct drm_crtc_state *crtc_state`` new CRTC state h](j` )}(h%``struct drm_crtc_state *crtc_state``h]jf )}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hnew CRTC stateh]hnew CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjfubjZ )}(h?``struct drm_connector_state *conn_state`` new connector state h](j` )}(h*``struct drm_connector_state *conn_state``h]jf )}(hjh]h&struct drm_connector_state *conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(hnew connector stateh]hnew connector state}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj0ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj/hMhjfubjZ )}(h,``u32 output_fmt`` tested output bus format h](j` )}(h``u32 output_fmt``h]jf )}(hjSh]hu32 output_fmt}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjMubj| )}(hhh]h)}(htested output bus formath]htested output bus format}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjhhMhjfubjZ )}(hM``unsigned int *num_input_fmts`` will contain the size of the returned array h](j` )}(h ``unsigned int *num_input_fmts``h]jf )}(hjh]hunsigned int *num_input_fmts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj| )}(hhh]h)}(h+will contain the size of the returned arrayh]h+will contain the size of the returned array}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjfubeh}(h]h ]h"]h$]h&]uh1jT hjJubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjJubh)}(hX.This helper is a pluggable implementation of the :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation for bridges that don't modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to **output_fmt**.h](h1This helper is a pluggable implementation of the }(hjhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]jf )}(hjh]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh operation for bridges that don’t modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to }(hjhhhNhNubj )}(h**output_fmt**h]h output_fmt}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjJubh)}(h **Return**h]j )}(hj#h]hReturn}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjJubh)}(hQa valid format array of size **num_input_fmts**, or NULL if the allocation failedh](ha valid format array of size }(hj9hhhNhNubj )}(h**num_input_fmts**h]hnum_input_fmts}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubh", or NULL if the allocation failed}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjDhhhNhNubeh}(h]j!ah ]h"]helper functions referenceah$]h&]uh1hhjqBhhhhhKAubh)}(hhh](h)}(h%Atomic State Reset and Initializationh]h%Atomic State Reset and Initialization}(hjkhhhNhNubah}(h]h ]h"]h$]h&]hj=uh1hhjhhhhhhKJubh)}(hXsBoth the drm core and the atomic helpers assume that there is always the full and correct atomic software state for all connectors, CRTCs and planes available. Which is a bit a problem on driver load and also after system suspend. One way to solve this is to have a hardware state read-out infrastructure which reconstructs the full software state (e.g. the i915 driver).h]hXsBoth the drm core and the atomic helpers assume that there is always the full and correct atomic software state for all connectors, CRTCs and planes available. Which is a bit a problem on driver load and also after system suspend. One way to solve this is to have a hardware state read-out infrastructure which reconstructs the full software state (e.g. the i915 driver).}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:76: ./drivers/gpu/drm/drm_atomic_state_helper.chK-hjhhhubh)}(hThe simpler solution is to just reset the software state to everything off, which is easiest to do by calling drm_mode_config_reset(). To facilitate this the atomic helpers provide default reset implementations for all hooks.h]hThe simpler solution is to just reset the software state to everything off, which is easiest to do by calling drm_mode_config_reset(). To facilitate this the atomic helpers provide default reset implementations for all hooks.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:76: ./drivers/gpu/drm/drm_atomic_state_helper.chK4hjhhhubh)}(hXHOn the upside the precise state tracking of atomic simplifies system suspend and resume a lot. For drivers using drm_mode_config_reset() a complete recipe is implemented in drm_atomic_helper_suspend() and drm_atomic_helper_resume(). For other drivers the building blocks are split out, see the documentation for these functions.h]hXHOn the upside the precise state tracking of atomic simplifies system suspend and resume a lot. For drivers using drm_mode_config_reset() a complete recipe is implemented in drm_atomic_helper_suspend() and drm_atomic_helper_resume(). For other drivers the building blocks are split out, see the documentation for these functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:76: ./drivers/gpu/drm/drm_atomic_state_helper.chK8hjhhhubeh}(h]jCah ]h"]%atomic state reset and initializationah$]h&]uh1hhjqBhhhhhKJubh)}(hhh](h)}(hAtomic State Helper Referenceh]hAtomic State Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hj_uh1hhjhhhhhKPubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1__drm_atomic_helper_crtc_state_reset (C function)&c.__drm_atomic_helper_crtc_state_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hdvoid __drm_atomic_helper_crtc_state_reset (struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h]j )}(hcvoid __drm_atomic_helper_crtc_state_reset(struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKBubj )}(h$__drm_atomic_helper_crtc_state_reseth]j )}(h$__drm_atomic_helper_crtc_state_reseth]h$__drm_atomic_helper_crtc_state_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKBubj)}(h:(struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h](j)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j)}jjsb&c.__drm_atomic_helper_crtc_state_resetasbuh1hhjubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h crtc_stateh]h crtc_state}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jN&c.__drm_atomic_helper_crtc_state_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKBubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKBhjhhubj )}(hhh]h)}(hreset the CRTC stateh]hreset the CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKBhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKBubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX%**Parameters** ``struct drm_crtc_state *crtc_state`` atomic CRTC state, must not be NULL ``struct drm_crtc *crtc`` CRTC object, must not be NULL **Description** Initializes the newly allocated **crtc_state** with default values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j )}(hj)h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKFhj#ubjU )}(hhh](jZ )}(hJ``struct drm_crtc_state *crtc_state`` atomic CRTC state, must not be NULL h](j` )}(h%``struct drm_crtc_state *crtc_state``h]jf )}(hjHh]h!struct drm_crtc_state *crtc_state}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKChjBubj| )}(hhh]h)}(h#atomic CRTC state, must not be NULLh]h#atomic CRTC state, must not be NULL}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hKChj^ubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hj]hKChj?ubjZ )}(h8``struct drm_crtc *crtc`` CRTC object, must not be NULL h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKDhj{ubj| )}(hhh]h)}(hCRTC object, must not be NULLh]hCRTC object, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKDhjubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hjhKDhj?ubeh}(h]h ]h"]h$]h&]uh1jT hj#ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKFhj#ubh)}(h|Initializes the newly allocated **crtc_state** with default values. This is useful for drivers that subclass the CRTC state.h](h Initializes the newly allocated }(hjhhhNhNubj )}(h**crtc_state**h]h crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhN with default values. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKEhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +__drm_atomic_helper_crtc_reset (C function) c.__drm_atomic_helper_crtc_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h^void __drm_atomic_helper_crtc_reset (struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h]j )}(h]void __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKSubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj!hKSubj )}(h__drm_atomic_helper_crtc_reseth]j )}(h__drm_atomic_helper_crtc_reseth]h__drm_atomic_helper_crtc_reset}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj!hKSubj)}(h:(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]j)}jj6sb c.__drm_atomic_helper_crtc_resetasbuh1hhjLubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjLubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.__drm_atomic_helper_crtc_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h crtc_stateh]h crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj!hKSubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj!hKSubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj!hKShjhhubj )}(hhh]h)}(hreset state on CRTCh]hreset state on CRTC}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKShj@hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj!hKSubeh}(h]h ](j functioneh"]h$]h&]j j j j[j j[j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_crtc *crtc`` drm CRTC ``struct drm_crtc_state *crtc_state`` CRTC state to assign **Description** Initializes the newly allocated **crtc_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **crtc**, usually required when initializing the drivers or when called from the :c:type:`drm_crtc_funcs.reset ` hook. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j )}(hjeh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKWhj_ubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` drm CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKThj~ubj| )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKThjubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hjhKThj{ubjZ )}(h;``struct drm_crtc_state *crtc_state`` CRTC state to assign h](j` )}(h%``struct drm_crtc_state *crtc_state``h]jf )}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKUhjubj| )}(hhh]h)}(hCRTC state to assignh]hCRTC state to assign}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKUhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKUhj{ubeh}(h]h ]h"]h$]h&]uh1jT hj_ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKWhj_ubh)}(hInitializes the newly allocated **crtc_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **crtc**, usually required when initializing the drivers or when called from the :c:type:`drm_crtc_funcs.reset ` hook.h](h Initializes the newly allocated }(hjhhhNhNubj )}(h**crtc_state**h]h crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and assigns it to the }(hjhhhNhNubh)}(h$:c:type:`drm_crtc->state `h]jf )}(hj*h]hdrm_crtc->state}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtcuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKVhjubh pointer of }(hjhhhNhNubj )}(h**crtc**h]hcrtc}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhI, usually required when initializing the drivers or when called from the }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]jf )}(hj`h]hdrm_crtc_funcs.reset}(hjbhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhjGhKVhjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhKVhj_ubh)}(h8This is useful for drivers that subclass the CRTC state.h]h8This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chK[hj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_atomic_helper_crtc_reset (C function)c.drm_atomic_helper_crtc_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h9void drm_atomic_helper_crtc_reset (struct drm_crtc *crtc)h]j )}(h8void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKmubj )}(hdrm_atomic_helper_crtc_reseth]j )}(hdrm_atomic_helper_crtc_reseth]hdrm_atomic_helper_crtc_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKmubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_helper_crtc_resetasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKmubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKmhjhhubj )}(hhh]h)}(hFdefault :c:type:`drm_crtc_funcs.reset ` hook for CRTCsh](hdefault }(hjvhhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]jf )}(hjh]hdrm_crtc_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j-c.drm_atomic_helper_crtc_resetasbj drm_crtc_funcsuh1hhjhKBhjvubh hook for CRTCs}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKmhjshhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKmubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC **Description** Resets the atomic state for **crtc** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKqhjubjU )}(hhh]jZ )}(h#``struct drm_crtc *crtc`` drm CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKnhjubj| )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKnhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKnhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKphjubh)}(hResets the atomic state for **crtc** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hj0hhhNhNubj )}(h**crtc**h]hcrtc}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKohjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5__drm_atomic_helper_crtc_duplicate_state (C function)*c.__drm_atomic_helper_crtc_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hcvoid __drm_atomic_helper_crtc_duplicate_state (struct drm_crtc *crtc, struct drm_crtc_state *state)h]j )}(hbvoid __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmhhhjhKubj )}(h(__drm_atomic_helper_crtc_duplicate_stateh]j )}(h(__drm_atomic_helper_crtc_duplicate_stateh]h(__drm_atomic_helper_crtc_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjmhhhjhKubj)}(h5(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb*c.__drm_atomic_helper_crtc_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_crtc_state *stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]j*c.__drm_atomic_helper_crtc_duplicate_stateasbuh1hhjubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjmhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjihhhjhKubah}(h]jdah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjfhhubj )}(hhh]h)}(hcopy atomic CRTC stateh]hcopy atomic CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjfhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_crtc *crtc`` CRTC object ``struct drm_crtc_state *state`` atomic CRTC state **Description** Copies atomic state from a CRTC's current state and resets inferred values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubjU )}(hhh](jZ )}(h&``struct drm_crtc *crtc`` CRTC object h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj| )}(hhh]h)}(h CRTC objecth]h CRTC object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h3``struct drm_crtc_state *state`` atomic CRTC state h](j` )}(h ``struct drm_crtc_state *state``h]jf )}(hjh]hstruct drm_crtc_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj| )}(hhh]h)}(hatomic CRTC stateh]hatomic CRTC state}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKhj1ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj0hKhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjVh]h Description}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(hCopies atomic state from a CRTC's current state and resets inferred values. This is useful for drivers that subclass the CRTC state.h]hCopies atomic state from a CRTC’s current state and resets inferred values. This is useful for drivers that subclass the CRTC state.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_atomic_helper_crtc_duplicate_state (C function)(c.drm_atomic_helper_crtc_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hVstruct drm_crtc_state * drm_atomic_helper_crtc_duplicate_state (struct drm_crtc *crtc)h]j )}(hTstruct drm_crtc_state *drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j&drm_atomic_helper_crtc_duplicate_statesb(c.drm_atomic_helper_crtc_duplicate_stateasbuh1hhjhhhjhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhKubj )}(h&drm_atomic_helper_crtc_duplicate_stateh]j )}(hjh]h&drm_atomic_helper_crtc_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j(c.drm_atomic_helper_crtc_duplicate_stateasbuh1hhjubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC **Description** Default CRTC state duplicate hook for drivers which don't have their own subclassed CRTC state structure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubjU )}(hhh]jZ )}(h#``struct drm_crtc *crtc`` drm CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj| )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(hiDefault CRTC state duplicate hook for drivers which don't have their own subclassed CRTC state structure.h]hkDefault CRTC state duplicate hook for drivers which don’t have their own subclassed CRTC state structure.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3__drm_atomic_helper_crtc_destroy_state (C function)(c.__drm_atomic_helper_crtc_destroy_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hJvoid __drm_atomic_helper_crtc_destroy_state (struct drm_crtc_state *state)h]j )}(hIvoid __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhjehKubj )}(h&__drm_atomic_helper_crtc_destroy_stateh]j )}(h&__drm_atomic_helper_crtc_destroy_stateh]h&__drm_atomic_helper_crtc_destroy_state}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ](j j eh"]h$]h&]j j uh1j hjShhhjehKubj)}(h(struct drm_crtc_state *state)h]j)}(hstruct drm_crtc_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjzsb(c.__drm_atomic_helper_crtc_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjShhhjehKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjOhhhjehKubah}(h]jJah ](j j eh"]h$]h&]j j )j huh1j{ hjehKhjLhhubj )}(hhh]h)}(hrelease CRTC stateh]hrelease CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjLhhhjehKubeh}(h]h ](j functioneh"]h$]h&]j j j j/j j/j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_crtc_state *state`` CRTC state object to release **Description** Releases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j )}(hj9h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj3ubjU )}(hhh]jZ )}(h>``struct drm_crtc_state *state`` CRTC state object to release h](j` )}(h ``struct drm_crtc_state *state``h]jf )}(hjXh]hstruct drm_crtc_state *state}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjVubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjRubj| )}(hhh]h)}(hCRTC state object to releaseh]hCRTC state object to release}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhKhjnubah}(h]h ]h"]h$]h&]uh1j{ hjRubeh}(h]h ]h"]h$]h&]uh1jY hjmhKhjOubah}(h]h ]h"]h$]h&]uh1jT hj3ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj3ubh)}(hReleases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.h]hReleases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_atomic_helper_crtc_destroy_state (C function)&c.drm_atomic_helper_crtc_destroy_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h_void drm_atomic_helper_crtc_destroy_state (struct drm_crtc *crtc, struct drm_crtc_state *state)h]j )}(h^void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h$drm_atomic_helper_crtc_destroy_stateh]j )}(h$drm_atomic_helper_crtc_destroy_stateh]h$drm_atomic_helper_crtc_destroy_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h5(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j)}jjsb&c.drm_atomic_helper_crtc_destroy_stateasbuh1hhjubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct drm_crtc_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jO&c.drm_atomic_helper_crtc_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC ``struct drm_crtc_state *state`` CRTC state object to release **Description** Default CRTC state destroy hook for drivers which don't have their own subclassed CRTC state structure.h](h)}(h**Parameters**h]j )}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj$ubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` drm CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjIh]hstruct drm_crtc *crtc}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjCubj| )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hKhj_ubah}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hj^hKhj@ubjZ )}(h>``struct drm_crtc_state *state`` CRTC state object to release h](j` )}(h ``struct drm_crtc_state *state``h]jf )}(hjh]hstruct drm_crtc_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj|ubj| )}(hhh]h)}(hCRTC state object to releaseh]hCRTC state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hj|ubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj@ubeh}(h]h ]h"]h$]h&]uh1jT hj$ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj$ubh)}(hgDefault CRTC state destroy hook for drivers which don't have their own subclassed CRTC state structure.h]hiDefault CRTC state destroy hook for drivers which don’t have their own subclassed CRTC state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2__drm_atomic_helper_plane_state_reset (C function)'c.__drm_atomic_helper_plane_state_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hivoid __drm_atomic_helper_plane_state_reset (struct drm_plane_state *plane_state, struct drm_plane *plane)h]j )}(hhvoid __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state, struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h%__drm_atomic_helper_plane_state_reseth]j )}(h%__drm_atomic_helper_plane_state_reseth]h%__drm_atomic_helper_plane_state_reset}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h>(struct drm_plane_state *plane_state, struct drm_plane *plane)h](j)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]j)}jj%sb'c.__drm_atomic_helper_plane_state_resetasbuh1hhj;ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;ubj )}(h plane_stateh]h plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7ubj)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jy'c.__drm_atomic_helper_plane_state_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h$resets plane state to default valuesh]h$resets plane state to default values}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj/hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jJj jJj j j uh1jv hhhjhNhNubj )}(hX,**Parameters** ``struct drm_plane_state *plane_state`` atomic plane state, must not be NULL ``struct drm_plane *plane`` plane object, must not be NULL **Description** Initializes the newly allocated **plane_state** with default values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j )}(hjTh]h Parameters}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjNubjU )}(hhh](jZ )}(hM``struct drm_plane_state *plane_state`` atomic plane state, must not be NULL h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hjsh]h#struct drm_plane_state *plane_state}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjmubj| )}(hhh]h)}(h$atomic plane state, must not be NULLh]h$atomic plane state, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjjubjZ )}(h;``struct drm_plane *plane`` plane object, must not be NULL h](j` )}(h``struct drm_plane *plane``h]jf )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj| )}(hhh]h)}(hplane object, must not be NULLh]hplane object, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjjubeh}(h]h ]h"]h$]h&]uh1jT hjNubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjNubh)}(h}Initializes the newly allocated **plane_state** with default values. This is useful for drivers that subclass the CRTC state.h](h Initializes the newly allocated }(hjhhhNhNubj )}(h**plane_state**h]h plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhN with default values. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjNubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,__drm_atomic_helper_plane_reset (C function)!c.__drm_atomic_helper_plane_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hcvoid __drm_atomic_helper_plane_reset (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(hbvoid __drm_atomic_helper_plane_reset(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM/ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:hhhjLhM/ubj )}(h__drm_atomic_helper_plane_reseth]j )}(h__drm_atomic_helper_plane_reseth]h__drm_atomic_helper_plane_reset}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj:hhhjLhM/ubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjasb!c.__drm_atomic_helper_plane_resetasbuh1hhjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjwubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjsubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j!c.__drm_atomic_helper_plane_resetasbuh1hhjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h plane_stateh]h plane_state}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjsubeh}(h]h ]h"]h$]h&]j j uh1jhj:hhhjLhM/ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj6hhhjLhM/ubah}(h]j1ah ](j j eh"]h$]h&]j j )j huh1j{ hjLhM/hj3hhubj )}(hhh]h)}(hreset state on planeh]hreset state on plane}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM/hjkhhubah}(h]h ]h"]h$]h&]uh1j hj3hhhjLhM/ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` drm plane ``struct drm_plane_state *plane_state`` plane state to assign **Description** Initializes the newly allocated **plane_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **plane**, usually required when initializing the drivers or when called from the :c:type:`drm_plane_funcs.reset ` hook. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM3hjubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` drm plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM0hjubj| )}(hhh]h)}(h drm planeh]h drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM0hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM0hjubjZ )}(h>``struct drm_plane_state *plane_state`` plane state to assign h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hjh]h#struct drm_plane_state *plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM1hjubj| )}(hhh]h)}(hplane state to assignh]hplane state to assign}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM1hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM1hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj#h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM3hjubh)}(hInitializes the newly allocated **plane_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **plane**, usually required when initializing the drivers or when called from the :c:type:`drm_plane_funcs.reset ` hook.h](h Initializes the newly allocated }(hj9hhhNhNubj )}(h**plane_state**h]h plane_state}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubh and assigns it to the }(hj9hhhNhNubh)}(h$:c:type:`drm_crtc->state `h]jf )}(hjUh]hdrm_crtc->state}(hjWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtcuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM2hj9ubh pointer of }(hj9hhhNhNubj )}(h **plane**h]hplane}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubhI, usually required when initializing the drivers or when called from the }(hj9hhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]jf )}(hjh]hdrm_plane_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhjrhM2hj9ubh hook.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjrhM2hjubh)}(h9This is useful for drivers that subclass the plane state.h]h9This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM7hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_atomic_helper_plane_reset (C function)c.drm_atomic_helper_plane_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hmodnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_helper_plane_resetasbuh1hhjubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hplaneh]hplane}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMEubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMEubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMEhjhhubj )}(hhh]h)}(hIdefault :c:type:`drm_plane_funcs.reset ` hook for planesh](hdefault }(hjhhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]jf )}(hjh]hdrm_plane_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jXc.drm_atomic_helper_plane_resetasbj drm_plane_funcsuh1hhjhKBhjubh hook for planes}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMEhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMEubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_plane *plane`` drm plane **Description** Resets the atomic state for **plane** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMIhjubjU )}(hhh]jZ )}(h&``struct drm_plane *plane`` drm plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hj h]hstruct drm_plane *plane}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMFhjubj| )}(hhh]h)}(h drm planeh]h drm plane}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMFhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjEh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMHhjubh)}(hResets the atomic state for **plane** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hj[hhhNhNubj )}(h **plane**h]hplane}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMGhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6__drm_atomic_helper_plane_duplicate_state (C function)+c.__drm_atomic_helper_plane_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hgvoid __drm_atomic_helper_plane_duplicate_state (struct drm_plane *plane, struct drm_plane_state *state)h]j )}(hfvoid __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMXubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMXubj )}(h)__drm_atomic_helper_plane_duplicate_stateh]j )}(h)__drm_atomic_helper_plane_duplicate_stateh]h)__drm_atomic_helper_plane_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMXubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb+c.__drm_atomic_helper_plane_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hplaneh]hplane}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j+c.__drm_atomic_helper_plane_duplicate_stateasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMXubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMXubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMXhjhhubj )}(hhh]h)}(hcopy atomic plane stateh]hcopy atomic plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMXhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMXubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_plane *plane`` plane object ``struct drm_plane_state *state`` atomic plane state **Description** Copies atomic state from a plane's current state. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM\hjubjU )}(hhh](jZ )}(h)``struct drm_plane *plane`` plane object h](j` )}(h``struct drm_plane *plane``h]jf )}(hj h]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMYhjubj| )}(hhh]h)}(h plane objecth]h plane object}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMYhj#ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj"hMYhjubjZ )}(h5``struct drm_plane_state *state`` atomic plane state h](j` )}(h!``struct drm_plane_state *state``h]jf )}(hjFh]hstruct drm_plane_state *state}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMZhj@ubj| )}(hhh]h)}(hatomic plane stateh]hatomic plane state}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMZhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj[hMZhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM\hjubh)}(hkCopies atomic state from a plane's current state. This is useful for drivers that subclass the plane state.h]hmCopies atomic state from a plane’s current state. This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM[hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_atomic_helper_plane_duplicate_state (C function))c.drm_atomic_helper_plane_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hZstruct drm_plane_state * drm_atomic_helper_plane_duplicate_state (struct drm_plane *plane)h]j )}(hXstruct drm_plane_state *drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMoubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j'drm_atomic_helper_plane_duplicate_statesb)c.drm_atomic_helper_plane_duplicate_stateasbuh1hhjhhhjhMoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMoubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMoubj )}(h'drm_atomic_helper_plane_duplicate_stateh]j )}(hjh]h'drm_atomic_helper_plane_duplicate_state}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMoubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j)c.drm_atomic_helper_plane_duplicate_stateasbuh1hhj<ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj<ubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMoubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMoubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMohjhhubj )}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMohjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMoubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_plane *plane`` drm plane **Description** Default plane state duplicate hook for drivers which don't have their own subclassed plane state structure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMshjubjU )}(hhh]jZ )}(h&``struct drm_plane *plane`` drm plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMphjubj| )}(hhh]h)}(h drm planeh]h drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMphjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj=h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMrhjubh)}(hkDefault plane state duplicate hook for drivers which don't have their own subclassed plane state structure.h]hmDefault plane state duplicate hook for drivers which don’t have their own subclassed plane state structure.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMqhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4__drm_atomic_helper_plane_destroy_state (C function))c.__drm_atomic_helper_plane_destroy_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hLvoid __drm_atomic_helper_plane_destroy_state (struct drm_plane_state *state)h]j )}(hKvoid __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhhjhMubj )}(h'__drm_atomic_helper_plane_destroy_stateh]j )}(h'__drm_atomic_helper_plane_destroy_stateh]h'__drm_atomic_helper_plane_destroy_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj~hhhjhMubj)}(h(struct drm_plane_state *state)h]j)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb)c.__drm_atomic_helper_plane_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj~hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjzhhhjhMubah}(h]juah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjwhhubj )}(hhh]h)}(hrelease plane stateh]hrelease plane state}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj?hhubah}(h]h ]h"]h$]h&]uh1j hjwhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jZj jZj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_plane_state *state`` plane state object to release **Description** Releases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j )}(hjdh]h Parameters}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj^ubjU )}(hhh]jZ )}(h@``struct drm_plane_state *state`` plane state object to release h](j` )}(h!``struct drm_plane_state *state``h]jf )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj}ubj| )}(hhh]h)}(hplane state object to releaseh]hplane state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjzubah}(h]h ]h"]h$]h&]uh1jT hj^ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj^ubh)}(hReleases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.h]hReleases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_atomic_helper_plane_destroy_state (C function)'c.drm_atomic_helper_plane_destroy_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hcvoid drm_atomic_helper_plane_destroy_state (struct drm_plane *plane, struct drm_plane_state *state)h]j )}(hbvoid drm_atomic_helper_plane_destroy_state(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h%drm_atomic_helper_plane_destroy_stateh]j )}(h%drm_atomic_helper_plane_destroy_stateh]h%drm_atomic_helper_plane_destroy_state}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j)}jj&sb'c.drm_atomic_helper_plane_destroy_stateasbuh1hhj<ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj<ubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jz'c.drm_atomic_helper_plane_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj0hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jKj jKj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_plane *plane`` drm plane ``struct drm_plane_state *state`` plane state object to release **Description** Default plane state destroy hook for drivers which don't have their own subclassed plane state structure.h](h)}(h**Parameters**h]j )}(hjUh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjOubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` drm plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjth]hstruct drm_plane *plane}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjnubj| )}(hhh]h)}(h drm planeh]h drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjkubjZ )}(h@``struct drm_plane_state *state`` plane state object to release h](j` )}(h!``struct drm_plane_state *state``h]jf )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(hplane state object to releaseh]hplane state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjkubeh}(h]h ]h"]h$]h&]uh1jT hjOubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjOubh)}(hiDefault plane state destroy hook for drivers which don't have their own subclassed plane state structure.h]hkDefault plane state destroy hook for drivers which don’t have their own subclassed plane state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6__drm_atomic_helper_connector_state_reset (C function)+c.__drm_atomic_helper_connector_state_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hxvoid __drm_atomic_helper_connector_state_reset (struct drm_connector_state *conn_state, struct drm_connector *connector)h]j )}(hwvoid __drm_atomic_helper_connector_state_reset(struct drm_connector_state *conn_state, struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)hhhj;hMubj )}(h)__drm_atomic_helper_connector_state_reseth]j )}(h)__drm_atomic_helper_connector_state_reseth]h)__drm_atomic_helper_connector_state_reset}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ](j j eh"]h$]h&]j j uh1j hj)hhhj;hMubj)}(hI(struct drm_connector_state *conn_state, struct drm_connector *connector)h](j)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjPsb+c.__drm_atomic_helper_connector_state_resetasbuh1hhjfubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfubj )}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjbubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j+c.__drm_atomic_helper_connector_state_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjbubeh}(h]h ]h"]h$]h&]j j uh1jhj)hhhj;hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj%hhhj;hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj;hMhj"hhubj )}(hhh]h)}(hreset the connector stateh]hreset the connector state}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjZhhubah}(h]h ]h"]h$]h&]uh1j hj"hhhj;hMubeh}(h]h ](j functioneh"]h$]h&]j j j juj juj j j uh1jv hhhjhNhNubj )}(hXD**Parameters** ``struct drm_connector_state *conn_state`` atomic connector state, must not be NULL ``struct drm_connector *connector`` connectotr object, must not be NULL **Description** Initializes the newly allocated **conn_state** with default values. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjyubjU )}(hhh](jZ )}(hT``struct drm_connector_state *conn_state`` atomic connector state, must not be NULL h](j` )}(h*``struct drm_connector_state *conn_state``h]jf )}(hjh]h&struct drm_connector_state *conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(h(atomic connector state, must not be NULLh]h(atomic connector state, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hH``struct drm_connector *connector`` connectotr object, must not be NULL h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(h#connectotr object, must not be NULLh]h#connectotr object, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjyubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjyubh)}(hInitializes the newly allocated **conn_state** with default values. This is useful for drivers that subclass the connector state.h](h Initializes the newly allocated }(hj(hhhNhNubj )}(h**conn_state**h]h conn_state}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubhS with default values. This is useful for drivers that subclass the connector state.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjyubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0__drm_atomic_helper_connector_reset (C function)%c.__drm_atomic_helper_connector_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hrvoid __drm_atomic_helper_connector_reset (struct drm_connector *connector, struct drm_connector_state *conn_state)h]j )}(hqvoid __drm_atomic_helper_connector_reset(struct drm_connector *connector, struct drm_connector_state *conn_state)h](j)}(hvoidh]hvoid}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjwhMubj )}(h#__drm_atomic_helper_connector_reseth]j )}(h#__drm_atomic_helper_connector_reseth]h#__drm_atomic_helper_connector_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjwhMubj)}(hI(struct drm_connector *connector, struct drm_connector_state *conn_state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb%c.__drm_atomic_helper_connector_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j%c.__drm_atomic_helper_connector_resetasbuh1hhjubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjbhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h conn_stateh]h conn_state}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjehhhjwhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjwhMubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j{ hjwhMhj^hhubj )}(hhh]h)}(hreset state on connectorh]hreset state on connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj^hhhjwhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` drm connector ``struct drm_connector_state *conn_state`` connector state to assign **Description** Initializes the newly allocated **conn_state** and assigns it to the :c:type:`drm_connector->state ` pointer of **connector**, usually required when initializing the drivers or when called from the :c:type:`drm_connector_funcs.reset ` hook. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` drm connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hE``struct drm_connector_state *conn_state`` connector state to assign h](j` )}(h*``struct drm_connector_state *conn_state``h]jf )}(hjh]h&struct drm_connector_state *conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj| )}(hhh]h)}(hconnector state to assignh]hconnector state to assign}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj(hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjNh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hXInitializes the newly allocated **conn_state** and assigns it to the :c:type:`drm_connector->state ` pointer of **connector**, usually required when initializing the drivers or when called from the :c:type:`drm_connector_funcs.reset ` hook.h](h Initializes the newly allocated }(hjdhhhNhNubj )}(h**conn_state**h]h conn_state}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubh and assigns it to the }(hjdhhhNhNubh)}(h.:c:type:`drm_connector->state `h]jf )}(hjh]hdrm_connector->state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjdubh pointer of }(hjdhhhNhNubj )}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubhI, usually required when initializing the drivers or when called from the }(hjdhhhNhNubh)}(h9:c:type:`drm_connector_funcs.reset `h]jf )}(hjh]hdrm_connector_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhjhMhjdubh hook.}(hjdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h=This is useful for drivers that subclass the connector state.h]h=This is useful for drivers that subclass the connector state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_atomic_helper_connector_reset (C function)#c.drm_atomic_helper_connector_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hHvoid drm_atomic_helper_connector_reset (struct drm_connector *connector)h]j )}(hGvoid drm_atomic_helper_connector_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h!drm_atomic_helper_connector_reseth]j )}(h!drm_atomic_helper_connector_reseth]h!drm_atomic_helper_connector_reset}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjimodnameN classnameNj j )}j ]j)}jj/sb#c.drm_atomic_helper_connector_resetasbuh1hhjEubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjEubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjAubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hUdefault :c:type:`drm_connector_funcs.reset ` hook for connectorsh](hdefault }(hjhhhNhNubh)}(h9:c:type:`drm_connector_funcs.reset `h]jf )}(hjh]hdrm_connector_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j#c.drm_atomic_helper_connector_resetasbj drm_connector_funcsuh1hhjhKBhjubh hook for connectors}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_connector *connector`` drm connector **Description** Resets the atomic state for **connector** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` drm connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj5h]hstruct drm_connector *connector}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj/ubj| )}(hhh]h)}(h drm connectorh]h drm connector}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjKubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hjJhMhj,ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjph]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hResets the atomic state for **connector** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hjhhhNhNubj )}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 9drm_atomic_helper_connector_tv_margins_reset (C function).c.drm_atomic_helper_connector_tv_margins_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hSvoid drm_atomic_helper_connector_tv_margins_reset (struct drm_connector *connector)h]j )}(hRvoid drm_atomic_helper_connector_tv_margins_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h,drm_atomic_helper_connector_tv_margins_reseth]j )}(h,drm_atomic_helper_connector_tv_margins_reseth]h,drm_atomic_helper_connector_tv_margins_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j)}jjsb.c.drm_atomic_helper_connector_tv_margins_resetasbuh1hhjubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjPhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hResets TV connector propertiesh]hResets TV connector properties}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_connector *connector`` DRM connector **Description** Resets the TV-related properties attached to a connector.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` DRM connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(h DRM connectorh]h DRM connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h9Resets the TV-related properties attached to a connector.h]h9Resets the TV-related properties attached to a connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_atomic_helper_connector_tv_reset (C function)&c.drm_atomic_helper_connector_tv_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hKvoid drm_atomic_helper_connector_tv_reset (struct drm_connector *connector)h]j )}(hJvoid drm_atomic_helper_connector_tv_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDhhhjVhMubj )}(h$drm_atomic_helper_connector_tv_reseth]j )}(h$drm_atomic_helper_connector_tv_reseth]h$drm_atomic_helper_connector_tv_reset}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ](j j eh"]h$]h&]j j uh1j hjDhhhjVhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjksb&c.drm_atomic_helper_connector_tv_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubah}(h]h ]h"]h$]h&]j j uh1jhjDhhhjVhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj@hhhjVhMubah}(h]j;ah ](j j eh"]h$]h&]j j )j huh1j{ hjVhMhj=hhubj )}(hhh]h)}(h%Resets Analog TV connector propertiesh]h%Resets Analog TV connector properties}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj=hhhjVhMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_connector *connector`` DRM connector **Description** Resets the analog TV properties attached to a connectorh](h)}(h**Parameters**h]j )}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj$ubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` DRM connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjIh]hstruct drm_connector *connector}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjCubj| )}(hhh]h)}(h DRM connectorh]h DRM connector}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj_ubah}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhj@ubah}(h]h ]h"]h$]h&]uh1jT hj$ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj$ubh)}(h7Resets the analog TV properties attached to a connectorh]h7Resets the analog TV properties attached to a connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_atomic_helper_connector_tv_check (C function)&c.drm_atomic_helper_connector_tv_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hkint drm_atomic_helper_connector_tv_check (struct drm_connector *connector, struct drm_atomic_commit *state)h]j )}(hjint drm_atomic_helper_connector_tv_check(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMEubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMEubj )}(h$drm_atomic_helper_connector_tv_checkh]j )}(h$drm_atomic_helper_connector_tv_checkh]h$drm_atomic_helper_connector_tv_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMEubj)}(hB(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j)}jjsb&c.drm_atomic_helper_connector_tv_checkasbuh1hhjubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjRhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j@&c.drm_atomic_helper_connector_tv_checkasbuh1hhjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjtubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMEubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMEubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMEhjhhubj )}(hhh]h)}(h%Validate an analog TV connector stateh]h%Validate an analog TV connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMEhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMEubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX,**Parameters** ``struct drm_connector *connector`` DRM Connector ``struct drm_atomic_commit *state`` the DRM State object **Description** Checks the state object to see if the requested state is valid for an analog TV connector. **Return** ``0`` for success, a negative error code on error.h](hΕ)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMIhjubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` DRM Connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj:h]hstruct drm_connector *connector}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMFhj4ubj| )}(hhh]h)}(h DRM Connectorh]h DRM Connector}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMFhjPubah}(h]h ]h"]h$]h&]uh1j{ hj4ubeh}(h]h ]h"]h$]h&]uh1jY hjOhMFhj1ubjZ )}(h9``struct drm_atomic_commit *state`` the DRM State object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjsh]hstruct drm_atomic_commit *state}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMGhjmubj| )}(hhh]h)}(hthe DRM State objecth]hthe DRM State object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hjhMGhj1ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMIhjubh)}(hZChecks the state object to see if the requested state is valid for an analog TV connector.h]hZChecks the state object to see if the requested state is valid for an analog TV connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMHhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMKhjubh)}(h2``0`` for success, a negative error code on error.h](jf )}(h``0``h]h0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh- for success, a negative error code on error.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMLhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq :__drm_atomic_helper_connector_duplicate_state (C function)/c.__drm_atomic_helper_connector_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hwvoid __drm_atomic_helper_connector_duplicate_state (struct drm_connector *connector, struct drm_connector_state *state)h]j )}(hvvoid __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMvubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$hhhj6hMvubj )}(h-__drm_atomic_helper_connector_duplicate_stateh]j )}(h-__drm_atomic_helper_connector_duplicate_stateh]h-__drm_atomic_helper_connector_duplicate_state}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ](j j eh"]h$]h&]j j uh1j hj$hhhj6hMvubj)}(hD(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjKsb/c.__drm_atomic_helper_connector_duplicate_stateasbuh1hhjaubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjaubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubj)}(h!struct drm_connector_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j/c.__drm_atomic_helper_connector_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj!hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubeh}(h]h ]h"]h$]h&]j j uh1jhj$hhhj6hMvubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj6hMvubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj6hMvhjhhubj )}(hhh]h)}(hcopy atomic connector stateh]hcopy atomic connector state}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMvhjUhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj6hMvubeh}(h]h ](j functioneh"]h$]h&]j j j jpj jpj j j uh1jv hhhjhNhNubj )}(hX **Parameters** ``struct drm_connector *connector`` connector object ``struct drm_connector_state *state`` atomic connector state **Description** Copies atomic state from a connector's current state. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j )}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMzhjtubjU )}(hhh](jZ )}(h5``struct drm_connector *connector`` connector object h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMwhjubj| )}(hhh]h)}(hconnector objecth]hconnector object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMwhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMwhjubjZ )}(h=``struct drm_connector_state *state`` atomic connector state h](j` )}(h%``struct drm_connector_state *state``h]jf )}(hjh]h!struct drm_connector_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMxhjubj| )}(hhh]h)}(hatomic connector stateh]hatomic connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMxhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMxhjubeh}(h]h ]h"]h$]h&]uh1jT hjtubh)}(h**Description**h]j )}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMzhjtubh)}(hsCopies atomic state from a connector's current state. This is useful for drivers that subclass the connector state.h]huCopies atomic state from a connector’s current state. This is useful for drivers that subclass the connector state.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMyhjtubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 8drm_atomic_helper_connector_duplicate_state (C function)-c.drm_atomic_helper_connector_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hjstruct drm_connector_state * drm_atomic_helper_connector_duplicate_state (struct drm_connector *connector)h]j )}(hhstruct drm_connector_state *drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector)h](j )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhj_hMubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]j)}j+drm_atomic_helper_connector_duplicate_statesb-c.drm_atomic_helper_connector_duplicate_stateasbuh1hhjNhhhj_hMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhj_hMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjNhhhj_hMubj )}(h+drm_atomic_helper_connector_duplicate_stateh]j )}(hjh]h+drm_atomic_helper_connector_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhj_hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j-c.drm_atomic_helper_connector_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjNhhhj_hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhj_hMubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j{ hj_hMhjGhhubj )}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjJhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhj_hMubeh}(h]h ](j functioneh"]h$]h&]j j j jej jej j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_connector *connector`` drm connector **Description** Default connector state duplicate hook for drivers which don't have their own subclassed connector state structure.h](h)}(h**Parameters**h]j )}(hjoh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjiubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` drm connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjiubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjiubh)}(hsDefault connector state duplicate hook for drivers which don't have their own subclassed connector state structure.h]huDefault connector state duplicate hook for drivers which don’t have their own subclassed connector state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 8__drm_atomic_helper_connector_destroy_state (C function)-c.__drm_atomic_helper_connector_destroy_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hTvoid __drm_atomic_helper_connector_destroy_state (struct drm_connector_state *state)h]j )}(hSvoid __drm_atomic_helper_connector_destroy_state(struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj )}(h+__drm_atomic_helper_connector_destroy_stateh]j )}(h+__drm_atomic_helper_connector_destroy_stateh]h+__drm_atomic_helper_connector_destroy_state}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMubj)}(h#(struct drm_connector_state *state)h]j)}(h!struct drm_connector_state *stateh](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j)}jj1sb-c.__drm_atomic_helper_connector_destroy_stateasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubah}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hrelease connector stateh]hrelease connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_connector_state *state`` connector state object to release **Description** Releases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjU )}(hhh]jZ )}(hH``struct drm_connector_state *state`` connector state object to release h](j` )}(h%``struct drm_connector_state *state``h]jf )}(hjh]h!struct drm_connector_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj| )}(hhh]h)}(h!connector state object to releaseh]h!connector state object to release}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj%ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj$hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hReleases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.h]hReleases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6drm_atomic_helper_connector_destroy_state (C function)+c.drm_atomic_helper_connector_destroy_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hsvoid drm_atomic_helper_connector_destroy_state (struct drm_connector *connector, struct drm_connector_state *state)h]j )}(hrvoid drm_atomic_helper_connector_destroy_state(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h)drm_atomic_helper_connector_destroy_stateh]j )}(h)drm_atomic_helper_connector_destroy_stateh]h)drm_atomic_helper_connector_destroy_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hD(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb+c.drm_atomic_helper_connector_destroy_stateasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_connector_state *stateh](j )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j+c.drm_atomic_helper_connector_destroy_stateasbuh1hhj:ubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj:ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` drm connector ``struct drm_connector_state *state`` connector state object to release **Description** Default connector state destroy hook for drivers which don't have their own subclassed connector state structure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` drm connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hH``struct drm_connector_state *state`` connector state object to release h](j` )}(h%``struct drm_connector_state *state``h]jf )}(hj9h]h!struct drm_connector_state *state}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj3ubj| )}(hhh]h)}(h!connector state object to releaseh]h!connector state object to release}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhMhjOubah}(h]h ]h"]h$]h&]uh1j{ hj3ubeh}(h]h ]h"]h$]h&]uh1jY hjNhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjth]h Description}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hqDefault connector state destroy hook for drivers which don't have their own subclassed connector state structure.h]hsDefault connector state destroy hook for drivers which don’t have their own subclassed connector state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 9__drm_atomic_helper_private_obj_create_state (C function).c.__drm_atomic_helper_private_obj_create_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hpvoid __drm_atomic_helper_private_obj_create_state (struct drm_private_obj *obj, struct drm_private_state *state)h]j )}(hovoid __drm_atomic_helper_private_obj_create_state(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h,__drm_atomic_helper_private_obj_create_stateh]j )}(h,__drm_atomic_helper_private_obj_create_stateh]h,__drm_atomic_helper_private_obj_create_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h>(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hstruct drm_private_obj *objh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_private_objh]hdrm_private_obj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb.c.__drm_atomic_helper_private_obj_create_stateasbuh1hhjubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hobjh]hobj}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_private_state *stateh](j )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(hdrm_private_stateh]hdrm_private_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0.c.__drm_atomic_helper_private_obj_create_stateasbuh1hhjdubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h initializes private object stateh]h initializes private object state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXC**Parameters** ``struct drm_private_obj *obj`` private object ``struct drm_private_state *state`` new state to initialize **Description** Initializes the newly allocated **state**, usually required when initializing the drivers. **obj** is assumed to be zeroed. This is useful for drivers that use private states.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjU )}(hhh](jZ )}(h/``struct drm_private_obj *obj`` private object h](j` )}(h``struct drm_private_obj *obj``h]jf )}(hj*h]hstruct drm_private_obj *obj}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj$ubj| )}(hhh]h)}(hprivate objecth]hprivate object}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj@ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj?hMhj!ubjZ )}(h<``struct drm_private_state *state`` new state to initialize h](j` )}(h#``struct drm_private_state *state``h]jf )}(hjch]hstruct drm_private_state *state}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj]ubj| )}(hhh]h)}(hnew state to initializeh]hnew state to initialize}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hjxhMhj!ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hZInitializes the newly allocated **state**, usually required when initializing the drivers.h](h Initializes the newly allocated }(hjhhhNhNubj )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh1, usually required when initializing the drivers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h **obj** is assumed to be zeroed.h](j )}(h**obj**h]hobj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh is assumed to be zeroed.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h3This is useful for drivers that use private states.h]h3This is useful for drivers that use private states.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq <__drm_atomic_helper_private_obj_duplicate_state (C function)1c.__drm_atomic_helper_private_obj_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hsvoid __drm_atomic_helper_private_obj_duplicate_state (struct drm_private_obj *obj, struct drm_private_state *state)h]j )}(hrvoid __drm_atomic_helper_private_obj_duplicate_state(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hvoidh]hvoid}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj/hMubj )}(h/__drm_atomic_helper_private_obj_duplicate_stateh]j )}(h/__drm_atomic_helper_private_obj_duplicate_stateh]h/__drm_atomic_helper_private_obj_duplicate_state}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj/hMubj)}(h>(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hstruct drm_private_obj *objh](j )}(hj h]hstruct}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubh)}(hhh]j )}(hdrm_private_objh]hdrm_private_obj}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]j)}jjDsb1c.__drm_atomic_helper_private_obj_duplicate_stateasbuh1hhjZubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZubj )}(hobjh]hobj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubj)}(hstruct drm_private_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_private_stateh]hdrm_private_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j1c.__drm_atomic_helper_private_obj_duplicate_stateasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj' hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj/hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj/hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj/hMhjhhubj )}(hhh]h)}(hcopy atomic private stateh]hcopy atomic private state}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjN hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj/hMubeh}(h]h ](j functioneh"]h$]h&]j j j ji j ji j j j uh1jv hhhjhNhNubj )}(hX"**Parameters** ``struct drm_private_obj *obj`` CRTC object ``struct drm_private_state *state`` new private object state **Description** Copies atomic state from a private objects's current state and resets inferred values. This is useful for drivers that subclass the private state.h](h)}(h**Parameters**h]j )}(hjs h]h Parameters}(hju hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjq ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjm ubjU )}(hhh](jZ )}(h,``struct drm_private_obj *obj`` CRTC object h](j` )}(h``struct drm_private_obj *obj``h]jf )}(hj h]hstruct drm_private_obj *obj}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj| )}(hhh]h)}(h CRTC objecth]h CRTC object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj ubjZ )}(h=``struct drm_private_state *state`` new private object state h](j` )}(h#``struct drm_private_state *state``h]jf )}(hj h]hstruct drm_private_state *state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj| )}(hhh]h)}(hnew private object stateh]hnew private object state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj ubeh}(h]h ]h"]h$]h&]uh1jT hjm ubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjm ubh)}(hCopies atomic state from a private objects's current state and resets inferred values. This is useful for drivers that subclass the private state.h]hCopies atomic state from a private objects’s current state and resets inferred values. This is useful for drivers that subclass the private state.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjm ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 7__drm_atomic_helper_bridge_duplicate_state (C function),c.__drm_atomic_helper_bridge_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hkvoid __drm_atomic_helper_bridge_duplicate_state (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j )}(hjvoid __drm_atomic_helper_bridge_duplicate_state(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjK hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjZ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG hhhjY hMubj )}(h*__drm_atomic_helper_bridge_duplicate_stateh]j )}(h*__drm_atomic_helper_bridge_duplicate_stateh]h*__drm_atomic_helper_bridge_duplicate_state}(hjl hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjG hhhjY hMubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjn sb,c.__drm_atomic_helper_bridge_duplicate_stateasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hbridgeh]hbridge}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct drm_bridge_state *stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j ,c.__drm_atomic_helper_bridge_duplicate_stateasbuh1hhj ubj )}(h h]h }(hj6 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjD hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hstateh]hstate}(hjQ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjG hhhjY hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjC hhhjY hMubah}(h]j> ah ](j j eh"]h$]h&]j j )j huh1j{ hjY hMhj@ hhubj )}(hhh]h)}(hCopy atomic bridge stateh]hCopy atomic bridge state}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjx hhubah}(h]h ]h"]h$]h&]uh1j hj@ hhhjY hMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object ``struct drm_bridge_state *state`` atomic bridge state **Description** Copies atomic state from a bridge's current state and resets inferred values. This is useful for drivers that subclass the bridge state.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubjU )}(hhh](jZ )}(h,``struct drm_bridge *bridge`` bridge object h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hj h]hstruct drm_bridge *bridge}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj| )}(hhh]h)}(h bridge objecth]h bridge object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj ubjZ )}(h7``struct drm_bridge_state *state`` atomic bridge state h](j` )}(h"``struct drm_bridge_state *state``h]jf )}(hj h]hstruct drm_bridge_state *state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj| )}(hhh]h)}(hatomic bridge stateh]hatomic bridge state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj0 h]h Description}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj. ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubh)}(hCopies atomic state from a bridge's current state and resets inferred values. This is useful for drivers that subclass the bridge state.h]hCopies atomic state from a bridge’s current state and resets inferred values. This is useful for drivers that subclass the bridge state.}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5drm_atomic_helper_bridge_duplicate_state (C function)*c.drm_atomic_helper_bridge_duplicate_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h^struct drm_bridge_state * drm_atomic_helper_bridge_duplicate_state (struct drm_bridge *bridge)h]j )}(h\struct drm_bridge_state *drm_atomic_helper_bridge_duplicate_state(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hju hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq hhhj hMubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}j(drm_atomic_helper_bridge_duplicate_statesb*c.drm_atomic_helper_bridge_duplicate_stateasbuh1hhjq hhhj hMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq hhhj hMubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjq hhhj hMubj )}(h(drm_atomic_helper_bridge_duplicate_stateh]j )}(hj h]h(drm_atomic_helper_bridge_duplicate_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjq hhhj hMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j *c.drm_atomic_helper_bridge_duplicate_stateasbuh1hhj ubj )}(h h]h }(hj+ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj9 hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hbridgeh]hbridge}(hjF hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjq hhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjm hhhj hMubah}(h]jh ah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjj hhubj )}(hhh]h)}(hDuplicate a bridge state objecth]hDuplicate a bridge state object}(hjp hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjm hhubah}(h]h ]h"]h$]h&]uh1j hjj hhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hXM**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** Allocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_duplicate_state ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubjU )}(hhh]jZ )}(h,``struct drm_bridge *bridge`` bridge object h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hj h]hstruct drm_bridge *bridge}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj| )}(hhh]h)}(h bridge objecth]h bridge object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubh)}(hAllocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_duplicate_state ` hook for bridges that don't subclass the bridge state.h](hAllocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge }(hjhhhNhNubh)}(hD:c:type:`drm_bridge_funcs.atomic_duplicate_state `h]jf )}(hj h]h'drm_bridge_funcs.atomic_duplicate_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh9 hook for bridges that don’t subclass the bridge state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj)hMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_atomic_helper_bridge_destroy_state (C function)(c.drm_atomic_helper_bridge_destroy_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hgvoid drm_atomic_helper_bridge_destroy_state (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j )}(hfvoid drm_atomic_helper_bridge_destroy_state(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjbhMubj )}(h&drm_atomic_helper_bridge_destroy_stateh]j )}(h&drm_atomic_helper_bridge_destroy_stateh]h&drm_atomic_helper_bridge_destroy_state}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjbhMubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjwsb(c.drm_atomic_helper_bridge_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_bridge_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j(c.drm_atomic_helper_bridge_destroy_stateasbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjPhhhjbhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjbhMubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j{ hjbhMhjIhhubj )}(hhh]h)}(hDestroy a bridge state objecth]hDestroy a bridge state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjbhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` the bridge this state refers to ``struct drm_bridge_state *state`` bridge state to destroy **Description** Destroys a bridge state previously created by :c:type:`drm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM!hjubjU )}(hhh](jZ )}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h;``struct drm_bridge_state *state`` bridge state to destroy h](j` )}(h"``struct drm_bridge_state *state``h]jf )}(hjh]hstruct drm_bridge_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj| )}(hhh]h)}(hbridge state to destroyh]hbridge state to destroy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj9h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM!hjubh)}(hX7Destroys a bridge state previously created by :c:type:`drm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state ` hook for bridges that don't subclass the bridge state.h](h.Destroys a bridge state previously created by }(hjOhhhNhNubh)}(h:c:type:`drm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state `h]jf )}(hjYh]hdrm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state}(hj[hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hjOubh9 hook for bridges that don’t subclass the bridge state.}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjvhM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -__drm_atomic_helper_bridge_reset (C function)"c.__drm_atomic_helper_bridge_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(havoid __drm_atomic_helper_bridge_reset (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j )}(h`void __drm_atomic_helper_bridge_reset(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM/ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM/ubj )}(h __drm_atomic_helper_bridge_reseth]j )}(h __drm_atomic_helper_bridge_reseth]h __drm_atomic_helper_bridge_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM/ubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb"c.__drm_atomic_helper_bridge_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_bridge_state *stateh](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]j"c.__drm_atomic_helper_bridge_resetasbuh1hhjLubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjLubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM/ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM/ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM/hjhhubj )}(hhh]h)}(h(Initialize a bridge state to its defaulth]h(Initialize a bridge state to its default}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM/hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM/ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXg**Parameters** ``struct drm_bridge *bridge`` the bridge this state refers to ``struct drm_bridge_state *state`` bridge state to initialize **Description** Initializes the bridge state to default values. This is meant to be called by the bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that subclass the bridge state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM3hjubjU )}(hhh](jZ )}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM1hj ubj| )}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM1hj(ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj'hM1hj ubjZ )}(h>``struct drm_bridge_state *state`` bridge state to initialize h](j` )}(h"``struct drm_bridge_state *state``h]jf )}(hjKh]hstruct drm_bridge_state *state}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM2hjEubj| )}(hhh]h)}(hbridge state to initializeh]hbridge state to initialize}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM2hjaubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj`hM2hj ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM4hjubh)}(hInitializes the bridge state to default values. This is meant to be called by the bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that subclass the bridge state.h](hYInitializes the bridge state to default values. This is meant to be called by the bridge }(hjhhhNhNubh)}(h::c:type:`drm_bridge_funcs.atomic_reset `h]jf )}(hjh]hdrm_bridge_funcs.atomic_reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM3hjubh1 hook for bridges that subclass the bridge state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM3hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_atomic_helper_bridge_reset (C function) c.drm_atomic_helper_bridge_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hTstruct drm_bridge_state * drm_atomic_helper_bridge_reset (struct drm_bridge *bridge)h]j )}(hRstruct drm_bridge_state *drm_atomic_helper_bridge_reset(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMBubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_atomic_helper_bridge_resetsb c.drm_atomic_helper_bridge_resetasbuh1hhjhhhjhMBubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMBubj)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMBubj )}(hdrm_atomic_helper_bridge_reseth]j )}(hj+h]hdrm_atomic_helper_bridge_reset}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMBubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j) c.drm_atomic_helper_bridge_resetasbuh1hhjdubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMBubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMBhjhhubj )}(hhh]h)}(h5Allocate and initialize a bridge state to its defaulth]h5Allocate and initialize a bridge state to its default}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMBhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMBubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX@**Parameters** ``struct drm_bridge *bridge`` the bridge this state refers to **Description** Allocates the bridge state and initializes it to default values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMFhjubjU )}(hhh]jZ )}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hj*h]hstruct drm_bridge *bridge}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMDhj$ubj| )}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMDhj@ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj?hMDhj!ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjeh]h Description}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMFhjubh)}(hAllocates the bridge state and initializes it to default values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that don't subclass the bridge state.h](hmAllocates the bridge state and initializes it to default values. This helper is meant to be used as a bridge }(hj{hhhNhNubh)}(h::c:type:`drm_bridge_funcs.atomic_reset `h]jf )}(hjh]hdrm_bridge_funcs.atomic_reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMEhj{ubh9 hook for bridges that don’t subclass the bridge state.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMEhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubeh}(h]jeah ]h"]atomic state helper referenceah$]h&]uh1hhjqBhhhhhKPubh)}(hhh](h)}(hGEM Atomic Helper Referenceh]hGEM Atomic Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKVubh)}(hThe GEM atomic helpers library implements generic atomic-commit functions for drivers that use GEM objects. Currently, it provides synchronization helpers, and plane state and framebuffer BO mappings for planes with shadow buffers.h]hThe GEM atomic helpers library implements generic atomic-commit functions for drivers that use GEM objects. Currently, it provides synchronization helpers, and plane state and framebuffer BO mappings for planes with shadow buffers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjhhubh)}(hXBefore scanout, a plane's framebuffer needs to be synchronized with possible writers that draw into the framebuffer. All drivers should call drm_gem_plane_helper_prepare_fb() from their implementation of struct :c:type:`drm_plane_helper.prepare_fb ` . It sets the plane's fence from the framebuffer so that the DRM core can synchronize access automatically. drm_gem_plane_helper_prepare_fb() can also be used directly as implementation of prepare_fb.h](hBefore scanout, a plane’s framebuffer needs to be synchronized with possible writers that draw into the framebuffer. All drivers should call drm_gem_plane_helper_prepare_fb() from their implementation of struct }(hjhhhNhNubh)}(h8:c:type:`drm_plane_helper.prepare_fb `h]jf )}(hjh]hdrm_plane_helper.prepare_fb}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helperuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjubh . It sets the plane’s fence from the framebuffer so that the DRM core can synchronize access automatically. drm_gem_plane_helper_prepare_fb() can also be used directly as implementation of prepare_fb.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjhhubj, )}(h#include struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., . prepare_fb = drm_gem_plane_helper_prepare_fb, };h]h#include struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., . prepare_fb = drm_gem_plane_helper_prepare_fb, };}hj sbah}(h]h ]h"]h$]h&]j j forcelanguagej highlight_args}uh1j+ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjhhubh)}(hXXA driver using a shadow buffer copies the content of the shadow buffers into the HW's framebuffer memory during an atomic update. This requires a mapping of the shadow buffer into kernel address space. The mappings cannot be established by commit-tail functions, such as atomic_update, as this would violate locking rules around dma_buf_vmap().h]hXZA driver using a shadow buffer copies the content of the shadow buffers into the HW’s framebuffer memory during an atomic update. This requires a mapping of the shadow buffer into kernel address space. The mappings cannot be established by commit-tail functions, such as atomic_update, as this would violate locking rules around dma_buf_vmap().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK(hjhhubh)}(hThe helpers for shadow-buffered planes establish and release mappings, and provide struct drm_shadow_plane_state, which stores the plane's mapping for commit-tail functions.h]hThe helpers for shadow-buffered planes establish and release mappings, and provide struct drm_shadow_plane_state, which stores the plane’s mapping for commit-tail functions.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK.hjhhubh)}(hShadow-buffered planes can easily be enabled by using the provided macros ``DRM_GEM_SHADOW_PLANE_FUNCS`` and ``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``. These macros set up the plane and plane-helper callbacks to point to the shadow-buffer helpers.h](hJShadow-buffered planes can easily be enabled by using the provided macros }(hj>hhhNhNubjf )}(h``DRM_GEM_SHADOW_PLANE_FUNCS``h]hDRM_GEM_SHADOW_PLANE_FUNCS}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubh and }(hj>hhhNhNubjf )}(h%``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``h]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubha. These macros set up the plane and plane-helper callbacks to point to the shadow-buffer helpers.}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK2hjhhubj, )}(hX#include struct drm_plane_funcs driver_plane_funcs = { ..., DRM_GEM_SHADOW_PLANE_FUNCS, }; struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, };h]hX#include struct drm_plane_funcs driver_plane_funcs = { ..., DRM_GEM_SHADOW_PLANE_FUNCS, }; struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, };}hjqsbah}(h]h ]h"]h$]h&]j j jjj j}uh1j+ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK7hjhhubh)}(hIn the driver's atomic-update function, shadow-buffer mappings are available from the plane state. Use to_drm_shadow_plane_state() to upcast from struct drm_plane_state.h]hIn the driver’s atomic-update function, shadow-buffer mappings are available from the plane state. Use to_drm_shadow_plane_state() to upcast from struct drm_plane_state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKEhjhhubj, )}(hXrvoid driver_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state) { struct drm_plane_state *plane_state = plane->state; struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }h]hXrvoid driver_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state) { struct drm_plane_state *plane_state = plane->state; struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }}hjsbah}(h]h ]h"]h$]h&]j j jjj j}uh1j+ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKIhjhhubh)}(hA mapping address for each of the framebuffer's buffer object is stored in struct :c:type:`drm_shadow_plane_state.map `. The mappings are valid while the state is being used.h](hTA mapping address for each of the framebuffer’s buffer object is stored in struct }(hjhhhNhNubh)}(h=:c:type:`drm_shadow_plane_state.map `h]jf )}(hjh]hdrm_shadow_plane_state.map}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_shadow_plane_stateuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKUhjubh7. The mappings are valid while the state is being used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKUhjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $DRM_SHADOW_PLANE_MAX_WIDTH (C macro)c.DRM_SHADOW_PLANE_MAX_WIDTHhNtauh1jd hjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhNubjw )}(hhh](j| )}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j )}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j )}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j )}(hjh]hDRM_SHADOW_PLANE_MAX_WIDTH}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j macroeh"]h$]h&]j j j jj jj j j uh1jv hhhjhjhNubh)}(h``DRM_SHADOW_PLANE_MAX_WIDTH``h]jf )}(hj"h]hDRM_SHADOW_PLANE_MAX_WIDTH}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhjhhubjInitializes struct drm_plane_funcs for shadow-buffered planes h]h)}(h=Initializes struct drm_plane_funcs for shadow-buffered planesh]h=Initializes struct drm_plane_funcs for shadow-buffered planes}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKghj9ubah}(h]h ]h"]h$]h&]uh1j;EhjKhKghj5ubh)}(h**Description**h]j )}(hjTh]h Description}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKihj5ubh)}(hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions.h]hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhhj5ubeh}(h]h ]h"]h$]h&]uh1j;EhjKhKghjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +DRM_GEM_SHADOW_PLANE_HELPER_FUNCS (C macro)#c.DRM_GEM_SHADOW_PLANE_HELPER_FUNCShNtauh1jd hjhhhjhNubjw )}(hhh](j| )}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j )}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j )}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j )}(hjh]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKvubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKvubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKvhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhKvubeh}(h]h ](j macroeh"]h$]h&]j j j jj jj j j uh1jv hhhjhjhNubh)}(h%``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``h]jf )}(hjh]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKxhjhhubjj j>j j j uh1jv hhhjhNhNubj )}(hXx**Parameters** ``struct drm_plane *plane`` Plane ``struct drm_plane_state *state`` Plane state the fence will be attached to **Description** This function extracts the exclusive fence from :c:type:`drm_gem_object.resv ` and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct :c:type:`dma_buf`. This function can be used as the :c:type:`drm_plane_helper_funcs.prepare_fb ` callback. There is no need for :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory. This function is the default implementation for GEM drivers of :c:type:`drm_plane_helper_funcs.prepare_fb ` if no callback is provided.h](h)}(h**Parameters**h]j )}(hjHh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKehjBubjU )}(hhh](jZ )}(h"``struct drm_plane *plane`` Plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjgh]hstruct drm_plane *plane}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKbhjaubj| )}(hhh]h)}(hPlaneh]hPlane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hKbhj}ubah}(h]h ]h"]h$]h&]uh1j{ hjaubeh}(h]h ]h"]h$]h&]uh1jY hj|hKbhj^ubjZ )}(hL``struct drm_plane_state *state`` Plane state the fence will be attached to h](j` )}(h!``struct drm_plane_state *state``h]jf )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKchjubj| )}(hhh]h)}(h)Plane state the fence will be attached toh]h)Plane state the fence will be attached to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKchjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKchj^ubeh}(h]h ]h"]h$]h&]uh1jT hjBubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKehjBubh)}(hXThis function extracts the exclusive fence from :c:type:`drm_gem_object.resv ` and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct :c:type:`dma_buf`. This function can be used as the :c:type:`drm_plane_helper_funcs.prepare_fb ` callback.h](h0This function extracts the exclusive fence from }(hjhhhNhNubh)}(h.:c:type:`drm_gem_object.resv `h]jf )}(hjh]hdrm_gem_object.resv}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_gem_objectuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKdhjubh and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct }(hjhhhNhNubh)}(h:c:type:`dma_buf`h]jf )}(hjh]hdma_buf}(hj!hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dma_bufuh1hhjhKdhjubh#. This function can be used as the }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jf )}(hjBh]h!drm_plane_helper_funcs.prepare_fb}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhjhKdhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKdhjBubh)}(hThere is no need for :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory.h](hThere is no need for }(hjihhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]jf )}(hjsh]h!drm_plane_helper_funcs.cleanup_fb}(hjuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKjhjiubh` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKjhjBubh)}(hThis function is the default implementation for GEM drivers of :c:type:`drm_plane_helper_funcs.prepare_fb ` if no callback is provided.h](h?This function is the default implementation for GEM drivers of }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jf )}(hjh]h!drm_plane_helper_funcs.prepare_fb}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKnhjubh if no callback is provided.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKnhjBubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3__drm_gem_duplicate_shadow_plane_state (C function)(c.__drm_gem_duplicate_shadow_plane_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h|void __drm_gem_duplicate_shadow_plane_state (struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h]j )}(h{void __drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h&__drm_gem_duplicate_shadow_plane_stateh]j )}(h&__drm_gem_duplicate_shadow_plane_stateh]h&__drm_gem_duplicate_shadow_plane_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(hP(struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj* hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj& ubj )}(h h]h }(hj7 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj& ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjH hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjE ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJ modnameN classnameNj j )}j ]j)}jj sb(c.__drm_gem_duplicate_shadow_plane_stateasbuh1hhj& ubj )}(h h]h }(hjh hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj& ubj)}(hjOh]h*}(hjv hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj& ubj )}(hplaneh]hplane}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj& ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj" ubj)}(h5struct drm_shadow_plane_state *new_shadow_plane_stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jd (c.__drm_gem_duplicate_shadow_plane_stateasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hnew_shadow_plane_stateh]hnew_shadow_plane_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj" ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h&duplicates shadow-buffered plane stateh]h&duplicates shadow-buffered plane state}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j j5!j j5!j j j uh1jv hhhjhNhNubj )}(hX1**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_shadow_plane_state *new_shadow_plane_state`` the new shadow-buffered plane state **Description** This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state. The function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h](h)}(h**Parameters**h]j )}(hj?!h]h Parameters}(hjA!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=!ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj9!ubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` the plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hj^!h]hstruct drm_plane *plane}(hj`!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\!ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjX!ubj| )}(hhh]h)}(h the planeh]h the plane}(hjw!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjs!hKhjt!ubah}(h]h ]h"]h$]h&]uh1j{ hjX!ubeh}(h]h ]h"]h$]h&]uh1jY hjs!hKhjU!ubjZ )}(h^``struct drm_shadow_plane_state *new_shadow_plane_state`` the new shadow-buffered plane state h](j` )}(h9``struct drm_shadow_plane_state *new_shadow_plane_state``h]jf )}(hj!h]h5struct drm_shadow_plane_state *new_shadow_plane_state}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!ubj| )}(hhh]h)}(h#the new shadow-buffered plane stateh]h#the new shadow-buffered plane state}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj!ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj!hKhjU!ubeh}(h]h ]h"]h$]h&]uh1jT hj9!ubh)}(h**Description**h]j )}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj9!ubh)}(h~This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state.h]h~This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj9!ubh)}(hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h]hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane’s prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj9!ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_gem_duplicate_shadow_plane_state (C function)&c.drm_gem_duplicate_shadow_plane_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hWstruct drm_plane_state * drm_gem_duplicate_shadow_plane_state (struct drm_plane *plane)h]j )}(hUstruct drm_plane_state *drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane)h](j )}(hj h]hstruct}(hj&"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj""hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj )}(h h]h }(hj4"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj""hhhj3"hKubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjE"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjG"modnameN classnameNj j )}j ]j)}j$drm_gem_duplicate_shadow_plane_statesb&c.drm_gem_duplicate_shadow_plane_stateasbuh1hhj""hhhj3"hKubj )}(h h]h }(hjf"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj""hhhj3"hKubj)}(hjOh]h*}(hjt"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj""hhhj3"hKubj )}(h$drm_gem_duplicate_shadow_plane_stateh]j )}(hjc"h]h$drm_gem_duplicate_shadow_plane_state}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj""hhhj3"hKubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]ja"&c.drm_gem_duplicate_shadow_plane_stateasbuh1hhj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubj )}(hplaneh]hplane}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubah}(h]h ]h"]h$]h&]j j uh1jhj""hhhj3"hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"hhhj3"hKubah}(h]j"ah ](j j eh"]h$]h&]j j )j huh1j{ hj3"hKhj"hhubj )}(hhh]h)}(h&duplicates shadow-buffered plane stateh]h&duplicates shadow-buffered plane state}(hj!#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj#hhubah}(h]h ]h"]h$]h&]uh1j hj"hhhj3"hKubeh}(h]h ](j functioneh"]h$]h&]j j j j9#j j9#j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` the plane **Description** This function implements struct :c:type:`drm_plane_funcs.atomic_duplicate_state ` for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type. The function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers. **Return** A pointer to a new plane state on success, or NULL otherwise.h](h)}(h**Parameters**h]j )}(hjC#h]h Parameters}(hjE#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjA#ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj=#ubjU )}(hhh]jZ )}(h&``struct drm_plane *plane`` the plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjb#h]hstruct drm_plane *plane}(hjd#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`#ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj\#ubj| )}(hhh]h)}(h the planeh]h the plane}(hj{#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjw#hKhjx#ubah}(h]h ]h"]h$]h&]uh1j{ hj\#ubeh}(h]h ]h"]h$]h&]uh1jY hjw#hKhjY#ubah}(h]h ]h"]h$]h&]uh1jT hj=#ubh)}(h**Description**h]j )}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj=#ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.atomic_duplicate_state ` for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type.h](h This function implements struct }(hj#hhhNhNubh)}(hB:c:type:`drm_plane_funcs.atomic_duplicate_state `h]jf )}(hj#h]h&drm_plane_funcs.atomic_duplicate_state}(hj#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj#ubh for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hKhj=#ubh)}(hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h]hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane’s prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj=#ubh)}(h **Return**h]j )}(hj#h]hReturn}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj=#ubh)}(h=A pointer to a new plane state on success, or NULL otherwise.h]h=A pointer to a new plane state on success, or NULL otherwise.}(hj $hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj=#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1__drm_gem_destroy_shadow_plane_state (C function)&c.__drm_gem_destroy_shadow_plane_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h]void __drm_gem_destroy_shadow_plane_state (struct drm_shadow_plane_state *shadow_plane_state)h]j )}(h\void __drm_gem_destroy_shadow_plane_state(struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hvoidh]hvoid}(hj;$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7$hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj )}(h h]h }(hjJ$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7$hhhjI$hKubj )}(h$__drm_gem_destroy_shadow_plane_stateh]j )}(h$__drm_gem_destroy_shadow_plane_stateh]h$__drm_gem_destroy_shadow_plane_state}(hj\$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7$hhhjI$hKubj)}(h3(struct drm_shadow_plane_state *shadow_plane_state)h]j)}(h1struct drm_shadow_plane_state *shadow_plane_stateh](j )}(hj h]hstruct}(hjx$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt$ubh)}(hhh]j )}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j)}jj^$sb&c.__drm_gem_destroy_shadow_plane_stateasbuh1hhjt$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt$ubj)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjt$ubj )}(hshadow_plane_stateh]hshadow_plane_state}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjp$ubah}(h]h ]h"]h$]h&]j j uh1jhj7$hhhjI$hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3$hhhjI$hKubah}(h]j.$ah ](j j eh"]h$]h&]j j )j huh1j{ hjI$hKhj0$hhubj )}(hhh]h)}(h%cleans up shadow-buffered plane stateh]h%cleans up shadow-buffered plane state}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj$hhubah}(h]h ]h"]h$]h&]uh1j hj0$hhhjI$hKubeh}(h]h ](j functioneh"]h$]h&]j j j j%j j%j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state **Description** This function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.h](h)}(h**Parameters**h]j )}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj%ubjU )}(hhh]jZ )}(hV``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state h](j` )}(h5``struct drm_shadow_plane_state *shadow_plane_state``h]jf )}(hj<%h]h1struct drm_shadow_plane_state *shadow_plane_state}(hj>%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:%ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj6%ubj| )}(hhh]h)}(hthe shadow-buffered plane stateh]hthe shadow-buffered plane state}(hjU%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQ%hKhjR%ubah}(h]h ]h"]h$]h&]uh1j{ hj6%ubeh}(h]h ]h"]h$]h&]uh1jY hjQ%hKhj3%ubah}(h]h ]h"]h$]h&]uh1jT hj%ubh)}(h**Description**h]j )}(hjw%h]h Description}(hjy%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hju%ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj%ubh)}(huThis function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.h]huThis function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_gem_destroy_shadow_plane_state (C function)$c.drm_gem_destroy_shadow_plane_statehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hfvoid drm_gem_destroy_shadow_plane_state (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(hevoid drm_gem_destroy_shadow_plane_state(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%hhhj%hMubj )}(h"drm_gem_destroy_shadow_plane_stateh]j )}(h"drm_gem_destroy_shadow_plane_stateh]h"drm_gem_destroy_shadow_plane_state}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj%hhhj%hMubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j)}jj%sb$c.drm_gem_destroy_shadow_plane_stateasbuh1hhj%ubj )}(h h]h }(hj7&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hjE&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hplaneh]hplane}(hjR&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjk&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjg&ubj )}(h h]h }(hjx&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjg&ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j3&$c.drm_gem_destroy_shadow_plane_stateasbuh1hhjg&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjg&ubj)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjg&ubj )}(h plane_stateh]h plane_state}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjg&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubeh}(h]h ]h"]h$]h&]j j uh1jhj%hhhj%hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj%hhhj%hMubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j{ hj%hMhj%hhubj )}(hhh]h)}(h#deletes shadow-buffered plane stateh]h#deletes shadow-buffered plane state}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj&hhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj%hMubeh}(h]h ](j functioneh"]h$]h&]j j j j'j j'j j j uh1jv hhhjhNhNubj )}(hXn**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_funcs.atomic_destroy_state ` for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.h](h)}(h**Parameters**h]j )}(hj'h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj 'ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM hj'ubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` the plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hj-'h]hstruct drm_plane *plane}(hj/'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+'ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj''ubj| )}(hhh]h)}(h the planeh]h the plane}(hjF'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjB'hMhjC'ubah}(h]h ]h"]h$]h&]uh1j{ hj''ubeh}(h]h ]h"]h$]h&]uh1jY hjB'hMhj$'ubjZ )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hjf'h]h#struct drm_plane_state *plane_state}(hjh'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjd'ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj`'ubj| )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{'hMhj|'ubah}(h]h ]h"]h$]h&]uh1j{ hj`'ubeh}(h]h ]h"]h$]h&]uh1jY hj{'hMhj$'ubeh}(h]h ]h"]h$]h&]uh1jT hj'ubh)}(h**Description**h]j )}(hj'h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM hj'ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.atomic_destroy_state ` for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.h](h This function implements struct }(hj'hhhNhNubh)}(h@:c:type:`drm_plane_funcs.atomic_destroy_state `h]jf )}(hj'h]h$drm_plane_funcs.atomic_destroy_state}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj'ubhc for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hMhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )__drm_gem_reset_shadow_plane (C function)c.__drm_gem_reset_shadow_planehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hnvoid __drm_gem_reset_shadow_plane (struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h]j )}(hmvoid __drm_gem_reset_shadow_plane(struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hvoidh]hvoid}(hj (hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj(hMubj )}(h__drm_gem_reset_shadow_planeh]j )}(h__drm_gem_reset_shadow_planeh]h__drm_gem_reset_shadow_plane}(hj*(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&(ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj(hMubj)}(hL(struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjF(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB(ubj )}(h h]h }(hjS(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB(ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjd(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjf(modnameN classnameNj j )}j ]j)}jj,(sbc.__drm_gem_reset_shadow_planeasbuh1hhjB(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB(ubj)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjB(ubj )}(hplaneh]hplane}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>(ubj)}(h1struct drm_shadow_plane_state *shadow_plane_stateh](j )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j(c.__drm_gem_reset_shadow_planeasbuh1hhj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubj )}(hshadow_plane_stateh]hshadow_plane_state}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>(ubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhj(hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj(hMubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j{ hj(hMhj'hhubj )}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hj9)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj6)hhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj(hMubeh}(h]h ](j functioneh"]h$]h&]j j j jQ)j jQ)j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state **Description** This function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.h](h)}(h**Parameters**h]j )}(hj[)h]h Parameters}(hj])hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjY)ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjU)ubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` the plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjz)h]hstruct drm_plane *plane}(hj|)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjx)ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjt)ubj| )}(hhh]h)}(h the planeh]h the plane}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj)ubah}(h]h ]h"]h$]h&]uh1j{ hjt)ubeh}(h]h ]h"]h$]h&]uh1jY hj)hMhjq)ubjZ )}(hV``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state h](j` )}(h5``struct drm_shadow_plane_state *shadow_plane_state``h]jf )}(hj)h]h1struct drm_shadow_plane_state *shadow_plane_state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj)ubj| )}(hhh]h)}(hthe shadow-buffered plane stateh]hthe shadow-buffered plane state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hj)hMhjq)ubeh}(h]h ]h"]h$]h&]uh1jT hjU)ubh)}(h**Description**h]j )}(hj)h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjU)ubh)}(hwThis function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.h]hwThis function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjU)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_gem_reset_shadow_plane (C function)c.drm_gem_reset_shadow_planehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h9void drm_gem_reset_shadow_plane (struct drm_plane *plane)h]j )}(h8void drm_gem_reset_shadow_plane(struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hj3*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/*hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM-ubj )}(h h]h }(hjB*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/*hhhjA*hM-ubj )}(hdrm_gem_reset_shadow_planeh]j )}(hdrm_gem_reset_shadow_planeh]hdrm_gem_reset_shadow_plane}(hjT*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjP*ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/*hhhjA*hM-ubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjp*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjl*ubj )}(h h]h }(hj}*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjl*ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j)}jjV*sbc.drm_gem_reset_shadow_planeasbuh1hhjl*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjl*ubj)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjl*ubj )}(hplaneh]hplane}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjl*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjh*ubah}(h]h ]h"]h$]h&]j j uh1jhj/*hhhjA*hM-ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+*hhhjA*hM-ubah}(h]j&*ah ](j j eh"]h$]h&]j j )j huh1j{ hjA*hM-hj(*hhubj )}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM-hj*hhubah}(h]h ]h"]h$]h&]uh1j hj(*hhhjA*hM-ubeh}(h]h ](j functioneh"]h$]h&]j j j j +j j +j j j uh1jv hhhjhNhNubj )}(hX3**Parameters** ``struct drm_plane *plane`` the plane **Description** This function implements struct :c:type:`drm_plane_funcs.reset_plane ` for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.h](h)}(h**Parameters**h]j )}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM1hj+ubjU )}(hhh]jZ )}(h&``struct drm_plane *plane`` the plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hj4+h]hstruct drm_plane *plane}(hj6+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2+ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM.hj.+ubj| )}(hhh]h)}(h the planeh]h the plane}(hjM+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI+hM.hjJ+ubah}(h]h ]h"]h$]h&]uh1j{ hj.+ubeh}(h]h ]h"]h$]h&]uh1jY hjI+hM.hj++ubah}(h]h ]h"]h$]h&]uh1jT hj+ubh)}(h**Description**h]j )}(hjo+h]h Description}(hjq+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjm+ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM0hj+ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.reset_plane ` for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.h](h This function implements struct }(hj+hhhNhNubh)}(h7:c:type:`drm_plane_funcs.reset_plane `h]jf )}(hj+h]hdrm_plane_funcs.reset_plane}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM/hj+ubh for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hM/hj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_gem_begin_shadow_fb_access (C function) c.drm_gem_begin_shadow_fb_accesshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(haint drm_gem_begin_shadow_fb_access (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(h`int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hinth]hint}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMDubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+hhhj+hMDubj )}(hdrm_gem_begin_shadow_fb_accessh]j )}(hdrm_gem_begin_shadow_fb_accessh]hdrm_gem_begin_shadow_fb_access}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj+hhhj+hMDubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj!,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj2,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4,modnameN classnameNj j )}j ]j)}jj+sb c.drm_gem_begin_shadow_fb_accessasbuh1hhj,ubj )}(h h]h }(hjR,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj)}(hjOh]h*}(hj`,hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj,ubj )}(hplaneh]hplane}(hjm,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ,ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]jN, c.drm_gem_begin_shadow_fb_accessasbuh1hhj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj,ubj )}(h plane_stateh]h plane_state}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ,ubeh}(h]h ]h"]h$]h&]j j uh1jhj+hhhj+hMDubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+hhhj+hMDubah}(h]j+ah ](j j eh"]h$]h&]j j )j huh1j{ hj+hMDhj+hhubj )}(hhh]h)}(h+prepares shadow framebuffers for CPU accessh]h+prepares shadow framebuffers for CPU access}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMDhj-hhubah}(h]h ]h"]h$]h&]uh1j hj+hhhj+hMDubeh}(h]h ](j functioneh"]h$]h&]j j j j-j j-j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_helper_funcs.begin_fb_access `. It maps all buffer objects of the plane's framebuffer into kernel address space and stores them in struct :c:type:`drm_shadow_plane_state.map `. The first data bytes are available in struct :c:type:`drm_shadow_plane_state.data `. See drm_gem_end_shadow_fb_access() for cleanup. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hj)-h]h Parameters}(hj+-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'-ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMHhj#-ubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` the plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjH-h]hstruct drm_plane *plane}(hjJ-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjF-ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMEhjB-ubj| )}(hhh]h)}(h the planeh]h the plane}(hja-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]-hMEhj^-ubah}(h]h ]h"]h$]h&]uh1j{ hjB-ubeh}(h]h ]h"]h$]h&]uh1jY hj]-hMEhj?-ubjZ )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hj-h]h#struct drm_plane_state *plane_state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMFhj{-ubj| )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMFhj-ubah}(h]h ]h"]h$]h&]uh1j{ hj{-ubeh}(h]h ]h"]h$]h&]uh1jY hj-hMFhj?-ubeh}(h]h ]h"]h$]h&]uh1jT hj#-ubh)}(h**Description**h]j )}(hj-h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMHhj#-ubh)}(hXThis function implements struct :c:type:`drm_plane_helper_funcs.begin_fb_access `. It maps all buffer objects of the plane's framebuffer into kernel address space and stores them in struct :c:type:`drm_shadow_plane_state.map `. The first data bytes are available in struct :c:type:`drm_shadow_plane_state.data `.h](h This function implements struct }(hj-hhhNhNubh)}(hI:c:type:`drm_plane_helper_funcs.begin_fb_access `h]jf )}(hj-h]h&drm_plane_helper_funcs.begin_fb_access}(hj-hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMGhj-ubhn. It maps all buffer objects of the plane’s framebuffer into kernel address space and stores them in struct }(hj-hhhNhNubh)}(h=:c:type:`drm_shadow_plane_state.map `h]jf )}(hj.h]hdrm_shadow_plane_state.map}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_shadow_plane_stateuh1hhj-hMGhj-ubh/. The first data bytes are available in struct }(hj-hhhNhNubh)}(h>:c:type:`drm_shadow_plane_state.data `h]jf )}(hj#.h]hdrm_shadow_plane_state.data}(hj%.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj!.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_shadow_plane_stateuh1hhj-hMGhj-ubh.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMGhj#-ubh)}(h/See drm_gem_end_shadow_fb_access() for cleanup.h]h/See drm_gem_end_shadow_fb_access() for cleanup.}(hjJ.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMLhj#-ubh)}(h **Return**h]j )}(hj[.h]hReturn}(hj].hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjY.ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMNhj#-ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjq.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMOhj#-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_gem_end_shadow_fb_access (C function)c.drm_gem_end_shadow_fb_accesshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h`void drm_gem_end_shadow_fb_access (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(h_void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM_ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhj.hM_ubj )}(hdrm_gem_end_shadow_fb_accessh]j )}(hdrm_gem_end_shadow_fb_accessh]hdrm_gem_end_shadow_fb_access}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhj.hM_ubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j)}jj.sbc.drm_gem_end_shadow_fb_accessasbuh1hhj.ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj)}(hjOh]h*}(hj)/hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.ubj )}(hplaneh]hplane}(hj6/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjO/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK/ubj )}(h h]h }(hj\/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK/ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjm/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjo/modnameN classnameNj j )}j ]j/c.drm_gem_end_shadow_fb_accessasbuh1hhjK/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK/ubj)}(hjOh]h*}(hj/hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjK/ubj )}(h plane_stateh]h plane_state}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubeh}(h]h ]h"]h$]h&]j j uh1jhj.hhhj.hM_ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj.hhhj.hM_ubah}(h]j.ah ](j j eh"]h$]h&]j j )j huh1j{ hj.hM_hj.hhubj )}(hhh]h)}(h,releases shadow framebuffers from CPU accessh]h,releases shadow framebuffers from CPU access}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM_hj/hhubah}(h]h ]h"]h$]h&]uh1j hj.hhhj.hM_ubeh}(h]h ](j functioneh"]h$]h&]j j j j/j j/j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_helper_funcs.end_fb_access `. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order. See drm_gem_begin_shadow_fb_access() for more information.h](h)}(h**Parameters**h]j )}(hj/h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMchj/ubjU )}(hhh](jZ )}(h&``struct drm_plane *plane`` the plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hj0h]hstruct drm_plane *plane}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM`hj 0ubj| )}(hhh]h)}(h the planeh]h the plane}(hj*0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&0hM`hj'0ubah}(h]h ]h"]h$]h&]uh1j{ hj 0ubeh}(h]h ]h"]h$]h&]uh1jY hj&0hM`hj0ubjZ )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hjJ0h]h#struct drm_plane_state *plane_state}(hjL0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjH0ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMahjD0ubj| )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hjc0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_0hMahj`0ubah}(h]h ]h"]h$]h&]uh1j{ hjD0ubeh}(h]h ]h"]h$]h&]uh1jY hj_0hMahj0ubeh}(h]h ]h"]h$]h&]uh1jT hj/ubh)}(h**Description**h]j )}(hj0h]h Description}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMchj/ubh)}(hThis function implements struct :c:type:`drm_plane_helper_funcs.end_fb_access `. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order.h](h This function implements struct }(hj0hhhNhNubh)}(hG:c:type:`drm_plane_helper_funcs.end_fb_access `h]jf )}(hj0h]h$drm_plane_helper_funcs.end_fb_access}(hj0hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMbhj0ubhM. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj0hMbhj/ubh)}(h:See drm_gem_begin_shadow_fb_access() for more information.h]h:See drm_gem_begin_shadow_fb_access() for more information.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMehj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6drm_gem_simple_kms_begin_shadow_fb_access (C function)+c.drm_gem_simple_kms_begin_shadow_fb_accesshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hyint drm_gem_simple_kms_begin_shadow_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j )}(hxint drm_gem_simple_kms_begin_shadow_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hinth]hint}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMuubj )}(h h]h }(hj 1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhj 1hMuubj )}(h)drm_gem_simple_kms_begin_shadow_fb_accessh]j )}(h)drm_gem_simple_kms_begin_shadow_fb_accessh]h)drm_gem_simple_kms_begin_shadow_fb_access}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj0hhhj 1hMuubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j )}(hj h]hstruct}(hj91hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj51ubj )}(h h]h }(hjF1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj51ubh)}(hhh]j )}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hjW1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjY1modnameN classnameNj j )}j ]j)}jj1sb+c.drm_gem_simple_kms_begin_shadow_fb_accessasbuh1hhj51ubj )}(h h]h }(hjw1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj51ubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj51ubj )}(hpipeh]hpipe}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj51ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj11ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]js1+c.drm_gem_simple_kms_begin_shadow_fb_accessasbuh1hhj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(h plane_stateh]h plane_state}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj11ubeh}(h]h ]h"]h$]h&]j j uh1jhj0hhhj 1hMuubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj0hhhj 1hMuubah}(h]j0ah ](j j eh"]h$]h&]j j )j huh1j{ hj 1hMuhj0hhubj )}(hhh]h)}(h+prepares shadow framebuffers for CPU accessh]h+prepares shadow framebuffers for CPU access}(hj,2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMuhj)2hhubah}(h]h ]h"]h$]h&]uh1j hj0hhhj 1hMuubeh}(h]h ](j functioneh"]h$]h&]j j j jD2j jD2j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct drm_simple_display_funcs.begin_fb_access. See drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hjN2h]h Parameters}(hjP2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjL2ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMyhjH2ubjU )}(hhh](jZ )}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](j` )}(h(``struct drm_simple_display_pipe *pipe``h]jf )}(hjm2h]h$struct drm_simple_display_pipe *pipe}(hjo2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjk2ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMvhjg2ubj| )}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMvhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjg2ubeh}(h]h ]h"]h$]h&]uh1jY hj2hMvhjd2ubjZ )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hj2h]h#struct drm_plane_state *plane_state}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMwhj2ubj| )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMwhj2ubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hj2hMwhjd2ubeh}(h]h ]h"]h$]h&]uh1jT hjH2ubh)}(h**Description**h]j )}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMyhjH2ubh)}(hIThis function implements struct drm_simple_display_funcs.begin_fb_access.h]hIThis function implements struct drm_simple_display_funcs.begin_fb_access.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMxhjH2ubh)}(hhSee drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup.h]hhSee drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMzhjH2ubh)}(h **Return**h]j )}(hj3h]hReturn}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM}hjH2ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj-3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM~hjH2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_gem_simple_kms_end_shadow_fb_access (C function))c.drm_gem_simple_kms_end_shadow_fb_accesshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hxvoid drm_gem_simple_kms_end_shadow_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j )}(hwvoid drm_gem_simple_kms_end_shadow_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj\3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX3hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hjk3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX3hhhjj3hMubj )}(h'drm_gem_simple_kms_end_shadow_fb_accessh]j )}(h'drm_gem_simple_kms_end_shadow_fb_accessh]h'drm_gem_simple_kms_end_shadow_fb_access}(hj}3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjX3hhhjj3hMubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]j)}jj3sb)c.drm_gem_simple_kms_end_shadow_fb_accessasbuh1hhj3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hjOh]h*}(hj3hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3ubj )}(hpipeh]hpipe}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hj 4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj)4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+4modnameN classnameNj j )}j ]j3)c.drm_gem_simple_kms_end_shadow_fb_accessasbuh1hhj4ubj )}(h h]h }(hjG4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj)}(hjOh]h*}(hjU4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj4ubj )}(h plane_stateh]h plane_state}(hjb4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubeh}(h]h ]h"]h$]h&]j j uh1jhjX3hhhjj3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjT3hhhjj3hMubah}(h]jO3ah ](j j eh"]h$]h&]j j )j huh1j{ hjj3hMhjQ3hhubj )}(hhh]h)}(h,releases shadow framebuffers from CPU accessh]h,releases shadow framebuffers from CPU access}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj4hhubah}(h]h ]h"]h$]h&]uh1j hjQ3hhhjj3hMubeh}(h]h ](j functioneh"]h$]h&]j j j j4j j4j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order. See drm_gem_simple_kms_begin_shadow_fb_access().h](h)}(h**Parameters**h]j )}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj4ubjU )}(hhh](jZ )}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](j` )}(h(``struct drm_simple_display_pipe *pipe``h]jf )}(hj4h]h$struct drm_simple_display_pipe *pipe}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj4ubj| )}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj4ubah}(h]h ]h"]h$]h&]uh1j{ hj4ubeh}(h]h ]h"]h$]h&]uh1jY hj4hMhj4ubjZ )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j` )}(h'``struct drm_plane_state *plane_state``h]jf )}(hj5h]h#struct drm_plane_state *plane_state}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj5ubj| )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj5ubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hj5hMhj4ubeh}(h]h ]h"]h$]h&]uh1jT hj4ubh)}(h**Description**h]j )}(hjA5h]h Description}(hjC5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?5ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj4ubh)}(hThis function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order.h]hThis function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order.}(hjW5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj4ubh)}(h0See drm_gem_simple_kms_begin_shadow_fb_access().h]h0See drm_gem_simple_kms_begin_shadow_fb_access().}(hjf5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_gem_simple_kms_reset_shadow_plane (C function)'c.drm_gem_simple_kms_reset_shadow_planehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hQvoid drm_gem_simple_kms_reset_shadow_plane (struct drm_simple_display_pipe *pipe)h]j )}(hPvoid drm_gem_simple_kms_reset_shadow_plane(struct drm_simple_display_pipe *pipe)h](j)}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5hhhj5hMubj )}(h%drm_gem_simple_kms_reset_shadow_planeh]j )}(h%drm_gem_simple_kms_reset_shadow_planeh]h%drm_gem_simple_kms_reset_shadow_plane}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj5hhhj5hMubj)}(h&(struct drm_simple_display_pipe *pipe)h]j)}(h$struct drm_simple_display_pipe *pipeh](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j)}jj5sb'c.drm_gem_simple_kms_reset_shadow_planeasbuh1hhj5ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj5ubj )}(hpipeh]hpipe}(hj+6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubah}(h]h ]h"]h$]h&]j j uh1jhj5hhhj5hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5hhhj5hMubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j{ hj5hMhj5hhubj )}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hjU6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjR6hhubah}(h]h ]h"]h$]h&]uh1j hj5hhhj5hMubeh}(h]h ](j functioneh"]h$]h&]j j j jm6j jm6j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe **Description** This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.h](h)}(h**Parameters**h]j )}(hjw6h]h Parameters}(hjy6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hju6ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjq6ubjU )}(hhh]jZ )}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](j` )}(h(``struct drm_simple_display_pipe *pipe``h]jf )}(hj6h]h$struct drm_simple_display_pipe *pipe}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj6ubj| )}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhj6ubah}(h]h ]h"]h$]h&]uh1jT hjq6ubh)}(h**Description**h]j )}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjq6ubh)}(h`This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.h]h`This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjq6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq `.h](hXOnce the driver enables vblank support with drm_vblank_init(), each CRTC’s vblank timer fires according to the programmed display mode. By default, the vblank timer invokes drm_crtc_handle_vblank(). Drivers with more specific requirements can set their own handler function in struct }(hj;hhhNhNubh)}(hM:c:type:`drm_crtc_helper_funcs.handle_vblank_timeout `h]jf )}(hj;h]h+drm_crtc_helper_funcs.handle_vblank_timeout}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:100: ./drivers/gpu/drm/drm_vblank_helper.chKhj;ubh.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hKhj;hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &DRM_CRTC_HELPER_VBLANK_FUNCS (C macro)c.DRM_CRTC_HELPER_VBLANK_FUNCShNtauh1jd hj;hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhNubjw )}(hhh](j| )}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j )}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j )}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j )}(hj;h]hDRM_CRTC_HELPER_VBLANK_FUNCS}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hj;hhhj;hKubah}(h]j;ah ](j j eh"]h$]h&]j j )j huh1j{ hj;hKhj;hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj;hhhj;hKubeh}(h]h ](j macroeh"]h$]h&]j j j j<j j<j j j uh1jv hhhj;hj;hNubh)}(h ``DRM_CRTC_HELPER_VBLANK_FUNCS``h]jf )}(hj<h]hDRM_CRTC_HELPER_VBLANK_FUNCS}(hj <hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhKhj;hhubjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj%>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!>ubj )}(h h]h }(hj2>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!>ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjC>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjE>modnameN classnameNj j )}j ]j=c.drm_crtc_vblank_atomic_flushasbuh1hhj!>ubj )}(h h]h }(hja>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!>ubj)}(hjOh]h*}(hjo>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!>ubj )}(hstateh]hstate}(hj|>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=ubeh}(h]h ]h"]h$]h&]j j uh1jhjr=hhhj=hK(ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjn=hhhj=hK(ubah}(h]ji=ah ](j j eh"]h$]h&]j j )j huh1j{ hj=hK(hjk=hhubj )}(hhh]h)}(hVImplements struct :c:type:`drm_crtc_helper_funcs.atomic_flush `h](hImplements struct }(hj>hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_flush `h]jf )}(hj>h]h"drm_crtc_helper_funcs.atomic_flush}(hj>hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j=c.drm_crtc_vblank_atomic_flushasbj drm_crtc_helper_funcsuh1hhj=hK(hj>ubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK(hj>hhubah}(h]h ]h"]h$]h&]uh1j hjk=hhhj=hK(ubeh}(h]h ](j functioneh"]h$]h&]j j j j>j j>j j j uh1jv hhhj;hNhNubj )}(hXu**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_commit *state`` The atomic state to apply **Description** The helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event. See also struct :c:type:`drm_crtc_helper_funcs.atomic_flush `.h](h)}(h**Parameters**h]j )}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK,hj>ubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` The CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hj ?h]hstruct drm_crtc *crtc}(hj ?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ?ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK*hj?ubj| )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj$?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ?hK*hj!?ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj ?hK*hj?ubjZ )}(h>``struct drm_atomic_commit *state`` The atomic state to apply h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjD?h]hstruct drm_atomic_commit *state}(hjF?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjB?ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK+hj>?ubj| )}(hhh]h)}(hThe atomic state to applyh]hThe atomic state to apply}(hj]?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjY?hK+hjZ?ubah}(h]h ]h"]h$]h&]uh1j{ hj>?ubeh}(h]h ]h"]h$]h&]uh1jY hjY?hK+hj?ubeh}(h]h ]h"]h$]h&]uh1jT hj>ubh)}(h**Description**h]j )}(hj?h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}?ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK-hj>ubh)}(hThe helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event.h]hThe helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK,hj>ubh)}(hUSee also struct :c:type:`drm_crtc_helper_funcs.atomic_flush `.h](hSee also struct }(hj?hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_flush `h]jf )}(hj?h]h"drm_crtc_helper_funcs.atomic_flush}(hj?hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK0hj?ubh.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hK0hj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj;hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_crtc_vblank_atomic_enable (C function)c.drm_crtc_vblank_atomic_enablehNtauh1jd hj;hhhNhNubjw )}(hhh](j| )}(h[void drm_crtc_vblank_atomic_enable (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(hZvoid drm_crtc_vblank_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKKubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?hhhj@hKKubj )}(hdrm_crtc_vblank_atomic_enableh]j )}(hdrm_crtc_vblank_atomic_enableh]hdrm_crtc_vblank_atomic_enable}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj?hhhj@hKKubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj3@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/@ubj )}(h h]h }(hj@@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/@ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjQ@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjS@modnameN classnameNj j )}j ]j)}jj@sbc.drm_crtc_vblank_atomic_enableasbuh1hhj/@ubj )}(h h]h }(hjq@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/@ubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/@ubj )}(hcrtch]hcrtc}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+@ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]jm@c.drm_crtc_vblank_atomic_enableasbuh1hhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(hstateh]hstate}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+@ubeh}(h]h ]h"]h$]h&]j j uh1jhj?hhhj@hKKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?hhhj@hKKubah}(h]j?ah ](j j eh"]h$]h&]j j )j huh1j{ hj@hKKhj?hhubj )}(hhh]h)}(hWImplements struct :c:type:`drm_crtc_helper_funcs.atomic_enable `h](hImplements struct }(hj&AhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]jf )}(hj0Ah]h#drm_crtc_helper_funcs.atomic_enable}(hj2AhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj.Aubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jm@c.drm_crtc_vblank_atomic_enableasbj drm_crtc_helper_funcsuh1hhj=hK(hj&Aubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKKhj#Ahhubah}(h]h ]h"]h$]h&]uh1j hj?hhhj@hKKubeh}(h]h ](j functioneh"]h$]h&]j j j jbAj jbAj j j uh1jv hhhj;hNhNubj )}(hXe**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_commit *state`` The atomic state **Description** The helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs. See also struct :c:type:`drm_crtc_helper_funcs.atomic_enable `.h](h)}(h**Parameters**h]j )}(hjlAh]h Parameters}(hjnAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjAubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKOhjfAubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` The CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjAh]hstruct drm_crtc *crtc}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKLhjAubj| )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKLhjAubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjAhKLhjAubjZ )}(h5``struct drm_atomic_commit *state`` The atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjAh]hstruct drm_atomic_commit *state}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKMhjAubj| )}(hhh]h)}(hThe atomic stateh]hThe atomic state}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKMhjAubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjAhKMhjAubeh}(h]h ]h"]h$]h&]uh1jT hjfAubh)}(h**Description**h]j )}(hjAh]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKOhjfAubh)}(hThe helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs.h]hThe helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKNhjfAubh)}(hVSee also struct :c:type:`drm_crtc_helper_funcs.atomic_enable `.h](hSee also struct }(hj$BhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]jf )}(hj.Bh]h#drm_crtc_helper_funcs.atomic_enable}(hj0BhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj,Bubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKQhj$Bubh.}(hj$BhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjKBhKQhjfAubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj;hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_crtc_vblank_atomic_disable (C function) c.drm_crtc_vblank_atomic_disablehNtauh1jd hj;hhhNhNubjw )}(hhh](j| )}(h\void drm_crtc_vblank_atomic_disable (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(h[void drm_crtc_vblank_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjvBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrBhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK\ubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrBhhhjBhK\ubj )}(hdrm_crtc_vblank_atomic_disableh]j )}(hdrm_crtc_vblank_atomic_disableh]hdrm_crtc_vblank_atomic_disable}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ](j j eh"]h$]h&]j j uh1j hjrBhhhjBhK\ubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]j)}jjBsb c.drm_crtc_vblank_atomic_disableasbuh1hhjBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjBubj )}(hcrtch]hcrtc}(hj ChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjBubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj%ChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!Cubj )}(h h]h }(hj2ChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!Cubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjCChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@Cubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjECmodnameN classnameNj j )}j ]jB c.drm_crtc_vblank_atomic_disableasbuh1hhj!Cubj )}(h h]h }(hjaChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!Cubj)}(hjOh]h*}(hjoChhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!Cubj )}(hstateh]hstate}(hj|ChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!Cubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjBubeh}(h]h ]h"]h$]h&]j j uh1jhjrBhhhjBhK\ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnBhhhjBhK\ubah}(h]jiBah ](j j eh"]h$]h&]j j )j huh1j{ hjBhK\hjkBhhubj )}(hhh]h)}(hXImplements struct :c:type:`drm_crtc_helper_funcs.atomic_disable `h](hImplements struct }(hjChhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]jf )}(hjCh]h$drm_crtc_helper_funcs.atomic_disable}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jB c.drm_crtc_vblank_atomic_disableasbj drm_crtc_helper_funcsuh1hhj=hK(hjCubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK\hjChhubah}(h]h ]h"]h$]h&]uh1j hjkBhhhjBhK\ubeh}(h]h ](j functioneh"]h$]h&]j j j jCj jCj j j uh1jv hhhj;hNhNubj )}(hX[**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_commit *state`` The atomic state **Description** The helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs. See also struct :c:type:`drm_crtc_funcs.atomic_disable `.h](h)}(h**Parameters**h]j )}(hjCh]h Parameters}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK`hjCubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` The CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hj Dh]hstruct drm_crtc *crtc}(hj DhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj Dubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK]hjDubj| )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj$DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj DhK]hj!Dubah}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hj DhK]hjDubjZ )}(h5``struct drm_atomic_commit *state`` The atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjDDh]hstruct drm_atomic_commit *state}(hjFDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBDubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK^hj>Dubj| )}(hhh]h)}(hThe atomic stateh]hThe atomic state}(hj]DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYDhK^hjZDubah}(h]h ]h"]h$]h&]uh1j{ hj>Dubeh}(h]h ]h"]h$]h&]uh1jY hjYDhK^hjDubeh}(h]h ]h"]h$]h&]uh1jT hjCubh)}(h**Description**h]j )}(hjDh]h Description}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}Dubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK`hjCubh)}(hThe helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs.h]hThe helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK_hjCubh)}(hISee also struct :c:type:`drm_crtc_funcs.atomic_disable `.h](hSee also struct }(hjDhhhNhNubh)}(h8:c:type:`drm_crtc_funcs.atomic_disable `h]jf )}(hjDh]hdrm_crtc_funcs.atomic_disable}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKbhjDubh.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhKbhjCubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj;hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 7drm_crtc_vblank_helper_enable_vblank_timer (C function),c.drm_crtc_vblank_helper_enable_vblank_timerhNtauh1jd hj;hhhNhNubjw )}(hhh](j| )}(hFint drm_crtc_vblank_helper_enable_vblank_timer (struct drm_crtc *crtc)h]j )}(hEint drm_crtc_vblank_helper_enable_vblank_timer(struct drm_crtc *crtc)h](j)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKqubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDhhhjEhKqubj )}(h*drm_crtc_vblank_helper_enable_vblank_timerh]j )}(h*drm_crtc_vblank_helper_enable_vblank_timerh]h*drm_crtc_vblank_helper_enable_vblank_timer}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ](j j eh"]h$]h&]j j uh1j hjDhhhjEhKqubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj3EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Eubj )}(h h]h }(hj@EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Eubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjQEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNEubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjSEmodnameN classnameNj j )}j ]j)}jjEsb,c.drm_crtc_vblank_helper_enable_vblank_timerasbuh1hhj/Eubj )}(h h]h }(hjqEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Eubj)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/Eubj )}(hcrtch]hcrtc}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Eubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+Eubah}(h]h ]h"]h$]h&]j j uh1jhjDhhhjEhKqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjDhhhjEhKqubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j{ hjEhKqhjDhhubj )}(hhh]h)}(hIImplements struct :c:type:`drm_crtc_funcs.enable_vblank `h](hImplements struct }(hjEhhhNhNubh)}(h7:c:type:`drm_crtc_funcs.enable_vblank `h]jf )}(hjEh]hdrm_crtc_funcs.enable_vblank}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jmE,c.drm_crtc_vblank_helper_enable_vblank_timerasbj drm_crtc_funcsuh1hhj=hK(hjEubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKqhjEhhubah}(h]h ]h"]h$]h&]uh1j hjDhhhjEhKqubeh}(h]h ](j functioneh"]h$]h&]j j j jEj jEj j j uh1jv hhhj;hNhNubj )}(hX#**Parameters** ``struct drm_crtc *crtc`` The CRTC **Description** The helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct :c:type:`drm_vblank_crtc.framedur_ns `. See also struct :c:type:`drm_crtc_helper_funcs.enable_vblank `. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hjEh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKuhjEubjU )}(hhh]jZ )}(h#``struct drm_crtc *crtc`` The CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjFh]hstruct drm_crtc *crtc}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKrhjFubj| )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj4FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0FhKrhj1Fubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hj0FhKrhjFubah}(h]h ]h"]h$]h&]uh1jT hjEubh)}(h**Description**h]j )}(hjVFh]h Description}(hjXFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTFubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKthjEubh)}(hXEThe helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct :c:type:`drm_vblank_crtc.framedur_ns `.h](hX The helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct }(hjlFhhhNhNubh)}(h7:c:type:`drm_vblank_crtc.framedur_ns `h]jf )}(hjvFh]hdrm_vblank_crtc.framedur_ns}(hjxFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjtFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_vblank_crtcuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKshjlFubh.}(hjlFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhKshjEubh)}(hVSee also struct :c:type:`drm_crtc_helper_funcs.enable_vblank `.h](hSee also struct }(hjFhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.enable_vblank `h]jf )}(hjFh]h#drm_crtc_helper_funcs.enable_vblank}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKyhjFubh.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhKyhjEubh)}(h **Return**h]j )}(hjFh]hReturn}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK{hjEubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK|hjEubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj;hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 8drm_crtc_vblank_helper_disable_vblank_timer (C function)-c.drm_crtc_vblank_helper_disable_vblank_timerhNtauh1jd hj;hhhNhNubjw )}(hhh](j| )}(hHvoid drm_crtc_vblank_helper_disable_vblank_timer (struct drm_crtc *crtc)h]j )}(hGvoid drm_crtc_vblank_helper_disable_vblank_timer(struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKubj )}(h h]h }(hj&GhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGhhhj%GhKubj )}(h+drm_crtc_vblank_helper_disable_vblank_timerh]j )}(h+drm_crtc_vblank_helper_disable_vblank_timerh]h+drm_crtc_vblank_helper_disable_vblank_timer}(hj8GhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4Gubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhj%GhKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjTGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPGubj )}(h h]h }(hjaGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPGubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjrGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoGubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtGmodnameN classnameNj j )}j ]j)}jj:Gsb-c.drm_crtc_vblank_helper_disable_vblank_timerasbuh1hhjPGubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPGubj)}(hjOh]h*}(hjGhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjPGubj )}(hcrtch]hcrtc}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLGubah}(h]h ]h"]h$]h&]j j uh1jhjGhhhj%GhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhj%GhKubah}(h]j Gah ](j j eh"]h$]h&]j j )j huh1j{ hj%GhKhj Ghhubj )}(hhh]h)}(hJImplements struct :c:type:`drm_crtc_funcs.disable_vblank `h](hImplements struct }(hjGhhhNhNubh)}(h8:c:type:`drm_crtc_funcs.disable_vblank `h]jf )}(hjGh]hdrm_crtc_funcs.disable_vblank}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jG-c.drm_crtc_vblank_helper_disable_vblank_timerasbj drm_crtc_funcsuh1hhj=hK(hjGubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjGhhubah}(h]h ]h"]h$]h&]uh1j hj Ghhhj%GhKubeh}(h]h ](j functioneh"]h$]h&]j j j jHj jHj j j uh1jv hhhj;hNhNubj )}(hX2**Parameters** ``struct drm_crtc *crtc`` The CRTC **Description** The helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. See also struct :c:type:`drm_crtc_helper_funcs.disable_vblank `.h](h)}(h**Parameters**h]j )}(hjHh]h Parameters}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjHubjU )}(hhh]jZ )}(h#``struct drm_crtc *crtc`` The CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:Hubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhj6Hubj| )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hjUHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQHhKhjRHubah}(h]h ]h"]h$]h&]uh1j{ hj6Hubeh}(h]h ]h"]h$]h&]uh1jY hjQHhKhj3Hubah}(h]h ]h"]h$]h&]uh1jT hjHubh)}(h**Description**h]j )}(hjwHh]h Description}(hjyHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuHubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjHubh)}(hThe helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer.h]hThe helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjHubh)}(hWSee also struct :c:type:`drm_crtc_helper_funcs.disable_vblank `.h](hSee also struct }(hjHhhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.disable_vblank `h]jf )}(hjHh]h$drm_crtc_helper_funcs.disable_vblank}(hjHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjHubh.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhKhjHubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj;hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq Cdrm_crtc_vblank_helper_get_vblank_timestamp_from_timer (C function)8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerhNtauh1jd hj;hhhNhNubjw )}(hhh](j| )}(hbool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer (struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h]j )}(hbool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer(struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h](j)}(hjIh]hbool}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHhhhjHhKubj )}(h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timerh]j )}(h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timerh]h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timer}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Iubah}(h]h ](j j eh"]h$]h&]j j uh1j hjHhhhjHhKubj)}(hQ(struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj*IhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&Iubj )}(h h]h }(hj7IhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&Iubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjHIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJImodnameN classnameNj j )}j ]j)}jjIsb8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbuh1hhj&Iubj )}(h h]h }(hjhIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&Iubj)}(hjOh]h*}(hjvIhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj&Iubj )}(hcrtch]hcrtc}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&Iubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"Iubj)}(hint *max_errorh](j)}(hinth]hint}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj)}(hjOh]h*}(hjIhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjIubj )}(h max_errorh]h max_error}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"Iubj)}(hktime_t *vblank_timeh](h)}(hhh]j )}(hktime_th]hktime_t}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jdI8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbuh1hhjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj)}(hjOh]h*}(hj JhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjIubj )}(h vblank_timeh]h vblank_time}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"Iubj)}(hbool in_vblank_irqh](j)}(hjIh]hbool}(hj3JhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/Jubj )}(h h]h }(hj@JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Jubj )}(h in_vblank_irqh]h in_vblank_irq}(hjNJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Jubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"Iubeh}(h]h ]h"]h$]h&]j j uh1jhjHhhhjHhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhjHhKubah}(h]jHah ](j j eh"]h$]h&]j j )j huh1j{ hjHhKhjHhhubj )}(hhh]h)}(hPImplements struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `h](hImplements struct }(hjxJhhhNhNubh)}(h>:c:type:`drm_crtc_funcs.get_vblank_timestamp `h]jf )}(hjJh]h#drm_crtc_funcs.get_vblank_timestamp}(hjJhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jdI8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbj drm_crtc_funcsuh1hhj=hK(hjxJubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjuJhhubah}(h]h ]h"]h$]h&]uh1j hjHhhhjHhKubeh}(h]h ](j functioneh"]h$]h&]j j j jJj jJj j j uh1jv hhhj;hNhNubj )}(hXY**Parameters** ``struct drm_crtc *crtc`` The CRTC ``int *max_error`` Maximum acceptable error ``ktime_t *vblank_time`` Returns the next vblank timestamp ``bool in_vblank_irq`` True is called from drm_crtc_handle_vblank() **Description** The helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer's expiry time. See also struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `. **Return** True on success, or false otherwise.h](h)}(h**Parameters**h]j )}(hjJh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjJubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` The CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjJh]hstruct drm_crtc *crtc}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjJubj| )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1j{ hjJubeh}(h]h ]h"]h$]h&]uh1jY hjJhKhjJubjZ )}(h,``int *max_error`` Maximum acceptable error h](j` )}(h``int *max_error``h]jf )}(hjKh]hint *max_error}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjKubj| )}(hhh]h)}(hMaximum acceptable errorh]hMaximum acceptable error}(hj/KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+KhKhj,Kubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hj+KhKhjJubjZ )}(h;``ktime_t *vblank_time`` Returns the next vblank timestamp h](j` )}(h``ktime_t *vblank_time``h]jf )}(hjOKh]hktime_t *vblank_time}(hjQKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMKubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjIKubj| )}(hhh]h)}(h!Returns the next vblank timestamph]h!Returns the next vblank timestamp}(hjhKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdKhKhjeKubah}(h]h ]h"]h$]h&]uh1j{ hjIKubeh}(h]h ]h"]h$]h&]uh1jY hjdKhKhjJubjZ )}(hD``bool in_vblank_irq`` True is called from drm_crtc_handle_vblank() h](j` )}(h``bool in_vblank_irq``h]jf )}(hjKh]hbool in_vblank_irq}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjKubj| )}(hhh]h)}(h,True is called from drm_crtc_handle_vblank()h]h,True is called from drm_crtc_handle_vblank()}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhKhjKubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjKhKhjJubeh}(h]h ]h"]h$]h&]uh1jT hjJubh)}(h**Description**h]j )}(hjKh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjJubh)}(hThe helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer's expiry time.h]hThe helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer’s expiry time.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjJubh)}(hOSee also struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `.h](hSee also struct }(hjKhhhNhNubh)}(h>:c:type:`drm_crtc_funcs.get_vblank_timestamp `h]jf )}(hjKh]h#drm_crtc_funcs.get_vblank_timestamp}(hjKhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjKubh.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjLhKhjJubh)}(h **Return**h]j )}(hjLh]hReturn}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjJubh)}(h$True on success, or false otherwise.h]h$True on success, or false otherwise.}(hj2LhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj;hhhNhNubeh}(h]jah ]h"]vblank helper referenceah$]h&]uh1hhjqBhhhhhKbubeh}(h](jjiBeh ]h"]()atomic modeset helper functions referencedrm_atomic_helpereh$]h&]uh1hhhhhhhhK2expect_referenced_by_name}jTLj_Bsexpect_referenced_by_id}jiBj_Bsubh)}(hhh](h)}(h fbdev Helper Functions Referenceh]h fbdev Helper Functions Reference}(hj^LhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj[LhhhhhKnubh)}(hXhThe fb helper functions are useful to provide an fbdev on top of a drm kernel mode setting driver. They can be used mostly independently from the crtc helper functions used by many drivers to implement the kernel mode setting interfaces. Drivers that use one of the shared memory managers, TTM, SHMEM, DMA, should instead use the corresponding fbdev emulation.h]hXhThe fb helper functions are useful to provide an fbdev on top of a drm kernel mode setting driver. They can be used mostly independently from the crtc helper functions used by many drivers to implement the kernel mode setting interfaces. Drivers that use one of the shared memory managers, TTM, SHMEM, DMA, should instead use the corresponding fbdev emulation.}(hjlLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKPhj[Lhhubh)}(hFor suspend/resume consider using drm_mode_config_helper_suspend() and drm_mode_config_helper_resume() which takes care of fbdev as well.h]hFor suspend/resume consider using drm_mode_config_helper_suspend() and drm_mode_config_helper_resume() which takes care of fbdev as well.}(hj{LhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKVhj[Lhhubh)}(hxAll other functions exported by the fb helper library can be used to implement the fbdev driver interface by the driver.h]hxAll other functions exported by the fb helper library can be used to implement the fbdev driver interface by the driver.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKYhj[Lhhubh)}(hX%It is possible, though perhaps somewhat tricky, to implement race-free hotplug detection using the fbdev helpers. The drm_fb_helper_prepare() helper must be called first to initialize the minimum required to make hotplug detection work. Drivers also need to make sure to properly set up the :c:type:`drm_mode_config.funcs ` member. After calling drm_kms_helper_poll_init() it is safe to enable interrupts and start processing hotplug events. At the same time, drivers should initialize all modeset objects such as CRTCs, encoders and connectors. To finish up the fbdev helper initialization, the drm_fb_helper_init() function is called. To probe for all attached displays and set up an initial configuration using the detected hardware, drivers should call drm_fb_helper_initial_config().h](hX#It is possible, though perhaps somewhat tricky, to implement race-free hotplug detection using the fbdev helpers. The drm_fb_helper_prepare() helper must be called first to initialize the minimum required to make hotplug detection work. Drivers also need to make sure to properly set up the }(hjLhhhNhNubh)}(h1:c:type:`drm_mode_config.funcs `h]jf )}(hjLh]hdrm_mode_config.funcs}(hjLhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chK\hjLubhX member. After calling drm_kms_helper_poll_init() it is safe to enable interrupts and start processing hotplug events. At the same time, drivers should initialize all modeset objects such as CRTCs, encoders and connectors. To finish up the fbdev helper initialization, the drm_fb_helper_init() function is called. To probe for all attached displays and set up an initial configuration using the detected hardware, drivers should call drm_fb_helper_initial_config().}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjLhK\hj[Lhhubh)}(hX4If :c:type:`drm_framebuffer_funcs.dirty ` is set, the drm_fb_helper_{cfb,sys}_{write,fillrect,copyarea,imageblit} functions will accumulate changes and schedule :c:type:`drm_fb_helper.dirty_work ` to run right away. This worker then calls the dirty() function ensuring that it will always run in process context since the fb_*() function could be running in atomic context. If drm_fb_helper_deferred_io() is used as the deferred_io callback it will also schedule dirty_work with the damage collected from the mmap page writes.h](hIf }(hjLhhhNhNubh)}(h=:c:type:`drm_framebuffer_funcs.dirty `h]jf )}(hjLh]hdrm_framebuffer_funcs.dirty}(hjLhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKhhjLubhx is set, the drm_fb_helper_{cfb,sys}_{write,fillrect,copyarea,imageblit} functions will accumulate changes and schedule }(hjLhhhNhNubh)}(h2:c:type:`drm_fb_helper.dirty_work `h]jf )}(hjLh]hdrm_fb_helper.dirty_work}(hjLhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_fb_helperuh1hhjLhKhhjLubhXJ to run right away. This worker then calls the dirty() function ensuring that it will always run in process context since the fb_*() function could be running in atomic context. If drm_fb_helper_deferred_io() is used as the deferred_io callback it will also schedule dirty_work with the damage collected from the mmap page writes.}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjLhKhhj[Lhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_fb_helper_surface_size (C struct)c.drm_fb_helper_surface_sizehNtauh1jd hj[Lhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhNubjw )}(hhh](j| )}(hdrm_fb_helper_surface_sizeh]j )}(h!struct drm_fb_helper_surface_sizeh](j )}(hj h]hstruct}(hj:MhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Mhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKubj )}(h h]h }(hjHMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6MhhhjGMhKubj )}(hdrm_fb_helper_surface_sizeh]j )}(hj4Mh]hdrm_fb_helper_surface_size}(hjZMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVMubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6MhhhjGMhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2MhhhjGMhKubah}(h]j,Mah ](j j eh"]h$]h&]j j )j huh1j{ hjGMhKhj/Mhhubj )}(hhh]h)}(h-describes fbdev size and scanout surface sizeh]h-describes fbdev size and scanout surface size}(hj|MhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK)hjyMhhubah}(h]h ]h"]h$]h&]uh1j hj/MhhhjGMhKubeh}(h]h ](j structeh"]h$]h&]j j j jMj jMj j j uh1jv hhhj[Lhj.MhNubj )}(hX**Definition**:: struct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; }; **Members** ``fb_width`` fbdev width ``fb_height`` fbdev height ``surface_width`` scanout buffer width ``surface_height`` scanout buffer height ``surface_bpp`` scanout buffer bpp ``surface_depth`` scanout buffer depthh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubh:}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK-hjMubj, )}(hstruct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; };h]hstruct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; };}hjMsbah}(h]h ]h"]h$]h&]j j uh1j+ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK/hjMubh)}(h **Members**h]j )}(hjMh]hMembers}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK8hjMubjU )}(hhh](jZ )}(h``fb_width`` fbdev width h](j` )}(h ``fb_width``h]jf )}(hjMh]hfb_width}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK+hjMubj| )}(hhh]h)}(h fbdev widthh]h fbdev width}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhK+hjMubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjMhK+hjMubjZ )}(h``fb_height`` fbdev height h](j` )}(h ``fb_height``h]jf )}(hj"Nh]h fb_height}(hj$NhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj Nubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK,hjNubj| )}(hhh]h)}(h fbdev heighth]h fbdev height}(hj;NhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7NhK,hj8Nubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hj7NhK,hjMubjZ )}(h'``surface_width`` scanout buffer width h](j` )}(h``surface_width``h]jf )}(hj[Nh]h surface_width}(hj]NhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYNubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK-hjUNubj| )}(hhh]h)}(hscanout buffer widthh]hscanout buffer width}(hjtNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjpNhK-hjqNubah}(h]h ]h"]h$]h&]uh1j{ hjUNubeh}(h]h ]h"]h$]h&]uh1jY hjpNhK-hjMubjZ )}(h)``surface_height`` scanout buffer height h](j` )}(h``surface_height``h]jf )}(hjNh]hsurface_height}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK.hjNubj| )}(hhh]h)}(hscanout buffer heighth]hscanout buffer height}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhK.hjNubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjNhK.hjMubjZ )}(h#``surface_bpp`` scanout buffer bpp h](j` )}(h``surface_bpp``h]jf )}(hjNh]h surface_bpp}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK/hjNubj| )}(hhh]h)}(hscanout buffer bpph]hscanout buffer bpp}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhK/hjNubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjNhK/hjMubjZ )}(h&``surface_depth`` scanout buffer depthh](j` )}(h``surface_depth``h]jf )}(hjOh]h surface_depth}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK/hjOubj| )}(hhh]h)}(hscanout buffer depthh]hscanout buffer depth}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK0hjOubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjOhK/hjMubeh}(h]h ]h"]h$]h&]uh1jT hjMubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[Lhhhj.MhNubh)}(h**Description**h]j )}(hjIOh]h Description}(hjKOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGOubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK3hj[Lhhubh)}(hXNote that the scanout surface width/height may be larger than the fbdev width/height. In case of multiple displays, the scanout surface is sized according to the largest width/height (so it is large enough for all CRTCs to scanout). But the fbdev width/height is sized to the minimum width/ height of all the displays. This ensures that fbcon fits on the smallest of the attached displays. fb_width/fb_height is used by drm_fb_helper_fill_info() to fill out the :c:type:`fb_info.var ` structure.h](hXNote that the scanout surface width/height may be larger than the fbdev width/height. In case of multiple displays, the scanout surface is sized according to the largest width/height (so it is large enough for all CRTCs to scanout). But the fbdev width/height is sized to the minimum width/ height of all the displays. This ensures that fbcon fits on the smallest of the attached displays. fb_width/fb_height is used by drm_fb_helper_fill_info() to fill out the }(hj_OhhhNhNubh)}(h:c:type:`fb_info.var `h]jf )}(hjiOh]h fb_info.var}(hjkOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjgOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j fb_infouh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK0hj_Oubh structure.}(hj_OhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjOhK0hj[Lhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_fb_helper_funcs (C struct)c.drm_fb_helper_funcshNtauh1jd hj[Lhhhj.MhNubjw )}(hhh](j| )}(hdrm_fb_helper_funcsh]j )}(hstruct drm_fb_helper_funcsh](j )}(hj h]hstruct}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK;ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOhhhjOhK;ubj )}(hdrm_fb_helper_funcsh]j )}(hjOh]hdrm_fb_helper_funcs}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hjOhhhjOhK;ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjOhhhjOhK;ubah}(h]jOah ](j j eh"]h$]h&]j j )j huh1j{ hjOhK;hjOhhubj )}(hhh]h)}(h0driver callbacks for the fbdev emulation libraryh]h0driver callbacks for the fbdev emulation library}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKChjOhhubah}(h]h ]h"]h$]h&]uh1j hjOhhhjOhK;ubeh}(h]h ](j structeh"]h$]h&]j j j jPj jPj j j uh1jv hhhj[Lhj.MhNubj )}(hX**Definition**:: struct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); }; **Members** ``fb_dirty`` Driver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written. This callback is optional. Returns: 0 on success, or an error code otherwise. ``fb_restore`` Driver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback. ``fb_set_suspend`` Driver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Pubh:}(hj PhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKGhjPubj, )}(hstruct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); };h]hstruct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); };}hj)Psbah}(h]h ]h"]h$]h&]j j uh1j+ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKIhjPubh)}(h **Members**h]j )}(hj:Ph]hMembers}(hjworker used during resume if the console lock is already takenh]h>worker used during resume if the console lock is already taken}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThK~hjTubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjThK~hjMRubjZ )}(hX6``lock`` Top-level FBDEV helper lock. This protects all internal data structures and lists, such as **connector_info** and **crtc_info**. FIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible. h](j` )}(h``lock``h]jf )}(hjTh]hlock}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjTubj| )}(hhh](h)}(hTop-level FBDEV helper lock. This protects all internal data structures and lists, such as **connector_info** and **crtc_info**.h](h[Top-level FBDEV helper lock. This protects all internal data structures and lists, such as }(hjThhhNhNubj )}(h**connector_info**h]hconnector_info}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubh and }(hjThhhNhNubj )}(h **crtc_info**h]h crtc_info}(hj UhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubh.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjTubh)}(hFIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible.h]hFIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible.}(hj$UhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjTubeh}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjThKhjMRubjZ )}(h``delayed_hotplug`` A hotplug was received while fbdev wasn't in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again. h](j` )}(h``delayed_hotplug``h]jf )}(hjEUh]hdelayed_hotplug}(hjGUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCUubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj?Uubj| )}(hhh]h)}(hA hotplug was received while fbdev wasn't in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again.h]hA hotplug was received while fbdev wasn’t in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again.}(hj^UhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj[Uubah}(h]h ]h"]h$]h&]uh1j{ hj?Uubeh}(h]h ]h"]h$]h&]uh1jY hjZUhKhjMRubjZ )}(hX(``deferred_setup`` If no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually. Protected by **lock**. h](j` )}(h``deferred_setup``h]jf )}(hjUh]hdeferred_setup}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}Uubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjyUubj| )}(hhh](h)}(hIf no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually.h]hIf no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjUubh)}(hProtected by **lock**.h](h Protected by }(hjUhhhNhNubj )}(h**lock**h]hlock}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubh.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhKhjUubeh}(h]h ]h"]h$]h&]uh1j{ hjyUubeh}(h]h ]h"]h$]h&]uh1jY hjUhKhjMRubjZ )}(h``preferred_bpp`` Temporary storage for the driver's preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on. See also: **deferred_setup** h](j` )}(h``preferred_bpp``h]jf )}(hjUh]h preferred_bpp}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjUubj| )}(hhh](h)}(hTemporary storage for the driver's preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on.h]hTemporary storage for the driver’s preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjUubh)}(hSee also: **deferred_setup**h](h See also: }(hjVhhhNhNubj )}(h**deferred_setup**h]hdeferred_setup}(hj VhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1hhjUhKhjUubeh}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjUhKhjMRubjZ )}(h``fbdefio`` Temporary storage for the driver's FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.h](j` )}(h ``fbdefio``h]jf )}(hj/Vh]hfbdefio}(hj1VhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-Vubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj)Vubj| )}(hhh]h)}(hTemporary storage for the driver's FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.h]hTemporary storage for the driver’s FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.}(hjHVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjEVubah}(h]h ]h"]h$]h&]uh1j{ hj)Vubeh}(h]h ]h"]h$]h&]uh1jY hjDVhKhjMRubeh}(h]h ]h"]h$]h&]uh1jT hjRubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[Lhhhj.MhNubh)}(h**Description**h]j )}(hjrVh]h Description}(hjtVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpVubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj[Lhhubh)}(hXThis is the main structure used by the fbdev helpers. Drivers supporting fbdev emulation should embedded this into their overall driver structure. Drivers must also fill out a :c:type:`struct drm_fb_helper_funcs ` with a few operations.h](hThis is the main structure used by the fbdev helpers. Drivers supporting fbdev emulation should embedded this into their overall driver structure. Drivers must also fill out a }(hjVhhhNhNubh)}(h::c:type:`struct drm_fb_helper_funcs `h]jf )}(hjVh]hstruct drm_fb_helper_funcs}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_fb_helper_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK~hjVubh with a few operations.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVhK~hj[Lhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #DRM_FB_HELPER_DEFAULT_OPS (C macro)c.DRM_FB_HELPER_DEFAULT_OPShNtauh1jd hj[Lhhhj.MhNubjw )}(hhh](j| )}(hDRM_FB_HELPER_DEFAULT_OPSh]j )}(hDRM_FB_HELPER_DEFAULT_OPSh]j )}(hDRM_FB_HELPER_DEFAULT_OPSh]j )}(hjVh]hDRM_FB_HELPER_DEFAULT_OPS}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ](j j eh"]h$]h&]j j uh1j hjVhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjVhhhjVhKubah}(h]jVah ](j j eh"]h$]h&]j j )j huh1j{ hjVhKhjVhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjVhhhjVhKubeh}(h]h ](j macroeh"]h$]h&]j j j jWj jWj j j uh1jv hhhj[Lhj.MhNubh)}(h``DRM_FB_HELPER_DEFAULT_OPS``h]jf )}(hj Wh]hDRM_FB_HELPER_DEFAULT_OPS}(hj WhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj[LhhubjWh]h Description}(hj@WhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Xubj )}(hforceh]hforce}(hjLXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Xubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjWubeh}(h]h ]h"]h$]h&]j j uh1jhj~WhhhjWhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjzWhhhjWhKubah}(h]juWah ](j j eh"]h$]h&]j j )j huh1j{ hjWhKhjwWhhubj )}(hhh]h)}(hrestore fbdev configurationh]hrestore fbdev configuration}(hjvXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjsXhhubah}(h]h ]h"]h$]h&]uh1j hjwWhhhjWhKubeh}(h]h ](j functioneh"]h$]h&]j j j jXj jXj j j uh1jv hhhj[LhNhNubj )}(hX**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL ``bool force`` ignore present DRM master **Description** This helper should be called from fbdev emulation's :c:type:`drm_client_funcs.restore ` callback. It ensures that the user isn't greeted with a black screen when the userspace compositor releases the display device. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hjXh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjXubjU )}(hhh](jZ )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hjXh]hstruct drm_fb_helper *fb_helper}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjXubj| )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhKhjXubah}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjXhKhjXubjZ )}(h)``bool force`` ignore present DRM master h](j` )}(h``bool force``h]jf )}(hjXh]h bool force}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjXubj| )}(hhh]h)}(hignore present DRM masterh]hignore present DRM master}(hj YhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhKhjYubah}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjYhKhjXubeh}(h]h ]h"]h$]h&]uh1jT hjXubh)}(h**Description**h]j )}(hj+Yh]h Description}(hj-YhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)Yubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjXubh)}(hThis helper should be called from fbdev emulation's :c:type:`drm_client_funcs.restore ` callback. It ensures that the user isn't greeted with a black screen when the userspace compositor releases the display device.h](h6This helper should be called from fbdev emulation’s }(hjAYhhhNhNubh)}(h5:c:type:`drm_client_funcs.restore `h]jf )}(hjKYh]hdrm_client_funcs.restore}(hjMYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjIYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_client_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjAYubh callback. It ensures that the user isn’t greeted with a black screen when the userspace compositor releases the display device.}(hjAYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhYhKhjXubh)}(h **Return**h]j )}(hjuYh]hReturn}(hjwYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsYubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjXubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_fb_helper_blank (C function)c.drm_fb_helper_blankhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(h9int drm_fb_helper_blank (int blank, struct fb_info *info)h]j )}(h8int drm_fb_helper_blank(int blank, struct fb_info *info)h](j)}(hinth]hint}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhhhjYhKubj )}(hdrm_fb_helper_blankh]j )}(hdrm_fb_helper_blankh]hdrm_fb_helper_blank}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ](j j eh"]h$]h&]j j uh1j hjYhhhjYhKubj)}(h!(int blank, struct fb_info *info)h](j)}(h int blankh](j)}(hinth]hint}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(hblankh]hblank}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubj)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hj,ZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Zubj )}(h h]h }(hj9ZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Zubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjJZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLZmodnameN classnameNj j )}j ]j)}jjYsbc.drm_fb_helper_blankasbuh1hhj(Zubj )}(h h]h }(hjjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Zubj)}(hjOh]h*}(hjxZhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(Zubj )}(hinfoh]hinfo}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Zubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubeh}(h]h ]h"]h$]h&]j j uh1jhjYhhhjYhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjYhhhjYhKubah}(h]jYah ](j j eh"]h$]h&]j j )j huh1j{ hjYhKhjYhhubj )}(hhh]h)}(h5implementation for :c:type:`fb_ops.fb_blank `h](himplementation for }(hjZhhhNhNubh)}(h":c:type:`fb_ops.fb_blank `h]jf )}(hjZh]hfb_ops.fb_blank}(hjZhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jfZc.drm_fb_helper_blankasbj fb_opsuh1hhjWhKhjZubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjZhhubah}(h]h ]h"]h$]h&]uh1j hjYhhhjYhKubeh}(h]h ](j functioneh"]h$]h&]j j j jZj jZj j j uh1jv hhhj[LhNhNubj )}(hq**Parameters** ``int blank`` desired blanking state ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j )}(hjZh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjZubjU )}(hhh](jZ )}(h%``int blank`` desired blanking state h](j` )}(h ``int blank``h]jf )}(hj[h]h int blank}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhj[ubj| )}(hhh]h)}(hdesired blanking stateh]hdesired blanking state}(hj-[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)[hKhj*[ubah}(h]h ]h"]h$]h&]uh1j{ hj[ubeh}(h]h ]h"]h$]h&]uh1jY hj)[hKhj [ubjZ )}(h7``struct fb_info *info`` fbdev registered by the helperh](j` )}(h``struct fb_info *info``h]jf )}(hjM[h]hstruct fb_info *info}(hjO[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjK[ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjG[ubj| )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjf[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjc[ubah}(h]h ]h"]h$]h&]uh1j{ hjG[ubeh}(h]h ]h"]h$]h&]uh1jY hjb[hKhj [ubeh}(h]h ]h"]h$]h&]uh1jT hjZubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_fb_helper_prepare (C function)c.drm_fb_helper_preparehNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_helper_prepare (struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h]j )}(hvoid drm_fb_helper_prepare(struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMqubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhhj[hMqubj )}(hdrm_fb_helper_prepareh]j )}(hdrm_fb_helper_prepareh]hdrm_fb_helper_prepare}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhj[hMqubj)}(h{(struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j)}jj[sbc.drm_fb_helper_prepareasbuh1hhj[ubj )}(h h]h }(hj"\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hj0\hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(hdevh]hdev}(hj=\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(hstruct drm_fb_helper *helperh](j )}(hj h]hstruct}(hjV\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubj )}(h h]h }(hjc\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjt\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjv\modnameN classnameNj j )}j ]j\c.drm_fb_helper_prepareasbuh1hhjR\ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubj)}(hjOh]h*}(hj\hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjR\ubj )}(hhelperh]hhelper}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(hunsigned int preferred_bpph](j)}(hunsignedh]hunsigned}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj)}(hinth]hint}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj )}(h preferred_bpph]h preferred_bpp}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(h'const struct drm_fb_helper_funcs *funcsh](j )}(hjAh]hconst}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hj$]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(hj h]hstruct}(hj2]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hj?]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hdrm_fb_helper_funcsh]hdrm_fb_helper_funcs}(hjP]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjR]modnameN classnameNj j )}j ]j\c.drm_fb_helper_prepareasbuh1hhj]ubj )}(h h]h }(hjn]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj)}(hjOh]h*}(hj|]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj]ubj )}(hfuncsh]hfuncs}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubeh}(h]h ]h"]h$]h&]j j uh1jhj[hhhj[hMqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[hhhj[hMqubah}(h]j[ah ](j j eh"]h$]h&]j j )j huh1j{ hj[hMqhj[hhubj )}(hhh]h)}(hsetup a drm_fb_helper structureh]hsetup a drm_fb_helper structure}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMqhj]hhubah}(h]h ]h"]h$]h&]uh1j hj[hhhj[hMqubeh}(h]h ](j functioneh"]h$]h&]j j j j]j j]j j j uh1jv hhhj[LhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_fb_helper *helper`` driver-allocated fbdev helper structure to set up ``unsigned int preferred_bpp`` Preferred bits per pixel for the device. ``const struct drm_fb_helper_funcs *funcs`` pointer to structure of functions associate with this helper **Description** Sets up the bare minimum to make the framebuffer helper usable. This is useful to implement race-free initialization of the polling helpers.h](h)}(h**Parameters**h]j )}(hj]h]h Parameters}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMuhj]ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj]h]hstruct drm_device *dev}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMrhj]ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj ^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ^hMrhj ^ubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hj ^hMrhj]ubjZ )}(hS``struct drm_fb_helper *helper`` driver-allocated fbdev helper structure to set up h](j` )}(h ``struct drm_fb_helper *helper``h]jf )}(hj-^h]hstruct drm_fb_helper *helper}(hj/^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+^ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMshj'^ubj| )}(hhh]h)}(h1driver-allocated fbdev helper structure to set uph]h1driver-allocated fbdev helper structure to set up}(hjF^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjB^hMshjC^ubah}(h]h ]h"]h$]h&]uh1j{ hj'^ubeh}(h]h ]h"]h$]h&]uh1jY hjB^hMshj]ubjZ )}(hH``unsigned int preferred_bpp`` Preferred bits per pixel for the device. h](j` )}(h``unsigned int preferred_bpp``h]jf )}(hjf^h]hunsigned int preferred_bpp}(hjh^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjd^ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMthj`^ubj| )}(hhh]h)}(h(Preferred bits per pixel for the device.h]h(Preferred bits per pixel for the device.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{^hMthj|^ubah}(h]h ]h"]h$]h&]uh1j{ hj`^ubeh}(h]h ]h"]h$]h&]uh1jY hj{^hMthj]ubjZ )}(hi``const struct drm_fb_helper_funcs *funcs`` pointer to structure of functions associate with this helper h](j` )}(h+``const struct drm_fb_helper_funcs *funcs``h]jf )}(hj^h]h'const struct drm_fb_helper_funcs *funcs}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMuhj^ubj| )}(hhh]h)}(hvoid drm_fb_helper_unprepare (struct drm_fb_helper *fb_helper)h]j )}(h=void drm_fb_helper_unprepare(struct drm_fb_helper *fb_helper)h](j)}(hvoidh]hvoid}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hj._hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhj-_hMubj )}(hdrm_fb_helper_unprepareh]j )}(hdrm_fb_helper_unprepareh]hdrm_fb_helper_unprepare}(hj@_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_hhhj-_hMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hj\_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX_ubj )}(h h]h }(hji_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX_ubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjz_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|_modnameN classnameNj j )}j ]j)}jjB_sbc.drm_fb_helper_unprepareasbuh1hhjX_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX_ubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjX_ubj )}(h fb_helperh]h fb_helper}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjT_ubah}(h]h ]h"]h$]h&]j j uh1jhj_hhhj-_hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj_hhhj-_hMubah}(h]j_ah ](j j eh"]h$]h&]j j )j huh1j{ hj-_hMhj_hhubj )}(hhh]h)}(h"clean up a drm_fb_helper structureh]h"clean up a drm_fb_helper structure}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj_hhubah}(h]h ]h"]h$]h&]uh1j hj_hhhj-_hMubeh}(h]h ](j functioneh"]h$]h&]j j j j_j j_j j j uh1jv hhhj[LhNhNubj )}(h**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to set up **Description** Cleans up the framebuffer helper. Inverse of drm_fb_helper_prepare().h](h)}(h**Parameters**h]j )}(hj`h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj_ubjU )}(hhh]jZ )}(hV``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to set up h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hj `h]hstruct drm_fb_helper *fb_helper}(hj"`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj`ubj| )}(hhh]h)}(h1driver-allocated fbdev helper structure to set uph]h1driver-allocated fbdev helper structure to set up}(hj9`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5`hMhj6`ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj5`hMhj`ubah}(h]h ]h"]h$]h&]uh1jT hj_ubh)}(h**Description**h]j )}(hj[`h]h Description}(hj]`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjY`ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj_ubh)}(hECleans up the framebuffer helper. Inverse of drm_fb_helper_prepare().h]hECleans up the framebuffer helper. Inverse of drm_fb_helper_prepare().}(hjq`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_fb_helper_init (C function)c.drm_fb_helper_inithNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hPint drm_fb_helper_init (struct drm_device *dev, struct drm_fb_helper *fb_helper)h]j )}(hOint drm_fb_helper_init(struct drm_device *dev, struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhj`hMubj )}(hdrm_fb_helper_inith]j )}(hdrm_fb_helper_inith]hdrm_fb_helper_init}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhhj`hMubj)}(h9(struct drm_device *dev, struct drm_fb_helper *fb_helper)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j)}jj`sbc.drm_fb_helper_initasbuh1hhj`ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hjOh]h*}(hj)ahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj )}(hdevh]hdev}(hj6ahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjOahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKaubj )}(h h]h }(hj\ahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKaubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjmahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjoamodnameN classnameNj j )}j ]jac.drm_fb_helper_initasbuh1hhjKaubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKaubj)}(hjOh]h*}(hjahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjKaubj )}(h fb_helperh]h fb_helper}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubeh}(h]h ]h"]h$]h&]j j uh1jhj`hhhj`hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj`hhhj`hMubah}(h]j`ah ](j j eh"]h$]h&]j j )j huh1j{ hj`hMhj`hhubj )}(hhh]h)}(h;initialize a :c:type:`struct drm_fb_helper `h](h initialize a }(hjahhhNhNubh)}(h.:c:type:`struct drm_fb_helper `h]jf )}(hjah]hstruct drm_fb_helper}(hjahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jac.drm_fb_helper_initasbj drm_fb_helperuh1hhjWhKhjaubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjahhubah}(h]h ]h"]h$]h&]uh1j hj`hhhj`hMubeh}(h]h ](j functioneh"]h$]h&]j j j j bj j bj j j uh1jv hhhj[LhNhNubj )}(hXO**Parameters** ``struct drm_device *dev`` drm device ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to initialize **Description** This allocates the structures for the fbdev helper with the given limits. Note that this won't yet touch the hardware (through the driver interfaces) nor register the fbdev. This is only done in drm_fb_helper_initial_config() to allow driver writes more control over the exact init sequence. Drivers must call drm_fb_helper_prepare() before calling this function. **Return** Zero if everything went ok, nonzero otherwise.h](h)}(h**Parameters**h]j )}(hjbh]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjbubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` drm device h](j` )}(h``struct drm_device *dev``h]jf )}(hj5bh]hstruct drm_device *dev}(hj7bhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj3bubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj/bubj| )}(hhh]h)}(h drm deviceh]h drm device}(hjNbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJbhMhjKbubah}(h]h ]h"]h$]h&]uh1j{ hj/bubeh}(h]h ]h"]h$]h&]uh1jY hjJbhMhj,bubjZ )}(hZ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to initialize h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hjnbh]hstruct drm_fb_helper *fb_helper}(hjpbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlbubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjhbubj| )}(hhh]h)}(h5driver-allocated fbdev helper structure to initializeh]h5driver-allocated fbdev helper structure to initialize}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjbubah}(h]h ]h"]h$]h&]uh1j{ hjhbubeh}(h]h ]h"]h$]h&]uh1jY hjbhMhj,bubeh}(h]h ]h"]h$]h&]uh1jT hjbubh)}(h**Description**h]j )}(hjbh]h Description}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjbubh)}(hX#This allocates the structures for the fbdev helper with the given limits. Note that this won't yet touch the hardware (through the driver interfaces) nor register the fbdev. This is only done in drm_fb_helper_initial_config() to allow driver writes more control over the exact init sequence.h]hX%This allocates the structures for the fbdev helper with the given limits. Note that this won’t yet touch the hardware (through the driver interfaces) nor register the fbdev. This is only done in drm_fb_helper_initial_config() to allow driver writes more control over the exact init sequence.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjbubh)}(hGDrivers must call drm_fb_helper_prepare() before calling this function.h]hGDrivers must call drm_fb_helper_prepare() before calling this function.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjbubh)}(h **Return**h]j )}(hjbh]hReturn}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjbubh)}(h.Zero if everything went ok, nonzero otherwise.h]h.Zero if everything went ok, nonzero otherwise.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_fb_helper_unregister_info (C function)c.drm_fb_helper_unregister_infohNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hDvoid drm_fb_helper_unregister_info (struct drm_fb_helper *fb_helper)h]j )}(hCvoid drm_fb_helper_unregister_info(struct drm_fb_helper *fb_helper)h](j)}(hvoidh]hvoid}(hj$chhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj chhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hj3chhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj chhhj2chMubj )}(hdrm_fb_helper_unregister_infoh]j )}(hdrm_fb_helper_unregister_infoh]hdrm_fb_helper_unregister_info}(hjEchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAcubah}(h]h ](j j eh"]h$]h&]j j uh1j hj chhhj2chMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjachhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]cubj )}(h h]h }(hjnchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]cubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|cubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]j)}jjGcsbc.drm_fb_helper_unregister_infoasbuh1hhj]cubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]cubj)}(hjOh]h*}(hjchhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj]cubj )}(h fb_helperh]h fb_helper}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]cubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYcubah}(h]h ]h"]h$]h&]j j uh1jhj chhhj2chMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjchhhj2chMubah}(h]jcah ](j j eh"]h$]h&]j j )j huh1j{ hj2chMhjchhubj )}(hhh]h)}(h%unregister fb_info framebuffer deviceh]h%unregister fb_info framebuffer device}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjchhubah}(h]h ]h"]h$]h&]uh1j hjchhhj2chMubeh}(h]h ](j functioneh"]h$]h&]j j j jcj jcj j j uh1jv hhhj[LhNhNubj )}(hX1**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, must not be NULL **Description** A wrapper around unregister_framebuffer, to release the fb_info framebuffer device. This must be called before releasing all resources for **fb_helper** by calling drm_fb_helper_fini().h](h)}(h**Parameters**h]j )}(hjdh]h Parameters}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjdubjU )}(hhh]jZ )}(hT``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, must not be NULL h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hj%dh]hstruct drm_fb_helper *fb_helper}(hj'dhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#dubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjdubj| )}(hhh]h)}(h/driver-allocated fbdev helper, must not be NULLh]h/driver-allocated fbdev helper, must not be NULL}(hj>dhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:dhMhj;dubah}(h]h ]h"]h$]h&]uh1j{ hjdubeh}(h]h ]h"]h$]h&]uh1jY hj:dhMhjdubah}(h]h ]h"]h$]h&]uh1jT hjdubh)}(h**Description**h]j )}(hj`dh]h Description}(hjbdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^dubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjdubh)}(hA wrapper around unregister_framebuffer, to release the fb_info framebuffer device. This must be called before releasing all resources for **fb_helper** by calling drm_fb_helper_fini().h](hA wrapper around unregister_framebuffer, to release the fb_info framebuffer device. This must be called before releasing all resources for }(hjvdhhhNhNubj )}(h **fb_helper**h]h fb_helper}(hj~dhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvdubh! by calling drm_fb_helper_fini().}(hjvdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_fb_helper_fini (C function)c.drm_fb_helper_finihNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(h9void drm_fb_helper_fini (struct drm_fb_helper *fb_helper)h]j )}(h8void drm_fb_helper_fini(struct drm_fb_helper *fb_helper)h](j)}(hvoidh]hvoid}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhhjdhMubj )}(hdrm_fb_helper_finih]j )}(hdrm_fb_helper_finih]hdrm_fb_helper_fini}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubah}(h]h ](j j eh"]h$]h&]j j uh1j hjdhhhjdhMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjemodnameN classnameNj j )}j ]j)}jjdsbc.drm_fb_helper_finiasbuh1hhjdubj )}(h h]h }(hj2ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj)}(hjOh]h*}(hj@ehhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubj )}(h fb_helperh]h fb_helper}(hjMehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjdubah}(h]h ]h"]h$]h&]j j uh1jhjdhhhjdhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjdhhhjdhMubah}(h]jdah ](j j eh"]h$]h&]j j )j huh1j{ hjdhMhjdhhubj )}(hhh]h)}(h:finialize a :c:type:`struct drm_fb_helper `h](h finialize a }(hjwehhhNhNubh)}(h.:c:type:`struct drm_fb_helper `h]jf )}(hjeh]hstruct drm_fb_helper}(hjehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j.ec.drm_fb_helper_finiasbj drm_fb_helperuh1hhjWhKhjweubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjtehhubah}(h]h ]h"]h$]h&]uh1j hjdhhhjdhMubeh}(h]h ](j functioneh"]h$]h&]j j j jej jej j j uh1jv hhhj[LhNhNubj )}(h**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL **Description** This cleans up all remaining resources associated with **fb_helper**.h](h)}(h**Parameters**h]j )}(hjeh]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjeubjU )}(hhh]jZ )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hjeh]hstruct drm_fb_helper *fb_helper}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjeubj| )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjeubah}(h]h ]h"]h$]h&]uh1j{ hjeubeh}(h]h ]h"]h$]h&]uh1jY hjehMhjeubah}(h]h ]h"]h$]h&]uh1jT hjeubh)}(h**Description**h]j )}(hjfh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjeubh)}(hEThis cleans up all remaining resources associated with **fb_helper**.h](h7This cleans up all remaining resources associated with }(hj-fhhhNhNubj )}(h **fb_helper**h]h fb_helper}(hj5fhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-fubh.}(hj-fhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjeubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_fb_helper_deferred_io (C function)c.drm_fb_helper_deferred_iohNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hTvoid drm_fb_helper_deferred_io (struct fb_info *info, struct list_head *pagereflist)h]j )}(hSvoid drm_fb_helper_deferred_io(struct fb_info *info, struct list_head *pagereflist)h](j)}(hvoidh]hvoid}(hjnfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjfhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhubj )}(h h]h }(hj}fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjfhhhj|fhMhubj )}(hdrm_fb_helper_deferred_ioh]j )}(hdrm_fb_helper_deferred_ioh]hdrm_fb_helper_deferred_io}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ](j j eh"]h$]h&]j j uh1j hjjfhhhj|fhMhubj)}(h5(struct fb_info *info, struct list_head *pagereflist)h](j)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]j)}jjfsbc.drm_fb_helper_deferred_ioasbuh1hhjfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfubj )}(hinfoh]hinfo}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjfubj)}(hstruct list_head *pagereflisth](j )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hj*ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(h list_headh]h list_head}(hj;ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8gubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=gmodnameN classnameNj j )}j ]jfc.drm_fb_helper_deferred_ioasbuh1hhjgubj )}(h h]h }(hjYghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj)}(hjOh]h*}(hjgghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjgubj )}(h pagereflisth]h pagereflist}(hjtghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjfubeh}(h]h ]h"]h$]h&]j j uh1jhjjfhhhj|fhMhubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjffhhhj|fhMhubah}(h]jafah ](j j eh"]h$]h&]j j )j huh1j{ hj|fhMhhjcfhhubj )}(hhh]h)}(h#fbdev deferred_io callback functionh]h#fbdev deferred_io callback function}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhhjghhubah}(h]h ]h"]h$]h&]uh1j hjcfhhhj|fhMhubeh}(h]h ](j functioneh"]h$]h&]j j j jgj jgj j j uh1jv hhhj[LhNhNubj )}(hX8**Parameters** ``struct fb_info *info`` fb_info struct pointer ``struct list_head *pagereflist`` list of mmap framebuffer pages that have to be flushed **Description** This function is used as the :c:type:`fb_deferred_io.deferred_io ` callback function for flushing the fbdev mmap writes.h](h)}(h**Parameters**h]j )}(hjgh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMlhjgubjU )}(hhh](jZ )}(h0``struct fb_info *info`` fb_info struct pointer h](j` )}(h``struct fb_info *info``h]jf )}(hjgh]hstruct fb_info *info}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMihjgubj| )}(hhh]h)}(hfb_info struct pointerh]hfb_info struct pointer}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghMihjgubah}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjghMihjgubjZ )}(hY``struct list_head *pagereflist`` list of mmap framebuffer pages that have to be flushed h](j` )}(h!``struct list_head *pagereflist``h]jf )}(hjhh]hstruct list_head *pagereflist}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjhubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMjhjhubj| )}(hhh]h)}(h6list of mmap framebuffer pages that have to be flushedh]h6list of mmap framebuffer pages that have to be flushed}(hj1hhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hhMjhj.hubah}(h]h ]h"]h$]h&]uh1j{ hjhubeh}(h]h ]h"]h$]h&]uh1jY hj-hhMjhjgubeh}(h]h ]h"]h$]h&]uh1jT hjgubh)}(h**Description**h]j )}(hjShh]h Description}(hjUhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQhubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMlhjgubh)}(hThis function is used as the :c:type:`fb_deferred_io.deferred_io ` callback function for flushing the fbdev mmap writes.h](hThis function is used as the }(hjihhhhNhNubh)}(h5:c:type:`fb_deferred_io.deferred_io `h]jf )}(hjshh]hfb_deferred_io.deferred_io}(hjuhhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjqhubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j fb_deferred_iouh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMkhjihubh6 callback function for flushing the fbdev mmap writes.}(hjihhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhhMkhjgubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_fb_helper_set_suspend (C function)c.drm_fb_helper_set_suspendhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hNvoid drm_fb_helper_set_suspend (struct drm_fb_helper *fb_helper, bool suspend)h]j )}(hMvoid drm_fb_helper_set_suspend(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hvoidh]hvoid}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjhhMubj )}(hdrm_fb_helper_set_suspendh]j )}(hdrm_fb_helper_set_suspendh]hdrm_fb_helper_set_suspend}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhhjhhMubj)}(h/(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjimodnameN classnameNj j )}j ]j)}jjhsbc.drm_fb_helper_set_suspendasbuh1hhjhubj )}(h h]h }(hj6ihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj)}(hjOh]h*}(hjDihhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhubj )}(h fb_helperh]h fb_helper}(hjQihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(h bool suspendh](j)}(hjIh]hbool}(hjjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfiubj )}(h h]h }(hjwihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfiubj )}(hsuspendh]hsuspend}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhhjhhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhhjhhMubah}(h]jhah ](j j eh"]h$]h&]j j )j huh1j{ hjhhMhjhhhubj )}(hhh]h)}(hwrapper around fb_set_suspendh]hwrapper around fb_set_suspend}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjihhubah}(h]h ]h"]h$]h&]uh1j hjhhhhjhhMubeh}(h]h ](j functioneh"]h$]h&]j j j jij jij j j uh1jv hhhj[LhNhNubj )}(hX3**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL ``bool suspend`` whether to suspend or resume **Description** A wrapper around fb_set_suspend implemented by fbdev core. Use drm_fb_helper_set_suspend_unlocked() if you don't need to take the lock yourselfh](h)}(h**Parameters**h]j )}(hjih]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjiubjU )}(hhh](jZ )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hjih]hstruct drm_fb_helper *fb_helper}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjiubj| )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hj jhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjjubah}(h]h ]h"]h$]h&]uh1j{ hjiubeh}(h]h ]h"]h$]h&]uh1jY hjjhMhjiubjZ )}(h.``bool suspend`` whether to suspend or resume h](j` )}(h``bool suspend``h]jf )}(hj)jh]h bool suspend}(hj+jhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'jubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj#jubj| )}(hhh]h)}(hwhether to suspend or resumeh]hwhether to suspend or resume}(hjBjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>jhMhj?jubah}(h]h ]h"]h$]h&]uh1j{ hj#jubeh}(h]h ]h"]h$]h&]uh1jY hj>jhMhjiubeh}(h]h ]h"]h$]h&]uh1jT hjiubh)}(h**Description**h]j )}(hjdjh]h Description}(hjfjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjiubh)}(hA wrapper around fb_set_suspend implemented by fbdev core. Use drm_fb_helper_set_suspend_unlocked() if you don't need to take the lock yourselfh]hA wrapper around fb_set_suspend implemented by fbdev core. Use drm_fb_helper_set_suspend_unlocked() if you don’t need to take the lock yourself}(hjzjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_fb_helper_set_suspend_unlocked (C function)$c.drm_fb_helper_set_suspend_unlockedhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hWvoid drm_fb_helper_set_suspend_unlocked (struct drm_fb_helper *fb_helper, bool suspend)h]j )}(hVvoid drm_fb_helper_set_suspend_unlocked(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hvoidh]hvoid}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjhhhjjhMubj )}(h"drm_fb_helper_set_suspend_unlockedh]j )}(h"drm_fb_helper_set_suspend_unlockedh]h"drm_fb_helper_set_suspend_unlocked}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjjhhhjjhMubj)}(h/(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j)}jjjsb$c.drm_fb_helper_set_suspend_unlockedasbuh1hhjjubj )}(h h]h }(hj$khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj)}(hjOh]h*}(hj2khhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjjubj )}(h fb_helperh]h fb_helper}(hj?khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubj)}(h bool suspendh](j)}(hjIh]hbool}(hjXkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTkubj )}(h h]h }(hjekhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTkubj )}(hsuspendh]hsuspend}(hjskhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubeh}(h]h ]h"]h$]h&]j j uh1jhjjhhhjjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjjhMubah}(h]jjah ](j j eh"]h$]h&]j j )j huh1j{ hjjhMhjjhhubj )}(hhh]h)}(h>wrapper around fb_set_suspend that also takes the console lockh]h>wrapper around fb_set_suspend that also takes the console lock}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjkhhubah}(h]h ]h"]h$]h&]uh1j hjjhhhjjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jkj jkj j j uh1jv hhhj[LhNhNubj )}(hX**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL ``bool suspend`` whether to suspend or resume **Description** A wrapper around fb_set_suspend() that takes the console lock. If the lock isn't available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity. This function can be called multiple times with the same state since :c:type:`fb_info.state ` is checked to see if fbdev is running or not before locking. Use drm_fb_helper_set_suspend() if you need to take the lock yourself.h](h)}(h**Parameters**h]j )}(hjkh]h Parameters}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjkubjU )}(hhh](jZ )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hjkh]hstruct drm_fb_helper *fb_helper}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjkubj| )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjkubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjkhMhjkubjZ )}(h.``bool suspend`` whether to suspend or resume h](j` )}(h``bool suspend``h]jf )}(hjlh]h bool suspend}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjlubj| )}(hhh]h)}(hwhether to suspend or resumeh]hwhether to suspend or resume}(hj0lhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,lhMhj-lubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hj,lhMhjkubeh}(h]h ]h"]h$]h&]uh1jT hjkubh)}(h**Description**h]j )}(hjRlh]h Description}(hjTlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPlubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjkubh)}(hA wrapper around fb_set_suspend() that takes the console lock. If the lock isn't available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity.h]hA wrapper around fb_set_suspend() that takes the console lock. If the lock isn’t available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity.}(hjhlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjkubh)}(hThis function can be called multiple times with the same state since :c:type:`fb_info.state ` is checked to see if fbdev is running or not before locking.h](hEThis function can be called multiple times with the same state since }(hjwlhhhNhNubh)}(h!:c:type:`fb_info.state `h]jf )}(hjlh]h fb_info.state}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j fb_infouh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjwlubh= is checked to see if fbdev is running or not before locking.}(hjwlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjlhMhjkubh)}(hFUse drm_fb_helper_set_suspend() if you need to take the lock yourself.h]hFUse drm_fb_helper_set_suspend() if you need to take the lock yourself.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_fb_helper_setcmap (C function)c.drm_fb_helper_setcmaphNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hFint drm_fb_helper_setcmap (struct fb_cmap *cmap, struct fb_info *info)h]j )}(hEint drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info)h](j)}(hinth]hint}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlhhhjlhMubj )}(hdrm_fb_helper_setcmaph]j )}(hdrm_fb_helper_setcmaph]hdrm_fb_helper_setcmap}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ](j j eh"]h$]h&]j j uh1j hjlhhhjlhMubj)}(h,(struct fb_cmap *cmap, struct fb_info *info)h](j)}(hstruct fb_cmap *cmaph](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hj"mhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(hfb_cmaph]hfb_cmap}(hj3mhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0mubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5mmodnameN classnameNj j )}j ]j)}jjlsbc.drm_fb_helper_setcmapasbuh1hhjmubj )}(h h]h }(hjSmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj)}(hjOh]h*}(hjamhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjmubj )}(hcmaph]hcmap}(hjnmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj mubj)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]jOmc.drm_fb_helper_setcmapasbuh1hhjmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjmubj )}(hinfoh]hinfo}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj mubeh}(h]h ]h"]h$]h&]j j uh1jhjlhhhjlhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjlhhhjlhMubah}(h]jlah ](j j eh"]h$]h&]j j )j huh1j{ hjlhMhjlhhubj )}(hhh]h)}(h7implementation for :c:type:`fb_ops.fb_setcmap `h](himplementation for }(hjnhhhNhNubh)}(h$:c:type:`fb_ops.fb_setcmap `h]jf )}(hjnh]hfb_ops.fb_setcmap}(hjnhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jOmc.drm_fb_helper_setcmapasbj fb_opsuh1hhjWhKhjnubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnhhubah}(h]h ]h"]h$]h&]uh1j hjlhhhjlhMubeh}(h]h ](j functioneh"]h$]h&]j j j jDnj jDnj j j uh1jv hhhj[LhNhNubj )}(hq**Parameters** ``struct fb_cmap *cmap`` cmap to set ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j )}(hjNnh]h Parameters}(hjPnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLnubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjHnubjU )}(hhh](jZ )}(h%``struct fb_cmap *cmap`` cmap to set h](j` )}(h``struct fb_cmap *cmap``h]jf )}(hjmnh]hstruct fb_cmap *cmap}(hjonhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjknubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjgnubj| )}(hhh]h)}(h cmap to seth]h cmap to set}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjnubah}(h]h ]h"]h$]h&]uh1j{ hjgnubeh}(h]h ]h"]h$]h&]uh1jY hjnhMhjdnubjZ )}(h7``struct fb_info *info`` fbdev registered by the helperh](j` )}(h``struct fb_info *info``h]jf )}(hjnh]hstruct fb_info *info}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubj| )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjnhMhjdnubeh}(h]h ]h"]h$]h&]uh1jT hjHnubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_fb_helper_ioctl (C function)c.drm_fb_helper_ioctlhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hSint drm_fb_helper_ioctl (struct fb_info *info, unsigned int cmd, unsigned long arg)h]j )}(hRint drm_fb_helper_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)h](j)}(hinth]hint}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjohMubj )}(hdrm_fb_helper_ioctlh]j )}(hdrm_fb_helper_ioctlh]hdrm_fb_helper_ioctl}(hj!ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjohMubj)}(h;(struct fb_info *info, unsigned int cmd, unsigned long arg)h](j)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hj=ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9oubj )}(h h]h }(hjJohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9oubh)}(hhh]j )}(hfb_infoh]hfb_info}(hj[ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]omodnameN classnameNj j )}j ]j)}jj#osbc.drm_fb_helper_ioctlasbuh1hhj9oubj )}(h h]h }(hj{ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9oubj)}(hjOh]h*}(hjohhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj9oubj )}(hinfoh]hinfo}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9oubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5oubj)}(hunsigned int cmdh](j)}(hunsignedh]hunsigned}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj)}(hinth]hint}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(hcmdh]hcmd}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5oubj)}(hunsigned long argh](j)}(hunsignedh]hunsigned}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj)}(hlongh]hlong}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj )}(h h]h }(hj*phhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(hargh]harg}(hj8phhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5oubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjohMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnhhhjohMubah}(h]jnah ](j j eh"]h$]h&]j j )j huh1j{ hjohMhjnhhubj )}(hhh]h)}(hlegacy ioctl implementationh]hlegacy ioctl implementation}(hjbphhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj_phhubah}(h]h ]h"]h$]h&]uh1j hjnhhhjohMubeh}(h]h ](j functioneh"]h$]h&]j j j jzpj jzpj j j uh1jv hhhj[LhNhNubj )}(hX**Parameters** ``struct fb_info *info`` fbdev registered by the helper ``unsigned int cmd`` ioctl command ``unsigned long arg`` ioctl argument **Description** A helper to implement the standard fbdev ioctl. Only FBIO_WAITFORVSYNC is implemented for now.h](h)}(h**Parameters**h]j )}(hjph]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj~pubjU )}(hhh](jZ )}(h8``struct fb_info *info`` fbdev registered by the helper h](j` )}(h``struct fb_info *info``h]jf )}(hjph]hstruct fb_info *info}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjpubj| )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphMhjpubjZ )}(h#``unsigned int cmd`` ioctl command h](j` )}(h``unsigned int cmd``h]jf )}(hjph]hunsigned int cmd}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjpubj| )}(hhh]h)}(h ioctl commandh]h ioctl command}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphMhjpubjZ )}(h%``unsigned long arg`` ioctl argument h](j` )}(h``unsigned long arg``h]jf )}(hjqh]hunsigned long arg}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjqubj| )}(hhh]h)}(hioctl argumenth]hioctl argument}(hj.qhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*qhMhj+qubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hj*qhMhjpubeh}(h]h ]h"]h$]h&]uh1jT hj~pubh)}(h**Description**h]j )}(hjPqh]h Description}(hjRqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNqubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj~pubh)}(h^A helper to implement the standard fbdev ioctl. Only FBIO_WAITFORVSYNC is implemented for now.h]h^A helper to implement the standard fbdev ioctl. Only FBIO_WAITFORVSYNC is implemented for now.}(hjfqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj~pubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_fb_helper_check_var (C function)c.drm_fb_helper_check_varhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hQint drm_fb_helper_check_var (struct fb_var_screeninfo *var, struct fb_info *info)h]j )}(hPint drm_fb_helper_check_var(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hinth]hint}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMeubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqhhhjqhMeubj )}(hdrm_fb_helper_check_varh]j )}(hdrm_fb_helper_check_varh]hdrm_fb_helper_check_var}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hjqhhhjqhMeubj)}(h5(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hstruct fb_var_screeninfo *varh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(hfb_var_screeninfoh]hfb_var_screeninfo}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]j)}jjqsbc.drm_fb_helper_check_varasbuh1hhjqubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj)}(hjOh]h*}(hjrhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjqubj )}(hvarh]hvar}(hj+rhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubj)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjDrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@rubj )}(h h]h }(hjQrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@rubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjbrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_rubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdrmodnameN classnameNj j )}j ]j rc.drm_fb_helper_check_varasbuh1hhj@rubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@rubj)}(hjOh]h*}(hjrhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@rubj )}(hinfoh]hinfo}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@rubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubeh}(h]h ]h"]h$]h&]j j uh1jhjqhhhjqhMeubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjqhhhjqhMeubah}(h]jqah ](j j eh"]h$]h&]j j )j huh1j{ hjqhMehjqhhubj )}(hhh]h)}(h9implementation for :c:type:`fb_ops.fb_check_var `h](himplementation for }(hjrhhhNhNubh)}(h&:c:type:`fb_ops.fb_check_var `h]jf )}(hjrh]hfb_ops.fb_check_var}(hjrhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j rc.drm_fb_helper_check_varasbj fb_opsuh1hhjWhKhjrubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMehjrhhubah}(h]h ]h"]h$]h&]uh1j hjqhhhjqhMeubeh}(h]h ](j functioneh"]h$]h&]j j j jsj jsj j j uh1jv hhhj[LhNhNubj )}(h**Parameters** ``struct fb_var_screeninfo *var`` screeninfo to check ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j )}(hj sh]h Parameters}(hj shhhNhNubah}(h]h ]h"]h$]h&]uh1j hj subah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMihjsubjU )}(hhh](jZ )}(h6``struct fb_var_screeninfo *var`` screeninfo to check h](j` )}(h!``struct fb_var_screeninfo *var``h]jf )}(hj*sh]hstruct fb_var_screeninfo *var}(hj,shhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(subah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMfhj$subj| )}(hhh]h)}(hscreeninfo to checkh]hscreeninfo to check}(hjCshhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?shMfhj@subah}(h]h ]h"]h$]h&]uh1j{ hj$subeh}(h]h ]h"]h$]h&]uh1jY hj?shMfhj!subjZ )}(h7``struct fb_info *info`` fbdev registered by the helperh](j` )}(h``struct fb_info *info``h]jf )}(hjcsh]hstruct fb_info *info}(hjeshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjasubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhhj]subj| )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hj|shhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMghjysubah}(h]h ]h"]h$]h&]uh1j{ hj]subeh}(h]h ]h"]h$]h&]uh1jY hjxshMhhj!subeh}(h]h ]h"]h$]h&]uh1jT hjsubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_fb_helper_set_par (C function)c.drm_fb_helper_set_parhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(h0int drm_fb_helper_set_par (struct fb_info *info)h]j )}(h/int drm_fb_helper_set_par(struct fb_info *info)h](j)}(hinth]hint}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjshhhjshMubj )}(hdrm_fb_helper_set_parh]j )}(hdrm_fb_helper_set_parh]hdrm_fb_helper_set_par}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ](j j eh"]h$]h&]j j uh1j hjshhhjshMubj)}(h(struct fb_info *info)h]j)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]j)}jjssbc.drm_fb_helper_set_parasbuh1hhjsubj )}(h h]h }(hj8thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj)}(hjOh]h*}(hjFthhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjsubj )}(hinfoh]hinfo}(hjSthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjsubah}(h]h ]h"]h$]h&]j j uh1jhjshhhjshMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjshhhjshMubah}(h]jsah ](j j eh"]h$]h&]j j )j huh1j{ hjshMhjshhubj )}(hhh]h)}(h7implementation for :c:type:`fb_ops.fb_set_par `h](himplementation for }(hj}thhhNhNubh)}(h$:c:type:`fb_ops.fb_set_par `h]jf )}(hjth]hfb_ops.fb_set_par}(hjthhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j4tc.drm_fb_helper_set_parasbj fb_opsuh1hhjWhKhj}tubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjzthhubah}(h]h ]h"]h$]h&]uh1j hjshhhjshMubeh}(h]h ](j functioneh"]h$]h&]j j j jtj jtj j j uh1jv hhhj[LhNhNubj )}(h**Parameters** ``struct fb_info *info`` fbdev registered by the helper **Description** This will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.h](h)}(h**Parameters**h]j )}(hjth]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjtubjU )}(hhh]jZ )}(h8``struct fb_info *info`` fbdev registered by the helper h](j` )}(h``struct fb_info *info``h]jf )}(hjth]hstruct fb_info *info}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjtubj| )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjtubah}(h]h ]h"]h$]h&]uh1j{ hjtubeh}(h]h ]h"]h$]h&]uh1jY hjthMhjtubah}(h]h ]h"]h$]h&]uh1jT hjtubh)}(h**Description**h]j )}(hjuh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjtubh)}(hThis will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.h]hThis will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.}(hj3uhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjtubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_fb_helper_pan_display (C function)c.drm_fb_helper_pan_displayhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hSint drm_fb_helper_pan_display (struct fb_var_screeninfo *var, struct fb_info *info)h]j )}(hRint drm_fb_helper_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hinth]hint}(hjbuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^uhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM*ubj )}(h h]h }(hjquhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^uhhhjpuhM*ubj )}(hdrm_fb_helper_pan_displayh]j )}(hdrm_fb_helper_pan_displayh]hdrm_fb_helper_pan_display}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^uhhhjpuhM*ubj)}(h5(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hstruct fb_var_screeninfo *varh](j )}(hj h]hstruct}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubh)}(hhh]j )}(hfb_var_screeninfoh]hfb_var_screeninfo}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]j)}jjusbc.drm_fb_helper_pan_displayasbuh1hhjuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjuubj )}(hvarh]hvar}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubj)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj vubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj vubh)}(hhh]j )}(hfb_infoh]hfb_info}(hj/vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,vubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1vmodnameN classnameNj j )}j ]juc.drm_fb_helper_pan_displayasbuh1hhj vubj )}(h h]h }(hjMvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj vubj)}(hjOh]h*}(hj[vhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj vubj )}(hinfoh]hinfo}(hjhvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj vubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubeh}(h]h ]h"]h$]h&]j j uh1jhj^uhhhjpuhM*ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZuhhhjpuhM*ubah}(h]jUuah ](j j eh"]h$]h&]j j )j huh1j{ hjpuhM*hjWuhhubj )}(hhh]h)}(h;implementation for :c:type:`fb_ops.fb_pan_display `h](himplementation for }(hjvhhhNhNubh)}(h(:c:type:`fb_ops.fb_pan_display `h]jf )}(hjvh]hfb_ops.fb_pan_display}(hjvhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]juc.drm_fb_helper_pan_displayasbj fb_opsuh1hhjWhKhjvubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM*hjvhhubah}(h]h ]h"]h$]h&]uh1j hjWuhhhjpuhM*ubeh}(h]h ](j functioneh"]h$]h&]j j j jvj jvj j j uh1jv hhhj[LhNhNubj )}(h**Parameters** ``struct fb_var_screeninfo *var`` updated screen information ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j )}(hjvh]h Parameters}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM.hjvubjU )}(hhh](jZ )}(h=``struct fb_var_screeninfo *var`` updated screen information h](j` )}(h!``struct fb_var_screeninfo *var``h]jf )}(hjvh]hstruct fb_var_screeninfo *var}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM+hjvubj| )}(hhh]h)}(hupdated screen informationh]hupdated screen information}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj whM+hj wubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hj whM+hjvubjZ )}(h7``struct fb_info *info`` fbdev registered by the helperh](j` )}(h``struct fb_info *info``h]jf )}(hj0wh]hstruct fb_info *info}(hj2whhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.wubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM-hj*wubj| )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjIwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM,hjFwubah}(h]h ]h"]h$]h&]uh1j{ hj*wubeh}(h]h ]h"]h$]h&]uh1jY hjEwhM-hjvubeh}(h]h ]h"]h$]h&]uh1jT hjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_fb_helper_fill_info (C function)c.drm_fb_helper_fill_infohNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(h~void drm_fb_helper_fill_info (struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h]j )}(h}void drm_fb_helper_fill_info(struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h](j)}(hvoidh]hvoid}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMCubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhjwhMCubj )}(hdrm_fb_helper_fill_infoh]j )}(hdrm_fb_helper_fill_infoh]hdrm_fb_helper_fill_info}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ](j j eh"]h$]h&]j j uh1j hjwhhhjwhMCubj)}(ha(struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h](j)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j)}jjwsbc.drm_fb_helper_fill_infoasbuh1hhjwubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hjOh]h*}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjwubj )}(hinfoh]hinfo}(hj xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubj)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hj9xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5xubj )}(h h]h }(hjFxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5xubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjWxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYxmodnameN classnameNj j )}j ]jxc.drm_fb_helper_fill_infoasbuh1hhj5xubj )}(h h]h }(hjuxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5xubj)}(hjOh]h*}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj5xubj )}(h fb_helperh]h fb_helper}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5xubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubj)}(h(struct drm_fb_helper_surface_size *sizesh](j )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubh)}(hhh]j )}(hdrm_fb_helper_surface_sizeh]hdrm_fb_helper_surface_size}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjxmodnameN classnameNj j )}j ]jxc.drm_fb_helper_fill_infoasbuh1hhjxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj)}(hjOh]h*}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjxubj )}(hsizesh]hsizes}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubeh}(h]h ]h"]h$]h&]j j uh1jhjwhhhjwhMCubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjwhhhjwhMCubah}(h]j}wah ](j j eh"]h$]h&]j j )j huh1j{ hjwhMChjwhhubj )}(hhh]h)}(hinitializes fbdev informationh]hinitializes fbdev information}(hj*yhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMChj'yhhubah}(h]h ]h"]h$]h&]uh1j hjwhhhjwhMCubeh}(h]h ](j functioneh"]h$]h&]j j j jByj jByj j j uh1jv hhhj[LhNhNubj )}(hXc**Parameters** ``struct fb_info *info`` fbdev instance to set up ``struct drm_fb_helper *fb_helper`` fb helper instance to use as template ``struct drm_fb_helper_surface_size *sizes`` describes fbdev size and scanout surface size **Description** Sets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in :c:type:`drm_fb_helper.fb `. Drivers should call this (or their equivalent setup code) from their :c:type:`drm_driver.fbdev_probe ` callback after having allocated the fbdev backing storage framebuffer.h](h)}(h**Parameters**h]j )}(hjLyh]h Parameters}(hjNyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJyubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMGhjFyubjU )}(hhh](jZ )}(h2``struct fb_info *info`` fbdev instance to set up h](j` )}(h``struct fb_info *info``h]jf )}(hjkyh]hstruct fb_info *info}(hjmyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiyubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMDhjeyubj| )}(hhh]h)}(hfbdev instance to set uph]hfbdev instance to set up}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMDhjyubah}(h]h ]h"]h$]h&]uh1j{ hjeyubeh}(h]h ]h"]h$]h&]uh1jY hjyhMDhjbyubjZ )}(hJ``struct drm_fb_helper *fb_helper`` fb helper instance to use as template h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hjyh]hstruct drm_fb_helper *fb_helper}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMEhjyubj| )}(hhh]h)}(h%fb helper instance to use as templateh]h%fb helper instance to use as template}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMEhjyubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjyhMEhjbyubjZ )}(h[``struct drm_fb_helper_surface_size *sizes`` describes fbdev size and scanout surface size h](j` )}(h,``struct drm_fb_helper_surface_size *sizes``h]jf )}(hjyh]h(struct drm_fb_helper_surface_size *sizes}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMFhjyubj| )}(hhh]h)}(h-describes fbdev size and scanout surface sizeh]h-describes fbdev size and scanout surface size}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMFhjyubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjyhMFhjbyubeh}(h]h ]h"]h$]h&]uh1jT hjFyubh)}(h**Description**h]j )}(hjzh]h Description}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMHhjFyubh)}(hSets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in :c:type:`drm_fb_helper.fb `.h](h|Sets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in }(hj.zhhhNhNubh)}(h*:c:type:`drm_fb_helper.fb `h]jf )}(hj8zh]hdrm_fb_helper.fb}(hj:zhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj6zubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_fb_helperuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMGhj.zubh.}(hj.zhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUzhMGhjFyubh)}(hDrivers should call this (or their equivalent setup code) from their :c:type:`drm_driver.fbdev_probe ` callback after having allocated the fbdev backing storage framebuffer.h](hEDrivers should call this (or their equivalent setup code) from their }(hj`zhhhNhNubh)}(h-:c:type:`drm_driver.fbdev_probe `h]jf )}(hjjzh]hdrm_driver.fbdev_probe}(hjlzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjhzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_driveruh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMJhj`zubhG callback after having allocated the fbdev backing storage framebuffer.}(hj`zhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjzhMJhjFyubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_fb_helper_initial_config (C function)c.drm_fb_helper_initial_confighNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hBint drm_fb_helper_initial_config (struct drm_fb_helper *fb_helper)h]j )}(hAint drm_fb_helper_initial_config(struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzhhhjzhMubj )}(hdrm_fb_helper_initial_configh]j )}(hdrm_fb_helper_initial_configh]hdrm_fb_helper_initial_config}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ](j j eh"]h$]h&]j j uh1j hjzhhhjzhMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hj {hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj {ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{modnameN classnameNj j )}j ]j)}jjzsbc.drm_fb_helper_initial_configasbuh1hhjzubj )}(h h]h }(hj-{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj)}(hjOh]h*}(hj;{hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjzubj )}(h fb_helperh]h fb_helper}(hjH{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubah}(h]h ]h"]h$]h&]j j uh1jhjzhhhjzhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjzhhhjzhMubah}(h]jzah ](j j eh"]h$]h&]j j )j huh1j{ hjzhMhjzhhubj )}(hhh]h)}(h,setup a sane initial connector configurationh]h,setup a sane initial connector configuration}(hjr{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjo{hhubah}(h]h ]h"]h$]h&]uh1j hjzhhhjzhMubeh}(h]h ](j functioneh"]h$]h&]j j j j{j j{j j j uh1jv hhhj[LhNhNubj )}(hXV**Parameters** ``struct drm_fb_helper *fb_helper`` fb_helper device struct **Description** Scans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store. Note that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces. This function will call down into the :c:type:`drm_driver.fbdev_probe ` callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure. HANG DEBUGGING: When you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up. Standard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option. The other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option. **Return** Zero if everything went ok, nonzero otherwise.h](h)}(h**Parameters**h]j )}(hj{h]h Parameters}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubjU )}(hhh]jZ )}(h<``struct drm_fb_helper *fb_helper`` fb_helper device struct h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hj{h]hstruct drm_fb_helper *fb_helper}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubj| )}(hhh]h)}(hfb_helper device structh]hfb_helper device struct}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj{ubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hj{hMhj{ubah}(h]h ]h"]h$]h&]uh1jT hj{ubh)}(h**Description**h]j )}(hj{h]h Description}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(hScans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store.h]hScans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(huNote that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces.h]huNote that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(hX>This function will call down into the :c:type:`drm_driver.fbdev_probe ` callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure.h](h&This function will call down into the }(hj"|hhhNhNubh)}(h-:c:type:`drm_driver.fbdev_probe `h]jf )}(hj,|h]hdrm_driver.fbdev_probe}(hj.|hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj*|ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_driveruh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj"|ubh callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure.}(hj"|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjI|hMhj{ubh)}(hHANG DEBUGGING:h]hHANG DEBUGGING:}(hjT|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(hXNWhen you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up.h]hXNWhen you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up.}(hjc|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(hStandard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option.h]hStandard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option.}(hjr|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(hThe other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option.h]hThe other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(h **Return**h]j )}(hj|h]hReturn}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubh)}(h.Zero if everything went ok, nonzero otherwise.h]h.Zero if everything went ok, nonzero otherwise.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_fb_helper_hotplug_event (C function)c.drm_fb_helper_hotplug_eventhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hAint drm_fb_helper_hotplug_event (struct drm_fb_helper *fb_helper)h]j )}(h@int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|hhhj|hMubj )}(hdrm_fb_helper_hotplug_eventh]j )}(hdrm_fb_helper_hotplug_eventh]hdrm_fb_helper_hotplug_event}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj|hhhj|hMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hj!}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hj2}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4}modnameN classnameNj j )}j ]j)}jj|sbc.drm_fb_helper_hotplug_eventasbuh1hhj}ubj )}(h h]h }(hjR}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj)}(hjOh]h*}(hj`}hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj}ubj )}(h fb_helperh]h fb_helper}(hjm}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj }ubah}(h]h ]h"]h$]h&]j j uh1jhj|hhhj|hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj|hhhj|hMubah}(h]j|ah ](j j eh"]h$]h&]j j )j huh1j{ hj|hMhj|hhubj )}(hhh]h)}(hOrespond to a hotplug notification by probing all the outputs attached to the fbh]hOrespond to a hotplug notification by probing all the outputs attached to the fb}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj}hhubah}(h]h ]h"]h$]h&]uh1j hj|hhhj|hMubeh}(h]h ](j functioneh"]h$]h&]j j j j}j j}j j j uh1jv hhhj[LhNhNubj )}(hX**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL **Description** Scan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration. Called at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver's hotplug interrupt). Note that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events. **Return** 0 on success and a non-zero error code otherwise.h](h)}(h**Parameters**h]j )}(hj}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj}ubjU )}(hhh]jZ )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j` )}(h#``struct drm_fb_helper *fb_helper``h]jf )}(hj}h]hstruct drm_fb_helper *fb_helper}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj}ubj| )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hj}hMhj}ubah}(h]h ]h"]h$]h&]uh1jT hj}ubh)}(h**Description**h]j )}(hj~h]h Description}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj}ubh)}(hScan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration.h]hScan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration.}(hj)~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj}ubh)}(hCalled at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver's hotplug interrupt).h]hCalled at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver’s hotplug interrupt).}(hj8~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj}ubh)}(hNote that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events.h]hNote that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events.}(hjG~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM"hj}ubh)}(h **Return**h]j )}(hjX~h]hReturn}(hjZ~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjV~ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM'hj}ubh)}(h10 on success and a non-zero error code otherwise.h]h10 on success and a non-zero error code otherwise.}(hjn~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM(hj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_fb_helper_gem_is_fb (C function)c.drm_fb_helper_gem_is_fbhNtauh1jd hj[LhhhNhNubjw )}(hhh](j| )}(hfbool drm_fb_helper_gem_is_fb (const struct drm_fb_helper *fb_helper, const struct drm_gem_object *obj)h]j )}(hebool drm_fb_helper_gem_is_fb(const struct drm_fb_helper *fb_helper, const struct drm_gem_object *obj)h](j)}(hjIh]hbool}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMMubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhhj~hMMubj )}(hdrm_fb_helper_gem_is_fbh]j )}(hdrm_fb_helper_gem_is_fbh]hdrm_fb_helper_gem_is_fb}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj~hhhj~hMMubj)}(hI(const struct drm_fb_helper *fb_helper, const struct drm_gem_object *obj)h](j)}(h%const struct drm_fb_helper *fb_helperh](j )}(hjAh]hconst}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj~sbc.drm_fb_helper_gem_is_fbasbuh1hhj~ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj~ubj )}(h fb_helperh]h fb_helper}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubj)}(h const struct drm_gem_object *objh](j )}(hjAh]hconst}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubh)}(hhh]j )}(hdrm_gem_objecth]hdrm_gem_object}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j.c.drm_fb_helper_gem_is_fbasbuh1hhjbubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjbubj )}(hobjh]hobj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubeh}(h]h ]h"]h$]h&]j j uh1jhj~hhhj~hMMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhj~hMMubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j{ hj~hMMhj~hhubj )}(hhh]h)}(h"Tests if GEM object is framebufferh]h"Tests if GEM object is framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMMhjhhubah}(h]h ]h"]h$]h&]uh1j hj~hhhj~hMMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj[LhNhNubj )}(hX**Parameters** ``const struct drm_fb_helper *fb_helper`` fb_helper instance, can be NULL ``const struct drm_gem_object *obj`` The GEM object to test, can be NULL **Description** Call drm_fb_helper_gem_is_fb to test is a DRM device's fbdev emulation uses the specified GEM object for its framebuffer. The result is always false if either poiner is NULL. **Return** True if fbdev emulation uses the provided GEM object, or false otherwise.h](h)}(h**Parameters**h]j )}(hj$h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMQhjubjU )}(hhh](jZ )}(hJ``const struct drm_fb_helper *fb_helper`` fb_helper instance, can be NULL h](j` )}(h)``const struct drm_fb_helper *fb_helper``h]jf )}(hjCh]h%const struct drm_fb_helper *fb_helper}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMNhj=ubj| )}(hhh]h)}(hfb_helper instance, can be NULLh]hfb_helper instance, can be NULL}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMNhjYubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hjXhMNhj:ubjZ )}(hI``const struct drm_gem_object *obj`` The GEM object to test, can be NULL h](j` )}(h$``const struct drm_gem_object *obj``h]jf )}(hj|h]h const struct drm_gem_object *obj}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]uh1j_ hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMOhjvubj| )}(hhh]h)}(h#The GEM object to test, can be NULLh]h#The GEM object to test, can be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMOhjubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjhMOhj:ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMQhjubh)}(hCall drm_fb_helper_gem_is_fb to test is a DRM device's fbdev emulation uses the specified GEM object for its framebuffer. The result is always false if either poiner is NULL.h]hCall drm_fb_helper_gem_is_fb to test is a DRM device’s fbdev emulation uses the specified GEM object for its framebuffer. The result is always false if either poiner is NULL.}(hj̀hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMPhjubh)}(h **Return**h]j )}(hjހh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj܀ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMThjubh)}(hITrue if fbdev emulation uses the provided GEM object, or false otherwise.h]hITrue if fbdev emulation uses the provided GEM object, or false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMUhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj[LhhhNhNubeh}(h]jah ]h"] fbdev helper functions referenceah$]h&]uh1hhhhhhhhKnubh)}(hhh](h)}(h!format Helper Functions Referenceh]h!format Helper Functions Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKzubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_format_conv_state_init (C function)c.drm_format_conv_state_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hEvoid drm_format_conv_state_init (struct drm_format_conv_state *state)h]j )}(hDvoid drm_format_conv_state_init(struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhjIhKubj )}(hdrm_format_conv_state_inith]j )}(hdrm_format_conv_state_inith]hdrm_format_conv_state_init}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhjIhKubj)}(h%(struct drm_format_conv_state *state)h]j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj^sbc.drm_format_conv_state_initasbuh1hhjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj)}(hjOh]h*}(hjāhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjtubj )}(hstateh]hstate}(hjсhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjpubah}(h]h ]h"]h$]h&]j j uh1jhj7hhhjIhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhjIhKubah}(h]j.ah ](j j eh"]h$]h&]j j )j huh1j{ hjIhKhj0hhubj )}(hhh]h)}(h"Initialize format-conversion stateh]h"Initialize format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hj0hhhjIhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_format_conv_state *state`` The state to initialize **Description** Clears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjubjU )}(hhh]jZ )}(h@``struct drm_format_conv_state *state`` The state to initialize h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hj<h]h#struct drm_format_conv_state *state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhj6ubj| )}(hhh]h)}(hThe state to initializeh]hThe state to initialize}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhKhjRubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hjQhKhj3ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjwh]h Description}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjubh)}(hjClears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.h]hjClears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_format_conv_state_copy (C function)c.drm_format_conv_state_copyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(htvoid drm_format_conv_state_copy (struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h]j )}(hsvoid drm_format_conv_state_copy(struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK*ubj )}(h h]h }(hj˂hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjʂhK*ubj )}(hdrm_format_conv_state_copyh]j )}(hdrm_format_conv_state_copyh]hdrm_format_conv_state_copy}(hj݂hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjقubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjʂhK*ubj)}(hT(struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h](j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj߂sbc.drm_format_conv_state_copyasbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h-const struct drm_format_conv_state *old_stateh](j )}(hjAh]hconst}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j3c.drm_format_conv_state_copyasbuh1hhjgubj )}(h h]h }(hjƒhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj)}(hjOh]h*}(hjЃhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjgubj )}(h old_stateh]h old_state}(hj݃hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjʂhK*ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjʂhK*ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjʂhK*hjhhubj )}(hhh]h)}(hCopy format-conversion stateh]hCopy format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK*hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjʂhK*ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_format_conv_state *state`` Destination state ``const struct drm_format_conv_state *old_state`` Source state **Description** Copies format-conversion state from **old_state** to **state**; except for temporary storage.h](h)}(h**Parameters**h]j )}(hj)h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK.hj#ubjU )}(hhh](jZ )}(h:``struct drm_format_conv_state *state`` Destination state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjHh]h#struct drm_format_conv_state *state}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK+hjBubj| )}(hhh]h)}(hDestination stateh]hDestination state}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hK+hj^ubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hj]hK+hj?ubjZ )}(h?``const struct drm_format_conv_state *old_state`` Source state h](j` )}(h1``const struct drm_format_conv_state *old_state``h]jf )}(hjh]h-const struct drm_format_conv_state *old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK,hj{ubj| )}(hhh]h)}(h Source stateh]h Source state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK,hjubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hjhK,hj?ubeh}(h]h ]h"]h$]h&]uh1jT hj#ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK.hj#ubh)}(h]Copies format-conversion state from **old_state** to **state**; except for temporary storage.h](h$Copies format-conversion state from }(hj҄hhhNhNubj )}(h **old_state**h]h old_state}(hjڄhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj҄ubh to }(hj҄hhhNhNubj )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj҄ubh; except for temporary storage.}(hj҄hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK-hj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_format_conv_state_reserve (C function)c.drm_format_conv_state_reservehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hhvoid * drm_format_conv_state_reserve (struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h]j )}(hfvoid *drm_format_conv_state_reserve(struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h](j)}(hvoidh]hvoid}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK?ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!hhhj3hK?ubj)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!hhhj3hK?ubj )}(hdrm_format_conv_state_reserveh]j )}(hdrm_format_conv_state_reserveh]hdrm_format_conv_state_reserve}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!hhhj3hK?ubj)}(hC(struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h](j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjUsbc.drm_format_conv_state_reserveasbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjkubj )}(hstateh]hstate}(hjȅhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(hsize_t new_sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_format_conv_state_reserveasbuh1hhj݅ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj݅ubj )}(hnew_sizeh]hnew_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj݅ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(h gfp_t flagsh](h)}(hhh]j )}(hgfp_th]hgfp_t}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]jc.drm_format_conv_state_reserveasbuh1hhj%ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(hflagsh]hflags}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubeh}(h]h ]h"]h$]h&]j j uh1jhj!hhhj3hK?ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj3hK?ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj3hK?hjhhubj )}(hhh]h)}(h'Allocates storage for format conversionh]h'Allocates storage for format conversion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK?hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj3hK?ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_format_conv_state *state`` The format-conversion state ``size_t new_size`` The minimum allocation size ``gfp_t flags`` Flags for kmalloc() **Description** Allocates at least **new_size** bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It's best to collect all memory requirements of a format conversion and call this function once to allocate the range. **Return** A pointer to the allocated memory range, or NULL otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKChjubjU )}(hhh](jZ )}(hD``struct drm_format_conv_state *state`` The format-conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjÆh]h#struct drm_format_conv_state *state}(hjņhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK@hjubj| )}(hhh]h)}(hThe format-conversion stateh]hThe format-conversion state}(hj܆hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj؆hK@hjنubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj؆hK@hjubjZ )}(h0``size_t new_size`` The minimum allocation size h](j` )}(h``size_t new_size``h]jf )}(hjh]hsize_t new_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKAhjubj| )}(hhh]h)}(hThe minimum allocation sizeh]hThe minimum allocation size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKAhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKAhjubjZ )}(h$``gfp_t flags`` Flags for kmalloc() h](j` )}(h``gfp_t flags``h]jf )}(hj5h]h gfp_t flags}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKBhj/ubj| )}(hhh]h)}(hFlags for kmalloc()h]hFlags for kmalloc()}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKBhjKubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hjJhKBhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjph]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKDhjubh)}(hXAllocates at least **new_size** bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It's best to collect all memory requirements of a format conversion and call this function once to allocate the range.h](hAllocates at least }(hjhhhNhNubj )}(h **new_size**h]hnew_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It’s best to collect all memory requirements of a format conversion and call this function once to allocate the range.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKChjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKHhjubh)}(h;A pointer to the allocated memory range, or NULL otherwise.h]h;A pointer to the allocated memory range, or NULL otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKIhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_format_conv_state_release (C function)c.drm_format_conv_state_releasehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hHvoid drm_format_conv_state_release (struct drm_format_conv_state *state)h]j )}(hGvoid drm_format_conv_state_release(struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKcubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKcubj )}(hdrm_format_conv_state_releaseh]j )}(hdrm_format_conv_state_releaseh]hdrm_format_conv_state_release}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKcubj)}(h%(struct drm_format_conv_state *state)h]j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjKmodnameN classnameNj j )}j ]j)}jjsbc.drm_format_conv_state_releaseasbuh1hhj'ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj)}(hjOh]h*}(hjwhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj'ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj#ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKcubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKcubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKchjhhubj )}(hhh]h)}(h%Releases an format-conversion storageh]h%Releases an format-conversion storage}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKchjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKcubeh}(h]h ](j functioneh"]h$]h&]j j j jƈj jƈj j j uh1jv hhhjhNhNubj )}(hX1**Parameters** ``struct drm_format_conv_state *state`` The format-conversion state **Description** Releases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.h](h)}(h**Parameters**h]j )}(hjЈh]h Parameters}(hj҈hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjΈubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKghjʈubjU )}(hhh]jZ )}(hD``struct drm_format_conv_state *state`` The format-conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKdhjubj| )}(hhh]h)}(hThe format-conversion stateh]hThe format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKdhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKdhjubah}(h]h ]h"]h$]h&]uh1jT hjʈubh)}(h**Description**h]j )}(hj*h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKfhjʈubh)}(hReleases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.h]hReleases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKehjʈubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_fb_clip_offset (C function)c.drm_fb_clip_offsethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hwunsigned int drm_fb_clip_offset (unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h]j )}(hvunsigned int drm_fb_clip_offset(unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h](j)}(hunsignedh]hunsigned}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK{ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkhhhj}hK{ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkhhhj}hK{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkhhhj}hK{ubj )}(hdrm_fb_clip_offseth]j )}(hdrm_fb_clip_offseth]hdrm_fb_clip_offset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjkhhhj}hK{ubj)}(hW(unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h](j)}(hunsigned int pitchh](j)}(hunsignedh]hunsigned}(hjȉhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĉubj )}(h h]h }(hj։hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĉubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĉubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĉubj )}(hpitchh]hpitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĉubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h$const struct drm_format_info *formath](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_clip_offsetasbuh1hhjubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hformath]hformat}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjΊhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjߊhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܊ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jnc.drm_fb_clip_offsetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjkhhhj}hK{ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjghhhj}hK{ubah}(h]jbah ](j j eh"]h$]h&]j j )j huh1j{ hj}hK{hjdhhubj )}(hhh]h)}(hhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j c.drm_fb_swabasbuh1hhjubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjɓhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj֓hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_fb_swabasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool cachedh](j)}(hjIh]hbool}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(hcachedh]hcached}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_fb_swabasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjiubj )}(hstateh]hstate}(hjĔhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjlhhhj~hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhhj~hMubah}(h]jcah ](j j eh"]h$]h&]j j )j huh1j{ hj~hMhjehhubj )}(hhh]h)}(hSwap bytes into clip bufferh]hSwap bytes into clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjehhhj~hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct iosys_map *dst`` Array of destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``bool cached`` Source buffer is mapped cached (eg. not write-combined) ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and swaps per-pixel bytes during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. If **cached** is false a temporary buffer is used to cache one pixel line at a time to speed up slow uncached reads. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubjU )}(hhh](jZ )}(h7``struct iosys_map *dst`` Array of destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hj/h]hstruct iosys_map *dst}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj)ubj| )}(hhh]h)}(hArray of destination buffersh]hArray of destination buffers}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMhjEubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hjDhMhj&ubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjhh]hconst unsigned int *dst_pitch}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjbubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj~ubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hj}hMhj&ubjZ )}(h8``const struct iosys_map *src`` Array of source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hArray of source buffersh]hArray of source buffers}(hj͕hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjɕhMhjʕubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjɕhMhj&ubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj&ubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hj&h]hconst struct drm_rect *clip}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj<ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj;hMhj&ubjZ )}(hH``bool cached`` Source buffer is mapped cached (eg. not write-combined) h](j` )}(h``bool cached``h]jf )}(hj_h]h bool cached}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjYubj| )}(hhh]h)}(h7Source buffer is mapped cached (eg. not write-combined)h]h7Source buffer is mapped cached (eg. not write-combined)}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjthMhj&ubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj&ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjӖh]h Description}(hjՖhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjіubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubh)}(hXThis function copies parts of a framebuffer to display memory and swaps per-pixel bytes during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. If **cached** is false a temporary buffer is used to cache one pixel line at a time to speed up slow uncached reads.h](hThis function copies parts of a framebuffer to display memory and swaps per-pixel bytes during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhi’s format. Each entry stores the value for the format’s respective color plane at the same index. If }(hjhhhNhNubj )}(h **cached**h]hcached}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhg is false a temporary buffer is used to cache one pixel line at a time to speed up slow uncached reads.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjRhhhNhNubj )}(h**dst**h]hdst}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubh2 (i.e. the destination is at the top-left corner).}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_fb_xrgb8888_to_rgb332 (C function)c.drm_fb_xrgb8888_to_rgb332hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_rgb332 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_rgb332(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_fb_xrgb8888_to_rgb332h]j )}(hdrm_fb_xrgb8888_to_rgb332h]hdrm_fb_xrgb8888_to_rgb332}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjЗhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̗ubj )}(h h]h }(hjݗhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̗ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_rgb332asbuh1hhj̗ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̗ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj̗ubj )}(hdsth]hdst}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̗ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjȗubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj)}(hunsignedh]hunsigned}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj)}(hinth]hint}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjȗubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjȘhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj֘hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_fb_xrgb8888_to_rgb332asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjȗubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_fb_xrgb8888_to_rgb332asbuh1hhjBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjBubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjȗubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjљhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͙ubj )}(h h]h }(hjޙhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͙ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͙ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͙ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j c.drm_fb_xrgb8888_to_rgb332asbuh1hhj͙ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͙ubj)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj͙ubj )}(hcliph]hclip}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͙ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjȗubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j c.drm_fb_xrgb8888_to_rgb332asbuh1hhjXubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjXubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjȗubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h&Convert XRGB8888 to RGB332 clip bufferh]h&Convert XRGB8888 to RGB332 clip buffer}(hjݚhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hjښhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXj**Parameters** ``struct iosys_map *dst`` Array of RGB332 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB332 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjU )}(hhh](jZ )}(h>``struct iosys_map *dst`` Array of RGB332 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hjubj| )}(hhh]h)}(h#Array of RGB332 destination buffersh]h#Array of RGB332 destination buffers}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hM hj4ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj3hM hjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjWh]hconst unsigned int *dst_pitch}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjQubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjphhhNhNubj )}(h**dst**h]hdst}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh9; can be NULL if scanlines are stored next to each other.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjmubah}(h]h ]h"]h$]h&]uh1j{ hjQubeh}(h]h ]h"]h$]h&]uh1jY hjlhMhjubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjܛh]h const struct drm_framebuffer *fb}(hjޛhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjڛubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj֛ubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj֛ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj*hMhjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjNh]h#struct drm_format_conv_state *state}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjHubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjdubah}(h]h ]h"]h$]h&]uh1j{ hjHubeh}(h]h ]h"]h$]h&]uh1jY hjchMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hj˜hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hjݜhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hVDrivers can use this function for RGB332 devices that don't support XRGB8888 natively.h]hXDrivers can use this function for RGB332 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_fb_xrgb8888_to_rgb565 (C function)c.drm_fb_xrgb8888_to_rgb565hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_rgb565 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_rgb565(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM3ubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBhhhjThM3ubj )}(hdrm_fb_xrgb8888_to_rgb565h]j )}(hdrm_fb_xrgb8888_to_rgb565h]hdrm_fb_xrgb8888_to_rgb565}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ](j j eh"]h$]h&]j j uh1j hjBhhhjThM3ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjisbc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjϝhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hjܝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb565asbuh1hhjjubj )}(h h]h }(hjŞhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj)}(hjOh]h*}(hjӞhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj^hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj )}(h h]h }(hj۟hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb565asbuh1hhj ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjYhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hstateh]hstate}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubeh}(h]h ]h"]h$]h&]j j uh1jhjBhhhjThM3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj>hhhjThM3ubah}(h]j9ah ](j j eh"]h$]h&]j j )j huh1j{ hjThM3hj;hhubj )}(hhh]h)}(h&Convert XRGB8888 to RGB565 clip bufferh]h&Convert XRGB8888 to RGB565 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM3hjhhubah}(h]h ]h"]h$]h&]uh1j hj;hhhjThM3ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXi**Parameters** ``struct iosys_map *dst`` Array of RGB565 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB565 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM7hjubjU )}(hhh](jZ )}(h>``struct iosys_map *dst`` Array of RGB565 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjѠh]hstruct iosys_map *dst}(hjӠhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjϠubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM4hjˠubj| )}(hhh]h)}(h#Array of RGB565 destination buffersh]h#Array of RGB565 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1j{ hjˠubeh}(h]h ]h"]h$]h&]uh1jY hjhM4hjȠubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hj h]hconst unsigned int *dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM6hjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj#hhhNhNubj )}(h**dst**h]hdst}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubh9; can be NULL if scanlines are stored next to each other.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM5hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM6hjȠubjZ )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j` )}(h``const struct iosys_map *src``h]jf )}(hjVh]hconst struct iosys_map *src}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM7hjPubj| )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhM7hjlubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjkhM7hjȠubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM8hjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM8hjȠubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjȡh]hconst struct drm_rect *clip}(hjʡhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjơubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM9hj¡ubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjݡhM9hjޡubah}(h]h ]h"]h$]h&]uh1j{ hj¡ubeh}(h]h ]h"]h$]h&]uh1jY hjݡhM9hjȠubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM:hjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM:hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM:hjȠubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj<h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM<hjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjRhhhNhNubj )}(h**dst**h]hdst}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubh, }(hjRhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubh and }(hjRhhhNhNubj )}(h**src**h]hsrc}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjRhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM;hjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMAhjubh)}(hVDrivers can use this function for RGB565 devices that don't support XRGB8888 natively.h]hXDrivers can use this function for RGB565 devices that don’t support XRGB8888 natively.}(hjʢhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMDhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_fb_xrgb8888_to_rgb565be (C function)c.drm_fb_xrgb8888_to_rgb565behNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_rgb565be (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_rgb565be(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM[ubj )}(hdrm_fb_xrgb8888_to_rgb565beh]j )}(hdrm_fb_xrgb8888_to_rgb565beh]hdrm_fb_xrgb8888_to_rgb565be}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM[ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjVmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_rgb565beasbuh1hhj2ubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj2ubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjãhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjѣhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjߣhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]jpc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjǤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjԤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jpc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]jpc.drm_fb_xrgb8888_to_rgb565beasbuh1hhj3ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3ubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj¥hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjϥhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݥubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jpc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM[ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM[ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM[hjhhubj )}(hhh]h)}(hmodnameN classnameNj j )}j ]j<c.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j<c.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj )}(h h]h }(hjʼhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjؼhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjӹhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjӹhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjӹhMhjhhubj )}(hhh]h)}(h&Convert XRGB8888 to RGB888 clip bufferh]h&Convert XRGB8888 to RGB888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjӹhMubeh}(h]h ](j functioneh"]h$]h&]j j j j'j j'j j j uh1jv hhhjhNhNubj )}(hXj**Parameters** ``struct iosys_map *dst`` Array of RGB888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB888 devices that don't natively support XRGB8888.h](h)}(h**Parameters**h]j )}(hj1h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj+ubjU )}(hhh](jZ )}(h>``struct iosys_map *dst`` Array of RGB888 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjPh]hstruct iosys_map *dst}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjJubj| )}(hhh]h)}(h#Array of RGB888 destination buffersh]h#Array of RGB888 destination buffers}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjfubah}(h]h ]h"]h$]h&]uh1j{ hjJubeh}(h]h ]h"]h$]h&]uh1jY hjehMhjGubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjGubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjսh]hconst struct iosys_map *src}(hj׽hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjӽubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjϽubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjϽubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjGubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj$ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj#hMhjGubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjGh]hconst struct drm_rect *clip}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjAubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj]ubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hj\hMhjGubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjzubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjzubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjGubeh}(h]h ]h"]h$]h&]uh1jT hj+ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj+ubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjѾhhhNhNubj )}(h**dst**h]hdst}(hjپhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjѾubh, }(hjѾhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjѾubh and }(hjѾhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjѾubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjѾhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjѾubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjѾhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj+ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hj(hhhNhNubj )}(h**dst**h]hdst}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubh2 (i.e. the destination is at the top-left corner).}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj+ubh)}(hVDrivers can use this function for RGB888 devices that don't natively support XRGB8888.h]hXDrivers can use this function for RGB888 devices that don’t natively support XRGB8888.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_fb_xrgb8888_to_bgr888 (C function)c.drm_fb_xrgb8888_to_bgr888hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_bgr888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_bgr888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM"ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjhM"ubj )}(hdrm_fb_xrgb8888_to_bgr888h]j )}(hdrm_fb_xrgb8888_to_bgr888h]hdrm_fb_xrgb8888_to_bgr888}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjthhhjhM"ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj¿hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjӿhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjпubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjտmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hunsignedh]hunsigned}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hinth]hint}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hjOh]h*}(hjzhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhj'ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj'ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhj=ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjthhhjhM"ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjphhhjhM"ubah}(h]jkah ](j j eh"]h$]h&]j j )j huh1j{ hjhM"hjmhhubj )}(hhh]h)}(h&Convert XRGB8888 to BGR888 clip bufferh]h&Convert XRGB8888 to BGR888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM"hjhhubah}(h]h ]h"]h$]h&]uh1j hjmhhhjhM"ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXj**Parameters** ``struct iosys_map *dst`` Array of BGR888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for BGR888 devices that don't natively support XRGB8888.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM&hjubjU )}(hhh](jZ )}(h>``struct iosys_map *dst`` Array of BGR888 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM#hjubj| )}(hhh]h)}(h#Array of BGR888 destination buffersh]h#Array of BGR888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM#hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM#hjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hj<h]hconst unsigned int *dst_pitch}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM%hj6ubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjUhhhNhNubj )}(h**dst**h]hdst}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubh9; can be NULL if scanlines are stored next to each other.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM$hjRubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hjQhM%hjubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM&hjubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM&hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM&hjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM'hjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM'hjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM(hjubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM(hjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hj3h]h#struct drm_format_conv_state *state}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj1ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM)hj-ubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhM)hjIubah}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hjHhM)hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjnh]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM+hjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM*hjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM0hjubh)}(hVDrivers can use this function for BGR888 devices that don't natively support XRGB8888.h]hXDrivers can use this function for BGR888 devices that don’t natively support XRGB8888.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM3hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_fb_xrgb8888_to_argb8888 (C function)c.drm_fb_xrgb8888_to_argb8888hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_argb8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_argb8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMJubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhj9hMJubj )}(hdrm_fb_xrgb8888_to_argb8888h]j )}(hdrm_fb_xrgb8888_to_argb8888h]hdrm_fb_xrgb8888_to_argb8888}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'hhhj9hMJubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjNsbc.drm_fb_xrgb8888_to_argb8888asbuh1hhjdubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj )}(hj h]hstruct}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjOubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjOubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjChhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjeubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjeubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubeh}(h]h ]h"]h$]h&]j j uh1jhj'hhhj9hMJubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#hhhj9hMJubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj9hMJhj hhubj )}(hhh]h)}(h(Convert XRGB8888 to ARGB8888 clip bufferh]h(Convert XRGB8888 to ARGB8888 clip buffer}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMJhjrhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj9hMJubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXx**Parameters** ``struct iosys_map *dst`` Array of ARGB8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMNhjubjU )}(hhh](jZ )}(h@``struct iosys_map *dst`` Array of ARGB8888 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMKhjubj| )}(hhh]h)}(h%Array of ARGB8888 destination buffersh]h%Array of ARGB8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMKhjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMMhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMLhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMMhjubjZ )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j` )}(h``const struct iosys_map *src``h]jf )}(hj;h]hconst struct iosys_map *src}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMNhj5ubj| )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMNhjQubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hjPhMNhjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjth]h const struct drm_framebuffer *fb}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMOhjnubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMOhjubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjhMOhjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMPhjubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMPhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMPhjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMQhjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMQhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMShjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hj7hhhNhNubj )}(h**dst**h]hdst}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh, }(hj7hhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh and }(hj7hhhNhNubj )}(h**src**h]hsrc}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj7hhhNhNubj )}(h**fb**h]hfb}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMRhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMXhjubh)}(hDrivers can use this function for ARGB8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ARGB8888 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM[hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_fb_xrgb8888_to_abgr8888 (C function)c.drm_fb_xrgb8888_to_abgr8888hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_abgr8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_abgr8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMrubj )}(hdrm_fb_xrgb8888_to_abgr8888h]j )}(hdrm_fb_xrgb8888_to_abgr8888h]hdrm_fb_xrgb8888_to_abgr8888}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMrubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]jUc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jUc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]jUc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jUc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMrubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMrubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMrhjhhubj )}(hhh]h)}(h(Convert XRGB8888 to ABGR8888 clip bufferh]h(Convert XRGB8888 to ABGR8888 clip buffer}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrhj%hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMrubeh}(h]h ](j functioneh"]h$]h&]j j j j@j j@j j j uh1jv hhhjhNhNubj )}(hXx**Parameters** ``struct iosys_map *dst`` Array of ABGR8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ABGR8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j )}(hjJh]h Parameters}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMvhjDubjU )}(hhh](jZ )}(h@``struct iosys_map *dst`` Array of ABGR8888 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjih]hstruct iosys_map *dst}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMshjcubj| )}(hhh]h)}(h%Array of ABGR8888 destination buffersh]h%Array of ABGR8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMshjubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hj~hMshj`ubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMuhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMthjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMuhj`ubjZ )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMvhjubj| )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMvhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMvhj`ubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hj'h]h const struct drm_framebuffer *fb}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMwhj!ubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMwhj=ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj<hMwhj`ubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hj`h]hconst struct drm_rect *clip}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMxhjZubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMxhjvubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjuhMxhj`ubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMyhjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMyhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMyhj`ubeh}(h]h ]h"]h$]h&]uh1jT hjDubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM{hjDubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMzhjDubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjAhhhNhNubj )}(h**dst**h]hdst}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubh2 (i.e. the destination is at the top-left corner).}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjDubh)}(hDrivers can use this function for ABGR8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ABGR8888 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjDubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_fb_xrgb8888_to_xbgr8888 (C function)c.drm_fb_xrgb8888_to_xbgr8888hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_xbgr8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_xbgr8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_xbgr8888h]j )}(hdrm_fb_xrgb8888_to_xbgr8888h]hdrm_fb_xrgb8888_to_xbgr8888}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj)}(hunsignedh]hunsigned}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj)}(hinth]hint}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj<ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjVubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjVubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h(Convert XRGB8888 to XBGR8888 clip bufferh]h(Convert XRGB8888 to XBGR8888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX=**Parameters** ``struct iosys_map *dst`` Array of XBGR8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for XBGR8888 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjU )}(hhh](jZ )}(h@``struct iosys_map *dst`` Array of XBGR8888 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(h%Array of XBGR8888 destination buffersh]h%Array of XBGR8888 destination buffers}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hMhjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjUh]hconst unsigned int *dst_pitch}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjOubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjnhhhNhNubj )}(h**dst**h]hdst}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubh9; can be NULL if scanlines are stored next to each other.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjkubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjjhMhjubjZ )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj(hMhjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjLh]h#struct drm_format_conv_state *state}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjFubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjbubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXDrivers can use this function for XBGR8888 devices that don't support XRGB8888 natively.h]hZDrivers can use this function for XBGR8888 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_fb_xrgb8888_to_bgrx8888 (C function)c.drm_fb_xrgb8888_to_bgrx8888hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_bgrx8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_bgrx8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhjRhMubj )}(hdrm_fb_xrgb8888_to_bgrx8888h]j )}(hdrm_fb_xrgb8888_to_bgrx8888h]hdrm_fb_xrgb8888_to_bgrx8888}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@hhhjRhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjgsbc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj}ubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjFhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjhubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj\hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj~ubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhj ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hstateh]hstate}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubeh}(h]h ]h"]h$]h&]j j uh1jhj@hhhjRhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhjRhMubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j{ hjRhMhj9hhubj )}(hhh]h)}(h(Convert XRGB8888 to BGRX8888 clip bufferh]h(Convert XRGB8888 to BGRX8888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj9hhhjRhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX=**Parameters** ``struct iosys_map *dst`` Array of BGRX8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for BGRX8888 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjU )}(hhh](jZ )}(h@``struct iosys_map *dst`` Array of BGRX8888 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(h%Array of BGRX8888 destination buffersh]h%Array of BGRX8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjh]hconst unsigned int *dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj!hhhNhNubj )}(h**dst**h]hdst}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh9; can be NULL if scanlines are stored next to each other.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j` )}(h``const struct iosys_map *src``h]jf )}(hjTh]hconst struct iosys_map *src}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjNubj| )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMhjjubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjihMhjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj:h]h Description}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjPhhhNhNubj )}(h**dst**h]hdst}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubh, }(hjPhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubh and }(hjPhhhNhNubj )}(h**src**h]hsrc}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjPhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXDrivers can use this function for BGRX8888 devices that don't support XRGB8888 natively.h]hZDrivers can use this function for BGRX8888 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_fb_xrgb8888_to_xrgb2101010 (C function) c.drm_fb_xrgb8888_to_xrgb2101010hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_xrgb2101010 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_xrgb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_xrgb2101010h]j )}(hdrm_fb_xrgb8888_to_xrgb2101010h]hdrm_fb_xrgb8888_to_xrgb2101010}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]j)}jjsb c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhj0ubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj0ubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]jn c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jn c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]jn c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhj1ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jn c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h+Convert XRGB8888 to XRGB2101010 clip bufferh]h+Convert XRGB8888 to XRGB2101010 clip buffer}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj>hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jYj jYj j j uh1jv hhhjhNhNubj )}(hXt**Parameters** ``struct iosys_map *dst`` Array of XRGB2101010 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for XRGB2101010 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj]ubjU )}(hhh](jZ )}(hC``struct iosys_map *dst`` Array of XRGB2101010 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj|ubj| )}(hhh]h)}(h(Array of XRGB2101010 destination buffersh]h(Array of XRGB2101010 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj|ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjyubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjyubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjyubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hj@h]h const struct drm_framebuffer *fb}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj:ubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMhjVubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hjUhMhjyubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjyh]hconst struct drm_rect *clip}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjsubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjyubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjyubeh}(h]h ]h"]h$]h&]uh1jT hj]ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj]ubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj]ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjZhhhNhNubj )}(h**dst**h]hdst}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubh2 (i.e. the destination is at the top-left corner).}(hjZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj]ubh)}(h[Drivers can use this function for XRGB2101010 devices that don't support XRGB8888 natively.h]h]Drivers can use this function for XRGB2101010 devices that don’t support XRGB8888 natively.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_fb_xrgb8888_to_argb2101010 (C function) c.drm_fb_xrgb8888_to_argb2101010hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_argb2101010 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_argb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_argb2101010h]j )}(hdrm_fb_xrgb8888_to_argb2101010h]hdrm_fb_xrgb8888_to_argb2101010}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj3hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj)}(hunsignedh]hunsigned}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjUubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j! c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j! c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjYubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j! c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j! c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjoubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h+Convert XRGB8888 to ARGB2101010 clip bufferh]h+Convert XRGB8888 to ARGB2101010 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hXD**Parameters** ``struct iosys_map *dst`` Array of ARGB2101010 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB2101010 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjU )}(hhh](jZ )}(hC``struct iosys_map *dst`` Array of ARGB2101010 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hj5h]hstruct iosys_map *dst}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj/ubj| )}(hhh]h)}(h(Array of ARGB2101010 destination buffersh]h(Array of ARGB2101010 destination buffers}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjKubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hjJhMhj,ubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjnh]hconst unsigned int *dst_pitch}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjhubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj,ubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj,ubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj,ubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hj,h]hconst struct drm_rect *clip}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj&ubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhMhjBubah}(h]h ]h"]h$]h&]uh1j{ hj&ubeh}(h]h ]h"]h$]h&]uh1jY hjAhMhj,ubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjeh]h#struct drm_format_conv_state *state}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hj_ubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhM hj{ubah}(h]h ]h"]h$]h&]uh1j{ hj_ubeh}(h]h ]h"]h$]h&]uh1jY hjzhM hj,ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM"hjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM!hjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hj hhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh2 (i.e. the destination is at the top-left corner).}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM'hjubh)}(h[Drivers can use this function for ARGB2101010 devices that don't support XRGB8888 natively.h]h]Drivers can use this function for ARGB2101010 devices that don’t support XRGB8888 natively.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM*hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_fb_xrgb8888_to_gray8 (C function)c.drm_fb_xrgb8888_to_gray8hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_gray8 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_gray8(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMBubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhhhjkhMBubj )}(hdrm_fb_xrgb8888_to_gray8h]j )}(hdrm_fb_xrgb8888_to_gray8h]hdrm_fb_xrgb8888_to_gray8}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ](j j eh"]h$]h&]j j uh1j hjYhhhjkhMBubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hj h]hstruct}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjKmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhj ubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhj"ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hjOh]h*}(hjphhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubj )}(hstateh]hstate}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjYhhhjkhMBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjUhhhjkhMBubah}(h]jPah ](j j eh"]h$]h&]j j )j huh1j{ hjkhMBhjRhhubj )}(hhh]h)}(hConvert XRGB8888 to grayscaleh]hConvert XRGB8888 to grayscale}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMBhjhhubah}(h]h ]h"]h$]h&]uh1j hjRhhhjkhMBubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct iosys_map *dst`` Array of 8-bit grayscale destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). DRM doesn't have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don't support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMFhjubjU )}(hhh](jZ )}(hG``struct iosys_map *dst`` Array of 8-bit grayscale destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.c}hMChjubj| )}(hhh]h)}(h,Array of 8-bit grayscale destination buffersh]h,Array of 8-bit grayscale destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMChjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hj!h]hconst unsigned int *dst_pitch}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMEhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj:hhhNhNubj )}(h**dst**h]hdst}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubh9; can be NULL if scanlines are stored next to each other.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMDhj7ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj6hMEhjubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjmh]hconst struct iosys_map *src}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMFhjgubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjhMFhjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMGhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMGhjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMHhjubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMHhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMHhjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMIhjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMIhj.ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj-hMIhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjSh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMKhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjihhhNhNubj )}(h**dst**h]hdst}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubh, }(hjihhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubh and }(hjihhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjihhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMJhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMPhjubh)}(hXDRM doesn't have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don't support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.h]hXDRM doesn’t have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don’t support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMShjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_fb_argb8888_to_argb4444 (C function)c.drm_fb_argb8888_to_argb4444hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_argb8888_to_argb4444 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_argb8888_to_argb4444(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMnubj )}(hdrm_fb_argb8888_to_argb4444h]j )}(hdrm_fb_argb8888_to_argb4444h]hdrm_fb_argb8888_to_argb4444}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMnubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]j)}jj3sbc.drm_fb_argb8888_to_argb4444asbuh1hhjIubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjIubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(hj h]hstruct}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhj4ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj4ubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(hj h]hstruct}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhjJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjJubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMnubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMnhjhhubj )}(hhh]h)}(h(Convert ARGB8888 to ARGB4444 clip bufferh]h(Convert ARGB8888 to ARGB4444 clip buffer}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMnhjWhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMnubeh}(h]h ](j functioneh"]h$]h&]j j j jrj jrj j j uh1jv hhhjhNhNubj )}(hX=**Parameters** ``struct iosys_map *dst`` Array of ARGB4444 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of ARGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB4444 devices that don't support ARGB8888 natively.h](h)}(h**Parameters**h]j )}(hj|h]h Parameters}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrhjvubjU )}(hhh](jZ )}(h@``struct iosys_map *dst`` Array of ARGB4444 destination buffers h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMohjubj| )}(hhh]h)}(h%Array of ARGB4444 destination buffersh]h%Array of ARGB4444 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMohjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMohjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMqhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMphjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMqhjubjZ )}(h@``const struct iosys_map *src`` Array of ARGB8888 source buffer h](j` )}(h``const struct iosys_map *src``h]jf )}(hj h]hconst struct iosys_map *src}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrhjubj| )}(hhh]h)}(hArray of ARGB8888 source bufferh]hArray of ARGB8888 source buffer}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMrhj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hMrhjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjYh]h const struct drm_framebuffer *fb}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMshjSubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMshjoubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjnhMshjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMthjubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMthjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMthjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMuhjubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMuhjubeh}(h]h ]h"]h$]h&]uh1jT hjvubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMwhjvubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMvhjvubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjshhhNhNubj )}(h**dst**h]hdst}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubh2 (i.e. the destination is at the top-left corner).}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM|hjvubh)}(hXDrivers can use this function for ARGB4444 devices that don't support ARGB8888 natively.h]hZDrivers can use this function for ARGB4444 devices that don’t support ARGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_fb_xrgb8888_to_mono (C function)c.drm_fb_xrgb8888_to_monohNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_mono (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_mono(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_monoh]j )}(hdrm_fb_xrgb8888_to_monoh]hdrm_fb_xrgb8888_to_mono}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjnubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j:c.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjPhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j:c.drm_fb_xrgb8888_to_monoasbuh1hhjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjrubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j:c.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j:c.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hConvert XRGB8888 to monochromeh]hConvert XRGB8888 to monochrome}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j%j j%j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct iosys_map *dst`` Array of monochrome destination buffers (0=black, 1=white) ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle. DRM doesn't have native monochrome support. Drivers can use this function for monochrome devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. This function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.h](h)}(h**Parameters**h]j )}(hj/h]h Parameters}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj)ubjU )}(hhh](jZ )}(hU``struct iosys_map *dst`` Array of monochrome destination buffers (0=black, 1=white) h](j` )}(h``struct iosys_map *dst``h]jf )}(hjNh]hstruct iosys_map *dst}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjHubj| )}(hhh]h)}(h:Array of monochrome destination buffers (0=black, 1=white)h]h:Array of monochrome destination buffers (0=black, 1=white)}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjdubah}(h]h ]h"]h$]h&]uh1j{ hjHubeh}(h]h ]h"]h$]h&]uh1jY hjchMhjEubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjEubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjEubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hj h]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj!hMhjEubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjEh]hconst struct drm_rect *clip}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj?ubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hjZhMhjEubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hj~h]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjxubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjEubeh}(h]h ]h"]h$]h&]uh1jT hj)ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj)ubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj)ubh)}(hXThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.h](h)This function does not apply clipping on }(hj&hhhNhNubj )}(h**dst**h]hdst}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubhX (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj)ubh)}(hXDRM doesn't have native monochrome support. Drivers can use this function for monochrome devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h]hX DRM doesn’t have native monochrome support. Drivers can use this function for monochrome devices that don’t support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj)ubh)}(hThis function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.h]hThis function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_fb_xrgb8888_to_gray2 (C function)c.drm_fb_xrgb8888_to_gray2hNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvoid drm_fb_xrgb8888_to_gray2 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_gray2(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_gray2h]j )}(hdrm_fb_xrgb8888_to_gray2h]hdrm_fb_xrgb8888_to_gray2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjAh]hconst}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hunsignedh]hunsigned}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hinth]hint}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj0ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjAh]hconst}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(hj h]hstruct}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhj4ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj4ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcliph]hclip}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjJubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj}hhhjhMubah}(h]jxah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjzhhubj )}(hhh]h)}(hConvert XRGB8888 to gray2h]hConvert XRGB8888 to gray2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjzhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXu**Parameters** ``struct iosys_map *dst`` Array of gray2 destination buffer ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle. DRM doesn't have native gray2 support. Drivers can use this function for gray2 devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjU )}(hhh](jZ )}(h<``struct iosys_map *dst`` Array of gray2 destination buffer h](j` )}(h``struct iosys_map *dst``h]jf )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubj| )}(hhh]h)}(h!Array of gray2 destination bufferh]h!Array of gray2 destination buffer}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj&ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj%hMhjubjZ )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j` )}(h!``const unsigned int *dst_pitch``h]jf )}(hjIh]hconst unsigned int *dst_pitch}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjCubj| )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjbhhhNhNubj )}(h**dst**h]hdst}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubh9; can be NULL if scanlines are stored next to each other.}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj_ubah}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhjubjZ )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j` )}(h``const struct iosys_map *src``h]jf )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j` )}(h$``const struct drm_framebuffer *fb``h]jf )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j` )}(h``const struct drm_rect *clip``h]jf )}(hjh]hconst struct drm_rect *clip}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj| )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j` )}(h'``struct drm_format_conv_state *state``h]jf )}(hj@h]h#struct drm_format_conv_state *state}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj:ubj| )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMhjVubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hjUhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj{h]h Description}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubj )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.h](h)This function does not apply clipping on }(hjhhhNhNubj )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhX (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hDRM doesn't have native gray2 support. Drivers can use this function for gray2 devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h]hXDRM doesn’t have native gray2 support. Drivers can use this function for gray2 devices that don’t support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM$hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubeh}(h]jah ]h"]!format helper functions referenceah$]h&]uh1hhhhhhhhKzubh)}(hhh](h)}(h*Framebuffer DMA Helper Functions Referenceh]h*Framebuffer DMA Helper Functions Reference}(hj)hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj&hhhhhKubh)}(hDProvides helper functions for creating a DMA-contiguous framebuffer.h]hDProvides helper functions for creating a DMA-contiguous framebuffer.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:130: ./drivers/gpu/drm/drm_fb_dma_helper.chKhj&hhubh)}(hX+Depending on the platform, the buffers may be physically non-contiguous and mapped through an IOMMU or a similar mechanism, or allocated from physically-contiguous memory (using, for instance, CMA or a pool of memory reserved at early boot). This is handled behind the scenes by the DMA mapping API.h]hX+Depending on the platform, the buffers may be physically non-contiguous and mapped through an IOMMU or a similar mechanism, or allocated from physically-contiguous memory (using, for instance, CMA or a pool of memory reserved at early boot). This is handled behind the scenes by the DMA mapping API.f}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:130: ./drivers/gpu/drm/drm_fb_dma_helper.chKhj&hhubh)}(hdrm_gem_fb_create() is used in the :c:type:`drm_mode_config_funcs.fb_create ` callback function to create a DMA-contiguous framebuffer.h](h#drm_gem_fb_create() is used in the }(hjUhhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jf )}(hj_h]hdrm_mode_config_funcs.fb_create}(hjahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:130: ./drivers/gpu/drm/drm_fb_dma_helper.chK"hjUubh: callback function to create a DMA-contiguous framebuffer.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj|hK"hj&hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_fb_dma_get_gem_obj (C function)c.drm_fb_dma_get_gem_objhNtauh1jd hj&hhhNhNubjw )}(hhh](j| )}(hcstruct drm_gem_dma_object * drm_fb_dma_get_gem_obj (struct drm_framebuffer *fb, unsigned int plane)h]j )}(hastruct drm_gem_dma_object *drm_fb_dma_get_gem_obj(struct drm_framebuffer *fb, unsigned int plane)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK)ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK)ubh)}(hhh]j )}(hdrm_gem_dma_objecth]hdrm_gem_dma_object}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_fb_dma_get_gem_objsbc.drm_fb_dma_get_gem_objasbuh1hhjhhhjhK)ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK)ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhK)ubj )}(hdrm_fb_dma_get_gem_objh]j )}(hjh]hdrm_fb_dma_get_gem_obj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK)ubj)}(h0(struct drm_framebuffer *fb, unsigned int plane)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]jc.drm_fb_dma_get_gem_objasbuh1hhjubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfbh]hfb}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK)ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK)ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK)hjhhubj )}(hhh]h)}(h"Get DMA GEM object for framebufferh]h"Get DMA GEM object for framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK)hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK)ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj&hNhNubj )}(h**Parameters** ``struct drm_framebuffer *fb`` The framebuffer ``unsigned int plane`` Which plane **Description** Return the DMA GEM object for given framebuffer. This function will usually be called from the CRTC callback functions.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK-hjubjU )}(hhh](jZ )}(h/``struct drm_framebuffer *fb`` The framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hj-h]hstruct drm_framebuffer *fb}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK*hj'ubj| )}(hhh]h)}(hThe framebufferh]hThe framebuffer}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhK*hjCubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hjBhK*hj$ubjZ )}(h#``unsigned int plane`` Which plane h](j` )}(h``unsigned int plane``h]jf )}(hjfh]hunsigned int plane}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK+hj`ubj| )}(hhh]h)}(h Which planeh]h Which plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hK+hj|ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj{hK+hj$ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK-hjubh)}(h0Return the DMA GEM object for given framebuffer.h]h0Return the DMA GEM object for given framebuffer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK,hjubh)}(hFThis function will usually be called from the CRTC callback functions.h]hFThis function will usually be called from the CRTC callback functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK.hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj&hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_fb_dma_get_gem_addr (C function)c.drm_fb_dma_get_gem_addrhNtauh1jd hj&hhhNhNubjw )}(hhh](j| )}(hrdma_addr_t drm_fb_dma_get_gem_addr (struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h]j )}(hqdma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h](h)}(hhh]j )}(h dma_addr_th]h dma_addr_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_fb_dma_get_gem_addrsbc.drm_fb_dma_get_gem_addrasbuh1hhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK?ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK?ubj )}(hdrm_fb_dma_get_gem_addrh]j )}(hjh]hdrm_fb_dma_get_gem_addr}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK?ubj)}(hO(struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]jc.drm_fb_dma_get_gem_addrasbuh1hhjCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjCubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_dma_get_gem_addrasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hinth]hint}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hplaneh]hplane}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK?ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK?ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK?hjhhubj )}(hhh]h)}(hGet DMA (bus) address for framebuffer, for pixel formats where values are grouped in blocks this will get you the beginning of the blockh]hGet DMA (bus) address for framebuffer, for pixel formats where values are grouped in blocks this will get you the beginning of the block}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK?hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK?ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj&hNhNubj )}(hX2**Parameters** ``struct drm_framebuffer *fb`` The framebuffer ``struct drm_plane_state *state`` Which state of drm plane ``unsigned int plane`` Which plane Return the DMA GEM address for given framebuffer. **Description** This function will usually be called from the PLANE callback functions.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKChjubjU )}(hhh](jZ )}(h/``struct drm_framebuffer *fb`` The framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKBhjubj| )}(hhh]h)}(hThe framebufferh]hThe framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKBhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKBhjubjZ )}(h;``struct drm_plane_state *state`` Which state of drm plane h](j` )}(h!``struct drm_plane_state *state``h]jf )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKChjubj| )}(hhh]h)}(hWhich state of drm planeh]hWhich state of drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKChjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKChjubjZ )}(hU``unsigned int plane`` Which plane Return the DMA GEM address for given framebuffer. h](j` )}(h``unsigned int plane``h]jf )}(hj<h]hunsigned int plane}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKEhj6ubj| )}(hhh]h)}(h=Which plane Return the DMA GEM address for given framebuffer.h]h=Which plane Return the DMA GEM address for given framebuffer.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKDhjRubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hjQhKEhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjxh]h Description}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKGhjubh)}(hGThis function will usually be called from the PLANE callback functions.h]hGThis function will usually be called from the PLANE callback functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKFhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj&hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_fb_dma_sync_non_coherent (C function)c.drm_fb_dma_sync_non_coherenthNtauh1jd hj&hhhNhNubjw )}(hhh](j| )}(h|void drm_fb_dma_sync_non_coherent (struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h]j )}(h{void drm_fb_dma_sync_non_coherent(struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKpubj )}(hdrm_fb_dma_sync_non_coherenth]j )}(hdrm_fb_dma_sync_non_coherenth]hdrm_fb_dma_sync_non_coherent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKpubj)}(hZ(struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h](j)}(hstruct drm_device *drmh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_dma_sync_non_coherentasbuh1hhjubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjFhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdrmh]hdrm}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_plane_state *old_stateh](j )}(hj h]hstruct}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j4c.drm_fb_dma_sync_non_coherentasbuh1hhjhubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhubj )}(h old_stateh]h old_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j4c.drm_fb_dma_sync_non_coherentasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKpubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKpubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKphjhhubj )}(hhh]h)}(h.Sync GEM object to non-coherent backing memoryh]h.Sync GEM object to non-coherent backing memory}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKphjZhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKpubeh}(h]h ](j functioneh"]h$]h&]j j j juj juj j j uh1jv hhhj&hNhNubj )}(hX**Parameters** ``struct drm_device *drm`` DRM device ``struct drm_plane_state *old_state`` Old plane state ``struct drm_plane_state *state`` New plane state **Description** This function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane's .atomic_update ensures that all the data in the backing memory have been written to RAM.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKthjyubjU )}(hhh](jZ )}(h&``struct drm_device *drm`` DRM device h](j` )}(h``struct drm_device *drm``h]jf )}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKrhjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKrhjubjZ )}(h6``struct drm_plane_state *old_state`` Old plane state h](j` )}(h%``struct drm_plane_state *old_state``h]jf )}(hjh]h!struct drm_plane_state *old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKshjubj| )}(hhh]h)}(hOld plane stateh]hOld plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKshjubjZ )}(h2``struct drm_plane_state *state`` New plane state h](j` )}(h!``struct drm_plane_state *state``h]jf )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKthj ubj| )}(hhh]h)}(hNew plane stateh]hNew plane state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hKthj&ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj%hKthjubeh}(h]h ]h"]h$]h&]uh1jT hjyubh)}(h**Description**h]j )}(hjKh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKvhjyubh)}(hThis function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane's .atomic_update ensures that all the data in the backing memory have been written to RAM.h]hThis function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane’s .atomic_update ensures that all the data in the backing memory have been written to RAM.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKuhjyubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj&hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_fb_dma_get_scanout_buffer (C function)c.drm_fb_dma_get_scanout_bufferhNtauh1jd hj&hhhNhNubjw )}(hhh](j| )}(hZint drm_fb_dma_get_scanout_buffer (struct drm_plane *plane, struct drm_scanout_buffer *sb)h]j )}(hYint drm_fb_dma_get_scanout_buffer(struct drm_plane *plane, struct drm_scanout_buffer *sb)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_fb_dma_get_scanout_bufferh]j )}(hdrm_fb_dma_get_scanout_bufferh]hdrm_fb_dma_get_scanout_buffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h8(struct drm_plane *plane, struct drm_scanout_buffer *sb)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_fb_dma_get_scanout_bufferasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hplaneh]hplane}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_scanout_buffer *sbh](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_scanout_bufferh]hdrm_scanout_buffer}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]jc.drm_fb_dma_get_scanout_bufferasbuh1hhj;ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;ubj )}(hsbh]hsb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h)Provide a scanout buffer in case of panich]h)Provide a scanout buffer in case of panic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj&hNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` DRM primary plane ``struct drm_scanout_buffer *sb`` scanout buffer for the panic handler **Return** 0 or negative error code **Description** Generic get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won't call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won't get displayed.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubjU )}(hhh](jZ )}(h.``struct drm_plane *plane`` DRM primary plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubj| )}(hhh]h)}(hDRM primary planeh]hDRM primary plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hG``struct drm_scanout_buffer *sb`` scanout buffer for the panic handler h](j` )}(h!``struct drm_scanout_buffer *sb``h]jf )}(hj:h]hstruct drm_scanout_buffer *sb}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhj4ubj| )}(hhh]h)}(h$scanout buffer for the panic handlerh]h$scanout buffer for the panic handler}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKhjPubah}(h]h ]h"]h$]h&]uh1j{ hj4ubeh}(h]h ]h"]h$]h&]uh1jY hjOhKhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjuh]hReturn}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(h0 or negative error codeh]h0 or negative error code}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(hGeneric get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won't call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won't get displayed.h]hGeneric get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won’t call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won’t get displayed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj&hhhNhNubeh}(h]jah ]h"]*framebuffer dma helper functions referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h Framebuffer GEM Helper Referenceh]h Framebuffer GEM Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hj7uh1hhjhhhhhKubh)}(hThis library provides helpers for drivers that don't subclass :c:type:`drm_framebuffer` and use :c:type:`drm_gem_object` for their backing storage.h](h@This library provides helpers for drivers that don’t subclass }(hjhhhNhNubh)}(h:c:type:`drm_framebuffer`h]jf )}(hjh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:139: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK!hjubh and use }(hjhhhNhNubh)}(h:c:type:`drm_gem_object`h]jf )}(hj h]hdrm_gem_object}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_gem_objectuh1hhj hK!hjubh for their backing storage.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hK!hjhhubh)}(hDrivers without additional needs to validate framebuffers can simply use drm_gem_fb_create() and everything is wired up automatically. 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hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hfbh]hfb}(hj. hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hjG hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC ubj )}(h h]h }(hjU hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC ubj)}(hinth]hint}(hjc hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC ubj )}(h h]h }(hjq hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC ubj )}(hplaneh]hplane}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjY hhhjj hK,ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjU hhhjj hK,ubah}(h]jP ah ](j j eh"]h$]h&]j j )j huh1j{ hjj hK,hjR hhubj )}(hhh]h)}(h&Get GEM object backing the framebufferh]h&Get GEM object backing the framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK,hj hhubah}(h]h ]h"]h$]h&]uh1j hjR hhhjj hK,ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hXN**Parameters** ``struct drm_framebuffer *fb`` Framebuffer ``unsigned int plane`` Plane index **Description** No additional reference is taken beyond the one that the :c:type:`drm_frambuffer` already holds. **Return** Pointer to :c:type:`drm_gem_object` for the given framebuffer and plane index or NULL if it does not exist.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK0hj ubjU )}(hhh](jZ )}(h+``struct drm_framebuffer *fb`` Framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hj h]hstruct drm_framebuffer *fb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK-hj ubj| )}(hhh]h)}(h Framebufferh]h Framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK-hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hK-hj ubjZ )}(h#``unsigned int plane`` Plane index h](j` )}(h``unsigned int plane``h]jf )}(hj# h]hunsigned int plane}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj! ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK.hj ubj| )}(hhh]h)}(h Plane indexh]h Plane index}(hj< hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8 hK.hj9 ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj8 hK.hj ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj^ h]h Description}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK0hj ubh)}(h`No additional reference is taken beyond the one that the :c:type:`drm_frambuffer` already holds.h](h9No additional reference is taken beyond the one that the }(hjt hhhNhNubh)}(h:c:type:`drm_frambuffer`h]jf )}(hj~ h]hdrm_frambuffer}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj| ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_frambufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK/hjt ubh already holds.}(hjt hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hK/hj ubh)}(h **Return**h]j )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK2hj ubh)}(hkPointer to :c:type:`drm_gem_object` for the given framebuffer and plane index or NULL if it does not exist.h](h Pointer to }(hj hhhNhNubh)}(h:c:type:`drm_gem_object`h]jf )}(hj h]hdrm_gem_object}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_gem_objectuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK3hj ubhH for the given framebuffer and plane index or NULL if it does not exist.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hK3hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_gem_fb_destroy (C function)c.drm_gem_fb_destroyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h4void drm_gem_fb_destroy (struct drm_framebuffer *fb)h]j )}(h3void drm_gem_fb_destroy(struct drm_framebuffer *fb)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK]ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hK]ubj )}(hdrm_gem_fb_destroyh]j )}(hdrm_gem_fb_destroyh]hdrm_gem_fb_destroy}(hj1 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj- ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hK]ubj)}(h(struct drm_framebuffer *fb)h]j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjM hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI ubj )}(h h]h }(hjZ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjk hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjm modnameN classnameNj j )}j ]j)}jj3 sbc.drm_gem_fb_destroyasbuh1hhjI ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjI ubj )}(hfbh]hfb}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj hK]ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hK]ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hK]hj hhubj )}(hhh]h)}(hFree GEM backed framebufferh]hFree GEM backed framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK]hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hK]ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hX **Parameters** ``struct drm_framebuffer *fb`` Framebuffer **Description** Frees a GEM backed framebuffer with its backing buffer(s) and the structure itself. Drivers can use this as their :c:type:`drm_framebuffer_funcs->destroy ` callback.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKahj ubjU )}(hhh]jZ )}(h+``struct drm_framebuffer *fb`` Framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hj h]hstruct drm_framebuffer *fb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK^hj ubj| )}(hhh]h)}(h Framebufferh]h Framebuffer}(hj* hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj& hK^hj' ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj& hK^hj ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjL h]h Description}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJ ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK`hj ubh)}(hFrees a GEM backed framebuffer with its backing buffer(s) and the structure itself. Drivers can use this as their :c:type:`drm_framebuffer_funcs->destroy ` callback.h](hrFrees a GEM backed framebuffer with its backing buffer(s) and the structure itself. Drivers can use this as their }(hjb hhhNhNubh)}(h@:c:type:`drm_framebuffer_funcs->destroy `h]jf )}(hjl h]hdrm_framebuffer_funcs->destroy}(hjn hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK_hjb ubh callback.}(hjb hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hK_hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_gem_fb_create_handle (C function)c.drm_gem_fb_create_handlehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hfint drm_gem_fb_create_handle (struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h]j )}(heint drm_gem_fb_create_handle(struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKqubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hKqubj )}(hdrm_gem_fb_create_handleh]j )}(hdrm_gem_fb_create_handleh]hdrm_gem_fb_create_handle}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hKqubj)}(hI(struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj sbc.drm_gem_fb_create_handleasbuh1hhj ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hfbh]hfb}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j+c.drm_gem_fb_create_handleasbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hfileh]hfile}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hunsigned int *handleh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hhandleh]hhandle}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hKqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hKqubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hKqhj hhubj )}(hhh]h)}(h(Create handle for GEM backed framebufferh]h(Create handle for GEM backed framebuffer}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKqhj?hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hKqubeh}(h]h ](j functioneh"]h$]h&]j j j jZj jZj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_framebuffer *fb`` Framebuffer ``struct drm_file *file`` DRM file to register the handle for ``unsigned int *handle`` Pointer to return the created handle **Description** This function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their :c:type:`drm_framebuffer_funcs->create_handle ` callback. The GETFB IOCTL calls into this callback. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjdh]h Parameters}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKuhj^ubjU )}(hhh](jZ )}(h+``struct drm_framebuffer *fb`` Framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKrhj}ubj| )}(hhh]h)}(h Framebufferh]h Framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hjhKrhjzubjZ )}(h>``struct drm_file *file`` DRM file to register the handle for h](j` )}(h``struct drm_file *file``h]jf )}(hjh]hstruct drm_file *file}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKshjubj| )}(hhh]h)}(h#DRM file to register the handle forh]h#DRM file to register the handle for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKshjzubjZ )}(h>``unsigned int *handle`` Pointer to return the created handle h](j` )}(h``unsigned int *handle``h]jf )}(hjh]hunsigned int *handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKthjubj| )}(hhh]h)}(h$Pointer to return the created handleh]h$Pointer to return the created handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKthj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hKthjzubeh}(h]h ]h"]h$]h&]uh1jT hj^ubh)}(h**Description**h]j )}(hj0h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKvhj^ubh)}(hThis function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their :c:type:`drm_framebuffer_funcs->create_handle ` callback. The GETFB IOCTL calls into this callback.h](hiThis function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their }(hjFhhhNhNubh)}(hF:c:type:`drm_framebuffer_funcs->create_handle `h]jf )}(hjPh]h$drm_framebuffer_funcs->create_handle}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKuhjFubh4 callback. The GETFB IOCTL calls into this callback.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjmhKuhj^ubh)}(h **Return**h]j )}(hjzh]hReturn}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKyhj^ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKzhj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_gem_fb_init_with_funcs (C function)c.drm_gem_fb_init_with_funcshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hint drm_gem_fb_init_with_funcs (struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h]j )}(hint drm_gem_fb_init_with_funcs(struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_gem_fb_init_with_funcsh]j )}(hdrm_gem_fb_init_with_funcsh]hdrm_gem_fb_init_with_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_gem_fb_init_with_funcsasbuh1hhjubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6c.drm_gem_fb_init_with_funcsasbuh1hhjjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjjubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6c.drm_gem_fb_init_with_funcsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfileh]hfile}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h"const struct drm_format_info *infoh](j )}(hjAh]hconst}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(hj h]hstruct}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6c.drm_gem_fb_init_with_funcsasbuh1hhjJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjJubj )}(hinfoh]hinfo}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6c.drm_gem_fb_init_with_funcsasbuh1hhjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmode_cmdh]hmode_cmd}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h)const struct drm_framebuffer_funcs *funcsh](j )}(hjAh]hconst}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubh)}(hhh]j )}(hdrm_framebuffer_funcsh]hdrm_framebuffer_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6c.drm_gem_fb_init_with_funcsasbuh1hhj`ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj )}(hfuncsh]hfuncs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(hHelper function for implementing :c:type:`drm_mode_config_funcs.fb_create ` callback in cases when the driver allocates a subclass of struct drm_framebufferh](h!Helper function for implementing }(hjhhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jf )}(hj h]hdrm_mode_config_funcs.fb_create}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j6c.drm_gem_fb_init_with_funcsasbj drm_mode_config_funcsuh1hhjj hK,hjubhQ callback in cases when the driver allocates a subclass of struct drm_framebuffer}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j j@j j@j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_framebuffer *fb`` framebuffer object ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object **Description** This function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting. **Return** Zero or a negative error code.h](h)}(h**Parameters**h]j )}(hjJh]h Parameters}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjDubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjih]hstruct drm_device *dev}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjcubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hKhjubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hj~hKhj`ubjZ )}(h2``struct drm_framebuffer *fb`` framebuffer object h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(hframebuffer objecth]hframebuffer object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj`ubjZ )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j` )}(h``struct drm_file *file``h]jf )}(hjh]hstruct drm_file *file}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj`ubjZ )}(h@``const struct drm_format_info *info`` pixel format information h](j` )}(h&``const struct drm_format_info *info``h]jf )}(hjh]h"const struct drm_format_info *info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(hpixel format informationh]hpixel format information}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hKhj*ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj)hKhj`ubjZ )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j` )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jf )}(hjMh]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjGubj| )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhKhjcubah}(h]h ]h"]h$]h&]uh1j{ hjGubeh}(h]h ]h"]h$]h&]uh1jY hjbhKhj`ubjZ )}(h_``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object h](j` )}(h-``const struct drm_framebuffer_funcs *funcs``h]jf )}(hjh]h)const struct drm_framebuffer_funcs *funcs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(h0vtable to be used for the new framebuffer objecth]h0vtable to be used for the new framebuffer object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj`ubeh}(h]h ]h"]h$]h&]uh1jT hjDubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjDubh)}(hXThis function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting.h](h!This function can be used to set }(hjhhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jf )}(hjh]hdrm_framebuffer_funcs}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubhk for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don’t need to change }(hjhhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jf )}(hjh]hdrm_framebuffer_funcs}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhjhKhjubh. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjDubh)}(h **Return**h]j )}(hj.h]hReturn}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjDubh)}(hZero or a negative error code.h]hZero or a negative error code.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjDubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_gem_fb_create_with_funcs (C function)c.drm_gem_fb_create_with_funcshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hstruct drm_framebuffer * drm_gem_fb_create_with_funcs (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h]j )}(hstruct drm_framebuffer *drm_gem_fb_create_with_funcs(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhjhKubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_gem_fb_create_with_funcssbc.drm_gem_fb_create_with_funcsasbuh1hhjohhhjhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhjhKubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjohhhjhKubj )}(hdrm_gem_fb_create_with_funcsh]j )}(hjh]hdrm_gem_fb_create_with_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjohhhjhKubj)}(h(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_gem_fb_create_with_funcsasbuh1hhjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]jc.drm_gem_fb_create_with_funcsasbuh1hhjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjYubj )}(hfileh]hfile}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h"const struct drm_format_info *infoh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_gem_fb_create_with_funcsasbuh1hhjubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hinfoh]hinfo}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjAh]hconst}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_gem_fb_create_with_funcsasbuh1hhjTubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjTubj )}(hmode_cmdh]hmode_cmd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h)const struct drm_framebuffer_funcs *funcsh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebuffer_funcsh]hdrm_framebuffer_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_gem_fb_create_with_funcsasbuh1hhjubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfuncsh]hfuncs}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjohhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjkhhhjhKubah}(h]jfah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhhubj )}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hjhhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jf )}(hjh]hdrm_mode_config_funcs.fb_create}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_gem_fb_create_with_funcsasbj drm_mode_config_funcsuh1hhjj hK,hjubh callback}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj|hhubah}(h]h ]h"]h$]h&]uh1j hjhhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object **Description** This function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j` )}(h``struct drm_file *file``h]jf )}(hj!h]hstruct drm_file *file}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hKhj7ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj6hKhjubjZ )}(h@``const struct drm_format_info *info`` pixel format information h](j` )}(h&``const struct drm_format_info *info``h]jf )}(hjZh]h"const struct drm_format_info *info}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjTubj| )}(hhh]h)}(hpixel format informationh]hpixel format information}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohKhjpubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjohKhjubjZ )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j` )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jf )}(hjh]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h_``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object h](j` )}(h-``const struct drm_framebuffer_funcs *funcs``h]jf )}(hjh]h)const struct drm_framebuffer_funcs *funcs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubj| )}(hhh]h)}(h0vtable to be used for the new framebuffer objecth]h0vtable to be used for the new framebuffer object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubh)}(hThis function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation.h](h!This function can be used to set }(hjhhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jf )}(hj'h]hdrm_framebuffer_funcs}(hj)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubhk for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don’t need to change }(hjhhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jf )}(hjKh]hdrm_framebuffer_funcs}(hjMhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhjDhKhjubh+. The function does buffer size validation.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhKhjubh)}(h **Return**h]j )}(hjth]hReturn}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hjhhhNhNubh)}(h:c:type:`drm_framebuffer`h]jf )}(hjh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjubh+ on success or an error pointer on failure.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_gem_fb_create (C function)c.drm_gem_fb_createhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hstruct drm_framebuffer * drm_gem_fb_create (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h]j )}(hstruct drm_framebuffer *drm_gem_fb_create(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_gem_fb_createsbc.drm_gem_fb_createasbuh1hhjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMubj )}(hdrm_gem_fb_createh]j )}(hjh]hdrm_gem_fb_create}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h|(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]jc.drm_gem_fb_createasbuh1hhjRubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjRubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_gem_fb_createasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hfileh]hfile}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(h"const struct drm_format_info *infoh](j )}(hjAh]hconst}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(hj h]hstruct}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]jc.drm_gem_fb_createasbuh1hhj2ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj2ubj )}(hinfoh]hinfo}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_gem_fb_createasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmode_cmdh]hmode_cmd}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hj]hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jf )}(hjgh]hdrm_mode_config_funcs.fb_create}(hjihhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_gem_fb_createasbj drm_mode_config_funcsuh1hhjj hK,hj]ubh callback}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjZhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request **Description** This function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. If your hardware has special alignment or pitch requirements these should be checked before calling this function. The function does buffer size validation. Use drm_gem_fb_create_with_dirty() if you need framebuffer flushing. Drivers can use this as their :c:type:`drm_mode_config_funcs.fb_create ` callback. The ADDFB2 IOCTL calls into this callback. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hjubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j` )}(h``struct drm_file *file``h]jf )}(hjh]hstruct drm_file *file}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjubj| )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h@``const struct drm_format_info *info`` pixel format information h](j` )}(h&``const struct drm_format_info *info``h]jf )}(hj8h]h"const struct drm_format_info *info}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hj2ubj| )}(hhh]h)}(hpixel format informationh]hpixel format information}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM hjNubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hjMhM hjubjZ )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j` )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jf )}(hjqh]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hjkubj| )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hjubh)}(hThis function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer.h](h` callback. The ADDFB2 IOCTL calls into this callback.h](hDrivers can use this as their }(hj hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jf )}(hj h]hdrm_mode_config_funcs.fb_create}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj ubh5 callback. The ADDFB2 IOCTL calls into this callback.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj* hMhjubh)}(h **Return**h]j )}(hj7 h]hReturn}(hj9 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5 ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hjM hhhNhNubh)}(h:c:type:`drm_framebuffer`h]jf )}(hjW h]hdrm_framebuffer}(hjY hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjU ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjM ubh+ on success or an error pointer on failure.}(hjM hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjt hMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_gem_fb_create_with_dirty (C function)c.drm_gem_fb_create_with_dirtyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hstruct drm_framebuffer * drm_gem_fb_create_with_dirty (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h]j )}(hstruct drm_framebuffer *drm_gem_fb_create_with_dirty(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM,ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hM,ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jdrm_gem_fb_create_with_dirtysbc.drm_gem_fb_create_with_dirtyasbuh1hhj hhhj hM,ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hM,ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj hhhj hM,ubj )}(hdrm_gem_fb_create_with_dirtyh]j )}(hj h]hdrm_gem_fb_create_with_dirty}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hM,ubj)}(h|(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj&!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj7!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9!modnameN classnameNj j )}j ]j c.drm_gem_fb_create_with_dirtyasbuh1hhj!ubj )}(h h]h }(hjU!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(hjOh]h*}(hjc!hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!ubj )}(hdevh]hdev}(hjp!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j c.drm_gem_fb_create_with_dirtyasbuh1hhj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(hjOh]h*}(hj!hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!ubj )}(hfileh]hfile}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubj)}(h"const struct drm_format_info *infoh](j )}(hjAh]hconst}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj!"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hj2"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4"modnameN classnameNj j )}j ]j c.drm_gem_fb_create_with_dirtyasbuh1hhj!ubj )}(h h]h }(hjP"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(hjOh]h*}(hj^"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!ubj )}(hinfoh]hinfo}(hjk"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjAh]hconst}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]j c.drm_gem_fb_create_with_dirtyasbuh1hhj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubj )}(hmode_cmdh]hmode_cmd}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hM,ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hM,ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hM,hj hhubj )}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hj #hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jf )}(hj*#h]hdrm_mode_config_funcs.fb_create}(hj,#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj(#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j c.drm_gem_fb_create_with_dirtyasbj drm_mode_config_funcsuh1hhjj hK,hj #ubh callback}(hj #hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM,hj#hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hM,ubeh}(h]h ](j functioneh"]h$]h&]j j j j`#j j`#j j j uh1jv hhhjhNhNubj )}(hXU**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request **Description** This function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. drm_atomic_helper_dirtyfb() is used for the dirty callback giving framebuffer flushing through the atomic machinery. Use drm_gem_fb_create() if you don't need the dirty callback. The function does buffer size validation. Drivers should also call drm_plane_enable_fb_damage_clips() on all planes to enable userspace to use damage clips also with the ATOMIC IOCTL. Drivers can use this as their :c:type:`drm_mode_config_funcs.fb_create ` callback. The ADDFB2 IOCTL calls into this callback. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j )}(hjj#h]h Parameters}(hjl#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjh#ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM0hjd#ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj#h]hstruct drm_device *dev}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM.hj#ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hM.hj#ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj#hM.hj#ubjZ )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j` )}(h``struct drm_file *file``h]jf )}(hj#h]hstruct drm_file *file}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM/hj#ubj| )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hM/hj#ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj#hM/hj#ubjZ )}(h@``const struct drm_format_info *info`` pixel format information h](j` )}(h&``const struct drm_format_info *info``h]jf )}(hj#h]h"const struct drm_format_info *info}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM0hj#ubj| )}(hhh]h)}(hpixel format informationh]hpixel format information}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hM0hj$ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj$hM0hj#ubjZ )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j` )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jf )}(hj4$h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj6$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2$ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM1hj.$ubj| )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hjM$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI$hM1hjJ$ubah}(h]h ]h"]h$]h&]uh1j{ hj.$ubeh}(h]h ]h"]h$]h&]uh1jY hjI$hM1hj#ubeh}(h]h ]h"]h$]h&]uh1jT hjd#ubh)}(h**Description**h]j )}(hjo$h]h Description}(hjq$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjm$ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM3hjd#ubh)}(hXThis function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. drm_atomic_helper_dirtyfb() is used for the dirty callback giving framebuffer flushing through the atomic machinery. Use drm_gem_fb_create() if you don't need the dirty callback. The function does buffer size validation.h](h` callback. The ADDFB2 IOCTL calls into this callback.h](hDrivers can use this as their }(hj$hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jf )}(hj$h]hdrm_mode_config_funcs.fb_create}(hj$hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM<hj$ubh5 callback. The ADDFB2 IOCTL calls into this callback.}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj$hM<hjd#ubh)}(h **Return**h]j )}(hj$h]hReturn}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM?hjd#ubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hj%hhhNhNubh)}(h:c:type:`drm_framebuffer`h]jf )}(hj%h]hdrm_framebuffer}(hj%hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM@hj%ubh+ on success or an error pointer on failure.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7%hM@hjd#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_gem_fb_vmap (C function)c.drm_gem_fb_vmaphNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h_int drm_gem_fb_vmap (struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h]j )}(h^int drm_gem_fb_vmap(struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h](j)}(hinth]hint}(hjb%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^%hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNubj )}(h h]h }(hjq%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^%hhhjp%hMNubj )}(hdrm_gem_fb_vmaph]j )}(hdrm_gem_fb_vmaph]hdrm_gem_fb_vmap}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^%hhhjp%hMNubj)}(hK(struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%modnameN classnameNj j )}j ]j)}jj%sbc.drm_gem_fb_vmapasbuh1hhj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hfbh]hfb}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubj)}(hstruct iosys_map *maph](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj &ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj &ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj/&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1&modnameN classnameNj j )}j ]j%c.drm_gem_fb_vmapasbuh1hhj &ubj )}(h h]h }(hjM&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj &ubj)}(hjOh]h*}(hj[&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj &ubj )}(hmaph]hmap}(hjh&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj &ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubj)}(hstruct iosys_map *datah](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}&ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j%c.drm_gem_fb_vmapasbuh1hhj}&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}&ubj)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj}&ubj )}(hdatah]hdata}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubeh}(h]h ]h"]h$]h&]j j uh1jhj^%hhhjp%hMNubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZ%hhhjp%hMNubah}(h]jU%ah ](j j eh"]h$]h&]j j )j huh1j{ hjp%hMNhjW%hhubj )}(hhh]h)}(h2maps all framebuffer BOs into kernel address spaceh]h2maps all framebuffer BOs into kernel address space}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNhj&hhubah}(h]h ]h"]h$]h&]uh1j hjW%hhhjp%hMNubeh}(h]h ](j functioneh"]h$]h&]j j j j'j j'j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``struct iosys_map *map`` returns the mapping's address for each BO ``struct iosys_map *data`` returns the data address for each BO, can be NULL **Description** This function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically. Callers that want to access a BO's stored data should pass **data**. The argument returns the addresses of the data stored in each BO. This is different from **map** if the framebuffer's offsets field is non-zero. Both, **map** and **data**, must each refer to arrays with at least fb->format->num_planes elements. See drm_gem_fb_vunmap() for unmapping. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hj$'h]h Parameters}(hj&'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"'ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMRhj'ubjU )}(hhh](jZ )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjC'h]hstruct drm_framebuffer *fb}(hjE'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjA'ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMOhj='ubj| )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj\'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjX'hMOhjY'ubah}(h]h ]h"]h$]h&]uh1j{ hj='ubeh}(h]h ]h"]h$]h&]uh1jY hjX'hMOhj:'ubjZ )}(hD``struct iosys_map *map`` returns the mapping's address for each BO h](j` )}(h``struct iosys_map *map``h]jf )}(hj|'h]hstruct iosys_map *map}(hj~'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjz'ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMPhjv'ubj| )}(hhh]h)}(h)returns the mapping's address for each BOh]h+returns the mapping’s address for each BO}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMPhj'ubah}(h]h ]h"]h$]h&]uh1j{ hjv'ubeh}(h]h ]h"]h$]h&]uh1jY hj'hMPhj:'ubjZ )}(hM``struct iosys_map *data`` returns the data address for each BO, can be NULL h](j` )}(h``struct iosys_map *data``h]jf )}(hj'h]hstruct iosys_map *data}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMQhj'ubj| )}(hhh]h)}(h1returns the data address for each BO, can be NULLh]h1returns the data address for each BO, can be NULL}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMQhj'ubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hj'hMQhj:'ubeh}(h]h ]h"]h$]h&]uh1jT hj'ubh)}(h**Description**h]j )}(hj'h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMShj'ubh)}(hThis function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically.h]hThis function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMRhj'ubh)}(hCallers that want to access a BO's stored data should pass **data**. The argument returns the addresses of the data stored in each BO. This is different from **map** if the framebuffer's offsets field is non-zero.h](h=Callers that want to access a BO’s stored data should pass }(hj(hhhNhNubj )}(h**data**h]hdata}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubh[. The argument returns the addresses of the data stored in each BO. This is different from }(hj(hhhNhNubj )}(h**map**h]hmap}(hj/(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubh2 if the framebuffer’s offsets field is non-zero.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMWhj'ubh)}(hdBoth, **map** and **data**, must each refer to arrays with at least fb->format->num_planes elements.h](hBoth, }(hjH(hhhNhNubj )}(h**map**h]hmap}(hjP(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjH(ubh and }(hjH(hhhNhNubj )}(h**data**h]hdata}(hjb(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjH(ubhJ, must each refer to arrays with at least fb->format->num_planes elements.}(hjH(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM[hj'ubh)}(h&See drm_gem_fb_vunmap() for unmapping.h]h&See drm_gem_fb_vunmap() for unmapping.}(hj{(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM^hj'ubh)}(h **Return**h]j )}(hj(h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM`hj'ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMahj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_gem_fb_vunmap (C function)c.drm_gem_fb_vunmaphNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hJvoid drm_gem_fb_vunmap (struct drm_framebuffer *fb, struct iosys_map *map)h]j )}(hIvoid drm_gem_fb_vunmap(struct drm_framebuffer *fb, struct iosys_map *map)h](j)}(hvoidh]hvoid}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj(hMubj )}(hdrm_gem_fb_vunmaph]j )}(hdrm_gem_fb_vunmaph]hdrm_gem_fb_vunmap}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj(hMubj)}(h3(struct drm_framebuffer *fb, struct iosys_map *map)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj )ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj )ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj,)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj))ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.)modnameN classnameNj j )}j ]j)}jj(sbc.drm_gem_fb_vunmapasbuh1hhj )ubj )}(h h]h }(hjL)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj )ubj)}(hjOh]h*}(hjZ)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj )ubj )}(hfbh]hfb}(hjg)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj )ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)ubj)}(hstruct iosys_map *maph](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|)ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]jH)c.drm_gem_fb_vunmapasbuh1hhj|)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|)ubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj|)ubj )}(hmaph]hmap}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)ubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhj(hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj(hMubah}(h]j(ah ](j j eh"]h$]h&]j j )j huh1j{ hj(hMhj(hhubj )}(hhh]h)}(h0unmaps framebuffer BOs from kernel address spaceh]h0unmaps framebuffer BOs from kernel address space}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj)hhubah}(h]h ]h"]h$]h&]uh1j hj(hhhj(hMubeh}(h]h ](j functioneh"]h$]h&]j j j j*j j*j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``struct iosys_map *map`` mapping addresses as returned by drm_gem_fb_vmap() **Description** This function unmaps all buffer objects of the given framebuffer. See drm_gem_fb_vmap() for more information.h](h)}(h**Parameters**h]j )}(hj#*h]h Parameters}(hj%*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!*ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj*ubjU )}(hhh](jZ )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjB*h]hstruct drm_framebuffer *fb}(hjD*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@*ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj<*ubj| )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj[*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjW*hMhjX*ubah}(h]h ]h"]h$]h&]uh1j{ hj<*ubeh}(h]h ]h"]h$]h&]uh1jY hjW*hMhj9*ubjZ )}(hM``struct iosys_map *map`` mapping addresses as returned by drm_gem_fb_vmap() h](j` )}(h``struct iosys_map *map``h]jf )}(hj{*h]hstruct iosys_map *map}(hj}*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjy*ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhju*ubj| )}(hhh]h)}(h2mapping addresses as returned by drm_gem_fb_vmap()h]h2mapping addresses as returned by drm_gem_fb_vmap()}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1j{ hju*ubeh}(h]h ]h"]h$]h&]uh1jY hj*hMhj9*ubeh}(h]h ]h"]h$]h&]uh1jT hj*ubh)}(h**Description**h]j )}(hj*h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj*ubh)}(hAThis function unmaps all buffer objects of the given framebuffer.h]hAThis function unmaps all buffer objects of the given framebuffer.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj*ubh)}(h+See drm_gem_fb_vmap() for more information.h]h+See drm_gem_fb_vmap() for more information.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_gem_fb_begin_cpu_access (C function)c.drm_gem_fb_begin_cpu_accesshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hYint drm_gem_fb_begin_cpu_access (struct drm_framebuffer *fb, enum dma_data_direction dir)h]j )}(hXint drm_gem_fb_begin_cpu_access(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hinth]hint}(hj +hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+hhhj+hMubj )}(hdrm_gem_fb_begin_cpu_accessh]j )}(hdrm_gem_fb_begin_cpu_accessh]hdrm_gem_fb_begin_cpu_access}(hj++hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj+hhhj+hMubj)}(h9(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjG+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC+ubj )}(h h]h }(hjT+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC+ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hje+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjb+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjg+modnameN classnameNj j )}j ]j)}jj-+sbc.drm_gem_fb_begin_cpu_accessasbuh1hhjC+ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC+ubj)}(hjOh]h*}(hj+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjC+ubj )}(hfbh]hfb}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?+ubj)}(henum dma_data_direction dirh](j )}(henumh]henum}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubh)}(hhh]j )}(hdma_data_directionh]hdma_data_direction}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j+c.drm_gem_fb_begin_cpu_accessasbuh1hhj+ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(hdirh]hdir}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?+ubeh}(h]h ]h"]h$]h&]j j uh1jhj+hhhj+hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+hhhj+hMubah}(h]j*ah ](j j eh"]h$]h&]j j )j huh1j{ hj+hMhj*hhubj )}(hhh]h)}(h*prepares GEM buffer objects for CPU accessh]h*prepares GEM buffer objects for CPU access}(hj.,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj+,hhubah}(h]h ]h"]h$]h&]uh1j hj*hhhj+hMubeh}(h]h ](j functioneh"]h$]h&]j j j jF,j jF,j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``enum dma_data_direction dir`` access mode **Description** Prepares a framebuffer's GEM buffer objects for CPU access. This function must be called before accessing the BO data within the kernel. For imported BOs, the function calls dma_buf_begin_cpu_access(). See drm_gem_fb_end_cpu_access() for signalling the end of CPU access. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hjP,h]h Parameters}(hjR,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjN,ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjJ,ubjU )}(hhh](jZ )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjo,h]hstruct drm_framebuffer *fb}(hjq,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjm,ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhji,ubj| )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1j{ hji,ubeh}(h]h ]h"]h$]h&]uh1jY hj,hMhjf,ubjZ )}(h,``enum dma_data_direction dir`` access mode h](j` )}(h``enum dma_data_direction dir``h]jf )}(hj,h]henum dma_data_direction dir}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj,ubj| )}(hhh]h)}(h access modeh]h access mode}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1j{ hj,ubeh}(h]h ]h"]h$]h&]uh1jY hj,hMhjf,ubeh}(h]h ]h"]h$]h&]uh1jT hjJ,ubh)}(h**Description**h]j )}(hj,h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjJ,ubh)}(hPrepares a framebuffer's GEM buffer objects for CPU access. This function must be called before accessing the BO data within the kernel. For imported BOs, the function calls dma_buf_begin_cpu_access().h]hPrepares a framebuffer’s GEM buffer objects for CPU access. This function must be called before accessing the BO data within the kernel. For imported BOs, the function calls dma_buf_begin_cpu_access().}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjJ,ubh)}(hESee drm_gem_fb_end_cpu_access() for signalling the end of CPU access.h]hESee drm_gem_fb_end_cpu_access() for signalling the end of CPU access.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjJ,ubh)}(h **Return**h]j )}(hj-h]hReturn}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjJ,ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj/-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjJ,ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_gem_fb_end_cpu_access (C function)c.drm_gem_fb_end_cpu_accesshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hXvoid drm_gem_fb_end_cpu_access (struct drm_framebuffer *fb, enum dma_data_direction dir)h]j )}(hWvoid drm_gem_fb_end_cpu_access(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hvoidh]hvoid}(hj^-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ-hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hjm-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ-hhhjl-hMubj )}(hdrm_gem_fb_end_cpu_accessh]j )}(hdrm_gem_fb_end_cpu_accessh]hdrm_gem_fb_end_cpu_access}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{-ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZ-hhhjl-hMubj)}(h9(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]j)}jj-sbc.drm_gem_fb_end_cpu_accessasbuh1hhj-ubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj-ubj )}(hfbh]hfb}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubj)}(henum dma_data_direction dirh](j )}(hj+h]henum}(hj .hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj .ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj .ubh)}(hhh]j )}(hdma_data_directionh]hdma_data_direction}(hj+.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-.modnameN classnameNj j )}j ]j-c.drm_gem_fb_end_cpu_accessasbuh1hhj .ubj )}(h h]h }(hjI.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj .ubj )}(hdirh]hdir}(hjW.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj .ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubeh}(h]h ]h"]h$]h&]j j uh1jhjZ-hhhjl-hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjV-hhhjl-hMubah}(h]jQ-ah ](j j eh"]h$]h&]j j )j huh1j{ hjl-hMhjS-hhubj )}(hhh]h)}(h/signals end of CPU access to GEM buffer objectsh]h/signals end of CPU access to GEM buffer objects}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj~.hhubah}(h]h ]h"]h$]h&]uh1j hjS-hhhjl-hMubeh}(h]h ](j functioneh"]h$]h&]j j j j.j j.j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``enum dma_data_direction dir`` access mode **Description** Signals the end of CPU access to the given framebuffer's GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access(). See also drm_gem_fb_begin_cpu_access().h](h)}(h**Parameters**h]j )}(hj.h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj.ubjU )}(hhh](jZ )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hj.h]hstruct drm_framebuffer *fb}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj.ubj| )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hj.hMhj.ubjZ )}(h,``enum dma_data_direction dir`` access mode h](j` )}(h``enum dma_data_direction dir``h]jf )}(hj.h]henum dma_data_direction dir}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj.ubj| )}(hhh]h)}(h access modeh]h access mode}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hj/hMhj.ubeh}(h]h ]h"]h$]h&]uh1jT hj.ubh)}(h**Description**h]j )}(hj6/h]h Description}(hj8/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4/ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj.ubh)}(hSignals the end of CPU access to the given framebuffer's GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access().h]hSignals the end of CPU access to the given framebuffer’s GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access().}(hjL/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj.ubh)}(h'See also drm_gem_fb_begin_cpu_access().h]h'See also drm_gem_fb_begin_cpu_access().}(hj[/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj.ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_gem_fb_afbc_init (C function)c.drm_gem_fb_afbc_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hint drm_gem_fb_afbc_init (struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h]j )}(hint drm_gem_fb_afbc_init(struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h](j)}(hinth]hint}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMEubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhj/hMEubj )}(hdrm_gem_fb_afbc_inith]j )}(hdrm_gem_fb_afbc_inith]hdrm_gem_fb_afbc_init}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/hhhj/hMEubj)}(h(struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]j)}jj/sbc.drm_gem_fb_afbc_initasbuh1hhj/ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/ubj )}(hdevh]hdev}(hj 0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubj)}(h"const struct drm_format_info *infoh](j )}(hjAh]hconst}(hj90hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj50ubj )}(h h]h }(hjF0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj50ubj )}(hj h]hstruct}(hjT0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj50ubj )}(h h]h }(hja0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj50ubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjr0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjo0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjt0modnameN classnameNj j )}j ]j0c.drm_gem_fb_afbc_initasbuh1hhj50ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj50ubj)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj50ubj )}(hinfoh]hinfo}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj50ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjAh]hconst}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(hj h]hstruct}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]j0c.drm_gem_fb_afbc_initasbuh1hhj0ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hjOh]h*}(hj)1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj0ubj )}(hmode_cmdh]hmode_cmd}(hj61hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubj)}(h$struct drm_afbc_framebuffer *afbc_fbh](j )}(hj h]hstruct}(hjO1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK1ubj )}(h h]h }(hj\1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK1ubh)}(hhh]j )}(hdrm_afbc_framebufferh]hdrm_afbc_framebuffer}(hjm1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjo1modnameN classnameNj j )}j ]j0c.drm_gem_fb_afbc_initasbuh1hhjK1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK1ubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjK1ubj )}(hafbc_fbh]hafbc_fb}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubeh}(h]h ]h"]h$]h&]j j uh1jhj/hhhj/hMEubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj/hhhj/hMEubah}(h]j}/ah ](j j eh"]h$]h&]j j )j huh1j{ hj/hMEhj/hhubj )}(hhh]h)}(huHelper function for drivers using afbc to fill and validate all the afbc-specific struct drm_afbc_framebuffer membersh]huHelper function for drivers using afbc to fill and validate all the afbc-specific struct drm_afbc_framebuffer members}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMEhj1hhubah}(h]h ]h"]h$]h&]uh1j hj/hhhj/hMEubeh}(h]h ](j functioneh"]h$]h&]j j j j1j j1j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``struct drm_afbc_framebuffer *afbc_fb`` afbc framebuffer **Description** This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller's responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful. **Return** Zero on success or a negative error value on failure.h](h)}(h**Parameters**h]j )}(hj1h]h Parameters}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMIhj1ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj2h]hstruct drm_device *dev}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMIhj 2ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj*2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&2hMIhj'2ubah}(h]h ]h"]h$]h&]uh1j{ hj 2ubeh}(h]h ]h"]h$]h&]uh1jY hj&2hMIhj2ubjZ )}(h@``const struct drm_format_info *info`` pixel format information h](j` )}(h&``const struct drm_format_info *info``h]jf )}(hjJ2h]h"const struct drm_format_info *info}(hjL2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjH2ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMKhjD2ubj| )}(hhh]h)}(hpixel format informationh]hpixel format information}(hjc2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_2hMKhj`2ubah}(h]h ]h"]h$]h&]uh1j{ hjD2ubeh}(h]h ]h"]h$]h&]uh1jY hj_2hMKhj2ubjZ )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j` )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jf )}(hj2h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMLhj}2ubj| )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMLhj2ubah}(h]h ]h"]h$]h&]uh1j{ hj}2ubeh}(h]h ]h"]h$]h&]uh1jY hj2hMLhj2ubjZ )}(h:``struct drm_afbc_framebuffer *afbc_fb`` afbc framebuffer h](j` )}(h(``struct drm_afbc_framebuffer *afbc_fb``h]jf )}(hj2h]h$struct drm_afbc_framebuffer *afbc_fb}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMMhj2ubj| )}(hhh]h)}(hafbc framebufferh]hafbc framebuffer}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hj2hMMhj2ubeh}(h]h ]h"]h$]h&]uh1jT hj1ubh)}(h**Description**h]j )}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMOhj1ubh)}(hX1This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller's responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful.h]hX3This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller’s responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful.}(hj 3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNhj1ubh)}(h **Return**h]j )}(hj3h]hReturn}(hj 3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMThj1ubh)}(h5Zero on success or a negative error value on failure.h]h5Zero on success or a negative error value on failure.}(hj43hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMUhj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubj^B)}(h.. _drm_bridges:h]h}(h]h ]h"]h$]h&]hʌ drm-bridgesuh1j]BhKhjhhhhubeh}(h]j=ah ]h"] framebuffer gem helper referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hBridgesh]hBridges}(hj_3hhhNhNubah}(h]h ]h"]h$]h&]hjYuh1hhj\3hhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hjp3hhhNhNubah}(h]h ]h"]h$]h&]hjxuh1hhjm3hhhhhKubh)}(h:c:type:`struct drm_bridge ` represents a device that hangs on to an encoder. These are handy when a regular :c:type:`drm_encoder` entity isn't enough to represent the entire encoder chain.h](h)}(h(:c:type:`struct drm_bridge `h]jf )}(hj3h]hstruct drm_bridge}(hj3hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK,hj~3ubhQ represents a device that hangs on to an encoder. These are handy when a regular }(hj~3hhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hj3h]h drm_encoder}(hj3hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hhj3hK,hj~3ubh= entity isn’t enough to represent the entire encoder chain.}(hj~3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj3hK,hjm3hhubh)}(hA bridge is always attached to a single :c:type:`drm_encoder` at a time, but can be either connected to it directly, or through a chain of bridges::h](h(A bridge is always attached to a single }(hj3hhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hj3h]h drm_encoder}(hj3hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK0hj3ubhV at a time, but can be either connected to it directly, or through a chain of bridges:}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj3hK0hjm3hhubj, )}(h1[ CRTC ---> ] Encoder ---> Bridge A ---> Bridge Bh]h1[ CRTC ---> ] Encoder ---> Bridge A ---> Bridge B}hj4sbah}(h]h ]h"]h$]h&]j j uh1j+ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK3hjm3hhubh)}(hXHere, the output of the encoder feeds to bridge A, and that furthers feeds to bridge B. Bridge chains can be arbitrarily long, and shall be fully linear: Chaining multiple bridges to the output of a bridge, or the same bridge to the output of different bridges, is not supported.h]hXHere, the output of the encoder feeds to bridge A, and that furthers feeds to bridge B. Bridge chains can be arbitrarily long, and shall be fully linear: Chaining multiple bridges to the output of a bridge, or the same bridge to the output of different bridges, is not supported.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK5hjm3hhubh)}(hX :c:type:`drm_bridge`, like :c:type:`drm_panel`, aren't :c:type:`drm_mode_object` entities like planes, CRTCs, encoders or connectors and hence are not visible to userspace. They just provide additional hooks to get the desired output at the end of the encoder chain.h](h)}(h:c:type:`drm_bridge`h]jf )}(hj%4h]h drm_bridge}(hj'4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj#4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK:hj4ubh, like }(hj4hhhNhNubh)}(h:c:type:`drm_panel`h]jf )}(hjI4h]h drm_panel}(hjK4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjG4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_paneluh1hhjB4hK:hj4ubh , aren’t }(hj4hhhNhNubh)}(h:c:type:`drm_mode_object`h]jf )}(hjl4h]hdrm_mode_object}(hjn4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjj4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_objectuh1hhjB4hK:hj4ubh entities like planes, CRTCs, encoders or connectors and hence are not visible to userspace. They just provide additional hooks to get the desired output at the end of the encoder chain.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjB4hK:hjm3hhubeh}(h]j~ah ]h"]h$]j`Cah&]uh1hhj\3hhhhhKjbCKubh)}(hhh](h)}(hDisplay Driver Integrationh]hDisplay Driver Integration}(hj4hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj4hhhhhKubh)}(hXDisplay drivers are responsible for linking encoders with the first bridge in the chains. This is done by acquiring the appropriate bridge with devm_drm_of_get_bridge(). Once acquired, the bridge shall be attached to the encoder with a call to drm_bridge_attach().h]hXDisplay drivers are responsible for linking encoders with the first bridge in the chains. This is done by acquiring the appropriate bridge with devm_drm_of_get_bridge(). Once acquired, the bridge shall be attached to the encoder with a call to drm_bridge_attach().}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKChj4hhubh)}(hBridges are responsible for linking themselves with the next bridge in the chain, if any. This is done the same way as for encoders, with the call to drm_bridge_attach() occurring in the :c:type:`drm_bridge_funcs.attach ` operation.h](hBridges are responsible for linking themselves with the next bridge in the chain, if any. This is done the same way as for encoders, with the call to drm_bridge_attach() occurring in the }(hj4hhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]jf )}(hj4h]hdrm_bridge_funcs.attach}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKHhj4ubh operation.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hKHhj4hhubh)}(hX>Once these links are created, the bridges can participate along with encoder functions to perform mode validation and fixup (through drm_bridge_chain_mode_valid() and drm_atomic_bridge_chain_check()), mode setting (through drm_bridge_chain_mode_set()), enable (through drm_atomic_bridge_chain_pre_enable() and drm_atomic_bridge_chain_enable()) and disable (through drm_atomic_bridge_chain_disable() and drm_atomic_bridge_chain_post_disable()). Those functions call the corresponding operations provided in :c:type:`drm_bridge_funcs` in sequence for all bridges in the chain.h](hXOnce these links are created, the bridges can participate along with encoder functions to perform mode validation and fixup (through drm_bridge_chain_mode_valid() and drm_atomic_bridge_chain_check()), mode setting (through drm_bridge_chain_mode_set()), enable (through drm_atomic_bridge_chain_pre_enable() and drm_atomic_bridge_chain_enable()) and disable (through drm_atomic_bridge_chain_disable() and drm_atomic_bridge_chain_post_disable()). Those functions call the corresponding operations provided in }(hj4hhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jf )}(hj4h]hdrm_bridge_funcs}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKLhj4ubh* in sequence for all bridges in the chain.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj5hKLhj4hhubh)}(hXFor display drivers that use the atomic helpers drm_atomic_helper_check_modeset(), drm_atomic_helper_commit_modeset_enables() and drm_atomic_helper_commit_modeset_disables() (either directly in hand-rolled commit check and commit tail handlers, or through the higher-level drm_atomic_helper_check() and drm_atomic_helper_commit_tail() or drm_atomic_helper_commit_tail_rpm() helpers), this is done transparently and requires no intervention from the driver. For other drivers, the relevant DRM bridge chain functions shall be called manually.h]hXFor display drivers that use the atomic helpers drm_atomic_helper_check_modeset(), drm_atomic_helper_commit_modeset_enables() and drm_atomic_helper_commit_modeset_disables() (either directly in hand-rolled commit check and commit tail handlers, or through the higher-level drm_atomic_helper_check() and drm_atomic_helper_commit_tail() or drm_atomic_helper_commit_tail_rpm() helpers), this is done transparently and requires no intervention from the driver. For other drivers, the relevant DRM bridge chain functions shall be called manually.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKVhj4hhubh)}(hXlBridges also participate in implementing the :c:type:`drm_connector` at the end of the bridge chain. Display drivers may use the drm_bridge_connector_init() helper to create the :c:type:`drm_connector`, or implement it manually on top of the connector-related operations exposed by the bridge (see the overview documentation of bridge operations for more details).h](h-Bridges also participate in implementing the }(hj,5hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj65h]h drm_connector}(hj85hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj45ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chK`hj,5ubhn at the end of the bridge chain. Display drivers may use the drm_bridge_connector_init() helper to create the }(hj,5hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjZ5h]h drm_connector}(hj\5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjX5ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjS5hK`hj,5ubh, or implement it manually on top of the connector-related operations exposed by the bridge (see the overview documentation of bridge operations for more details).}(hj,5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjS5hK`hj4hhubeh}(h]jah ]h"]display driver integrationah$]h&]uh1hhj\3hhhhhKubh)}(hhh](h)}(h"Special Care with MIPI-DSI bridgesh]h"Special Care with MIPI-DSI bridges}(hj5hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj5hhhhhKubh)}(hThe interaction between the bridges and other frameworks involved in the probing of the upstream driver and the bridge driver can be challenging. Indeed, there's multiple cases that needs to be considered:h]hThe interaction between the bridges and other frameworks involved in the probing of the upstream driver and the bridge driver can be challenging. Indeed, there’s multiple cases that needs to be considered:}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKjhj5hhubh)}(hhh](h)}(hXThe upstream driver doesn't use the component framework and isn't a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn't probed. h]h)}(hXThe upstream driver doesn't use the component framework and isn't a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn't probed.h]hX The upstream driver doesn’t use the component framework and isn’t a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn’t probed.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKohj5ubah}(h]h ]h"]h$]h&]uh1hhj5ubh)}(hXThe upstream driver doesn't use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it's assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the :c:type:`mipi_dsi_host_ops.attach ` and :c:type:`mipi_dsi_host_ops.detach ` operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its :c:type:`mipi_dsi_host_ops.attach ` hook. h]h)}(hXThe upstream driver doesn't use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it's assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the :c:type:`mipi_dsi_host_ops.attach ` and :c:type:`mipi_dsi_host_ops.detach ` operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its :c:type:`mipi_dsi_host_ops.attach ` hook.h](hXThe upstream driver doesn’t use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it’s assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the }(hj5hhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.attach `h]jf )}(hj5h]hmipi_dsi_host_ops.attach}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKthj5ubh and }(hj5hhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.detach `h]jf )}(hj5h]hmipi_dsi_host_ops.detach}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hhj5hKthj5ubh| operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its }(hj5hhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.attach `h]jf )}(hj6h]hmipi_dsi_host_ops.attach}(hj6hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hhj5hKthj5ubh hook.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj5hKthj5ubah}(h]h ]h"]h$]h&]uh1hhj5ubh)}(hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks. h]h)}(hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks.h]hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks.}(hjJ6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjF6ubah}(h]h ]h"]h$]h&]uh1hhj5ubh)}(hXXThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there's no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe. h]h)}(hXWThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there's no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe.h]hXYThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there’s no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe.}(hjc6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhj_6ubah}(h]h ]h"]h$]h&]uh1hhj5ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj5hKohj5hhubh)}(hThe ideal pattern to cover the last item (and all the others in the MIPI-DSI host driver case) is to split the operations like this:h]hThe ideal pattern to cover the last item (and all the others in the MIPI-DSI host driver case) is to split the operations like this:}(hj~6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhj5hhubh)}(hhh](h)}(hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver's bind can be called. h]h)}(hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver's bind can be called.h]hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver’s bind can be called.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhj6ubah}(h]h ]h"]h$]h&]uh1hhj6ubh)}(hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional. h]h)}(hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional.h]hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhj6ubah}(h]h ]h"]h$]h&]uh1hhj6ubh)}(hIn its :c:type:`struct mipi_dsi_host_ops `.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it. h]h)}(hIn its :c:type:`struct mipi_dsi_host_ops `.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it.h](hIn its }(hj6hhhNhNubh)}(h6:c:type:`struct mipi_dsi_host_ops `h]jf )}(hj6h]hstruct mipi_dsi_host_ops}(hj6hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhj6ubh.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj6hKhj6ubah}(h]h ]h"]h$]h&]uh1hhj6ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj6hKhj5hhubh)}(hAt this point, we're now certain that both the upstream driver and the bridge driver are functional and we can't have a deadlock-like situation when probing.h]hAt this point, we’re now certain that both the upstream driver and the bridge driver are functional and we can’t have a deadlock-like situation when probing.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhj5hhubeh}(h]jah ]h"]"special care with mipi-dsi bridgesah$]h&]uh1hhj\3hhhhhKubh)}(hhh](h)}(hBridge Operationsh]hBridge Operations}(hj7hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj7hhhhhKubh)}(hX&Bridge drivers expose operations through the :c:type:`drm_bridge_funcs` structure. The DRM internals (atomic and CRTC helpers) use the helpers defined in drm_bridge.c to call bridge operations. Those operations are divided in three big categories to support different parts of the bridge usage.h](h-Bridge drivers expose operations through the }(hj+7hhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jf )}(hj57h]hdrm_bridge_funcs}(hj77hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj37ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chM}hj+7ubh structure. The DRM internals (atomic and CRTC helpers) use the helpers defined in drm_bridge.c to call bridge operations. Those operations are divided in three big categories to support different parts of the bridge usage.}(hj+7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjR7hM}hj7hhubh)}(hhh](h)}(hXJThe encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the :c:type:`drm_encoder_helper_funcs` operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically. The enable and disable operations are split in :c:type:`drm_bridge_funcs.pre_enable `, :c:type:`drm_bridge_funcs.enable `, :c:type:`drm_bridge_funcs.disable ` and :c:type:`drm_bridge_funcs.post_disable ` to provide finer-grained control. Bridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic\_), in which case they shall also implement the atomic state bookkeeping operations (:c:type:`drm_bridge_funcs.atomic_duplicate_state `, :c:type:`drm_bridge_funcs.atomic_destroy_state ` and :c:type:`drm_bridge_funcs.reset `). Mixing atomic and non-atomic versions of the operations is not supported. h](h)}(hX>The encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the :c:type:`drm_encoder_helper_funcs` operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically.h](hpThe encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the }(hjd7hhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]jf )}(hjn7h]hdrm_encoder_helper_funcs}(hjp7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjl7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjd7ubh operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically.}(hjd7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hMhj`7ubh)}(hX5The enable and disable operations are split in :c:type:`drm_bridge_funcs.pre_enable `, :c:type:`drm_bridge_funcs.enable `, :c:type:`drm_bridge_funcs.disable ` and :c:type:`drm_bridge_funcs.post_disable ` to provide finer-grained control.h](h/The enable and disable operations are split in }(hj7hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.pre_enable `h]jf )}(hj7h]hdrm_bridge_funcs.pre_enable}(hj7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj7ubh, }(hj7hhhNhNubh)}(h4:c:type:`drm_bridge_funcs.enable `h]jf )}(hj7h]hdrm_bridge_funcs.enable}(hj7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj7hMhj7ubh, }(hj7hhhNhNubh)}(h5:c:type:`drm_bridge_funcs.disable `h]jf )}(hj7h]hdrm_bridge_funcs.disable}(hj7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj7uba"h}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj7hMhj7ubh and }(hj7hhhNhNubh)}(h::c:type:`drm_bridge_funcs.post_disable `h]jf )}(hj 8h]hdrm_bridge_funcs.post_disable}(hj 8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj7hMhj7ubh" to provide finer-grained control.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hMhj`7ubh)}(hXBridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic\_), in which case they shall also implement the atomic state bookkeeping operations (:c:type:`drm_bridge_funcs.atomic_duplicate_state `, :c:type:`drm_bridge_funcs.atomic_destroy_state ` and :c:type:`drm_bridge_funcs.reset `). Mixing atomic and non-atomic versions of the operations is not supported.h](hBridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic_), in which case they shall also implement the atomic state bookkeeping operations (}(hj18hhhNhNubh)}(hD:c:type:`drm_bridge_funcs.atomic_duplicate_state `h]jf )}(hj;8h]h'drm_bridge_funcs.atomic_duplicate_state}(hj=8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj98ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj18ubh, }(hj18hhhNhNubh)}(hB:c:type:`drm_bridge_funcs.atomic_destroy_state `h]jf )}(hj_8h]h%drm_bridge_funcs.atomic_destroy_state}(hja8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj]8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjX8hMhj18ubh and }(hj18hhhNhNubh)}(h3:c:type:`drm_bridge_funcs.reset `h]jf )}(hj8h]hdrm_bridge_funcs.reset}(hj8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjX8hMhj18ubhL). Mixing atomic and non-atomic versions of the operations is not supported.}(hj18hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjX8hMhj`7ubeh}(h]h ]h"]h$]h&]uh1hhj]7ubh)}(hXThe bus format negotiation operations :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` and :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers. h]h)}(hXThe bus format negotiation operations :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` and :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers.h](h&The bus format negotiation operations }(hj8hhhNhNubh)}(hH:c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts `h]jf )}(hj8h]h+drm_bridge_funcs.atomic_get_output_bus_fmts}(hj8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj8ubh and }(hj8hhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]jf )}(hj8h]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hj8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj8hMhj8ubhX allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1hhj]7ubh)}(hX The connector-related operations support implementing a :c:type:`drm_connector` based on a chain of bridges. DRM bridges traditionally create a :c:type:`drm_connector` for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the :c:type:`drm_connector` to be handled by a single bridge, which doesn't always match the hardware architecture. To simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of :c:type:`drm_connector` and instead expose :c:type:`drm_bridge_funcs` operations to support an externally-implemented :c:type:`drm_connector`. Those operations are :c:type:`drm_bridge_funcs.detect `, :c:type:`drm_bridge_funcs.get_modes `, :c:type:`drm_bridge_funcs.get_edid `, :c:type:`drm_bridge_funcs.hpd_notify `, :c:type:`drm_bridge_funcs.hpd_enable ` and :c:type:`drm_bridge_funcs.hpd_disable `. When implemented, display drivers shall create a :c:type:`drm_connector` instance for each chain of bridges, and implement those connector instances based on the bridge connector operations. Bridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the :c:type:`drm_bridge_funcs.get_edid ` shall be implemented. This however doesn't mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the :c:type:`drm_bridge.ops ` flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the :c:type:`drm_bridge.ops ` flags for all supported operations. A flag shall only be set if the corresponding :c:type:`drm_bridge_funcs` operation is implemented, but an implemented operation doesn't necessarily imply that the corresponding flag will be set. Display drivers shall use the :c:type:`drm_bridge.ops ` flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const :c:type:`drm_bridge_funcs` instance in bridge drivers, improving security by storing function pointers in read-only memory. In order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their :c:type:`drm_bridge_funcs.attach ` handler when the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model. h](h)}(hXThe connector-related operations support implementing a :c:type:`drm_connector` based on a chain of bridges. DRM bridges traditionally create a :c:type:`drm_connector` for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the :c:type:`drm_connector` to be handled by a single bridge, which doesn't always match the hardware architecture.h](h8The connector-related operations support implementing a }(hj9hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj9h]h drm_connector}(hj9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj9ubhA based on a chain of bridges. DRM bridges traditionally create a }(hj9hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj@9h]h drm_connector}(hjB9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj>9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj99hMhj9ubh for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the }(hj9hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjc9h]h drm_connector}(hje9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hja9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj99hMhj9ubhZ to be handled by a single bridge, which doesn’t always match the hardware architecture.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj99hMhj9ubh)}(hXJTo simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of :c:type:`drm_connector` and instead expose :c:type:`drm_bridge_funcs` operations to support an externally-implemented :c:type:`drm_connector`. Those operations are :c:type:`drm_bridge_funcs.detect `, :c:type:`drm_bridge_funcs.get_modes `, :c:type:`drm_bridge_funcs.get_edid `, :c:type:`drm_bridge_funcs.hpd_notify `, :c:type:`drm_bridge_funcs.hpd_enable ` and :c:type:`drm_bridge_funcs.hpd_disable `. When implemented, display drivers shall create a :c:type:`drm_connector` instance for each chain of bridges, and implement those connector instances based on the bridge connector operations.h](hTo simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of }(hj9hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj9h]h drm_connector}(hj9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj9ubh and instead expose }(hj9hhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jf )}(hj9h]hdrm_bridge_funcs}(hj9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj9hMhj9ubh1 operations to support an externally-implemented }(hj9hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj9h]h drm_connector}(hj9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj9hMhj9ubh. Those operations are }(hj9hhhNhNubh)}(h4:c:type:`drm_bridge_funcs.detect `h]jf )}(hj9h]hdrm_bridge_funcs.detect}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj9hMhj9ubh, }(hj9hhhNhNubh)}(h7:c:type:`drm_bridge_funcs.get_modes `h]jf )}(hj!:h]hdrm_bridge_funcs.get_modes}(hj#:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj9hMhj9ubh, }(hj9hhhNhNubh)}(h6:c:type:`drm_bridge_funcs.get_edid `h]jf )}(hjD:h]hdrm_bridge_funcs.get_edid}(hjF:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjB:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj9hMhj9ubh, }hj9sbh)}(h8:c:type:`drm_bridge_funcs.hpd_notify `h]jf )}(hjg:h]hdrm_bridge_funcs.hpd_notify}(hji:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hje:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj9hMhj9ubh, }hj9sbh)}(h8:c:type:`drm_bridge_funcs.hpd_enable `h]jf )}(hj:h]hdrm_bridge_funcs.hpd_enable}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj9hMhj9ubh and }(hj9hhhNhNubh)}(h9:c:type:`drm_bridge_funcs.hpd_disable `h]jf )}(hj:h]hdrm_bridge_funcs.hpd_disable}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj9hMhj9ubh3. When implemented, display drivers shall create a }(hj9hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj:h]h drm_connector}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj9hMhj9ubhv instance for each chain of bridges, and implement those connector instances based on the bridge connector operations.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubh)}(hXBridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the :c:type:`drm_bridge_funcs.get_edid ` shall be implemented. This however doesn't mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the :c:type:`drm_bridge.ops ` flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the :c:type:`drm_bridge.ops ` flags for all supported operations. A flag shall only be set if the corresponding :c:type:`drm_bridge_funcs` operation is implemented, but an implemented operation doesn't necessarily imply that the corresponding flag will be set. Display drivers shall use the :c:type:`drm_bridge.ops ` flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const :c:type:`drm_bridge_funcs` instance in bridge drivers, improving security by storing function pointers in read-only memory.h](hBridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the }(hj:hhhNhNubh)}(h6:c:type:`drm_bridge_funcs.get_edid `h]jf )}(hj;h]hdrm_bridge_funcs.get_edid}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj:ubhX shall be implemented. This however doesn’t mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the }(hj:hhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]jf )}(hj%;h]hdrm_bridge.ops}(hj';hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj#;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhj;hMhj:ubh flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the }(hj:hhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]jf )}(hjH;h]hdrm_bridge.ops}(hjJ;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjF;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhj;hMhj:ubhS flags for all supported operations. A flag shall only be set if the corresponding }(hj:hhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jf )}(hjk;h]hdrm_bridge_funcs}(hjm;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hji;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj;hMhj:ubh operation is implemented, but an implemented operation doesn’t necessarily imply that the corresponding flag will be set. Display drivers shall use the }(hj:hhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]jf )}(hj;h]hdrm_bridge.ops}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhj;hMhj:ubhz flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const }(hj:hhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jf )}(hj;h]hdrm_bridge_funcs}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj;hMhj:ubha instance in bridge drivers, improving security by storing function pointers in read-only memory.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hMhj9ubh)}(hXIn order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their :c:type:`drm_bridge_funcs.attach ` handler when the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model.h](hXoIn order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the }(hj;hhhNhNubjf )}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubhX  flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their }(hj;hhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]jf )}(hj;h]hdrm_bridge_funcs.attach}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj;ubh handler when the }(hj;hhhNhNubjf )}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubh flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hMhj9ubeh}(h]h ]h"]h$]h&]uh1hhj]7ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj7hMhj7hhubeh}(h]jah ]h"]bridge operationsah$]h&]uh1hhj\3hhhhhKubh)}(hhh](h)}(hBridge Connector Helperh]hBridge Connector Helper}(hjD<hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjA<hhhhhKubh)}(hXDThe DRM bridge connector helper object provides a DRM connector implementation that wraps a chain of :c:type:`struct drm_bridge `. The connector operations are fully implemented based on the operations of the bridges in the chain, and don't require any intervention from the display controller driver at runtime.h](heThe DRM bridge connector helper object provides a DRM connector implementation that wraps a chain of }(hjR<hhhNhNubh)}(h(:c:type:`struct drm_bridge `h]jf )}(hj\<h]hstruct drm_bridge}(hj^<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjZ<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/display/drm_bridge_connector.chKhjR<ubh. The connector operations are fully implemented based on the operations of the bridges in the chain, and don’t require any intervention from the display controller driver at runtime.}(hjR<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjy<hKhjA<hhubh)}(hXHTo use the helper, display controller drivers create a bridge connector with a call to drm_bridge_connector_init(). This associates the newly created connector with the chain of bridges passed to the function and registers it with the DRM device. At that point the connector becomes fully usable, no further operation is needed.h]hXHTo use the helper, display controller drivers create a bridge connector with a call to drm_bridge_connector_init(). This associates the newly created connector with the chain of bridges passed to the function and registers it with the DRM device. At that point the connector becomes fully usable, no further operation is needed.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/display/drm_bridge_connector.chK$hjA<hhubh)}(hXThe DRM bridge connector operations are implemented based on the operations provided by the bridges in the chain. Each connector operation is delegated to the bridge closest to the connector (at the end of the chain) that provides the relevant functionality.h]hXThe DRM bridge connector operations are implemented based on the operations provided by the bridges in the chain. Each connector operation is delegated to the bridge closest to the connector (at the end of the chain) that provides the relevant functionality.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/display/drm_bridge_connector.chK*hjA<hhubh)}(hX:To make use of this helper, all bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach flag (none of the bridges shall create a DRM connector directly).h](hZTo make use of this helper, all bridges in the chain shall report bridge operation flags (}(hj<hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj<h]hdrm_bridge->ops}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/display/drm_bridge_connector.chK/hj<ubh) and bridge output type (}(hj<hhhNhNubh)}(h':c:type:`drm_bridge->type `h]jf )}(hj<h]hdrm_bridge->type}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhj<hK/hj<ubhy), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach flag (none of the bridges shall create a DRM connector directly).}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hK/hjA<hhubeh}(h]jah ]h"]bridge connector helperah$]h&]uh1hhj\3hhhhhKubh)}(hhh](h)}(hBridge Helper Referenceh]hBridge Helper Reference}(hj=hhhNhNubah}(h]h ]h"]h$]h&]hj"uh1hhj<hhhhhKubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_attach_flags (C enum)c.drm_bridge_attach_flagshNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hdrm_bridge_attach_flagsh]j )}(henum drm_bridge_attach_flagsh](j )}(hj+h]henum}(hj(=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$=hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKubj )}(h h]h }(hj6=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$=hhhj5=hKubj )}(hdrm_bridge_attach_flagsh]j )}(hj"=h]hdrm_bridge_attach_flags}(hjH=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjD=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj$=hhhj5=hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj =hhhj5=hKubah}(h]j=ah ](j j eh"]h$]h&]j j )j huh1j{ hj5=hKhj=hhubj )}(hhh]h)}(h>Flags for :c:type:`drm_bridge_funcs.attach `h](h Flags for }(hjj=hhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]jf )}(hjt=h]hdrm_bridge_funcs.attach}(hjv=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjr=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j)}jj"=sbc.drm_bridge_attach_flagsasbj drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjj=ubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhK3hjg=hhubah}(h]h ]h"]h$]h&]uh1j hj=hhhj5=hKubeh}(h]h ](j enumeh"]h$]h&]j j j j=j j=j j j uh1jv hhhj<hNhNubj )}(hx**Constants** ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` When this flag is set the bridge shall not create a drm_connector.h](h)}(h **Constants**h]j )}(hj=h]h Constants}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhK7hj=ubjU )}(hhh]jZ )}(he``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` When this flag is set the bridge shall not create a drm_connector.h](j` )}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]jf )}(hj=h]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhK:hj=ubj| )}(hhh]h)}(hBWhen this flag is set the bridge shall not create a drm_connector.h]hBWhen this flag is set the bridge shall not create a drm_connector.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hK:hj=ubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hj=hK:hj=ubah}(h]h ]h"]h$]h&]uh1jT hj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_funcs (C struct)c.drm_bridge_funcshNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hdrm_bridge_funcsh]j )}(hstruct drm_bridge_funcsh](j )}(hj h]hstruct}(hj+>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'>hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhK@ubj )}(h h]h }(hj9>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'>hhhj8>hK@ubj )}(hdrm_bridge_funcsh]j )}(hj%>h]hdrm_bridge_funcs}(hjK>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'>hhhj8>hK@ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#>hhhj8>hK@ubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j{ hj8>hK@hj >hhubj )}(hhh]h)}(hdrm_bridge control functionsh]hdrm_bridge control functions}(hjm>hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhK>hjj>hhubah}(h]h ]h"]h$]h&]uh1j hj >hhhj8>hK@ubeh}(h]h ](j structeh"]h$]h&]j j j j>j j>j j j uh1jv hhhj<hNhNubj )}(hXG|**Definition**:: struct drm_bridge_funcs { int (*attach)(struct drm_bridge *bridge, struct drm_encoder *encoder, enum drm_bridge_attach_flags flags); void (*destroy)(struct drm_bridge *bridge); void (*detach)(struct drm_bridge *bridge); enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*disable)(struct drm_bridge *bridge); void (*post_disable)(struct drm_bridge *bridge); void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); void (*pre_enable)(struct drm_bridge *bridge); void (*enable)(struct drm_bridge *bridge); void (*atomic_pre_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); struct drm_bridge_state *(*atomic_duplicate_state)(struct drm_bridge *bridge); void (*atomic_destroy_state)(struct drm_bridge *bridge, struct drm_bridge_state *state); u32 *(*atomic_get_output_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts); u32 *(*atomic_get_input_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts); int (*atomic_check)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); struct drm_bridge_state *(*atomic_reset)(struct drm_bridge *bridge); enum drm_connector_status (*detect)(struct drm_bridge *bridge, struct drm_connector *connector); int (*get_modes)(struct drm_bridge *bridge, struct drm_connector *connector); const struct drm_edid *(*edid_read)(struct drm_bridge *bridge, struct drm_connector *connector); void (*hpd_notify)(struct drm_bridge *bridge, struct drm_connector *connector, enum drm_connector_status status); void (*hpd_enable)(struct drm_bridge *bridge); void (*hpd_disable)(struct drm_bridge *bridge); enum drm_mode_status (*hdmi_tmds_char_rate_valid)(const struct drm_bridge *bridge, const struct drm_display_mode *mode, unsigned long long tmds_rate); int (*hdmi_clear_avi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_avi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdmi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdmi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdr_drm_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdr_drm_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_spd_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_spd_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_audio_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_audio_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*hdmi_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); int (*hdmi_cec_init)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_cec_enable)(struct drm_bridge *bridge, bool enable); int (*hdmi_cec_log_addr)(struct drm_bridge *bridge, u8 logical_addr); int (*hdmi_cec_transmit)(struct drm_bridge *bridge, u8 attempts, u32 signal_free_time, struct cec_msg *msg); int (*dp_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*dp_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); void (*debugfs_init)(struct drm_bridge *bridge, struct dentry *root); }; **Members** ``attach`` This callback is invoked whenever our bridge is being attached to a :c:type:`drm_encoder`. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*). The **attach** callback is optional. RETURNS: Zero on success, error code on failure. ``destroy`` This callback is invoked when the bridge is about to be deallocated. The **destroy** callback is optional. ``detach`` This callback is invoked whenever our bridge is being detached from a :c:type:`drm_encoder`. The **detach** callback is optional. ``mode_valid`` This callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). The **mode_valid** callback is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration. The mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_disable `. ``post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **post_disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_post_disable `. ``mode_set`` This callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called. The adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges. For atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `. NOTE: This is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation. ``pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **pre_enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_pre_enable `. ``enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_enable `. ``atomic_pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **atomic_pre_enable** callback is optional. ``atomic_enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **atomic_enable** callback is optional. ``atomic_disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **atomic_disable** callback is optional. ``atomic_post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **atomic_post_disable** callback is optional. ``atomic_duplicate_state`` Duplicate the current bridge state object (which is guaranteed to be non-NULL). The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook. RETURNS: A valid drm_bridge_state object or NULL if the allocation fails. ``atomic_destroy_state`` Destroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `. The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook. ``atomic_get_output_bus_fmts`` Return the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). This method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise. ``atomic_get_input_bus_fmts`` Return the supported bus formats on the input end of a bridge for a specific output bus format. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0. This method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format. Bridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...) Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately. ``atomic_check`` This method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly. :c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge). This method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. If drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain. RETURNS: zero if the check passed, a negative error code otherwise. ``atomic_reset`` Reset the bridge to a predefined state (or retrieve its current state) and return a :c:type:`drm_bridge_state` object matching this state. This function is called at attach time. The atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook. Note that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...). 1. The reset operation happens when the bridge is attached, not when drm_mode_config_reset() is called 2. It's meant to be used exclusively on bridges that have been converted to the ATOMIC API RETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise. ``detect`` Check if anything is attached to the bridge output. This callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `. RETURNS: drm_connector_status indicating the bridge output status. ``get_modes`` Fill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add(). The **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage. RETURNS: The number of modes added by calling drm_mode_probed_add(). ``edid_read`` Read the EDID data of the connected display. The **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented. The caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage. RETURNS: An edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free(). ``hpd_notify`` Notify the bridge of hot plug detection. This callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges. ``hpd_enable`` Enable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. ``hpd_disable`` Disable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. ``hdmi_tmds_char_rate_valid`` Check whether a particular TMDS character rate is supported by the driver. This callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. Returns: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. ``hdmi_clear_avi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_avi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_hdmi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_hdmi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_hdr_drm_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_hdr_drm_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_spd_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_spd_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_audio_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_audio_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. ``hdmi_audio_startup`` Called when ASoC starts an audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_prepare`` Configures HDMI-encoder for audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_shutdown`` Shut down the audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_mute_stream`` Mute/unmute HDMI audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_init`` Initialize CEC part of the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_enable`` Enable or disable the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_log_addr`` Set the logical address of the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_transmit`` Transmit the message using the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_startup`` Called when ASoC starts a DisplayPort audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_prepare`` Configures DisplayPort audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_shutdown`` Shut down the DisplayPort audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_mute_stream`` Mute/unmute DisplayPort audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``debugfs_init`` Allows bridges to create bridge-specific debugfs files.sh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubh:}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKBhj>ubj, )}(hXstruct drm_bridge_funcs { int (*attach)(struct drm_bridge *bridge, struct drm_encoder *encoder, enum drm_bridge_attach_flags flags); void (*destroy)(struct drm_bridge *bridge); void (*detach)(struct drm_bridge *bridge); enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*disable)(struct drm_bridge *bridge); void (*post_disable)(struct drm_bridge *bridge); void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); void (*pre_enable)(struct drm_bridge *bridge); void (*enable)(struct drm_bridge *bridge); void (*atomic_pre_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); struct drm_bridge_state *(*atomic_duplicate_state)(struct drm_bridge *bridge); void (*atomic_destroy_state)(struct drm_bridge *bridge, struct drm_bridge_state *state); u32 *(*atomic_get_output_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts); u32 *(*atomic_get_input_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts); int (*atomic_check)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); struct drm_bridge_state *(*atomic_reset)(struct drm_bridge *bridge); enum drm_connector_status (*detect)(struct drm_bridge *bridge, struct drm_connector *connector); int (*get_modes)(struct drm_bridge *bridge, struct drm_connector *connector); const struct drm_edid *(*edid_read)(struct drm_bridge *bridge, struct drm_connector *connector); void (*hpd_notify)(struct drm_bridge *bridge, struct drm_connector *connector, enum drm_connector_status status); void (*hpd_enable)(struct drm_bridge *bridge); void (*hpd_disable)(struct drm_bridge *bridge); enum drm_mode_status (*hdmi_tmds_char_rate_valid)(const struct drm_bridge *bridge, const struct drm_display_mode *mode, unsigned long long tmds_rate); int (*hdmi_clear_avi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_avi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdmi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdmi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdr_drm_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdr_drm_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_spd_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_spd_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_audio_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_audio_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*hdmi_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); int (*hdmi_cec_init)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_cec_enable)(struct drm_bridge *bridge, bool enable); int (*hdmi_cec_log_addr)(struct drm_bridge *bridge, u8 logical_addr); int (*hdmi_cec_transmit)(struct drm_bridge *bridge, u8 attempts, u32 signal_free_time, struct cec_msg *msg); int (*dp_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*dp_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); void (*debugfs_init)(struct drm_bridge *bridge, struct dentry *root); };h]hXstruct drm_bridge_funcs { int (*attach)(struct drm_bridge *bridge, struct drm_encoder *encoder, enum drm_bridge_attach_flags flags); void (*destroy)(struct drm_bridge *bridge); void (*detach)(struct drm_bridge *bridge); enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*disable)(struct drm_bridge *bridge); void (*post_disable)(struct drm_bridge *bridge); void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); void (*pre_enable)(struct drm_bridge *bridge); void (*enable)(struct drm_bridge *bridge); void (*atomic_pre_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); struct drm_bridge_state *(*atomic_duplicate_state)(struct drm_bridge *bridge); void (*atomic_destroy_state)(struct drm_bridge *bridge, struct drm_bridge_state *state); u32 *(*atomic_get_output_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts); u32 *(*atomic_get_input_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts); int (*atomic_check)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); struct drm_bridge_state *(*atomic_reset)(struct drm_bridge *bridge); enum drm_connector_status (*detect)(struct drm_bridge *bridge, struct drm_connector *connector); int (*get_modes)(struct drm_bridge *bridge, struct drm_connector *connector); const struct drm_edid *(*edid_read)(struct drm_bridge *bridge, struct drm_connector *connector); void (*hpd_notify)(struct drm_bridge *bridge, struct drm_connector *connector, enum drm_connector_status status); void (*hpd_enable)(struct drm_bridge *bridge); void (*hpd_disable)(struct drm_bridge *bridge); enum drm_mode_status (*hdmi_tmds_char_rate_valid)(const struct drm_bridge *bridge, const struct drm_display_mode *mode, unsigned long long tmds_rate); int (*hdmi_clear_avi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_avi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdmi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdmi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdr_drm_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdr_drm_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_spd_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_spd_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_audio_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_audio_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*hdmi_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); int (*hdmi_cec_init)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_cec_enable)(struct drm_bridge *bridge, bool enable); int (*hdmi_cec_log_addr)(struct drm_bridge *bridge, u8 logical_addr); int (*hdmi_cec_transmit)(struct drm_bridge *bridge, u8 attempts, u32 signal_free_time, struct cec_msg *msg); int (*dp_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*dp_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); void (*debugfs_init)(struct drm_bridge *bridge, struct dentry *root); };}hj>sbah}(h]h ]h"]h$]h&]j j uh1j+ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKDhj>ubh)}(h **Members**h]j )}(hj>h]hMembers}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKyhj>ubjU )}(hhh](jZ )}(hX``attach`` This callback is invoked whenever our bridge is being attached to a :c:type:`drm_encoder`. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*). The **attach** callback is optional. RETURNS: Zero on success, error code on failure. h](j` )}(h ``attach``h]jf )}(hj>h]hattach}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKKhj>ubj| )}(hhh](h)}(hThis callback is invoked whenever our bridge is being attached to a :c:type:`drm_encoder`. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*).h](hDThis callback is invoked whenever our bridge is being attached to a }(hj>hhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hj>h]h drm_encoder}(hj>hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKChj>ubh[. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*).}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hKChj>ubh)}(h$The **attach** callback is optional.h](hThe }(hj%?hhhNhNubj )}(h **attach**h]hattach}(hj-?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%?ubh callback is optional.}(hj%?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKGhj>ubh)}(hRETURNS:h]hRETURNS:}(hjF?hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKIhj>ubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hjU?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKKhj>ubeh}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hj>hKKhj>ubjZ )}(hx``destroy`` This callback is invoked when the bridge is about to be deallocated. The **destroy** callback is optional. h](j` )}(h ``destroy``h]jf )}(hju?h]hdestroy}(hjw?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjs?ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKVhjo?ubj| )}(hhh](h)}(hDThis callback is invoked when the bridge is about to be deallocated.h]hDThis callback is invoked when the bridge is about to be deallocated.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKShj?ubh)}(h%The **destroy** callback is optional.h](hThe }(hj?hhhNhNubj )}(h **destroy**h]hdestroy}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubh callback is optional.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hKVhj?ubeh}(h]h ]h"]h$]h&]uh1j{ hjo?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hKVhj>ubjZ )}(h``detach`` This callback is invoked whenever our bridge is being detached from a :c:type:`drm_encoder`. The **detach** callback is optional. h](j` )}(h ``detach``h]jf )}(hj?h]hdetach}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhK`hj?ubj| )}(hhh](h)}(h\This callback is invoked whenever our bridge is being detached from a :c:type:`drm_encoder`.h](hFThis callback is invoked whenever our bridge is being detached from a }(hj?hhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hj?h]h drm_encoder}(hj?hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhK]hj?ubh.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@hK]hj?ubh)}(h$The **detach** callback is optional.h](hThe }(hj@hhhNhNubj )}(h **detach**h]hdetach}(hj"@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubh callback is optional.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hK`hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hK`hj>ubjZ )}(hX?``mode_valid`` This callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). The **mode_valid** callback is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup**. RETURNS: drm_mode_status Enum h](j` )}(h``mode_valid``h]jf )}(hjL@h]h mode_valid}(hjN@hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJ@ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjF@ubj| )}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hje@hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKghjb@ubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hjt@hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKohjb@ubh)}(h(The **mode_valid** callback is optional.h](hThe }(hj@hhhNhNubj )}(h**mode_valid**h]h mode_valid}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubh callback is optional.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKthjb@ubh)}(hNOTE:h]hNOTE:}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKvhjb@ubh)}(hX^Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hj@hhhNhNubj )}(h**mode_fixup**h]h mode_fixup}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubh.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKxhjb@ubh)}(hRETURNS:h]hRETURNS:}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjb@ubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhja@hKhjb@ubeh}(h]h ]h"]h$]h&]uh1j{ hjF@ubeh}(h]h ]h"]h$]h&]uh1jY hja@hKhj>ubjZ )}(hXS``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration. The mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](j` )}(h``mode_fixup``h]jf )}(hjAh]h mode_fixup}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhj@ubj| )}(hhh](h)}(hXThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final }(hjAhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj&Ah]h drm_connector}(hj(AhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj$Aubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjAubh or the next }(hjAhhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hjJAh]h drm_bridge}(hjLAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjHAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjCAhKhjAubh. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also }(hjAhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jf )}(hjmAh]hdrm_crtc_state.adjusted_mode}(hjoAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjkAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjCAhKhjAubh for more details.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjCAhKhjAubh)}(hThis is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration.h]hThis is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjAubh)}(hThe mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided.h](h%The mode_fixup callback is optional. }(hjAhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]jf )}(hjAh]hdrm_bridge_funcs.mode_fixup()}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjAubh is not called when }(hjAhhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jf )}(hjAh]hdrm_bridge_funcs.atomic_check()}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjAhKhjAubh8 is implemented, so only one of them should be provided.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhKhjAubh)}(hNOTE:h]hNOTE:}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjAubh)}(hX>This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter.h](hX,This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in }(hjBhhhNhNubj )}(h **state**h]hstate}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh parameter.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjAubh)}(hXNAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hj(BhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jf )}(hj2Bh]hdrm_connector.modes}(hj4BhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj0Bubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhj(Bubhc. To ensure that modes are filtered consistently put any bridge constraints and limits checks into }(hj(BhhhNhNubj )}(h**mode_valid**h]h mode_valid}(hjTBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(Bubh.}(hj(BhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjOBhKhjAubh)}(hRETURNS:h]hRETURNS:}(hjlBhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjAubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hj{BhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjAubeh}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hjAhKhj>ubjZ )}(hX?``disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_disable `. h](j` )}(h ``disable``h]jf )}(hjBh]hdisable}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjBubj| )}(hhh](h)}(hXThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjBhhhNhNubj )}(h **disable**h]hdisable}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh& vfunc. If the preceding element is a }(hjBhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjBh]h drm_encoder}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjBubh it’s called right before the }(hjBhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jf )}(hjBh]h drm_encoder_helper_funcs.disable}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjBhKhjBubh, }(hjBhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.prepare `h]jf )}(hjCh]h drm_encoder_helper_funcs.prepare}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjBhKhjBubh or }(hjBhhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jf )}(hj;Ch]hdrm_encoder_helper_funcs.dpms}(hj=ChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj9Cubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjBhKhjBubh hook.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhKhjBubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.}(hjbChhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjBubh)}(h%The **disable** callback is optional.h](hThe }(hjqChhhNhNubj )}(h **disable**h]hdisable}(hjyChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqCubh callback is optional.}(hjqChhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjBubh)}(hNOTE:h]hNOTE:}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjBubh)}(hsThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_disable `.h](h6This is deprecated, do not use! New drivers shall use }(hjChhhNhNubh)}(h<:c:type:`drm_bridge_funcs.atomic_disable `h]jf )}(hjCh]hdrm_bridge_funcs.atomic_disable}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjCubh.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChKhjBubeh}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hjBhKhj>ubjZ )}(hXb``post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **post_disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_post_disable `. h](j` )}(h``post_disable``h]jf )}(hjCh]h post_disable}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjCubj| )}(hhh](h)}(hXThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjChhhNhNubj )}(h**post_disable**h]h post_disable}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubh) function. If the preceding element is a }(hjChhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjDh]h drm_encoder}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjCubh+ it’s called right after the encoder’s }(hjChhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jf )}(hj>Dh]h drm_encoder_helper_funcs.disable}(hj@DhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj`h]jf )}(hjaDh]h drm_encoder_helper_funcs.prepare}(hjcDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj_Dubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhj7DhKhjCubh or }(hjChhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jf )}(hjDh]hdrm_encoder_helper_funcs.dpms}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhj7DhKhjCubh hook.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7DhKhjCubh)}(hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.h]hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjCubh)}(h*The **post_disable** callback is optional.h](hThe }(hjDhhhNhNubj )}(h**post_disable**h]h post_disable}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubh callback is optional.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjCubh)}(hNOTE:h]hNOTE:}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjCubh)}(hxThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_post_disable `.h](h6This is deprecated, do not use! New drivers shall use }(hjDhhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_post_disable `h]jf )}(hjDh]h$drm_bridge_funcs.atomic_post_disable}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjDubh.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhKhjCubeh}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hjChKhj>ubjZ )}(hX2``mode_set`` This callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called. The adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges. For atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `. NOTE: This is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation. h](j` )}(h ``mode_set``h]jf )}(hj.Eh]hmode_set}(hj0EhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,Eubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhj(Eubj| )}(hhh](h)}(hXThis callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called.h](hNThis callback should set the given mode on the bridge. It is called after the }(hjGEhhhNhNubj )}(h **mode_set**h]hmode_set}(hjOEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGEubh callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be }(hjGEhhhNhNubh)}(hF:c:type:`drm_encoder_helper_funcs.mode_set `h]jf )}(hjcEh]h!drm_encoder_helper_funcs.mode_set}(hjeEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjaEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjGEubhY. The display pipe (i.e. clocks and timing signals) is off when this function is called.}(hjGEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhKhjDEubh)}(hXThe adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges.h]hXThe adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjDEubh)}(hsFor atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `.h](h;For atomic drivers the adjusted_mode is the mode stored in }(hjEhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jf )}(hjEh]hdrm_crtc_state.adjusted_mode}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjEubh.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhKhjDEubh)}(hNOTE:h]hNOTE:}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjDEubh)}(hThis is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation.h](hHThis is deprecated, do not use! New drivers shall set their mode in the }(hjEhhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]jf )}(hjEh]hdrm_bridge_funcs.atomic_enable}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhjEubh operation.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhKhjDEubeh}(h]h ]h"]h$]h&]uh1j{ hj(Eubeh}(h]h ]h"]h$]h&]uh1jY hjCEhKhj>ubjZ )}(hX``pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **pre_enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_pre_enable `. h](j` )}(h``pre_enable``h]jf )}(hjFh]h pre_enable}(hj!FhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjFubj| )}(hhh](h)}(hXThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hj8FhhhNhNubj )}(h**pre_enable**h]h pre_enable}(hj@FhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8Fubh) function. If the preceding element is a }(hj8FhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjTFh]h drm_encoder}(hjVFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjRFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhKhj8Fubh, it’s called right before the encoder’s }(hj8FhhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.enable `h]jf )}(hjxFh]hdrm_encoder_helper_funcs.enable}(hjzFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjvFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjqFhKhj8Fubh, }(hj8FhhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.commit `h]jf )}(hjFh]hdrm_encoder_helper_funcs.commit}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjqFhKhj8Fubh or }(hj8FhhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jf )}(hjFh]hdrm_encoder_helper_funcs.dpms}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjqFhKhj8Fubh hook.}(hj8FhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqFhKhj5Fubh)}(hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.h]hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj5Fubh)}(h(The **pre_enable** callback is optional.h](hThe }(hjFhhhNhNubj )}(h**pre_enable**h]h pre_enable}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubh callback is optional.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM hj5Fubh)}(hNOTE:h]hNOTE:}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM hj5Fubh)}(hvThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_pre_enable `.h](h6This is deprecated, do not use! New drivers shall use }(hj$GhhhNhNubh)}(h?:c:type:`drm_bridge_funcs.atomic_pre_enable `h]jf )}(hj.Gh]h"drm_bridge_funcs.atomic_pre_enable}(hj0GhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj,Gubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj$Gubh.}(hj$GhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjKGhMhj5Fubeh}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hj4FhMhj>ubjZ )}(hX``enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_enable `. h](j` )}(h ``enable``h]jf )}(hjhGh]henable}(hjjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjfGubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM)hjbGubj| )}(hhh](h)}(hX This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjGhhhNhNubj )}(h **enable**h]henable}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubh) function. If the preceding element is a }(hjGhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjGh]h drm_encoder}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjGubh+ it’s called right after the encoder’s }(hjGhhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.enable `h]jf )}(hjGh]hdrm_encoder_helper_funcs.enable}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjGhMhjGubh, }(hjGhhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.commit `h]jf )}(hjGh]hdrm_encoder_helper_funcs.commit}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjGhMhjGubh or }(hjGhhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jf )}(hjHh]hdrm_encoder_helper_funcs.dpms}(hj HhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjGhMhjGubh hook.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhMhj~Gubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.}(hj.HhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj~Gubh)}(h$The **enable** callback is optional.h](hThe }(hj=HhhhNhNubj )}(h **enable**h]henable}(hjEHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=Hubh callback is optional.}(hj=HhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM$hj~Gubh)}(hNOTE:h]hNOTE:}(hj^HhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM&hj~Gubh)}(hrThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_enable `.h](h6This is deprecated, do not use! New drivers shall use }(hjmHhhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]jf )}(hjwHh]hdrm_bridge_funcs.atomic_enable}(hjyHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjuHubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM(hjmHubh.}(hjmHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhM(hj~Gubeh}(h]h ]h"]h$]h&]uh1j{ hjbGubeh}(h]h ]h"]h$]h&]uh1jY hj}GhM)hj>ubjZ )}(hX``atomic_pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **atomic_pre_enable** callback is optional. h](j` )}(h``atomic_pre_enable``h]jf )}(hjHh]hatomic_pre_enable}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM<hjHubj| )}(hhh](h)}(hXThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook.h](hThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjHhhhNhNubj )}(h**atomic_pre_enable**h]hatomic_pre_enable}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubh or }(hjHhhhNhNubj )}(h**pre_enable**h]h pre_enable}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubh) function. If the preceding element is a }(hjHhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjHh]h drm_encoder}(hjHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM0hjHubh, it’s called right before the encoder’s }(hjHhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jf )}(hjIh]h&drm_encoder_helper_funcs.atomic_enable}(hjIhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjIhM0hjHubh hook.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhM0hjHubh)}(hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.h]hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.}(hjCIhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM7hjHubh)}(h/The **atomic_pre_enable** callback is optional.h](hThe }(hjRIhhhNhNubj )}(h**atomic_pre_enable**h]hatomic_pre_enable}(hjZIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRIubh callback is optional.}(hjRIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhM<hjHubeh}(h]h ]h"]h$]h&]uh1j{ hjHubeh}(h]h ]h"]h$]h&]uh1jY hjHhM<hj>ubjZ )}(hX``atomic_enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **atomic_enable** callback is optional. h](j` )}(h``atomic_enable``h]jf )}(hjIh]h atomic_enable}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMPhj~Iubj| )}(hhh](h)}(hXThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook.[h](hThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjIhhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubh or }(hjIhhhNhNubj )}(h **enable**h]henable}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubh) function. If the preceding element is a }(hjIhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjIh]h drm_encoder}(hjIhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMDhjIubh+ it’s called right after the encoder’s }(hjIhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jf )}(hjIh]h&drm_encoder_helper_funcs.atomic_enable}(hjIhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjIhMDhjIubh hook.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMDhjIubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMKhjIubh)}(h+The **atomic_enable** callback is optional.h](hThe }(hj%JhhhNhNubj )}(h**atomic_enable**h]h atomic_enable}(hj-JhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%Jubh callback is optional.}(hj%JhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMPhjIubeh}(h]h ]h"]h$]h&]uh1j{ hj~Iubeh}(h]h ]h"]h$]h&]uh1jY hjIhMPhj>ubjZ )}(hXa``atomic_disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **atomic_disable** callback is optional. h](j` )}(h``atomic_disable``h]jf )}(hjWJh]hatomic_disable}(hjYJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjUJubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMahjQJubj| )}(hhh](h)}(hXThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook.h](hThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjpJhhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hjxJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpJubh or }(hjpJhhhNhNubj )}(h **disable**h]hdisable}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpJubh& vfunc. If the preceding element is a }(hjpJhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjJh]h drm_encoder}(hjJhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMWhjpJubh it’s called right before the }(hjpJhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jf )}(hjJh]h'drm_encoder_helper_funcs.atomic_disable}(hjJhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjJhMWhjpJubh hook.}(hjpJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjJhMWhjmJubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM^hjmJubh)}(h,The **atomic_disable** callback is optional.h](hThe }(hjJhhhNhNubj )}(h**atomic_disable**h]hatomic_disable}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubh callback is optional.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjlJhMahjmJubeh}(h]h ]h"]h$]h&]uh1j{ hjQJubeh}(h]h ]h"]h$]h&]uh1jY hjlJhMahj>ubjZ )}(hX``atomic_post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **atomic_post_disable** callback is optional. h](j` )}(h``atomic_post_disable``h]jf )}(hj*Kh]hatomic_post_disable}(hj,KhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(Kubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMthj$Kubj| )}(hhh](h)}(hXThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook.h](hThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjCKhhhNhNubj )}(h**atomic_post_disable**h]hatomic_post_disable}(hjKKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCKubh or }(hjCKhhhNhNubj )}(h**post_disable**h]h post_disable}(hj]KhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCKubh) function. If the preceding element is a }(hjCKhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjqKh]h drm_encoder}(hjsKhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjoKubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMihjCKubh+ it’s called right after the encoder’s }(hjCKhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jf )}(hjKh]h'drm_encoder_helper_funcs.atomic_disable}(hjKhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjKhMihjCKubh hook.}(hjCKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjKhMihj@Kubh)}(hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.h]hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMphj@Kubh)}(h1The **atomic_post_disable** callback is optional.h](hThe }(hjKhhhNhNubj )}(h**atomic_post_disable**h]hatomic_post_disable}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubh callback is optional.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?KhMthj@Kubeh}(h]h ]h"]h$]h&]uh1j{ hj$Kubeh}(h]h ]h"]h$]h&]uh1jY hj?KhMthj>ubjZ )}(hX``atomic_duplicate_state`` Duplicate the current bridge state object (which is guaranteed to be non-NULL). The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook. RETURNS: A valid drm_bridge_state object or NULL if the allocation fails. h](j` )}(h``atomic_duplicate_state``h]jf )}(hjKh]hatomic_duplicate_state}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjKubj| )}(hhh](h)}(hODuplicate the current bridge state object (which is guaranteed to be non-NULL).h]hODuplicate the current bridge state object (which is guaranteed to be non-NULL).}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM|hjLubh)}(hX(The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook.h](hThe atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don’t subclass }(hj%LhhhNhNubh)}(h:c:type:`drm_bridge_state`h]jf )}(hj/Lh]hdrm_bridge_state}(hj1LhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj-Lubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj%Lubhf, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook.}(hj%LhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjLLhMhjLubh)}(hIRETURNS: A valid drm_bridge_state object or NULL if the allocation fails.h]hIRETURNS: A valid drm_bridge_state object or NULL if the allocation fails.}(hjWLhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjLubeh}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjLhMhj>ubjZ )}(hX``atomic_destroy_state`` Destroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `. The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook. h](j` )}(h``atomic_destroy_state``h]jf )}(hjxLh]hatomic_destroy_state}(hjzLhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvLubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjrLubj| )}(hhh](h)}(hDestroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `.h](h6Destroy a bridge state object previously allocated by }(hjLhhhNhNubh)}(hH:c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `h]jf )}(hjLh]h)drm_bridge_funcs.atomic_duplicate_state()}(hjLhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjLubh.}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjLhMhjLubh)}(hX$The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook.h](hThe atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don’t subclass }(hjLhhhNhNubh)}(h:c:type:`drm_bridge_state`h]jf )}(hjLh]hdrm_bridge_state}(hjLhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjLubhd, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook.}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjLhMhjLubeh}(h]h ]h"]h$]h&]uh1j{ hjrLubeh}(h]h ]h"]h$]h&]uh1jY hjLhMhj>ubjZ )}(hXi``atomic_get_output_bus_fmts`` Return the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). This method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise. h](j` )}(h``atomic_get_output_bus_fmts``h]jf )}(hjMh]hatomic_get_output_bus_fmts}(hj MhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubj| )}(hhh](h)}(hXReturn the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works).h]hXReturn the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works).}(hj MhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubh)}(hXThis method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise.h](hThis method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in }(hj/MhhhNhNubh)}(h:c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `h]jf )}(hj9Mh]hdrm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info}(hj;MhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj7Mubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj/Mubh.bus_formats[0] if }(hj/MhhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]jf )}(hj]Mh]hdrm_connector.display_info}(hj_MhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj[Mubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjVMhMhj/Mubh:.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise.}(hj/MhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVMhMhjMubeh}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjMhMhj>ubjZ )}(hXL``atomic_get_input_bus_fmts`` Return the supported bus formats on the input end of a bridge for a specific output bus format. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0. This method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format. Bridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...) Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately. h](j` )}(h``atomic_get_input_bus_fmts``h]jf )}(hjMh]hatomic_get_input_bus_fmts}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubj| )}(hhh](h)}(h_Return the supported bus formats on the input end of a bridge for a specific output bus format.h]h_Return the supported bus formats on the input end of a bridge for a specific output bus format.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubh)}(hXThe returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0.h]hXThe returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubh)}(hXThis method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format.h]hXThis method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubh)}(hXVBridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...)h](hXBridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, }(hjMhhhNhNubh)}(h:c:type:`drm_display_mode`h]jf )}(hjMh]hdrm_display_mode}(hjMhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_modeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubh, }(hjMhhhNhNubh)}(h:c:type:`drm_display_info`h]jf )}(hj Nh]hdrm_display_info}(hj NhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_infouh1hhjNhMhjMubh, ...)}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNhMhjMubh)}(hX0Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately.h]hX0Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately.}(hj1NhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMubeh}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjMhMhj>ubjZ )}(hXg``atomic_check`` This method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly. :c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge). This method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. If drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain. RETURNS: zero if the check passed, a negative error code otherwise. h](j` )}(h``atomic_check``h]jf )}(hjRNh]h atomic_check}(hjTNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPNubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjLNubj| )}(hhh](h)}(hThis method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly.h]hThis method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly.}(hjkNhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjhNubh)}(h:c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge).h](h)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jf )}(hjNh]hdrm_bridge_funcs.atomic_check()}(hjNhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj~Nubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjzNubhG hooks are called in reverse order (from the last to the first bridge).}(hjzNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNhMhjhNubh)}(hThis method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided.h](hThis method is optional. }(hjNhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]jf )}(hjNh]hdrm_bridge_funcs.mode_fixup()}(hjNhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjNubh is not called when }(hjNhhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jf )}(hjNh]hdrm_bridge_funcs.atomic_check()}(hjNhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjNhMhjNubh8 is implemented, so only one of them should be provided.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNhMhjhNubh)}(hXIf drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain.h](hIf drivers need to tweak }(hjNhhhNhNubh)}(h;:c:type:`drm_bridge_state.input_bus_cfg `h]jf )}(hjOh]hdrm_bridge_state.input_bus_cfg}(hj OhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjNubh .flags or }(hjNhhhNhNubh)}(h<:c:type:`drm_bridge_state.output_bus_cfg `h]jf )}(hj+Oh]hdrm_bridge_state.output_bus_cfg}(hj-OhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj)Oubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hhj$OhMhjNubh9.flags it should happen in this function. By default the }(hjNhhhNhNubh)}(h<:c:type:`drm_bridge_state.output_bus_cfg `h]jf )}(hjNOh]hdrm_bridge_state.output_bus_cfg}(hjPOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjLOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hhj$OhMhjNubh'.flags field is set to the next bridge }(hjNhhhNhNubh)}(h;:c:type:`drm_bridge_state.input_bus_cfg `h]jf )}(hjqOh]hdrm_bridge_state.input_bus_cfg}(hjsOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjoOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hhj$OhMhjNubh.flags value or }(hjNhhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]jf )}(hjOh]hdrm_connector.display_info}(hjOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj$OhMhjNubh:.bus_flags if the bridge is the last element in the chain.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj$OhMhjhNubh)}(hCRETURNS: zero if the check passed, a negative error code otherwise.h]hCRETURNS: zero if the check passed, a negative error code otherwise.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjhNubeh}(h]h ]h"]h$]h&]uh1j{ hjLNubeh}(h]h ]h"]h$]h&]uh1jY hjgNhMhj>ubjZ )}(hX``atomic_reset`` Reset the bridge to a predefined state (or retrieve its current state) and return a :c:type:`drm_bridge_state` object matching this state. This function is called at attach time. The atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook. Note that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...). 1. The reset operation happens when the bridge is attached, not when drm_mode_config_reset() is called 2. It's meant to be used exclusively on bridges that have been converted to the ATOMIC API RETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise. h](j` )}(h``atomic_reset``h]jf )}(hjOh]h atomic_reset}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjOubj| )}(hhh](h)}(hReset the bridge to a predefined state (or retrieve its current state) and return a :c:type:`drm_bridge_state` object matching this state. This function is called at attach time.h](hTReset the bridge to a predefined state (or retrieve its current state) and return a }(hjOhhhNhNubh)}(h:c:type:`drm_bridge_state`h]jf )}(hjOh]hdrm_bridge_state}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjOubhD object matching this state. This function is called at attach time.}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhMhjOubh)}(hXThe atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook.h](hThe atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don’t subclass }(hj'PhhhNhNubh)}(h:c:type:`drm_bridge_state`h]jf )}(hj1Ph]hdrm_bridge_state}(hj3PhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj/Pubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj'Pubh\, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook.}(hj'PhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNPhMhjOubh)}(hNote that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...).h]hNote that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...).}(hjYPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjOubj+P)}(hhh](h)}(hcThe reset operation happens when the bridge is attached, not when drm_mode_config_reset() is calledh]h)}(hcThe reset operation happens when the bridge is attached, not when drm_mode_config_reset() is calledh]hcThe reset operation happens when the bridge is attached, not when drm_mode_config_reset() is called}(hjoPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM hjkPubah}(h]h ]h"]h$]h&]uh1hhjhPubh)}(hXIt's meant to be used exclusively on bridges that have been converted to the ATOMIC API h]h)}(hWIt's meant to be used exclusively on bridges that have been converted to the ATOMIC APIh]hYIt’s meant to be used exclusively on bridges that have been converted to the ATOMIC API}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM hjPubah}(h]h ]h"]h$]h&]uh1hhjhPubeh}(h]h ]h"]h$]h&]j'Rj(Rj)Rhj*Rj+Ruh1j*PhjOubh)}(huRETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise.h]huRETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjOubeh}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjOhMhj>ubjZ )}(hX``detect`` Check if anything is attached to the bridge output. This callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `. RETURNS: drm_connector_status indicating the bridge output status. h](j` )}(h ``detect``h]jf )}(hjPh]hdetect}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM hjPubj| )}(hhh](h)}(h3Check if anything is attached to the bridge output.h]h3Check if anything is attached to the bridge output.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjPubh)}(hThis callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their }(hjPhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjPh]hdrm_bridge->ops}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjPubh.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhMhjPubh)}(hRETURNS:h]hRETURNS:}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjPubh)}(h9drm_connector_status indicating the bridge output status.h]h9drm_connector_status indicating the bridge output status.}(hj-QhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhM hjPubeh}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjPhM hj>ubjZ )}(hX``get_modes`` Fill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add(). The **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage. RETURNS: The number of modes added by calling drm_mode_probed_add(). h](j` )}(h ``get_modes``h]jf )}(hjMQh]h get_modes}(hjOQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKQubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM9hjGQubj| )}(hhh](h)}(hhFill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add().h](h5Fill all modes currently valid for the sink into the }(hjfQhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjpQh]h drm_connector}(hjrQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjnQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM(hjfQubh with drm_mode_probed_add().}(hjfQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhM(hjcQubh)}(hXThe **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead.h](hThe }(hjQhhhNhNubj )}(h **get_modes**h]h get_modes}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubh callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave }(hjQhhhNhNubj )}(h **get_modes**h]h get_modes}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubh! unimplemented and implement the }(hjQhhhNhNubh)}(h8:c:type:`drm_bridge_funcs->edid_read `h]jf )}(hjQh]hdrm_bridge_funcs->edid_read}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM+hjQubh callback instead.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhM+hjcQubh)}(hThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `.h](heThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their }(hjQhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjQh]hdrm_bridge->ops}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM0hjQubh.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhM0hjcQubh)}(hThe connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage.h]hThe connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage.}(hj RhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM3hjcQubh)}(hRETURNS:h]hRETURNS:}(hj/RhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM7hjcQubh)}(h;The number of modes added by calling drm_mode_probed_add().h]h;The number of modes added by calling drm_mode_probed_add().}(hj>RhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbQhM9hjcQubeh}(h]h ]h"]h$]h&]uh1j{ hjGQubeh}(h]h ]h"]h$]h&]uh1jY hjbQhM9hj>ubjZ )}(hX``edid_read`` Read the EDID data of the connected display. The **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented. The caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage. RETURNS: An edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free(). h](j` )}(h ``edid_read``h]jf )}(hj^Rh]h edid_read}(hj`RhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\Rubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMXhjXRubj| )}(hhh](h)}(h,Read the EDID data of the connected display.h]h,Read the EDID data of the connected display.}(hjwRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMAhjtRubh)}(hThe **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented.h](hThe }(hjRhhhNhNubj )}(h **edid_read**h]h edid_read}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubh callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the }(hjRhhhNhNubj )}(h **get_modes**h]h get_modes}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubh callback unimplemented.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMChjtRubh)}(hThe caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output.h]hThe caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMHhjtRubh)}(hThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `.h](hdThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their }(hjRhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjRh]hdrm_bridge->ops}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMLhjRubh.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhMLhjtRubh)}(hThe connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage.h]hThe connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMOhjtRubh)}(hRETURNS:h]hRETURNS:}(hj ShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMShjtRubh)}(hAn edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free().h]hAn edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free().}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMUhjtRubeh}(h]h ]h"]h$]h&]uh1j{ hjXRubeh}(h]h ]h"]h$]h&]uh1jY hjsRhMXhj>ubjZ )}(hX``hpd_notify`` Notify the bridge of hot plug detection. This callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges. h](j` )}(h``hpd_notify``h]jf )}(hj9Sh]h hpd_notify}(hj;ShhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7Subah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMehj3Subj| )}(hhh](h)}(h(Notify the bridge of hot plug detection.h]h(Notify the bridge of hot plug detection.}(hjRShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM`hjOSubh)}(hThis callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges.h]hThis callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges.}(hjaShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMbhjOSubeh}(h]h ]h"]h$]h&]uh1j{ hj3Subeh}(h]h ]h"]h$]h&]uh1jY hjNShMehj>ubjZ )}(hX``hpd_enable`` Enable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hpd_enable``h]jf )}(hjSh]h hpd_enable}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMvhj|Subj| )}(hhh](h)}(hEnable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**.h](hEnable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with }(hjShhhNhNubj )}(h**hpd_disable**h]h hpd_disable}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubh.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMnhjSubh)}(hXThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the }(hjShhhNhNubj )}(h**hpd_disable**h]h hpd_disable}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubh6 callback and set the DRM_BRIDGE_OP_HPD flag in their }(hjShhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjSh]hdrm_bridge->ops}(hjShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMshjSubh.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShMshjSubeh}(h]h ]h"]h$]h&]uh1j{ hj|Subeh}(h]h ]h"]h$]h&]uh1jY hjShMvhj>ubjZ )}(hX``hpd_disable`` Disable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hpd_disable``h]jf )}(hjTh]h hpd_disable}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj Tubj| )}(hhh](h)}(hDisable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs.h]hDisable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs.}(hj+ThhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM}hj(Tubh)}(hXThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the }(hj:ThhhNhNubj )}(h**hpd_enable**h]h hpd_enable}(hjBThhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:Tubh6 callback and set the DRM_BRIDGE_OP_HPD flag in their }(hj:ThhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjVTh]hdrm_bridge->ops}(hjXThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjTTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj:Tubh.}(hj:ThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjsThMhj(Tubeh}(h]h ]h"]h$]h&]uh1j{ hj Tubeh}(h]h ]h"]h$]h&]uh1jY hj'ThMhj>ubjZ )}(hX``hdmi_tmds_char_rate_valid`` Check whether a particular TMDS character rate is supported by the driver. This callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. Returns: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. h](j` )}(h``hdmi_tmds_char_rate_valid``h]jf )}(hjTh]hhdmi_tmds_char_rate_valid}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjTubj| )}(hhh](h)}(hJCheck whether a particular TMDS character rate is supported by the driver.h]hJCheck whether a particular TMDS character rate is supported by the driver.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjTubh)}(hThis callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their }(hjThhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjTh]hdrm_bridge->ops}(hjThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjTubh.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjThMhjTubh)}(hReturns:h]hReturns:}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjTubh)}(hEither :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `.h](hEither }(hjThhhNhNubh)}(h3:c:type:`drm_mode_status.MODE_OK `h]jf )}(hjUh]hdrm_mode_status.MODE_OK}(hjUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjTubh" or one of the failure reasons in }(hjThhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]jf )}(hj'Uh]henum drm_mode_status}(hj)UhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj%Uubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhj UhMhjTubh.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj UhMhjTubeh}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjThMhj>ubjZ )}(h``hdmi_clear_avi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_clear_avi_infoframe``h]jf )}(hj`Uh]hhdmi_clear_avi_infoframe}(hjbUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^Uubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjZUubj| )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjyUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjvUubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hjUhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjUh]hdrm_bridge->ops}(hjUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjUubh.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhMhjvUubeh}(h]h ]h"]h$]h&]uh1j{ hjZUubeh}(h]h ]h"]h$]h&]uh1jY hjuUhMhj>ubjZ )}(h``hdmi_write_avi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_write_avi_infoframe``h]jf )}(hjUh]hhdmi_write_avi_infoframe}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjUubj| )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjUubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hjUhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjUh]hdrm_bridge->ops}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjUubh.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVhMhjUubeh}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjUhMhj>ubjZ )}(h``hdmi_clear_hdmi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_clear_hdmi_infoframe``h]jf )}(hj8Vh]hhdmi_clear_hdmi_infoframe}(hj:VhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6Vubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj2Vubj| )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjQVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjNVubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hj`VhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjjVh]hdrm_bridge->ops}(hjlVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjhVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj`Vubh.}(hj`VhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVhMhjNVubeh}(h]h ]h"]h$]h&]uh1j{ hj2Vubeh}(h]h ]h"]h$]h&]uh1jY hjMVhMhj>ubjZ )}(h``hdmi_write_hdmi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_write_hdmi_infoframe``h]jf )}(hjVh]hhdmi_write_hdmi_infoframe}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjVubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjVubj| )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjVubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hjVhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjVh]hdrm_bridge->ops}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjVubh.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVhMhjVubeh}(h]h ]h"]h$]h&]uh1j{ hjVubeh}(h]h ]h"]h$]h&]uh1jY hjVhMhj>ubjZ )}(hX ``hdmi_clear_hdr_drm_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j` )}(h ``hdmi_clear_hdr_drm_infoframe``h]jf )}(hjWh]hhdmi_clear_hdr_drm_infoframe}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj Wubj| )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hj)WhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj&Wubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their }(hj8WhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjBWh]hdrm_bridge->ops}(hjDWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj@Wubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj8Wubh.}(hj8WhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_WhMhj&Wubeh}(h]h ]h"]h$]h&]uh1j{ hj Wubeh}(h]h ]h"]h$]h&]uh1jY hj%WhMhj>ubjZ )}(h``hdmi_write_hdr_drm_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j` )}(h ``hdmi_write_hdr_drm_infoframe``h]jf )}(hj|Wh]hhdmi_write_hdr_drm_infoframe}(hj~WhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjzWubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjvWubj| )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjWubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their }(hjWhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjWh]hdrm_bridge->ops}(hjWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjWubh.}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjWhMhjWubeh}(h]h ]h"]h$]h&]uh1j{ hjvWubeh}(h]h ]h"]h$]h&]uh1jY hjWhMhj>ubjZ )}(hX``hdmi_clear_spd_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_clear_spd_infoframe``h]jf )}(hjWh]hhdmi_clear_spd_infoframe}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjWubj| )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjWubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](h|This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their }(hjXhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjXh]hdrm_bridge->ops}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjXubh.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7XhMhjWubeh}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjWhMhj>ubjZ )}(h``hdmi_write_spd_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_write_spd_infoframe``h]jf )}(hjTXh]hhdmi_write_spd_infoframe}(hjVXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRXubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjNXubj| )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjmXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjjXubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](h|This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their }(hj|XhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjXh]hdrm_bridge->ops}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj|Xubh.}(hj|XhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhMhjjXubeh}(h]h ]h"]h$]h&]uh1j{ hjNXubeh}(h]h ]h"]h$]h&]uh1jY hjiXhMhj>ubjZ )}(h``hdmi_clear_audio_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_clear_audio_infoframe``h]jf )}(hjXh]hhdmi_clear_audio_infoframe}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjXubj| )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjXubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `.h](htThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their }(hjXhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjXh]hdrm_bridge->ops}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjXubh.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMhjXubeh}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjXhMhj>ubjZ )}(h``hdmi_write_audio_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. h](j` )}(h``hdmi_write_audio_infoframe``h]jf )}(hj,Yh]hhdmi_write_audio_infoframe}(hj.YhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj*Yubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj&Yubj| )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjEYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjBYubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `.h](htThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their }(hjTYhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj^Yh]hdrm_bridge->ops}(hj`YhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj\Yubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjTYubh.}(hjTYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{YhMhjBYubeh}(h]h ]h"]h$]h&]uh1j{ hj&Yubeh}(h]h ]h"]h$]h&]uh1jY hjAYhMhj>ubjZ )}(hX``hdmi_audio_startup`` Called when ASoC starts an audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_audio_startup``h]jf )}(hjYh]hhdmi_audio_startup}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjYubj| )}(hhh](h)}(h.Called when ASoC starts an audio stream setup.h]h.Called when ASoC starts an audio stream setup.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM hjYubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjYhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubh flag in their }(hjYhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjYh]hdrm_bridge->ops}(hjYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjYubh.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMhjYubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjYubeh}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjYhMhj>ubjZ )}(hXG``hdmi_audio_prepare`` Configures HDMI-encoder for audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_audio_prepare``h]jf )}(hj%Zh]hhdmi_audio_prepare}(hj'ZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#Zubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM"hjZubj| )}(hhh](h)}(hVConfigures HDMI-encoder for audio stream. Can be called multiple times for each setup.h]hVConfigures HDMI-encoder for audio stream. Can be called multiple times for each setup.}(hj>ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj;Zubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjMZhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjUZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMZubh flag in their }(hjMZhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjiZh]hdrm_bridge->ops}(hjkZhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjgZubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMZubh.}(hjMZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZhMhj;Zubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM!hj;Zubeh}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hj:ZhM"hj>ubjZ )}(hX ``hdmi_audio_shutdown`` Shut down the audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_audio_shutdown``h]jf )}(hjZh]hhdmi_audio_shutdown}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM1hjZubj| )}(hhh](h)}(hShut down the audio stream.h]hShut down the audio stream.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM+hjZubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjZhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubh flag in their }(hjZhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjZh]hdrm_bridge->ops}(hjZhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM-hjZubh.}(hjZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj[hM-hjZubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM0hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjZhM1hj>ubjZ )}(hX``hdmi_audio_mute_stream`` Mute/unmute HDMI audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_audio_mute_stream``h]jf )}(hj?[h]hhdmi_audio_mute_stream}(hjA[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=[ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM?hj9[ubj| )}(hhh](h)}(hMute/unmute HDMI audio stream.h]hMute/unmute HDMI audio stream.}(hjX[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM9hjU[ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjg[hhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjo[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjg[ubh flag in their }(hjg[hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj[h]hdrm_bridge->ops}(hj[hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM;hjg[ubh.}(hjg[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj[hM;hjU[ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM>hjU[ubeh}(h]h ]h"]h$]h&]uh1j{ hj9[ubeh}(h]h ]h"]h$]h&]uh1jY hjT[hM?hj>ubjZ )}(hX``hdmi_cec_init`` Initialize CEC part of the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_cec_init``h]jf )}(hj[h]h hdmi_cec_init}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMOhj[ubj| )}(hhh](h)}(h"Initialize CEC part of the bridge.h]h"Initialize CEC part of the bridge.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMHhj[ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj[hhhNhNubj )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubh flag in their }(hj[hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj\h]hdrm_bridge->ops}(hj\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMJhj[ubh.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-\hMJhj[ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj8\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMNhj[ubeh}(h]h ]h"]h$]h&]uh1j{ hj[ubeh}(h]h ]h"]h$]h&]uh1jY hj[hMOhj>ubjZ )}(hX$``hdmi_cec_enable`` Enable or disable the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_cec_enable``h]jf )}(hjY\h]hhdmi_cec_enable}(hj[\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjW\ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM^hjS\ubj| )}(hhh](h)}(h4Enable or disable the CEC adapter inside the bridge.h]h4Enable or disable the CEC adapter inside the bridge.}(hjr\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMWhjo\ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj\hhhNhNubj )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubh flag in their }(hj\hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj\h]hdrm_bridge->ops}(hj\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMYhj\ubh.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hMYhjo\ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM]hjo\ubeh}(h]h ]h"]h$]h&]uh1j{ hjS\ubeh}(h]h ]h"]h$]h&]uh1jY hjn\hM^hj>ubjZ )}(hX/``hdmi_cec_log_addr`` Set the logical address of the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_cec_log_addr``h]jf )}(hj\h]hhdmi_cec_log_addr}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMlhj\ubj| )}(hhh](h)}(h=Set the logical address of the CEC adapter inside the bridge.h]h=Set the logical address of the CEC adapter inside the bridge.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMehj\ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj]hhhNhNubj )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubh flag in their }(hj]hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj*]h]hdrm_bridge->ops}(hj,]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj(]ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMghj]ubh.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjG]hMghj\ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjR]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMkhj\ubeh}(h]h ]h"]h$]h&]uh1j{ hj\ubeh}(h]h ]h"]h$]h&]uh1jY hj\hMlhj>ubjZ )}(hX/``hdmi_cec_transmit`` Transmit the message using the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``hdmi_cec_transmit``h]jf )}(hjs]h]hhdmi_cec_transmit}(hju]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjq]ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMzhjm]ubj| )}(hhh](h)}(h=Transmit the message using the CEC adapter inside the bridge.h]h=Transmit the message using the CEC adapter inside the bridge.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMshj]ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj]hhhNhNubj )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubh flag in their }(hj]hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj]h]hdrm_bridge->ops}(hj]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMuhj]ubh.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj]hMuhj]ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMyhj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjm]ubeh}(h]h ]h"]h$]h&]uh1jY hj]hMzhj>ubjZ )}(hX"``dp_audio_startup`` Called when ASoC starts a DisplayPort audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``dp_audio_startup``h]jf )}(hj^h]hdp_audio_startup}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj]ubj| )}(hhh](h)}(h9Called when ASoC starts a DisplayPort audio stream setup.h]h9Called when ASoC starts a DisplayPort audio stream setup.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj^ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj(^hhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj0^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(^ubh flag in their }(hj(^hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjD^h]hdrm_bridge->ops}(hjF^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjB^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj(^ubh.}(hj(^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhja^hMhj^ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjl^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhj>ubjZ )}(hX>``dp_audio_prepare`` Configures DisplayPort audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``dp_audio_prepare``h]jf )}(hj^h]hdp_audio_prepare}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj^ubj| )}(hhh](h)}(hQConfigures DisplayPort audio stream. Can be called multiple times for each setup.h]hQConfigures DisplayPort audio stream. Can be called multiple times for each setup.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj^ubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hj^hhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh flag in their }(hj^hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj^h]hdrm_bridge->ops}(hj^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj^ubh.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMhj^ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj^ubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhj>ubjZ )}(hX``dp_audio_shutdown`` Shut down the DisplayPort audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``dp_audio_shutdown``h]jf )}(hj_h]hdp_audio_shutdown}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj_ubj| )}(hhh](h)}(h'Shut down the DisplayPort audio stream.h]h'Shut down the DisplayPort audio stream.}(hj3_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj0_ubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjB_hhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjJ_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjB_ubh flag in their }(hjB_hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj^_h]hdrm_bridge->ops}(hj`_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj\_ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjB_ubh.}(hjB_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{_hMhj0_ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj0_ubeh}(h]h ]h"]h$]h&]uh1j{ hj_ubeh}(h]h ]h"]h$]h&]uh1jY hj/_hMhj>ubjZ )}(hX``dp_audio_mute_stream`` Mute/unmute DisplayPort audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j` )}(h``dp_audio_mute_stream``h]jf )}(hj_h]hdp_audio_mute_stream}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj_ubj| )}(hhh](h)}(h%Mute/unmute DisplayPort audio stream.h]h%Mute/unmute DisplayPort audio stream.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj_ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj_hhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubh flag in their }(hj_hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hj_h]hdrm_bridge->ops}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj_ubh.}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`hMhj_ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj_ubeh}(h]h ]h"]h$]h&]uh1j{ hj_ubeh}(h]h ]h"]h$]h&]uh1jY hj_hMhj>ubjZ )}(hH``debugfs_init`` Allows bridges to create bridge-specific debugfs files.h](j` )}(h``debugfs_init``h]jf )}(hj4`h]h debugfs_init}(hj6`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2`ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj.`ubj| )}(hhh]h)}(h7Allows bridges to create bridge-specific debugfs files.h]h7Allows bridges to create bridge-specific debugfs files.}(hjM`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjJ`ubah}(h]h ]h"]h$]h&]uh1j{ hj.`ubeh}(h]h ]h"]h$]h&]uh1jY hjI`hMhj>ubeh}(h]h ]h"]h$]h&]uh1jT hj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_timings (C struct)c.drm_bridge_timingshNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hdrm_bridge_timingsh]j )}(hstruct drm_bridge_timingsh](j )}(hj h]hstruct}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhj`hMubj )}(hdrm_bridge_timingsh]j )}(hj`h]hdrm_bridge_timings}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhhj`hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj`hhhj`hMubah}(h]j`ah ](j j eh"]h$]h&]j j )j huh1j{ hj`hMhj`hhubj )}(hhh]h)}(h!timing information for the bridgeh]h!timing information for the bridge}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj`hhubah}(h]h ]h"]h$]h&]uh1j hj`hhhj`hMubeh}(h]h ](j structeh"]h$]h&]j j j j`j j`j j j uh1jv hhhj<hNhNubj )}(hX2**Definition**:: struct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; }; **Members** ``input_bus_flags`` Tells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `. ``setup_time_ps`` Defines the time in picoseconds the input data lines must be stable before the clock edge. ``hold_time_ps`` Defines the time in picoseconds taken for the bridge to sample the input signal after the clock edge. ``dual_link`` True if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubh:}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj`ubj, )}(hxstruct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; };h]hxstruct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; };}hj asbah}(h]h ]h"]h$]h&]j j uh1j+ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj`ubh)}(h **Members**h]j )}(hjah]hMembers}(hj ahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj`ubjU )}(hhh](jZ )}(h``input_bus_flags`` Tells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `. h](j` )}(h``input_bus_flags``h]jf )}(hj=ah]hinput_bus_flags}(hj?ahhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;aubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj7aubj| )}(hhh]h)}(hTells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `.h](hyTells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also }(hjVahhhNhNubh)}(h8:c:type:`drm_display_info->bus_flags `h]jf )}(hj`ah]hdrm_display_info->bus_flags}(hjbahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj^aubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_infouh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjVaubh.}(hjVahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj}ahMhjSaubah}(h]h ]h"]h$]h&]uh1j{ hj7aubeh}(h]h ]h"]h$]h&]uh1jY hjRahMhj4aubjZ )}(hm``setup_time_ps`` Defines the time in picoseconds the input data lines must be stable before the clock edge. h](j` )}(h``setup_time_ps``h]jf )}(hjah]h setup_time_ps}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjaubj| )}(hhh]h)}(hZDefines the time in picoseconds the input data lines must be stable before the clock edge.h]hZDefines the time in picoseconds the input data lines must be stable before the clock edge.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjaubah}(h]h ]h"]h$]h&]uh1j{ hjaubeh}(h]h ]h"]h$]h&]uh1jY hjahMhj4aubjZ )}(hw``hold_time_ps`` Defines the time in picoseconds taken for the bridge to sample the input signal after the clock edge. h](j` )}(h``hold_time_ps``h]jf )}(hjah]h hold_time_ps}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjaubj| )}(hhh]h)}(heDefines the time in picoseconds taken for the bridge to sample the input signal after the clock edge.h]heDefines the time in picoseconds taken for the bridge to sample the input signal after the clock edge.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjaubah}(h]h ]h"]h$]h&]uh1j{ hjaubeh}(h]h ]h"]h$]h&]uh1jY hjahMhj4aubjZ )}(h``dual_link`` True if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h](j` )}(h ``dual_link``h]jf )}(hjbh]h dual_link}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj bubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjbubj| )}(hhh]h)}(hTrue if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h]hTrue if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.}(hj'bhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj$bubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hj#bhMhj4aubeh}(h]h ]h"]h$]h&]uh1jT hj`ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_ops (C enum)c.drm_bridge_opshNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hdrm_bridge_opsh]j )}(henum drm_bridge_opsh](j )}(hj+h]henum}(hjhbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdbhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMubj )}(h h]h }(hjvbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdbhhhjubhMubj )}(hdrm_bridge_opsh]j )}(hjbbh]hdrm_bridge_ops}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ](j j eh"]h$]h&]j j uh1j hjdbhhhjubhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj`bhhhjubhMubah}(h]j[bah ](j j eh"]h$]h&]j j )j huh1j{ hjubhMhj]bhhubj )}(hhh]h)}(h-Bitmask of operations supported by the bridgeh]h-Bitmask of operations supported by the bridge}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjbhhubah}(h]h ]h"]h$]h&]uh1j hj]bhhhjubhMubeh}(h]h ](j enumeh"]h$]h&]j j j jbj jbj j j uh1jv hhhj<hNhNubj )}(hX**Constants** ``DRM_BRIDGE_OP_DETECT`` The bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback. ``DRM_BRIDGE_OP_EDID`` The bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback. ``DRM_BRIDGE_OP_HPD`` The bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically. ``DRM_BRIDGE_OP_MODES`` The bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback. ``DRM_BRIDGE_OP_HDMI`` The bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. ``DRM_BRIDGE_OP_HDMI_AUDIO`` The bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag. ``DRM_BRIDGE_OP_DP_AUDIO`` The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag. ``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER`` The bridge requires CEC notifier to be present. ``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER`` The bridge requires CEC adapter to be present. ``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks. ``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](h)}(h **Constants**h]j )}(hjbh]h Constants}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjbubjU )}(hhh](jZ )}(h``DRM_BRIDGE_OP_DETECT`` The bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback. h](j` )}(h``DRM_BRIDGE_OP_DETECT``h]jf )}(hjbh]hDRM_BRIDGE_OP_DETECT}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjbubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjbubj| )}(hhh]h)}(hThe bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback.h](hgThe bridge can detect displays connected to its output. Bridges that set this flag shall implement the }(hjchhhNhNubh)}(h5:c:type:`drm_bridge_funcs->detect `h]jf )}(hjch]hdrm_bridge_funcs->detect}(hjchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj cubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjcubh callback.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+chMhjcubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hjchMhjbubjZ )}(h``DRM_BRIDGE_OP_EDID`` The bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback. h](j` )}(h``DRM_BRIDGE_OP_EDID``h]jf )}(hjHch]hDRM_BRIDGE_OP_EDID}(hjJchhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFcubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjBcubj| )}(hhh]h)}(hThe bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback.h](hxThe bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the }(hjachhhNhNubh)}(h8:c:type:`drm_bridge_funcs->edid_read `h]jf )}(hjkch]hdrm_bridge_funcs->edid_read}(hjmchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjicubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjacubh callback.}(hjachhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchMhj^cubah}(h]h ]h"]h$]h&]uh1j{ hjBcubeh}(h]h ]h"]h$]h&]uh1jY hj]chMhjbubjZ )}(hXX``DRM_BRIDGE_OP_HPD`` The bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically. h](j` )}(h``DRM_BRIDGE_OP_HPD``h]jf )}(hjch]hDRM_BRIDGE_OP_HPD}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjcubj| )}(hhh]h)}(hXAThe bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically.h](hxThe bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the }(hjchhhNhNubh)}(h9:c:type:`drm_bridge_funcs->hpd_enable `h]jf )}(hjch]hdrm_bridge_funcs->hpd_enable}(hjchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjcubh and }(hjchhhNhNubh)}(h::c:type:`drm_bridge_funcs->hpd_disable `h]jf )}(hjch]hdrm_bridge_funcs->hpd_disable}(hjchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjchMhjcubhQ callbacks if they support enabling and disabling hot-plug detection dynamically.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hjchMhjbubjZ )}(hX.``DRM_BRIDGE_OP_MODES`` The bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback. h](j` )}(h``DRM_BRIDGE_OP_MODES``h]jf )}(hj%dh]hDRM_BRIDGE_OP_MODES}(hj'dhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#dubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjdubj| )}(hhh]h)}(hXThe bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback.h](hThe bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by }(hj>dhhhNhNubj )}(h**DRM_BRIDGE_OP_EDID**h]hDRM_BRIDGE_OP_EDID}(hjFdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>dubh1. Bridges that set this flag shall implement the }(hj>dhhhNhNubh)}(h8:c:type:`drm_bridge_funcs->get_modes `h]jf )}(hjZdh]hdrm_bridge_funcs->get_modes}(hj\dhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjXdubah}(h]h ]h"]h$]h&]refdocj  refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj>dubh callback.}(hj>dhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjwdhMhj;dubah}(h]h ]h"]h$]h&]uh1j{ hjdubeh}(h]h ]h"]h$]h&]uh1jY hj:dhMhjbubjZ )}(hXh``DRM_BRIDGE_OP_HDMI`` The bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. h](j` )}(h``DRM_BRIDGE_OP_HDMI``h]jf )}(hjdh]hDRM_BRIDGE_OP_HDMI}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjdubj| )}(hhh](h)}(hXThe bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks.h](hThe bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the }(hjdhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->clear_avi_infoframe `h]jf )}(hjdh]h%drm_bridge_funcs->clear_avi_infoframe}(hjdhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjdubh, }(hjdhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->write_avi_infoframe `h]jf )}(hjdh]h%drm_bridge_funcs->write_avi_infoframe}(hjdhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjdhMhjdubh, }hjdsbh)}(hC:c:type:`drm_bridge_funcs->clear_hdmi_infoframe `h]jf )}(hjdh]h&drm_bridge_funcs->clear_hdmi_infoframe}(hjehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjdhMhjdubh and }(hjdhhhNhNubh)}(hC:c:type:`drm_bridge_funcs->write_hdmi_infoframe `h]jf )}(hj!eh]h&drm_bridge_funcs->write_hdmi_infoframe}(hj#ehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjdhMhjdubh callbacks.}(hjdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjdhMhjdubh)}(hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers.h]hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers.}(hjHehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjdubeh}(h]h ]h"]h$]h&]uh1j{ hjdubeh}(h]h ]h"]h$]h&]uh1jY hjdhMhjbubjZ )}(hX ``DRM_BRIDGE_OP_HDMI_AUDIO`` The bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag. h](j` )}(h``DRM_BRIDGE_OP_HDMI_AUDIO``h]jf )}(hjieh]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjkehhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgeubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjceubj| )}(hhh](h)}(hXThe bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks.h](hYThe bridge provides HDMI audio operations. Bridges that set this flag must implement the }(hjehhhNhNubh)}(hA:c:type:`drm_bridge_funcs->hdmi_audio_prepare `h]jf )}(hjeh]h$drm_bridge_funcs->hdmi_audio_prepare}(hjehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjeubh and }(hjehhhNhNubh)}(hB:c:type:`drm_bridge_funcs->hdmi_audio_shutdown `h]jf )}(hjeh]h%drm_bridge_funcs->hdmi_audio_shutdown}(hjehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjehMhjeubh% callbacks. If the bridge implements }(hjehhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubh, it also must implement }(hjehhhNhNubh)}(hI:c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe `h]jf )}(hjeh]h,drm_bridge_funcs->hdmi_write_audio_infoframe}(hjehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjehMhjeubh and }hjesbh)}(hJ:c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe `h]jf )}(hjfh]h-drm_bridge_funcs->hdmi_cleaer_audio_infoframe}(hj fhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjehMhjeubh callbacks.}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjehMhjeubh)}(hXNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag.h](hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets }(hj/fhhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj7fhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/fubh* if there is a bridge that sets this flag.}(hj/fhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjeubeh}(h]h ]h"]h$]h&]uh1j{ hjceubeh}(h]h ]h"]h$]h&]uh1jY hj~ehMhjbubjZ )}(hX$``DRM_BRIDGE_OP_DP_AUDIO`` The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag. h](j` )}(h``DRM_BRIDGE_OP_DP_AUDIO``h]jf )}(hjbfh]hDRM_BRIDGE_OP_DP_AUDIO}(hjdfhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`fubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM+hj\fubj| )}(hhh](h)}(hThe bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks.h](h`The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the }(hj{fhhhNhNubh)}(h?:c:type:`drm_bridge_funcs->dp_audio_prepare `h]jf )}(hjfh]h"drm_bridge_funcs->dp_audio_prepare}(hjfhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM"hj{fubh and }(hj{fhhhNhNubh)}(h@:c:type:`drm_bridge_funcs->dp_audio_shutdown `h]jf )}(hjfh]h#drm_bridge_funcs->dp_audio_shutdown}(hjfhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjfhM"hj{fubh callbacks.}(hj{fhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjfhM"hjxfubh)}(hXNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag.h](hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets }(hjfhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubh* if there is a bridge that sets this flag.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM'hjxfubeh}(h]h ]h"]h$]h&]uh1j{ hj\fubeh}(h]h ]h"]h$]h&]uh1jY hjwfhM+hjbubjZ )}(hT``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER`` The bridge requires CEC notifier to be present. h](j` )}(h#``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER``h]jf )}(hjgh]hDRM_BRIDGE_OP_HDMI_CEC_NOTIFIER}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM/hjfubj| )}(hhh]h)}(h/The bridge requires CEC notifier to be present.h]h/The bridge requires CEC notifier to be present.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM.hjgubah}(h]h ]h"]h$]h&]uh1j{ hjfubeh}(h]h ]h"]h$]h&]uh1jY hjghM/hjbubjZ )}(hR``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER`` The bridge requires CEC adapter to be present. h](j` )}(h"``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER``h]jf )}(hj=gh]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj?ghhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;gubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM3hj7gubj| )}(hhh]h)}(h.The bridge requires CEC adapter to be present.h]h.The bridge requires CEC adapter to be present.}(hjVghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM2hjSgubah}(h]h ]h"]h$]h&]uh1j{ hj7gubeh}(h]h ]h"]h$]h&]uh1jY hjRghM3hjbubjZ )}(h``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks. h](j` )}(h(``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME``h]jf )}(hjwgh]h$DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME}(hjyghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjugubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM8hjqgubj| )}(hhh]h)}(hThe bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks.h](hThe bridge supports }(hjghhhNhNubh)}(hK:c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe `h]jf )}(hjgh]h.drm_bridge_funcs->hdmi_write_hdr_drm_infoframe}(hjghhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM6hjgubh and }(hjghhhNhNubh)}(hK:c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe `h]jf )}(hjgh]h.drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe}(hjghhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjghM6hjgubh callbacks.}(hjghhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjghM6hjgubah}(h]h ]h"]h$]h&]uh1j{ hjqgubeh}(h]h ]h"]h$]h&]uh1jY hjghM8hjbubjZ )}(h``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](j` )}(h$``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME``h]jf )}(hjgh]h DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM<hjgubj| )}(hhh]h)}(hThe bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](hThe bridge supports }(hjhhhhNhNubh)}(hG:c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe `h]jf )}(hjhh]h*drm_bridge_funcs->hdmi_write_spd_infoframe}(hjhhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjhubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM;hjhubh and }(hjhhhhNhNubh)}(hG:c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe `h]jf )}(hj>hh]h*drm_bridge_funcs->hdmi_clear_spd_infoframe}(hj@hhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:lhMxhj;lubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hj:lhMxhj=iubjZ )}(h``type`` Type of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display. h](j` )}(h``type``h]jf )}(hj^lh]htype}(hj`lhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\lubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM}hjXlubj| )}(hhh]h)}(hType of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display.h]hType of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display.}(hjwlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhM{hjtlubah}(h]h ]h"]h$]h&]uh1j{ hjXlubeh}(h]h ]h"]h$]h&]uh1jY hjslhM}hj=iubjZ )}(hL``interlace_allowed`` Indicate that the bridge can handle interlaced modes. h](j` )}(h``interlace_allowed``h]jf )}(hjlh]hinterlace_allowed}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjlubj| )}(hhh]h)}(h5Indicate that the bridge can handle interlaced modes.h]h5Indicate that the bridge can handle interlaced modes.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjlubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjlhMhj=iubjZ )}(hL``ycbcr_420_allowed`` Indicate that the bridge can handle YCbCr 420 output. h](j` )}(h``ycbcr_420_allowed``h]jf )}(hjlh]hycbcr_420_allowed}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjlubj| )}(hhh]h)}(h5Indicate that the bridge can handle YCbCr 420 output.h]h5Indicate that the bridge can handle YCbCr 420 output.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjlubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjlhMhj=iubjZ )}(hX``pre_enable_prev_first`` The bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral. h](j` )}(h``pre_enable_prev_first``h]jf )}(hj mh]hpre_enable_prev_first}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj mubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjmubj| )}(hhh]h)}(hThe bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral.h](h)The bridge requires that the prev bridge }(hj%mhhhNhNubj )}(h**pre_enable**h]h pre_enable}(hj-mhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%mubh function is called before its }(hj%mhhhNhNubj )}(h**pre_enable**h]h pre_enable}(hj?mhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%mubh, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral.}(hj%mhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj"mubah}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hj!mhMhj=iubjZ )}(h9``support_hdcp`` Indicate that the bridge supports HDCP. h](j` )}(h``support_hdcp``h]jf )}(hjjmh]h support_hdcp}(hjlmhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjhmubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjdmubj| )}(hhh]h)}(h'Indicate that the bridge supports HDCP.h]h'Indicate that the bridge supports HDCP.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjmubah}(h]h ]h"]h$]h&]uh1j{ hjdmubeh}(h]h ]h"]h$]h&]uh1jY hjmhMhj=iubjZ )}(h7``ddc`` Associated I2C adapter for DDC access, if any. h](j` )}(h``ddc``h]jf )}(hjmh]hddc}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjmubj| )}(hhh]h)}(h.Associated I2C adapter for DDC access, if any.h]h.Associated I2C adapter for DDC access, if any.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjmubah}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hjmhMhj=iubjZ )}(h``vendor`` Vendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. h](j` )}(h ``vendor``h]jf )}(hjmh]hvendor}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjmubj| )}(hhh]h)}(huVendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set.h](hWVendor of the product to be used for the SPD InfoFrame generation. This is required if }(hjmhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubh is set.}(hjmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjmubah}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hjmhMhj=iubjZ )}(h``product`` Name of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. h](j` )}(h ``product``h]jf )}(hj(nh]hproduct}(hj*nhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&nubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj"nubj| )}(hhh]h)}(hsName of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set.h](hUName of the product to be used for the SPD InfoFrame generation. This is required if }(hjAnhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjInhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAnubh is set.}(hjAnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj>nubah}(h]h ]h"]h$]h&]uh1j{ hj"nubeh}(h]h ]h"]h$]h&]uh1jY hj=nhMhj=iubjZ )}(h``supported_formats`` Bitmask of **drm_output_color_format** listing supported output formats. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. h](j` )}(h``supported_formats``h]jf )}(hjtnh]hsupported_formats}(hjvnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrnubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjnnubj| )}(hhh]h)}(hBitmask of **drm_output_color_format** listing supported output formats. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set.h](h Bitmask of }(hjnhhhNhNubj )}(h**drm_output_color_format**h]hdrm_output_color_format}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubh< listing supported output formats. This is only relevant if }(hjnhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubh is set.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjnubah}(h]h ]h"]h$]h&]uh1j{ hjnnubeh}(h]h ]h"]h$]h&]uh1jY hjnhMhj=iubjZ )}(h``max_bpc`` Maximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. h](j` )}(h ``max_bpc``h]jf )}(hjnh]hmax_bpc}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjnubj| )}(hhh]h)}(hMaximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set.h](hjMaximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if }(hjnhhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubh is set.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjnubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjnhMhj=iubjZ )}(hM``hdmi_cec_dev`` device to be used as a containing device for CEC functions. h](j` )}(h``hdmi_cec_dev``h]jf )}(hjoh]h hdmi_cec_dev}(hj ohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjoubj| )}(hhh]h)}(h;device to be used as a containing device for CEC functions.h]h;device to be used as a containing device for CEC functions.}(hj7ohhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj4oubah}(h]h ]h"]h$]h&]uh1j{ hjoubeh}(h]h ]h"]h$]h&]uh1jY hj3ohMhj=iubjZ )}(h``hdmi_audio_dev`` device to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set. h](j` )}(h``hdmi_audio_dev``h]jf )}(hjXoh]hhdmi_audio_dev}(hjZohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjVoubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjRoubj| )}(hhh]h)}(hdevice to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set.h](h>device to be used as a parent for the HDMI Codec if either of }(hjqohhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjyohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqoubh or }(hjqohhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqoubh is set.}(hjqohhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjnoubah}(h]h ]h"]h$]h&]uh1j{ hjRoubeh}(h]h ]h"]h$]h&]uh1jY hjmohMhj=iubjZ )}(h``hdmi_audio_max_i2s_playback_channels`` maximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](j` )}(h(``hdmi_audio_max_i2s_playback_channels``h]jf )}(hjoh]h$hdmi_audio_max_i2s_playback_channels}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjoubj| )}(hhh]h)}(hkmaximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](h0maximum number of playback I2S channels for the }(hjohhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubh or }(hjohhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubh.}(hjohhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjoubah}(h]h ]h"]h$]h&]uh1j{ hjoubeh}(h]h ]h"]h$]h&]uh1jY hjohMhj=iubjZ )}(h``hdmi_audio_i2s_formats`` supported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](j` )}(h``hdmi_audio_i2s_formats``h]jf )}(hjph]hhdmi_audio_i2s_formats}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjpubj| )}(hhh]h)}(hsupported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](hsupported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting }(hj-phhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj5phhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-pubh or }(hj-phhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjGphhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-pubh.}(hj-phhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj*pubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hj)phMhj=iubjZ )}(h``hdmi_audio_spdif_playback`` set if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](j` )}(h``hdmi_audio_spdif_playback``h]jf )}(hjrph]hhdmi_audio_spdif_playback}(hjtphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjppubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjlpubj| )}(hhh]h)}(hkset if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](h0set if this bridge has S/PDIF playback port for }(hjphhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh or }(hjphhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjlpubeh}(h]h ]h"]h$]h&]uh1jY hjphMhj=iubjZ )}(h``hdmi_audio_dai_port`` sound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used. h](j` )}(h``hdmi_audio_dai_port``h]jf )}(hjph]hhdmi_audio_dai_port}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjpubj| )}(hhh]h)}(hosound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used.h](hsound DAI port for either of }(hjphhhNhNubj )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh and }(hjphhhNhNubj )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh, -1 if it is not used.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphMhj=iubjZ )}(h>``hdmi_cec_adapter_name`` the name of the adapter to register h](j` )}(h``hdmi_cec_adapter_name``h]jf )}(hj.qh]hhdmi_cec_adapter_name}(hj0qhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,qubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj(qubj| )}(hhh]h)}(h#the name of the adapter to registerh]h#the name of the adapter to register}(hjGqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjCqhMhjDqubah}(h]h ]h"]h$]h&]uh1j{ hj(qubeh}(h]h ]h"]h$]h&]uh1jY hjCqhMhj=iubjZ )}(hS``hdmi_cec_available_las`` number of logical addresses, CEC_MAX_LOG_ADDRS if unset h](j` )}(h``hdmi_cec_available_las``h]jf )}(hjgqh]hhdmi_cec_available_las}(hjiqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjequbah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjaqubj| )}(hhh]h)}(h7number of logical addresses, CEC_MAX_LOG_ADDRS if unseth]h7number of logical addresses, CEC_MAX_LOG_ADDRS if unset}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|qhMhj}qubah}(h]h ]h"]h$]h&]uh1j{ hjaqubeh}(h]h ]h"]h$]h&]uh1jY hj|qhMhj=iubjZ )}(h?``hpd_mutex`` Protects the **hpd_cb** and **hpd_data** fields. h](j` )}(h ``hpd_mutex``h]jf )}(hjqh]h hpd_mutex}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjqubj| )}(hhh]h)}(h0Protects the **hpd_cb** and **hpd_data** fields.h](h Protects the }(hjqhhhNhNubj )}(h **hpd_cb**h]hhpd_cb}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubh and }(hjqhhhNhNubj )}(h **hpd_data**h]hhpd_data}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubh fields.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhMhjqubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjqhMhj=iubjZ )}(hQ``hpd_cb`` Hot plug detection callback, registered with drm_bridge_hpd_enable(). h](j` )}(h ``hpd_cb``h]jf )}(hjqh]hhpd_cb}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjqubj| )}(hhh]h)}(hEHot plug detection callback, registered with drm_bridge_hpd_enable().h]hEHot plug detection callback, registered with drm_bridge_hpd_enable().}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjrubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjrhMhj=iubjZ )}(hP``hpd_data`` Private data passed to the Hot plug detection callback **hpd_cb**. h](j` )}(h ``hpd_data``h]jf )}(hj7rh]hhpd_data}(hj9rhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5rubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj1rubj| )}(hhh]h)}(hBPrivate data passed to the Hot plug detection callback **hpd_cb**.h](h7Private data passed to the Hot plug detection callback }(hjPrhhhNhNubj )}(h **hpd_cb**h]hhpd_cb}(hjXrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPrubh.}(hjPrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjMrubah}(h]h ]h"]h$]h&]uh1j{ hj1rubeh}(h]h ]h"]h$]h&]uh1jY hjLrhMhj=iubjZ )}(hX``next_bridge`` Pointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h](j` )}(h``next_bridge``h]jf )}(hjrh]h next_bridge}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj}rubj| )}(hhh]h)}(hXPointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h]hXPointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhjrubah}(h]h ]h"]h$]h&]uh1j{ hj}rubeh}(h]h ]h"]h$]h&]uh1jY hjrhMhj=iubeh}(h]h ]h"]h$]h&]uh1jT hjhubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq devm_drm_bridge_alloc (C macro)c.devm_drm_bridge_allochNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hdevm_drm_bridge_alloch]j )}(hdevm_drm_bridge_alloch]j )}(hdevm_drm_bridge_alloch]j )}(hjrh]hdevm_drm_bridge_alloc}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ](j j eh"]h$]h&]j j uh1j hjrhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjrhMubah}(h]jrah ](j j eh"]h$]h&]j j )j huh1j{ hjrhMhjrhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjrhhhjrhMubeh}(h]h ](j macroeh"]h$]h&]j j j j sj j sj j j uh1jv hhhj<hNhNubh)}(h4``devm_drm_bridge_alloc (dev, type, member, funcs)``h]jf )}(hjsh]h0devm_drm_bridge_alloc (dev, type, member, funcs)}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:184: ./include/drm/drm_bridge.hhMhj<hhubjh]hstruct drm_bridge *bridge}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhj8ubj| )}(hhh]h)}(h DRM bridgeh]h DRM bridge}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShKhjTubah}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hjShKhj5ubjZ )}(hT``int *idx`` Pointer to index that will be passed to the matching drm_bridge_exit() h](j` )}(h ``int *idx``h]jf )}(hjwh]hint *idx}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjuubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjqubj| )}(hhh]h)}(hFPointer to index that will be passed to the matching drm_bridge_exit()h]hFPointer to index that will be passed to the matching drm_bridge_exit()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj5ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjubh)}(hThis function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested.h]hThis function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested.}(hjȃhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjubh)}(h **Return**h]j )}(hjكh]hReturn}(hjۃhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj׃ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjubh)}(h7True if it is OK to enter the section, false otherwise.h]h7True if it is OK to enter the section, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_exit (C function)c.drm_bridge_exithNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hvoid drm_bridge_exit (int idx)h]j )}(hvoid drm_bridge_exit(int idx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj,hKubj )}(hdrm_bridge_exith]j )}(hdrm_bridge_exith]hdrm_bridge_exit}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj,hKubj)}(h (int idx)h]j)}(hint idxh](j)}(hinth]hint}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(hidxh]hidx}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjSubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj,hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj,hKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj,hKhjhhubj )}(hhh]h)}(h Exit DRM bridge critical sectionh]h Exit DRM bridge critical section}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj,hKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(h**Parameters** ``int idx`` index returned by drm_bridge_enter() **Description** This function marks the end of a section that should not be entered after the bridge has been unplugged.h](h)}(h**Parameters**h]j )}(hjÄh]h Parameters}(hjńhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjubjU )}(hhh]jZ )}(h1``int idx`` index returned by drm_bridge_enter() h](j` )}(h ``int idx``h]jf )}(hjh]hint idx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhj܄ubj| )}(hhh]h)}(h$index returned by drm_bridge_enter()h]h$index returned by drm_bridge_enter()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hj܄ubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjلubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjubh)}(hhThis function marks the end of a section that should not be entered after the bridge has been unplugged.h]hhThis function marks the end of a section that should not be entered after the bridge has been unplugged.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_unplug (C function)c.drm_bridge_unplughNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(h2void drm_bridge_unplug (struct drm_bridge *bridge)h]j )}(h1void drm_bridge_unplug(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^hhhjphKubj )}(hdrm_bridge_unplugh]j )}(hdrm_bridge_unplugh]hdrm_bridge_unplug}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^hhhjphKubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_bridge_unplugasbuh1hhjubj )}(h h]h }(hj݅hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj^hhhjphKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZhhhjphKubah}(h]jUah ](j j eh"]h$]h&]j j )j huh1j{ hjphKhjWhhubj )}(hhh]h)}(h0declare a DRM bridge was unplugged and remove ith]h0declare a DRM bridge was unplugged and remove it}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjWhhhjphKubeh}(h]h ](j functioneh"]h$]h&]j j j j:j j:j j j uh1jv hhhj<hNhNubj )}(hXK**Parameters** ``struct drm_bridge *bridge`` DRM bridge **Description** This tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner. Also unregisters the bridge.h](h)}(h**Parameters**h]j )}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhj>ubjU )}(hhh]jZ )}(h)``struct drm_bridge *bridge`` DRM bridge h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjch]hstruct drm_bridge *bridge}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhj]ubj| )}(hhh]h)}(h DRM bridgeh]h DRM bridge}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhKhjyubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hjxhKhjZubah}(h]h ]h"]h$]h&]uh1jT hj>ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhj>ubh)}(hThis tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner.h]hThis tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhj>ubh)}(hAlso unregisters the bridge.h]hAlso unregisters the bridge.}(hjÆhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chKhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_get (C function)c.drm_bridge_gethNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(h>struct drm_bridge * drm_bridge_get (struct drm_bridge *bridge)h]j )}(h` for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code. **Note** the bridge passed should be the one closest to the encoder. **Return** MODE_OK on success, drm_mode_status Enum error code on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh](jZ )}(h=``struct drm_bridge *first_bridge`` bridge control structure h](j` )}(h#``struct drm_bridge *first_bridge``h]jf )}(hjh]hstruct drm_bridge *first_bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h_``const struct drm_display_info *info`` display info against which the mode shall be validated h](j` )}(h'``const struct drm_display_info *info``h]jf )}(hj?h]h#const struct drm_display_info *info}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj9ubj| )}(hhh]h)}(h6display info against which the mode shall be validatedh]h6display info against which the mode shall be validated}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThMhjUubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hjThMhjubjZ )}(hE``const struct drm_display_mode *mode`` desired mode to be validated h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hjxh]h#const struct drm_display_mode *mode}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjrubj| )}(hhh]h)}(hdesired mode to be validatedh]hdesired mode to be validated}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hCalls :c:type:`drm_bridge_funcs.mode_valid ` for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code.h](hCalls }(hjɘhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jf )}(hjӘh]hdrm_bridge_funcs.mode_valid}(hj՘hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjјubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjɘubh for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code.}(hjɘhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h**Note**h]j )}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h;the bridge passed should be the one closest to the encoder.h]h;the bridge passed should be the one closest to the encoder.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Return**h]j )}(hj$h]hReturn}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h>MODE_OK on success, drm_mode_status Enum error code on failureh]h>MODE_OK on success, drm_mode_status Enum error code on failure}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_bridge_chain_mode_set (C function)c.drm_bridge_chain_mode_sethNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hvoid drm_bridge_chain_mode_set (struct drm_bridge *first_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h]j )}(hvoid drm_bridge_chain_mode_set(struct drm_bridge *first_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h](j)}(hvoidh]hvoid}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjwhMubj )}(hdrm_bridge_chain_mode_seth]j )}(hdrm_bridge_chain_mode_seth]hdrm_bridge_chain_mode_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjwhMubj)}(ht(struct drm_bridge *first_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h](j)}(hstruct drm_bridge *first_bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjęhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjƙmodnameN classnameNj j )}j ]j)}jjsbc.drm_bridge_chain_mode_setasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h first_bridgeh]h first_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjSmodnameN classnameNj j )}j ]jc.drm_bridge_chain_mode_setasbuh1hhjubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj}hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h,const struct drm_display_mode *adjusted_modeh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj˚hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjܚhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٚubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjޚmodnameN classnameNj j )}j ]jc.drm_bridge_chain_mode_setasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h adjusted_modeh]h adjusted_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjehhhjwhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjwhMubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j{ hjwhMhj^hhubj )}(hhh]h)}(h6set proposed mode for all bridges in the encoder chainh]h6set proposed mode for all bridges in the encoder chain}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj<hhubah}(h]h ]h"]h$]h&]uh1j hj^hhhjwhMubeh}(h]h ](j functioneh"]h$]h&]j j j jWj jWj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *first_bridge`` bridge control structure ``const struct drm_display_mode *mode`` desired mode to be set for the encoder chain ``const struct drm_display_mode *adjusted_mode`` updated mode that works for this encoder chain **Description** Calls :c:type:`drm_bridge_funcs.mode_set ` op for all the bridges in the encoder chain, starting from the first bridge to the last. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j )}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj[ubjU )}(hhh](jZ )}(h=``struct drm_bridge *first_bridge`` bridge control structure h](j` )}(h#``struct drm_bridge *first_bridge``h]jf )}(hjh]hstruct drm_bridge *first_bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjzubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjzubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjwubjZ )}(hU``const struct drm_display_mode *mode`` desired mode to be set for the encoder chain h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hjh]h#const struct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(h,desired mode to be set for the encoder chainh]h,desired mode to be set for the encoder chain}(hjқhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjΛhMhjϛubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjΛhMhjwubjZ )}(h```const struct drm_display_mode *adjusted_mode`` updated mode that works for this encoder chain h](j` )}(h0``const struct drm_display_mode *adjusted_mode``h]jf )}(hjh]h,const struct drm_display_mode *adjusted_mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(h.updated mode that works for this encoder chainh]h.updated mode that works for this encoder chain}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjwubeh}(h]h ]h"]h$]h&]uh1jT hj[ubh)}(h**Description**h]j )}(hj-h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj[ubh)}(hCalls :c:type:`drm_bridge_funcs.mode_set ` op for all the bridges in the encoder chain, starting from the first bridge to the last.h](hCalls }(hjChhhNhNubh)}(h6:c:type:`drm_bridge_funcs.mode_set `h]jf )}(hjMh]hdrm_bridge_funcs.mode_set}(hjOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjCubhY op for all the bridges in the encoder chain, starting from the first bridge to the last.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjhMhj[ubh)}(h**Note**h]j )}(hjwh]hNote}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj[ubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_atomic_bridge_chain_disable (C function)!c.drm_atomic_bridge_chain_disablehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(havoid drm_atomic_bridge_chain_disable (struct drm_bridge *bridge, struct drm_atomic_commit *state)h]j )}(h`void drm_atomic_bridge_chain_disable(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hj˜hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjʜhMubj )}(hdrm_atomic_bridge_chain_disableh]j )}(hdrm_atomic_bridge_chain_disableh]hdrm_atomic_bridge_chain_disable}(hjݜhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٜubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjʜhMubj)}(h<(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjߜsb!c.drm_atomic_bridge_chain_disableasbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j3!c.drm_atomic_bridge_chain_disableasbuh1hhjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjgubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjʜhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjʜhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjʜhMhjhhubj )}(hhh]h)}(h)disables all bridges in the encoder chainh]h)disables all bridges in the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjʜhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX3**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_disable ` (falls back on :c:type:`drm_bridge_funcs.disable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_disable ` **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hj-h]hstruct drm_bridge *bridge}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj'ubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjCubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hjBhMhj$ubjZ )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjfh]hstruct drm_atomic_commit *state}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj`ubj| )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj|ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj{hMhj$ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXNCalls :c:type:`drm_bridge_funcs.atomic_disable ` (falls back on :c:type:`drm_bridge_funcs.disable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_disable `h](hCalls }(hjhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.atomic_disable `h]jf )}(hjh]hdrm_bridge_funcs.atomic_disable}(hjÞhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh (falls back on }(hjhhhNhNubh)}(h5:c:type:`drm_bridge_funcs.disable `h]jf )}(hjh]hdrm_bridge_funcs.disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjޞhMhjubh{) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hjhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jf )}(hjh]h'drm_encoder_helper_funcs.atomic_disable}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjޞhMhjubeh}(h]h ]h"]h$]h&]uh1hhjޞhMhjubh)}(h**Note**h]j )}(hj-h]hNote}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_atomic_bridge_chain_post_disable (C function)&c.drm_atomic_bridge_chain_post_disablehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hfvoid drm_atomic_bridge_chain_post_disable (struct drm_bridge *bridge, struct drm_atomic_commit *state)h]j )}(hevoid drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMDubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjhMDubj )}(h$drm_atomic_bridge_chain_post_disableh]j )}(h$drm_atomic_bridge_chain_post_disableh]h$drm_atomic_bridge_chain_post_disable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjhMDubj)}(h<(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj͟hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʟubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjϟmodnameN classnameNj j )}j ]j)}jjsb&c.drm_atomic_bridge_chain_post_disableasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j&c.drm_atomic_bridge_chain_post_disableasbuh1hhjubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjhMDubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjhMDubah}(h]jeah ](j j eh"]h$]h&]j j )j huh1j{ hjhMDhjghhubj )}(hhh]h)}(h:cleans up after disabling all bridges in the encoder chainh]h:cleans up after disabling all bridges in the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMDhjhhubah}(h]h ]h"]h$]h&]uh1j hjghhhjhMDubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_post_disable ` (falls back on :c:type:`drm_bridge_funcs.post_disable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_disable ` If a bridge sets **pre_enable_prev_first**, then the **post_disable** for that bridge will be called before the previous one to reverse the **pre_enable** calling direction. **Example** Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **post_disable** order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j )}(hjĠh]h Parameters}(hjƠhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMHhjubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMFhjݠubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1j{ hjݠubeh}(h]h ]h"]h$]h&]uh1jY hjhMFhjڠubjZ )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMGhjubj| )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMGhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hMGhjڠubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjWh]h Description}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMIhjubh)}(hXZCalls :c:type:`drm_bridge_funcs.atomic_post_disable ` (falls back on :c:type:`drm_bridge_funcs.post_disable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_disable `h](hCalls }(hjmhhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_post_disable `h]jf )}(hjwh]h$drm_bridge_funcs.atomic_post_disable}(hjyhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjuubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMHhjmubh (falls back on }(hjmhhhNhNubh)}(h::c:type:`drm_bridge_funcs.post_disable `h]jf )}(hjh]hdrm_bridge_funcs.post_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjhMHhjmubh}) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing }(hjmhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jf )}(hjh]h'drm_encoder_helper_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjhMHhjmubeh}(h]h ]h"]h$]h&]uh1hhjhMHhjubh)}(hIf a bridge sets **pre_enable_prev_first**, then the **post_disable** for that bridge will be called before the previous one to reverse the **pre_enable** calling direction.h](hIf a bridge sets }(hjhhhNhNubj )}(h**pre_enable_prev_first**h]hpre_enable_prev_first}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh , then the }(hjhhhNhNubj )}(h**post_disable**h]h post_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhG for that bridge will be called before the previous one to reverse the }(hjhhhNhNubj )}(h**pre_enable**h]h pre_enable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh calling direction.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMMhjubh)}(h **Example**h]j )}(hj(h]hExample}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMQhjubh)}(h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge Eh]h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMRhjubh)}(hWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **post_disable** order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.h](hLWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting }(hjMhhhNhNubj )}(h**post_disable**h]h post_disable}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubhB order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMThjubh)}(h**Note**h]j )}(hjph]hNote}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMXhjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMYhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_atomic_bridge_chain_pre_enable (C function)$c.drm_atomic_bridge_chain_pre_enablehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hdvoid drm_atomic_bridge_chain_pre_enable (struct drm_bridge *bridge, struct drm_atomic_commit *state)h]j )}(hcvoid drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjĢhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjâhMubj )}(h"drm_atomic_bridge_chain_pre_enableh]j )}(h"drm_atomic_bridge_chain_pre_enableh]h"drm_atomic_bridge_chain_pre_enable}(hj֢hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjҢubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjâhMubj)}(h<(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjآsb$c.drm_atomic_bridge_chain_pre_enableasbuh1hhjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j,$c.drm_atomic_bridge_chain_pre_enableasbuh1hhj`ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjâhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjâhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjâhMhjhhubj )}(hhh]h)}(h6prepares for enabling all bridges in the encoder chainh]h6prepares for enabling all bridges in the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjâhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_pre_enable ` (falls back on :c:type:`drm_bridge_funcs.pre_enable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_enable ` If a bridge sets **pre_enable_prev_first**, then the pre_enable for the prev bridge will be called before pre_enable of this bridge. **Example** Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **pre_enable** order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hj&h]hstruct drm_bridge *bridge}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj ubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj<ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj;hMhjubjZ )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj_h]hstruct drm_atomic_commit *state}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjYubj| )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjthMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXSCalls :c:type:`drm_bridge_funcs.atomic_pre_enable ` (falls back on :c:type:`drm_bridge_funcs.pre_enable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_enable `h](hCalls }(hjhhhNhNubh)}(h?:c:type:`drm_bridge_funcs.atomic_pre_enable `h]jf )}(hjh]h"drm_bridge_funcs.atomic_pre_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh (falls back on }(hjhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.pre_enable `h]jf )}(hjޤh]hdrm_bridge_funcs.pre_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjܤubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjפhMhjubh{) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hjhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jf )}(hjh]h&drm_encoder_helper_funcs.atomic_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjפhMhjubeh}(h]h ]h"]h$]h&]uh1hhjפhMhjubh)}(hIf a bridge sets **pre_enable_prev_first**, then the pre_enable for the prev bridge will be called before pre_enable of this bridge.h](hIf a bridge sets }(hj$hhhNhNubj )}(h**pre_enable_prev_first**h]hpre_enable_prev_first}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubhZ, then the pre_enable for the prev bridge will be called before pre_enable of this bridge.}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Example**h]j )}(hjGh]hExample}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge Eh]h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **pre_enable** order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.h](hLWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting }(hjlhhhNhNubj )}(h**pre_enable**h]h pre_enable}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubhB order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h**Note**h]j )}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_atomic_bridge_chain_enable (C function) c.drm_atomic_bridge_chain_enablehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hfvoid drm_atomic_bridge_chain_enable (struct drm_bridge *first_bridge, struct drm_atomic_commit *state)h]j )}(hevoid drm_atomic_bridge_chain_enable(struct drm_bridge *first_bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjԥhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjХhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjХhhhjhMubj )}(hdrm_atomic_bridge_chain_enableh]j )}(hdrm_atomic_bridge_chain_enableh]hdrm_atomic_bridge_chain_enable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjХhhhjhMubj)}(hB(struct drm_bridge *first_bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *first_bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j)}jjsb c.drm_atomic_bridge_chain_enableasbuh1hhj ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(h first_bridgeh]h first_bridge}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jK c.drm_atomic_bridge_chain_enableasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjͦhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjڦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjХhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj̥hhhjhMubah}(h]jǥah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjɥhhubj )}(hhh]h)}(h(enables all bridges in the encoder chainh]h(enables all bridges in the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjɥhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX8**Parameters** ``struct drm_bridge *first_bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_enable ` (falls back on :c:type:`drm_bridge_funcs.enable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_enable ` **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j )}(hj&h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj ubjU )}(hhh](jZ )}(h=``struct drm_bridge *first_bridge`` bridge control structure h](j` )}(h#``struct drm_bridge *first_bridge``h]jf )}(hjEh]hstruct drm_bridge *first_bridge}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj?ubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hjZhMhj<ubjZ )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj~h]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjxubj| )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj<ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj ubh)}(hXMCalls :c:type:`drm_bridge_funcs.atomic_enable ` (falls back on :c:type:`drm_bridge_funcs.enable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_enable `h](hCalls }(hjϧhhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]jf )}(hj٧h]hdrm_bridge_funcs.atomic_enable}(hjۧhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjקubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjϧubh (falls back on }(hjϧhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.enable `h]jf )}(hjh]hdrm_bridge_funcs.enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjhMhjϧubh}) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing }(hjϧhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jf )}(hj h]h&drm_encoder_helper_funcs.atomic_enable}(hj"hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjhMhjϧubeh}(h]h ]h"]h$]h&]uh1hhjhMhj ubh)}(h**Note**h]j )}(hjEh]hNote}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj ubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_atomic_bridge_chain_check (C function)c.drm_atomic_bridge_chain_checkhNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hint drm_atomic_bridge_chain_check (struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h]j )}(hint drm_atomic_bridge_chain_check(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_atomic_bridge_chain_checkh]j )}(hdrm_atomic_bridge_chain_checkh]hdrm_atomic_bridge_chain_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hf(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjǨhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjèubj )}(h h]h }(hjԨhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjèubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_atomic_bridge_chain_checkasbuh1hhjèubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjèubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjèubj )}(hbridgeh]hbridge}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjèubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]jc.drm_atomic_bridge_chain_checkasbuh1hhj5ubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj5ubj )}(h crtc_stateh]h crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjǩhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĩubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjɩmodnameN classnameNj j )}j ]jc.drm_atomic_bridge_chain_checkasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]j}ah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h&Do an atomic check on the bridge chainh]h&Do an atomic check on the bridge chain}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj'hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jBj jBj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_crtc_state *crtc_state`` new CRTC state ``struct drm_connector_state *conn_state`` new connector state **Description** First trigger a bus format negotiation before calling :c:type:`drm_bridge_funcs.atomic_check\(\) ` (falls back on :c:type:`drm_bridge_funcs.mode_fixup\(\) `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` **Return** 0 on success, a negative error code on failureh](h)}(h**Parameters**h]j )}(hjLh]h Parameters}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjFubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjkh]hstruct drm_bridge *bridge}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjeubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjeubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjbubjZ )}(h5``struct drm_crtc_state *crtc_state`` new CRTC state h](j` )}(h%``struct drm_crtc_state *crtc_state``h]jf )}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(hnew CRTC stateh]hnew CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjbubjZ )}(h?``struct drm_connector_state *conn_state`` new connector state h](j` )}(h*``struct drm_connector_state *conn_state``h]jf )}(hjݪh]h&struct drm_connector_state *conn_state}(hjߪhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj۪ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjתubj| )}(hhh]h)}(hnew connector stateh]hnew connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjתubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjbubeh}(h]h ]h"]h$]h&]uh1jT hjFubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjFubh)}(hXFirst trigger a bus format negotiation before calling :c:type:`drm_bridge_funcs.atomic_check\(\) ` (falls back on :c:type:`drm_bridge_funcs.mode_fixup\(\) `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h](h6First trigger a bus format negotiation before calling }(hj.hhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jf )}(hj8h]hdrm_bridge_funcs.atomic_check()}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj.ubh (falls back on }(hj.hhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]jf )}(hj\h]hdrm_bridge_funcs.mode_fixup()}(hj^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjUhMhj.ubh{) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hj.hhhNhNubh)}(hN:c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h]jf )}(hjh]h'drm_encoder_helper_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjUhMhj.ubeh}(h]h ]h"]h$]h&]uh1hhjUhMhjFubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjFubh)}(h.0 on success, a negative error code on failureh]h.0 on success, a negative error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjFubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_detect (C function)c.drm_bridge_detecthNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hhenum drm_connector_status drm_bridge_detect (struct drm_bridge *bridge, struct drm_connector *connector)h]j )}(hgenum drm_connector_status drm_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)h](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMOubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMOubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jdrm_bridge_detectsbc.drm_bridge_detectasbuh1hhjhhhjhMOubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMOubj )}(hdrm_bridge_detecth]j )}(hj&h]hdrm_bridge_detect}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMOubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]j$c.drm_bridge_detectasbuh1hhjRubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjRubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjƬhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¬ubj )}(h h]h }(hjӬhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¬ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j$c.drm_bridge_detectasbuh1hhj¬ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¬ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj¬ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¬ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMOubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMOubah}(h]jܫah ](j j eh"]h$]h&]j j )j huh1j{ hjhMOhjޫhhubj )}(hhh]h)}(h2check if anything is attached to the bridge outputh]h2check if anything is attached to the bridge output}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMOhjDhhubah}(h]h ]h"]h$]h&]uh1j hjޫhhhjhMOubeh}(h]h ](j functioneh"]h$]h&]j j j j_j j_j j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` attached connector **Description** If the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call :c:type:`drm_bridge_funcs.detect ` for the bridge and return the connection status. Otherwise return connector_status_unknown. **Return** The detection status on success, or connector_status_unknown if the bridge doesn't support output detection.h](h)}(h**Parameters**h]j )}(hjih]h Parameters}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMShjcubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMPhjubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMPhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMPhjubjZ )}(h7``struct drm_connector *connector`` attached connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjíhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMQhjubj| )}(hhh]h)}(hattached connectorh]hattached connector}(hjڭhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj֭hMQhj׭ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj֭hMQhjubeh}(h]h ]h"]h$]h&]uh1jT hjcubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMShjcubh)}(hIf the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call :c:type:`drm_bridge_funcs.detect ` for the bridge and return the connection status. Otherwise return connector_status_unknown.h](hgIf the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call }(hjhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.detect `h]jf )}(hjh]hdrm_bridge_funcs.detect}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMRhjubh\ for the bridge and return the connection status. Otherwise return connector_status_unknown.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj9hMRhjcubh)}(h **Return**h]j )}(hjFh]hReturn}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMWhjcubh)}(hlThe detection status on success, or connector_status_unknown if the bridge doesn't support output detection.h]hnThe detection status on success, or connector_status_unknown if the bridge doesn’t support output detection.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMXhjcubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_bridge_get_modes (C function)c.drm_bridge_get_modeshNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hUint drm_bridge_get_modes (struct drm_bridge *bridge, struct drm_connector *connector)h]j )}(hTint drm_bridge_get_modes(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMgubj )}(hdrm_bridge_get_modesh]j )}(hdrm_bridge_get_modesh]hdrm_bridge_get_modes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMgubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjȮhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĮubj )}(h h]h }(hjծhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĮubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_bridge_get_modesasbuh1hhjĮubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĮubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjĮubj )}(hbridgeh]hbridge}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĮubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]jc.drm_bridge_get_modesasbuh1hhj6ubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMgubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMgubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j{ hjhMghjhhubj )}(hhh]h)}(hBfill all modes currently valid for the sink into the **connector**h](h5fill all modes currently valid for the sink into the }(hjhhhNhNubj )}(h **connector**h]h connector}(hjïhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMghjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMgubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` the connector to fill with modes **Description** If the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call :c:type:`drm_bridge_funcs.get_modes ` to fill the connector with all valid modes and return the number of modes added. Otherwise return 0. **Return** The number of modes added to the connector.h](h)}(h**Parameters**h]j )}(hj0h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMkhjubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hj h]hstruct drm_bridge *bridge}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMihjubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMihj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMihjubjZ )}(hE``struct drm_connector *connector`` the connector to fill with modes h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjCh]hstruct drm_connector *connector}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMjhj=ubj| )}(hhh]h)}(h the connector to fill with modesh]h the connector to fill with modes}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMjhjYubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hjXhMjhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj~h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMlhjubh)}(hXIf the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call :c:type:`drm_bridge_funcs.get_modes ` to fill the connector with all valid modes and return the number of modes added. Otherwise return 0.h](hlIf the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call }(hjhhhNhNubh)}(h7:c:type:`drm_bridge_funcs.get_modes `h]jf )}(hjh]hdrm_bridge_funcs.get_modes}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMkhjubhe to fill the connector with all valid modes and return the number of modes added. Otherwise return 0.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMkhjubh)}(h **Return**h]j )}(hjȰh]hReturn}(hjʰhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjưubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMphjubh)}(h+The number of modes added to the connector.h]h+The number of modes added to the connector.}(hjްhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMqhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_bridge_edid_read (C function)c.drm_bridge_edid_readhNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hiconst struct drm_edid * drm_bridge_edid_read (struct drm_bridge *bridge, struct drm_connector *connector)h]j )}(hgconst struct drm_edid *drm_bridge_edid_read(struct drm_bridge *bridge, struct drm_connector *connector)h](j )}(hjAh]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j)}jdrm_bridge_edid_readsbc.drm_bridge_edid_readasbuh1hhj hhhjhMubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj)}(hjOh]h*}(hjvhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj hhhjhMubj )}(hdrm_bridge_edid_readh]j )}(hjeh]hdrm_bridge_edid_read}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj±modnameN classnameNj j )}j ]jcc.drm_bridge_edid_readasbuh1hhjubj )}(h h]h }(hjޱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2modnameN classnameNj j )}j ]jcc.drm_bridge_edid_readasbuh1hhjubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj\hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h+read the EDID data of the connected displayh]h+read the EDID data of the connected display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` the connector to read EDID for **Description** If the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call :c:type:`drm_bridge_funcs.edid_read ` to get the EDID and return it. Otherwise return NULL. **Return** The retrieved EDID on success, or NULL otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjԲh]hstruct drm_bridge *bridge}(hjֲhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjҲubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjβubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjβubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj˲ubjZ )}(hC``struct drm_connector *connector`` the connector to read EDID for h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj h]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(hthe connector to read EDID forh]hthe connector to read EDID for}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMhj#ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj"hMhj˲ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjHh]h Description}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hIf the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call :c:type:`drm_bridge_funcs.edid_read ` to get the EDID and return it. Otherwise return NULL.h](hjIf the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call }(hj^hhhNhNubh)}(h7:c:type:`drm_bridge_funcs.edid_read `h]jf )}(hjhh]hdrm_bridge_funcs.edid_read}(hjjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj^ubh6 to get the EDID and return it. Otherwise return NULL.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h1The retrieved EDID on success, or NULL otherwise.h]h1The retrieved EDID on success, or NULL otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_bridge_hpd_enable (C function)c.drm_bridge_hpd_enablehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(h|void drm_bridge_hpd_enable (struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h]j )}(h{void drm_bridge_hpd_enable(struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h](j)}(hvoidh]hvoid}(hj׳hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӳhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӳhhhjhMubj )}(hdrm_bridge_hpd_enableh]j )}(hdrm_bridge_hpd_enableh]hdrm_bridge_hpd_enable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjӳhhhjhMubj)}(ha(struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j)}jjsbc.drm_bridge_hpd_enableasbuh1hhjubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h8void (*cb)(void *data, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(h(h]h(}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcbh]hcb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(h)h]h)}(hj˴hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj)}(hjh]h(}(hjٴhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(h,h]h,}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj+h]henum}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]jNc.drm_bridge_hpd_enableasbuh1hhjubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstatush]hstatus}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjʹh]h)}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h void *datah](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjŵhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hjҵhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjӳhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjϳhhhjhMubah}(h]jʳah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhj̳hhubj )}(hhh]h)}(h(enable hot plug detection for the bridgeh]h(enable hot plug detection for the bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj̳hhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``void (*cb)(void *data, enum drm_connector_status status)`` hot-plug detection callback ``void *data`` data to be passed to the hot-plug detection callback **Description** Call :c:type:`drm_bridge_funcs.hpd_enable ` if implemented and register the given **cb** and **data** as hot plug notification callback. From now on the **cb** will be called with **data** when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable(). Hot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set. Only one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hj=h]hstruct drm_bridge *bridge}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj7ubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhMhjSubah}(h]h ]h"]h$]h&]uh1j{ hj7ubeh}(h]h ]h"]h$]h&]uh1jY hjRhMhj4ubjZ )}(hY``void (*cb)(void *data, enum drm_connector_status status)`` hot-plug detection callback h](j` )}(h<``void (*cb)(void *data, enum drm_connector_status status)``h]jf )}(hjvh]h8void (*cb)(void *data, enum drm_connector_status status)}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjpubj| )}(hhh]h)}(hhot-plug detection callbackh]hhot-plug detection callback}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj4ubjZ )}(hD``void *data`` data to be passed to the hot-plug detection callback h](j` )}(h``void *data``h]jf )}(hjh]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(h4data to be passed to the hot-plug detection callbackh]h4data to be passed to the hot-plug detection callback}(hjȶhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjĶhMhjŶubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjĶhMhj4ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXOCall :c:type:`drm_bridge_funcs.hpd_enable ` if implemented and register the given **cb** and **data** as hot plug notification callback. From now on the **cb** will be called with **data** when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable().h](hCall }(hjhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.hpd_enable `h]jf )}(hj h]hdrm_bridge_funcs.hpd_enable}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh' if implemented and register the given }(hjhhhNhNubj )}(h**cb**h]hcb}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**data**h]hdata}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh4 as hot plug notification callback. From now on the }(hjhhhNhNubj )}(h**cb**h]hcb}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh will be called with }(hjhhhNhNubj )}(h**data**h]hdata}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hMhjubh)}(hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h]hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hOnly one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.h]hOnly one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_bridge_hpd_disable (C function)c.drm_bridge_hpd_disablehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(h7void drm_bridge_hpd_disable (struct drm_bridge *bridge)h]j )}(h6void drm_bridge_hpd_disable(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjǷhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjƷhMubj )}(hdrm_bridge_hpd_disableh]j )}(hdrm_bridge_hpd_disableh]hdrm_bridge_hpd_disable}(hjٷhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjշubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjƷhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj۷sbc.drm_bridge_hpd_disableasbuh1hhjubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjAhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjƷhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjƷhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjƷhMhjhhubj )}(hhh]h)}(h)disable hot plug detection for the bridgeh]h)disable hot plug detection for the bridge}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjuhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjƷhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure **Description** Call :c:type:`drm_bridge_funcs.hpd_disable ` if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs. Hot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh]jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjҸhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjθhMhjϸubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjθhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXCall :c:type:`drm_bridge_funcs.hpd_disable ` if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs.h](hCall }(hj hhhNhNubh)}(h9:c:type:`drm_bridge_funcs.hpd_disable `h]jf )}(hjh]hdrm_bridge_funcs.hpd_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj ubh if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hMhjubh)}(hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h]hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_bridge_hpd_notify (C function)c.drm_bridge_hpd_notifyhNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hXvoid drm_bridge_hpd_notify (struct drm_bridge *bridge, enum drm_connector_status status)h]j )}(hWvoid drm_bridge_hpd_notify(struct drm_bridge *bridge, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjghhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjghhhjyhMubj )}(hdrm_bridge_hpd_notifyh]j )}(hdrm_bridge_hpd_notifyh]hdrm_bridge_hpd_notify}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjghhhjyhMubj)}(h=(struct drm_bridge *bridge, enum drm_connector_status status)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjƹhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjùubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjȹmodnameN classnameNj j )}j ]j)}jjsbc.drm_bridge_hpd_notifyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h enum drm_connector_status statush](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]jc.drm_bridge_hpd_notifyasbuh1hhjubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstatush]hstatus}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjghhhjyhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjchhhjyhMubah}(h]j^ah ](j j eh"]h$]h&]j j )j huh1j{ hjyhMhj`hhubj )}(hhh]h)}(h notify hot plug detection eventsh]h notify hot plug detection events}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj`hhhjyhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``enum drm_connector_status status`` output connection status **Description** Bridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable(). This function shall be called in a context that can sleep.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh](jZ )}(h7``struct drm_bridge *bridge`` bridge control structure h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjϺh]hstruct drm_bridge *bridge}(hjѺhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjͺubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjɺubj| )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjɺubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjƺubjZ )}(h>``enum drm_connector_status status`` output connection status h](j` )}(h$``enum drm_connector_status status``h]jf )}(hjh]h enum drm_connector_status status}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubj| )}(hhh]h)}(houtput connection statush]houtput connection status}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjƺubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjCh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hBridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable().h]hBridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable().}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h:This function shall be called in a context that can sleep.h]h:This function shall be called in a context that can sleep.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'of_drm_find_and_get_bridge (C function)c.of_drm_find_and_get_bridgehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hGstruct drm_bridge * of_drm_find_and_get_bridge (struct device_node *np)h]j )}(hEstruct drm_bridge *of_drm_find_and_get_bridge(struct device_node *np)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jof_drm_find_and_get_bridgesbc.of_drm_find_and_get_bridgeasbuh1hhjhhhjhMubj )}(h h]h }(hj׻hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMubj )}(hof_drm_find_and_get_bridgeh]j )}(hjԻh]hof_drm_find_and_get_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct device_node *np)h]j)}(hstruct device_node *nph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h device_nodeh]h device_node}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]jһc.of_drm_find_and_get_bridgeasbuh1hhj ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hnph]hnp}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hJfind the bridge corresponding to the device node in the global bridge listh]hJfind the bridge corresponding to the device node in the global bridge list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(h**Parameters** ``struct device_node *np`` device node **Description** The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** drm_bridge control struct on success, NULL on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubjU )}(hhh]jZ )}(h'``struct device_node *np`` device node h](j` )}(h``struct device_node *np``h]jf )}(hjӼh]hstruct device_node *np}(hjռhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjѼubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjͼubj| )}(hhh]h)}(h device nodeh]h device node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjͼubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjʼubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Return**h]j )}(hj5h]hReturn}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h5drm_bridge control struct on success, NULL on failureh]h5drm_bridge control struct on success, NULL on failure}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq of_drm_find_bridge (C function)c.of_drm_find_bridgehNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(h?struct drm_bridge * of_drm_find_bridge (struct device_node *np)h]j )}(h=struct drm_bridge *of_drm_find_bridge(struct device_node *np)h](j )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjhM ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jof_drm_find_bridgesbc.of_drm_find_bridgeasbuh1hhjvhhhjhM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjhM ubj)}(hjOh]h*}(hjȽhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjvhhhjhM ubj )}(hof_drm_find_bridgeh]j )}(hjh]hof_drm_find_bridge}(hjٽhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjսubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhjhM ubj)}(h(struct device_node *np)h]j)}(hstruct device_node *nph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.of_drm_find_bridgeasbuh1hhjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hnph]hnp}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjvhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjhM ubah}(h]jmah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjohhubj )}(hhh]h)}(hJfind the bridge corresponding to the device node in the global bridge listh]hJfind the bridge corresponding to the device node in the global bridge list}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM hjrhhubah}(h]h ]h"]h$]h&]uh1j hjohhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj<hNhNubj )}(hX@**Parameters** ``struct device_node *np`` device node **Description** This function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting. The bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of: - get a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer - not call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced - again, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do **Return** drm_bridge control struct on success, NULL on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM hjubjU )}(hhh]jZ )}(h'``struct device_node *np`` device node h](j` )}(h``struct device_node *np``h]jf )}(hjh]hstruct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM hjubj| )}(hhh]h)}(h device nodeh]h device node}(hjϾhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj˾hM hj̾ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj˾hM hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hdThis function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting.h]hdThis function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM hjubh)}(hThe bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of:h]hThe bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hhh](h)}(hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer h]h)}(hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointerh]hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhj(ubah}(h]h ]h"]h$]h&]uh1hhj%ubh)}(hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced h]h)}(hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introducedh]hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjAubah}(h]h ]h"]h$]h&]uh1hhj%ubh)}(hSagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do h]h)}(hRagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to doh]hRagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjZubah}(h]h ]h"]h$]h&]uh1hhj%ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj:hMhjubh)}(h **Return**h]j )}(hj{h]hReturn}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h5drm_bridge control struct on success, NULL on failureh]h5drm_bridge control struct on success, NULL on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj<hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *of_drm_get_bridge_by_endpoint (C function)c.of_drm_get_bridge_by_endpointhNtauh1jd hj<hhhNhNubjw )}(hhh](j| )}(hhstruct drm_bridge * of_drm_get_bridge_by_endpoint (const struct device_node *np, int port, int endpoint)h]j )}(hfstruct drm_bridge *of_drm_get_bridge_by_endpoint(const struct device_node *np, int port, int endpoint)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM3ubj )}(h h]h }(hjοhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjͿhM3ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj߿hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܿubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jof_drm_get_bridge_by_endpointsbc.of_drm_get_bridge_by_endpointasbuh1hhjhhhjͿhM3ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjͿhM3ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjͿhM3ubj )}(hof_drm_get_bridge_by_endpointh]j )}(hjh]hof_drm_get_bridge_by_endpoint}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjͿhM3ubj)}(h6(const struct device_node *np, int port, int endpoint)h](j)}(hconst struct device_node *nph](j )}(hjAh]hconst}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(hj h]hstruct}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(h device_nodeh]h device_node}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]jc.of_drm_get_bridge_by_endpointasbuh1hhj6ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(hnph]hnp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubj)}(hint porth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubj)}(h int endpointh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendpointh]hendpoint}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjͿhM3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjͿhM3ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjͿhM3hjhhubj )}(hhh]h)}(h.return DRM bridge connected to a port/endpointh]h.return DRM bridge connected to a port/endpoint}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM3hj=hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjͿhM3ubeh}(h]h ](j functioneh"]h$]h&]j j j jXj jXj j j uh1jv hhhj<hNhNubj )}(hX0**Parameters** ``const struct device_node *np`` device tree node containing output ports ``int port`` port in the device tree node, or -1 for the first port found ``int endpoint`` endpoint in the device tree node, or -1 for the first endpoint found **Description** Given a DT node's port and endpoint number, find the connected node and return the associated drm_bridge device. The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. Returns a pointer to the connected drm_bridge, or a negative error on failureh](h)}(h**Parameters**h]j )}(hjbh]h Parameters}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM7hj\ubjU )}(hhh](jZ )}(hJ``const struct device_node *np`` device tree node containing output ports h](j` )}(h ``const struct device_node *np``h]jf )}(hjh]hconst struct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM4hj{ubj| )}(hhh]h)}(h(device tree node containing output portsh]h(device tree node containing output ports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hjhM4hjxubjZ )}(hJ``int port`` port in the device tree node, or -1 for the first port found h](j` )}(h ``int port``h]jf )}(hjh]hint port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/drm_bridge.chM5hjubj| )}(hhh]h)}(hops `) and bridge output type (:c:type:`drm_bridge->type `), and none of them may create a DRM connector directly. Returns a pointer to the new connector on success, or a negative error pointer otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:200: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubjU )}(hhh](jZ )}(h*``struct drm_device *drm`` the DRM device h](j` )}(h``struct drm_device *drm``h]jf )}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:200: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubj| )}(hhh]h)}(hthe DRM deviceh]hthe DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hJ``struct drm_encoder *encoder`` the encoder where the bridge chain starts h](j` )}(h``struct drm_encoder *encoder``h]jf )}(hj h]hstruct drm_encoder *encoder}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:200: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubj| )}(hhh]h)}(h)the encoder where the bridge chain startsh]h)the encoder where the bridge chain starts}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjDh]h Description}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:200: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubh)}(hCreate a new :c:type:`drm_bridge_connector` for the **drm** device. The connector is allocated, initialised, registered with the **drm** device and attached to **encoder**.h](h Create a new }(hjZhhhNhNubh)}(h:c:type:`drm_bridge_connector`h]jf )}(hjdh]hdrm_bridge_connector}(hjfhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjbubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_connectoruh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:200: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjZubh for the }(hjZhhhNhNubj )}(h**drm**h]hdrm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubhF device. The connector is allocated, initialised, registered with the }(hjZhhhNhNubj )}(h**drm**h]hdrm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubh device and attached to }(hjZhhhNhNubj )}(h **encoder**h]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubh.}(hjZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hX1The connector is associated with a chain of bridges that starts at the **encoder**. All bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), and none of them may create a DRM connector directly.h](hGThe connector is associated with a chain of bridges that starts at the }(hjhhhNhNubj )}(h **encoder**h]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh@. All bridges in the chain shall report bridge operation flags (}(hjhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jf )}(hjh]hdrm_bridge->ops}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:200: ./drivers/gpu/drm/display/drm_bridge_connector.chM hjubh) and bridge output type (}(hjhhhNhNubh)}(h':c:type:`drm_bridge->type `h]jf )}(hjh]hdrm_bridge->type}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjhM hjubh8), and none of them may create a DRM connector directly.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hYReturns a pointer to the new connector on success, or a negative error pointer otherwise.h]hYReturns a pointer to the new connector on success, or a negative error pointer otherwise.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:200: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubeh}(h]jlah ]h"]!bridge connector helper referenceah$]h&]uh1hhj\3hhhhhKubh)}(hhh](h)}(hPanel-Bridge Helper Referenceh]hPanel-Bridge Helper Reference}(hjIhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjFhhhhhKubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_bridge_is_panel (C function)c.drm_bridge_is_panelhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(h:bool drm_bridge_is_panel (const struct drm_bridge *bridge)h]j )}(h9bool drm_bridge_is_panel(const struct drm_bridge *bridge)h](j)}(hjIh]hbool}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlhhhj}hKubj )}(hdrm_bridge_is_panelh]j )}(hdrm_bridge_is_panelh]hdrm_bridge_is_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjlhhhj}hKubj)}(h!(const struct drm_bridge *bridge)h]j)}(hconst struct drm_bridge *bridgeh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_bridge_is_panelasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjlhhhj}hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhhj}hKubah}(h]jcah ](j j eh"]h$]h&]j j )j huh1j{ hj}hKhjehhubj )}(hhh]h)}(h)Checks if a drm_bridge is a panel_bridge.h]h)Checks if a drm_bridge is a panel_bridge.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjGhhubah}(h]h ]h"]h$]h&]uh1j hjehhhj}hKubeh}(h]h ](j functioneh"]h$]h&]j j j jbj jbj j j uh1jv hhhjFhNhNubj )}(h**Parameters** ``const struct drm_bridge *bridge`` The drm_bridge to be checked. **Description** Returns true if the bridge is a panel bridge, or false otherwise.h](h)}(h**Parameters**h]j )}(hjlh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjfubjU )}(hhh]jZ )}(hB``const struct drm_bridge *bridge`` The drm_bridge to be checked. h](j` )}(h#``const struct drm_bridge *bridge``h]jf )}(hjh]hconst struct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjubj| )}(hhh]h)}(hThe drm_bridge to be checked.h]hThe drm_bridge to be checked.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjfubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjfubh)}(hAReturns true if the bridge is a panel bridge, or false otherwise.h]hAReturns true if the bridge is a panel bridge, or false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjfubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_panel_bridge_add (C function)c.drm_panel_bridge_addhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(hBstruct drm_bridge * drm_panel_bridge_add (struct drm_panel *panel)h]j )}(h@struct drm_bridge *drm_panel_bridge_add(struct drm_panel *panel)h](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j)}jdrm_panel_bridge_addsbc.drm_panel_bridge_addasbuh1hhjhhhjhKubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj)}(hjOh]h*}(hjYhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhKubj )}(hdrm_panel_bridge_addh]j )}(hjHh]hdrm_panel_bridge_add}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jFc.drm_panel_bridge_addasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h~Creates a :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](h Creates a }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jFc.drm_panel_bridge_addasbj drm_bridgeuh1hhj}hKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj8h]h drm_connector}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j,j drm_connectoruh1hhj}hKhjubh0 that just calls the appropriate functions from }(hjhhhNhNubh)}(h:c:type:`drm_panel`h]jf )}(hj[h]h drm_panel}(hj]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j,j drm_paneluh1hhj}hKhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(hX;**Parameters** ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** For drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they're now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it. The connector type is set to **panel->connector_type**, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL). See devm_drm_panel_bridge_add() for an automatically managed version of this function.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjubjU )}(hhh]jZ )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjubj| )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hXFor drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they're now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it.h]hXFor drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they’re now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hThe connector type is set to **panel->connector_type**, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL).h](hThe connector type is set to }(hjhhhNhNubj )}(h**panel->connector_type**h]hpanel->connector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hVSee devm_drm_panel_bridge_add() for an automatically managed version of this function.h]hVSee devm_drm_panel_bridge_add() for an automatically managed version of this function.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_panel_bridge_add_typed (C function)c.drm_panel_bridge_add_typedhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(h\struct drm_bridge * drm_panel_bridge_add_typed (struct drm_panel *panel, u32 connector_type)h]j )}(hZstruct drm_bridge *drm_panel_bridge_add_typed(struct drm_panel *panel, u32 connector_type)h](j )}(hj h]hstruct}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhjrhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_panel_bridge_add_typedsbc.drm_panel_bridge_add_typedasbuh1hhjahhhjrhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhjrhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjahhhjrhMubj )}(hdrm_panel_bridge_add_typedh]j )}(hjh]hdrm_panel_bridge_add_typed}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjahhhjrhMubj)}(h-(struct drm_panel *panel, u32 connector_type)h](j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_panel_bridge_add_typedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 connector_typeh](h)}(hhh]j )}(hu32h]hu32}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]jc.drm_panel_bridge_add_typedasbuh1hhjKubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj )}(hconnector_typeh]hconnector_type}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjahhhjrhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj]hhhjrhMubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j{ hjrhMhjZhhubj )}(hhh]h)}(h[Creates a :c:type:`drm_bridge` and :c:type:`drm_connector` with an explicit connector type.h](h Creates a }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_panel_bridge_add_typedasbj drm_bridgeuh1hhj}hKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_connectoruh1hhj}hKhjubh! with an explicit connector type.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjZhhhjrhMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjFhNhNubj )}(hX**Parameters** ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. ``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) **Description** This is just like drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel. This function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubjU )}(hhh](jZ )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j` )}(h``struct drm_panel *panel``h]jf )}(hj4h]hstruct drm_panel *panel}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhj.ubj| )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hjIhMhj+ubjZ )}(hA``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) h](j` )}(h``u32 connector_type``h]jf )}(hjmh]hu32 connector_type}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjgubj| )}(hhh]h)}(h)The connector type (DRM_MODE_CONNECTOR_*)h]h)The connector type (DRM_MODE_CONNECTOR_*)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj+ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis is just like drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel.h](hKThis is just like drm_panel_bridge_add(), but forces the connector type to }(hjhhhNhNubj )}(h**connector_type**h]hconnector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh' instead of infering it from the panel.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h]hThis function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don’t report a connector type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_panel_bridge_remove (C function)c.drm_panel_bridge_removehNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(h8void drm_panel_bridge_remove (struct drm_bridge *bridge)h]j )}(h7void drm_panel_bridge_remove(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM7ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhM7ubj )}(hdrm_panel_bridge_removeh]j )}(hdrm_panel_bridge_removeh]hdrm_panel_bridge_remove}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhM7ubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j)}jj1sbc.drm_panel_bridge_removeasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubah}(h]h ]h"]h$]h&]j j uh1jhj hhhjhM7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM7ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM7hjhhubj )}(hhh]h)}(hEUnregisters and frees a drm_bridge created by drm_panel_bridge_add().h]hEUnregisters and frees a drm_bridge created by drm_panel_bridge_add().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM7hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM7ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(hK**Parameters** ``struct drm_bridge *bridge`` The drm_bridge being freed.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM;hjubjU )}(hhh]jZ )}(h9``struct drm_bridge *bridge`` The drm_bridge being freed.h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM=hj ubj| )}(hhh]h)}(hThe drm_bridge being freed.h]hThe drm_bridge being freed.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM:hj%ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj$hM=hjubah}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_panel_bridge_set_orientation (C function)"c.drm_panel_bridge_set_orientationhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(haint drm_panel_bridge_set_orientation (struct drm_connector *connector, struct drm_bridge *bridge)h]j )}(h`int drm_panel_bridge_set_orientation(struct drm_connector *connector, struct drm_bridge *bridge)h](j)}(hinth]hint}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMQubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjwhMQubj )}(h drm_panel_bridge_set_orientationh]j )}(h drm_panel_bridge_set_orientationh]h drm_panel_bridge_set_orientation}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjwhMQubj)}(h<(struct drm_connector *connector, struct drm_bridge *bridge)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb"c.drm_panel_bridge_set_orientationasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j"c.drm_panel_bridge_set_orientationasbuh1hhjubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjbhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbridgeh]hbridge}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjehhhjwhMQubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjwhMQubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j{ hjwhMQhj^hhubj )}(hhh]h)}(h^Set the connector's panel orientation from the bridge that can be transformed to panel bridge.h]h`Set the connector’s panel orientation from the bridge that can be transformed to panel bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMQhjhhubah}(h]h ]h"]h$]h&]uh1j hj^hhhjwhMQubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(h**Parameters** ``struct drm_connector *connector`` The connector to be set panel orientation. ``struct drm_bridge *bridge`` The drm_bridge to be transformed to panel bridge. **Description** Returns 0 on success, negative errno on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMUhjubjU )}(hhh](jZ )}(hO``struct drm_connector *connector`` The connector to be set panel orientation. h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMThjubj| )}(hhh]h)}(h*The connector to be set panel orientation.h]h*The connector to be set panel orientation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMThjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMThjubjZ )}(hP``struct drm_bridge *bridge`` The drm_bridge to be transformed to panel bridge. h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMUhj ubj| )}(hhh]h)}(h1The drm_bridge to be transformed to panel bridge.h]h1The drm_bridge to be transformed to panel bridge.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMUhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj(hMUhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjNh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMWhjubh)}(h0Returns 0 on success, negative errno on failure.h]h0Returns 0 on success, negative errno on failure.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMVhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &devm_drm_panel_bridge_add (C function)c.devm_drm_panel_bridge_addhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(h[struct drm_bridge * devm_drm_panel_bridge_add (struct device *dev, struct drm_panel *panel)h]j )}(hYstruct drm_bridge *devm_drm_panel_bridge_add(struct device *dev, struct drm_panel *panel)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMpubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdevm_drm_panel_bridge_addsbc.devm_drm_panel_bridge_addasbuh1hhjhhhjhMpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMpubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMpubj )}(hdevm_drm_panel_bridge_addh]j )}(hjh]hdevm_drm_panel_bridge_add}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMpubj)}(h-(struct device *dev, struct drm_panel *panel)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdeviceh]hdevice}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]jc.devm_drm_panel_bridge_addasbuh1hhj ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hdevh]hdev}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.devm_drm_panel_bridge_addasbuh1hhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjyubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMpubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMpubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMphjhhubj )}(hhh]h)}(hCreates a managed :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](hCreates a managed }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hjh]h drm_bridge}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.devm_drm_panel_bridge_addasbj drm_bridgeuh1hhj}hKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj0h]h drm_connector}(hj2hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j$j drm_connectoruh1hhj}hKhjubh0 that just calls the appropriate functions from }(hjhhhNhNubh)}(h:c:type:`drm_panel`h]jf )}(hjSh]h drm_panel}(hjUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j$j drm_paneluh1hhj}hKhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMphjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMpubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(hX1**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** This is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is unbound.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMthjubjU )}(hhh](jZ )}(h<``struct device *dev`` device to tie the bridge lifetime to h](j` )}(h``struct device *dev``h]jf )}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMrhjubj| )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMrhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMrhjubjZ )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMshjubj| )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMshjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMshjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMuhjubh)}(hThis is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is unbound.h](hoThis is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when }(hj7hhhNhNubj )}(h**dev**h]hdev}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh is unbound.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMthjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,devm_drm_panel_bridge_add_typed (C function)!c.devm_drm_panel_bridge_add_typedhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(hustruct drm_bridge * devm_drm_panel_bridge_add_typed (struct device *dev, struct drm_panel *panel, u32 connector_type)h]j )}(hsstruct drm_bridge *devm_drm_panel_bridge_add_typed(struct device *dev, struct drm_panel *panel, u32 connector_type)h](j )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdevm_drm_panel_bridge_add_typedsb!c.devm_drm_panel_bridge_add_typedasbuh1hhjthhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjthhhjhMubj )}(hdevm_drm_panel_bridge_add_typedh]j )}(hjh]hdevm_drm_panel_bridge_add_typed}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjthhhjhMubj)}(hA(struct device *dev, struct drm_panel *panel, u32 connector_type)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.devm_drm_panel_bridge_add_typedasbuh1hhjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.devm_drm_panel_bridge_add_typedasbuh1hhj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^ubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 connector_typeh](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.devm_drm_panel_bridge_add_typedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hconnector_typeh]hconnector_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjthhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjphhhjhMubah}(h]jkah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjmhhubj )}(hhh]h)}(hcCreates a managed :c:type:`drm_bridge` and :c:type:`drm_connector` with an explicit connector type.h](hCreates a managed }(hj+hhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hj5h]h drm_bridge}(hj7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j!c.devm_drm_panel_bridge_add_typedasbj drm_bridgeuh1hhj}hKhj+ubh and }(hj+hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hj]h]h drm_connector}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jQj drm_connectoruh1hhj}hKhj+ubh! with an explicit connector type.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhj(hhubah}(h]h ]h"]h$]h&]uh1j hjmhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(hX3**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. ``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) **Description** This is just like devm_drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel. This function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubjU )}(hhh](jZ )}(h<``struct device *dev`` device to tie the bridge lifetime to h](j` )}(h``struct device *dev``h]jf )}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubj| )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubj| )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hA``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) h](j` )}(h``u32 connector_type``h]jf )}(hj)h]hu32 connector_type}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhj#ubj| )}(hhh]h)}(h)The connector type (DRM_MODE_CONNECTOR_*)h]h)The connector type (DRM_MODE_CONNECTOR_*)}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj?ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj>hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjdh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis is just like devm_drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel.h](hPThis is just like devm_drm_panel_bridge_add(), but forces the connector type to }(hjzhhhNhNubj )}(h**connector_type**h]hconnector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubh' instead of infering it from the panel.}(hjzhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h]hThis function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don’t report a connector type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drmm_panel_bridge_add (C function)c.drmm_panel_bridge_addhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(h[struct drm_bridge * drmm_panel_bridge_add (struct drm_device *drm, struct drm_panel *panel)h]j )}(hYstruct drm_bridge *drmm_panel_bridge_add(struct drm_device *drm, struct drm_panel *panel)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrmm_panel_bridge_addsbc.drmm_panel_bridge_addasbuh1hhjhhhjhMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMubj )}(hdrmm_panel_bridge_addh]j )}(hjh]hdrmm_panel_bridge_add}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h1(struct drm_device *drm, struct drm_panel *panel)h](j)}(hstruct drm_device *drmh](j )}(hj h]hstruct}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]jc.drmm_panel_bridge_addasbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(hdrmh]hdrm}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drmm_panel_bridge_addasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hCreates a DRM-managed :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](hCreates a DRM-managed }(hj5hhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hj?h]h drm_bridge}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drmm_panel_bridge_addasbj drm_bridgeuh1hhj}hKhj5ubh and }(hj5hhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjgh]h drm_connector}(hjihhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j[j drm_connectoruh1hhj}hKhj5ubh0 that just calls the appropriate functions from }(hj5hhhNhNubh)}(h:c:type:`drm_panel`h]jf )}(hjh]h drm_panel}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j[j drm_paneluh1hhj}hKhj5ubh.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhj2hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(hX@**Parameters** ``struct drm_device *drm`` DRM device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** This is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is cleaned up.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubjU )}(hhh](jZ )}(hD``struct drm_device *drm`` DRM device to tie the bridge lifetime to h](j` )}(h``struct drm_device *drm``h]jf )}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubj| )}(hhh]h)}(h(DRM device to tie the bridge lifetime toh]h(DRM device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubj| )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj3ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj2hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjXh]h Description}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is cleaned up.h](hsThis is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when }(hjnhhhNhNubj )}(h**dev**h]hdev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubh is cleaned up.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_panel_bridge_connector (C function)c.drm_panel_bridge_connectorhNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(hMstruct drm_connector * drm_panel_bridge_connector (struct drm_bridge *bridge)h]j )}(hKstruct drm_connector *drm_panel_bridge_connector(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_panel_bridge_connectorsbc.drm_panel_bridge_connectorasbuh1hhjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMubj )}(hdrm_panel_bridge_connectorh]j )}(hjh]hdrm_panel_bridge_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jc.drm_panel_bridge_connectorasbuh1hhj%ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h)return the connector for the panel bridgeh]h)return the connector for the panel bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(h**Parameters** ``struct drm_bridge *bridge`` The drm_bridge. **Description** drm_panel_bridge creates the connector. This function gives external access to the connector. **Return** Pointer to drm_connectorh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubjU )}(hhh]jZ )}(h.``struct drm_bridge *bridge`` The drm_bridge. h](j` )}(h``struct drm_bridge *bridge``h]jf )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubj| )}(hhh]h)}(hThe drm_bridge.h]hThe drm_bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj&h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(h]drm_panel_bridge creates the connector. This function gives external access to the connector.h]h]drm_panel_bridge creates the connector. This function gives external access to the connector.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(h **Return**h]j )}(hjMh]hReturn}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hPointer to drm_connectorh]hPointer to drm_connector}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #devm_drm_of_get_bridge (C function)c.devm_drm_of_get_bridgehNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(hostruct drm_bridge * devm_drm_of_get_bridge (struct device *dev, struct device_node *np, u32 port, u32 endpoint)h]j )}(hmstruct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *np, u32 port, u32 endpoint)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdevm_drm_of_get_bridgesbc.devm_drm_of_get_bridgeasbuh1hhjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMubj )}(hdevm_drm_of_get_bridgeh]j )}(hjh]hdevm_drm_of_get_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hD(struct device *dev, struct device_node *np, u32 port, u32 endpoint)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]jc.devm_drm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjVhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct device_node *nph](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.devm_drm_of_get_bridgeasbuh1hhjxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjxubj )}(hnph]hnp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 porth](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.devm_drm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u32 endpointh](h)}(hhh]j )}(hu32h]hu32}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]jc.devm_drm_of_get_bridgeasbuh1hhj0ubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(hendpointh]hendpoint}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hReturn next bridge in the chainh]hReturn next bridge in the chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(hX**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct device_node *np`` device tree node containing encoder output ports ``u32 port`` port in the device tree node ``u32 endpoint`` endpoint in the device tree node **Description** Given a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected. Returns a pointer to the bridge if successful, or an error pointer otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubjU )}(hhh](jZ )}(h<``struct device *dev`` device to tie the bridge lifetime to h](j` )}(h``struct device *dev``h]jf )}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubj| )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hL``struct device_node *np`` device tree node containing encoder output ports h](j` )}(h``struct device_node *np``h]jf )}(hjh]hstruct device_node *np}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubj| )}(hhh]h)}(h0device tree node containing encoder output portsh]h0device tree node containing encoder output ports}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h*``u32 port`` port in the device tree node h](j` )}(h ``u32 port``h]jf )}(hj@h]hu32 port}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhj:ubj| )}(hhh]h)}(hport in the device tree nodeh]hport in the device tree node}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMhjVubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hjUhMhjubjZ )}(h2``u32 endpoint`` endpoint in the device tree node h](j` )}(h``u32 endpoint``h]jf )}(hjyh]h u32 endpoint}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjsubj| )}(hhh]h)}(h endpoint in the device tree nodeh]h endpoint in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hGiven a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.h]hGiven a DT node’s port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hMReturns a pointer to the bridge if successful, or an error pointer otherwise.h]hMReturns a pointer to the bridge if successful, or an error pointer otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drmm_of_get_bridge (C function)c.drmm_of_get_bridgehNtauh1jd hjFhhhNhNubjw )}(hhh](j| )}(hostruct drm_bridge * drmm_of_get_bridge (struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h]j )}(hmstruct drm_bridge *drmm_of_get_bridge(struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]j)}jdrmm_of_get_bridgesbc.drmm_of_get_bridgeasbuh1hhjhhhjhMubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj)}(hjOh]h*}(hjVhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMubj )}(hdrmm_of_get_bridgeh]j )}(hjEh]hdrmm_of_get_bridge}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hH(struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h](j)}(hstruct drm_device *drmh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jCc.drmm_of_get_bridgeasbuh1hhj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj~ubj )}(hdrmh]hdrm}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubj)}(hstruct device_node *nph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jCc.drmm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hnph]hnp}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubj)}(hu32 porth](h)}(hhh]j )}(hu32h]hu32}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]jCc.drmm_of_get_bridgeasbuh1hhj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubj)}(h u32 endpointh](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jCc.drmm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendpointh]hendpoint}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hReturn next bridge in the chainh]hReturn next bridge in the chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjFhNhNubj )}(hX+**Parameters** ``struct drm_device *drm`` device to tie the bridge lifetime to ``struct device_node *np`` device tree node containing encoder output ports ``u32 port`` port in the device tree node ``u32 endpoint`` endpoint in the device tree node **Description** Given a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected. Returns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.h](h)}(h**Parameters**h]j )}(hj%h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM hjubjU )}(hhh](jZ )}(h@``struct drm_device *drm`` device to tie the bridge lifetime to h](j` )}(h``struct drm_device *drm``h]jf )}(hjDh]hstruct drm_device *drm}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhj>ubj| )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjZubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hjYhMhj;ubjZ )}(hL``struct device_node *np`` device tree node containing encoder output ports h](j` )}(h``struct device_node *np``h]jf )}(hj}h]hstruct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjwubj| )}(hhh]h)}(h0device tree node containing encoder output portsh]h0device tree node containing encoder output ports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj;ubjZ )}(h*``u32 port`` port in the device tree node h](j` )}(h ``u32 port``h]jf )}(hjh]hu32 port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM hjubj| )}(hhh]h)}(hport in the device tree nodeh]hport in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj;ubjZ )}(h2``u32 endpoint`` endpoint in the device tree node h](j` )}(h``u32 endpoint``h]jf )}(hjh]h u32 endpoint}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM hjubj| )}(hhh]h)}(h endpoint in the device tree nodeh]h endpoint in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj;ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj*h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM hjubh)}(hGiven a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.h]hGiven a DT node’s port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chM hjubh)}(hZReturns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.h]hZReturns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjFhhhNhNubj^B)}(h.. _drm_panel_helper:h]h}(h]h ]h"]h$]h&]hʌdrm-panel-helperuh1j]BhKhjFhhhhubeh}(h]jah ]h"]panel-bridge helper referenceah$]h&]uh1hhj\3hhhhhKubeh}(h](j_jT3eh ]h"](bridges drm_bridgeseh$]h&]uh1hhhhhhhhKjWL}j|jJ3sjYL}jT3jJ3subh)}(hhh](h)}(hPanel Helper Referenceh]hPanel Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKubh)}(hThe DRM panel helpers allow drivers to register panel objects with a central registry and provide functions to retrieve those panels in display drivers.h]hThe DRM panel helpers allow drivers to register panel objects with a central registry and provide functions to retrieve those panels in display drivers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:214: ./drivers/gpu/drm/drm_panel.chK&hjhhubh)}(hFor easy integration into drivers using the :c:type:`drm_bridge` infrastructure please take look at drm_panel_bridge_add() and devm_drm_panel_bridge_add().h](h,For easy integration into drivers using the }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jf )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:214: ./drivers/gpu/drm/drm_panel.chK*hjubh[ infrastructure please take look at drm_panel_bridge_add() and devm_drm_panel_bridge_add().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK*hjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_funcs (C struct)c.drm_panel_funcshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hdrm_panel_funcsh]j )}(hstruct drm_panel_funcsh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_panel_funcsh]j )}(hjh]hdrm_panel_funcs}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h#perform operations on a given panelh]h#perform operations on a given panel}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK,hj+hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j structeh"]h$]h&]j j j jFj jFj j j uh1jv hhhjhNhNubj )}(hXl**Definition**:: struct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); }; **Members** ``prepare`` Turn on panel and perform set up. This function is optional. ``enable`` Enable panel (turn on back light, etc.). This function is optional. ``disable`` Disable panel (turn off back light, etc.). This function is optional. ``unprepare`` Turn off panel. This function is optional. ``get_modes`` Add modes to the connector that the panel is attached to and returns the number of modes added. This function is mandatory. ``get_orientation`` Return the panel orientation set by device tree or EDID. This function is optional. ``get_timings`` Copy display timings into the provided array and return the number of display timings available. This function is optional. ``debugfs_init`` Allows panels to create panels-specific debugfs files.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubh:}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK0hjJubj, )}(hXstruct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); };h]hXstruct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); };}hjksbah}(h]h ]h"]h$]h&]j j uh1j+ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK2hjJubh)}(h **Members**h]j )}(hj|h]hMembers}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK=hjJubjU )}(hhh](jZ )}(hJ``prepare`` Turn on panel and perform set up. This function is optional. h](j` )}(h ``prepare``h]jf )}(hjh]hprepare}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKNhjubj| )}(hhh](h)}(h!Turn on panel and perform set up.h]h!Turn on panel and perform set up.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKLhjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKNhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKNhjubjZ )}(hP``enable`` Enable panel (turn on back light, etc.). This function is optional. h](j` )}(h ``enable``h]jf )}(hjh]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKWhjubj| )}(hhh](h)}(h(Enable panel (turn on back light, etc.).h]h(Enable panel (turn on back light, etc.).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKUhjubh)}(hThis function is optional.h]hThis function is optional.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKWhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKWhjubjZ )}(hS``disable`` Disable panel (turn off back light, etc.). This function is optional. h](j` )}(h ``disable``h]jf )}(hj+h]hdisable}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK`hj%ubj| )}(hhh](h)}(h*Disable panel (turn off back light, etc.).h]h*Disable panel (turn off back light, etc.).}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK^hjAubh)}(hThis function is optional.h]hThis function is optional.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hK`hjAubeh}(h]h ]h"]h$]h&]uh1j{ hj%ubeh}(h]h ]h"]h$]h&]uh1jY hj@hK`hjubjZ )}(h:``unprepare`` Turn off panel. This function is optional. h](j` )}(h ``unprepare``h]jf )}(hjsh]h unprepare}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKihjmubj| )}(hhh](h)}(hTurn off panel.h]hTurn off panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKghjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKihjubeh}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hjhKihjubjZ )}(h``get_modes`` Add modes to the connector that the panel is attached to and returns the number of modes added. This function is mandatory. h](j` )}(h ``get_modes``h]jf )}(hjh]h get_modes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKshjubj| )}(hhh](h)}(h_Add modes to the connector that the panel is attached to and returns the number of modes added.h]h_Add modes to the connector that the panel is attached to and returns the number of modes added.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKphjubh)}(hThis function is mandatory.h]hThis function is mandatory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKshjubjZ )}(hi``get_orientation`` Return the panel orientation set by device tree or EDID. This function is optional. h](j` )}(h``get_orientation``h]jf )}(hjh]hget_orientation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK}hjubj| )}(hhh](h)}(h8Return the panel orientation set by device tree or EDID.h]h8Return the panel orientation set by device tree or EDID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK{hjubh)}(hThis function is optional.h]hThis function is optional.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK}hjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK}hjubjZ )}(h``get_timings`` Copy display timings into the provided array and return the number of display timings available. This function is optional. h](j` )}(h``get_timings``h]jf )}(hjKh]h get_timings}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjEubj| )}(hhh](h)}(h`Copy display timings into the provided array and return the number of display timings available.h]h`Copy display timings into the provided array and return the number of display timings available.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjaubh)}(hThis function is optional.h]hThis function is optional.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hKhjaubeh}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj`hKhjubjZ )}(hG``debugfs_init`` Allows panels to create panels-specific debugfs files.h](j` )}(h``debugfs_init``h]jf )}(hjh]h debugfs_init}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubj| )}(hhh]h)}(h6Allows panels to create panels-specific debugfs files.h]h6Allows panels to create panels-specific debugfs files.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubeh}(h]h ]h"]h$]h&]uh1jT hjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjhhubh)}(hX9The .prepare() function is typically called before the display controller starts to transmit video data. Panel drivers can use this to turn the panel on and wait for it to become ready. If additional configuration is required (via a control bus such as I2C, SPI or DSI for example) this is a good time to do that.h]hX9The .prepare() function is typically called before the display controller starts to transmit video data. Panel drivers can use this to turn the panel on and wait for it to become ready. If additional configuration is required (via a control bus such as I2C, SPI or DSI for example) this is a good time to do that.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK-hjhhubh)}(hXAfter the display controller has started transmitting video data, it's safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Some panels require a certain amount of time or frames before the image is displayed. This function is responsible for taking this into account before enabling the backlight to avoid visual glitches.h]hXAfter the display controller has started transmitting video data, it’s safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Some panels require a certain amount of time or frames before the image is displayed. This function is responsible for taking this into account before enabling the backlight to avoid visual glitches.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK3hjhhubh)}(hXBefore stopping video transmission from the display controller it can be necessary to turn off the panel to avoid visual glitches. This is done in the .disable() function. Analogously to .enable() this typically involves turning off the backlight and waiting for some time to make sure no image is visible on the panel. It is then safe for the display controller to cease transmission of video data.h]hXBefore stopping video transmission from the display controller it can be necessary to turn off the panel to avoid visual glitches. This is done in the .disable() function. Analogously to .enable() this typically involves turning off the backlight and waiting for some time to make sure no image is visible on the panel. It is then safe for the display controller to cease transmission of video data.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhK:hjhhubh)}(hTo save power when no video data is transmitted, a driver can power down the panel. This is the job of the .unprepare() function.h]hTo save power when no video data is transmitted, a driver can power down the panel. This is the job of the .unprepare() function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKAhjhhubh)}(hBacklight can be handled automatically if configured using drm_panel_of_backlight() or drm_panel_dp_aux_backlight(). Then the driver does not need to implement the functionality to enable/disable backlight.h]hBacklight can be handled automatically if configured using drm_panel_of_backlight() or drm_panel_dp_aux_backlight(). Then the driver does not need to implement the functionality to enable/disable backlight.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKDhjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel (C struct) c.drm_panelhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h drm_panelh]j )}(hstruct drm_panelh](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKKubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhj]hKKubj )}(h drm_panelh]j )}(hjJh]h drm_panel}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLhhhj]hKKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhj]hKKubah}(h]jCah ](j j eh"]h$]h&]j j )j huh1j{ hj]hKKhjEhhubj )}(hhh]h)}(hDRM panel objecth]hDRM panel object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjhhubah}(h]h ]h"]h$]h&]uh1j hjEhhhj]hKKubeh}(h]h ](j structeh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXq**Definition**:: struct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; }; **Members** ``dev`` Parent device of the panel. ``backlight`` Backlight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it. ``funcs`` Operations that can be performed on the panel. ``connector_type`` Type of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type. ``list`` Panel entry in registry. ``followers`` A list of struct drm_panel_follower dependent on this panel. ``follower_lock`` Lock for followers list. ``prepare_prev_first`` The previous controller should be prepared first, before the prepare for the panel is called. This is largely required for DSI panels where the DSI host controller should be initialised to LP-11 before the panel is powered up. ``prepared`` If true then the panel has been prepared. ``enabled`` If true then the panel has been enabled. ``container`` Pointer to the private driver struct embedding this **struct** drm_panel. ``refcount`` reference count of users referencing this panel.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubj, )}(hXbstruct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; };h]hXbstruct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; };}hjsbah}(h]h ]h"]h$]h&]j j uh1j+ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubh)}(h **Members**h]j )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubjU )}(hhh](jZ )}(h$``dev`` Parent device of the panel. h](j` )}(h``dev``h]jf )}(hjh]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubj| )}(hhh]h)}(hParent device of the panel.h]hParent device of the panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h``backlight`` Backlight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it. h](j` )}(h ``backlight``h]jf )}(hj8h]h backlight}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhj2ubj| )}(hhh]h)}(hBacklight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it.h]hBacklight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjNubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hjMhKhjubjZ )}(h9``funcs`` Operations that can be performed on the panel. h](j` )}(h ``funcs``h]jf )}(hjrh]hfuncs}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjlubj| )}(hhh]h)}(h.Operations that can be performed on the panel.h]h.Operations that can be performed on the panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h``connector_type`` Type of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type. h](j` )}(h``connector_type``h]jf )}(hjh]hconnector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubj| )}(hhh]h)}(hType of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type.h]hType of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h"``list`` Panel entry in registry. h](j` )}(h``list``h]jf )}(hjh]hlist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubj| )}(hhh]h)}(hPanel entry in registry.h]hPanel entry in registry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hK``followers`` A list of struct drm_panel_follower dependent on this panel. h](j` )}(h ``followers``h]jf )}(hjh]h followers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhKhjubj| )}(hhh]h)}(hhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhM hj6ubj| )}(hhh]h)}(hIPointer to the private driver struct embedding this **struct** drm_panel.h](h4Pointer to the private driver struct embedding this }(hjUhhhNhNubj )}(h **struct**h]hstruct}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubh drm_panel.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhMhjRubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hjQhM hjubjZ )}(h=``refcount`` reference count of users referencing this panel.h](j` )}(h ``refcount``h]jf )}(hjh]hrefcount}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhM$hjubj| )}(hhh]h)}(h0reference count of users referencing this panel.h]h0reference count of users referencing this panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhM%hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM$hjubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq devm_drm_panel_alloc (C macro)c.devm_drm_panel_allochNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hdevm_drm_panel_alloch]j )}(hdevm_drm_panel_alloch]j )}(hdevm_drm_panel_alloch]j )}(hjh]hdevm_drm_panel_alloc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhM.ubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM.ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM.hjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhM.ubeh}(h]h ](j macroeh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubh)}(hC``devm_drm_panel_alloc (dev, type, member, funcs, connector_type)``h]jf )}(hjh]h?devm_drm_panel_alloc (dev, type, member, funcs, connector_type)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:217: ./include/drm/drm_panel.hhM0hjhhubjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKOhj6ubjU )}(hhh]jZ )}(h)``struct drm_panel *panel`` panel to add h](j` )}(h``struct drm_panel *panel``h]jf )}(hj[h]hstruct drm_panel *panel}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKLhjUubj| )}(hhh]h)}(h panel to addh]h panel to add}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphKLhjqubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjphKLhjRubah}(h]h ]h"]h$]h&]uh1jT hj6ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKNhj6ubh)}(hAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc().h]hAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKMhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_remove (C function)c.drm_panel_removehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h/void drm_panel_remove (struct drm_panel *panel)h]j )}(h.void drm_panel_remove(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK[ubj )}(hdrm_panel_removeh]j )}(hdrm_panel_removeh]hdrm_panel_remove}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK[ubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j)}jjsbc.drm_panel_removeasbuh1hhjubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK[ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK[ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK[hjhhubj )}(hhh]h)}(h'remove a panel from the global registryh]h'remove a panel from the global registry}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK[hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK[ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hs**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Removes a panel from the global registry.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK_hjubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK\hjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK\hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK\hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK^hjubh)}(h)Removes a panel from the global registry.h]h)Removes a panel from the global registry.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK]hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq devm_drm_panel_add (C function)c.devm_drm_panel_addhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hDint devm_drm_panel_add (struct device *dev, struct drm_panel *panel)h]j )}(hCint devm_drm_panel_add(struct device *dev, struct drm_panel *panel)h](j)}(hinth]hint}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKnubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXhhhjjhKnubj )}(hdevm_drm_panel_addh]j )}(hdevm_drm_panel_addh]hdevm_drm_panel_add}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ](j j eh"]h$]h&]j j uh1j hjXhhhjjhKnubj)}(h-(struct device *dev, struct drm_panel *panel)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.devm_drm_panel_addasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]jc.devm_drm_panel_addasbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjXhhhjjhKnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjThhhjjhKnubah}(h]jOah ](j j eh"]h$]h&]j j )j huh1j{ hjjhKnhjQhhubj )}(hhh]h)}(h/add a panel to the global registry using devresh]h/add a panel to the global registry using devres}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKnhjhhubah}(h]h ]h"]h$]h&]uh1j hjQhhhjjhKnubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct device *dev`` device to which the panel is attached ``struct drm_panel *panel`` panel to add **Description** Add a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc(). Unlike drm_panel_add() with this function there is no need to call drm_panel_remove(), it will be called automatically.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKrhjubjU )}(hhh](jZ )}(h=``struct device *dev`` device to which the panel is attached h](j` )}(h``struct device *dev``h]jf )}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKohjubj| )}(hhh]h)}(h%device to which the panel is attachedh]h%device to which the panel is attached}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKohjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKohjubjZ )}(h)``struct drm_panel *panel`` panel to add h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKphjubj| )}(hhh]h)}(h panel to addh]h panel to add}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKphjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKphjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjAh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKrhjubh)}(hXAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc(). Unlike drm_panel_add() with this function there is no need to call drm_panel_remove(), it will be called automatically.h]hXAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc(). Unlike drm_panel_add() with this function there is no need to call drm_panel_remove(), it will be called automatically.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKqhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_prepare (C function)c.drm_panel_preparehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h0void drm_panel_prepare (struct drm_panel *panel)h]j )}(h/void drm_panel_prepare(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_panel_prepareh]j )}(hdrm_panel_prepareh]hdrm_panel_prepare}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_panel_prepareasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhjhKubah}(h]jyah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhj{hhubj )}(hhh]h)}(hpower on a panelh]hpower on a panel}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjChhubah}(h]h ]h"]h$]h&]uh1j hj{hhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j j^j j^j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will enable power and deassert any reset signals to the panel. After this has completed it is possible to communicate with any integrated circuitry via a command bus. This function cannot fail (as it is called from the pre_enable call chain). There will always be a call to drm_panel_disable() afterwards.h](h)}(h**Parameters**h]j )}(hjhh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjbubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj~ubah}(h]h ]h"]h$]h&]uh1jT hjbubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjbubh)}(hXGCalling this function will enable power and deassert any reset signals to the panel. After this has completed it is possible to communicate with any integrated circuitry via a command bus. This function cannot fail (as it is called from the pre_enable call chain). There will always be a call to drm_panel_disable() afterwards.h]hXGCalling this function will enable power and deassert any reset signals to the panel. After this has completed it is possible to communicate with any integrated circuitry via a command bus. This function cannot fail (as it is called from the pre_enable call chain). There will always be a call to drm_panel_disable() afterwards.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_unprepare (C function)c.drm_panel_unpreparehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h2void drm_panel_unprepare (struct drm_panel *panel)h]j )}(h1void drm_panel_unprepare(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_panel_unprepareh]j )}(hdrm_panel_unprepareh]hdrm_panel_unprepare}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j)}jj*sbc.drm_panel_unprepareasbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(hpower off a panelh]hpower off a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXH**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will completely power off a panel (assert the panel's reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjCh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjubh)}(hCalling this function will completely power off a panel (assert the panel's reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().h]hXCalling this function will completely power off a panel (assert the panel’s reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_enable (C function)c.drm_panel_enablehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h/void drm_panel_enable (struct drm_panel *panel)h]j )}(h.void drm_panel_enable(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_panel_enableh]j )}(hdrm_panel_enableh]hdrm_panel_enable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_panel_enableasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]j{ah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhj}hhubj )}(hhh]h)}(henable a panelh]henable a panel}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjEhhubah}(h]h ]h"]h$]h&]uh1j hj}hhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j j`j j`j j j uh1jv hhhjhNhNubj )}(hXy**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.h](h)}(h**Parameters**h]j )}(hjjh]h Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjdubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjdubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjdubh)}(hX/Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.h]hX/Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chKhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_disable (C function)c.drm_panel_disablehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h0void drm_panel_disable (struct drm_panel *panel)h]j )}(h/void drm_panel_disable(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_panel_disableh]j )}(hdrm_panel_disableh]hdrm_panel_disable}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]j)}jj,sbc.drm_panel_disableasbuh1hhjBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjBubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hdisable a panelh]hdisable a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This will typically turn off the panel's backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hj h]hstruct drm_panel *panel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjEh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hThis will typically turn off the panel's backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.h]hThis will typically turn off the panel’s backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_get_modes (C function)c.drm_panel_get_modeshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hRint drm_panel_get_modes (struct drm_panel *panel, struct drm_connector *connector)h]j )}(hQint drm_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMVubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMVubj )}(hdrm_panel_get_modesh]j )}(hdrm_panel_get_modesh]hdrm_panel_get_modes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMVubj)}(h:(struct drm_panel *panel, struct drm_connector *connector)h](j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_panel_get_modesasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]jc.drm_panel_get_modesasbuh1hhj5ubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj5ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMVubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMVubah}(h]j}ah ](j j eh"]h$]h&]j j )j huh1j{ hjhMVhjhhubj )}(hhh]h)}(h,probe the available display modes of a panelh]h,probe the available display modes of a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMVhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMVubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXH**Parameters** ``struct drm_panel *panel`` DRM panel ``struct drm_connector *connector`` DRM connector **Description** The modes probed from the panel are automatically added to the connector that the panel is attached to. **Return** The number of modes available from the panel on success, or 0 on failure (no modes).h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMZhjubjU )}(hhh](jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMWhjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMWhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMWhjubjZ )}(h2``struct drm_connector *connector`` DRM connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj4h]hstruct drm_connector *connector}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMXhj.ubj| )}(hhh]h)}(h DRM connectorh]h DRM connector}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMXhjJubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hjIhMXhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjoh]h Description}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMZhjubh)}(hgThe modes probed from the panel are automatically added to the connector that the panel is attached to.h]hgThe modes probed from the panel are automatically added to the connector that the panel is attached to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMYhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM\hjubh)}(hTThe number of modes available from the panel on success, or 0 on failure (no modes).h]hTThe number of modes available from the panel on success, or 0 on failure (no modes).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM]hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_get (C function)c.drm_panel_gethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h:struct drm_panel * drm_panel_get (struct drm_panel *panel)h]j )}(h8struct drm_panel *drm_panel_get(struct drm_panel *panel)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMzubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j drm_panel_getsbc.drm_panel_getasbuh1hhjhhhjhMzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMzubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMzubj )}(h drm_panel_geth]j )}(hjh]h drm_panel_get}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMzubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]jc.drm_panel_getasbuh1hhjQubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjQubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjMubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMzubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMzubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMzhjhhubj )}(hhh]h)}(hAcquire a panel referenceh]hAcquire a panel reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMzhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMzubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This function increments the panel's refcount. **Return** Pointer to **panel**h](h)}(h**Parameters**h]j )}(hjh]h Parameters-}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM~hjubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM{hjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM{hj-ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj,hM{hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjRh]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM}hjubh)}(h.This function increments the panel's refcount.h]h0This function increments the panel’s refcount.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM|hjubh)}(h **Return**h]j )}(hjyh]hReturn}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM~hjubh)}(hPointer to **panel**h](h Pointer to }(hjhhhNhNubj )}(h **panel**h]hpanel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM~hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_panel_put (C function)c.drm_panel_puthNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h,void drm_panel_put (struct drm_panel *panel)h]j )}(h+void drm_panel_put(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h drm_panel_puth]j )}(h drm_panel_puth]h drm_panel_put}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]j)}jjsbc.drm_panel_putasbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpanelh]hpanel}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hRelease a panel referenceh]hRelease a panel reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This function decrements the panel's reference count and frees the object if the reference count drops to zero.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hoThis function decrements the panel's reference count and frees the object if the reference count drops to zero.h]hqThis function decrements the panel’s reference count and frees the object if the reference count drops to zero.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq of_drm_find_panel (C function)c.of_drm_find_panelhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hCstruct drm_panel * of_drm_find_panel (const struct device_node *np)h]j )}(hAstruct drm_panel *of_drm_find_panel(const struct device_node *np)h](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjZhMubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]j)}jof_drm_find_panelsbc.of_drm_find_panelasbuh1hhjIhhhjZhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjZhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjIhhhjZhMubj )}(hof_drm_find_panelh]j )}(hjh]hof_drm_find_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjIhhhjZhMubj)}(h(const struct device_node *np)h]j)}(hconst struct device_node *nph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.of_drm_find_panelasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hnph]hnp}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjIhhhjZhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjEhhhjZhMubah}(h]j@ah ](j j eh"]h$]h&]j j )j huh1j{ hjZhMhjBhhubj )}(hhh]h)}(h(look up a panel using a device tree nodeh]h(look up a panel using a device tree node}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj`hhubah}(h]h ]h"]h$]h&]uh1j hjBhhhjZhMubeh}(h]h ](j functioneh"]h$]h&]j j j j{j j{j j j uh1jv hhhjhNhNubj )}(hX[**Parameters** ``const struct device_node *np`` device tree node of the panel **Description** Searches the set of registered panels for one that matches the given device tree node. If a matching panel is found, return a pointer to it. Possible error codes returned by this function: - EPROBE_DEFER: the panel device has not been probed yet, and the caller should retry later - ENODEV: the device is not available (status != "okay" or "ok") **Return** A pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubjU )}(hhh]jZ )}(h?``const struct device_node *np`` device tree node of the panel h](j` )}(h ``const struct device_node *np``h]jf )}(hjh]hconst struct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubj| )}(hhh]h)}(hdevice tree node of the panelh]hdevice tree node of the panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hSearches the set of registered panels for one that matches the given device tree node. If a matching panel is found, return a pointer to it.h]hSearches the set of registered panels for one that matches the given device tree node. If a matching panel is found, return a pointer to it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(h/Possible error codes returned by this function:h]h/Possible error codes returned by this function:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hhh](h)}(hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry laterh]h)}(hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry laterh]hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry later}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h?ENODEV: the device is not available (status != "okay" or "ok") h]h)}(h>ENODEV: the device is not available (status != "okay" or "ok")h]hFENODEV: the device is not available (status != “okay” or “ok”)}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj/ubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNj<uh1hhj(hMhjubh)}(h **Return**h]j )}(hjPh]hReturn}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hA pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.h]hA pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )of_drm_get_panel_orientation (C function)c.of_drm_get_panel_orientationhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hhint of_drm_get_panel_orientation (const struct device_node *np, enum drm_panel_orientation *orientation)h]j )}(hgint of_drm_get_panel_orientation(const struct device_node *np, enum drm_panel_orientation *orientation)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hof_drm_get_panel_orientationh]j )}(hof_drm_get_panel_orientationh]hof_drm_get_panel_orientation}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hG(const struct device_node *np, enum drm_panel_orientation *orientation)h](j)}(hconst struct device_node *nph](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsbc.of_drm_get_panel_orientationasbuh1hhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj9hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hnph]hnp}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h'enum drm_panel_orientation *orientationh](j )}(hj+h]henum}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(hdrm_panel_orientationh]hdrm_panel_orientation}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.of_drm_get_panel_orientationasbuh1hhj[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(h orientationh]h orientation}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h[look up the orientation of the panel through the "rotation" binding from a device tree nodeh]h_look up the orientation of the panel through the “rotation” binding from a device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct device_node *np`` device tree node of the panel ``enum drm_panel_orientation *orientation`` orientation enum to be filled in **Description** Looks up the rotation of a panel in the device tree. The orientation of the panel is expressed as a property name "rotation" in the device tree. The rotation in the device tree is counter clockwise. **Return** 0 when a valid rotation value (0, 90, 180, or 270) is read or the rotation property doesn't exist. Return a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubjU )}(hhh](jZ )}(h?``const struct device_node *np`` device tree node of the panel h](j` )}(h ``const struct device_node *np``h]jf )}(hj!h]hconst struct device_node *np}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubj| )}(hhh]h)}(hdevice tree node of the panelh]hdevice tree node of the panel}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhjubjZ )}(hM``enum drm_panel_orientation *orientation`` orientation enum to be filled in h](j` )}(h+``enum drm_panel_orientation *orientation``h]jf )}(hjZh]h'enum drm_panel_orientation *orientation}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjTubj| )}(hhh]h)}(h orientation enum to be filled inh]h orientation enum to be filled in}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjohMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hLooks up the rotation of a panel in the device tree. The orientation of the panel is expressed as a property name "rotation" in the device tree. The rotation in the device tree is counter clockwise.h]hLooks up the rotation of a panel in the device tree. The orientation of the panel is expressed as a property name “rotation” in the device tree. The rotation in the device tree is counter clockwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh)}(h0 when a valid rotation value (0, 90, 180, or 270) is read or the rotation property doesn't exist. Return a negative error code on failure.h]h0 when a valid rotation value (0, 90, 180, or 270) is read or the rotation property doesn’t exist. Return a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_is_panel_follower (C function)c.drm_is_panel_followerhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h/bool drm_is_panel_follower (struct device *dev)h]j )}(h.bool drm_is_panel_follower(struct device *dev)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMBubj )}(hdrm_is_panel_followerh]j )}(hdrm_is_panel_followerh]hdrm_is_panel_follower}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMBubj)}(h(struct device *dev)h]j)}(hstruct device *devh](j )}(hj h]hstruct}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubh)}(hhh]j )}(hdeviceh]hdevice}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j)}jj#sbc.drm_is_panel_followerasbuh1hhj9ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj9ubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMBubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMBhjhhubj )}(hhh]h)}(h'Check if the device is a panel followerh]h'Check if the device is a panel follower}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMBhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMBubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXa**Parameters** ``struct device *dev`` The 'struct device' to check **Description** This checks to see if a device needs to be power sequenced together with a panel using the panel follower API. The "panel" property of the follower points to the panel to be followed. **Return** true if we should be power sequenced with a panel; false otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMFhjubjU )}(hhh]jZ )}(h4``struct device *dev`` The 'struct device' to check h](j` )}(h``struct device *dev``h]jf )}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMChjubj| )}(hhh]h)}(hThe 'struct device' to checkh]h The ‘struct device’ to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMChjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj<h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMEhjubh)}(hnThis checks to see if a device needs to be power sequenced together with a panel using the panel follower API.h]hnThis checks to see if a device needs to be power sequenced together with a panel using the panel follower API.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMDhjubh)}(hHThe "panel" property of the follower points to the panel to be followed.h]hLThe “panel” property of the follower points to the panel to be followed.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMGhjubh)}(h **Return**h]j )}(hjrh]hReturn}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMIhjubh)}(hCtrue if we should be power sequenced with a panel; false otherwise.h]hCtrue if we should be power sequenced with a panel; false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMJhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_panel_add_follower (C function)c.drm_panel_add_followerhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h]int drm_panel_add_follower (struct device *follower_dev, struct drm_panel_follower *follower)h]j )}(h\int drm_panel_add_follower(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMXubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMXubj )}(hdrm_panel_add_followerh]j )}(hdrm_panel_add_followerh]hdrm_panel_add_follower}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMXubj)}(hB(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hstruct device *follower_devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_panel_add_followerasbuh1hhjubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h follower_devh]h follower_dev}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_panel_follower *followerh](j )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubh)}(hhh]j )}(hdrm_panel_followerh]hdrm_panel_follower}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j.c.drm_panel_add_followerasbuh1hhjbubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjbubj )}(hfollowerh]hfollower}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMXubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMXubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMXhjhhubj )}(hhh]h)}(h)Register something to follow panel state.h]h)Register something to follow panel state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMXhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMXubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct device *follower_dev`` The 'struct device' for the follower. ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** A panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It's primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel. If a follower is added to a panel that's already been prepared/enabled, the follower's prepared/enabled callback is called right away. The "panel" property of the follower points to the panel to be followed. **Return** 0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM\hjubjU )}(hhh](jZ )}(hF``struct device *follower_dev`` The 'struct device' for the follower. h](j` )}(h``struct device *follower_dev``h]jf )}(hj(h]hstruct device *follower_dev}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMYhj"ubj| )}(hhh]h)}(h%The 'struct device' for the follower.h]h)The ‘struct device’ for the follower.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMYhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj"ubeh}(h]h ]h"]h$]h&]uh1jY hj=hMYhjubjZ )}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](j` )}(h'``struct drm_panel_follower *follower``h]jf )}(hjah]h#struct drm_panel_follower *follower}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMZhj[ubj| )}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMZhjwubah}(h]h ]h"]h$]h&]uh1j{ hj[ubeh}(h]h ]h"]h$]h&]uh1jY hjvhMZhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM\hjubh)}(hXA panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It's primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel.h]hX!A panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It’s primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM[hjubh)}(hIf a follower is added to a panel that's already been prepared/enabled, the follower's prepared/enabled callback is called right away.h]hIf a follower is added to a panel that’s already been prepared/enabled, the follower’s prepared/enabled callback is called right away.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chM`hjubh)}(hHThe "panel" property of the follower points to the panel to be followed.h]hLThe “panel” property of the follower points to the panel to be followed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMchjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMehjubh)}(h0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.h]h0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMfhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_panel_remove_follower (C function)c.drm_panel_remove_followerhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hDvoid drm_panel_remove_follower (struct drm_panel_follower *follower)h]j )}(hCvoid drm_panel_remove_follower(struct drm_panel_follower *follower)h](j)}(hvoidh]hvoid}(hj& hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj" hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hj5 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj" hhhj4 hMubj )}(hdrm_panel_remove_followerh]j )}(hdrm_panel_remove_followerh]hdrm_panel_remove_follower}(hjG hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj" hhhj4 hMubj)}(h%(struct drm_panel_follower *follower)h]j)}(h#struct drm_panel_follower *followerh](j )}(hj h]hstruct}(hjc hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ ubj )}(h h]h }(hjp hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ ubh)}(hhh]j )}(hdrm_panel_followerh]hdrm_panel_follower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjI sbc.drm_panel_remove_followerasbuh1hhj_ ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ ubj )}(hfollowerh]hfollower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ ubah}(h]h ]h"]h$]h&]j j uh1jhj" hhhj4 hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj4 hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj4 hMhj hhubj )}(hhh]h)}(h!Reverse drm_panel_add_follower().h]h!Reverse drm_panel_add_follower().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj4 hMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hX@**Parameters** ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** Undo drm_panel_add_follower(). This includes calling the follower's unpreparing/disabling function if we're removed from a panel that's currently prepared/enabled. **Return** 0 or an error code.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubjU )}(hhh]jZ )}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](j` )}(h'``struct drm_panel_follower *follower``h]jf )}(hj' h]h#struct drm_panel_follower *follower}(hj) hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj% ubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj! ubj| )}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj< hMhj= ubah}(h]h ]h"]h$]h&]uh1j{ hj! ubeh}(h]h ]h"]h$]h&]uh1jY hj< hMhj ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjb h]h Description}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj` ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(hUndo drm_panel_add_follower(). This includes calling the follower's unpreparing/disabling function if we're removed from a panel that's currently prepared/enabled.h]hUndo drm_panel_add_follower(). This includes calling the follower’s unpreparing/disabling function if we’re removed from a panel that’s currently prepared/enabled.}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(h **Return**h]j )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(h0 or an error code.h]h0 or an error code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (devm_drm_panel_add_follower (C function)c.devm_drm_panel_add_followerhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hbint devm_drm_panel_add_follower (struct device *follower_dev, struct drm_panel_follower *follower)h]j )}(haint devm_drm_panel_add_follower(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hMubj )}(hdevm_drm_panel_add_followerh]j )}(hdevm_drm_panel_add_followerh]hdevm_drm_panel_add_follower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hMubj)}(hB(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hstruct device *follower_devh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdeviceh]hdevice}(hj) hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj& ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+ modnameN classnameNj j )}j ]j)}jj sbc.devm_drm_panel_add_followerasbuh1hhj ubj )}(h h]h }(hjI hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjW hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(h follower_devh]h follower_dev}(hjd hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h#struct drm_panel_follower *followerh](j )}(hj h]hstruct}(hj} hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy ubh)}(hhh]j )}(hdrm_panel_followerh]hdrm_panel_follower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jE c.devm_drm_panel_add_followerasbuh1hhjy ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjy ubj )}(hfollowerh]hfollower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhj hhubj )}(hhh]h)}(h(devm version of drm_panel_add_follower()h]h(devm version of drm_panel_add_follower()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hX1**Parameters** ``struct device *follower_dev`` The 'struct device' for the follower. ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** Handles calling drm_panel_remove_follower() using devm on the follower_dev. **Return** 0 or an error code.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubjU )}(hhh](jZ )}(hF``struct device *follower_dev`` The 'struct device' for the follower. h](j` )}(h``struct device *follower_dev``h]jf )}(hj? h]hstruct device *follower_dev}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj= ubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj9 ubj| )}(hhh]h)}(h%The 'struct device' for the follower.h]h)The ‘struct device’ for the follower.}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT hMhjU ubah}(h]h ]h"]h$]h&]uh1j{ hj9 ubeh}(h]h ]h"]h$]h&]uh1jY hjT hMhj6 ubjZ )}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](j` )}(h'``struct drm_panel_follower *follower``h]jf )}(hjx h]h#struct drm_panel_follower *follower}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjv ubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjr ubj| )}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjr ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj6 ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(hKHandles calling drm_panel_remove_follower() using devm on the follower_dev.h]hKHandles calling drm_panel_remove_follower() using devm on the follower_dev.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(h **Return**h]j )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(h0 or an error code.h]h0 or an error code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_panel_of_backlight (C function)c.drm_panel_of_backlighthNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h4int drm_panel_of_backlight (struct drm_panel *panel)h]j )}(h3int drm_panel_of_backlight(struct drm_panel *panel)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hj. hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj- hMubj )}(hdrm_panel_of_backlighth]j )}(hdrm_panel_of_backlighth]hdrm_panel_of_backlight}(hj@ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj< ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj- hMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj\ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX ubj )}(h h]h }(hji hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjz hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj| modnameN classnameNj j )}j ]j)}jjB sbc.drm_panel_of_backlightasbuh1hhjX ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjX ubj )}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjT ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj- hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj- hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj- hMhj hhubj )}(hhh]h)}(h'use backlight device node for backlighth]h'use backlight device node for backlight}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj- hMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Use this function to enable backlight handling if your panel uses device tree and has a backlight phandle. When the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) ` When the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `. A typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubjU )}(hhh]jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hj h]hstruct drm_panel *panel}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hMhjubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj[h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(hjUse this function to enable backlight handling if your panel uses device tree and has a backlight phandle.h]hjUse this function to enable backlight handling if your panel uses device tree and has a backlight phandle.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(hWhen the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) `h](hOWhen the panel is enabled backlight will be enabled after a successful call to }(hjhhhNhNubh)}(h6:c:type:`drm_panel_funcs.enable\(\) `h]jf )}(hjh]hdrm_panel_funcs.enable()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhj ubh)}(hWhen the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `.h](hIWhen the panel is disabled backlight will be disabled before the call to }(hjhhhNhNubh)}(h7:c:type:`drm_panel_funcs.disable\(\) `h]jf )}(hjh]hdrm_panel_funcs.disable()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj ubh)}(hA typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.h]hA typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_get_panel_orientation_quirk (C function)!c.drm_get_panel_orientation_quirkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h;int drm_get_panel_orientation_quirk (int width, int height)h]j )}(h:int drm_get_panel_orientation_quirk(int width, int height)h](j)}(hinth]hint}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2hhhjDhMubj )}(hdrm_get_panel_orientation_quirkh]j )}(hdrm_get_panel_orientation_quirkh]hdrm_get_panel_orientation_quirk}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ](j j eh"]h$]h&]j j uh1j hj2hhhjDhMubj)}(h(int width, int height)h](j)}(h int widthh](j)}(hinth]hint}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(hwidthh]hwidth}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubj)}(h int heighth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hheighth]hheight}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubeh}(h]h ]h"]h$]h&]j j uh1jhj2hhhjDhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj.hhhjDhMubah}(h]j)ah ](j j eh"]h$]h&]j j )j huh1j{ hjDhMhj+hhubj )}(hhh]h)}(h"Check for panel orientation quirksh]h"Check for panel orientation quirks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj+hhhjDhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX **Parameters** ``int width`` width in pixels of the panel ``int height`` height in pixels of the panel **Description** This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry. Note this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module. **Return** A DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM hj ubjU )}(hhh](jZ )}(h+``int width`` width in pixels of the panel h](j` )}(h ``int width``h]jf )}(hj/h]h int width}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhj)ubj| )}(hhh]h)}(hwidth in pixels of the panelh]hwidth in pixels of the panel}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMhjEubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hjDhMhj&ubjZ )}(h-``int height`` height in pixels of the panel h](j` )}(h``int height``h]jf )}(hjhh]h int height}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]uh1j_ hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjbubj| )}(hhh]h)}(hheight in pixels of the panelh]hheight in pixels of the panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj~ubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hj}hMhj&ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM hj ubh)}(hX?This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry.h]hX?This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhj ubh)}(hNote this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module.h]hNote this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM%hj ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM)hj ubh)}(hA DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.h]hA DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM*hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_get_panel_backlight_quirk (C function)c.drm_get_panel_backlight_quirkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hdconst struct drm_panel_backlight_quirk * drm_get_panel_backlight_quirk (const struct drm_edid *edid)h]j )}(hbconst struct drm_panel_backlight_quirk *drm_get_panel_backlight_quirk(const struct drm_edid *edid)h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hKubj )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hKubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hKubh)}(hhh]j )}(hdrm_panel_backlight_quirkh]hdrm_panel_backlight_quirk}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jdrm_get_panel_backlight_quirksbc.drm_get_panel_backlight_quirkasbuh1hhjhhhj+hKubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hKubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhj+hKubj )}(hdrm_get_panel_backlight_quirkh]j )}(hjvh]hdrm_get_panel_backlight_quirk}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj+hKubj)}(h(const struct drm_edid *edid)h]j)}(hconst struct drm_edid *edidh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jtc.drm_get_panel_backlight_quirkasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hedidh]hedid}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj+hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj+hKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj+hKhjhhubj )}(hhh]h)}(h Get backlight quirks for a panelh]h Get backlight quirks for a panel}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjLhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj+hKubeh}(h]h ](j functioneh"]h$]h&]j j j jgj jgj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct drm_edid *edid`` EDID of the panel to check **Description** This function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources. **Return** a drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.h](h)}(h**Parameters**h]j )}(hjqh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjkubjU )}(hhh]jZ )}(h;``const struct drm_edid *edid`` EDID of the panel to check h](j` )}(h``const struct drm_edid *edid``h]jf )}(hjh]hconst struct drm_edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubj| )}(hhh]h)}(hEDID of the panel to checkh]hEDID of the panel to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjkubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjkubh)}(hThis function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources.h]hThis function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjkubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjkubh)}(hTa drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.h]hTa drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubeh}(h](jjoeh ]h"](panel helper referencedrm_panel_helpereh$]h&]uh1hhhhhhhhKjWL}j#jesjYL}jojesubh)}(hhh](h)}(h#Panel Self Refresh Helper Referenceh]h#Panel Self Refresh Helper Reference}(hj+hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj(hhhhhKubh)}(hXThis helper library provides an easy way for drivers to leverage the atomic framework to implement panel self refresh (SR) support. Drivers are responsible for initializing and cleaning up the SR helpers on load/unload (see :c:type:`drm_self_refresh_helper_init`/:c:type:`drm_self_refresh_helper_cleanup`). The connector is responsible for setting :c:type:`drm_connector_state.self_refresh_aware ` to true at runtime if it is SR-aware (meaning it knows how to initiate self refresh on the panel).h](hThis helper library provides an easy way for drivers to leverage the atomic framework to implement panel self refresh (SR) support. Drivers are responsible for initializing and cleaning up the SR helpers on load/unload (see }(hj9hhhNhNubh)}(h&:c:type:`drm_self_refresh_helper_init`h]jf )}(hjCh]hdrm_self_refresh_helper_init}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_self_refresh_helper_inituh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj9ubh/}(hj9hhhNhNubh)}(h):c:type:`drm_self_refresh_helper_cleanup`h]jf )}(hjgh]hdrm_self_refresh_helper_cleanup}(hjihhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_self_refresh_helper_cleanupuh1hhj`hKhj9ubh,). The connector is responsible for setting }(hj9hhhNhNubh)}(hF:c:type:`drm_connector_state.self_refresh_aware `h]jf )}(hjh]h&drm_connector_state.self_refresh_aware}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhj`hKhj9ubhc to true at runtime if it is SR-aware (meaning it knows how to initiate self refresh on the panel).}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`hKhj(hhubh)}(hXOnce a crtc has enabled SR using :c:type:`drm_self_refresh_helper_init`, the helpers will monitor activity and call back into the driver to enable/disable SR as appropriate. The best way to think about this is that it's a DPMS on/off request with :c:type:`drm_crtc_state.self_refresh_active ` set in crtc state that tells you to disable/enable SR on the panel instead of power-cycling it.h](h!Once a crtc has enabled SR using }(hjhhhNhNubh)}(h&:c:type:`drm_self_refresh_helper_init`h]jf )}(hjh]hdrm_self_refresh_helper_init}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_self_refresh_helper_inituh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_self_refresh_helper.chK!hjubh, the helpers will monitor activity and call back into the driver to enable/disable SR as appropriate. The best way to think about this is that it’s a DPMS on/off request with }(hjhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]jf )}(hjh]h"drm_crtc_state.self_refresh_active}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjhK!hjubh` set in crtc state that tells you to disable/enable SR on the panel instead of power-cycling it.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK!hj(hhubh)}(hX9During SR, drivers may choose to fully disable their crtc/encoder/bridge hardware (in which case no driver changes are necessary), or they can inspect :c:type:`drm_crtc_state.self_refresh_active ` if they want to enter low power mode without full disable (in case full disable/enable is too slow).h](hDuring SR, drivers may choose to fully disable their crtc/encoder/bridge hardware (in which case no driver changes are necessary), or they can inspect }(hjhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]jf )}(hjh]h"drm_crtc_state.self_refresh_active}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_self_refresh_helper.chK'hjubhe if they want to enter low power mode without full disable (in case full disable/enable is too slow).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hK'hj(hhubh)}(hSR will be deactivated if there are any atomic updates affecting the pipe that is in SR mode. If a crtc is driving multiple connectors, all connectors must be SR aware and all will enter/exit SR mode at the same time.h]hSR will be deactivated if there are any atomic updates affecting the pipe that is in SR mode. If a crtc is driving multiple connectors, all connectors must be SR aware and all will enter/exit SR mode at the same time.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_self_refresh_helper.chK,hj(hhubh)}(hIf the crtc and connector are SR aware, but the panel connected does not support it (or is otherwise unable to enter SR), the driver should fail atomic_check when :c:type:`drm_crtc_state.self_refresh_active ` is true.h](hIf the crtc and connector are SR aware, but the panel connected does not support it (or is otherwise unable to enter SR), the driver should fail atomic_check when }(hjGhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]jf )}(hjQh]h"drm_crtc_state.self_refresh_active}(hjShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_self_refresh_helper.chK0hjGubh is true.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjnhK0hj(hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5drm_self_refresh_helper_update_avg_times (C function)*c.drm_self_refresh_helper_update_avg_timeshNtauh1jd hj(hhhNhNubjw )}(hhh](j| )}(hvoid drm_self_refresh_helper_update_avg_times (struct drm_atomic_commit *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h]j )}(hvoid drm_self_refresh_helper_update_avg_times(struct drm_atomic_commit *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h(drm_self_refresh_helper_update_avg_timesh]j )}(h(drm_self_refresh_helper_update_avg_timesh]h(drm_self_refresh_helper_update_avg_times}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(hb(struct drm_atomic_commit *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb*c.drm_self_refresh_helper_update_avg_timesasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int commit_time_msh](j)}(hunsignedh]hunsigned}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hinth]hint}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(hcommit_time_msh]hcommit_time_ms}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h"unsigned int new_self_refresh_maskh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hnew_self_refresh_maskh]hnew_self_refresh_mask}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h!Updates a crtc's SR time averagesh]h#Updates a crtc’s SR time averages}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhj(hNhNubj )}(hXk**Parameters** ``struct drm_atomic_commit *state`` the state which has just been applied to hardware ``unsigned int commit_time_ms`` the amount of time in ms that this commit took to complete ``unsigned int new_self_refresh_mask`` bitmask of crtc's that have self_refresh_active in new state **Description** Called after :c:type:`drm_mode_config_funcs.atomic_commit_tail `, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubjU )}(hhh](jZ )}(hV``struct drm_atomic_commit *state`` the state which has just been applied to hardware h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj5h]hstruct drm_atomic_commit *state}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj/ubj| )}(hhh]h)}(h1the state which has just been applied to hardwareh]h1the state which has just been applied to hardware}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjKubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hjJhKhj,ubjZ )}(h[``unsigned int commit_time_ms`` the amount of time in ms that this commit took to complete h](j` )}(h``unsigned int commit_time_ms``h]jf )}(hjnh]hunsigned int commit_time_ms}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjhubj| )}(hhh]h)}(h:the amount of time in ms that this commit took to completeh]h:the amount of time in ms that this commit took to complete}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjhubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj,ubjZ )}(hd``unsigned int new_self_refresh_mask`` bitmask of crtc's that have self_refresh_active in new state h](j` )}(h&``unsigned int new_self_refresh_mask``h]jf )}(hjh]h"unsigned int new_self_refresh_mask}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubj| )}(hhh]h)}(hbitmask of crtc’s that have self_refresh_active in new state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj,ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubh)}(hX*Called after :c:type:`drm_mode_config_funcs.atomic_commit_tail `, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.h](h Called after }(hjhhhNhNubh)}(hJ:c:type:`drm_mode_config_funcs.atomic_commit_tail `h]jf )}(hjh]h(drm_mode_config_funcs.atomic_commit_tail}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubh, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj(hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0drm_self_refresh_helper_alter_state (C function)%c.drm_self_refresh_helper_alter_statehNtauh1jd hj(hhhNhNubjw )}(hhh](j| )}(hJvoid drm_self_refresh_helper_alter_state (struct drm_atomic_commit *state)h]j )}(hIvoid drm_self_refresh_helper_alter_state(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGhhhjYhKubj )}(h#drm_self_refresh_helper_alter_stateh]j )}(h#drm_self_refresh_helper_alter_stateh]h#drm_self_refresh_helper_alter_state}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhjYhKubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjnsb%c.drm_self_refresh_helper_alter_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjGhhhjYhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjChhhjYhKubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j{ hjYhKhj@hhubj )}(hhh]h)}(h#Alters the atomic state for SR exith]h#Alters the atomic state for SR exit}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hj@hhhjYhKubeh}(h]h ](j functioneh"]h$]h&]j j j j#j j#j j j uh1jv hhhj(hNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` the state currently being checked **Description** Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we're giving it another. However in order to keep self refresh entirely hidden from userspace, this is required. At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.h](h)}(h**Parameters**h]j )}(hj-h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj'ubjU )}(hhh]jZ )}(hF``struct drm_atomic_commit *state`` the state currently being checked h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjLh]hstruct drm_atomic_commit *state}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjFubj| )}(hhh]h)}(h!the state currently being checkedh]h!the state currently being checked}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahKhjbubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahKhjCubah}(h]h ]h"]h$]h&]uh1jT hj'ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj'ubh)}(hX8Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we're giving it another. However in order to keep self refresh entirely hidden from userspace, this is required.h]hX:Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we’re giving it another. However in order to keep self refresh entirely hidden from userspace, this is required.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj'ubh)}(h`At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.h]h`At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj(hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_self_refresh_helper_init (C function)c.drm_self_refresh_helper_inithNtauh1jd hj(hhhNhNubjw )}(hhh](j| )}(h8int drm_self_refresh_helper_init (struct drm_crtc *crtc)h]j )}(h7int drm_self_refresh_helper_init(struct drm_crtc *crtc)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_self_refresh_helper_inith]j )}(hdrm_self_refresh_helper_inith]hdrm_self_refresh_helper_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j)}jjsbc.drm_self_refresh_helper_initasbuh1hhjubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h+Initializes self refresh helpers for a crtch]h+Initializes self refresh helpers for a crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj(hNhNubj )}(h**Parameters** ``struct drm_crtc *crtc`` the crtc which supports self refresh supported displays **Description** Returns zero if successful or -errno on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubjU )}(hhh]jZ )}(hR``struct drm_crtc *crtc`` the crtc which supports self refresh supported displays h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubj| )}(hhh]h)}(h7the crtc which supports self refresh supported displaysh]h7the crtc which supports self refresh supported displays}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubh)}(h/Returns zero if successful or -errno on failureh]h/Returns zero if successful or -errno on failure}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj(hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_self_refresh_helper_cleanup (C function)!c.drm_self_refresh_helper_cleanuphNtauh1jd hj(hhhNhNubjw )}(hhh](j| )}(hh]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chMhj8ubjU )}(hhh]jZ )}(h-``struct drm_crtc *crtc`` the crtc to cleanuph](j` )}(h``struct drm_crtc *crtc``h]jf )}(hj]h]hstruct drm_crtc *crtc}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chMhjWubj| )}(hhh]h)}(hthe crtc to cleanuph]hthe crtc to cleanup}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:235: ./drivers/gpu/drm/drm_self_refresh_helper.chM hjsubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjrhMhjTubah}(h]h ]h"]h$]h&]uh1jT hj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj(hhhNhNubeh}(h]jah ]h"]#panel self refresh helper referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hHDMI Atomic State Helpersh]hHDMI Atomic State Helpers}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKubh)}(h_These functions contain an implementation of the HDMI specification in the form of KMS helpers.h]h_These functions contain an implementation of the HDMI specification in the form of KMS helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:244: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhjhhubh)}(hoIt contains TMDS character rate computation, automatic selection of output formats, infoframes generation, etc.h]hoIt contains TMDS character rate computation, automatic selection of output formats, infoframes generation, etc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:244: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhjhhubh)}(hhh](h)}(hInfoframes Complianceh]hInfoframes Compliance}(hjhhhNhNubah}(h]h ]h"]h$]h&]hj8uh1hhjhNhNubh)}(hvDrivers using the helpers will expose the various infoframes generated according to the HDMI specification in debugfs.h]hvDrivers using the helpers will expose the various infoframes generated according to the HDMI specification in debugfs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:244: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhjubh)}(hCompliance can then be tested using ``edid-decode`` from the ``v4l-utils`` project (https://git.linuxtv.org/v4l-utils.git/). A sample run would look like:h](h$Compliance can then be tested using }(hjhhhNhNubjf )}(h``edid-decode``h]h edid-decode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh from the }(hjhhhNhNubjf )}(h ``v4l-utils``h]h v4l-utils}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh project (}(hjhhhNhNubjn)}(h&https://git.linuxtv.org/v4l-utils.git/h]h&https://git.linuxtv.org/v4l-utils.git/}(hj1hhhNhNubah}(h]h ]h"]h$]h&]refurij3uh1jmhjubh ). A sample run would look like:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:244: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhjubj, )}(hX$# edid-decode \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/avi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdmi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/spd \ /sys/class/drm/card1-HDMI-A-1/edid \ -c edid-decode (hex): 00 ff ff ff ff ff ff 00 1e 6d f4 5b 1e ef 06 00 07 20 01 03 80 2f 34 78 ea 24 05 af 4f 42 ab 25 0f 50 54 21 08 00 d1 c0 61 40 45 40 01 01 01 01 01 01 01 01 01 01 98 d0 00 40 a1 40 d4 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 fd 00 3b 3d 1e b2 31 00 0a 20 20 20 20 20 20 00 00 00 fc 00 4c 47 20 53 44 51 48 44 0a 20 20 20 20 00 00 00 ff 00 32 30 37 4e 54 52 4c 44 43 34 33 30 0a 01 46 02 03 42 72 23 09 07 07 4d 01 03 04 90 12 13 1f 22 5d 5e 5f 60 61 83 01 00 00 6d 03 0c 00 10 00 b8 3c 20 00 60 01 02 03 67 d8 5d c4 01 78 80 03 e3 0f 00 18 e2 00 6a e3 05 c0 00 e6 06 05 01 52 52 51 11 5d 00 a0 a0 40 29 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c3 ---------------- Block 0, Base EDID: EDID Structure Version & Revision: 1.3 Vendor & Product Identification: Manufacturer: GSM Model: 23540 Serial Number: 454430 (0x0006ef1e) Made in: week 7 of 2022 Basic Display Parameters & Features: Digital display Maximum image size: 47 cm x 52 cm Gamma: 2.20 DPMS levels: Standby Suspend Off RGB color display First detailed timing is the preferred timing Color Characteristics: Red : 0.6835, 0.3105 Green: 0.2587, 0.6679 Blue : 0.1445, 0.0585 White: 0.3134, 0.3291 Established Timings I & II: DMT 0x04: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz Standard Timings: DMT 0x52: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz Detailed Timing Descriptors: DTD 1: 2560x2880 59.966580 Hz 8:9 185.417 kHz 534.000000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 240 Hpol P Vfront 3 Vsync 10 Vback 199 Vpol N Display Range Limits: Monitor ranges (GTF): 59-61 Hz V, 30-178 kHz H, max dotclock 490 MHz Display Product Name: 'LG SDQHD' Display Product Serial Number: '207NTRLDC430' Extension blocks: 1 Checksum: 0x46 ---------------- Block 1, CTA-861 Extension Block: Revision: 3 Basic audio support Supports YCbCr 4:4:4 Supports YCbCr 4:2:2 Native detailed modes: 2 Audio Data Block: Linear PCM: Max channels: 2 Supported sample rates (kHz): 48 44.1 32 Supported sample sizes (bits): 24 20 16 Video Data Block: VIC 1: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz VIC 3: 720x480 59.940060 Hz 16:9 31.469 kHz 27.000000 MHz VIC 4: 1280x720 60.000000 Hz 16:9 45.000 kHz 74.250000 MHz VIC 16: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz (native) VIC 18: 720x576 50.000000 Hz 16:9 31.250 kHz 27.000000 MHz VIC 19: 1280x720 50.000000 Hz 16:9 37.500 kHz 74.250000 MHz VIC 31: 1920x1080 50.000000 Hz 16:9 56.250 kHz 148.500000 MHz VIC 34: 1920x1080 30.000000 Hz 16:9 33.750 kHz 74.250000 MHz VIC 93: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz VIC 94: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz VIC 95: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Speaker Allocation Data Block: FL/FR - Front Left/Right Vendor-Specific Data Block (HDMI), OUI 00-0C-03: Source physical address: 1.0.0.0 Supports_AI DC_36bit DC_30bit DC_Y444 Maximum TMDS clock: 300 MHz Extended HDMI video details: HDMI VICs: HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Version: 1 Maximum TMDS Character Rate: 600 MHz SCDC Present Supports 12-bits/component Deep Color 4:2:0 Pixel Encoding Supports 10-bits/component Deep Color 4:2:0 Pixel Encoding YCbCr 4:2:0 Capability Map Data Block: VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Video Capability Data Block: YCbCr quantization: No Data RGB quantization: Selectable (via AVI Q) PT scan behavior: Always Underscanned IT scan behavior: Always Underscanned CE scan behavior: Always Underscanned Colorimetry Data Block: BT2020YCC BT2020RGB HDR Static Metadata Data Block: Electro optical transfer functions: Traditional gamma - SDR luminance range SMPTE ST2084 Supported static metadata descriptors: Static metadata type 1 Desired content max luminance: 82 (295.365 cd/m^2) Desired content max frame-average luminance: 82 (295.365 cd/m^2) Desired content min luminance: 81 (0.298 cd/m^2) Detailed Timing Descriptors: DTD 2: 2560x2880 29.986961 Hz 8:9 87.592 kHz 238.250000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 80 Hpol P Vfront 3 Vsync 10 Vback 28 Vpol N Checksum: 0xc3 Unused space in Extension Block: 43 bytes ---------------- edid-decode 1.29.0-5346 edid-decode SHA: c363e9aa6d70 2025-03-11 11:41:18 Warnings: Block 1, CTA-861 Extension Block: IT Video Formats are overscanned by default, but normally this should be underscanned. Video Data Block: VIC 1 and the first DTD are not identical. Is this intended? Video Data Block: All VICs are in ascending order, and the first (preferred) VIC <= 4, is that intended? Video Capability Data Block: Set Selectable YCbCr Quantization to avoid interop issues. Video Capability Data Block: S_PT is equal to S_IT and S_CE, so should be set to 0 instead. Colorimetry Data Block: Set the sRGB colorimetry bit to avoid interop issues. Display Product Serial Number is set, so the Serial Number in the Base EDID should be 0. EDID: Base EDID: Some timings are out of range of the Monitor Ranges: Vertical Freq: 24.000 - 60.317 Hz (Monitor: 59.000 - 61.000 Hz) Horizontal Freq: 31.250 - 185.416 kHz (Monitor: 30.000 - 178.000 kHz) Maximum Clock: 594.000 MHz (Monitor: 490.000 MHz) Failures: Block 1, CTA-861 Extension Block: Video Capability Data Block: IT video formats are always underscanned, but bit 7 of Byte 3 of the CTA-861 Extension header is set to overscanned. EDID: CTA-861: Native progressive timings are a mix of several resolutions. EDID conformity: FAIL ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio' was empty. ================ edid-decode InfoFrame (hex): 82 02 0d 31 12 28 04 00 00 00 00 00 00 00 00 00 00 ---------------- HDMI InfoFrame Checksum: 0x31 AVI InfoFrame Version: 2 Length: 13 Y: Color Component Sample Format: RGB A: Active Format Information Present: Yes B: Bar Data Present: Bar Data not present S: Scan Information: Composed for an underscanned display C: Colorimetry: No Data M: Picture Aspect Ratio: 16:9 R: Active Portion Aspect Ratio: 8 ITC: IT Content: No Data EC: Extended Colorimetry: xvYCC601 Q: RGB Quantization Range: Limited Range SC: Non-Uniform Picture Scaling: No Known non-uniform scaling YQ: YCC Quantization Range: Limited Range CN: IT Content Type: Graphics PR: Pixel Data Repetition Count: 0 Line Number of End of Top Bar: 0 Line Number of Start of Bottom Bar: 0 Pixel Number of End of Left Bar: 0 Pixel Number of Start of Right Bar: 0 ---------------- AVI InfoFrame conformity: PASS ================ edid-decode InfoFrame (hex): 81 01 05 49 03 0c 00 20 01 ---------------- HDMI InfoFrame Checksum: 0x49 Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 Version: 1 Length: 5 HDMI Video Format: HDMI_VIC is present HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz ---------------- Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 conformity: PASS ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm' was empty. ================ edid-decode InfoFrame (hex): 83 01 19 93 42 72 6f 61 64 63 6f 6d 56 69 64 65 6f 63 6f 72 65 00 00 00 00 00 00 00 09 ---------------- HDMI InfoFrame Checksum: 0x93 Source Product Description InfoFrame Version: 1 Length: 25 Vendor Name: 'Broadcom' Product Description: 'Videocore' Source Information: PC general ---------------- Source Product Description InfoFrame conformity: PASSh]hX$# edid-decode \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/avi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdmi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/spd \ /sys/class/drm/card1-HDMI-A-1/edid \ -c edid-decode (hex): 00 ff ff ff ff ff ff 00 1e 6d f4 5b 1e ef 06 00 07 20 01 03 80 2f 34 78 ea 24 05 af 4f 42 ab 25 0f 50 54 21 08 00 d1 c0 61 40 45 40 01 01 01 01 01 01 01 01 01 01 98 d0 00 40 a1 40 d4 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 fd 00 3b 3d 1e b2 31 00 0a 20 20 20 20 20 20 00 00 00 fc 00 4c 47 20 53 44 51 48 44 0a 20 20 20 20 00 00 00 ff 00 32 30 37 4e 54 52 4c 44 43 34 33 30 0a 01 46 02 03 42 72 23 09 07 07 4d 01 03 04 90 12 13 1f 22 5d 5e 5f 60 61 83 01 00 00 6d 03 0c 00 10 00 b8 3c 20 00 60 01 02 03 67 d8 5d c4 01 78 80 03 e3 0f 00 18 e2 00 6a e3 05 c0 00 e6 06 05 01 52 52 51 11 5d 00 a0 a0 40 29 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c3 ---------------- Block 0, Base EDID: EDID Structure Version & Revision: 1.3 Vendor & Product Identification: Manufacturer: GSM Model: 23540 Serial Number: 454430 (0x0006ef1e) Made in: week 7 of 2022 Basic Display Parameters & Features: Digital display Maximum image size: 47 cm x 52 cm Gamma: 2.20 DPMS levels: Standby Suspend Off RGB color display First detailed timing is the preferred timing Color Characteristics: Red : 0.6835, 0.3105 Green: 0.2587, 0.6679 Blue : 0.1445, 0.0585 White: 0.3134, 0.3291 Established Timings I & II: DMT 0x04: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz Standard Timings: DMT 0x52: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz Detailed Timing Descriptors: DTD 1: 2560x2880 59.966580 Hz 8:9 185.417 kHz 534.000000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 240 Hpol P Vfront 3 Vsync 10 Vback 199 Vpol N Display Range Limits: Monitor ranges (GTF): 59-61 Hz V, 30-178 kHz H, max dotclock 490 MHz Display Product Name: 'LG SDQHD' Display Product Serial Number: '207NTRLDC430' Extension blocks: 1 Checksum: 0x46 ---------------- Block 1, CTA-861 Extension Block: Revision: 3 Basic audio support Supports YCbCr 4:4:4 Supports YCbCr 4:2:2 Native detailed modes: 2 Audio Data Block: Linear PCM: Max channels: 2 Supported sample rates (kHz): 48 44.1 32 Supported sample sizes (bits): 24 20 16 Video Data Block: VIC 1: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz VIC 3: 720x480 59.940060 Hz 16:9 31.469 kHz 27.000000 MHz VIC 4: 1280x720 60.000000 Hz 16:9 45.000 kHz 74.250000 MHz VIC 16: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz (native) VIC 18: 720x576 50.000000 Hz 16:9 31.250 kHz 27.000000 MHz VIC 19: 1280x720 50.000000 Hz 16:9 37.500 kHz 74.250000 MHz VIC 31: 1920x1080 50.000000 Hz 16:9 56.250 kHz 148.500000 MHz VIC 34: 1920x1080 30.000000 Hz 16:9 33.750 kHz 74.250000 MHz VIC 93: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz VIC 94: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz VIC 95: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Speaker Allocation Data Block: FL/FR - Front Left/Right Vendor-Specific Data Block (HDMI), OUI 00-0C-03: Source physical address: 1.0.0.0 Supports_AI DC_36bit DC_30bit DC_Y444 Maximum TMDS clock: 300 MHz Extended HDMI video details: HDMI VICs: HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Version: 1 Maximum TMDS Character Rate: 600 MHz SCDC Present Supports 12-bits/component Deep Color 4:2:0 Pixel Encoding Supports 10-bits/component Deep Color 4:2:0 Pixel Encoding YCbCr 4:2:0 Capability Map Data Block: VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Video Capability Data Block: YCbCr quantization: No Data RGB quantization: Selectable (via AVI Q) PT scan behavior: Always Underscanned IT scan behavior: Always Underscanned CE scan behavior: Always Underscanned Colorimetry Data Block: BT2020YCC BT2020RGB HDR Static Metadata Data Block: Electro optical transfer functions: Traditional gamma - SDR luminance range SMPTE ST2084 Supported static metadata descriptors: Static metadata type 1 Desired content max luminance: 82 (295.365 cd/m^2) Desired content max frame-average luminance: 82 (295.365 cd/m^2) Desired content min luminance: 81 (0.298 cd/m^2) Detailed Timing Descriptors: DTD 2: 2560x2880 29.986961 Hz 8:9 87.592 kHz 238.250000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 80 Hpol P Vfront 3 Vsync 10 Vback 28 Vpol N Checksum: 0xc3 Unused space in Extension Block: 43 bytes ---------------- edid-decode 1.29.0-5346 edid-decode SHA: c363e9aa6d70 2025-03-11 11:41:18 Warnings: Block 1, CTA-861 Extension Block: IT Video Formats are overscanned by default, but normally this should be underscanned. Video Data Block: VIC 1 and the first DTD are not identical. Is this intended? Video Data Block: All VICs are in ascending order, and the first (preferred) VIC <= 4, is that intended? Video Capability Data Block: Set Selectable YCbCr Quantization to avoid interop issues. Video Capability Data Block: S_PT is equal to S_IT and S_CE, so should be set to 0 instead. Colorimetry Data Block: Set the sRGB colorimetry bit to avoid interop issues. Display Product Serial Number is set, so the Serial Number in the Base EDID should be 0. EDID: Base EDID: Some timings are out of range of the Monitor Ranges: Vertical Freq: 24.000 - 60.317 Hz (Monitor: 59.000 - 61.000 Hz) Horizontal Freq: 31.250 - 185.416 kHz (Monitor: 30.000 - 178.000 kHz) Maximum Clock: 594.000 MHz (Monitor: 490.000 MHz) Failures: Block 1, CTA-861 Extension Block: Video Capability Data Block: IT video formats are always underscanned, but bit 7 of Byte 3 of the CTA-861 Extension header is set to overscanned. EDID: CTA-861: Native progressive timings are a mix of several resolutions. EDID conformity: FAIL ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio' was empty. ================ edid-decode InfoFrame (hex): 82 02 0d 31 12 28 04 00 00 00 00 00 00 00 00 00 00 ---------------- HDMI InfoFrame Checksum: 0x31 AVI InfoFrame Version: 2 Length: 13 Y: Color Component Sample Format: RGB A: Active Format Information Present: Yes B: Bar Data Present: Bar Data not present S: Scan Information: Composed for an underscanned display C: Colorimetry: No Data M: Picture Aspect Ratio: 16:9 R: Active Portion Aspect Ratio: 8 ITC: IT Content: No Data EC: Extended Colorimetry: xvYCC601 Q: RGB Quantization Range: Limited Range SC: Non-Uniform Picture Scaling: No Known non-uniform scaling YQ: YCC Quantization Range: Limited Range CN: IT Content Type: Graphics PR: Pixel Data Repetition Count: 0 Line Number of End of Top Bar: 0 Line Number of Start of Bottom Bar: 0 Pixel Number of End of Left Bar: 0 Pixel Number of Start of Right Bar: 0 ---------------- AVI InfoFrame conformity: PASS ================ edid-decode InfoFrame (hex): 81 01 05 49 03 0c 00 20 01 ---------------- HDMI InfoFrame Checksum: 0x49 Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 Version: 1 Length: 5 HDMI Video Format: HDMI_VIC is present HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz ---------------- Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 conformity: PASS ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm' was empty. ================ edid-decode InfoFrame (hex): 83 01 19 93 42 72 6f 61 64 63 6f 6d 56 69 64 65 6f 63 6f 72 65 00 00 00 00 00 00 00 09 ---------------- HDMI InfoFrame Checksum: 0x93 Source Product Description InfoFrame Version: 1 Length: 25 Vendor Name: 'Broadcom' Product Description: 'Videocore' Source Information: PC general ---------------- Source Product Description InfoFrame conformity: PASS}hjKsbah}(h]h ]h"]h$]h&]j j jjbashj}uh1j+ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:244: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chK hjubeh}(h]j>ah ]h"]infoframes complianceah$]h&]uh1hhjhhhNhNubh)}(hhh](h)}(hTestingh]hTesting}(hjfhhhNhNubah}(h]h ]h"]h$]h&]hjZuh1hhjchNhNubh)}(hAThe helpers have unit testing and can be tested using kunit with:h]hAThe helpers have unit testing and can be tested using kunit with:}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:244: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM)hjcubj, )}(h$ ./tools/testing/kunit/kunit.py run \ --kunitconfig=drivers/gpu/drm/tests \ drm_atomic_helper_connector_hdmi_*h]h$ ./tools/testing/kunit/kunit.py run \ --kunitconfig=drivers/gpu/drm/tests \ drm_atomic_helper_connector_hdmi_*}hjsbah}(h]h ]h"]h$]h&]j j jjbashj}uh1j+ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:244: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM+hjcubeh}(h]j`ah ]h"]testingah$]h&]uh1hhjhhhNhNubeh}(h]jah ]h"]h$]overviewah&]uh1hhjhhhhhKjbCKubh)}(hhh](h)}(hFunctions Referenceh]hFunctions Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5__drm_atomic_helper_connector_hdmi_reset (C function)*c.__drm_atomic_helper_connector_hdmi_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h{void __drm_atomic_helper_connector_hdmi_reset (struct drm_connector *connector, struct drm_connector_state *new_conn_state)h]j )}(hzvoid __drm_atomic_helper_connector_hdmi_reset(struct drm_connector *connector, struct drm_connector_state *new_conn_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM5ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM5ubj )}(h(__drm_atomic_helper_connector_hdmi_reseth]j )}(h(__drm_atomic_helper_connector_hdmi_reseth]h(__drm_atomic_helper_connector_hdmi_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM5ubj)}(hM(struct drm_connector *connector, struct drm_connector_state *new_conn_state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]j)}jjsb*c.__drm_atomic_helper_connector_hdmi_resetasbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h*struct drm_connector_state *new_conn_stateh](j )}(hj h]hstruct}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jC*c.__drm_atomic_helper_connector_hdmi_resetasbuh1hhjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjwubj )}(hnew_conn_stateh]hnew_conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM5ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM5ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM5hjhhubj )}(hhh,]h)}(h6Initializes all HDMI **drm_connector_state** resourcesh](hInitializes all HDMI }(hjhhhNhNubj )}(h**drm_connector_state**h]hdrm_connector_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh resources}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM5hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM5ubeh}(h]h ](j functioneh"]h$]h&]j j j j&j j&j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` DRM connector ``struct drm_connector_state *new_conn_state`` connector state to reset **Description** Initializes all HDMI resources from a **drm_connector_state** without actually allocating it. This is useful for HDMI drivers, in combination with __drm_atomic_helper_connector_reset() or drm_atomic_helper_connector_reset().h](h)}(h**Parameters**h]j )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM9hj*ubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` DRM connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjOh]hstruct drm_connector *connector}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM6hjIubj| )}(hhh]h)}(h DRM connectorh]h DRM connector}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhM6hjeubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjdhM6hjFubjZ )}(hH``struct drm_connector_state *new_conn_state`` connector state to reset h](j` )}(h.``struct drm_connector_state *new_conn_state``h]jf )}(hjh]h*struct drm_connector_state *new_conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM7hjubj| )}(hhh]h)}(hconnector state to reseth]hconnector state to reset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM7hjFubeh}(h]h ]h"]h$]h&]uh1jT hj*ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM9hj*ubh)}(hInitializes all HDMI resources from a **drm_connector_state** without actually allocating it. This is useful for HDMI drivers, in combination with __drm_atomic_helper_connector_reset() or drm_atomic_helper_connector_reset().h](h&Initializes all HDMI resources from a }(hjhhhNhNubj )}(h**drm_connector_state**h]hdrm_connector_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh without actually allocating it. This is useful for HDMI drivers, in combination with __drm_atomic_helper_connector_reset() or drm_atomic_helper_connector_reset().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM8hj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_atomic_helper_connector_hdmi_check (C function)(c.drm_atomic_helper_connector_hdmi_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hmint drm_atomic_helper_connector_hdmi_check (struct drm_connector *connector, struct drm_atomic_commit *state)h]j )}(hlint drm_atomic_helper_connector_hdmi_check(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMQubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj(hMQubj )}(h&drm_atomic_helper_connector_hdmi_checkh]j )}(h&drm_atomic_helper_connector_hdmi_checkh]h&drm_atomic_helper_connector_hdmi_check}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj(hMQubj)}(hB(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j)}jj=sb(c.drm_atomic_helper_connector_hdmi_checkasbuh1hhjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjSubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j(c.drm_atomic_helper_connector_hdmi_checkasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj(hMQubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj(hMQubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj(hMQhjhhubj )}(hhh]h)}(h+Helper to check HDMI connector atomic stateh]h+Helper to check HDMI connector atomic state}(hjJ hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMQhjG hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj(hMQubeh}(h]h ](j functioneh"]h$]h&]j j j jb j jb j j j uh1jv hhhjhNhNubj )}(hXo**Parameters** ``struct drm_connector *connector`` DRM Connector ``struct drm_atomic_commit *state`` the DRM State object **Description** Provides a default connector state check handler for HDMI connectors. Checks that a desired connector update is valid, and updates various fields of derived state. **Return** Zero on success, or an errno code otherwise.h](h)}(h**Parameters**h]j )}(hjl h]h Parameters}(hjn hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjj ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMUhjf ubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` DRM Connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj h]hstruct drm_connector *connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMRhj ubj| )}(hhh]h)}(h DRM Connectorh]h DRM Connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMRhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMRhj ubjZ )}(h9``struct drm_atomic_commit *state`` the DRM State object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj h]hstruct drm_atomic_commit *state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMShj ubj| )}(hhh]h)}(hthe DRM State objecth]hthe DRM State object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMShj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMShj ubeh}(h]h ]h"]h$]h&]uh1jT hjf ubh)}(h**Description**h]j )}(hj h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMUhjf ubh)}(hProvides a default connector state check handler for HDMI connectors. Checks that a desired connector update is valid, and updates various fields of derived state.h]hProvides a default connector state check handler for HDMI connectors. Checks that a desired connector update is valid, and updates various fields of derived state.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMThjf ubh)}(h **Return**h]j )}(hj&!h]hReturn}(hj(!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$!ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMXhjf ubh)}(h,Zero on success, or an errno code otherwise.h]h,Zero on success, or an errno code otherwise.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:#hMhj;#ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj:#hMhj#ubjZ )}(hA``const struct drm_display_mode *mode`` Display mode to validate h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hj^#h]h#const struct drm_display_mode *mode}(hj`#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\#ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjX#ubj| )}(hhh]h)}(hDisplay mode to validateh]hDisplay mode to validate}(hjw#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjs#hMhjt#ubah}(h]h ]h"]h$]h&]uh1j{ hjX#ubeh}(h]h ]h"]h$]h&]uh1jY hjs#hMhj#ubeh}(h]h ]h"]h$]h&]uh1jT hj#ubh)}(h**Description**h]j )}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj#ubh)}(h7Generic .mode_valid implementation for HDMI connectors.h]h7Generic .mode_valid implementation for HDMI connectors.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ?drm_atomic_helper_connector_hdmi_update_infoframes (C function)4c.drm_atomic_helper_connector_hdmi_update_infoframeshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hyint drm_atomic_helper_connector_hdmi_update_infoframes (struct drm_connector *connector, struct drm_atomic_commit *state)h]j )}(hxint drm_atomic_helper_connector_hdmi_update_infoframes(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhj#hMubj )}(h2drm_atomic_helper_connector_hdmi_update_infoframesh]j )}(h2drm_atomic_helper_connector_hdmi_update_infoframesh]h2drm_atomic_helper_connector_hdmi_update_infoframes}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#hhhj#hMubj)}(hB(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj($hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj9$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;$modnameN classnameNj j )}j ]j)}jj$sb4c.drm_atomic_helper_connector_hdmi_update_infoframesasbuh1hhj$ubj )}(h h]h }(hjY$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(hjOh]h*}(hjg$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$ubj )}(h connectorh]h connector}(hjt$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj$ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]jU$4c.drm_atomic_helper_connector_hdmi_update_infoframesasbuh1hhj$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$ubj )}(hstateh]hstate}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj$ubeh}(h]h ]h"]h$]h&]j j uh1jhj#hhhj#hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#hhhj#hMubah}(h]j#ah ](j j eh"]h$]h&]j j )j huh1j{ hj#hMhj#hhubj )}(hhh]h)}(hUpdate the Infoframesh]hUpdate the Infoframes}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj %hhubah}(h]h ]h"]h$]h&]uh1j hj#hhhj#hMubeh}(h]h ](j functioneh"]h$]h&]j j j j&%j j&%j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector ``struct drm_atomic_commit *state`` The HDMI connector state to generate the infoframe from **Description** This function is meant for HDMI connector drivers to write their infoframes. It will typically be used in a **drm_connector_helper_funcs.atomic_enable** implementation. **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j )}(hj0%h]h Parameters}(hj2%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.%ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj*%ubjU )}(hhh](jZ )}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjO%h]hstruct drm_connector *connector}(hjQ%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjM%ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjI%ubj| )}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hjh%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjd%hMhje%ubah}(h]h ]h"]h$]h&]uh1j{ hjI%ubeh}(h]h ]h"]h$]h&]uh1jY hjd%hMhjF%ubjZ )}(h\``struct drm_atomic_commit *state`` The HDMI connector state to generate the infoframe from h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj%h]hstruct drm_atomic_commit *state}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj%ubj| )}(hhh]h)}(h7The HDMI connector state to generate the infoframe fromh]h7The HDMI connector state to generate the infoframe from}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj%ubah}(h]h ]h"]h$]h&]uh1j{ hj%ubeh}(h]h ]h"]h$]h&]uh1jY hj%hMhjF%ubeh}(h]h ]h"]h$]h&]uh1jT hj*%ubh)}(h**Description**h]j )}(hj%h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj*%ubh)}(hThis function is meant for HDMI connector drivers to write their infoframes. It will typically be used in a **drm_connector_helper_funcs.atomic_enable** implementation.h](hlThis function is meant for HDMI connector drivers to write their infoframes. It will typically be used in a }(hj%hhhNhNubj )}(h,**drm_connector_helper_funcs.atomic_enable**h]h(drm_connector_helper_funcs.atomic_enable}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubh implementation.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj*%ubh)}(h **Return**h]j )}(hj%h]hReturn}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj*%ubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj*%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq Ddrm_atomic_helper_connector_hdmi_update_audio_infoframe (C function)9c.drm_atomic_helper_connector_hdmi_update_audio_infoframehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hint drm_atomic_helper_connector_hdmi_update_audio_infoframe (struct drm_connector *connector, struct hdmi_audio_infoframe *frame)h]j )}(hint drm_atomic_helper_connector_hdmi_update_audio_infoframe(struct drm_connector *connector, struct hdmi_audio_infoframe *frame)h](j)}(hinth]hint}(hjA&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=&hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM,ubj )}(h h]h }(hjP&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=&hhhjO&hM,ubj )}(h7drm_atomic_helper_connector_hdmi_update_audio_infoframeh]j )}(h7drm_atomic_helper_connector_hdmi_update_audio_infoframeh]h7drm_atomic_helper_connector_hdmi_update_audio_infoframe}(hjb&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^&ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj=&hhhjO&hM,ubj)}(hE(struct drm_connector *connector, struct hdmi_audio_infoframe *frame)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj~&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz&ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j)}jjd&sb9c.drm_atomic_helper_connector_hdmi_update_audio_infoframeasbuh1hhjz&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz&ubj)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjz&ubj )}(h connectorh]h connector}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjv&ubj)}(h"struct hdmi_audio_infoframe *frameh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubh)}(hhh]j )}(hhdmi_audio_infoframeh]hhdmi_audio_infoframe}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j&9c.drm_atomic_helper_connector_hdmi_update_audio_infoframeasbuh1hhj&ubj )}(h h]h }(hj,'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj)}(hjOh]h*}(hj:'hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj&ubj )}(hframeh]hframe}(hjG'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjv&ubeh}(h]h ]h"]h$]h&]j j uh1jhj=&hhhjO&hM,ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj9&hhhjO&hM,ubah}(h]j4&ah ](j j eh"]h$]h&]j j )j huh1j{ hjO&hM,hj6&hhubj )}(hhh]h)}(hUpdate the Audio Infoframeh]hUpdate the Audio Infoframe}(hjq'hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM,hjn'hhubah}(h]h ]h"]h$]h&]uh1j hj6&hhhjO&hM,ubeh}(h]h ](j functioneh"]h$]h&]j j j j'j j'j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector ``struct hdmi_audio_infoframe *frame`` A pointer to the audio infoframe to write **Description** This function is meant for HDMI connector drivers to update their audio infoframe. It will typically be used in one of the ALSA hooks (most likely prepare). **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j )}(hj'h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM0hj'ubjU )}(hhh](jZ )}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj'h]hstruct drm_connector *connector}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM-hj'ubj| )}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM-hj'ubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hj'hM-hj'ubjZ )}(hQ``struct hdmi_audio_infoframe *frame`` A pointer to the audio infoframe to write h](j` )}(h&``struct hdmi_audio_infoframe *frame``h]jf )}(hj'h]h"struct hdmi_audio_infoframe *frame}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM.hj'ubj| )}(hhh]h)}(h)A pointer to the audio infoframe to writeh]h)A pointer to the audio infoframe to write}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hM.hj(ubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hj(hM.hj'ubeh}(h]h ]h"]h$]h&]uh1jT hj'ubh)}(h**Description**h]j )}(hj&(h]h Description}(hj((hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$(ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM0hj'ubh)}(hThis function is meant for HDMI connector drivers to update their audio infoframe. It will typically be used in one of the ALSA hooks (most likely prepare).h]hThis function is meant for HDMI connector drivers to update their audio infoframe. It will typically be used in one of the ALSA hooks (most likely prepare).}(hj<(hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM/hj'ubh)}(h **Return**h]j )}(hjM(h]hReturn}(hjO(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjK(ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM3hj'ubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hjc(hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM4hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq Cdrm_atomic_helper_connector_hdmi_clear_audio_infoframe (C function)8c.drm_atomic_helper_connector_hdmi_clear_audio_infoframehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h\int drm_atomic_helper_connector_hdmi_clear_audio_infoframe (struct drm_connector *connector)h]j )}(h[int drm_atomic_helper_connector_hdmi_clear_audio_infoframe(struct drm_connector *connector)h](j)}(hinth]hint}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMXubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj(hMXubj )}(h6drm_atomic_helper_connector_hdmi_clear_audio_infoframeh]j )}(h6drm_atomic_helper_connector_hdmi_clear_audio_infoframeh]h6drm_atomic_helper_connector_hdmi_clear_audio_infoframe}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj(hMXubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j)}jj(sb8c.drm_atomic_helper_connector_hdmi_clear_audio_infoframeasbuh1hhj(ubj )}(h h]h }(hj )hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubj )}(h connectorh]h connector}(hj()hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj(ubah}(h]h ]h"]h$]h&]j j uh1jhj(hhhj(hMXubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj(hMXubah}(h]j(ah ](j j eh"]h$]h&]j j )j huh1j{ hj(hMXhj(hhubj )}(hhh]h)}(h Stop sending the Audio Infoframeh]h Stop sending the Audio Infoframe}(hjR)hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMXhjO)hhubah}(h]h ]h"]h$]h&]uh1j hj(hhhj(hMXubeh}(h]h ](j functioneh"]h$]h&]j j j jj)j jj)j j j uh1jv hhhjhNhNubj )}(hX@**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector **Description** This function is meant for HDMI connector drivers to stop sending their audio infoframe. It will typically be used in one of the ALSA hooks (most likely shutdown). **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j )}(hjt)h]h Parameters}(hjv)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjr)ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM\hjn)ubjU )}(hhh]jZ )}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj)h]hstruct drm_connector *connector}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMYhj)ubj| )}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMYhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hj)hMYhj)ubah}(h]h ]h"]h$]h&]uh1jT hjn)ubh)}(h**Description**h]j )}(hj)h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM[hjn)ubh)}(hThis function is meant for HDMI connector drivers to stop sending their audio infoframe. It will typically be used in one of the ALSA hooks (most likely shutdown).h]hThis function is meant for HDMI connector drivers to stop sending their audio infoframe. It will typically be used in one of the ALSA hooks (most likely shutdown).}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMZhjn)ubh)}(h **Return**h]j )}(hj)h]hReturn}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM^hjn)ubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hj *hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM_hjn)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5drm_atomic_helper_connector_hdmi_hotplug (C function)*c.drm_atomic_helper_connector_hdmi_hotplughNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hqvoid drm_atomic_helper_connector_hdmi_hotplug (struct drm_connector *connector, enum drm_connector_status status)h]j )}(hpvoid drm_atomic_helper_connector_hdmi_hotplug(struct drm_connector *connector, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hj:*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6*hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMubj )}(h h]h }(hjI*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6*hhhjH*hMubj )}(h(drm_atomic_helper_connector_hdmi_hotplugh]j )}(h(drm_atomic_helper_connector_hdmi_hotplugh]h(drm_atomic_helper_connector_hdmi_hotplug}(hj[*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjW*ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6*hhhjH*hMubj)}(hC(struct drm_connector *connector, enum drm_connector_status status)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjw*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs*ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j)}jj]*sb*c.drm_atomic_helper_connector_hdmi_hotplugasbuh1hhjs*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs*ubj)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjs*ubj )}(h connectorh]h connector}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjo*ubj)}(h enum drm_connector_status statush](j )}(hj+h]henum}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj +modnameN classnameNj j )}j ]j**c.drm_atomic_helper_connector_hdmi_hotplugasbuh1hhj*ubj )}(h h]h }(hj%+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(hstatush]hstatus}(hj3+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjo*ubeh}(h]h ]h"]h$]h&]j j uh1jhj6*hhhjH*hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2*hhhjH*hMubah}(h]j-*ah ](j j eh"]h$]h&]j j )j huh1j{ hjH*hMhj/*hhubj )}(hhh]h)}(h/Handle the hotplug event for the HDMI connectorh]h/Handle the hotplug event for the HDMI connector}(hj]+hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjZ+hhubah}(h]h ]h"]h$]h&]uh1j hj/*hhhjH*hMubeh}(h]h ](j functioneh"]h$]h&]j j j ju+j ju+j j j uh1jv hhhjhNhNubj )}(hX **Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector ``enum drm_connector_status status`` Connection status **Description** This function should be called as a part of the .detect() / .detect_ctx() callbacks for all status changes.h](h)}(h**Parameters**h]j )}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}+ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjy+ubjU )}(hhh](jZ )}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj+h]hstruct drm_connector *connector}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj+ubj| )}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hj+hMhj+ubjZ )}(h7``enum drm_connector_status status`` Connection status h](j` )}(h$``enum drm_connector_status status``h]jf )}(hj+h]h enum drm_connector_status status}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj+ubj| )}(hhh]h)}(hConnection statush]hConnection status}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hj+hMhj+ubeh}(h]h ]h"]h$]h&]uh1jT hjy+ubh)}(h**Description**h]j )}(hj,h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjy+ubh)}(hkThis function should be called as a part of the .detect() / .detect_ctx() callbacks for all status changes.h]hkThis function should be called as a part of the .detect() / .detect_ctx() callbacks for all status changes.}(hj(,hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjy+ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_atomic_helper_connector_hdmi_force (C function)(c.drm_atomic_helper_connector_hdmi_forcehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hMvoid drm_atomic_helper_connector_hdmi_force (struct drm_connector *connector)h]j )}(hLvoid drm_atomic_helper_connector_hdmi_force(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjW,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS,hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMubj )}(h h]h }(hjf,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS,hhhje,hMubj )}(h&drm_atomic_helper_connector_hdmi_forceh]j )}(h&drm_atomic_helper_connector_hdmi_forceh]h&drm_atomic_helper_connector_hdmi_force}(hjx,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt,ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjS,hhhje,hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j)}jjz,sb(c.drm_atomic_helper_connector_hdmi_forceasbuh1hhj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj,ubj )}(h connectorh]h connector}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubah}(h]h ]h"]h$]h&]j j uh1jhjS,hhhje,hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjO,hhhje,hMubah}(h]jJ,ah ](j j eh"]h$]h&]j j )j huh1j{ hje,hMhjL,hhubj )}(hhh]h)}(h3HDMI Connector implementation of the force callbackh]h3HDMI Connector implementation of the force callback}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj-hhubah}(h]h ]h"]h$]h&]uh1j hjL,hhhje,hMubeh}(h]h ](j functioneh"]h$]h&]j j j j/-j j/-j j j uh1jv hhhjhNhNubj )}(hXS**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector **Description** This function implements the .force() callback for the HDMI connectors. It can either be used directly as the callback or should be called from within the .force() callback implementation to maintain the HDMI-specific connector's data.h](h)}(h**Parameters**h]j )}(hj9-h]h Parameters}(hj;-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7-ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj3-ubjU )}(hhh]jZ )}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjX-h]hstruct drm_connector *connector}(hjZ-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjV-ubah}(h]h ]h"]h$]h&]uh1j_ ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjR-ubj| )}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hjq-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjm-hMhjn-ubah}(h]h ]h"]h$]h&]uh1j{ hjR-ubeh}(h]h ]h"]h$]h&]uh1jY hjm-hMhjO-ubah}(h]h ]h"]h$]h&]uh1jT hj3-ubh)}(h**Description**h]j )}(hj-h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj3-ubh)}(hThis function implements the .force() callback for the HDMI connectors. It can either be used directly as the callback or should be called from within the .force() callback implementation to maintain the HDMI-specific connector's data.h]hThis function implements the .force() callback for the HDMI connectors. It can either be used directly as the callback or should be called from within the .force() callback implementation to maintain the HDMI-specific connector’s data.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:250: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj3-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubeh}(h]jah ]h"]h$]functions referenceah&]uh1hhjhhhhhKjbCKubeh}(h]jah ]h"]hdmi atomic state helpersah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hHDCP Helper Functions Referenceh]hHDCP Helper Functions Reference}(hj-hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj-hhhhhKubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_hdcp_check_ksvs_revoked (C function)c.drm_hdcp_check_ksvs_revokedhNtauh1jd hj-hhhNhNubjw )}(hhh](j| )}(hUint drm_hdcp_check_ksvs_revoked (struct drm_device *drm_dev, u8 *ksvs, u32 ksv_count)h]j )}(hTint drm_hdcp_check_ksvs_revoked(struct drm_device *drm_dev, u8 *ksvs, u32 ksv_count)h](j)}(hinth]hint}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-hhhj.hMubj )}(hdrm_hdcp_check_ksvs_revokedh]j )}(hdrm_hdcp_check_ksvs_revokedh]hdrm_hdcp_check_ksvs_revoked}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj-hhhj.hMubj)}(h5(struct drm_device *drm_dev, u8 *ksvs, u32 ksv_count)h](j)}(hstruct drm_device *drm_devh](j )}(hj h]hstruct}(hj4.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0.ubj )}(h h]h }(hjA.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0.ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjR.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjT.modnameN classnameNj j )}j ]j)}jj.sbc.drm_hdcp_check_ksvs_revokedasbuh1hhj0.ubj )}(h h]h }(hjr.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0.ubj)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj0.ubj )}(hdrm_devh]hdrm_dev}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,.ubj)}(hu8 *ksvsh](h)}(hhh]j )}(hu8h]hu8}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]jn.c.drm_hdcp_check_ksvs_revokedasbuh1hhj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.ubj )}(hksvsh]hksvs}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,.ubj)}(h u32 ksv_counth](h)}(hhh]j )}(hu32h]hu32}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]jn.c.drm_hdcp_check_ksvs_revokedasbuh1hhj.ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h ksv_counth]h ksv_count}(hj*/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,.ubeh}(h]h ]h"]h$]h&]j j uh1jhj-hhhj.hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj-hhhj.hMubah}(h]j-ah ](j j eh"]h$]h&]j j )j huh1j{ hj.hMhj-hhubj )}(hhh]h)}(h#Check the revoked status of the IDsh]h#Check the revoked status of the IDs}(hjT/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjQ/hhubah}(h]h ]h"]h$]h&]uh1j hj-hhhj.hMubeh}(h]h ](j functioneh"]h$]h&]j j j jl/j jl/j j j uh1jv hhhj-hNhNubj )}(hXq**Parameters** ``struct drm_device *drm_dev`` drm_device for which HDCP revocation check is requested ``u8 *ksvs`` List of KSVs (HDCP receiver IDs) ``u32 ksv_count`` KSV count passed in through **ksvs** **Description** This function reads the HDCP System renewability Message(SRM Table) from userspace as a firmware and parses it for the revoked HDCP KSVs(Receiver IDs) detected by DCP LLC. Once the revoked KSVs are known, revoked state of the KSVs in the list passed in by display drivers are decided and response is sent. SRM should be presented in the name of "display_hdcp_srm.bin". Format of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdf **Return** Count of the revoked KSVs or -ve error number in case of the failure.h](h)}(h**Parameters**h]j )}(hjv/h]h Parameters}(hjx/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjt/ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjp/ubjU )}(hhh](jZ )}(hW``struct drm_device *drm_dev`` drm_device for which HDCP revocation check is requested h](j` )}(h``struct drm_device *drm_dev``h]jf )}(hj/h]hstruct drm_device *drm_dev}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj/ubj| )}(hhh]h)}(h7drm_device for which HDCP revocation check is requestedh]h7drm_device for which HDCP revocation check is requested}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hj/hMhj/ubjZ )}(h.``u8 *ksvs`` List of KSVs (HDCP receiver IDs) h](j` )}(h ``u8 *ksvs``h]jf )}(hj/h]hu8 *ksvs}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj/ubj| )}(hhh]h)}(h List of KSVs (HDCP receiver IDs)h]h List of KSVs (HDCP receiver IDs)}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hj/hMhj/ubjZ )}(h7``u32 ksv_count`` KSV count passed in through **ksvs** h](j` )}(h``u32 ksv_count``h]jf )}(hj0h]h u32 ksv_count}(hj 0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj0ubj| )}(hhh]h)}(h$KSV count passed in through **ksvs**h](hKSV count passed in through }(hj 0hhhNhNubj )}(h**ksvs**h]hksvs}(hj(0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj 0ubeh}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1j{ hj0ubeh}(h]h ]h"]h$]h&]uh1jY hj0hMhj/ubeh}(h]h ]h"]h$]h&]uh1jT hjp/ubh)}(h**Description**h]j )}(hjP0h]h Description}(hjR0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjN0ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chM hjp/ubh)}(hX1This function reads the HDCP System renewability Message(SRM Table) from userspace as a firmware and parses it for the revoked HDCP KSVs(Receiver IDs) detected by DCP LLC. Once the revoked KSVs are known, revoked state of the KSVs in the list passed in by display drivers are decided and response is sent.h]hX1This function reads the HDCP System renewability Message(SRM Table) from userspace as a firmware and parses it for the revoked HDCP KSVs(Receiver IDs) detected by DCP LLC. Once the revoked KSVs are known, revoked state of the KSVs in the list passed in by display drivers are decided and response is sent.}(hjf0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjp/ubh)}(h>SRM should be presented in the name of "display_hdcp_srm.bin".h]hBSRM should be presented in the name of “display_hdcp_srm.bin”.}(hju0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjp/ubh)}(hXFormat of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdfh](hFormat of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification }(hj0hhhNhNubjn)}(h=https://www.digital-cp.com/sites/default/files/specificationsh]h=https://www.digital-cp.com/sites/default/files/specifications}(hj0hhhNhNubah}(h]h ]h"]h$]h&]refurij0uh1jmhj0ubho/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification }(hj0hhhNhNubjn)}(h=https://www.digital-cp.com/sites/default/files/specificationsh]h=https://www.digital-cp.com/sites/default/files/specifications}(hj0hhhNhNubah}(h]h ]h"]h$]h&]refurij0uh1jmhj0ubhA/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdf}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjp/ubh)}(h **Return**h]j )}(hj0h]hReturn}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjp/ubh)}(hECount of the revoked KSVs or -ve error number in case of the failure.h]hECount of the revoked KSVs or -ve error number in case of the failure.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjp/ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj-hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq =drm_connector_attach_content_protection_property (C function)2c.drm_connector_attach_content_protection_propertyhNtauh1jd hj-hhhNhNubjw )}(hhh](j| )}(hnint drm_connector_attach_content_protection_property (struct drm_connector *connector, bool hdcp_content_type)h]j )}(hmint drm_connector_attach_content_protection_property(struct drm_connector *connector, bool hdcp_content_type)h](j)}(hinth]hint}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMFubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhj1hMFubj )}(h0drm_connector_attach_content_protection_propertyh]j )}(h0drm_connector_attach_content_protection_propertyh]h0drm_connector_attach_content_protection_property}(hj!1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj0hhhj1hMFubj)}(h9(struct drm_connector *connector, bool hdcp_content_type)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj=1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj91ubj )}(h h]h }(hjJ1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj91ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj[1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]1modnameN classnameNj j )}j ]j)}jj#1sb2c.drm_connector_attach_content_protection_propertyasbuh1hhj91ubj )}(h h]h }(hj{1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj91ubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj91ubj )}(h connectorh]h connector}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj91ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj51ubj)}(hbool hdcp_content_typeh](j)}(hjIh]hbool}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(hhdcp_content_typeh]hhdcp_content_type}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj51ubeh}(h]h ]h"]h$]h&]j j uh1jhj0hhhj1hMFubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj0hhhj1hMFubah}(h]j0ah ](j j eh"]h$]h&]j j )j huh1j{ hj1hMFhj0hhubj )}(hhh]h)}(h"attach content protection propertyh]h"attach content protection property}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMFhj1hhubah}(h]h ]h"]h$]h&]uh1j hj0hhhj1hMFubeh}(h]h ](j functioneh"]h$]h&]j j j j 2j j 2j j j uh1jv hhhj-hNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` connector to attach CP property on. ``bool hdcp_content_type`` is HDCP Content Type property needed for connector **Description** This is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP. When hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector. This property is used for sending the protected content's stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel. Content type will be used during the HDCP 2.2 authentication. Content type will be set to :c:type:`drm_connector_state.hdcp_content_type `. The content protection will be set to :c:type:`drm_connector_state.content_protection ` When kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector. **Return** Zero on success, negative errno on failure.h](h)}(h**Parameters**h]j )}(hj2h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMJhj2ubjU )}(hhh](jZ )}(hH``struct drm_connector *connector`` connector to attach CP property on. h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj52h]hstruct drm_connector *connector}(hj72hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj32ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMIhj/2ubj| )}(hhh]h)}(h#connector to attach CP property on.h]h#connector to attach CP property on.}(hjN2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJ2hMIhjK2ubah}(h]h ]h"]h$]h&]uh1j{ hj/2ubeh}(h]h ]h"]h$]h&]uh1jY hjJ2hMIhj,2ubjZ )}(hN``bool hdcp_content_type`` is HDCP Content Type property needed for connector h](j` )}(h``bool hdcp_content_type``h]jf )}(hjn2h]hbool hdcp_content_type}(hjp2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjl2ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMJhjh2ubj| )}(hhh]h)}(h2is HDCP Content Type property needed for connectorh]h2is HDCP Content Type property needed for connector}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMJhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjh2ubeh}(h]h ]h"]h$]h&]uh1jY hj2hMJhj,2ubeh}(h]h ]h"]h$]h&]uh1jT hj2ubh)}(h**Description**h]j )}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMLhj2ubh)}(hThis is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP.h]hThis is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMKhj2ubh)}(hWhen hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector.h]hWhen hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMOhj2ubh)}(hThis property is used for sending the protected content's stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel.h]hThis property is used for sending the protected content’s stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMRhj2ubh)}(hContent type will be used during the HDCP 2.2 authentication. Content type will be set to :c:type:`drm_connector_state.hdcp_content_type `.h](hZContent type will be used during the HDCP 2.2 authentication. Content type will be set to }(hj2hhhNhNubh)}(hE:c:type:`drm_connector_state.hdcp_content_type `h]jf )}(hj2h]h%drm_connector_state.hdcp_content_type}(hj2hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMVhj2ubh.}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj3hMVhj2ubh)}(hlThe content protection will be set to :c:type:`drm_connector_state.content_protection `h](h&The content protection will be set to }(hj3hhhNhNubh)}(hF:c:type:`drm_connector_state.content_protection `h]jf )}(hj(3h]h&drm_connector_state.content_protection}(hj*3hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj&3ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMYhj3ubeh}(h]h ]h"]h$]h&]uh1hhjE3hMYhj2ubh)}(hWhen kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector.h]hWhen kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector.}(hjL3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chM[hj2ubh)}(h **Return**h]j )}(hj]3h]hReturn}(hj_3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[3ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chM_hj2ubh)}(h+Zero on success, negative errno on failure.h]h+Zero on success, negative errno on failure.}(hjs3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chM`hj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj-hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_hdcp_update_content_protection (C function)$c.drm_hdcp_update_content_protectionhNtauh1jd hj-hhhNhNubjw )}(hhh](j| )}(hRvoid drm_hdcp_update_content_protection (struct drm_connector *connector, u64 val)h]j )}(hQvoid drm_hdcp_update_content_protection(struct drm_connector *connector, u64 val)h](j)}(hvoidh]hvoid}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhj3hMubj )}(h"drm_hdcp_update_content_protectionh]j )}(h"drm_hdcp_update_content_protectionh]h"drm_hdcp_update_content_protection}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhj3hMubj)}(h*(struct drm_connector *connector, u64 val)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]j)}jj3sb$c.drm_hdcp_update_content_protectionasbuh1hhj3ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hjOh]h*}(hj+4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3ubj )}(h connectorh]h connector}(hj84hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hu64 valh](h)}(hhh]j )}(hu64h]hu64}(hjT4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjV4modnameN classnameNj j )}j ]j4$c.drm_hdcp_update_content_protectionasbuh1hhjM4ubj )}(h h]h }(hjr4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM4ubj )}(hvalh]hval}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubeh}(h]h ]h"]h$]h&]j j uh1jhj3hhhj3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhj3hMubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j{ hj3hMhj3hhubj )}(hhh]h)}(h3Updates the content protection state of a connectorh]h3Updates the content protection state of a connector}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj4hhubah}(h]h ]h"]h$]h&]uh1j hj3hhhj3hMubeh}(h]h ](j functioneh"]h$]h&]j j j j4j j4j j j uh1jv hhhj-hNhNubj )}(hXz**Parameters** ``struct drm_connector *connector`` drm_connector on which content protection state needs an update ``u64 val`` New state of the content protection property **Description** This function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector's state and generate an uevent to notify the userspace.h](h)}(h**Parameters**h]j )}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj4ubjU )}(hhh](jZ )}(hd``struct drm_connector *connector`` drm_connector on which content protection state needs an update h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj4h]hstruct drm_connector *connector}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj4ubj| )}(hhh]h)}(h?drm_connector on which content protection state needs an updateh]h?drm_connector on which content protection state needs an update}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj5ubah}(h]h ]h"]h$]h&]uh1j{ hj4ubeh}(h]h ]h"]h$]h&]uh1jY hj5hMhj4ubjZ )}(h9``u64 val`` New state of the content protection property h](j` )}(h ``u64 val``h]jf )}(hj$5h]hu64 val}(hj&5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"5ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj5ubj| )}(hhh]h)}(h,New state of the content protection propertyh]h,New state of the content protection property}(hj=5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj95hMhj:5ubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hj95hMhj4ubeh}(h]h ]h"]h$]h&]uh1jT hj4ubh)}(h**Description**h]j )}(hj_5h]h Description}(hja5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]5ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj4ubh)}(hXThis function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector's state and generate an uevent to notify the userspace.h]hXThis function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector’s state and generate an uevent to notify the userspace.}(hju5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:256: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj-hhhNhNubeh}(h]jah ]h"]hdcp helper functions referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h'Display Port Helper Functions Referenceh]h'Display Port Helper Functions Reference}(hj5hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj5hhhhhMubh)}(hThese functions contain some common logic and helpers at various abstraction levels to deal with Display Port sink devices and related things like DP aux channel transfers, EDID reading over DP aux channels, decoding certain DPCD blocks, ...h]hThese functions contain some common logic and helpers at various abstraction levels to deal with Display Port sink devices and related things like DP aux channel transfers, EDID reading over DP aux channels, decoding certain DPCD blocks, ...}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_dp_helper.chKDhj5hhubh)}(hThe DisplayPort AUX channel is an abstraction to allow generic, driver- independent access to AUX functionality. Drivers can take advantage of this by filling in the fields of the drm_dp_aux structure.h]hThe DisplayPort AUX channel is an abstraction to allow generic, driver- independent access to AUX functionality. Drivers can take advantage of this by filling in the fields of the drm_dp_aux structure.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_dp_helper.chMChj5hhubh)}(hTransactions are described using a hardware-independent drm_dp_aux_msg structure, which is passed into a driver's .transfer() implementation. Both native and I2C-over-AUX transactions are supported.h]hTransactions are described using a hardware-independent drm_dp_aux_msg structure, which is passed into a driver’s .transfer() implementation. Both native and I2C-over-AUX transactions are supported.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_dp_helper.chMGhj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq dp_sdp_header (C struct)c.dp_sdp_headerhNtauh1jd hj5hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhNubjw )}(hhh](j| )}(h dp_sdp_headerh]j )}(hstruct dp_sdp_headerh](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhKubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5hhhj5hKubj )}(h dp_sdp_headerh]j )}(hj5h]h dp_sdp_header}(hj 6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj5hhhj5hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5hhhj5hKubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j{ hj5hKhj5hhubj )}(hhh]h)}(hDP secondary data packet headerh]hDP secondary data packet header}(hj,6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj)6hhubah}(h]h ]h"]h$]h&]uh1j hj5hhhj5hKubeh}(h]h ](j structeh"]h$]h&]j j j jD6j jD6j j j uh1jv hhhj5hj5hNubj )}(hX0**Definition**:: struct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; }; **Members** ``HB0`` Secondary Data Packet ID ``HB1`` Secondary Data Packet Type ``HB2`` Secondary Data Packet Specific header, Byte 0 ``HB3`` Secondary Data packet Specific header, Byte 1h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjP6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjL6ubh:}(hjL6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjH6ubj, )}(hIstruct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; };h]hIstruct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; };}hji6sbah}(h]h ]h"]h$]h&]j j uh1j+ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjH6ubh)}(h **Members**h]j )}(hjz6h]hMembers}(hj|6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjx6ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjH6ubjU )}(hhh](jZ )}(h!``HB0`` Secondary Data Packet ID h](j` )}(h``HB0``h]jf )}(hj6h]hHB0}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj6ubj| )}(hhh]h)}(hSecondary Data Packet IDh]hSecondary Data Packet ID}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhj6ubjZ )}(h#``HB1`` Secondary Data Packet Type h](j` )}(h``HB1``h]jf )}(hj6h]hHB1}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj6ubj| )}(hhh]h)}(hSecondary Data Packet Typeh]hSecondary Data Packet Type}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhj6ubjZ )}(h6``HB2`` Secondary Data Packet Specific header, Byte 0 h](j` )}(h``HB2``h]jf )}(hj 7h]hHB2}(hj 7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj 7ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj7ubj| )}(hhh]h)}(h-Secondary Data Packet Specific header, Byte 0h]h-Secondary Data Packet Specific header, Byte 0}(hj$7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 7hMhj!7ubah}(h]h ]h"]h$]h&]uh1j{ hj7ubeh}(h]h ]h"]h$]h&]uh1jY hj 7hMhj6ubjZ )}(h5``HB3`` Secondary Data packet Specific header, Byte 1h](j` )}(h``HB3``h]jf )}(hjD7h]hHB3}(hjF7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjB7ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj>7ubj| )}(hhh]h)}(h-Secondary Data packet Specific header, Byte 1h]h-Secondary Data packet Specific header, Byte 1}(hj]7hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjZ7ubah}(h]h ]h"]h$]h&]uh1j{ hj>7ubeh}(h]h ]h"]h$]h&]uh1jY hjY7hMhj6ubeh}(h]h ]h"]h$]h&]uh1jT hjH6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhj5hNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq dp_sdp (C struct)c.dp_sdphNtauh1jd hj5hhhj5hNubjw )}(hhh](j| )}(hdp_sdph]j )}(h struct dp_sdph](j )}(hj h]hstruct}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhj7hMubj )}(hdp_sdph]j )}(hj7h]hdp_sdp}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhj7hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhj7hMubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j{ hj7hMhj7hhubj )}(hhh]h)}(hDP secondary data packeth]hDP secondary data packet}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj7hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhj7hMubeh}(h]h ](j structeh"]h$]h&]j j j j7j j7j j j uh1jv hhhj5hj5hNubj )}(hXz**Definition**:: struct dp_sdp { struct dp_sdp_header sdp_header; u8 db[32]; }; **Members** ``sdp_header`` DP secondary data packet header ``db`` DP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reservedh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubh:}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj7ubj, )}(hFstruct dp_sdp { struct dp_sdp_header sdp_header; u8 db[32]; };h]hFstruct dp_sdp { struct dp_sdp_header sdp_header; u8 db[32]; };}hj8sbah}(h]h ]h"]h$]h&]j j uh1j+ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj7ubh)}(h **Members**h]j )}(hj.8h]hMembers}(hj08hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,8ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj7ubjU )}(hhh](jZ )}(h/``sdp_header`` DP secondary data packet header h](j` )}(h``sdp_header``h]jf )}(hjM8h]h sdp_header}(hjO8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjK8ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjG8ubj| )}(hhh]h)}(hDP secondary data packet headerh]hDP secondary data packet header}(hjf8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjb8hMhjc8ubah}(h]h ]h"]h$]h&]uh1j{ hjG8ubeh}(h]h ]h"]h$]h&]uh1jY hjb8hMhjD8ubjZ )}(hX``db`` DP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reservedh](j` )}(h``db``h]jf )}(hj8h]hdb}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj8ubj| )}(hhh]h)}(hXDP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reservedh]hXDP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reserved}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj8ubah}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hj8hMhjD8ubeh}(h]h ]h"]h$]h&]uh1jT hj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhj5hNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq dp_pixelformat (C enum)c.dp_pixelformathNtauh1jd hj5hhhj5hNubjw )}(hhh](j| )}(hdp_pixelformath]j )}(henum dp_pixelformath](j )}(hj+h]henum}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8hhhj8hMubj )}(hdp_pixelformath]j )}(hj8h]hdp_pixelformat}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj8hhhj8hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj8hhhj8hMubah}(h]j8ah ](j j eh"]h$]h&]j j )j huh1j{ hj8hMhj8hhubj )}(hhh]h)}(hdrm DP Pixel encoding formatsh]hdrm DP Pixel encoding formats}(hj"9hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj9hhubah}(h]h ]h"]h$]h&]uh1j hj8hhhj8hMubeh}(h]h ](j enumeh"]h$]h&]j j j j:9j j:9j j j uh1jv hhhj5hj5hNubj )}(hX**Constants** ``DP_PIXELFORMAT_RGB`` RGB pixel encoding format ``DP_PIXELFORMAT_YUV444`` YCbCr 4:4:4 pixel encoding format ``DP_PIXELFORMAT_YUV422`` YCbCr 4:2:2 pixel encoding format ``DP_PIXELFORMAT_YUV420`` YCbCr 4:2:0 pixel encoding format ``DP_PIXELFORMAT_Y_ONLY`` Y Only pixel encoding format ``DP_PIXELFORMAT_RAW`` RAW pixel encoding format ``DP_PIXELFORMAT_RESERVED`` Reserved pixel encoding formath](h)}(h **Constants**h]j )}(hjD9h]h Constants}(hjF9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjB9ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj>9ubjU )}(hhh](jZ )}(h1``DP_PIXELFORMAT_RGB`` RGB pixel encoding format h](j` )}(h``DP_PIXELFORMAT_RGB``h]jf )}(hjc9h]hDP_PIXELFORMAT_RGB}(hje9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hja9ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj]9ubj| )}(hhh]h)}(hRGB pixel encoding formath]hRGB pixel encoding format}(hj|9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjx9hMhjy9ubah}(h]h ]h"]h$]h&]uh1j{ hj]9ubeh}(h]h ]h"]h$]h&]uh1jY hjx9hMhjZ9ubjZ )}(h<``DP_PIXELFORMAT_YUV444`` YCbCr 4:4:4 pixel encoding format h](j` )}(h``DP_PIXELFORMAT_YUV444``h]jf )}(hj9h]hDP_PIXELFORMAT_YUV444}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj9ubj| )}(hhh]h)}(h!YCbCr 4:4:4 pixel encoding formath]h!YCbCr 4:4:4 pixel encoding format}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhjZ9ubjZ )}(h<``DP_PIXELFORMAT_YUV422`` YCbCr 4:2:2 pixel encoding format h](j` )}(h``DP_PIXELFORMAT_YUV422``h]jf )}(hj9h]hDP_PIXELFORMAT_YUV422}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj9ubj| )}(hhh]h)}(h!YCbCr 4:2:2 pixel encoding formath]h!YCbCr 4:2:2 pixel encoding format}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhjZ9ubjZ )}(h<``DP_PIXELFORMAT_YUV420`` YCbCr 4:2:0 pixel encoding format h](j` )}(h``DP_PIXELFORMAT_YUV420``h]jf )}(hj:h]hDP_PIXELFORMAT_YUV420}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj :ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj:ubj| )}(hhh]h)}(h!YCbCr 4:2:0 pixel encoding formath]h!YCbCr 4:2:0 pixel encoding format}(hj':hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#:hMhj$:ubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hj#:hMhjZ9ubjZ )}(h7``DP_PIXELFORMAT_Y_ONLY`` Y Only pixel encoding format h](j` )}(h``DP_PIXELFORMAT_Y_ONLY``h]jf )}(hjG:h]hDP_PIXELFORMAT_Y_ONLY}(hjI:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjE:ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjA:ubj| )}(hhh]h)}(hY Only pixel encoding formath]hY Only pixel encoding format}(hj`:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\:hMhj]:ubah}(h]h ]h"]h$]h&]uh1j{ hjA:ubeh}(h]h ]h"]h$]h&]uh1jY hj\:hMhjZ9ubjZ )}(h1``DP_PIXELFORMAT_RAW`` RAW pixel encoding format h](j` )}(h``DP_PIXELFORMAT_RAW``h]jf )}(hj:h]hDP_PIXELFORMAT_RAW}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~:ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjz:ubj| )}(hhh]h)}(hRAW pixel encoding formath]hRAW pixel encoding format}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj:ubah}(h]h ]h"]h$]h&]uh1j{ hjz:ubeh}(h]h ]h"]h$]h&]uh1jY hj:hMhjZ9ubjZ )}(h:``DP_PIXELFORMAT_RESERVED`` Reserved pixel encoding formath](j` )}(h``DP_PIXELFORMAT_RESERVED``h]jf )}(hj:h]hDP_PIXELFORMAT_RESERVED}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj:ubj| )}(hhh]h)}(hReserved pixel encoding formath]hReserved pixel encoding format}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj:ubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hj:hMhjZ9ubeh}(h]h ]h"]h$]h&]uh1jT hj>9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhj5hNubh)}(h**Description**h]j )}(hj:h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj5hhubh)}(hThis enum is used to indicate DP VSC SDP Pixel encoding formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis enum is used to indicate DP VSC SDP Pixel encoding formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq dp_colorimetry (C enum)c.dp_colorimetryhNtauh1jd hj5hhhj5hNubjw )}(hhh](j| )}(hdp_colorimetryh]j )}(henum dp_colorimetryh](j )}(hj+h]henum}(hj:;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6;hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMubj )}(h h]h }(hjH;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6;hhhjG;hMubj )}(hdp_colorimetryh]j )}(hj4;h]hdp_colorimetry}(hjZ;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV;ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6;hhhjG;hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2;hhhjG;hMubah}(h]j-;ah ](j j eh"]h$]h&]j j )j huh1j{ hjG;hMhj/;hhubj )}(hhh]h)}(hdrm DP Colorimetry formatsh]hdrm DP Colorimetry formats}(hj|;hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjy;hhubah}(h]h ]h"]h$]h&]uh1j hj/;hhhjG;hMubeh}(h]h ](j enumeh"]h$]h&]j j j j;j j;j j j uh1jv hhhj5hj5hNubj )}(hX **Constants** ``DP_COLORIMETRY_DEFAULT`` sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format ``DP_COLORIMETRY_RGB_WIDE_FIXED`` RGB wide gamut fixed point colorimetry format ``DP_COLORIMETRY_BT709_YCC`` ITU-R BT.709 colorimetry format ``DP_COLORIMETRY_RGB_WIDE_FLOAT`` RGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format ``DP_COLORIMETRY_XVYCC_601`` xvYCC601 colorimetry format ``DP_COLORIMETRY_OPRGB`` OpRGB colorimetry format ``DP_COLORIMETRY_XVYCC_709`` xvYCC709 colorimetry format ``DP_COLORIMETRY_DCI_P3_RGB`` DCI-P3 (SMPTE RP 431-2) colorimetry format ``DP_COLORIMETRY_SYCC_601`` sYCC601 colorimetry format ``DP_COLORIMETRY_RGB_CUSTOM`` RGB Custom Color Profile colorimetry format ``DP_COLORIMETRY_OPYCC_601`` opYCC601 colorimetry format ``DP_COLORIMETRY_BT2020_RGB`` ITU-R BT.2020 R' G' B' colorimetry format ``DP_COLORIMETRY_BT2020_CYCC`` ITU-R BT.2020 Y'c C'bc C'rc colorimetry format ``DP_COLORIMETRY_BT2020_YCC`` ITU-R BT.2020 Y' C'b C'r colorimetry formath](h)}(h **Constants**h]j )}(hj;h]h Constants}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj;ubjU )}(hhh](jZ )}(hS``DP_COLORIMETRY_DEFAULT`` sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format h](j` )}(h``DP_COLORIMETRY_DEFAULT``h]jf )}(hj;h]hDP_COLORIMETRY_DEFAULT}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM hj;ubj| )}(hhh]h)}(h7sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry formath]h7sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM hj;ubah}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hj;hM hj;ubjZ )}(hP``DP_COLORIMETRY_RGB_WIDE_FIXED`` RGB wide gamut fixed point colorimetry format h](j` )}(h!``DP_COLORIMETRY_RGB_WIDE_FIXED``h]jf )}(hj;h]hDP_COLORIMETRY_RGB_WIDE_FIXED}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM hj;ubj| )}(hhh]h)}(h-RGB wide gamut fixed point colorimetry formath]h-RGB wide gamut fixed point colorimetry format}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj <hM hj <ubah}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hj <hM hj;ubjZ )}(h=``DP_COLORIMETRY_BT709_YCC`` ITU-R BT.709 colorimetry format h](j` )}(h``DP_COLORIMETRY_BT709_YCC``h]jf )}(hj0<h]hDP_COLORIMETRY_BT709_YCC}(hj2<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.<ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj*<ubj| )}(hhh]h)}(hITU-R BT.709 colorimetry formath]hITU-R BT.709 colorimetry format}(hjI<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjE<hMhjF<ubah}(h]h ]h"]h$]h&]uh1j{ hj*<ubeh}(h]h ]h"]h$]h&]uh1jY hjE<hMhj;ubjZ )}(hk``DP_COLORIMETRY_RGB_WIDE_FLOAT`` RGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format h](j` )}(h!``DP_COLORIMETRY_RGB_WIDE_FLOAT``h]jf )}(hji<h]hDP_COLORIMETRY_RGB_WIDE_FLOAT}(hjk<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjg<ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhjc<ubj| )}(hhh]h)}(hHRGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry formath]hHRGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj<ubah}(h]h ]h"]h$]h&]uh1j{ hjc<ubeh}(h]h ]h"]h$]h&]uh1jY hj~<hMhj;ubjZ )}(h9``DP_COLORIMETRY_XVYCC_601`` xvYCC601 colorimetry format h](j` )}(h``DP_COLORIMETRY_XVYCC_601``h]jf )}(hj<h]hDP_COLORIMETRY_XVYCC_601}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj<ubj| )}(hhh]h)}(hxvYCC601 colorimetry formath]hxvYCC601 colorimetry format}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj<ubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hj<hMhj;ubjZ )}(h2``DP_COLORIMETRY_OPRGB`` OpRGB colorimetry format h](j` )}(h``DP_COLORIMETRY_OPRGB``h]jf )}(hj<h]hDP_COLORIMETRY_OPRGB}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj<ubj| )}(hhh]h)}(hOpRGB colorimetry formath]hOpRGB colorimetry format}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj<ubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hj<hMhj;ubjZ )}(h9``DP_COLORIMETRY_XVYCC_709`` xvYCC709 colorimetry format h](j` )}(h``DP_COLORIMETRY_XVYCC_709``h]jf )}(hj=h]hDP_COLORIMETRY_XVYCC_709}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj=ubj| )}(hhh]h)}(hxvYCC709 colorimetry formath]hxvYCC709 colorimetry format}(hj.=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*=hMhj+=ubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hj*=hMhj;ubjZ )}(hI``DP_COLORIMETRY_DCI_P3_RGB`` DCI-P3 (SMPTE RP 431-2) colorimetry format h](j` )}(h``DP_COLORIMETRY_DCI_P3_RGB``h]jf )}(hjN=h]hDP_COLORIMETRY_DCI_P3_RGB}(hjP=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjL=ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM hjH=ubj| )}(hhh]h)}(h*DCI-P3 (SMPTE RP 431-2) colorimetry formath]h*DCI-P3 (SMPTE RP 431-2) colorimetry format}(hjg=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjc=hM hjd=ubah}(h]h ]h"]h$]h&]uh1j{ hjH=ubeh}(h]h ]h"]h$]h&]uh1jY hjc=hM hj;ubjZ )}(h7``DP_COLORIMETRY_SYCC_601`` sYCC601 colorimetry format h](j` )}(h``DP_COLORIMETRY_SYCC_601``h]jf )}(hj=h]hDP_COLORIMETRY_SYCC_601}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM#hj=ubj| )}(hhh]h)}(hsYCC601 colorimetry formath]hsYCC601 colorimetry format}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hM#hj=ubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hj=hM#hj;ubjZ )}(hJ``DP_COLORIMETRY_RGB_CUSTOM`` RGB Custom Color Profile colorimetry format h](j` )}(h``DP_COLORIMETRY_RGB_CUSTOM``h]jf )}(hj=h]hDP_COLORIMETRY_RGB_CUSTOM}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM&hj=ubj| )}(hhh]h)}(h+RGB Custom Color Profile colorimetry formath]h+RGB Custom Color Profile colorimetry format}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hM&hj=ubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hj=hM&hj;ubjZ )}(h9``DP_COLORIMETRY_OPYCC_601`` opYCC601 colorimetry format h](j` )}(h``DP_COLORIMETRY_OPYCC_601``h]jf )}(hj=h]hDP_COLORIMETRY_OPYCC_601}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM)hj=ubj| )}(hhh]h)}(hopYCC601 colorimetry formath]hopYCC601 colorimetry format}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hM)hj>ubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hj>hM)hj;ubjZ )}(hH``DP_COLORIMETRY_BT2020_RGB`` ITU-R BT.2020 R' G' B' colorimetry format h](j` )}(h``DP_COLORIMETRY_BT2020_RGB``h]jf )}(hj2>h]hDP_COLORIMETRY_BT2020_RGB}(hj4>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0>ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM,hj,>ubj| )}(hhh]h)}(h)ITU-R BT.2020 R' G' B' colorimetry formath]h/ITU-R BT.2020 R’ G’ B’ colorimetry format}(hjK>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjG>hM,hjH>ubah}(h]h ]h"]h$]h&]uh1j{ hj,>ubeh}(h]h ]h"]h$]h&]uh1jY hjG>hM,hj;ubjZ )}(hN``DP_COLORIMETRY_BT2020_CYCC`` ITU-R BT.2020 Y'c C'bc C'rc colorimetry format h](j` )}(h``DP_COLORIMETRY_BT2020_CYCC``h]jf )}(hjk>h]hDP_COLORIMETRY_BT2020_CYCC}(hjm>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hji>ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM/hje>ubj| )}(hhh]h)}(h.ITU-R BT.2020 Y'c C'bc C'rc colorimetry formath]h4ITU-R BT.2020 Y’c C’bc C’rc colorimetry format}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hM/hj>ubah}(h]h ]h"]h$]h&]uh1j{ hje>ubeh}(h]h ]h"]h$]h&]uh1jY hj>hM/hj;ubjZ )}(hI``DP_COLORIMETRY_BT2020_YCC`` ITU-R BT.2020 Y' C'b C'r colorimetry formath](j` )}(h``DP_COLORIMETRY_BT2020_YCC``h]jf )}(hj>h]hDP_COLORIMETRY_BT2020_YCC}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM1hj>ubj| )}(hhh]h)}(h+ITU-R BT.2020 Y' C'b C'r colorimetry formath]h1ITU-R BT.2020 Y’ C’b C’r colorimetry format}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM2hj>ubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hj>hM1hj;ubeh}(h]h ]h"]h$]h&]uh1jT hj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhj5hNubh)}(h**Description**h]j )}(hj>h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM4hj5hhubh)}(hThis enum is used to indicate DP VSC SDP Colorimetry formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] and a name of enum member follows enum drm_colorimetry definition.h]hThis enum is used to indicate DP VSC SDP Colorimetry formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] and a name of enum member follows enum drm_colorimetry definition.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMhj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq dp_dynamic_range (C enum)c.dp_dynamic_rangehNtauh1jd hj5hhhj5hNubjw )}(hhh](j| )}(hdp_dynamic_rangeh]j )}(henum dp_dynamic_rangeh](j )}(hj+h]henum}(hj%?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!?hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM ubj )}(h h]h }(hj3?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!?hhhj2?hM ubj )}(hdp_dynamic_rangeh]j )}(hj?h]hdp_dynamic_range}(hjE?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!?hhhj2?hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?hhhj2?hM ubah}(h]j?ah ](j j eh"]h$]h&]j j )j huh1j{ hj2?hM hj?hhubj )}(hhh]h)}(hdrm DP Dynamic Rangeh]hdrm DP Dynamic Range}(hjg?hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM+hjd?hhubah}(h]h ]h"]h$]h&]uh1j hj?hhhj2?hM ubeh}(h]h ](j enumeh"]h$]h&]j j j j?j j?j j j uh1jv hhhj5hj5hNubj )}(h[**Constants** ``DP_DYNAMIC_RANGE_VESA`` VESA range ``DP_DYNAMIC_RANGE_CTA`` CTA rangeh](h)}(h **Constants**h]j )}(hj?h]h Constants}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM/hj?ubjU )}(hhh](jZ )}(h%``DP_DYNAMIC_RANGE_VESA`` VESA range h](j` )}(h``DP_DYNAMIC_RANGE_VESA``h]jf )}(hj?h]hDP_DYNAMIC_RANGE_VESA}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM2hj?ubj| )}(hhh]h)}(h VESA rangeh]h VESA range}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hM2hj?ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hM2hj?ubjZ )}(h"``DP_DYNAMIC_RANGE_CTA`` CTA rangeh](j` )}(h``DP_DYNAMIC_RANGE_CTA``h]jf )}(hj?h]hDP_DYNAMIC_RANGE_CTA}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM4hj?ubj| )}(hhh]h)}(h CTA rangeh]h CTA range}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM5hj?ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hM4hj?ubeh}(h]h ]h"]h$]h&]uh1jT hj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhj5hNubh)}(h**Description**h]j )}(hj$@h]h Description}(hj&@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"@ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM7hj5hhubh)}(hThis enum is used to indicate DP VSC SDP Dynamic Range. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis enum is used to indicate DP VSC SDP Dynamic Range. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hj:@hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM,hj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq dp_content_type (C enum)c.dp_content_typehNtauh1jd hj5hhhj5hNubjw )}(hhh](j| )}(hdp_content_typeh]j )}(henum dp_content_typeh](j )}(hj+h]henum}(hjb@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^@hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM3ubj )}(h h]h }(hjp@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^@hhhjo@hM3ubj )}(hdp_content_typeh]j )}(hj\@h]hdp_content_type}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^@hhhjo@hM3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZ@hhhjo@hM3ubah}(h]jU@ah ](j j eh"]h$]h&]j j )j huh1j{ hjo@hM3hjW@hhubj )}(hhh]h)}(hdrm DP Content Typeh]hdrm DP Content Type}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM:hj@hhubah}(h]h ]h"]h$]h&]uh1j hjW@hhhjo@hM3ubeh}(h]h ](j enumeh"]h$]h&]j j j j@j j@j j j uh1jv hhhj5hj5hNubj )}(h**Constants** ``DP_CONTENT_TYPE_NOT_DEFINED`` Not defined type ``DP_CONTENT_TYPE_GRAPHICS`` Graphics type ``DP_CONTENT_TYPE_PHOTO`` Photo type ``DP_CONTENT_TYPE_VIDEO`` Video type ``DP_CONTENT_TYPE_GAME`` Game typeh](h)}(h **Constants**h]j )}(hj@h]h Constants}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM>hj@ubjU )}(hhh](jZ )}(h1``DP_CONTENT_TYPE_NOT_DEFINED`` Not defined type h](j` )}(h``DP_CONTENT_TYPE_NOT_DEFINED``h]jf )}(hj@h]hDP_CONTENT_TYPE_NOT_DEFINED}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMAhj@ubj| )}(hhh]h)}(hNot defined typeh]hNot defined type}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMAhj@ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj@hMAhj@ubjZ )}(h+``DP_CONTENT_TYPE_GRAPHICS`` Graphics type h](j` )}(h``DP_CONTENT_TYPE_GRAPHICS``h]jf )}(hjAh]hDP_CONTENT_TYPE_GRAPHICS}(hj AhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMDhjAubj| )}(hhh]h)}(h Graphics typeh]h Graphics type}(hj7AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3AhMDhj4Aubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hj3AhMDhj@ubjZ )}(h%``DP_CONTENT_TYPE_PHOTO`` Photo type h](j` )}(h``DP_CONTENT_TYPE_PHOTO``h]jf )}(hjWAh]hDP_CONTENT_TYPE_PHOTO}(hjYAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjUAubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMGhjQAubj| )}(hhh]h)}(h Photo typeh]h Photo type}(hjpAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlAhMGhjmAubah}(h]h ]h"]h$]h&]uh1j{ hjQAubeh}(h]h ]h"]h$]h&]uh1jY hjlAhMGhj@ubjZ )}(h%``DP_CONTENT_TYPE_VIDEO`` Video type h](j` )}(h``DP_CONTENT_TYPE_VIDEO``h]jf )}(hjAh]hDP_CONTENT_TYPE_VIDEO}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMJhjAubj| )}(hhh]h)}(h Video typeh]h Video type}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhMJhjAubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjAhMJhj@ubjZ )}(h"``DP_CONTENT_TYPE_GAME`` Game typeh](j` )}(h``DP_CONTENT_TYPE_GAME``h]jf )}(hjAh]hDP_CONTENT_TYPE_GAME}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMLhjAubj| )}(hhh]h)}(h Game typeh]h Game type}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMMhjAubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjAhMLhj@ubeh}(h]h ]h"]h$]h&]uh1jT hj@ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhj5hNubh)}(h**Description**h]j )}(hj Bh]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Bubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhMOhj5hhubh)}(hThis enum is used to indicate DP VSC SDP Content Types. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] CTA-861-G defines content types and expected processing by a sink deviceh]hThis enum is used to indicate DP VSC SDP Content Types. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] CTA-861-G defines content types and expected processing by a sink device}(hj"BhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:265: ./include/drm/display/drm_dp.hhM;hj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_vsc_sdp (C struct)c.drm_dp_vsc_sdphNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hdrm_dp_vsc_sdph]j )}(hstruct drm_dp_vsc_sdph](j )}(hj h]hstruct}(hjJBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFBhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKubj )}(h h]h }(hjXBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFBhhhjWBhKubj )}(hdrm_dp_vsc_sdph]j )}(hjDBh]hdrm_dp_vsc_sdp}(hjjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfBubah}(h]h ](j j eh"]h$]h&]j j uh1j hjFBhhhjWBhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjBBhhhjWBhKubah}(h]j=Bah ](j j eh"]h$]h&]j j )j huh1j{ hjWBhKhj?Bhhubj )}(hhh]h)}(hdrm DP VSC SDPh]hdrm DP VSC SDP}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKLhjBhhubah}(h]h ]h"]h$]h&]uh1j hj?BhhhjWBhKubeh}(h]h ](j structeh"]h$]h&]j j j jBj jBj j j uh1jv hhhj5hNhNubj )}(hX**Definition**:: struct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; }; **Members** ``sdp_type`` secondary-data packet type ``revision`` revision number ``length`` number of valid data bytes ``pixelformat`` pixel encoding format ``colorimetry`` colorimetry format ``bpc`` bit per color ``dynamic_range`` dynamic range information ``content_type`` CTA-861-G defines content types and expected processing by a sink deviceh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh:}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKPhjBubj, )}(hXstruct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; };h]hXstruct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; };}hjBsbah}(h]h ]h"]h$]h&]j j uh1j+ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKRhjBubh)}(h **Members**h]j )}(hjBh]hMembers}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhK]hjBubjU )}(hhh](jZ )}(h(``sdp_type`` secondary-data packet type h](j` )}(h ``sdp_type``h]jf )}(hjBh]hsdp_type}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKShjBubj| )}(hhh]h)}(hsecondary-data packet typeh]hsecondary-data packet type}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChKShjCubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hjChKShjBubjZ )}(h``revision`` revision number h](j` )}(h ``revision``h]jf )}(hj2Ch]hrevision}(hj4ChhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0Cubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKThj,Cubj| )}(hhh]h)}(hrevision numberh]hrevision number}(hjKChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGChKThjHCubah}(h]h ]h"]h$]h&]uh1j{ hj,Cubeh}(h]h ]h"]h$]h&]uh1jY hjGChKThjBubjZ )}(h&``length`` number of valid data bytes h](j` )}(h ``length``h]jf )}(hjkCh]hlength}(hjmChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiCubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKUhjeCubj| )}(hhh]h)}(hnumber of valid data bytesh]hnumber of valid data bytes}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChKUhjCubah}(h]h ]h"]h$]h&]uh1j{ hjeCubeh}(h]h ]h"]h$]h&]uh1jY hjChKUhjBubjZ )}(h&``pixelformat`` pixel encoding format h](j` )}(h``pixelformat``h]jf )}(hjCh]h pixelformat}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKVhjCubj| )}(hhh]h)}(hpixel encoding formath]hpixel encoding format}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChKVhjCubah}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hjChKVhjBubjZ )}(h#``colorimetry`` colorimetry format h](j` )}(h``colorimetry``h]jf )}(hjCh]h colorimetry}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKWhjCubj| )}(hhh]h)}(hcolorimetry formath]hcolorimetry format}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChKWhjCubah}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hjChKWhjBubjZ )}(h``bpc`` bit per color h](j` )}(h``bpc``h]jf )}(hjDh]hbpc}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKXhjDubj| )}(hhh]h)}(h bit per colorh]h bit per color}(hj/DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+DhKXhj,Dubah}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hj+DhKXhjBubjZ )}(h,``dynamic_range`` dynamic range information h](j` )}(h``dynamic_range``h]jf )}(hjODh]h dynamic_range}(hjQDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMDubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKYhjIDubj| )}(hhh]h)}(hdynamic range informationh]hdynamic range information}(hjhDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdDhKYhjeDubah}(h]h ]h"]h$]h&]uh1j{ hjIDubeh}(h]h ]h"]h$]h&]uh1jY hjdDhKYhjBubjZ )}(hY``content_type`` CTA-861-G defines content types and expected processing by a sink deviceh](j` )}(h``content_type``h]jf )}(hjDh]h content_type}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKYhjDubj| )}(hhh]h)}(hHCTA-861-G defines content types and expected processing by a sink deviceh]hHCTA-861-G defines content types and expected processing by a sink device}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKZhjDubah}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hjDhKYhjBubeh}(h]h ]h"]h$]h&]uh1jT hjBubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubh)}(h**Description**h]j )}(hjDh]h Description}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhK]hj5hhubh)}(hThis structure represents a DP VSC SDP of drm It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis structure represents a DP VSC SDP of drm It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKMhj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_as_sdp (C struct)c.drm_dp_as_sdphNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h drm_dp_as_sdph]j )}(hstruct drm_dp_as_sdph](j )}(hj h]hstruct}(hj EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKTubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEhhhjEhKTubj )}(h drm_dp_as_sdph]j )}(hjEh]h drm_dp_as_sdp}(hj)EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%Eubah}(h]h ](j j eh"]h$]h&]j j uh1j hjEhhhjEhKTubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjEhhhjEhKTubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j{ hjEhKThjDhhubj )}(hhh]h)}(hdrm DP Adaptive Sync SDPh]hdrm DP Adaptive Sync SDP}(hjKEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKghjHEhhubah}(h]h ]h"]h$]h&]uh1j hjDhhhjEhKTubeh}(h]h ](j structeh"]h$]h&]j j j jcEj jcEj j j uh1jv hhhj5hNhNubj )}(hX**Definition**:: struct drm_dp_as_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; int vtotal; int target_rr; int duration_incr_ms; int duration_decr_ms; bool target_rr_divider; enum operation_mode mode; int coasting_vtotal; }; **Members** ``sdp_type`` Secondary-data packet type ``revision`` Revision Number ``length`` Number of valid data bytes ``vtotal`` Minimum Vertical Vtotal ``target_rr`` Target Refresh ``duration_incr_ms`` Successive frame duration increase ``duration_decr_ms`` Successive frame duration decrease ``target_rr_divider`` Target refresh rate divider ``mode`` Adaptive Sync Operation Mode ``coasting_vtotal`` Coasting vtotalh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjoEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkEubh:}(hjkEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKkhjgEubj, )}(hXstruct drm_dp_as_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; int vtotal; int target_rr; int duration_incr_ms; int duration_decr_ms; bool target_rr_divider; enum operation_mode mode; int coasting_vtotal; };h]hXstruct drm_dp_as_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; int vtotal; int target_rr; int duration_incr_ms; int duration_decr_ms; bool target_rr_divider; enum operation_mode mode; int coasting_vtotal; };}hjEsbah}(h]h ]h"]h$]h&]j j uh1j+ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKmhjgEubh)}(h **Members**h]j )}(hjEh]hMembers}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKzhjgEubjU )}(hhh](jZ )}(h(``sdp_type`` Secondary-data packet type h](j` )}(h ``sdp_type``h]jf )}(hjEh]hsdp_type}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKnhjEubj| )}(hhh]h)}(hSecondary-data packet typeh]hSecondary-data packet type}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKnhjEubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hjEhKnhjEubjZ )}(h``revision`` Revision Number h](j` )}(h ``revision``h]jf )}(hjEh]hrevision}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKohjEubj| )}(hhh]h)}(hRevision Numberh]hRevision Number}(hj FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKohjFubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hjFhKohjEubjZ )}(h&``length`` Number of valid data bytes h](j` )}(h ``length``h]jf )}(hj*Fh]hlength}(hj,FhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(Fubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKphj$Fubj| )}(hhh]h)}(hNumber of valid data bytesh]hNumber of valid data bytes}(hjCFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?FhKphj@Fubah}(h]h ]h"]h$]h&]uh1j{ hj$Fubeh}(h]h ]h"]h$]h&]uh1jY hj?FhKphjEubjZ )}(h#``vtotal`` Minimum Vertical Vtotal h](j` )}(h ``vtotal``h]jf )}(hjcFh]hvtotal}(hjeFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaFubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKqhj]Fubj| )}(hhh]h)}(hMinimum Vertical Vtotalh]hMinimum Vertical Vtotal}(hj|FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxFhKqhjyFubah}(h]h ]h"]h$]h&]uh1j{ hj]Fubeh}(h]h ]h"]h$]h&]uh1jY hjxFhKqhjEubjZ )}(h``target_rr`` Target Refresh h](j` )}(h ``target_rr``h]jf )}(hjFh]h target_rr}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKrhjFubj| )}(hhh]h)}(hTarget Refreshh]hTarget Refresh}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKrhjFubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjFhKrhjEubjZ )}(h8``duration_incr_ms`` Successive frame duration increase h](j` )}(h``duration_incr_ms``h]jf )}(hjFh]hduration_incr_ms}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKshjFubj| )}(hhh]h)}(h"Successive frame duration increaseh]h"Successive frame duration increase}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKshjFubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjFhKshjEubjZ )}(h8``duration_decr_ms`` Successive frame duration decrease h](j` )}(h``duration_decr_ms``h]jf )}(hjGh]hduration_decr_ms}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj Gubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKthjGubj| )}(hhh]h)}(h"Successive frame duration decreaseh]h"Successive frame duration decrease}(hj'GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#GhKthj$Gubah}(h]h ]h"]h$]h&]uh1j{ hjGubeh}(h]h ]h"]h$]h&]uh1jY hj#GhKthjEubjZ )}(h2``target_rr_divider`` Target refresh rate divider h](j` )}(h``target_rr_divider``h]jf )}(hjGGh]htarget_rr_divider}(hjIGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEGubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKuhjAGubj| )}(hhh]h)}(hTarget refresh rate dividerh]hTarget refresh rate divider}(hj`GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\GhKuhj]Gubah}(h]h ]h"]h$]h&]uh1j{ hjAGubeh}(h]h ]h"]h$]h&]uh1jY hj\GhKuhjEubjZ )}(h&``mode`` Adaptive Sync Operation Mode h](j` )}(h``mode``h]jf )}(hjGh]hmode}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~Gubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKvhjzGubj| )}(hhh]h)}(hAdaptive Sync Operation Modeh]hAdaptive Sync Operation Mode}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKvhjGubah}(h]h ]h"]h$]h&]uh1j{ hjzGubeh}(h]h ]h"]h$]h&]uh1jY hjGhKvhjEubjZ )}(h#``coasting_vtotal`` Coasting vtotalh](j` )}(h``coasting_vtotal``h]jf )}(hjGh]hcoasting_vtotal}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKvhjGubj| )}(hhh]h)}(hCoasting vtotalh]hCoasting vtotal}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKwhjGubah}(h]h ]h"]h$]h&]uh1j{ hjGubeh}(h]h ]h"]h$]h&]uh1jY hjGhKvhjEubeh}(h]h ]h"]h$]h&]uh1jT hjgEubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubh)}(h**Description**h]j )}(hjGh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKzhj5hhubh)}(hThis structure represents a DP AS SDP of drm It is based on DP 2.1 spec [Table 2-126: Adaptive-Sync SDP Header Bytes] and [Table 2-127: Adaptive-Sync SDP Payload for DB0 through DB8]h]hThis structure represents a DP AS SDP of drm It is based on DP 2.1 spec [Table 2-126: Adaptive-Sync SDP Header Bytes] and [Table 2-127: Adaptive-Sync SDP Payload for DB0 through DB8]}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKhhj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_dsc_sink_supports_format (C function)!c.drm_dp_dsc_sink_supports_formathNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hdbool drm_dp_dsc_sink_supports_format (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 output_format)h]j )}(hcbool drm_dp_dsc_sink_supports_format(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 output_format)h](j)}(hjIh]hbool}(hj:HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Hhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKubj )}(h h]h }(hjHHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6HhhhjGHhKubj )}(hdrm_dp_dsc_sink_supports_formath]j )}(hdrm_dp_dsc_sink_supports_formath]hdrm_dp_dsc_sink_supports_format}(hjZHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVHubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6HhhhjGHhKubj)}(h?(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 output_format)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjvHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrHubh)}(hhh]j )}(hu8h]hu8}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j)}jj\Hsb!c.drm_dp_dsc_sink_supports_formatasbuh1hhjrHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrHubj )}(hdsc_dpcdh]hdsc_dpcd}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrHubj)}(h[h]h[}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjrHubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]jH!c.drm_dp_dsc_sink_supports_formatasbuh1hhjrHubj)}(h]h]h]}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjrHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnHubj)}(hu8 output_formath](h)}(hhh]j )}(hu8h]hu8}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jH!c.drm_dp_dsc_sink_supports_formatasbuh1hhjIubj )}(h h]h }(hj9IhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h output_formath]h output_format}(hjGIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnHubeh}(h]h ]h"]h$]h&]j j uh1jhj6HhhhjGHhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2HhhhjGHhKubah}(h]j-Hah ](j j eh"]h$]h&]j j )j huh1j{ hjGHhKhj/Hhhubj )}(hhh]h)}(h3check if sink supports DSC with given output formath]h3check if sink supports DSC with given output format}(hjqIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKhjnIhhubah}(h]h ]h"]h$]h&]uh1j hj/HhhhjGHhKubeh}(h]h ](j functioneh"]h$]h&]j j j jIj jIj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC-capability DPCDs of the sink ``u8 output_format`` output_format which is to be checked **Description** Returns true if the sink supports DSC with the given output_format, false otherwise.h](h)}(h**Parameters**h]j )}(hjIh]h Parameters}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKhjIubjU )}(hhh](jZ )}(hQ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC-capability DPCDs of the sink h](j` )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jf )}(hjIh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKhjIubj| )}(hhh]h)}(h DSC-capability DPCDs of the sinkh]h DSC-capability DPCDs of the sink}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhKhjIubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjIhKhjIubjZ )}(h:``u8 output_format`` output_format which is to be checked h](j` )}(h``u8 output_format``h]jf )}(hjIh]hu8 output_format}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKhjIubj| )}(hhh]h)}(h$output_format which is to be checkedh]h$output_format which is to be checked}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjJhKhjIubeh}(h]h ]h"]h$]h&]uh1jT hjIubh)}(h**Description**h]j )}(hj&Jh]h Description}(hj(JhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$Jubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhKhjIubh)}(hTReturns true if the sink supports DSC with the given output_format, false otherwise.h]hTReturns true if the sink supports DSC with the given output_format, false otherwise.}(hjMubah}(h]h ]h"]h$]h&]uh1jT hj"Mubh)}(h**Description**h]j )}(hjMh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM<hj"Mubh)}(h4Determine if the provided link rate is an UHBR rate.h]h4Determine if the provided link rate is an UHBR rate.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM;hj"Mubh)}(h **Return**h]j )}(hjMh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM=hj"Mubh)}(h*``True`` if **link_rate** is an UHBR rate.h](jf )}(h``True``h]hTrue}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubh if }(hjMhhhNhNubj )}(h **link_rate**h]h link_rate}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubh is an UHBR rate.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM>hj"Mubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_aux_msg (C struct)c.drm_dp_aux_msghNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hdrm_dp_aux_msgh]j )}(hstruct drm_dp_aux_msgh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Nhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMCubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj NhhhjNhMCubj )}(hdrm_dp_aux_msgh]j )}(hjNh]hdrm_dp_aux_msg}(hj.NhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Nubah}(h]h ](j j eh"]h$]h&]j j uh1j hj NhhhjNhMCubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjNhhhjNhMCubah}(h]jNah ](j j eh"]h$]h&]j j )j huh1j{ hjNhMChjNhhubj )}(hhh]h)}(h#DisplayPort AUX channel transactionh]h#DisplayPort AUX channel transaction}(hjPNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMJhjMNhhubah}(h]h ]h"]h$]h&]uh1j hjNhhhjNhMCubeh}(h]h ](j structeh"]h$]h&]j j j jhNj jhNj j j uh1jv hhhj5hNhNubj )}(hX**Definition**:: struct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; }; **Members** ``address`` address of the (first) register to access ``request`` contains the type of transaction (see DP_AUX_* macros) ``reply`` upon completion, contains the reply type of the transaction ``buffer`` pointer to a transmission or reception buffer ``size`` size of **buffer**h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjtNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpNubh:}(hjpNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMNhjlNubj, )}(hustruct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; };h]hustruct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; };}hjNsbah}(h]h ]h"]h$]h&]j j uh1j+ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMPhjlNubh)}(h **Members**h]j )}(hjNh]hMembers}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMXhjlNubjU )}(hhh](jZ )}(h6``address`` address of the (first) register to access h](j` )}(h ``address``h]jf )}(hjNh]haddress}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMLhjNubj| )}(hhh]h)}(h)address of the (first) register to accessh]h)address of the (first) register to access}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhMLhjNubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjNhMLhjNubjZ )}(hC``request`` contains the type of transaction (see DP_AUX_* macros) h](j` )}(h ``request``h]jf )}(hjNh]hrequest}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMMhjNubj| )}(hhh]h)}(h6contains the type of transaction (see DP_AUX_* macros)h]h6contains the type of transaction (see DP_AUX_* macros)}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj OhMMhj Oubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hj OhMMhjNubjZ )}(hF``reply`` upon completion, contains the reply type of the transaction h](j` )}(h ``reply``h]jf )}(hj/Oh]hreply}(hj1OhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-Oubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMNhj)Oubj| )}(hhh]h)}(h;upon completion, contains the reply type of the transactionh]h;upon completion, contains the reply type of the transaction}(hjHOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDOhMNhjEOubah}(h]h ]h"]h$]h&]uh1j{ hj)Oubeh}(h]h ]h"]h$]h&]uh1jY hjDOhMNhjNubjZ )}(h9``buffer`` pointer to a transmission or reception buffer h](j` )}(h ``buffer``h]jf )}(hjhOh]hbuffer}(hjjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjfOubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMOhjbOubj| )}(hhh]h)}(h-pointer to a transmission or reception bufferh]h-pointer to a transmission or reception buffer}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}OhMOhj~Oubah}(h]h ]h"]h$]h&]uh1j{ hjbOubeh}(h]h ]h"]h$]h&]uh1jY hj}OhMOhjNubjZ )}(h``size`` size of **buffer**h](j` )}(h``size``h]jf )}(hjOh]hsize}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMOhjOubj| )}(hhh]h)}(hsize of **buffer**h](hsize of }(hjOhhhNhNubj )}(h **buffer**h]hbuffer}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMPhjOubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjOhMOhjNubeh}(h]h ]h"]h$]h&]uh1jT hjlNubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_aux_cec (C struct)c.drm_dp_aux_cechNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hdrm_dp_aux_cech]j )}(hstruct drm_dp_aux_cech](j )}(hj h]hstruct}(hj PhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMVubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjPhMVubj )}(hdrm_dp_aux_cech]j )}(hjPh]hdrm_dp_aux_cec}(hj)PhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%Pubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjPhMVubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjPhhhjPhMVubah}(h]jOah ](j j eh"]h$]h&]j j )j huh1j{ hjPhMVhjOhhubj )}(hhh]h)}(h"DisplayPort CEC-Tunneling-over-AUXh]h"DisplayPort CEC-Tunneling-over-AUX}(hjKPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM^hjHPhhubah}(h]h ]h"]h$]h&]uh1j hjOhhhjPhMVubeh}(h]h ](j structeh"]h$]h&]j j j jcPj jcPj j j uh1jv hhhj5hNhNubj )}(hX**Definition**:: struct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; }; **Members** ``lock`` mutex protecting this struct ``adap`` the CEC adapter for CEC-Tunneling-over-AUX support. ``connector`` the connector this CEC adapter is associated with ``unregister_work`` unregister the CEC adapterh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjoPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkPubh:}(hjkPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMbhjgPubj, )}(hstruct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; };h]hstruct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; };}hjPsbah}(h]h ]h"]h$]h&]j j uh1j+ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMdhjgPubh)}(h **Members**h]j )}(hjPh]hMembers}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMkhjgPubjU )}(hhh](jZ )}(h&``lock`` mutex protecting this struct h](j` )}(h``lock``h]jf )}(hjPh]hlock}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM`hjPubj| )}(hhh]h)}(hmutex protecting this structh]hmutex protecting this struct}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhM`hjPubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjPhM`hjPubjZ )}(h=``adap`` the CEC adapter for CEC-Tunneling-over-AUX support. h](j` )}(h``adap``h]jf )}(hjPh]hadap}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMahjPubj| )}(hhh]h)}(h3the CEC adapter for CEC-Tunneling-over-AUX support.h]h3the CEC adapter for CEC-Tunneling-over-AUX support.}(hj QhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMahjQubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjQhMahjPubjZ )}(h@``connector`` the connector this CEC adapter is associated with h](j` )}(h ``connector``h]jf )}(hj*Qh]h connector}(hj,QhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(Qubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMbhj$Qubj| )}(hhh]h)}(h1the connector this CEC adapter is associated withh]h1the connector this CEC adapter is associated with}(hjCQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?QhMbhj@Qubah}(h]h ]h"]h$]h&]uh1j{ hj$Qubeh}(h]h ]h"]h$]h&]uh1jY hj?QhMbhjPubjZ )}(h.``unregister_work`` unregister the CEC adapterh](j` )}(h``unregister_work``h]jf )}(hjcQh]hunregister_work}(hjeQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaQubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMbhj]Qubj| )}(hhh]h)}(hunregister the CEC adapterh]hunregister the CEC adapter}(hj|QhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMchjyQubah}(h]h ]h"]h$]h&]uh1j{ hj]Qubeh}(h]h ]h"]h$]h&]uh1jY hjxQhMbhjPubeh}(h]h ]h"]h$]h&]uh1jT hjgPubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_aux (C struct) c.drm_dp_auxhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h drm_dp_auxh]j )}(hstruct drm_dp_auxh](j )}(hj h]hstruct}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMiubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQhhhjQhMiubj )}(h drm_dp_auxh]j )}(hjQh]h drm_dp_aux}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ](j j eh"]h$]h&]j j uh1j hjQhhhjQhMiubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjQhhhjQhMiubah}(h]jQah ](j j eh"]h$]h&]j j )j huh1j{ hjQhMihjQhhubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMlhjQhhubah}(h]h ]h"]h$]h&]uh1j hjQhhhjQhMiubeh}(h]h ](j structeh"]h$]h&]j j j jRj jRj j j uh1jv hhhj5hNhNubj )}(hXD**Definition**:: struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; }; **Members** ``name`` user-visible name of this AUX channel and the I2C-over-AUX adapter. It's also used to specify the name of the I2C adapter. If set to ``NULL``, dev_name() of **dev** will be used. ``ddc`` I2C adapter that can be used for I2C-over-AUX communication ``dev`` pointer to struct device that is the parent for this AUX channel. ``drm_dev`` pointer to the :c:type:`drm_device` that owns this AUX channel. Beware, this may be ``NULL`` before drm_dp_aux_register() has been called. It should be set to the :c:type:`drm_device` that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it's perfectly fine to set this field later so long as it's assigned before calling drm_dp_aux_register(). ``crtc`` backpointer to the crtc that is currently using this AUX channel ``hw_mutex`` internal mutex used for locking transfers. Note that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access. ``crc_work`` worker that captures CRCs for each frame ``crc_count`` counter of captured frame CRCs ``transfer`` transfers a message representing a single AUX transaction. This is a hardware-specific implementation of how transactions are executed that the drivers must provide. A pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure. Helpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure. The **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case. Also note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected: - If the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. - If we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. ``wait_hpd_asserted`` wait for HPD to be asserted This is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly. If a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated. This function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions. This function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log. The semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep. NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted. ``i2c_nack_count`` Counts I2C NACKs, used for DP validation. ``i2c_defer_count`` Counts I2C DEFERs, used for DP validation. ``cec`` struct containing fields used for CEC-Tunneling-over-AUX. ``is_remote`` Is this AUX CH actually using sideband messaging. ``powered_down`` If true then the remote endpoint is powered down. ``no_zero_sized`` If the hw can't use zero sized transfers (NVIDIA) ``dpcd_probe_disabled`` If probing before a DPCD access is disabled.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj#RhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubh:}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMphjRubj, )}(hX>struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; };h]hX>struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; };}hjTubh)}(hNote that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access.h]hNote that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access.}(hjPThhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhj>Tubeh}(h]h ]h"]h$]h&]uh1j{ hj"Tubeh}(h]h ]h"]h$]h&]uh1jY hj=ThMhjcRubjZ )}(h6``crc_work`` worker that captures CRCs for each frame h](j` )}(h ``crc_work``h]jf )}(hjqTh]hcrc_work}(hjsThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoTubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjkTubj| )}(hhh]h)}(h(worker that captures CRCs for each frameh]h(worker that captures CRCs for each frame}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThMhjTubah}(h]h ]h"]h$]h&]uh1j{ hjkTubeh}(h]h ]h"]h$]h&]uh1jY hjThMhjcRubjZ )}(h-``crc_count`` counter of captured frame CRCs h](j` )}(h ``crc_count``h]jf )}(hjTh]h crc_count}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjTubj| )}(hhh]h)}(hcounter of captured frame CRCsh]hcounter of captured frame CRCs}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThMhjTubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjThMhjcRubjZ )}(hXJ``transfer`` transfers a message representing a single AUX transaction. This is a hardware-specific implementation of how transactions are executed that the drivers must provide. A pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure. Helpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure. The **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case. Also note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected: - If the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. - If we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. h](j` )}(h ``transfer``h]jf )}(hjTh]htransfer}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjTubj| )}(hhh](h)}(h:transfers a message representing a single AUX transaction.h]h:transfers a message representing a single AUX transaction.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjTubh)}(hjThis is a hardware-specific implementation of how transactions are executed that the drivers must provide.h]hjThis is a hardware-specific implementation of how transactions are executed that the drivers must provide.}(hj UhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjTubh)}(hA pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure.h](hA pointer to a }(hjUhhhNhNubh)}(h:c:type:`drm_dp_aux_msg`h]jf )}(hj$Uh]hdrm_dp_aux_msg}(hj&UhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj"Uubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_aux_msguh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjUubh structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAUhMhjTubh)}(hHelpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure.h](h?Helpers will propagate these errors, with the exception of the }(hjLUhhhNhNubjf )}(h ``-EBUSY``h]h-EBUSY}(hjTUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjLUubhR error, which causes a transaction to be retried. On a short, helpers will return }(hjLUhhhNhNubjf )}(h ``-EPROTO``h]h-EPROTO}(hjfUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjLUubh) to make it simpler to check for failure.}(hjLUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjTubh)}(hThe **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case.h](hThe }(hjUhhhNhNubj )}(h**transfer\(\)**h]h transfer()}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubh2 function must only modify the reply field of the }(hjUhhhNhNubh)}(h:c:type:`drm_dp_aux_msg`h]jf )}(hjUh]hdrm_dp_aux_msg}(hjUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_aux_msguh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjUubhD structure. The retry logic and i2c helpers assume this is the case.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhMhjTubh)}(hAlso note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected:h](h?Also note that this callback can be called no matter the state }(hjUhhhNhNubj )}(h**dev**h]hdev}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubhF is in and also no matter what state the panel is in. It’s expected:}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjTubh)}(hhh](h)}(hkIf the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. h]h)}(hjIf the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer.h](hIf the }(hjUhhhNhNubj )}(h**dev**h]hdev}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubh\ providing the AUX bus is currently unpowered then it will power itself up for the transfer.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjUubah}(h]h ]h"]h$]h&]uh1hhjUubh)}(hXIf we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. h]h)}(hXIf we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel.h]hX&If we’re on eDP (using a drm_panel) and the panel is not in a state where it can respond (it’s not powered or it’s in a low power state) then this function may return an error, but not crash. It’s up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjVubah}(h]h ]h"]h$]h&]uh1hhjUubeh}(h]h ]h"]h$]h&]jNj<uh1hhj VhMhjTubeh}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjThMhjcRubjZ )}(hXl``wait_hpd_asserted`` wait for HPD to be asserted This is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly. If a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated. This function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions. This function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log. The semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep. NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted. h](j` )}(h``wait_hpd_asserted``h]jf )}(hjCVh]hwait_hpd_asserted}(hjEVhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAVubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhj=Vubj| )}(hhh](h)}(hwait for HPD to be assertedh]hwait for HPD to be asserted}(hj\VhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjYVubh)}(hXThis is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly.h]hXThis is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we’re not using the AUX controller’s HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly.}(hjkVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjYVubh)}(hIf a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated.h]hIf a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller’s built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated.}(hjzVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjYVubh)}(hXThis function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions.h](hKThis function will efficiently wait for the HPD signal to be asserted. The }(hjVhhhNhNubhtitle_reference)}(h `wait_us`h]hwait_us}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjVubhe parameter that is passed in says that we know that the HPD signal is expected to be asserted within }(hjVhhhNhNubjV)}(h `wait_us`h]hwait_us}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjVubh8 microseconds. This function could wait for longer than }(hjVhhhNhNubjV)}(h `wait_us`h]hwait_us}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjVubh if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjYVubh)}(hThis function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log.h]hThis function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn’t asserted. This function should not print timeout errors to the log.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjYVubh)}(hThe semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep.h](heThe semantics of this function are designed to match the readx_poll_timeout() function. That means a }(hjVhhhNhNubjV)}(h `wait_us`h]hwait_us}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jVhjVubhP of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjYVubh)}(hX@NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted.h]hXBNOTE: this function specifically reports the state of the HPD pin that’s associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjYVubeh}(h]h ]h"]h$]h&]uh1j{ hj=Vubeh}(h]h ]h"]h$]h&]uh1jY hjXVhMhjcRubjZ )}(h=``i2c_nack_count`` Counts I2C NACKs, used for DP validation. h](j` )}(h``i2c_nack_count``h]jf )}(hj!Wh]hi2c_nack_count}(hj#WhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjWubj| )}(hhh]h)}(h)Counts I2C NACKs, used for DP validation.h]h)Counts I2C NACKs, used for DP validation.}(hj:WhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6WhMhj7Wubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hj6WhMhjcRubjZ )}(h?``i2c_defer_count`` Counts I2C DEFERs, used for DP validation. h](j` )}(h``i2c_defer_count``h]jf )}(hjZWh]hi2c_defer_count}(hj\WhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXWubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM hjTWubj| )}(hhh]h)}(h*Counts I2C DEFERs, used for DP validation.h]h*Counts I2C DEFERs, used for DP validation.}(hjsWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjoWhM hjpWubah}(h]h ]h"]h$]h&]uh1j{ hjTWubeh}(h]h ]h"]h$]h&]uh1jY hjoWhM hjcRubjZ )}(hB``cec`` struct containing fields used for CEC-Tunneling-over-AUX. h](j` )}(h``cec``h]jf )}(hjWh]hcec}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjWubj| )}(hhh]h)}(h9struct containing fields used for CEC-Tunneling-over-AUX.h]h9struct containing fields used for CEC-Tunneling-over-AUX.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMhjWubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjWhMhjcRubjZ )}(h@``is_remote`` Is this AUX CH actually using sideband messaging. h](j` )}(h ``is_remote``h]jf )}(hjWh]h is_remote}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjWubj| )}(hhh]h)}(h1Is this AUX CH actually using sideband messaging.h]h1Is this AUX CH actually using sideband messaging.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMhjWubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjWhMhjcRubjZ )}(hC``powered_down`` If true then the remote endpoint is powered down. h](j` )}(h``powered_down``h]jf )}(hjXh]h powered_down}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjWubj| )}(hhh]h)}(h1If true then the remote endpoint is powered down.h]h1If true then the remote endpoint is powered down.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMhjXubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjXhMhjcRubjZ )}(hD``no_zero_sized`` If the hw can't use zero sized transfers (NVIDIA) h](j` )}(h``no_zero_sized``h]jf )}(hj>Xh]h no_zero_sized}(hj@XhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj)}(hjOh]h*}(hjLZhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZubj )}(hvalueph]hvaluep}(hjYZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjTYubeh}(h]h ]h"]h$]h&]j j uh1jhjYhhhj.YhM0ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjYhhhj.YhM0ubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j{ hj.YhM0hjXhhubj )}(hhh]h)}(h read a single byte from the DPCDh]h read a single byte from the DPCD}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM0hjZhhubah}(h]h ]h"]h$]h&]uh1j hjXhhhj.YhM0ubeh}(h]h ](j functioneh"]h$]h&]j j j jZj jZj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned int offset`` address of the register to read ``u8 *valuep`` location where the value of the register will be stored **Description** Returns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.h](h)}(h**Parameters**h]j )}(hjZh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM4hjZubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjZh]hstruct drm_dp_aux *aux}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM1hjZubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhM1hjZubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjZhM1hjZubjZ )}(h8``unsigned int offset`` address of the register to read h](j` )}(h``unsigned int offset``h]jf )}(hjZh]hunsigned int offset}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM2hjZubj| )}(hhh]h)}(haddress of the register to readh]haddress of the register to read}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hM2hj[ubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hj[hM2hjZubjZ )}(hG``u8 *valuep`` location where the value of the register will be stored h](j` )}(h``u8 *valuep``h]jf )}(hj6[h]h u8 *valuep}(hj8[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4[ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM3hj0[ubj| )}(hhh]h)}(h7location where the value of the register will be storedh]h7location where the value of the register will be stored}(hjO[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjK[hM3hjL[ubah}(h]h ]h"]h$]h&]uh1j{ hj0[ubeh}(h]h ]h"]h$]h&]uh1jY hjK[hM3hjZubeh}(h]h ]h"]h$]h&]uh1jT hjZubh)}(h**Description**h]j )}(hjq[h]h Description}(hjs[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjo[ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM5hjZubh)}(hReturns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.h]hReturns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM4hjZubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_dp_dpcd_read_data (C function)c.drm_dp_dpcd_read_datahNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hbint drm_dp_dpcd_read_data (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(haint drm_dp_dpcd_read_data(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hinth]hint}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM@ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhhj[hM@ubj )}(hdrm_dp_dpcd_read_datah]j )}(hdrm_dp_dpcd_read_datah]hdrm_dp_dpcd_read_data}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhj[hM@ubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j)}jj[sbc.drm_dp_dpcd_read_dataasbuh1hhj[ubj )}(h h]h }(hj1\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hj?\hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(hauxh]haux}(hjL\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hje\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja\ubj )}(h h]h }(hjs\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja\ubj)}(hinth]hint}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja\ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja\ubj )}(hoffseth]hoffset}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj)}(hjOh]h*}(hj\hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj\ubj )}(hbufferh]hbuffer}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j-\c.drm_dp_dpcd_read_dataasbuh1hhj\ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj )}(hsizeh]hsize}(hj']hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubeh}(h]h ]h"]h$]h&]j j uh1jhj[hhhj[hM@ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[hhhj[hM@ubah}(h]j[ah ](j j eh"]h$]h&]j j )j huh1j{ hj[hM@hj[hhubj )}(hhh]h)}(h$read a series of bytes from the DPCDh]h$read a series of bytes from the DPCD}(hjQ]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM@hjN]hhubah}(h]h ]h"]h$]h&]uh1j hj[hhhj[hM@ubeh}(h]h ](j functioneh"]h$]h&]j j j ji]j ji]j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to read ``void *buffer`` buffer to store the register values ``size_t size`` number of bytes in **buffer** **Description** Returns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h](h)}(h**Parameters**h]j )}(hjs]h]h Parameters}(hju]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjq]ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMDhjm]ubjU )}(hhh](jZ )}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj]h]hstruct drm_dp_aux *aux}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMAhj]ubj| )}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMAhj]ubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hj]hMAhj]ubjZ )}(h@``unsigned int offset`` address of the (first) register to read h](j` )}(h``unsigned int offset``h]jf )}(hj]h]hunsigned int offset}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMBhj]ubj| )}(hhh]h)}(h'address of the (first) register to readh]h'address of the (first) register to read}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMBhj]ubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hj]hMBhj]ubjZ )}(h5``void *buffer`` buffer to store the register values h](j` )}(h``void *buffer``h]jf )}(hj^h]h void *buffer}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMChj]ubj| )}(hhh]h)}(h#buffer to store the register valuesh]h#buffer to store the register values}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMChj^ubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hj^hMChj]ubjZ )}(h.``size_t size`` number of bytes in **buffer** h](j` )}(h``size_t size``h]jf )}(hj=^h]h size_t size}(hj?^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;^ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMDhj7^ubj| )}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjV^hhhNhNubj )}(h **buffer**h]hbuffer}(hj^^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjV^ubeh}(h]h ]h"]h$]h&]uh1hhjR^hMDhjS^ubah}(h]h ]h"]h$]h&]uh1j{ hj7^ubeh}(h]h ]h"]h$]h&]uh1jY hjR^hMDhj]ubeh}(h]h ]h"]h$]h&]uh1jT hjm]ubh)}(h**Description**h]j )}(hj^h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMFhjm]ubh)}(hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMEhjm]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_dpcd_write_data (C function)c.drm_dp_dpcd_write_datahNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hcint drm_dp_dpcd_write_data (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(hbint drm_dp_dpcd_write_data(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hinth]hint}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMnubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^hhhj^hMnubj )}(hdrm_dp_dpcd_write_datah]j )}(hdrm_dp_dpcd_write_datah]hdrm_dp_dpcd_write_data}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^hhhj^hMnubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj&_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(_modnameN classnameNj j )}j ]j)}jj^sbc.drm_dp_dpcd_write_dataasbuh1hhj_ubj )}(h h]h }(hjF_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hjT_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hauxh]haux}(hja_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjz_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv_ubj)}(hinth]hint}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv_ubj )}(hoffseth]hoffset}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hbufferh]hbuffer}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj `ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]jB_c.drm_dp_dpcd_write_dataasbuh1hhj `ubj )}(h h]h }(hj.`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj `ubj )}(hsizeh]hsize}(hj<`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj `ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubeh}(h]h ]h"]h$]h&]j j uh1jhj^hhhj^hMnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^hhhj^hMnubah}(h]j^ah ](j j eh"]h$]h&]j j )j huh1j{ hj^hMnhj^hhubj )}(hhh]h)}(h#write a series of bytes to the DPCDh]h#write a series of bytes to the DPCD}(hjf`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMnhjc`hhubah}(h]h ]h"]h$]h&]uh1j hj^hhhj^hMnubeh}(h]h ](j functioneh"]h$]h&]j j j j~`j j~`j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to write ``void *buffer`` buffer containing the values to write ``size_t size`` number of bytes in **buffer** **Description** Returns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h](h)}(h**Parameters**h]j )}(hj`h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMrhj`ubjU )}(hhh](jZ )}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj`h]hstruct drm_dp_aux *aux}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMohj`ubj| )}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMohj`ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj`hMohj`ubjZ )}(hA``unsigned int offset`` address of the (first) register to write h](j` )}(h``unsigned int offset``h]jf )}(hj`h]hunsigned int offset}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMphj`ubj| )}(hhh]h)}(h(address of the (first) register to writeh]h(address of the (first) register to write}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMphj`ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj`hMphj`ubjZ )}(h7``void *buffer`` buffer containing the values to write h](j` )}(h``void *buffer``h]jf )}(hjah]h void *buffer}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMqhjaubj| )}(hhh]h)}(h%buffer containing the values to writeh]h%buffer containing the values to write}(hj2ahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.ahMqhj/aubah}(h]h ]h"]h$]h&]uh1j{ hjaubeh}(h]h ]h"]h$]h&]uh1jY hj.ahMqhj`ubjZ )}(h.``size_t size`` number of bytes in **buffer** h](j` )}(h``size_t size``h]jf )}(hjRah]h size_t size}(hjTahhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPaubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMrhjLaubj| )}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjkahhhNhNubj )}(h **buffer**h]hbuffer}(hjsahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkaubeh}(h]h ]h"]h$]h&]uh1hhjgahMrhjhaubah}(h]h ]h"]h$]h&]uh1j{ hjLaubeh}(h]h ]h"]h$]h&]uh1jY hjgahMrhj`ubeh}(h]h ]h"]h$]h&]uh1jT hj`ubh)}(h**Description**h]j )}(hjah]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMthj`ubh)}(hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMshj`ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_dpcd_writeb (C function)c.drm_dp_dpcd_writebhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hRssize_t drm_dp_dpcd_writeb (struct drm_dp_aux *aux, unsigned int offset, u8 value)h]j )}(hQssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux, unsigned int offset, u8 value)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j)}jdrm_dp_dpcd_writebsbc.drm_dp_dpcd_writebasbuh1hhjahhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhjbhMubj )}(hdrm_dp_dpcd_writebh]j )}(hjbh]hdrm_dp_dpcd_writeb}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ](j j eh"]h$]h&]j j uh1j hjahhhjbhMubj)}(h7(struct drm_dp_aux *aux, unsigned int offset, u8 value)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj2bhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.bubj )}(h h]h }(hj?bhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.bubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjPbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRbmodnameN classnameNj j )}j ]jac.drm_dp_dpcd_writebasbuh1hhj.bubj )}(h h]h }(hjnbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.bubj)}(hjOh]h*}(hj|bhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.bubj )}(hauxh]haux}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.bubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*bubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj)}(hinth]hint}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(hoffseth]hoffset}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*bubj)}(hu8 valueh](h)}(hhh]j )}(hu8h]hu8}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbmodnameN classnameNj j )}j ]jac.drm_dp_dpcd_writebasbuh1hhjbubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(hvalueh]hvalue}(hj"chhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*bubeh}(h]h ]h"]h$]h&]j j uh1jhjahhhjbhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjbhMubah}(h]jaah ](j j eh"]h$]h&]j j )j huh1j{ hjbhMhjahhubj )}(hhh]h)}(hwrite a single byte to the DPCDh]hwrite a single byte to the DPCD}(hjLchhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjIchhubah}(h]h ]h"]h$]h&]uh1j hjahhhjbhMubeh}(h]h ](j functioneh"]h$]h&]j j j jdcj jdcj j j uh1jv hhhj5hNhNubj )}(hXi**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned int offset`` address of the register to write ``u8 value`` value to write to the register **Description** Returns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_write_byte() instead.h](h)}(h**Parameters**h]j )}(hjnch]h Parameters}(hjpchhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlcubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjhcubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjch]hstruct drm_dp_aux *aux}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjcubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hjchMhjcubjZ )}(h9``unsigned int offset`` address of the register to write h](j` )}(h``unsigned int offset``h]jf )}(hjch]hunsigned int offset}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjcubj| )}(hhh]h)}(h address of the register to writeh]h address of the register to write}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hjchMhjcubjZ )}(h,``u8 value`` value to write to the register h](j` )}(h ``u8 value``h]jf )}(hjch]hu8 value}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjcubj| )}(hhh]h)}(hvalue to write to the registerh]hvalue to write to the register}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjdubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hjdhMhjcubeh}(h]h ]h"]h$]h&]uh1jT hjhcubh)}(h**Description**h]j )}(hj:dh]h Description}(hjmhhhjSmhMfubah}(h]j9mah ](j j eh"]h$]h&]j j )j huh1j{ hjSmhMfhj;mhhubj )}(hhh]h)}(h(does the DP device have a specific quirkh]h(does the DP device have a specific quirk}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMfhjnhhubah}(h]h ]h"]h$]h&]uh1j hj;mhhhjSmhMfubeh}(h]h ](j functioneh"]h$]h&]j j j jnj jnj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const struct drm_dp_desc *desc`` Device descriptor filled by drm_dp_read_desc() ``enum drm_dp_quirk quirk`` Quirk to query for **Description** Return true if DP device identified by **desc** has **quirk**.h](h)}(h**Parameters**h]j )}(hjnh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMjhjnubjU )}(hhh](jZ )}(hR``const struct drm_dp_desc *desc`` Device descriptor filled by drm_dp_read_desc() h](j` )}(h"``const struct drm_dp_desc *desc``h]jf )}(hjnh]hconst struct drm_dp_desc *desc}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMghjnubj| )}(hhh]h)}(h.Device descriptor filled by drm_dp_read_desc()h]h.Device descriptor filled by drm_dp_read_desc()}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMghjnubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjnhMghjnubjZ )}(h/``enum drm_dp_quirk quirk`` Quirk to query for h](j` )}(h``enum drm_dp_quirk quirk``h]jf )}(hjnh]henum drm_dp_quirk quirk}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhhjnubj| )}(hhh]h)}(hQuirk to query forh]hQuirk to query for}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMhhjoubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjohMhhjnubeh}(h]h ]h"]h$]h&]uh1jT hjnubh)}(h**Description**h]j )}(hj8oh]h Description}(hj:ohhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6oubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMjhjnubh)}(h>Return true if DP device identified by **desc** has **quirk**.h](h'Return true if DP device identified by }(hjNohhhNhNubj )}(h**desc**h]hdesc}(hjVohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNoubh has }(hjNohhhNhNubj )}(h **quirk**h]hquirk}(hjhohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNoubh.}(hjNohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMihjnubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_edp_backlight_info (C struct)c.drm_edp_backlight_infohNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hdrm_edp_backlight_infoh]j )}(hstruct drm_edp_backlight_infoh](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMnubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhjohMnubj )}(hdrm_edp_backlight_infoh]j )}(hjoh]hdrm_edp_backlight_info}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjohhhjohMnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjohhhjohMnubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j{ hjohMnhjohhubj )}(hhh]h)}(h Probed eDP backlight info structh]h Probed eDP backlight info struct}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMshjohhubah}(h]h ]h"]h$]h&]uh1j hjohhhjohMnubeh}(h]h ](j structeh"]h$]h&]j j j joj joj j j uh1jv hhhj5hNhNubj )}(hX**Definition**:: struct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; }; **Members** ``pwmgen_bit_count`` The pwmgen bit count ``pwm_freq_pre_divider`` The PWM frequency pre-divider value being used for this backlight, if any ``max`` The maximum backlight level that may be set ``lsb_reg_used`` Do we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register? ``aux_enable`` Does the panel support the AUX enable cap? ``aux_set`` Does the panel support setting the brightness through AUX? ``luminance_set`` Does the panel support setting the brightness through AUX using luminance values?h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh:}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMwhjoubj, )}(hstruct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; };h]hstruct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; };}hj psbah}(h]h ]h"]h$]h&]j j uh1j+ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMyhjoubh)}(h **Members**h]j )}(hj1ph]hMembers}(hj3phhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/pubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjoubjU )}(hhh](jZ )}(h*``pwmgen_bit_count`` The pwmgen bit count h](j` )}(h``pwmgen_bit_count``h]jf )}(hjPph]hpwmgen_bit_count}(hjRphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNpubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMuhjJpubj| )}(hhh]h)}(hThe pwmgen bit counth]hThe pwmgen bit count}(hjiphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjephMuhjfpubah}(h]h ]h"]h$]h&]uh1j{ hjJpubeh}(h]h ]h"]h$]h&]uh1jY hjephMuhjGpubjZ )}(hc``pwm_freq_pre_divider`` The PWM frequency pre-divider value being used for this backlight, if any h](j` )}(h``pwm_freq_pre_divider``h]jf )}(hjph]hpwm_freq_pre_divider}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMvhjpubj| )}(hhh]h)}(hIThe PWM frequency pre-divider value being used for this backlight, if anyh]hIThe PWM frequency pre-divider value being used for this backlight, if any}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMvhjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphMvhjGpubjZ )}(h4``max`` The maximum backlight level that may be set h](j` )}(h``max``h]jf )}(hjph]hmax}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMwhjpubj| )}(hhh]h)}(h+The maximum backlight level that may be seth]h+The maximum backlight level that may be set}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMwhjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphMwhjGpubjZ )}(hZ``lsb_reg_used`` Do we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register? h](j` )}(h``lsb_reg_used``h]jf )}(hjph]h lsb_reg_used}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMxhjpubj| )}(hhh]h)}(hHDo we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register?h]hHDo we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register?}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMxhjqubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjqhMxhjGpubjZ )}(h:``aux_enable`` Does the panel support the AUX enable cap? h](j` )}(h``aux_enable``h]jf )}(hj4qh]h aux_enable}(hj6qhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2qubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMyhj.qubj| )}(hhh]h)}(h*Does the panel support the AUX enable cap?h]h*Does the panel support the AUX enable cap?}(hjMqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIqhMyhjJqubah}(h]h ]h"]h$]h&]uh1j{ hj.qubeh}(h]h ]h"]h$]h&]uh1jY hjIqhMyhjGpubjZ )}(hG``aux_set`` Does the panel support setting the brightness through AUX? h](j` )}(h ``aux_set``h]jf )}(hjmqh]haux_set}(hjoqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkqubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMzhjgqubj| )}(hhh]h)}(h:Does the panel support setting the brightness through AUX?h]h:Does the panel support setting the brightness through AUX?}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMzhjqubah}(h]h ]h"]h$]h&]uh1j{ hjgqubeh}(h]h ]h"]h$]h&]uh1jY hjqhMzhjGpubjZ )}(hc``luminance_set`` Does the panel support setting the brightness through AUX using luminance values?h](j` )}(h``luminance_set``h]jf )}(hjqh]h luminance_set}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMzhjqubj| )}(hhh]h)}(hQDoes the panel support setting the brightness through AUX using luminance values?h]hQDoes the panel support setting the brightness through AUX using luminance values?}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM{hjqubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjqhMzhjGpubeh}(h]h ]h"]h$]h&]uh1jT hjoubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubh)}(h**Description**h]j )}(hjqh]h Description}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM~hj5hhubh)}(hvThis structure contains various data about an eDP backlight, which can be populated by using drm_edp_backlight_init().h]hvThis structure contains various data about an eDP backlight, which can be populated by using drm_edp_backlight_init().}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhM{hj5hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_dp_phy_test_params (C struct)c.drm_dp_phy_test_paramshNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hdrm_dp_phy_test_paramsh]j )}(hstruct drm_dp_phy_test_paramsh](j )}(hj h]hstruct}(hj'rhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#rhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMubj )}(h h]h }(hj5rhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#rhhhj4rhMubj )}(hdrm_dp_phy_test_paramsh]j )}(hj!rh]hdrm_dp_phy_test_params}(hjGrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCrubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#rhhhj4rhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhj4rhMubah}(h]jrah ](j j eh"]h$]h&]j j )j huh1j{ hj4rhMhjrhhubj )}(hhh]h)}(hDP Phy Compliance parametersh]hDP Phy Compliance parameters}(hjirhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjfrhhubah}(h]h ]h"]h$]h&]uh1j hjrhhhj4rhMubeh}(h]h ](j structeh"]h$]h&]j j j jrj jrj j j uh1jv hhhj5hNhNubj )}(hX]**Definition**:: struct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; }; **Members** ``link_rate`` Requested Link rate from DPCD 0x219 ``num_lanes`` Number of lanes requested by sing through DPCD 0x220 ``phy_pattern`` DP Phy test pattern from DPCD 0x248 ``hbr2_reset`` DP HBR2_COMPLIANCE_SCRAMBLER_RESET from DCPD 0x24A and 0x24B ``custom80`` DP Test_80BIT_CUSTOM_PATTERN from DPCDs 0x250 through 0x259 ``enhanced_frame_cap`` flag for enhanced frame capability.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubh:}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjrubj, )}(hstruct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; };h]hstruct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; };}hjrsbah}(h]h ]h"]h$]h&]j j uh1j+ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjrubh)}(h **Members**h]j )}(hjrh]hMembers}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjrubjU )}(hhh](jZ )}(h2``link_rate`` Requested Link rate from DPCD 0x219 h](j` )}(h ``link_rate``h]jf )}(hjrh]h link_rate}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjrubj| )}(hhh]h)}(h#Requested Link rate from DPCD 0x219h]h#Requested Link rate from DPCD 0x219}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMhjrubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjrhMhjrubjZ )}(hC``num_lanes`` Number of lanes requested by sing through DPCD 0x220 h](j` )}(h ``num_lanes``h]jf )}(hjsh]h num_lanes}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hj subah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhj subj| )}(hhh]h)}(h4Number of lanes requested by sing through DPCD 0x220h]h4Number of lanes requested by sing through DPCD 0x220}(hj(shhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$shMhj%subah}(h]h ]h"]h$]h&]uh1j{ hj subeh}(h]h ]h"]h$]h&]uh1jY hj$shMhjrubjZ )}(h4``phy_pattern`` DP Phy test pattern from DPCD 0x248 h](j` )}(h``phy_pattern``h]jf )}(hjHsh]h phy_pattern}(hjJshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFsubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhjBsubj| )}(hhh]h)}(h#DP Phy test pattern from DPCD 0x248h]h#DP Phy test pattern from DPCD 0x248}(hjashhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]shMhj^subah}(h]h ]h"]h$]h&]uh1j{ hjBsubeh}(h]h ]h"]h$]h&]uh1jY hj]shMhjrubjZ )}(hL``hbr2_reset`` DP HBR2_COMPLIANCE_SCRAMBLER_RESET from DCPD 0x24A and 0x24B h](j` )}(h``hbr2_reset``h]jf )}(hjsh]h hbr2_reset}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]uh1j_ hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./include/drm/display/drm_dp_helper.hhMhj{subj| )}(hhh]h)}(h", or "" on errors. The returned string is always non-NULL and valid. **Return** Name of the DP PHY.h](h)}(h**Parameters**h]j )}(hjJuh]h Parameters}(hjLuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHuubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjDuubjU )}(hhh]jZ )}(h1``enum drm_dp_phy dp_phy`` The DP PHY identifier h](j` )}(h``enum drm_dp_phy dp_phy``h]jf )}(hjiuh]henum drm_dp_phy dp_phy}(hjkuhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjguubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjcuubj| )}(hhh]h)}(hThe DP PHY identifierh]hThe DP PHY identifier}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~uhMhjuubah}(h]h ]h"]h$]h&]uh1j{ hjcuubeh}(h]h ]h"]h$]h&]uh1jY hj~uhMhj`uubah}(h]h ]h"]h$]h&]uh1jT hjDuubh)}(h**Description**h]j )}(hjuh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjDuubh)}(hGiven the **dp_phy**, get a user friendly name of the DP PHY, either "DPRX" or "LTTPR ", or "" on errors. The returned string is always non-NULL and valid.h](h Given the }(hjuhhhNhNubj )}(h **dp_phy**h]hdp_phy}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubh, get a user friendly name of the DP PHY, either “DPRX” or “LTTPR ”, or “” on errors. The returned string is always non-NULL and valid.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjDuubh)}(h **Return**h]j )}(hjuh]hReturn}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjDuubh)}(hName of the DP PHY.h]hName of the DP PHY.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjDuubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_lttpr_wake_timeout_setup (C function)!c.drm_dp_lttpr_wake_timeout_setuphNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hTvoid drm_dp_lttpr_wake_timeout_setup (struct drm_dp_aux *aux, bool transparent_mode)h]j )}(hSvoid drm_dp_lttpr_wake_timeout_setup(struct drm_dp_aux *aux, bool transparent_mode)h](j)}(hvoidh]hvoid}(hj"vhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj1vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhj0vhMubj )}(hdrm_dp_lttpr_wake_timeout_setuph]j )}(hdrm_dp_lttpr_wake_timeout_setuph]hdrm_dp_lttpr_wake_timeout_setup}(hjCvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?vubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhj0vhMubj)}(h/(struct drm_dp_aux *aux, bool transparent_mode)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj_vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[vubj )}(h h]h }(hjlvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[vubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj}vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzvubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]j)}jjEvsb!c.drm_dp_lttpr_wake_timeout_setupasbuh1hhj[vubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[vubj)}(hjOh]h*}(hjvhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[vubj )}(hauxh]haux}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[vubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjWvubj)}(hbool transparent_modeh](j)}(hjIh]hbool}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(htransparent_modeh]htransparent_mode}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjWvubeh}(h]h ]h"]h$]h&]j j uh1jhjvhhhj0vhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjvhhhj0vhMubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j{ hj0vhMhjvhhubj )}(hhh]h)}(h'Grant extended time for sink to wake uph]h'Grant extended time for sink to wake up}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjwhhubah}(h]h ]h"]h$]h&]uh1j hjvhhhj0vhMubeh}(h]h ](j functioneh"]h$]h&]j j j j.wj j.wj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``bool transparent_mode`` This is true if lttpr is in transparent mode **Description** This function checks if the sink needs any extended wake time, if it does it grants this request. Post this setup the source device can keep trying the Aux transaction till the granted wake timeout. If this function is not called all Aux transactions are expected to take a default of 1ms before they throw an error.h](h)}(h**Parameters**h]j )}(hj8wh]h Parameters}(hj:whhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6wubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2wubjU )}(hhh](jZ )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjWwh]hstruct drm_dp_aux *aux}(hjYwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjUwubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjQwubj| )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hjpwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlwhMhjmwubah}(h]h ]h"]h$]h&]uh1j{ hjQwubeh}(h]h ]h"]h$]h&]uh1jY hjlwhMhjNwubjZ )}(hG``bool transparent_mode`` This is true if lttpr is in transparent mode h](j` )}(h``bool transparent_mode``h]jf )}(hjwh]hbool transparent_mode}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjwubj| )}(hhh]h)}(h,This is true if lttpr is in transparent modeh]h,This is true if lttpr is in transparent mode}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjwubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjwhMhjNwubeh}(h]h ]h"]h$]h&]uh1jT hj2wubh)}(h**Description**h]j )}(hjwh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2wubh)}(hX<This function checks if the sink needs any extended wake time, if it does it grants this request. Post this setup the source device can keep trying the Aux transaction till the granted wake timeout. If this function is not called all Aux transactions are expected to take a default of 1ms before they throw an error.h]hX<This function checks if the sink needs any extended wake time, if it does it grants this request. Post this setup the source device can keep trying the Aux transaction till the granted wake timeout. If this function is not called all Aux transactions are expected to take a default of 1ms before they throw an error.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2wubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_dpcd_probe (C function)c.drm_dp_dpcd_probehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hCint drm_dp_dpcd_probe (struct drm_dp_aux *aux, unsigned int offset)h]j )}(hBint drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset)h](j)}(hinth]hint}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj xhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj xhhhjxhMubj )}(hdrm_dp_dpcd_probeh]j )}(hdrm_dp_dpcd_probeh]hdrm_dp_dpcd_probe}(hj1xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-xubah}(h]h ](j j eh"]h$]h&]j j uh1j hj xhhhjxhMubj)}(h-(struct drm_dp_aux *aux, unsigned int offset)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjMxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIxubj )}(h h]h }(hjZxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIxubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjkxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmxmodnameN classnameNj j )}j ]j)}jj3xsbc.drm_dp_dpcd_probeasbuh1hhjIxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIxubj)}(hjOh]h*}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjIxubj )}(hauxh]haux}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjExubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj)}(hinth]hint}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(hoffseth]hoffset}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjExubeh}(h]h ]h"]h$]h&]j j uh1jhj xhhhjxhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjxhhhjxhMubah}(h]jxah ](j j eh"]h$]h&]j j )j huh1j{ hjxhMhjxhhubj )}(hhh]h)}(h4probe a given DPCD address with a 1-byte read accessh]h4probe a given DPCD address with a 1-byte read access}(hj!yhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyhhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjxhMubeh}(h]h ](j functioneh"]h$]h&]j j j j9yj j9yj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST) ``unsigned int offset`` address of the register to probe **Description** Probe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value. Returns 0 if the read access suceeded, or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjCyh]h Parameters}(hjEyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAyubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=yubjU )}(hhh](jZ )}(h9``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST) h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjbyh]hstruct drm_dp_aux *aux}(hjdyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`yubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj\yubj| )}(hhh]h)}(hDisplayPort AUX channel (SST)h]hDisplayPort AUX channel (SST)}(hj{yhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwyhMhjxyubah}(h]h ]h"]h$]h&]uh1j{ hj\yubeh}(h]h ]h"]h$]h&]uh1jY hjwyhMhjYyubjZ )}(h9``unsigned int offset`` address of the register to probe h](j` )}(h``unsigned int offset``h]jf )}(hjyh]hunsigned int offset}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyubj| )}(hhh]h)}(h address of the register to probeh]h address of the register to probe}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMhjyubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjyhMhjYyubeh}(h]h ]h"]h$]h&]uh1jT hj=yubh)}(h**Description**h]j )}(hjyh]h Description}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=yubh)}(hProbe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value.h]hProbe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=yubh)}(hKReturns 0 if the read access suceeded, or a negative error code on failure.h]hKReturns 0 if the read access suceeded, or a negative error code on failure.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=yubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_dpcd_set_powered (C function)c.drm_dp_dpcd_set_poweredhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hCvoid drm_dp_dpcd_set_powered (struct drm_dp_aux *aux, bool powered)h]j )}(hBvoid drm_dp_dpcd_set_powered(struct drm_dp_aux *aux, bool powered)h](j)}(hvoidh]hvoid}(hj*zhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&zhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj9zhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&zhhhj8zhMubj )}(hdrm_dp_dpcd_set_poweredh]j )}(hdrm_dp_dpcd_set_poweredh]hdrm_dp_dpcd_set_powered}(hjKzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGzubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&zhhhj8zhMubj)}(h&(struct drm_dp_aux *aux, bool powered)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjgzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjczubj )}(h h]h }(hjtzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjczubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j)}jjMzsbc.drm_dp_dpcd_set_poweredasbuh1hhjczubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjczubj)}(hjOh]h*}(hjzhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjczubj )}(hauxh]haux}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjczubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_zubj)}(h bool poweredh](j)}(hjIh]hbool}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(hpoweredh]hpowered}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_zubeh}(h]h ]h"]h$]h&]j j uh1jhj&zhhhj8zhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"zhhhj8zhMubah}(h]jzah ](j j eh"]h$]h&]j j )j huh1j{ hj8zhMhjzhhubj )}(hhh]h)}(h$Set whether the DP device is poweredh]h$Set whether the DP device is powered}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{hhubah}(h]h ]h"]h$]h&]uh1j hjzhhhj8zhMubeh}(h]h ](j functioneh"]h$]h&]j j j j6{j j6{j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op. ``bool powered`` true if powered; false if not **Description** If the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out. If this function is never called then a device defaults to being powered.h](h)}(h**Parameters**h]j )}(hj@{h]h Parameters}(hjB{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>{ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:{ubjU )}(hhh](jZ )}(h``struct drm_dp_aux *aux`` DisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op. h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj_{h]hstruct drm_dp_aux *aux}(hja{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjY{ubj| )}(hhh]h)}(hdDisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op.h]hfDisplayPort AUX channel; for convenience it’s OK to pass NULL here and the function will be a no-op.}(hjx{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhju{ubah}(h]h ]h"]h$]h&]uh1j{ hjY{ubeh}(h]h ]h"]h$]h&]uh1jY hjt{hMhjV{ubjZ )}(h/``bool powered`` true if powered; false if not h](j` )}(h``bool powered``h]jf )}(hj{h]h bool powered}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubj| )}(hhh]h)}(htrue if powered; false if noth]htrue if powered; false if not}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj{ubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hj{hMhjV{ubeh}(h]h ]h"]h$]h&]uh1jT hj:{ubh)}(h**Description**h]j )}(hj{h]h Description}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:{ubh)}(hIf the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out.h]hIf the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:{ubh)}(hIIf this function is never called then a device defaults to being powered.h]hIIf this function is never called then a device defaults to being powered.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:{ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_dp_dpcd_set_probe (C function)c.drm_dp_dpcd_set_probehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h@void drm_dp_dpcd_set_probe (struct drm_dp_aux *aux, bool enable)h]j )}(h?void drm_dp_dpcd_set_probe(struct drm_dp_aux *aux, bool enable)h](j)}(hvoidh]hvoid}(hj(|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$|hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj7|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$|hhhj6|hMubj )}(hdrm_dp_dpcd_set_probeh]j )}(hdrm_dp_dpcd_set_probeh]hdrm_dp_dpcd_set_probe}(hjI|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjE|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj$|hhhj6|hMubj)}(h%(struct drm_dp_aux *aux, bool enable)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hje|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja|ubj )}(h h]h }(hjr|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja|ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j)}jjK|sbc.drm_dp_dpcd_set_probeasbuh1hhja|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja|ubj)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhja|ubj )}(hauxh]haux}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]|ubj)}(h bool enableh](j)}(hjIh]hbool}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(henableh]henable}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]|ubeh}(h]h ]h"]h$]h&]j j uh1jhj$|hhhj6|hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj |hhhj6|hMubah}(h]j|ah ](j j eh"]h$]h&]j j )j huh1j{ hj6|hMhj|hhubj )}(hhh]h)}(h0Set whether a probing before DPCD access is doneh]h0Set whether a probing before DPCD access is done}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}hhubah}(h]h ]h"]h$]h&]uh1j hj|hhhj6|hMubeh}(h]h ](j functioneh"]h$]h&]j j j j4}j j4}j j j uh1jv hhhj5hNhNubj )}(hv**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable`` Enable the probing if requiredh](h)}(h**Parameters**h]j )}(hj>}h]h Parameters}(hj@}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<}ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj8}ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj]}h]hstruct drm_dp_aux *aux}(hj_}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj[}ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjW}ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjv}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr}hMhjs}ubah}(h]h ]h"]h$]h&]uh1j{ hjW}ubeh}(h]h ]h"]h$]h&]uh1jY hjr}hMhjT}ubjZ )}(h.``bool enable`` Enable the probing if requiredh](j` )}(h``bool enable``h]jf )}(hj}h]h bool enable}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}ubj| )}(hhh]h)}(hEnable the probing if requiredh]hEnable the probing if required}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}ubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hj}hMhjT}ubeh}(h]h ]h"]h$]h&]uh1jT hj8}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_dpcd_read (C function)c.drm_dp_dpcd_readhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hassize_t drm_dp_dpcd_read (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(h`ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]j)}jdrm_dp_dpcd_readsbc.drm_dp_dpcd_readasbuh1hhj}hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}hhhj~hMubj )}(hdrm_dp_dpcd_readh]j )}(hj~h]hdrm_dp_dpcd_read}(hj'~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj}hhhj~hMubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjB~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>~ubj )}(h h]h }(hjO~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>~ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj`~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjb~modnameN classnameNj j )}j ]j~c.drm_dp_dpcd_readasbuh1hhj>~ubj )}(h h]h }(hj~~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>~ubj)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>~ubj )}(hauxh]haux}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:~ubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(hoffseth]hoffset}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:~ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj~ubj )}(hbufferh]hbuffer}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:~ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJmodnameN classnameNj j )}j ]j~c.drm_dp_dpcd_readasbuh1hhjAubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(hsizeh]hsize}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:~ubeh}(h]h ]h"]h$]h&]j j uh1jhj}hhhj~hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj}hhhj~hMubah}(h]j}ah ](j j eh"]h$]h&]j j )j huh1j{ hj~hMhj}hhubj )}(hhh]h)}(h$read a series of bytes from the DPCDh]h$read a series of bytes from the DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj}hhhj~hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to read ``void *buffer`` buffer to store the register values ``size_t size`` number of bytes in **buffer** **Description** Returns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller. In most of the cases you want to use drm_dp_dpcd_read_data() instead.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h@``unsigned int offset`` address of the (first) register to read h](j` )}(h``unsigned int offset``h]jf )}(hjh]hunsigned int offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h'address of the (first) register to readh]h'address of the (first) register to read}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj.ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj-hMhjubjZ )}(h5``void *buffer`` buffer to store the register values h](j` )}(h``void *buffer``h]jf )}(hjQh]h void *buffer}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjKubj| )}(hhh]h)}(h#buffer to store the register valuesh]h#buffer to store the register values}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjgubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjfhMhjubjZ )}(h.``size_t size`` number of bytes in **buffer** h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjhhhNhNubj )}(h **buffer**h]hbuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjӀh]h Description}(hjՀhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjрubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hEIn most of the cases you want to use drm_dp_dpcd_read_data() instead.h]hEIn most of the cases you want to use drm_dp_dpcd_read_data() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_dpcd_write (C function)c.drm_dp_dpcd_writehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hbssize_t drm_dp_dpcd_write (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(hassize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j)}jdrm_dp_dpcd_writesbc.drm_dp_dpcd_writeasbuh1hhj#hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhjKhMubj )}(hdrm_dp_dpcd_writeh]j )}(hjHh]hdrm_dp_dpcd_write}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#hhhjKhMubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jFc.drm_dp_dpcd_writeasbuh1hhjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hjOh]h*}(hjÁhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjuubj )}(hauxh]haux}(hjЁhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hoffseth]hoffset}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjVhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(hbufferh]hbuffer}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jFc.drm_dp_dpcd_writeasbuh1hhjxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubeh}(h]h ]h"]h$]h&]j j uh1jhj#hhhjKhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjKhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjKhMhjhhubj )}(hhh]h)}(h#write a series of bytes to the DPCDh]h#write a series of bytes to the DPCD}(hjՂhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj҂hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjKhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to write ``void *buffer`` buffer containing the values to write ``size_t size`` number of bytes in **buffer** **Description** Returns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller. In most of the cases you want to use drm_dp_dpcd_write_data() instead.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj,ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj+hMhj ubjZ )}(hA``unsigned int offset`` address of the (first) register to write h](j` )}(h``unsigned int offset``h]jf )}(hjOh]hunsigned int offset}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjIubj| )}(hhh]h)}(h(address of the (first) register to writeh]h(address of the (first) register to write}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjdhMhj ubjZ )}(h7``void *buffer`` buffer containing the values to write h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h%buffer containing the values to writeh]h%buffer containing the values to write}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj ubjZ )}(h.``size_t size`` number of bytes in **buffer** h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjÃhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjڃhhhNhNubj )}(h **buffer**h]hbuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjڃubeh}(h]h ]h"]h$]h&]uh1hhjփhMhj׃ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjփhMhj ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hFIn most of the cases you want to use drm_dp_dpcd_write_data() instead.h]hFIn most of the cases you want to use drm_dp_dpcd_write_data() instead.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_dpcd_read_link_status (C function)c.drm_dp_dpcd_read_link_statushNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hYint drm_dp_dpcd_read_link_status (struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h]j )}(hXint drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h](j)}(hinth]hint}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM#ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjlhM#ubj )}(hdrm_dp_dpcd_read_link_statush]j )}(hdrm_dp_dpcd_read_link_statush]hdrm_dp_dpcd_read_link_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZhhhjlhM#ubj)}(h8(struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_dpcd_read_link_statusasbuh1hhjubj )}(h h]h }(hjلhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 status[DP_LINK_STATUS_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jՄc.drm_dp_dpcd_read_link_statusasbuh1hhj ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hstatush]hstatus}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjHh]h[}(hjJhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubh)}(hhh]j )}(hDP_LINK_STATUS_SIZEh]hDP_LINK_STATUS_SIZE}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]jՄc.drm_dp_dpcd_read_link_statusasbuh1hhj ubj)}(hjIh]h]}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjZhhhjlhM#ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjVhhhjlhM#ubah}(h]jQah ](j j eh"]h$]h&]j j )j huh1j{ hjlhM#hjShhubj )}(hhh]h)}(h)read DPCD link status (bytes 0x202-0x207)h]h)read DPCD link status (bytes 0x202-0x207)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM#hjhhubah}(h]h ]h"]h$]h&]uh1j hjShhhjlhM#ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 status[DP_LINK_STATUS_SIZE]`` buffer to store the link status in (must be at least 6 bytes) **Description** Returns a negative error code on failure or 0 on success.h](h)}(h**Parameters**h]j )}(hjÅh]h Parameters}(hjŅhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM$hj܅ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM$hjubah}(h]h ]h"]h$]h&]uh1j{ hj܅ubeh}(h]h ]h"]h$]h&]uh1jY hjhM$hjمubjZ )}(ha``u8 status[DP_LINK_STATUS_SIZE]`` buffer to store the link status in (must be at least 6 bytes) h](j` )}(h"``u8 status[DP_LINK_STATUS_SIZE]``h]jf )}(hjh]hu8 status[DP_LINK_STATUS_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM%hjubj| )}(hhh]h)}(h=buffer to store the link status in (must be at least 6 bytes)h]h=buffer to store the link status in (must be at least 6 bytes)}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM%hj1ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj0hM%hjمubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjVh]h Description}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjubh)}(h9Returns a negative error code on failure or 0 on success.h]h9Returns a negative error code on failure or 0 on success.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM&hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_dpcd_read_phy_link_status (C function)"c.drm_dp_dpcd_read_phy_link_statushNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hzint drm_dp_dpcd_read_phy_link_status (struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h]j )}(hyint drm_dp_dpcd_read_phy_link_status(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM2ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM2ubj )}(h drm_dp_dpcd_read_phy_link_statush]j )}(h drm_dp_dpcd_read_phy_link_statush]h drm_dp_dpcd_read_phy_link_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM2ubj)}(hU(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj؆hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԆubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԆubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjԆubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԆubj)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjԆubj )}(hauxh]haux}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԆubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjІubj)}(henum drm_dp_phy dp_phyh](j )}(hj+h]henum}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubh)}(hhh]j )}(h drm_dp_phyh]h drm_dp_phy}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjjmodnameN classnameNj j )}j ]j"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjFubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj )}(hdp_phyh]hdp_phy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjІubj)}(h#u8 link_status[DP_LINK_STATUS_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj )}(h h]h }(hj·hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h link_statush]h link_status}(hj܇hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_LINK_STATUS_SIZEh]hDP_LINK_STATUS_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjІubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM2ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM2ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM2hjhhubj )}(hhh]h)}(h,get the link status information for a DP PHYh]h,get the link status information for a DP PHY}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM2hj>hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM2ubeh}(h]h ](j functioneh"]h$]h&]j j j jYj jYj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``enum drm_dp_phy dp_phy`` the DP PHY to get the link status for ``u8 link_status[DP_LINK_STATUS_SIZE]`` buffer to return the status in **Description** Fetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned **link_status** matches the DPCD register layout of the DPRX PHY link status. Returns 0 if the information was read successfully or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM6hj]ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM3hj|ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM3hjubah}(h]h ]h"]h$]h&]uh1j{ hj|ubeh}(h]h ]h"]h$]h&]uh1jY hjhM3hjyubjZ )}(hA``enum drm_dp_phy dp_phy`` the DP PHY to get the link status for h](j` )}(h``enum drm_dp_phy dp_phy``h]jf )}(hjh]henum drm_dp_phy dp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM4hjubj| )}(hhh]h)}(h%the DP PHY to get the link status forh]h%the DP PHY to get the link status for}(hjԈhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjЈhM4hjшubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjЈhM4hjyubjZ )}(hG``u8 link_status[DP_LINK_STATUS_SIZE]`` buffer to return the status in h](j` )}(h'``u8 link_status[DP_LINK_STATUS_SIZE]``h]jf )}(hjh]h#u8 link_status[DP_LINK_STATUS_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM5hjubj| )}(hhh]h)}(hbuffer to return the status inh]hbuffer to return the status in}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM5hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM5hjyubeh}(h]h ]h"]h$]h&]uh1jT hj]ubh)}(h**Description**h]j )}(hj/h]h Description}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM7hj]ubh)}(hFetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned **link_status** matches the DPCD register layout of the DPRX PHY link status.h](hbFetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned }(hjEhhhNhNubj )}(h**link_status**h]h link_status}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubh> matches the DPCD register layout of the DPRX PHY link status.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM6hj]ubh)}(hWReturns 0 if the information was read successfully or a negative error code on failure.h]hWReturns 0 if the information was read successfully or a negative error code on failure.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM:hj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_dp_link_power_up (C function)c.drm_dp_link_power_uphNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hIint drm_dp_link_power_up (struct drm_dp_aux *aux, unsigned char revision)h]j )}(hHint drm_dp_link_power_up(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM]ubj )}(hdrm_dp_link_power_uph]j )}(hdrm_dp_link_power_uph]hdrm_dp_link_power_up}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM]ubj)}(h0(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj҉hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΉubj )}(h h]h }(hj߉hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΉubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_link_power_upasbuh1hhjΉubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΉubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjΉubj )}(hauxh]haux}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΉubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjʉubj)}(hunsigned char revisionh](j)}(hunsignedh]hunsigned}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hcharh]hchar}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hrevisionh]hrevision}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjʉubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM]ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM]ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM]hjhhubj )}(hhh]h)}(hpower up a DisplayPort linkh]hpower up a DisplayPort link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM]hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM]ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned char revision`` DPCD revision supported on the link **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjȊh]h Parameters}(hjʊhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjƊubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMahjŠubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM^hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM^hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM^hjފubjZ )}(h?``unsigned char revision`` DPCD revision supported on the link h](j` )}(h``unsigned char revision``h]jf )}(hj h]hunsigned char revision}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_hjubj| )}(hhh]h)}(h#DPCD revision supported on the linkh]h#DPCD revision supported on the link}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hM_hj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hM_hjފubeh}(h]h ]h"]h$]h&]uh1jT hjŠubh)}(h**Description**h]j )}(hj[h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMahjŠubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM`hjŠubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_link_power_down (C function)c.drm_dp_link_power_downhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hKint drm_dp_link_power_down (struct drm_dp_aux *aux, unsigned char revision)h]j )}(hJint drm_dp_link_power_down(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_link_power_downh]j )}(hdrm_dp_link_power_downh]hdrm_dp_link_power_down}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h0(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj݋hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjًubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjًubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjËsbc.drm_dp_link_power_downasbuh1hhjًubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjًubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjًubj )}(hauxh]haux}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjًubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjՋubj)}(hunsigned char revisionh](j)}(hunsignedh]hunsigned}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj)}(hcharh]hchar}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj )}(hrevisionh]hrevision}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjՋubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hpower down a DisplayPort linkh]hpower down a DisplayPort link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jɌj jɌj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned char revision`` DPCD revision supported on the link **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjӌh]h Parameters}(hjՌhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjьubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj͌ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h?``unsigned char revision`` DPCD revision supported on the link h](j` )}(h``unsigned char revision``h]jf )}(hj+h]hunsigned char revision}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%ubj| )}(hhh]h)}(h#DPCD revision supported on the linkh]h#DPCD revision supported on the link}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhjAubah}(h]h ]h"]h$]h&]uh1j{ hj%ubeh}(h]h ]h"]h$]h&]uh1jY hj@hMhjubeh}(h]h ]h"]h$]h&]uh1jT hj͌ubh)}(h**Description**h]j )}(hjfh]h Description}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj͌ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj͌ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_dpcd_write_payload (C function)c.drm_dp_dpcd_write_payloadhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hiint drm_dp_dpcd_write_payload (struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h]j )}(hhint drm_dp_dpcd_write_payload(struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_dpcd_write_payloadh]j )}(hdrm_dp_dpcd_write_payloadh]hdrm_dp_dpcd_write_payload}(hj̍hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjȍubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hK(struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj΍sbc.drm_dp_dpcd_write_payloadasbuh1hhjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int vcpidh](j)}(hinth]hint}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hvcpidh]hvcpid}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 start_time_sloth](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_dpcd_write_payloadasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstart_time_sloth]hstart_time_slot}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 time_slot_counth](h)}(hhh]j )}(hu8h]hu8}(hjڎhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj׎ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj܎modnameN classnameNj j )}j ]j"c.drm_dp_dpcd_write_payloadasbuh1hhjӎubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӎubj )}(htime_slot_counth]htime_slot_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӎubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h2Write Virtual Channel information to payload tableh]h2Write Virtual Channel information to payload table}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jHj jHj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int vcpid`` Virtual Channel Payload ID ``u8 start_time_slot`` Starting time slot ``u8 time_slot_count`` Time slot count **Description** Write the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary. **Return** 0 on success, negative error otherwiseh](h)}(h**Parameters**h]j )}(hjRh]h Parameters}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjqh]hstruct drm_dp_aux *aux}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjkubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjhubjZ )}(h)``int vcpid`` Virtual Channel Payload ID h](j` )}(h ``int vcpid``h]jf )}(hjh]h int vcpid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hVirtual Channel Payload IDh]hVirtual Channel Payload ID}(hjÏhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjhubjZ )}(h*``u8 start_time_slot`` Starting time slot h](j` )}(h``u8 start_time_slot``h]jf )}(hjh]hu8 start_time_slot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjݏubj| )}(hhh]h)}(hStarting time sloth]hStarting time slot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjݏubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjhubjZ )}(h'``u8 time_slot_count`` Time slot count h](j` )}(h``u8 time_slot_count``h]jf )}(hjh]hu8 time_slot_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hTime slot counth]hTime slot count}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hMhjhubeh}(h]h ]h"]h$]h&]uh1jT hjLubh)}(h**Description**h]j )}(hjWh]h Description}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLubh)}(hqWrite the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary.h]hqWrite the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLubh)}(h **Return**h]j )}(hj~h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLubh)}(h&0 on success, negative error otherwiseh]h&0 on success, negative error otherwise}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_dpcd_clear_payload (C function)c.drm_dp_dpcd_clear_payloadhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h6int drm_dp_dpcd_clear_payload (struct drm_dp_aux *aux)h]j )}(h5int drm_dp_dpcd_clear_payload(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjÐhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjҐhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjѐhMubj )}(hdrm_dp_dpcd_clear_payloadh]j )}(hdrm_dp_dpcd_clear_payloadh]hdrm_dp_dpcd_clear_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjѐhMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_dpcd_clear_payloadasbuh1hhjubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjѐhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjѐhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjѐhMhjhhubj )}(hhh]h)}(h$Clear the entire VC Payload ID tableh]h$Clear the entire VC Payload ID table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjѐhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Clear the entire VC Payload ID table. **Return** 0 on success, negative error code on errors.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjđh]hstruct drm_dp_aux *aux}(hjƑhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj‘ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjݑhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjّhMhjڑubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjّhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h%Clear the entire VC Payload ID table.h]h%Clear the entire VC Payload ID table.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j )}(hj&h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h,0 on success, negative error code on errors.h]h,0 on success, negative error code on errors.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_dpcd_poll_act_handled (C function)c.drm_dp_dpcd_poll_act_handledhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hIint drm_dp_dpcd_poll_act_handled (struct drm_dp_aux *aux, int timeout_ms)h]j )}(hHint drm_dp_dpcd_poll_act_handled(struct drm_dp_aux *aux, int timeout_ms)h](j)}(hinth]hint}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjghhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjghhhjyhMubj )}(hdrm_dp_dpcd_poll_act_handledh]j )}(hdrm_dp_dpcd_poll_act_handledh]hdrm_dp_dpcd_poll_act_handled}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjghhhjyhMubj)}(h((struct drm_dp_aux *aux, int timeout_ms)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjƒhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjÒubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjȒmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_dpcd_poll_act_handledasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint timeout_msh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h timeout_msh]h timeout_ms}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjghhhjyhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjchhhjyhMubah}(h]j^ah ](j j eh"]h$]h&]j j )j huh1j{ hjyhMhj`hhubj )}(hhh]h)}(hPoll for ACT handled statush]hPoll for ACT handled status}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj]hhubah}(h]h ]h"]h$]h&]uh1j hj`hhhjyhMubeh}(h]h ](j functioneh"]h$]h&]j j j jxj jxj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int timeout_ms`` Timeout in ms **Description** Try waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to **timeout_ms** milliseconds, defaulting to 3000 ms if 0. **Return** 0 if the ACT was handled in time, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj|ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h!``int timeout_ms`` Timeout in ms h](j` )}(h``int timeout_ms``h]jf )}(hjړh]hint timeout_ms}(hjܓhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjؓubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjԓubj| )}(hhh]h)}(h Timeout in msh]h Timeout in ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjԓubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hj|ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj|ubh)}(hTry waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to **timeout_ms** milliseconds, defaulting to 3000 ms if 0.h](hTry waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to }(hj+hhhNhNubj )}(h**timeout_ms**h]h timeout_ms}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubh* milliseconds, defaulting to 3000 ms if 0.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj|ubh)}(h **Return**h]j )}(hjNh]hReturn}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj|ubh)}(hA0 if the ACT was handled in time, negative error code on failure.h]hA0 if the ACT was handled in time, negative error code on failure.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_downstream_is_type (C function)c.drm_dp_downstream_is_typehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hcbool drm_dp_downstream_is_type (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h]j )}(hbbool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM&ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM&ubj )}(hdrm_dp_downstream_is_typeh]j )}(hdrm_dp_downstream_is_typeh]hdrm_dp_downstream_is_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM&ubj)}(hD(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjϔhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˔ubj )}(h h]h }(hjܔhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˔ubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_downstream_is_typeasbuh1hhj˔ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˔ubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˔ubj)}(hjHh]h[}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj˔ubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j c.drm_dp_downstream_is_typeasbuh1hhj˔ubj)}(hjIh]h]}(hjWhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj˔ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjǔubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_dp_downstream_is_typeasbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj)}(hjHh]h[}(hjǕhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjkubhdesc_sig_literal_number)}(h4h]h4}(hj֕hhhNhNubah}(h]h ]mah"]h$]h&]uh1jԕhjkubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjǔubj)}(hu8 typeh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_dp_downstream_is_typeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(htypeh]htype}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjǔubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM&ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM&ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM&hjhhubj )}(hhh]h)}(h.is the downstream facing port of certain type?h]h.is the downstream facing port of certain type?}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM&hjShhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM&ubeh}(h]h ](j functioneh"]h$]h&]j j j jnj jnj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``u8 type`` port type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``. **Description** Caveat: Only works with DPCD 1.1+ port caps. **Return** whether the downstream facing port matches the type.h](h)}(h**Parameters**h]j )}(hjxh]h Parameters}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM*hjrubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM'hjubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjЖh]hconst u8 port_cap[4]}(hjҖhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjΖubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM(hjʖubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1j{ hjʖubeh}(h]h ]h"]h$]h&]uh1jY hjhM(hjubjZ )}(h``u8 type`` port type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``. h](j` )}(h ``u8 type``h]jf )}(hj h]hu8 type}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM,hjubj| )}(hhh]h)}(hport type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``.h](h!port type to be checked. Can be: }(hj"hhhNhNubjf )}(h``DP_DS_PORT_TYPE_DP``h]hDP_DS_PORT_TYPE_DP}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubh, }(hj"hhhNhNubjf )}(h``DP_DS_PORT_TYPE_VGA``h]hDP_DS_PORT_TYPE_VGA}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubh, }hj"sbjf )}(h``DP_DS_PORT_TYPE_DVI``h]hDP_DS_PORT_TYPE_DVI}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubh, }(hj"hhhNhNubjf )}(h``DP_DS_PORT_TYPE_HDMI``h]hDP_DS_PORT_TYPE_HDMI}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubh, }hj"sbjf )}(h``DP_DS_PORT_TYPE_NON_EDID``h]hDP_DS_PORT_TYPE_NON_EDID}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubh, }hj"sbjf )}(h``DP_DS_PORT_TYPE_DP_DUALMODE``h]hDP_DS_PORT_TYPE_DP_DUALMODE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubh or }(hj"hhhNhNubjf )}(h``DP_DS_PORT_TYPE_WIRELESS``h]hDP_DS_PORT_TYPE_WIRELESS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubh.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM)hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM,hjubeh}(h]h ]h"]h$]h&]uh1jT hjrubh)}(h**Description**h]j )}(hj×h]h Description}(hjŗhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM.hjrubh)}(h,Caveat: Only works with DPCD 1.1+ port caps.h]h,Caveat: Only works with DPCD 1.1+ port caps.}(hjٗhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM-hjrubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM/hjrubh)}(h4whether the downstream facing port matches the type.h]h4whether the downstream facing port matches the type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM0hjrubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_downstream_is_tmds (C function)c.drm_dp_downstream_is_tmdshNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h{bool drm_dp_downstream_is_tmds (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hzbool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hjIh]hbool}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM<ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+hhhj<hM<ubj )}(hdrm_dp_downstream_is_tmdsh]j )}(hdrm_dp_downstream_is_tmdsh]hdrm_dp_downstream_is_tmds}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubah}(h]h ](j j eh"]h$]h&]j j uh1j hj+hhhj<hM<ubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjQsbc.drm_dp_downstream_is_tmdsasbuh1hhjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj)}(hjHh]h[}(hjŘhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjgubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj՘hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjҘubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjטmodnameN classnameNj j )}j ]jc.drm_dp_downstream_is_tmdsasbuh1hhjgubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]jc.drm_dp_downstream_is_tmdsasbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjchhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hj}hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubj)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjΙhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˙ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjЙmodnameN classnameNj j )}j ]jc.drm_dp_downstream_is_tmdsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubeh}(h]h ]h"]h$]h&]j j uh1jhj+hhhj<hM<ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj'hhhj<hM<ubah}(h]j"ah ](j j eh"]h$]h&]j j )j huh1j{ hj<hM<hj$hhubj )}(hhh]h)}(h#is the downstream facing port TMDS?h]h#is the downstream facing port TMDS?}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM<hj.hhubah}(h]h ]h"]h$]h&]uh1j hj$hhhj<hM<ubeh}(h]h ](j functioneh"]h$]h&]j j j jIj jIj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** whether the downstream facing port is TMDS (HDMI/DVI).h](h)}(h**Parameters**h]j )}(hjSh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjMubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjrh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjlubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM=hjubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjhM=hjiubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjĚhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM>hjiubjZ )}(h)``const struct drm_edid *drm_edid`` EDID h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjޚubj| )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM?hjubah}(h]h ]h"]h$]h&]uh1j{ hjޚubeh}(h]h ]h"]h$]h&]uh1jY hjhM?hjiubeh}(h]h ]h"]h$]h&]uh1jT hjMubh)}(h **Return**h]j )}(hjh]hReturn}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjMubh)}(h6whether the downstream facing port is TMDS (HDMI/DVI).h]h6whether the downstream facing port is TMDS (HDMI/DVI).}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_dp_send_real_edid_checksum (C function) c.drm_dp_send_real_edid_checksumhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hSbool drm_dp_send_real_edid_checksum (struct drm_dp_aux *aux, u8 real_edid_checksum)h]j )}(hRbool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux, u8 real_edid_checksum)h](j)}(hjIh]hbool}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_ubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhjqhM_ubj )}(hdrm_dp_send_real_edid_checksumh]j )}(hdrm_dp_send_real_edid_checksumh]hdrm_dp_send_real_edid_checksum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhhjqhM_ubj)}(h/(struct drm_dp_aux *aux, u8 real_edid_checksum)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb c.drm_dp_send_real_edid_checksumasbuh1hhjubj )}(h h]h }(hjޛhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 real_edid_checksumh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jڛ c.drm_dp_send_real_edid_checksumasbuh1hhjubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hreal_edid_checksumh]hreal_edid_checksum}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj`hhhjqhM_ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj\hhhjqhM_ubah}(h]jWah ](j j eh"]h$]h&]j j )j huh1j{ hjqhM_hjYhhubj )}(hhh]h)}(h"send back real edid checksum valueh]h"send back real edid checksum value}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_hjhhhubah}(h]h ]h"]h$]h&]uh1j hjYhhhjqhM_ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 real_edid_checksum`` real edid checksum for the last block **Return** True on successh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMchjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM`hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjŜhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjœubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM`hjubjZ )}(h@``u8 real_edid_checksum`` real edid checksum for the last block h](j` )}(h``u8 real_edid_checksum``h]jf )}(hjh]hu8 real_edid_checksum}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMahjߜubj| )}(hhh]h)}(h%real edid checksum for the last blockh]h%real edid checksum for the last block}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMahjubah}(h]h ]h"]h$]h&]uh1j{ hjߜubeh}(h]h ]h"]h$]h&]uh1jY hjhMahjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hj h]hReturn}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMchjubh)}(hTrue on successh]hTrue on success}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMchjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_dp_read_dpcd_caps (C function)c.drm_dp_read_dpcd_capshNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hQint drm_dp_read_dpcd_caps (struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j )}(hPint drm_dp_read_dpcd_caps(struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjahhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhjshMubj )}(hdrm_dp_read_dpcd_capsh]j )}(hdrm_dp_read_dpcd_capsh]hdrm_dp_read_dpcd_caps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjahhhjshMubj)}(h7(struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_read_dpcd_capsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 dpcd[DP_RECEIVER_CAP_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jܝc.drm_dp_read_dpcd_capsasbuh1hhjubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjQhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]jܝc.drm_dp_read_dpcd_capsasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjahhhjshMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj]hhhjshMubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j{ hjshMhjZhhubj )}(hhh]h)}(h2read DPCD caps and extended DPCD caps if availableh]h2read DPCD caps and extended DPCD caps if available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjZhhhjshMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 dpcd[DP_RECEIVER_CAP_SIZE]`` Buffer to store the resulting DPCD in **Description** Attempts to read the base DPCD caps for **aux**. Additionally, this function checks for and reads the extended DPRX caps (``DP_DP13_DPCD_REV``) if present. **Return** ``0`` if the DPCD was read successfully, negative error code otherwise.h](h)}(h**Parameters**h]j )}(hjʞh]h Parameters}(hj̞hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjȞubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjĞubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hH``u8 dpcd[DP_RECEIVER_CAP_SIZE]`` Buffer to store the resulting DPCD in h](j` )}(h!``u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hj"h]hu8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h%Buffer to store the resulting DPCD inh]h%Buffer to store the resulting DPCD in}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj8ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj7hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjĞubh)}(h**Description**h]j )}(hj]h]h Description}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjĞubh)}(hAttempts to read the base DPCD caps for **aux**. Additionally, this function checks for and reads the extended DPRX caps (``DP_DP13_DPCD_REV``) if present.h](h(Attempts to read the base DPCD caps for }(hjshhhNhNubj )}(h**aux**h]haux}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubhK. Additionally, this function checks for and reads the extended DPRX caps (}(hjshhhNhNubjf )}(h``DP_DP13_DPCD_REV``h]hDP_DP13_DPCD_REV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubh ) if present.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjĞubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjĞubh)}(hG``0`` if the DPCD was read successfully, negative error code otherwise.h](jf )}(h``0``h]h0}(hjŸhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubhB if the DPCD was read successfully, negative error code otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjĞubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_read_downstream_info (C function)c.drm_dp_read_downstream_infohNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hint drm_dp_read_downstream_info (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h]j )}(hint drm_dp_read_downstream_info(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_dp_read_downstream_infoh]j )}(hdrm_dp_read_downstream_infoh]hdrm_dp_read_downstream_info}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(hk(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjXmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_read_downstream_infoasbuh1hhj4ubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj4ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj0ubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjȠhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŠubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjʠmodnameN classnameNj j )}j ]jrc.drm_dp_read_downstream_infoasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jrc.drm_dp_read_downstream_infoasbuh1hhjubj)}(hjIh]h]}(hj0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj0ubj)}(h,u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]h](h)}(hhh]j )}(hu8h]hu8}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]jrc.drm_dp_read_downstream_infoasbuh1hhjDubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj )}(hdownstream_portsh]hdownstream_ports}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjDubh)}(hhh]j )}(hDP_MAX_DOWNSTREAM_PORTSh]hDP_MAX_DOWNSTREAM_PORTS}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jrc.drm_dp_read_downstream_infoasbuh1hhjDubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj0ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(h+read DPCD downstream port info if availableh]h+read DPCD downstream port info if available}(hjܡhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj١hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the port's DPCD ``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]`` buffer to store the downstream port info in **Description** See also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc() **Return** 0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj3ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj2hMhjubjZ )}(hI``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the port's DPCD h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjVh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjPubj| )}(hhh]h)}(h A cached copy of the port's DPCDh]h"A cached copy of the port’s DPCD}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjlubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjkhMhjubjZ )}(h]``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]`` buffer to store the downstream port info in h](j` )}(h0``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]``h]jf )}(hjh]h,u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h+buffer to store the downstream port info inh]h+buffer to store the downstream port info in}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjʢh]h Description}(hj̢hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjȢubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hCSee also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc()h]hCSee also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.h]h0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_dp_downstream_max_dotclock (C function) c.drm_dp_downstream_max_dotclockhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h^int drm_dp_downstream_max_dotclock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(h]int drm_dp_downstream_max_dotclock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hinth]hint}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2hhhjDhMubj )}(hdrm_dp_downstream_max_dotclockh]j )}(hdrm_dp_downstream_max_dotclockh]hdrm_dp_downstream_max_dotclock}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ](j j eh"]h$]h&]j j uh1j hj2hhhjDhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjYsb c.drm_dp_downstream_max_dotclockasbuh1hhjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj)}(hjHh]h[}(hjͣhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjoubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjݣhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڣubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjߣmodnameN classnameNj j )}j ]j c.drm_dp_downstream_max_dotclockasbuh1hhjoubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]j c.drm_dp_downstream_max_dotclockasbuh1hhjubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjkhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubeh}(h]h ]h"]h$]h&]j j uh1jhj2hhhjDhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj.hhhjDhMubah}(h]j)ah ](j j eh"]h$]h&]j j )j huh1j{ hjDhMhj+hhubj )}(hhh]h)}(h,extract downstream facing port max dot clockh]h,extract downstream facing port max dot clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj+hhhjDhMubeh}(h]h ](j functioneh"]h$]h&]j j j jƤj jƤj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Return** Downstream facing port max dot clock in kHz on success, or 0 if max clock not definedh](h)}(h**Parameters**h]j )}(hjФh]h Parameters}(hjҤhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjΤubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjʤubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hj(h]hconst u8 port_cap[4]}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj"ubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj"ubeh}(h]h ]h"]h$]h&]uh1jY hj=hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjʤubh)}(h **Return**h]j )}(hjch]hReturn}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjʤubh)}(hUDownstream facing port max dot clock in kHz on success, or 0 if max clock not definedh]hUDownstream facing port max dot clock in kHz on success, or 0 if max clock not defined}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjʤubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_downstream_max_tmds_clock (C function)"c.drm_dp_downstream_max_tmds_clockhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hint drm_dp_downstream_max_tmds_clock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hint drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM9ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM9ubj )}(h drm_dp_downstream_max_tmds_clockh]j )}(h drm_dp_downstream_max_tmds_clockh]h drm_dp_downstream_max_tmds_clock}(hjɥhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjťubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM9ubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj˥sb"c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hj?hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQmodnameN classnameNj j )}j ]j"c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj)}(hjIh]h]}(hjmhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݥubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjϦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjݦhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݥubj)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hj h]hstruct}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJmodnameN classnameNj j )}j ]j"c.drm_dp_downstream_max_tmds_clockasbuh1hhj ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjthhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݥubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM9ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM9ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM9hjhhubj )}(hhh]h)}(h-extract downstream facing port max TMDS clockh]h-extract downstream facing port max TMDS clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM9hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM9ubeh}(h]h ](j functioneh"]h$]h&]j j j jçj jçj j j uh1jv hhhj5hNhNubj )}(hX$**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** HDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not definedh](h)}(h**Parameters**h]j )}(hjͧh]h Parameters}(hjϧhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj˧ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjǧubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM:hjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM:hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM:hjubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hj%h]hconst u8 port_cap[4]}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM;hjubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hM;hj;ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj:hM;hjubjZ )}(h)``const struct drm_edid *drm_edid`` EDID h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hj^h]hconst struct drm_edid *drm_edid}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjXubj| )}(hhh]h)}(hEDIDh]hEDID}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshM<hjtubah}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjshM<hjubeh}(h]h ]h"]h$]h&]uh1jT hjǧubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjǧubh)}(hdHDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not definedh]hdHDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjǧubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_downstream_min_tmds_clock (C function)"c.drm_dp_downstream_min_tmds_clockhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hint drm_dp_downstream_min_tmds_clock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hint drm_dp_downstream_min_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjިhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjڨhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڨhhhjhMzubj )}(h drm_dp_downstream_min_tmds_clockh]j )}(h drm_dp_downstream_min_tmds_clockh]h drm_dp_downstream_min_tmds_clock}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjڨhhhjhMzubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j)}jjsb"c.drm_dp_downstream_min_tmds_clockasbuh1hhjubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jU"c.drm_dp_downstream_min_tmds_clockasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjȩhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj٩hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֩ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj۩modnameN classnameNj j )}j ]jU"c.drm_dp_downstream_min_tmds_clockasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hj-hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(hj h]hstruct}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jU"c.drm_dp_downstream_min_tmds_clockasbuh1hhjAubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjAubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjڨhhhjhMzubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj֨hhhjhMzubah}(h]jѨah ](j j eh"]h$]h&]j j )j huh1j{ hjhMzhjӨhhubj )}(hhh]h)}(h-extract downstream facing port min TMDS clockh]h-extract downstream facing port min TMDS clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMzhjުhhubah}(h]h ]h"]h$]h&]uh1j hjӨhhhjhMzubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX$**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** HDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not definedh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM~hjubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hj"h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM{hjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hM{hj8ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj7hM{hjubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hj[h]hconst u8 port_cap[4]}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM|hjUubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphM|hjqubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjphM|hjubjZ )}(h)``const struct drm_edid *drm_edid`` EDID h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM}hjubj| )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM}hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM}hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjϫh]hReturn}(hjѫhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjͫubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hdHDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not definedh]hdHDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_downstream_max_bpc (C function)c.drm_dp_downstream_max_bpchNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hzint drm_dp_downstream_max_bpc (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hyint drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj"hMubj )}(hdrm_dp_downstream_max_bpch]j )}(hdrm_dp_downstream_max_bpch]hdrm_dp_downstream_max_bpc}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj"hMubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubh)}(hhh]j )}(hu8h]hu8}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]j)}jj7sbc.drm_dp_downstream_max_bpcasbuh1hhjMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjMubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_downstream_max_bpcasbuh1hhjMubj)}(hjIh]h]}(hj٬hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_downstream_max_bpcasbuh1hhjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjIhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hjchhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubj)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_downstream_max_bpcasbuh1hhjwubj )}(h h]h }(hjҭhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjwubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj"hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj"hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj"hMhj hhubj )}(hhh]h)}(h5extract downstream facing port max bits per componenth]h5extract downstream facing port max bits per component}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj"hMubeh}(h]h ](j functioneh"]h$]h&]j j j j/j j/j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** Max bpc on success or 0 if max bpc not definedh](h)}(h**Parameters**h]j )}(hj9h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjXh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjVubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjnubah}(h]h ]h"]h$]h&]uh1j{ hjRubeh}(h]h ]h"]h$]h&]uh1jY hjmhMhjOubjZ )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjOubjZ )}(h)``const struct drm_edid *drm_edid`` EDID h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjʮh]hconst struct drm_edid *drm_edid}(hj̮hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjȮubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjĮubj| )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj߮hMhjubah}(h]h ]h"]h$]h&]uh1j{ hjĮubeh}(h]h ]h"]h$]h&]uh1jY hj߮hMhjOubeh}(h]h ]h"]h$]h&]uh1jT hj3ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubh)}(h.Max bpc on success or 0 if max bpc not definedh]h.Max bpc on success or 0 if max bpc not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_dp_downstream_420_passthrough (C function)#c.drm_dp_downstream_420_passthroughhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hbbool drm_dp_downstream_420_passthrough (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(habool drm_dp_downstream_420_passthrough(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hjIh]hbool}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFhhhjWhMubj )}(h!drm_dp_downstream_420_passthroughh]j )}(h!drm_dp_downstream_420_passthroughh]h!drm_dp_downstream_420_passthrough}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ](j j eh"]h$]h&]j j uh1j hjFhhhjWhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjlsb#c.drm_dp_downstream_420_passthroughasbuh1hhjubj )}(h h]h }(hjįhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjүhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_dp_downstream_420_passthroughasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(hu8h]hu8}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]j#c.drm_dp_downstream_420_passthroughasbuh1hhj"ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(hport_caph]hport_cap}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hjHh]h[}(hj~hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubjՕ)}(hjؕh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhj"ubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubeh}(h]h ]h"]h$]h&]j j uh1jhjFhhhjWhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjBhhhjWhMubah}(h]j=ah ](j j eh"]h$]h&]j j )j huh1j{ hjWhMhj?hhubj )}(hhh]h)}(hDdetermine downstream facing port YCbCr 4:2:0 pass-through capabilityh]hDdetermine downstream facing port YCbCr 4:2:0 pass-through capability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj?hhhjWhMubeh}(h]h ](j functioneh"]h$]h&]j j j jٰj jٰj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities **Return** whether the downstream facing port can pass through YCbCr 4:2:0h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjݰubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hj;h]hconst u8 port_cap[4]}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj5ubj| )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMhjQubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hjPhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjݰubh)}(h **Return**h]j )}(hjvh]hReturn}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjݰubh)}(h?whether the downstream facing port can pass through YCbCr 4:2:0h]h?whether the downstream facing port can pass through YCbCr 4:2:0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjݰubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_dp_downstream_444_to_420_conversion (C function))c.drm_dp_downstream_444_to_420_conversionhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hhbool drm_dp_downstream_444_to_420_conversion (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(hgbool drm_dp_downstream_444_to_420_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjɱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjȱhMubj )}(h'drm_dp_downstream_444_to_420_conversionh]j )}(h'drm_dp_downstream_444_to_420_conversionh]h'drm_dp_downstream_444_to_420_conversion}(hj۱hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjױubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjȱhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjݱsb)c.drm_dp_downstream_444_to_420_conversionasbuh1hhjubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjQhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]j1)c.drm_dp_downstream_444_to_420_conversionasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j1)c.drm_dp_downstream_444_to_420_conversionasbuh1hhjubj )}(h h]h }(hjӲhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjȱhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjȱhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjȱhMhjhhubj )}(hhh]h)}(hIdetermine downstream facing port YCbCr 4:4:4->4:2:0 conversion capabilityh]hIdetermine downstream facing port YCbCr 4:4:4->4:2:0 conversion capability}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjȱhMubeh}(h]h ](j functioneh"]h$]h&]j j j jJj jJj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities **Return** whether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0h](h)}(h**Parameters**h]j )}(hjTh]h Parameters}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjNubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjsh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjmubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjmubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjjubjZ )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjųhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj³ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjjubeh}(h]h ]h"]h$]h&]uh1jT hjNubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjNubh)}(hCwhether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0h]hCwhether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjNubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6drm_dp_downstream_rgb_to_ycbcr_conversion (C function)+c.drm_dp_downstream_rgb_to_ycbcr_conversionhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hxbool drm_dp_downstream_rgb_to_ycbcr_conversion (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h]j )}(hwbool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h](j)}(hjIh]hbool}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj9hMubj )}(h)drm_dp_downstream_rgb_to_ycbcr_conversionh]j )}(h)drm_dp_downstream_rgb_to_ycbcr_conversionh]h)drm_dp_downstream_rgb_to_ycbcr_conversion}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj9hMubj)}(hI(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjNsb+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjdubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj)}(hjHh]h[}(hj´hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjҴhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjϴubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjԴmodnameN classnameNj j )}j ]j+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjdubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hjzhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(h u8 color_spch](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h color_spch]h color_spc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhj9hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj$hhhj9hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj9hMhj!hhubj )}(hhh]h)}(hAdetermine downstream facing port RGB->YCbCr conversion capabilityh]hAdetermine downstream facing port RGB->YCbCr conversion capability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj!hhhj9hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX9**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities ``u8 color_spc`` Colorspace for which conversion cap is sought **Return** whether the downstream facing port can convert RGB->YCbCr for a given colorspace.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hj,h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj&ubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhMhjBubah}(h]h ]h"]h$]h&]uh1j{ hj&ubeh}(h]h ]h"]h$]h&]uh1jY hjAhMhj#ubjZ )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjeh]hconst u8 port_cap[4]}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj_ubj| )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhj{ubah}(h]h ]h"]h$]h&]uh1j{ hj_ubeh}(h]h ]h"]h$]h&]uh1jY hjzhMhj#ubjZ )}(h?``u8 color_spc`` Colorspace for which conversion cap is sought h](j` )}(h``u8 color_spc``h]jf )}(hjh]h u8 color_spc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h-Colorspace for which conversion cap is soughth]h-Colorspace for which conversion cap is sought}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj#ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjٶh]hReturn}(hj۶hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj׶ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hQwhether the downstream facing port can convert RGB->YCbCr for a given colorspace.h]hQwhether the downstream facing port can convert RGB->YCbCr for a given colorspace.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_downstream_mode (C function)c.drm_dp_downstream_modehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hstruct drm_display_mode * drm_dp_downstream_mode (struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(hstruct drm_display_mode *drm_dp_downstream_mode(struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM:ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hM:ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?modnameN classnameNj j )}j ]j)}jdrm_dp_downstream_modesbc.drm_dp_downstream_modeasbuh1hhjhhhj+hM:ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hM:ubj)}(hjOh]h*}(hjlhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhj+hM:ubj )}(hdrm_dp_downstream_modeh]j )}(hj[h]hdrm_dp_downstream_mode}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj+hM:ubj)}(hS(struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jYc.drm_dp_downstream_modeasbuh1hhjubj )}(h h]h }(hjԷhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]jYc.drm_dp_downstream_modeasbuh1hhjubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]jYc.drm_dp_downstream_modeasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjĸhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjƸmodnameN classnameNj j )}j ]jYc.drm_dp_downstream_modeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj+hM:ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj+hM:ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj+hM:hjhhubj )}(hhh]h)}(h(return a mode for downstream facing porth]h(return a mode for downstream facing port}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM:hj>hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj+hM:ubeh}(h]h ](j functioneh"]h$]h&]j j j jYj jYj j j uh1jv hhhj5hNhNubj )}(hXF**Parameters** ``struct drm_device *dev`` DRM device ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Description** Provides a suitable mode for downstream facing ports without EDID. **Return** A new drm_display_mode on success or NULL on failure*h](h)}(h**Parameters**h]j )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM>hj]ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM;hj|ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM;hjubah}(h]h ]h"]h$]h&]uh1j{ hj|ubeh}(h]h ]h"]h$]h&]uh1jY hjhM;hjyubjZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjԹhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjйhM<hjѹubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjйhM<hjyubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM=hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM=hjyubeh}(h]h ]h"]h$]h&]uh1jT hj]ubh)}(h**Description**h]j )}(hj/h]h Description}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM?hj]ubh)}(hBProvides a suitable mode for downstream facing ports without EDID.h]hBProvides a suitable mode for downstream facing ports without EDID.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM>hj]ubh)}(h **Return**h]j )}(hjVh]hReturn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM@hj]ubh)}(h4A new drm_display_mode on success or NULL on failureh]h4A new drm_display_mode on success or NULL on failure}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMAhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_dp_downstream_id (C function)c.drm_dp_downstream_idhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h=int drm_dp_downstream_id (struct drm_dp_aux *aux, char id[6])h]j )}(hmodnameN classnameNj j )}j ]jNc.drm_dp_subconnector_typeasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjvhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjxubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(hget DP branch device typeh]hget DP branch device type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilitiesh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h*``const u8 port_cap[4]`` port capabilitiesh](j` )}(h``const u8 port_cap[4]``h]jf )}(hj3h]hconst u8 port_cap[4]}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj1ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjIubah}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hjHhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_set_subconnector_property (C function)"c.drm_dp_set_subconnector_propertyhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hvoid drm_dp_set_subconnector_property (struct drm_connector *connector, enum drm_connector_status status, const u8 *dpcd, const u8 port_cap[4])h]j )}(hvoid drm_dp_set_subconnector_property(struct drm_connector *connector, enum drm_connector_status status, const u8 *dpcd, const u8 port_cap[4])h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h drm_dp_set_subconnector_propertyh]j )}(h drm_dp_set_subconnector_propertyh]h drm_dp_set_subconnector_property}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hi(struct drm_connector *connector, enum drm_connector_status status, const u8 *dpcd, const u8 port_cap[4])h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb"c.drm_dp_set_subconnector_propertyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h enum drm_connector_status statush](j )}(hj+h]henum}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j"c.drm_dp_set_subconnector_propertyasbuh1hhj8ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(hstatush]hstatus}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 *dpcdh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_set_subconnector_propertyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hu8h]hu8}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]j"c.drm_dp_set_subconnector_propertyasbuh1hhj ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hport_caph]hport_cap}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjHh]h[}(hjghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubjՕ)}(hjؕh]h4}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhj ubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h!set subconnector for DP connectorh]h!set subconnector for DP connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX***Parameters** ``struct drm_connector *connector`` connector to set property on ``enum drm_connector_status status`` connector status ``const u8 *dpcd`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Description** Called by a driver on every detect event.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(hA``struct drm_connector *connector`` connector to set property on h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hconnector to set property onh]hconnector to set property on}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h6``enum drm_connector_status status`` connector status h](j` )}(h$``enum drm_connector_status status``h]jf )}(hj$h]h enum drm_connector_status status}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hconnector statush]hconnector status}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhjubjZ )}(h2``const u8 *dpcd`` DisplayPort configuration data h](j` )}(h``const u8 *dpcd``h]jf )}(hj]h]hconst u8 *dpcd}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjWubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMhjsubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjrhMhjubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h)Called by a driver on every detect event.h]h)Called by a driver on every detect event.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_read_sink_count_cap (C function)c.drm_dp_read_sink_count_caphNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hbool drm_dp_read_sink_count_cap (struct drm_connector *connector, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const struct drm_dp_desc *desc)h]j )}(hbool drm_dp_read_sink_count_cap(struct drm_connector *connector, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const struct drm_dp_desc *desc)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM%ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj#hM%ubj )}(hdrm_dp_read_sink_count_caph]j )}(hdrm_dp_read_sink_count_caph]hdrm_dp_read_sink_count_cap}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj#hM%ubj)}(hf(struct drm_connector *connector, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const struct drm_dp_desc *desc)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]j)}jj8sbc.drm_dp_read_sink_count_capasbuh1hhjNubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjNubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_sink_count_capasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]jc.drm_dp_read_sink_count_capasbuh1hhjubj)}(hjIh]h]}(hjJhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubj)}(hconst struct drm_dp_desc *desch](j )}(hjAh]hconst}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(hj h]hstruct}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(h drm_dp_desch]h drm_dp_desc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_sink_count_capasbuh1hhj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^ubj )}(hdesch]hdesc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj#hM%ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj#hM%ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj#hM%hj hhubj )}(hhh]h)}(h6Check whether a given connector has a valid sink counth]h6Check whether a given connector has a valid sink count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM%hjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj#hM%ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` The DRM connector to check ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the connector's DPCD RX capabilities ``const struct drm_dp_desc *desc`` A cached copy of the connector's DP descriptor **Description** See also: drm_dp_read_sink_count() **Return** ``True`` if the (e)DP connector has a valid sink count that should be probed, ``false`` otherwise.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM)hjubjU )}(hhh](jZ )}(h?``struct drm_connector *connector`` The DRM connector to check h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj?h]hstruct drm_connector *connector}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM'hj9ubj| )}(hhh]h)}(hThe DRM connector to checkh]hThe DRM connector to check}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThM'hjUubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hjThM'hj6ubjZ )}(h^``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the connector's DPCD RX capabilities h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjxh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM(hjrubj| )}(hhh]h)}(h5A cached copy of the connector's DPCD RX capabilitiesh]h7A cached copy of the connector’s DPCD RX capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjhM(hj6ubjZ )}(hR``const struct drm_dp_desc *desc`` A cached copy of the connector's DP descriptor h](j` )}(h"``const struct drm_dp_desc *desc``h]jf )}(hjh]hconst struct drm_dp_desc *desc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM)hjubj| )}(hhh]h)}(h.A cached copy of the connector's DP descriptorh]h0A cached copy of the connector’s DP descriptor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM)hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM)hj6ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM+hjubh)}(h"See also: drm_dp_read_sink_count()h]h"See also: drm_dp_read_sink_count()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM*hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM,hjubh)}(hb``True`` if the (e)DP connector has a valid sink count that should be probed, ``false`` otherwise.h](jf )}(h``True``h]hTrue}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubhF if the (e)DP connector has a valid sink count that should be probed, }(hj)hhhNhNubjf )}(h ``false``h]hfalse}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubh otherwise.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM-hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_read_sink_count (C function)c.drm_dp_read_sink_counthNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h3int drm_dp_read_sink_count (struct drm_dp_aux *aux)h]j )}(h2int drm_dp_read_sink_count(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjhM=ubj )}(hdrm_dp_read_sink_counth]j )}(hdrm_dp_read_sink_counth]hdrm_dp_read_sink_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjthhhjhM=ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_read_sink_countasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjthhhjhM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjphhhjhM=ubah}(h]jkah ](j j eh"]h$]h&]j j )j huh1j{ hjhM=hjmhhubj )}(hhh]h)}(h(Retrieve the sink count for a given sinkh]h(Retrieve the sink count for a given sink}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM=hj5hhubah}(h]h ]h"]h$]h&]uh1j hjmhhhjhM=ubeh}(h]h ](j functioneh"]h$]h&]j j j jPj jPj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use **Description** See also: drm_dp_read_sink_count_cap() **Return** The current sink count reported by **aux**, or a negative error code otherwise.h](h)}(h**Parameters**h]j )}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjTubjU )}(hhh]jZ )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjyh]hstruct drm_dp_aux *aux}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjsubj| )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhM>hjpubah}(h]h ]h"]h$]h&]uh1jT hjTubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjTubh)}(h&See also: drm_dp_read_sink_count_cap()h]h&See also: drm_dp_read_sink_count_cap()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjTubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjTubh)}(hOThe current sink count reported by **aux**, or a negative error code otherwise.h](h#The current sink count reported by }(hjhhhNhNubj )}(h**aux**h]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh%, or a negative error code otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMBhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_remote_aux_init (C function)c.drm_dp_remote_aux_inithNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h4void drm_dp_remote_aux_init (struct drm_dp_aux *aux)h]j )}(h3void drm_dp_remote_aux_init(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhj@hM ubj )}(hdrm_dp_remote_aux_inith]j )}(hdrm_dp_remote_aux_inith]hdrm_dp_remote_aux_init}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhj@hM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjUsbc.drm_dp_remote_aux_initasbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjkubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubah}(h]h ]h"]h$]h&]j j uh1jhj.hhhj@hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj*hhhj@hM ubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j{ hj@hM hj'hhubj )}(hhh]h)}(h)minimally initialise a remote aux channelh]h)minimally initialise a remote aux channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj@hM ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Used for remote aux channel in general. Merely initialize the crc work struct.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj3h]hstruct drm_dp_aux *aux}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj1ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj-ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhM hjIubah}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hjHhM hj*ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjnh]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hNUsed for remote aux channel in general. Merely initialize the crc work struct.h]hNUsed for remote aux channel in general. Merely initialize the crc work struct.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_aux_init (C function)c.drm_dp_aux_inithNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h-void drm_dp_aux_init (struct drm_dp_aux *aux)h]j )}(h,void drm_dp_aux_init(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM% ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM% ubj )}(hdrm_dp_aux_inith]j )}(hdrm_dp_aux_inith]hdrm_dp_aux_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM% ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_aux_initasbuh1hhjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM% ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM% ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM% hjhhubj )}(hhh]h)}(h#minimally initialise an aux channelh]h#minimally initialise an aux channel}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM% hjphhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM% ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hXK**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** If you need to use the drm_dp_aux's i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a :c:type:`drm_connector`), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign :c:type:`drm_dp_aux.drm_dev ` as early as possible so that the :c:type:`drm_device` that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers. For devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM) hjubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM& hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM& hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM& hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM( hjubh)}(hXsIf you need to use the drm_dp_aux's i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a :c:type:`drm_connector`), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign :c:type:`drm_dp_aux.drm_dev ` as early as possible so that the :c:type:`drm_device` that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers.h](hIf you need to use the drm_dp_aux’s i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM' hjubh), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign }(hjhhhNhNubh)}(h):c:type:`drm_dp_aux.drm_dev `h]jf )}(hj3h]hdrm_dp_aux.drm_dev}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhj,hM' hjubh" as early as possible so that the }(hjhhhNhNubh)}(h:c:type:`drm_device`h]jf )}(hjVh]h drm_device}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhj,hM' hjubhb that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,hM' hjubh)}(hFor devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.dh]hFor devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM0 hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_aux_register (C function)c.drm_dp_aux_registerhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h0int drm_dp_aux_register (struct drm_dp_aux *aux)h]j )}(h/int drm_dp_aux_register(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMD ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMD ubj )}(hdrm_dp_aux_registerh]j )}(hdrm_dp_aux_registerh]hdrm_dp_aux_register}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMD ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_aux_registerasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMD ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMD ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMD hjhhubj )}(hhh]h)}(h#initialise and register aux channelh]h#initialise and register aux channel}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMD hjihhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMD ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Automatically calls drm_dp_aux_init() if this hasn't been done yet. This should only be called once the parent of **aux**, :c:type:`drm_dp_aux.dev `, is initialized. For devices which are grandparents of their AUX channels, :c:type:`drm_dp_aux.dev ` will typically be the :c:type:`drm_connector` :c:type:`device` which corresponds to **aux**. For these devices, it's advised to call drm_dp_aux_register() in :c:type:`drm_connector_funcs.late_register `, and likewise to call drm_dp_aux_unregister() in :c:type:`drm_connector_funcs.early_unregister `. Functions which don't follow this will likely Oops when ``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV`` is enabled. For devices where the AUX channel is a device that exists independently of the :c:type:`drm_device` that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a :c:type:`drm_device` has been assigned to :c:type:`drm_dp_aux.drm_dev `, and likewise to call drm_dp_aux_unregister() once the :c:type:`drm_device` should no longer be associated with the AUX channel (e.g. on bridge detach). Drivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMH hjubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chME hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhME hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhME hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMG hjubh)}(hXAutomatically calls drm_dp_aux_init() if this hasn't been done yet. This should only be called once the parent of **aux**, :c:type:`drm_dp_aux.dev `, is initialized. For devices which are grandparents of their AUX channels, :c:type:`drm_dp_aux.dev ` will typically be the :c:type:`drm_connector` :c:type:`device` which corresponds to **aux**. For these devices, it's advised to call drm_dp_aux_register() in :c:type:`drm_connector_funcs.late_register `, and likewise to call drm_dp_aux_unregister() in :c:type:`drm_connector_funcs.early_unregister `. Functions which don't follow this will likely Oops when ``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV`` is enabled.h](htAutomatically calls drm_dp_aux_init() if this hasn’t been done yet. This should only be called once the parent of }(hjhhhNhNubj )}(h**aux**h]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, }(hjhhhNhNubh)}(h%:c:type:`drm_dp_aux.dev `h]jf )}(hjh]hdrm_dp_aux.dev}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMF hjubhL, is initialized. For devices which are grandparents of their AUX channels, }(hjhhhNhNubh)}(h%:c:type:`drm_dp_aux.dev `h]jf )}(hj>h]hdrm_dp_aux.dev}(hj@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhj7hMF hjubh will typically be the }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjah]h drm_connector}(hjchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj7hMF hjubh }(hjhhhNhNubh)}(h:c:type:`device`h]jf )}(hjh]hdevice}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j deviceuh1hhj7hMF hjubh which corresponds to }(hjhhhNhNubj )}(h**aux**h]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhE. For these devices, it’s advised to call drm_dp_aux_register() in }(hjhhhNhNubh)}(hA:c:type:`drm_connector_funcs.late_register `h]jf )}(hjh]h!drm_connector_funcs.late_register}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhj7hMF hjubh2, and likewise to call drm_dp_aux_unregister() in }(hjhhhNhNubh)}(hD:c:type:`drm_connector_funcs.early_unregister `h]jf )}(hjh]h$drm_connector_funcs.early_unregister}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhj7hMF hjubh<. Functions which don’t follow this will likely Oops when }(hjhhhNhNubjf )}(h%``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV``h]h!CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh is enabled.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hMF hjubh)}(hXFor devices where the AUX channel is a device that exists independently of the :c:type:`drm_device` that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a :c:type:`drm_device` has been assigned to :c:type:`drm_dp_aux.drm_dev `, and likewise to call drm_dp_aux_unregister() once the :c:type:`drm_device` should no longer be associated with the AUX channel (e.g. on bridge detach).h](hOFor devices where the AUX channel is a device that exists independently of the }(hjhhhNhNubh)}(h:c:type:`drm_device`h]jf )}(hjh]h drm_device}(hj!hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMP hjubhh that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a }(hjhhhNhNubh)}(h:c:type:`drm_device`h]jf )}(hjCh]h drm_device}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhj<hMP hjubh has been assigned to }(hjhhhNhNubh)}(h):c:type:`drm_dp_aux.drm_dev `h]jf )}(hjfh]hdrm_dp_aux.drm_dev}(hjhhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhj<hMP hjubh8, and likewise to call drm_dp_aux_unregister() once the }(hjhhhNhNubh)}(h:c:type:`drm_device`h]jf )}(hjh]h drm_device}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhj<hMP hjubhM should no longer be associated with the AUX channel (e.g. on bridge detach).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hMP hjubh)}(hDrivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration.h]hDrivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMW hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM[ hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_dp_aux_unregister (C function)c.drm_dp_aux_unregisterhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h3void drm_dp_aux_unregister (struct drm_dp_aux *aux)h]j )}(h2void drm_dp_aux_unregister(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM| ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM| ubj )}(hdrm_dp_aux_unregisterh]j )}(hdrm_dp_aux_unregisterh]hdrm_dp_aux_unregister}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM| ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjKmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_aux_unregisterasbuh1hhj'ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj)}(hjOh]h*}(hjwhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj'ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj#ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM| ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM| ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM| hjhhubj )}(hhh]h)}(hunregister an AUX adapterh]hunregister an AUX adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM| hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM| ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hD**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channelh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(h2``struct drm_dp_aux *aux`` DisplayPort AUX channelh](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM} hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubah}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_dp_psr_setup_time (C function)c.drm_dp_psr_setup_timehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hGint drm_dp_psr_setup_time (const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h]j )}(hFint drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h](j)}(hinth]hint}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEhhhjWhM ubj )}(hdrm_dp_psr_setup_timeh]j )}(hdrm_dp_psr_setup_timeh]hdrm_dp_psr_setup_time}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ](j j eh"]h$]h&]j j uh1j hjEhhhjWhM ubj)}(h-(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h]j)}(h+const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjlsbc.drm_dp_psr_setup_timeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hpsr_caph]hpsr_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hEDP_PSR_RECEIVER_CAP_SIZEh]hEDP_PSR_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_psr_setup_timeasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubah}(h]h ]h"]h$]h&]j j uh1jhjEhhhjWhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjAhhhjWhM ubah}(h]j<ah ](j j eh"]h$]h&]j j )j huh1j{ hjWhM hj>hhubj )}(hhh]h)}(hPSR setup in time usech]hPSR setup in time usec}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj4hhubah}(h]h ]h"]h$]h&]uh1j hj>hhhjWhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jOj jOj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]`` PSR capabilities from DPCD **Return** PSR setup time for the panel in microseconds, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjYh]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjSubjU )}(hhh]jZ )}(hK``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]`` PSR capabilities from DPCD h](j` )}(h/``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]``h]jf )}(hjxh]h+const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjrubj| )}(hhh]h)}(hPSR capabilities from DPCDh]hPSR capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjoubah}(h]h ]h"]h$]h&]uh1jT hjSubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjSubh)}(hNPSR setup time for the panel in microseconds, negative error code on failure.h]hNPSR setup time for the panel in microseconds, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjSubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_start_crc (C function)c.drm_dp_start_crchNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hDint drm_dp_start_crc (struct drm_dp_aux *aux, struct drm_crtc *crtc)h]j )}(hCint drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_start_crch]j )}(hdrm_dp_start_crch]hdrm_dp_start_crc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h/(struct drm_dp_aux *aux, struct drm_crtc *crtc)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_start_crcasbuh1hhj1ubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubj)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]joc.drm_dp_start_crcasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(hstart capture of frame CRCsh]hstart capture of frame CRCs}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj%hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j@j j@j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_crtc *crtc`` CRTC displaying the frames whose CRCs are to be captured **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjJh]h Parameters}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjDubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjih]hstruct drm_dp_aux *aux}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjcubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hM hjubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hj~hM hj`ubjZ )}(hS``struct drm_crtc *crtc`` CRTC displaying the frames whose CRCs are to be captured h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(h8CRTC displaying the frames whose CRCs are to be capturedh]h8CRTC displaying the frames whose CRCs are to be captured}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj`ubeh}(h]h ]h"]h$]h&]uh1jT hjDubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjDubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjDubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_stop_crc (C function)c.drm_dp_stop_crchNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h,int drm_dp_stop_crc (struct drm_dp_aux *aux)h]j )}(h+int drm_dp_stop_crc(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj0hM ubj )}(hdrm_dp_stop_crch]j )}(hdrm_dp_stop_crch]hdrm_dp_stop_crc}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj0hM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjEsbc.drm_dp_stop_crcasbuh1hhj[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjWubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj0hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj0hM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj0hM hjhhubj )}(hhh]h)}(hstop capture of frame CRCsh]hstop capture of frame CRCs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj0hM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj#h]hstruct drm_dp_aux *aux}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM hj9ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj8hM hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj^h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_read_desc (C function)c.drm_dp_read_deschNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hWint drm_dp_read_desc (struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h]j )}(hVint drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMA ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMA ubj )}(hdrm_dp_read_desch]j )}(hdrm_dp_read_desch]hdrm_dp_read_desc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMA ubj)}(hB(struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_read_descasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_desc *desch](j )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(h drm_dp_desch]h drm_dp_desc}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]jc.drm_dp_read_descasbuh1hhjNubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjNubj )}(hdesch]hdesc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hbool is_branchh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h is_branchh]h is_branch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMA ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMA ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMA hjhhubj )}(hhh]h)}(h%read sink/branch descriptor from DPCDh]h%read sink/branch descriptor from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMA hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMA ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hXv**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_desc *desc`` Device descriptor to fill from DPCD ``bool is_branch`` true for branch devices, false for sink devices **Description** Read DPCD 0x400 (sink) or 0x500 (branch) into **desc**. Also debug log the identification. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj)h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chME hj#ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjHh]hstruct drm_dp_aux *aux}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMB hjBubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMB hj^ubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hj]hMB hj?ubjZ )}(hA``struct drm_dp_desc *desc`` Device descriptor to fill from DPCD h](j` )}(h``struct drm_dp_desc *desc``h]jf )}(hjh]hstruct drm_dp_desc *desc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMC hj{ubj| )}(hhh]h)}(h#Device descriptor to fill from DPCDh]h#Device descriptor to fill from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMC hjubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hjhMC hj?ubjZ )}(hC``bool is_branch`` true for branch devices, false for sink devices h](j` )}(h``bool is_branch``h]jf )}(hjh]hbool is_branch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMD hjubj| )}(hhh]h)}(h/true for branch devices, false for sink devicesh]h/true for branch devices, false for sink devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMD hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMD hj?ubeh}(h]h ]h"]h$]h&]uh1jT hj#ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMF hj#ubh)}(hZRead DPCD 0x400 (sink) or 0x500 (branch) into **desc**. Also debug log the identification.h](h.Read DPCD 0x400 (sink) or 0x500 (branch) into }(hj hhhNhNubj )}(h**desc**h]hdesc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh$. Also debug log the identification.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chME hj#ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMH hj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_dump_lttpr_desc (C function)c.drm_dp_dump_lttpr_deschNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hKint drm_dp_dump_lttpr_desc (struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h]j )}(hJint drm_dp_dump_lttpr_desc(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h](j)}(hinth]hint}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_ ubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhhjihM_ ubj )}(hdrm_dp_dump_lttpr_desch]j )}(hdrm_dp_dump_lttpr_desch]hdrm_dp_dump_lttpr_desc}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ](j j eh"]h$]h&]j j uh1j hjWhhhjihM_ ubj)}(h0(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj~sbc.drm_dp_dump_lttpr_descasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(henum drm_dp_phy dp_phyh](j )}(hj+h]henum}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_phyh]h drm_dp_phy}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]jc.drm_dp_dump_lttpr_descasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdp_phyh]hdp_phy}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjWhhhjihM_ ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjihM_ ubah}(h]jNah ](j j eh"]h$]h&]j j )j huh1j{ hjihM_ hjPhhubj )}(hhh]h)}(h2read and dump the DPCD descriptor for an LTTPR PHYh]h2read and dump the DPCD descriptor for an LTTPR PHY}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hj{hhubah}(h]h ]h"]h$]h&]uh1j hjPhhhjihM_ ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX)**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``enum drm_dp_phy dp_phy`` LTTPR PHY instance **Description** Read the DPCD LTTPR PHY descriptor for **dp_phy** and print a debug message with its details to dmesg. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM` hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM` hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM` hjubjZ )}(h.``enum drm_dp_phy dp_phy`` LTTPR PHY instance h](j` )}(h``enum drm_dp_phy dp_phy``h]jf )}(hjh]henum drm_dp_phy dp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMa hjubj| )}(hhh]h)}(hLTTPR PHY instanceh]hLTTPR PHY instance}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMa hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMa hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj3h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubh)}(hfRead the DPCD LTTPR PHY descriptor for **dp_phy** and print a debug message with its details to dmesg.h](h'Read the DPCD LTTPR PHY descriptor for }(hjIhhhNhNubj )}(h **dp_phy**h]hdp_phy}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubh5 and print a debug message with its details to dmesg.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMb hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMe hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dp_dsc_sink_bpp_incr (C function)c.drm_dp_dsc_sink_bpp_incrhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hIu8 drm_dp_dsc_sink_bpp_incr (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j )}(hHu8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_dp_dsc_sink_bpp_incrsbc.drm_dp_dsc_sink_bpp_incrasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM{ ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM{ ubj )}(hdrm_dp_dsc_sink_bpp_incrh]j )}(hjh]hdrm_dp_dsc_sink_bpp_incr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM{ ubj)}(h-(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_dp_dsc_sink_bpp_incrasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_dpcdh]hdsc_dpcd}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjChhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]jc.drm_dp_dsc_sink_bpp_incrasbuh1hhjubj)}(hjIh]h]}(hjqhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM{ ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM{ ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM{ hjhhubj )}(hhh]h)}(hGet bits per pixel incrementh]hGet bits per pixel increment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM{ hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM{ ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD **Description** Returns the bpp precision supported by the DP sink.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j` )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM| hjubj| )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM| hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM| hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM~ hjubh)}(h3Returns the bpp precision supported by the DP sink.h]h3Returns the bpp precision supported by the DP sink.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM} hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_dp_dsc_slice_count_to_mask (C function) c.drm_dp_dsc_slice_count_to_maskhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h4u32 drm_dp_dsc_slice_count_to_mask (int slice_count)h]j )}(h3u32 drm_dp_dsc_slice_count_to_mask(int slice_count)h](h)}(hhh]j )}(hu32h]hu32}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j)}jdrm_dp_dsc_slice_count_to_masksb c.drm_dp_dsc_slice_count_to_maskasbuh1hhjWhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhhjhM ubj )}(hdrm_dp_dsc_slice_count_to_maskh]j )}(hj|h]hdrm_dp_dsc_slice_count_to_mask}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjWhhhjhM ubj)}(h(int slice_count)h]j)}(hint slice_counth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h slice_counth]h slice_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjWhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjhM ubah}(h]jNah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjPhhubj )}(hhh]h)}(h+Convert a slice count to a slice count maskh]h+Convert a slice count to a slice count mask}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjPhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``int slice_count`` slice count **Description** Convert **slice_count** to a slice count mask. Returns the slice count mask.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(h ``int slice_count`` slice count h](j` )}(h``int slice_count``h]jf )}(hj4h]hint slice_count}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubj| )}(hhh]h)}(h slice counth]h slice count}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhM hjJubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hjIhM hj+ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjoh]h Description}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h.Convert **slice_count** to a slice count mask.h](hConvert }(hjhhhNhNubj )}(h**slice_count**h]h slice_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh to a slice count mask.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hReturns the slice count mask.h]hReturns the slice count mask.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_dsc_sink_slice_count_mask (C function)"c.drm_dp_dsc_sink_slice_count_maskhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h_u32 drm_dp_dsc_sink_slice_count_mask (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h]j )}(h^u32 drm_dp_dsc_sink_slice_count_mask(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j drm_dp_dsc_sink_slice_count_masksb"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h drm_dp_dsc_sink_slice_count_maskh]j )}(hjh]h drm_dp_dsc_sink_slice_count_mask}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h:(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hu8h]hu8}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjGmodnameN classnameNj j )}j ]j"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhj#ubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hdsc_dpcdh]hdsc_dpcd}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhj#ubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool is_edph](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(his_edph]his_edp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h+Get the mask of valid DSC sink slice countsh]h+Get the mask of valid DSC sink slice counts}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j"j j"j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` the sink's DSC DPCD capabilities ``bool is_edp`` ``true`` for an eDP sink **Description** Get the mask of supported slice counts from the sink's DSC DPCD register. **Return** Mask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn't support any slicesh](h)}(h**Parameters**h]j )}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj&ubjU )}(hhh](jZ )}(hQ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` the sink's DSC DPCD capabilities h](j` )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jf )}(hjKh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjEubj| )}(hhh]h)}(h the sink's DSC DPCD capabilitiesh]h"the sink’s DSC DPCD capabilities}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM hjaubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj`hM hjBubjZ )}(h)``bool is_edp`` ``true`` for an eDP sink h](j` )}(h``bool is_edp``h]jf )}(hjh]h bool is_edp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj~ubj| )}(hhh]h)}(h``true`` for an eDP sinkh](jf )}(h``true``h]htrue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh for an eDP sink}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjBubeh}(h]h ]h"]h$]h&]uh1jT hj&ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj&ubh)}(hIGet the mask of supported slice counts from the sink's DSC DPCD register.h]hKGet the mask of supported slice counts from the sink’s DSC DPCD register.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj&ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj&ubh)}(hMask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn't support any slicesh]hMask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn’t support any slices}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.c"hM hj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_dsc_sink_max_slice_count (C function)!c.drm_dp_dsc_sink_max_slice_counthNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h]u8 drm_dp_dsc_sink_max_slice_count (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h]j )}(h\u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](h)}(hhh]j )}(hu8h]hu8}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]j)}jdrm_dp_dsc_sink_max_slice_countsb!c.drm_dp_dsc_sink_max_slice_countasbuh1hhj5hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5hhhj]hM ubj )}(hdrm_dp_dsc_sink_max_slice_counth]j )}(hjZh]hdrm_dp_dsc_sink_max_slice_count}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ](j j eh"]h$]h&]j j uh1j hj5hhhj]hM ubj)}(h:(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jX!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jX!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool is_edph](j)}(hjIh]hbool}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(his_edph]his_edp}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj5hhhj]hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj1hhhj]hM ubah}(h]j,ah ](j j eh"]h$]h&]j j )j huh1j{ hj]hM hj.hhubj )}(hhh]h)}(h2Get the max slice count supported by the DSC sink.h]h2Get the max slice count supported by the DSC sink.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjkhhubah}(h]h ]h"]h$]h&]uh1j hj.hhhj]hM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD ``bool is_edp`` true if its eDP, false for DP **Description** Read the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Maximum slice count supported by DSC sink or 0 its invalidh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh](jZ )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j` )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(h.``bool is_edp`` true if its eDP, false for DP h](j` )}(h``bool is_edp``h]jf )}(hjh]h bool is_edp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(htrue if its eDP, false for DPh]htrue if its eDP, false for DP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj#h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hXRead the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the }(hj9hhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jf )}(hjCh]hstruct drm_dsc_config}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj9ubhO by the driver. Driver creates an infoframe using these parameters to populate }(hj9hhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]jf )}(hjgh]hstruct drm_dsc_pps_infoframe}(hjihhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_pps_infoframeuh1hhj`hM hj9ubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`hM hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h:Maximum slice count supported by DSC sink or 0 its invalidh]h:Maximum slice count supported by DSC sink or 0 its invalid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_dp_dsc_sink_line_buf_depth (C function) c.drm_dp_dsc_sink_line_buf_depthhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hOu8 drm_dp_dsc_sink_line_buf_depth (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j )}(hNu8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_dp_dsc_sink_line_buf_depthsb c.drm_dp_dsc_sink_line_buf_depthasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_dsc_sink_line_buf_depthh]j )}(hjh]hdrm_dp_dsc_sink_line_buf_depth}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h-(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hu8h]hu8}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjGmodnameN classnameNj j )}j ]j c.drm_dp_dsc_sink_line_buf_depthasbuh1hhj#ubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hdsc_dpcdh]hdsc_dpcd}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_dp_dsc_sink_line_buf_depthasbuh1hhj#ubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h!Get the line buffer depth in bitsh]h!Get the line buffer depth in bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD **Description** Read the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Line buffer depth supported by DSC panel or 0 its invalidh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j` )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM hj-ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj,hM hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjRh]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hXRead the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the }(hjhhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jf )}(hjrh]hstruct drm_dsc_config}(hjthhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhubhO by the driver. Driver creates an infoframe using these parameters to populate }(hjhhhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]jf )}(hjh]hstruct drm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_pps_infoframeuh1hhjhM hjhubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Line buffer depth supported by DSC panel or 0 its invalidh]h9Line buffer depth supported by DSC panel or 0 its invalid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_dp_dsc_sink_supported_input_bpcs (C function)&c.drm_dp_dsc_sink_supported_input_bpcshNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(heint drm_dp_dsc_sink_supported_input_bpcs (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h]j )}(hdint drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h$drm_dp_dsc_sink_supported_input_bpcsh]j )}(h$drm_dp_dsc_sink_supported_input_bpcsh]h$drm_dp_dsc_sink_supported_input_bpcs}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h<(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hu8h]hu8}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j)}jj'sb&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhj=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=ubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j{&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhj=ubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubj)}(h u8 dsc_bpc[3]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j{&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_bpch]hdsc_bpc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(h3h]h3}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hj9hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(hFGet all the input bits per component values supported by the DSC sink.h]hFGet all the input bits per component values supported by the DSC sink.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj_hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jzj jzj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD ``u8 dsc_bpc[3]`` An array to be filled by this helper with supported input bpcs. **Description** Read the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Number of input BPC values parsed from the DPCDh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj~ubjU )}(hhh](jZ )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j` )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(hR``u8 dsc_bpc[3]`` An array to be filled by this helper with supported input bpcs. h](j` )}(h``u8 dsc_bpc[3]``h]jf )}(hjh]h u8 dsc_bpc[3]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(h?An array to be filled by this helper with supported input bpcs.h]h?An array to be filled by this helper with supported input bpcs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubeh}(h]h ]h"]h$]h&]uh1jT hj~ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj~ubh)}(hXRead the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the }(hj.hhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jf )}(hj8h]hstruct drm_dsc_config}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubhO by the driver. Driver creates an infoframe using these parameters to populate }(hj.hhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]jf )}(hj\h]hstruct drm_dsc_pps_infoframe}(hj^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_pps_infoframeuh1hhjUhM hj.ubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhM hj~ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM& hj~ubh)}(h/Number of input BPC values parsed from the DPCDh]h/Number of input BPC values parsed from the DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM' hj~ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_dp_dsc_sink_max_slice_throughput (C function)&c.drm_dp_dsc_sink_max_slice_throughputhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hint drm_dp_dsc_sink_max_slice_throughput (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h]j )}(h~int drm_dp_dsc_sink_max_slice_throughput(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMN ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMN ubj )}(h$drm_dp_dsc_sink_max_slice_throughputh]j )}(h$drm_dp_dsc_sink_max_slice_throughputh]h$drm_dp_dsc_sink_max_slice_throughput}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMN ubj)}(hV(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j)}jjsb&c.drm_dp_dsc_sink_max_slice_throughputasbuh1hhjubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_dpcdh]hdsc_dpcd}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]jA&c.drm_dp_dsc_sink_max_slice_throughputasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint peak_pixel_rateh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hpeak_pixel_rateh]hpeak_pixel_rate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hbool is_rgb_yuv444h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h is_rgb_yuv444h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMN ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMN ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMN hjhhubj )}(hhh]h)}(h3Get a DSC sink's maximum pixel throughput per sliceh]h5Get a DSC sink’s maximum pixel throughput per slice}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMN hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMN ubeh}(h]h ](j functioneh"]h$]h&]j j j j9j j9j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC sink's capabilities from DPCD ``int peak_pixel_rate`` Cumulative peak pixel rate in kHz ``bool is_rgb_yuv444`` The mode is either RGB or YUV444 **Description** Return the DSC sink device's maximum pixel throughput per slice, based on the device's **dsc_dpcd** capabilities, the **peak_pixel_rate** of the transferred stream(s) and whether the output format **is_rgb_yuv444** or yuv422/yuv420. Note that **peak_pixel_rate** is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile's slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count):: @peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_count **Return** The maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.h](h)}(h**Parameters**h]j )}(hjCh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMR hj=ubjU )}(hhh](jZ )}(hR``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC sink's capabilities from DPCD h](j` )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jf )}(hjbh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMO hj\ubj| )}(hhh]h)}(h!DSC sink's capabilities from DPCDh]h#DSC sink’s capabilities from DPCD}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMO hjxubah}(h]h ]h"]h$]h&]uh1j{ hj\ubeh}(h]h ]h"]h$]h&]uh1jY hjwhMO hjYubjZ )}(h:``int peak_pixel_rate`` Cumulative peak pixel rate in kHz h](j` )}(h``int peak_pixel_rate``h]jf )}(hjh]hint peak_pixel_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMP hjubj| )}(hhh]h)}(h!Cumulative peak pixel rate in kHzh]h!Cumulative peak pixel rate in kHz}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMP hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMP hjYubjZ )}(h8``bool is_rgb_yuv444`` The mode is either RGB or YUV444 h](j` )}(h``bool is_rgb_yuv444``h]jf )}(hjh]hbool is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMQ hjubj| )}(hhh]h)}(h The mode is either RGB or YUV444h]h The mode is either RGB or YUV444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQ hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMQ hjYubeh}(h]h ]h"]h$]h&]uh1jT hj=ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMS hj=ubh)}(hReturn the DSC sink device's maximum pixel throughput per slice, based on the device's **dsc_dpcd** capabilities, the **peak_pixel_rate** of the transferred stream(s) and whether the output format **is_rgb_yuv444** or yuv422/yuv420.h](h[Return the DSC sink device’s maximum pixel throughput per slice, based on the device’s }(hj%hhhNhNubj )}(h **dsc_dpcd**h]hdsc_dpcd}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubh capabilities, the }(hj%hhhNhNubj )}(h**peak_pixel_rate**h]hpeak_pixel_rate}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubh< of the transferred stream(s) and whether the output format }(hj%hhhNhNubj )}(h**is_rgb_yuv444**h]h is_rgb_yuv444}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubh or yuv422/yuv420.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMR hj=ubh)}(hNote that **peak_pixel_rate** is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile's slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count)::h](h Note that }(hjjhhhNhNubj )}(h**peak_pixel_rate**h]hpeak_pixel_rate}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubh is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile’s slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count):}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMV hj=ubj, )}(h@peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_counth]h@peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_count}hjsbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM[ hj=ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hj=ubh)}(hWThe maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.h]hWThe maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM` hj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5drm_dp_dsc_branch_max_overall_throughput (C function)*c.drm_dp_dsc_branch_max_overall_throughputhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hsint drm_dp_dsc_branch_max_overall_throughput (const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h]j )}(hrint drm_dp_dsc_branch_max_overall_throughput(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h(drm_dp_dsc_branch_max_overall_throughputh]j )}(h(drm_dp_dsc_branch_max_overall_throughputh]h(drm_dp_dsc_branch_max_overall_throughput}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hF(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h](j)}(h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]j)}jjsb*c.drm_dp_dsc_branch_max_overall_throughputasbuh1hhjubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_branch_dpcdh]hdsc_branch_dpcd}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_DSC_BRANCH_CAP_SIZEh]hDP_DSC_BRANCH_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jX*c.drm_dp_dsc_branch_max_overall_throughputasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hbool is_rgb_yuv444h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h is_rgb_yuv444h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h0Branch device's max overall DSC pixel throughputh]h2Branch device’s max overall DSC pixel throughput}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD ``bool is_rgb_yuv444`` The mode is either RGB or YUV444 **Description** Return the branch device's maximum overall DSC pixel throughput, based on the device's DPCD DSC branch capabilities, and whether the output format **is_rgb_yuv444** or yuv422/yuv420. **Return** - 0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device. - > 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h](h)}(h**Parameters**h]j )}(hj%h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh](jZ )}(hW``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD h](j` )}(h4``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]``h]jf )}(hjDh]h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj>ubj| )}(hhh]h)}(h!DSC branch capabilities from DPCDh]h!DSC branch capabilities from DPCD}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhM hjZubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hjYhM hj;ubjZ )}(h8``bool is_rgb_yuv444`` The mode is either RGB or YUV444 h](j` )}(h``bool is_rgb_yuv444``h]jf )}(hj}h]hbool is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjwubj| )}(hhh]h)}(h The mode is either RGB or YUV444h]h The mode is either RGB or YUV444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj;ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hReturn the branch device's maximum overall DSC pixel throughput, based on the device's DPCD DSC branch capabilities, and whether the output format **is_rgb_yuv444** or yuv422/yuv420.h](hReturn the branch device’s maximum overall DSC pixel throughput, based on the device’s DPCD DSC branch capabilities, and whether the output format }(hjhhhNhNubj )}(h**is_rgb_yuv444**h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh or yuv422/yuv420.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hhh](h)}(hX 0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h]jU )}(hhh]jZ )}(h0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h](j` )}(hB0: The maximum overall throughput capability is not indicated byh]hB0: The maximum overall throughput capability is not indicated by}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hthe device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h](hWthe device separately and it must be determined from the per-slice max throughput (see }(hj'hhhNhNubj )}(h.**drm_dp_dsc_branch_slice_max_throughput\(\)**h]h*drm_dp_dsc_branch_slice_max_throughput()}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubh6) and the maximum slice count supported by the device.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj$ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj#hM hjubah}(h]h ]h"]h$]h&]uh1jT hj ubah}(h]h ]h"]h$]h&]uh1hhjubh)}(ha> 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h]jU )}(hhh]jZ )}(h\> 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h](j` )}(hE> 0: The maximum overall DSC pixel throughput supported by the branchh]hE> 0: The maximum overall DSC pixel throughput supported by the branch}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjgubj| )}(hhh]h)}(hdevice in kPixels/sec.h]hdevice in kPixels/sec.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjzubah}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjyhM hjdubah}(h]h ]h"]h$]h&]uh1jT hj`ubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNj<uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_dsc_branch_max_line_width (C function)"c.drm_dp_dsc_branch_max_line_widthhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hWint drm_dp_dsc_branch_max_line_width (const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h]j )}(hVint drm_dp_dsc_branch_max_line_width(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h drm_dp_dsc_branch_max_line_widthh]j )}(h drm_dp_dsc_branch_max_line_widthh]h drm_dp_dsc_branch_max_line_width}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h2(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h]j)}(h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j)}jjsb"c.drm_dp_dsc_branch_max_line_widthasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_branch_dpcdh]hdsc_branch_dpcd}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjbhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_DSC_BRANCH_CAP_SIZEh]hDP_DSC_BRANCH_CAP_SIZE}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]jB"c.drm_dp_dsc_branch_max_line_widthasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h"Branch device's max DSC line widthh]h$Branch device’s max DSC line width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hXL**Parameters** ``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD **Description** Return the branch device's maximum overall DSC line width, based on the device's **dsc_branch_dpcd** capabilities. **Return** - 0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device. - ``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels). - >= 5120: The maximum line width in pixels.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(hW``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD h](j` )}(h4``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]``h]jf )}(hjh]h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(h!DSC branch capabilities from DPCDh]h!DSC branch capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj5h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hrReturn the branch device's maximum overall DSC line width, based on the device's **dsc_branch_dpcd** capabilities.h](hUReturn the branch device’s maximum overall DSC line width, based on the device’s }(hjKhhhNhNubj )}(h**dsc_branch_dpcd**h]hdsc_branch_dpcd}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubh capabilities.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h **Return**h]j )}(hjnh]hReturn}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hhh](h)}(h0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device.h]jU )}(hhh]jZ )}(h0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device.h](j` )}(h?0: The maximum line width is not indicated by the deviceh]h?0: The maximum line width is not indicated by the device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hjseparately and it must be determined from the maximum slice count and slice-width supported by the device.h]hjseparately and it must be determined from the maximum slice count and slice-width supported by the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubah}(h]h ]h"]h$]h&]uh1jT hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hZ``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels).h]jU )}(hhh]jZ )}(hP``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels).h](j` )}(h?``-EINVAL``: The device indicates an invalid maximum line widthh](jf )}(h ``-EINVAL``h]h-EINVAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh4: The device indicates an invalid maximum line width}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(h(< 5120 pixels).h]h(< 5120 pixels).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubah}(h]h ]h"]h$]h&]uh1jT hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h+>= 5120: The maximum line width in pixels.h]h)}(hjh]h+>= 5120: The maximum line width in pixels.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNj<uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_dp_read_lttpr_common_caps (C function)c.drm_dp_read_lttpr_common_capshNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hint drm_dp_read_lttpr_common_caps (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(hint drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhhjihM ubj )}(hdrm_dp_read_lttpr_common_capsh]j )}(hdrm_dp_read_lttpr_common_capsh]hdrm_dp_read_lttpr_common_caps}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ](j j eh"]h$]h&]j j uh1j hjWhhhjihM ubj)}(h`(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj~sbc.drm_dp_read_lttpr_common_capsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjbhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjWhhhjihM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjihM ubah}(h]jNah ](j j eh"]h$]h&]j j )j huh1j{ hjihM hjPhhubj )}(hhh]h)}(h"read the LTTPR common capabilitiesh]h"read the LTTPR common capabilities}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj9hhubah}(h]h ]h"]h$]h&]uh1j hjPhhhjihM ubeh}(h]h ](j functioneh"]h$]h&]j j j jTj jTj j j uh1jv hhhj5hNhNubj )}(hXT**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` buffer to return the capability info in **Description** Read capabilities common to all LTTPRs. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj^h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj}h]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjwubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjtubjZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjtubjZ )}(hN``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` buffer to return the capability info in h](j` )}(h%``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jf )}(hjh]h!u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(h'buffer to return the capability info inh]h'buffer to return the capability info in}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjtubeh}(h]h ]h"]h$]h&]uh1jT hjXubh)}(h**Description**h]j )}(hj*h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubh)}(h'Read capabilities common to all LTTPRs.h]h'Read capabilities common to all LTTPRs.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_read_lttpr_phy_caps (C function)c.drm_dp_read_lttpr_phy_capshNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hint drm_dp_read_lttpr_phy_caps (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j )}(hint drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzhhhjhM ubj )}(hdrm_dp_read_lttpr_phy_capsh]j )}(hdrm_dp_read_lttpr_phy_capsh]hdrm_dp_read_lttpr_phy_caps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjzhhhjhM ubj)}(hu(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_read_lttpr_phy_capsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(hu8h]hu8}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_phy_capsasbuh1hhj)ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(hdpcdh]hdpcd}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj)ubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_phy_capsasbuh1hhj)ubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(henum drm_dp_phy dp_phyh](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_phyh]h drm_dp_phy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_phy_capsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdp_phyh]hdp_phy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 caps[DP_LTTPR_PHY_CAP_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_phy_capsasbuh1hhj*ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(hcapsh]hcaps}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hjHh]h[}(hjkhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*ubh)}(hhh]j )}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_phy_capsasbuh1hhj*ubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjzhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjvhhhjhM ubah}(h]jqah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjshhubj )}(hhh]h)}(h+read the capabilities for a given LTTPR PHYh]h+read the capabilities for a given LTTPR PHY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjshhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``enum drm_dp_phy dp_phy`` LTTPR PHY to read the capabilities for ``u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` buffer to return the capability info in **Description** Read the capabilities for the given LTTPR PHY. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hj<h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj6ubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhM hjRubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hjQhM hjubjZ )}(hB``enum drm_dp_phy dp_phy`` LTTPR PHY to read the capabilities for h](j` )}(h``enum drm_dp_phy dp_phy``h]jf )}(hjuh]henum drm_dp_phy dp_phy}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjoubj| )}(hhh]h)}(h<TPR PHY to read the capabilities forh]h<TPR PHY to read the capabilities for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjoubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(hK``u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` buffer to return the capability info in h](j` )}(h"``u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]jf )}(hjh]hu8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(h'buffer to return the capability info inh]h'buffer to return the capability info in}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h.Read the capabilities for the given LTTPR PHY.h]h.Read the capabilities for the given LTTPR PHY.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_lttpr_count (C function)c.drm_dp_lttpr_counthNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h@int drm_dp_lttpr_count (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(h?int drm_dp_lttpr_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9hhhjKhM ubj )}(hdrm_dp_lttpr_counth]j )}(hdrm_dp_lttpr_counth]hdrm_dp_lttpr_count}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ](j j eh"]h$]h&]j j uh1j hj9hhhjKhM ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j )}(hjAh]hconst}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj`sbc.drm_dp_lttpr_countasbuh1hhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjvubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_lttpr_countasbuh1hhjvubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjrubah}(h]h ]h"]h$]h&]j j uh1jhj9hhhjKhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5hhhjKhM ubah}(h]j0ah ](j j eh"]h$]h&]j j )j huh1j{ hjKhM hj2hhubj )}(hhh]h)}(h!get the number of detected LTTPRsh]h!get the number of detected LTTPRs}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj(hhubah}(h]h ]h"]h$]h&]uh1j hj2hhhjKhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jCj jCj j j uh1jv hhhj5hNhNubj )}(hXp**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Get the number of detected LTTPRs from the LTTPR common capabilities info. **Return** -ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRsh](h)}(h**Parameters**h]j )}(hjMh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM# hjGubjU )}(hhh]jZ )}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](j` )}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jf )}(hjlh]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjfubj| )}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjfubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjcubah}(h]h ]h"]h$]h&]uh1jT hjGubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM" hjGubh)}(hJGet the number of detected LTTPRs from the LTTPR common capabilities info.h]hJGet the number of detected LTTPRs from the LTTPR common capabilities info.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM! hjGubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM# hjGubh)}(h-ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRsh]h-ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM$ hjGubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_lttpr_max_link_rate (C function)c.drm_dp_lttpr_max_link_ratehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hHint drm_dp_lttpr_max_link_rate (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(hGint drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM; ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj!hM; ubj )}(hdrm_dp_lttpr_max_link_rateh]j )}(hdrm_dp_lttpr_max_link_rateh]hdrm_dp_lttpr_max_link_rate}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj!hM; ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j )}(hjAh]hconst}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hu8h]hu8}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]j)}jj6sbc.drm_dp_lttpr_max_link_rateasbuh1hhjLubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjLubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_lttpr_max_link_rateasbuh1hhjLubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj!hM; ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj!hM; ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj!hM; hjhhubj )}(hhh]h)}(h1get the maximum link rate supported by all LTTPRsh]h1get the maximum link rate supported by all LTTPRs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM; hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj!hM; ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Returns the maximum link rate supported by all detected LTTPRs.h](h)}(h**Parameters**h]j )}(hj#h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM? hjubjU )}(hhh]jZ )}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](j` )}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jf )}(hjBh]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM< hj<ubj| )}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhM< hjXubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hjWhM< hj9ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj}h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM> hjubh)}(h?Returns the maximum link rate supported by all detected LTTPRs.h]h?Returns the maximum link rate supported by all detected LTTPRs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM= hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_dp_lttpr_set_transparent_mode (C function)#c.drm_dp_lttpr_set_transparent_modehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hKint drm_dp_lttpr_set_transparent_mode (struct drm_dp_aux *aux, bool enable)h]j )}(hJint drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMI ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMI ubj )}(h!drm_dp_lttpr_set_transparent_modeh]j )}(h!drm_dp_lttpr_set_transparent_modeh]h!drm_dp_lttpr_set_transparent_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMI ubj)}(h%(struct drm_dp_aux *aux, bool enable)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb#c.drm_dp_lttpr_set_transparent_modeasbuh1hhjubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjKhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool enableh](j)}(hjIh]hbool}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(henableh]henable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMI ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMI ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMI hjhhubj )}(hhh]h)}(h!set the LTTPR in transparent modeh]h!set the LTTPR in transparent mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMI hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMI ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable`` Enable or disable transparent mode **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMM hjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMJ hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMJ hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMJ hjubjZ )}(h3``bool enable`` Enable or disable transparent mode h](j` )}(h``bool enable``h]jf )}(hj0h]h bool enable}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMK hj*ubj| )}(hhh]h)}(h"Enable or disable transparent modeh]h"Enable or disable transparent mode}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMK hjFubah}(h]h ]h"]h$]h&]uh1j{ hj*ubeh}(h]h ]h"]h$]h&]uh1jY hjEhMK hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjkh]hReturn}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMM hjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_lttpr_init (C function)c.drm_dp_lttpr_inithNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h?int drm_dp_lttpr_init (struct drm_dp_aux *aux, int lttpr_count)h]j )}(h>int drm_dp_lttpr_init(struct drm_dp_aux *aux, int lttpr_count)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM] ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM] ubj )}(hdrm_dp_lttpr_inith]j )}(hdrm_dp_lttpr_inith]hdrm_dp_lttpr_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM] ubj)}(h)(struct drm_dp_aux *aux, int lttpr_count)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_lttpr_initasbuh1hhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj9hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint lttpr_counth](j)}(hinth]hint}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h lttpr_counth]h lttpr_count}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM] ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM] ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM] hjhhubj )}(hhh]h)}(h5init LTTPR transparency mode according to DP standardh]h5init LTTPR transparency mode according to DP standard}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM] hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM] ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX#**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int lttpr_count`` Number of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMa hjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM^ hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM^ hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM^ hjubjZ )}(h``int lttpr_count`` Number of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count(). h](j` )}(h``int lttpr_count``h]jf )}(hjh]hint lttpr_count}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMa hjubj| )}(hhh]h)}(hNumber of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count().h]hNumber of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count().}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hj5ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj4hMa hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hj[h]hReturn}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_lttpr_max_lane_count (C function)c.drm_dp_lttpr_max_lane_counthNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hIint drm_dp_lttpr_max_lane_count (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(hHint drm_dp_lttpr_max_lane_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_lttpr_max_lane_counth]j )}(hdrm_dp_lttpr_max_lane_counth]hdrm_dp_lttpr_max_lane_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_lttpr_max_lane_countasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jc.drm_dp_lttpr_max_lane_countasbuh1hhjubj)}(hjIh]h]}(hjehhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h2get the maximum lane count supported by all LTTPRsh]h2get the maximum lane count supported by all LTTPRs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Returns the maximum lane count supported by all detected LTTPRs.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](j` )}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jf )}(hjh]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h@Returns the maximum lane count supported by all detected LTTPRs.h]h@Returns the maximum lane count supported by all detected LTTPRs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 9drm_dp_lttpr_voltage_swing_level_3_supported (C function).c.drm_dp_lttpr_voltage_swing_level_3_supportedhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hXbool drm_dp_lttpr_voltage_swing_level_3_supported (const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j )}(hWbool drm_dp_lttpr_voltage_swing_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hjIh]hbool}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKhhhj\hM ubj )}(h,drm_dp_lttpr_voltage_swing_level_3_supportedh]j )}(h,drm_dp_lttpr_voltage_swing_level_3_supportedh]h,drm_dp_lttpr_voltage_swing_level_3_supported}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ](j j eh"]h$]h&]j j uh1j hjKhhhj\hM ubj)}(h&(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjqsb.c.drm_dp_lttpr_voltage_swing_level_3_supportedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j.c.drm_dp_lttpr_voltage_swing_level_3_supportedasbuh1hhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjKhhhj\hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhj\hM ubah}(h]jBah ](j j eh"]h$]h&]j j )j huh1j{ hj\hM hjDhhubj )}(hhh]h)}(hcheck for LTTPR vswing3 supporth]hcheck for LTTPR vswing3 support}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj9hhubah}(h]h ]h"]h$]h&]uh1j hjDhhhj\hM ubeh}(h]h ](j functioneh"]h$]h&]j j j jTj jTj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities **Description** Returns true if the **caps** for an LTTPR TX PHY indicate support for voltage swing level 3.h](h)}(h**Parameters**h]j )}(hj^h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubjU )}(hhh]jZ )}(h@``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities h](j` )}(h(``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]jf )}(hj}h]h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjwubj| )}(hhh]h)}(hLTTPR PHY capabilitiesh]hLTTPR PHY capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjtubah}(h]h ]h"]h$]h&]uh1jT hjXubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubh)}(h\Returns true if the **caps** for an LTTPR TX PHY indicate support for voltage swing level 3.h](hReturns true if the }(hjhhhNhNubj )}(h**caps**h]hcaps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh@ for an LTTPR TX PHY indicate support for voltage swing level 3.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 8drm_dp_lttpr_pre_emphasis_level_3_supported (C function)-c.drm_dp_lttpr_pre_emphasis_level_3_supportedhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hWbool drm_dp_lttpr_pre_emphasis_level_3_supported (const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j )}(hVbool drm_dp_lttpr_pre_emphasis_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhM ubj )}(h+drm_dp_lttpr_pre_emphasis_level_3_supportedh]j )}(h+drm_dp_lttpr_pre_emphasis_level_3_supportedh]h+drm_dp_lttpr_pre_emphasis_level_3_supported}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhM ubj)}(h&(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]h](j )}(hjAh]hconst}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hu8h]hu8}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j)}jj1sb-c.drm_dp_lttpr_pre_emphasis_level_3_supportedasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubh)}(hhh]j )}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j-c.drm_dp_lttpr_pre_emphasis_level_3_supportedasbuh1hhjGubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubah}(h]h ]h"]h$]h&]j j uh1jhj hhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h check for LTTPR preemph3 supporth]h check for LTTPR preemph3 support}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities **Description** Returns true if the **caps** for an LTTPR TX PHY indicate support for pre-emphasis level 3.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh]jZ )}(h@``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities h](j` )}(h(``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]jf )}(hj=h]h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj7ubj| )}(hhh]h)}(hLTTPR PHY capabilitiesh]hLTTPR PHY capabilities}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhM hjSubah}(h]h ]h"]h$]h&]uh1j{ hj7ubeh}(h]h ]h"]h$]h&]uh1jY hjRhM hj4ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjxh]h Description}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h[Returns true if the **caps** for an LTTPR TX PHY indicate support for pre-emphasis level 3.h](hReturns true if the }(hjhhhNhNubj )}(h**caps**h]hcaps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh? for an LTTPR TX PHY indicate support for pre-emphasis level 3.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_get_phy_test_pattern (C function)c.drm_dp_get_phy_test_patternhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h]int drm_dp_get_phy_test_pattern (struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h]j )}(h\int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_get_phy_test_patternh]j )}(hdrm_dp_get_phy_test_patternh]hdrm_dp_get_phy_test_pattern}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h=(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_get_phy_test_patternasbuh1hhjubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjXhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_phy_test_params *datah](j )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubh)}(hhh]j )}(hdrm_dp_phy_test_paramsh]hdrm_dp_phy_test_params}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jFc.drm_dp_get_phy_test_patternasbuh1hhjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjzubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h(get the requested pattern from the sink.h]h(get the requested pattern from the sink.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj! h]h Parameters}(hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj@ h]hstruct drm_dp_aux *aux}(hjB hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj> ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj: ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjY hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU hM hjV ubah}(h]h ]h"]h$]h&]uh1j{ hj: ubeh}(h]h ]h"]h$]h&]uh1jY hjU hM hj7 ubjZ )}(hK``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. h](j` )}(h'``struct drm_dp_phy_test_params *data``h]jf )}(hjy h]h#struct drm_dp_phy_test_params *data}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjw ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjs ubj| )}(hhh]h)}(h"DP phy compliance test parameters.h]h"DP phy compliance test parameters.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j{ hjs ubeh}(h]h ]h"]h$]h&]uh1jY hj hM hj7 ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_set_phy_test_pattern (C function)c.drm_dp_set_phy_test_patternhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hhint drm_dp_set_phy_test_pattern (struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data, u8 dp_rev)h]j )}(hgint drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data, u8 dp_rev)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hM ubj )}(hdrm_dp_set_phy_test_patternh]j )}(hdrm_dp_set_phy_test_patternh]hdrm_dp_set_phy_test_pattern}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hM ubj)}(hH(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data, u8 dp_rev)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj6 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2 ubj )}(h h]h }(hjC hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2 ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjT hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjV modnameN classnameNj j )}j ]j)}jj sbc.drm_dp_set_phy_test_patternasbuh1hhj2 ubj )}(h h]h }(hjt hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2 ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj2 ubj )}(hauxh]haux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2 ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj. ubj)}(h#struct drm_dp_phy_test_params *datah](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_phy_test_paramsh]hdrm_dp_phy_test_params}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jp c.drm_dp_set_phy_test_patternasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hdatah]hdata}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj. ubj)}(h u8 dp_revh](h)}(hhh]j )}(hu8h]hu8}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jp c.drm_dp_set_phy_test_patternasbuh1hhj ubj )}(h h]h }(hj9 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hdp_revh]hdp_rev}(hjG hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj. ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hM ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hM hj hhubj )}(hhh]h)}(hset the pattern to the sink.h]hset the pattern to the sink.}(hjq hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjn hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hM ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. ``u8 dp_rev`` DP revision to use for compliance testing **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj h]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hM hj ubjZ )}(hK``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. h](j` )}(h'``struct drm_dp_phy_test_params *data``h]jf )}(hj h]h#struct drm_dp_phy_test_params *data}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj| )}(hhh]h)}(h"DP phy compliance test parameters.h]h"DP phy compliance test parameters.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hM hj ubjZ )}(h8``u8 dp_rev`` DP revision to use for compliance testing h](j` )}(h ``u8 dp_rev``h]jf )}(hj$ h]h u8 dp_rev}(hj& hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj" ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj| )}(hhh]h)}(h)DP revision to use for compliance testingh]h)DP revision to use for compliance testing}(hj= hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9 hM hj: ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj9 hM hj ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj_ h]h Description}(hja hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj] ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hju hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_as_sdp_supported (C function)c.drm_dp_as_sdp_supportedhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hZbool drm_dp_as_sdp_supported (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j )}(hYbool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hjIh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hM ubj )}(hdrm_dp_as_sdp_supportedh]j )}(hdrm_dp_as_sdp_supportedh]hdrm_dp_as_sdp_supported}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hM ubj)}(h=(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jj sbc.drm_dp_as_sdp_supportedasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj, hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hauxh]haux}(hj9 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjR hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN ubj )}(h h]h }(hj_ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN ubh)}(hhh]j )}(hu8h]hu8}(hjp hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjm ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjr modnameN classnameNj j )}j ]j c.drm_dp_as_sdp_supportedasbuh1hhjN ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN ubj )}(hdpcdh]hdpcd}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN ubj)}(hjHh]h[}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjN ubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j c.drm_dp_as_sdp_supportedasbuh1hhjN ubj)}(hjIh]h]}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjN ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hM ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hM hj hhubj )}(hhh]h)}(h'check if adaptive sync sdp is supportedh]h'check if adaptive sync sdp is supported}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data **Description** Returns true if adaptive sync sdp is supported, else returns falseh](h)}(h**Parameters**h]j )}(hj#h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjBh]hstruct drm_dp_aux *aux}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj<ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhM hjXubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hjWhM hj9ubjZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hj{h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjuubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjuubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj9ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hBReturns true if adaptive sync sdp is supported, else returns falseh]hBReturns true if adaptive sync sdp is supported, else returns false}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dp_vsc_sdp_supported (C function)c.drm_dp_vsc_sdp_supportedhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h[bool drm_dp_vsc_sdp_supported (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j )}(hZbool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_vsc_sdp_supportedh]j )}(hdrm_dp_vsc_sdp_supportedh]hdrm_dp_vsc_sdp_supported}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h=(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_vsc_sdp_supportedasbuh1hhj3ubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jqc.drm_dp_vsc_sdp_supportedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jqc.drm_dp_vsc_sdp_supportedasbuh1hhjubj)}(hjIh]h]}(hj/hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(hcheck if vsc sdp is supportedh]hcheck if vsc sdp is supported}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjUhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jpj jpj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data **Description** Returns true if vsc sdp is supported, else returns falseh](h)}(h**Parameters**h]j )}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjtubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjtubh)}(h**Description**h]j )}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjtubh)}(h8Returns true if vsc sdp is supported, else returns falseh]h8Returns true if vsc sdp is supported, else returns false}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hjtubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_vsc_sdp_pack (C function)c.drm_dp_vsc_sdp_packhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hRssize_t drm_dp_vsc_sdp_pack (const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h]j )}(hQssize_t drm_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]j)}jdrm_dp_vsc_sdp_packsbc.drm_dp_vsc_sdp_packasbuh1hhjNhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhjvhMubj )}(hdrm_dp_vsc_sdp_packh]j )}(hjsh]hdrm_dp_vsc_sdp_pack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhjvhMubj)}(h6(const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h](j)}(h const struct drm_dp_vsc_sdp *vsch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_vsc_sdph]hdrm_dp_vsc_sdp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jqc.drm_dp_vsc_sdp_packasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hvsch]hvsc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct dp_sdp *sdph](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubh)}(hhh]j )}(hdp_sdph]hdp_sdp}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]jqc.drm_dp_vsc_sdp_packasbuh1hhj+ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj+ubj )}(hsdph]hsdp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjNhhhjvhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhjvhMubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j{ hjvhMhjGhhubj )}(hhh]h)}(h(pack a given vsc sdp into generic dp_sdph]h(pack a given vsc sdp into generic dp_sdp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhjvhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hXE**Parameters** ``const struct drm_dp_vsc_sdp *vsc`` vsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification ``struct dp_sdp *sdp`` valid handle to the generic dp_sdp which will be packed **Description** Returns length of sdp on success and error code on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(h``const struct drm_dp_vsc_sdp *vsc`` vsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification h](j` )}(h$``const struct drm_dp_vsc_sdp *vsc``h]jf )}(hjh]h const struct drm_dp_vsc_sdp *vsc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hmvsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specificationh]hmvsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hO``struct dp_sdp *sdp`` valid handle to the generic dp_sdp which will be packed h](j` )}(h``struct dp_sdp *sdp``h]jf )}(hj+h]hstruct dp_sdp *sdp}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%ubj| )}(hhh]h)}(h7valid handle to the generic dp_sdp which will be packedh]h7valid handle to the generic dp_sdp which will be packed}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhjAubah}(h]h ]h"]h$]h&]uh1j{ hj%ubeh}(h]h ]h"]h$]h&]uh1jY hj@hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjfh]h Description}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h:Returns length of sdp on success and error code on failureh]h:Returns length of sdp on success and error code on failure}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_get_pcon_max_frl_bw (C function)c.drm_dp_get_pcon_max_frl_bwhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hZint drm_dp_get_pcon_max_frl_bw (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(hYint drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM\ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM\ubj )}(hdrm_dp_get_pcon_max_frl_bwh]j )}(hdrm_dp_get_pcon_max_frl_bwh]hdrm_dp_get_pcon_max_frl_bw}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM\ubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_get_pcon_max_frl_bwasbuh1hhjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjBhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]j"c.drm_dp_get_pcon_max_frl_bwasbuh1hhjubj)}(hjIh]h]}(hjphhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_get_pcon_max_frl_bwasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjHh]h[}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubjՕ)}(hjؕh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjubj)}(hjIh]h]}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM\ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM\ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM\hjhhubj )}(hhh]h)}(hmaximum frl supported by PCONh]hmaximum frl supported by PCON}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM\hj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM\ubeh}(h]h ](j functioneh"]h$]h&]j j j j;j j;j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Description** Returns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.h](h)}(h**Parameters**h]j )}(hjEh]h Parameters}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM`hj?ubjU )}(hhh](jZ )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hjdh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjbubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM]hj^ubj| )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhM]hjzubah}(h]h ]h"]h$]h&]uh1j{ hj^ubeh}(h]h ]h"]h$]h&]uh1jY hjyhM]hj[ubjZ )}(h+``const u8 port_cap[4]`` port capabilities h](j` )}(h``const u8 port_cap[4]``h]jf )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM^hjubj| )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM^hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM^hj[ubeh}(h]h ]h"]h$]h&]uh1jT hj?ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM`hj?ubh)}(hTReturns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.h]hTReturns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_hj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_pcon_frl_prepare (C function)c.drm_dp_pcon_frl_preparehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hOint drm_dp_pcon_frl_prepare (struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h]j )}(hNint drm_dp_pcon_frl_prepare(struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hMubj )}(hdrm_dp_pcon_frl_prepareh]j )}(hdrm_dp_pcon_frl_prepareh]hdrm_dp_pcon_frl_prepare}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj+hMubj)}(h3(struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j)}jj@sbc.drm_dp_pcon_frl_prepareasbuh1hhjVubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjVubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjRubj)}(hbool enable_frl_ready_hpdh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(henable_frl_ready_hpdh]henable_frl_ready_hpd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjRubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj+hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj+hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj+hMhjhhubj )}(hhh]h)}(hPrepare PCON for FRL.h]hPrepare PCON for FRL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj+hMubeh}(h]h ](j functioneh"]h$]h&]j j j j)j j)j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable_frl_ready_hpd`` Configure DP_PCON_ENABLE_HPD_READY. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hj3h]h Parameters}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjRh]hstruct drm_dp_aux *aux}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghMhjhubah}(h]h ]h"]h$]h&]uh1j{ hjLubeh}(h]h ]h"]h$]h&]uh1jY hjghMhjIubjZ )}(hB``bool enable_frl_ready_hpd`` Configure DP_PCON_ENABLE_HPD_READY. h](j` )}(h``bool enable_frl_ready_hpd``h]jf )}(hjh]hbool enable_frl_ready_hpd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h#Configure DP_PCON_ENABLE_HPD_READY.h]h#Configure DP_PCON_ENABLE_HPD_READY.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjIubeh}(h]h ]h"]h$]h&]uh1jT hj-ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dp_pcon_is_frl_ready (C function)c.drm_dp_pcon_is_frl_readyhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h6bool drm_dp_pcon_is_frl_ready (struct drm_dp_aux *aux)h]j )}(h5bool drm_dp_pcon_is_frl_ready(struct drm_dp_aux *aux)h](j)}(hjIh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_pcon_is_frl_readyh]j )}(hdrm_dp_pcon_is_frl_readyh]hdrm_dp_pcon_is_frl_ready}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]j)}jj-sbc.drm_dp_pcon_is_frl_readyasbuh1hhjCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjCubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hIs PCON ready for FRLh]hIs PCON ready for FRL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns true if success, else returns false.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj h]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj!ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h,Returns true if success, else returns false.h]h,Returns true if success, else returns false.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_pcon_frl_configure_1 (C function)c.drm_dp_pcon_frl_configure_1hNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hWint drm_dp_pcon_frl_configure_1 (struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h]j )}(hVint drm_dp_pcon_frl_configure_1(struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_pcon_frl_configure_1h]j )}(hdrm_dp_pcon_frl_configure_1h]hdrm_dp_pcon_frl_configure_1}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h7(struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_pcon_frl_configure_1asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint max_frl_gbpsh](j)}(hinth]hint}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h max_frl_gbpsh]h max_frl_gbps}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u8 frl_modeh](h)}(hhh]j )}(hu8h]hu8}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]jc.drm_dp_pcon_frl_configure_1asbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(hfrl_modeh]hfrl_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h!Set HDMI LINK Configuration-Step1h]h!Set HDMI LINK Configuration-Step1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int max_frl_gbps`` maximum frl bw to be configured between PCON and HDMI sink ``u8 frl_mode`` FRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj h]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hP``int max_frl_gbps`` maximum frl bw to be configured between PCON and HDMI sink h](j` )}(h``int max_frl_gbps``h]jf )}(hjBh]hint max_frl_gbps}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj<ubj| )}(hhh]h)}(h:maximum frl bw to be configured between PCON and HDMI sinkh]h:maximum frl bw to be configured between PCON and HDMI sink}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMhjXubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hjWhMhjubjZ )}(h``u8 frl_mode`` FRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training. h](j` )}(h``u8 frl_mode``h]jf )}(hj{h]h u8 frl_mode}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjuubj| )}(hhh]h)}(hFRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training.h]hFRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjuubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_pcon_frl_configure_2 (C function)c.drm_dp_pcon_frl_configure_2hNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hWint drm_dp_pcon_frl_configure_2 (struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h]j )}(hVint drm_dp_pcon_frl_configure_2(struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_dp_pcon_frl_configure_2h]j )}(hdrm_dp_pcon_frl_configure_2h]hdrm_dp_pcon_frl_configure_2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h7(struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_pcon_frl_configure_2asbuh1hhj5ubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj5ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(hint max_frl_maskh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h max_frl_maskh]h max_frl_mask}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(h u8 frl_typeh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jsc.drm_dp_pcon_frl_configure_2asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hfrl_typeh]hfrl_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(h"Set HDMI Link configuration Step-2h]h"Set HDMI Link configuration Step-2}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j jQj jQj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int max_frl_mask`` Max FRL BW to be tried by the PCON with HDMI Sink ``u8 frl_type`` FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hj[h]h Parameters}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjUubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjzh]hstruct drm_dp_aux *aux}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjxubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjtubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjtubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjqubjZ )}(hG``int max_frl_mask`` Max FRL BW to be tried by the PCON with HDMI Sink h](j` )}(h``int max_frl_mask``h]jf )}(hjh]hint max_frl_mask}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(h1Max FRL BW to be tried by the PCON with HDMI Sinkh]h1Max FRL BW to be tried by the PCON with HDMI Sink}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjqubjZ )}(hX``u8 frl_type`` FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON. h](j` )}(h``u8 frl_type``h]jf )}(hjh]h u8 frl_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj| )}(hhh]h)}(hX FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON.h]hX FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjqubeh}(h]h ]h"]h$]h&]uh1jT hjUubh)}(h**Description**h]j )}(hj(h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjUubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjUubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_pcon_reset_frl_config (C function)c.drm_dp_pcon_reset_frl_confighNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h9int drm_dp_pcon_reset_frl_config (struct drm_dp_aux *aux)h]j )}(h8int drm_dp_pcon_reset_frl_config(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjihhhj{hMubj )}(hdrm_dp_pcon_reset_frl_configh]j )}(hdrm_dp_pcon_reset_frl_configh]hdrm_dp_pcon_reset_frl_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjihhhj{hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_pcon_reset_frl_configasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjihhhj{hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjehhhj{hMubah}(h]j`ah ](j j eh"]h$]h&]j j )j huh1j{ hj{hMhjbhhubj )}(hhh]h)}(hRe-Set HDMI Link configuration.h]hRe-Set HDMI Link configuration.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj*hhubah}(h]h ]h"]h$]h&]uh1j hjbhhhj{hMubeh}(h]h ](j functioneh"]h$]h&]j j j jEj jEj j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hjOh]h Parameters}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjIubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjnh]hstruct drm_dp_aux *aux}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjhubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjeubah}(h]h ]h"]h$]h&]uh1jT hjIubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjIubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjIubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_pcon_frl_enable (C function)c.drm_dp_pcon_frl_enablehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h3int drm_dp_pcon_frl_enable (struct drm_dp_aux *aux)h]j )}(h2int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_pcon_frl_enableh]j )}(hdrm_dp_pcon_frl_enableh]hdrm_dp_pcon_frl_enable}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj+ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj' ubj )}(h h]h }(hj8 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj' ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjI hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjF ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjK modnameN classnameNj j )}j ]j)}jj sbc.drm_dp_pcon_frl_enableasbuh1hhj' ubj )}(h h]h }(hji hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj' ubj)}(hjOh]h*}(hjw hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj' ubj )}(hauxh]haux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj' ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj# ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hEnable HDMI link through FRLh]hEnable HDMI link through FRL}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj h]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj!ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj!hMhj ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj*!h]h Description}(hj,!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(!ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj@!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_pcon_hdmi_link_active (C function)c.drm_dp_pcon_hdmi_link_activehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h:bool drm_dp_pcon_hdmi_link_active (struct drm_dp_aux *aux)h]j )}(h9bool drm_dp_pcon_hdmi_link_active(struct drm_dp_aux *aux)h](j)}(hjIh]hbool}(hjo!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk!hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM3ubj )}(h h]h }(hj}!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk!hhhj|!hM3ubj )}(hdrm_dp_pcon_hdmi_link_activeh]j )}(hdrm_dp_pcon_hdmi_link_activeh]hdrm_dp_pcon_hdmi_link_active}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjk!hhhj|!hM3ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j)}jj!sbc.drm_dp_pcon_hdmi_link_activeasbuh1hhj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(hjOh]h*}(hj!hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!ubj )}(hauxh]haux}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubah}(h]h ]h"]h$]h&]j j uh1jhjk!hhhj|!hM3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjg!hhhj|!hM3ubah}(h]jb!ah ](j j eh"]h$]h&]j j )j huh1j{ hj|!hM3hjd!hhubj )}(hhh]h)}(h-check if the PCON HDMI LINK status is active.h]h-check if the PCON HDMI LINK status is active.}(hj."hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM3hj+"hhubah}(h]h ]h"]h$]h&]uh1j hjd!hhhj|!hM3ubeh}(h]h ](j functioneh"]h$]h&]j j j jF"j jF"j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns true if link is active else returns false.h](h)}(h**Parameters**h]j )}(hjP"h]h Parameters}(hjR"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjN"ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM7hjJ"ubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjo"h]hstruct drm_dp_aux *aux}(hjq"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjm"ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM4hji"ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hM4hj"ubah}(h]h ]h"]h$]h&]uh1j{ hji"ubeh}(h]h ]h"]h$]h&]uh1jY hj"hM4hjf"ubah}(h]h ]h"]h$]h&]uh1jT hjJ"ubh)}(h**Description**h]j )}(hj"h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM6hjJ"ubh)}(h2Returns true if link is active else returns false.h]h2Returns true if link is active else returns false.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM5hjJ"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_pcon_hdmi_link_mode (C function)c.drm_dp_pcon_hdmi_link_modehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hMint drm_dp_pcon_hdmi_link_mode (struct drm_dp_aux *aux, u8 *frl_trained_mask)h]j )}(hLint drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, u8 *frl_trained_mask)h](j)}(hinth]hint}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMFubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj"hMFubj )}(hdrm_dp_pcon_hdmi_link_modeh]j )}(hdrm_dp_pcon_hdmi_link_modeh]hdrm_dp_pcon_hdmi_link_mode}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj #ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhj"hMFubj)}(h.(struct drm_dp_aux *aux, u8 *frl_trained_mask)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj,#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(#ubj )}(h h]h }(hj9#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(#ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjJ#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjL#modnameN classnameNj j )}j ]j)}jj#sbc.drm_dp_pcon_hdmi_link_modeasbuh1hhj(#ubj )}(h h]h }(hjj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(#ubj)}(hjOh]h*}(hjx#hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(#ubj )}(hauxh]haux}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj$#ubj)}(hu8 *frl_trained_maskh](h)}(hhh]j )}(hu8h]hu8}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]jf#c.drm_dp_pcon_hdmi_link_modeasbuh1hhj#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubj )}(hfrl_trained_maskh]hfrl_trained_mask}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj$#ubeh}(h]h ]h"]h$]h&]j j uh1jhj"hhhj"hMFubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"hhhj"hMFubah}(h]j"ah ](j j eh"]h$]h&]j j )j huh1j{ hj"hMFhj"hhubj )}(hhh]h)}(hget the PCON HDMI LINK MODEh]hget the PCON HDMI LINK MODE}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMFhj$hhubah}(h]h ]h"]h$]h&]uh1j hj"hhhj"hMFubeh}(h]h ](j functioneh"]h$]h&]j j j j$j j$j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 *frl_trained_mask`` pointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set. **Description** Returns the link mode : TMDS or FRL on success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hj&$h]h Parameters}(hj($hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMJhj $ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjE$h]hstruct drm_dp_aux *aux}(hjG$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjC$ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMGhj?$ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj^$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZ$hMGhj[$ubah}(h]h ]h"]h$]h&]uh1j{ hj?$ubeh}(h]h ]h"]h$]h&]uh1jY hjZ$hMGhj<$ubjZ )}(h``u8 *frl_trained_mask`` pointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set. h](j` )}(h``u8 *frl_trained_mask``h]jf )}(hj~$h]hu8 *frl_trained_mask}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|$ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMKhjx$ubj| )}(hhh]h)}(hpointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set.h]hpointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMHhj$ubah}(h]h ]h"]h$]h&]uh1j{ hjx$ubeh}(h]h ]h"]h$]h&]uh1jY hj$hMKhj<$ubeh}(h]h ]h"]h$]h&]uh1jT hj $ubh)}(h**Description**h]j )}(hj$h]h Description}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMMhj $ubh)}(hQReturns the link mode : TMDS or FRL on success, else returns negative error code.h]hQReturns the link mode : TMDS or FRL on success, else returns negative error code.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMLhj $ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_dp_pcon_hdmi_frl_link_error_count (C function)'c.drm_dp_pcon_hdmi_frl_link_error_counthNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hdvoid drm_dp_pcon_hdmi_frl_link_error_count (struct drm_dp_aux *aux, struct drm_connector *connector)h]j )}(hcvoid drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMdubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$hhhj %hMdubj )}(h%drm_dp_pcon_hdmi_frl_link_error_counth]j )}(h%drm_dp_pcon_hdmi_frl_link_error_counth]h%drm_dp_pcon_hdmi_frl_link_error_count}(hj %hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj$hhhj %hMdubj)}(h9(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj<%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8%ubj )}(h h]h }(hjI%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8%ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjZ%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjW%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\%modnameN classnameNj j )}j ]j)}jj"%sb'c.drm_dp_pcon_hdmi_frl_link_error_countasbuh1hhj8%ubj )}(h h]h }(hjz%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8%ubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj8%ubj )}(hauxh]haux}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4%ubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%modnameN classnameNj j )}j ]jv%'c.drm_dp_pcon_hdmi_frl_link_error_countasbuh1hhj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(h connectorh]h connector}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4%ubeh}(h]h ]h"]h$]h&]j j uh1jhj$hhhj %hMdubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj$hhhj %hMdubah}(h]j$ah ](j j eh"]h$]h&]j j )j huh1j{ hj %hMdhj$hhubj )}(hhh]h)}(hMprint the error count per lane during link failure between PCON and HDMI sinkh]hMprint the error count per lane during link failure between PCON and HDMI sink}(hj/&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMdhj,&hhubah}(h]h ]h"]h$]h&]uh1j hj$hhhj %hMdubeh}(h]h ](j functioneh"]h$]h&]j j j jG&j jG&j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_connector *connector`` DRM connector code.h](h)}(h**Parameters**h]j )}(hjQ&h]h Parameters}(hjS&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjO&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhhjK&ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjp&h]hstruct drm_dp_aux *aux}(hjr&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjn&ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMfhjj&ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMfhj&ubah}(h]h ]h"]h$]h&]uh1j{ hjj&ubeh}(h]h ]h"]h$]h&]uh1jY hj&hMfhjg&ubjZ )}(h7``struct drm_connector *connector`` DRM connector code.h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj&h]hstruct drm_connector *connector}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMghj&ubj| )}(hhh]h)}(hDRM connector code.h]hDRM connector code.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMghj&ubah}(h]h ]h"]h$]h&]uh1j{ hj&ubeh}(h]h ]h"]h$]h&]uh1jY hj&hMghjg&ubeh}(h]h ]h"]h$]h&]uh1jT hjK&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_pcon_pps_default (C function)c.drm_dp_pcon_pps_defaulthNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h4int drm_dp_pcon_pps_default (struct drm_dp_aux *aux)h]j )}(h3int drm_dp_pcon_pps_default(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&hhhj'hM ubj )}(hdrm_dp_pcon_pps_defaulth]j )}(hdrm_dp_pcon_pps_defaulth]hdrm_dp_pcon_pps_default}(hj#'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&hhhj'hM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj?'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;'ubj )}(h h]h }(hjL'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;'ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj]'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_'modnameN classnameNj j )}j ]j)}jj%'sbc.drm_dp_pcon_pps_defaultasbuh1hhj;'ubj )}(h h]h }(hj}'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;'ubj)}(hjOh]h*}(hj'hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;'ubj )}(hauxh]haux}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7'ubah}(h]h ]h"]h$]h&]j j uh1jhj&hhhj'hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj&hhhj'hM ubah}(h]j&ah ](j j eh"]h$]h&]j j )j huh1j{ hj'hM hj&hhubj )}(hhh]h)}(hOLet PCON fill the default pps parameters for DSC1.2 between PCON & HDMI2.1 sinkh]hOLet PCON fill the default pps parameters for DSC1.2 between PCON & HDMI2.1 sink}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj'hhubah}(h]h ]h"]h$]h&]uh1j hj&hhhj'hM ubeh}(h]h ](j functioneh"]h$]h&]j j j j'j j'j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 on success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hj'h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj'ubjU )}(hhh]jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj(h]hstruct drm_dp_aux *aux}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj'ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hM hj(ubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hj(hM hj'ubah}(h]h ]h"]h$]h&]uh1jT hj'ubh)}(h**Description**h]j )}(hj>(h]h Description}(hj@(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<(ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj'ubh)}(h7Returns 0 on success, else returns negative error code.h]h7Returns 0 on success, else returns negative error code.}(hjT(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_pcon_pps_override_buf (C function)c.drm_dp_pcon_pps_override_bufhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hJint drm_dp_pcon_pps_override_buf (struct drm_dp_aux *aux, u8 pps_buf[128])h]j )}(hIint drm_dp_pcon_pps_override_buf(struct drm_dp_aux *aux, u8 pps_buf[128])h](j)}(hinth]hint}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj(hMubj )}(hdrm_dp_pcon_pps_override_bufh]j )}(hdrm_dp_pcon_pps_override_bufh]hdrm_dp_pcon_pps_override_buf}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj(hMubj)}(h)(struct drm_dp_aux *aux, u8 pps_buf[128])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j)}jj(sbc.drm_dp_pcon_pps_override_bufasbuh1hhj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj)}(hjOh]h*}(hj )hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubj )}(hauxh]haux}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj(ubj)}(hu8 pps_buf[128]h](h)}(hhh]j )}(hu8h]hu8}(hj5)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7)modnameN classnameNj j )}j ]j(c.drm_dp_pcon_pps_override_bufasbuh1hhj.)ubj )}(h h]h }(hjS)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.)ubj )}(hpps_bufh]hpps_buf}(hja)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.)ubj)}(hjHh]h[}(hjo)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.)ubjՕ)}(h128h]h128}(hj|)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhj.)ubj)}(hjIh]h]}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj(ubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhj(hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{(hhhj(hMubah}(h]jv(ah ](j j eh"]h$]h&]j j )j huh1j{ hj(hMhjx(hhubj )}(hhh]h)}(h3Configure PPS encoder override buffer for HDMI sinkh]h3Configure PPS encoder override buffer for HDMI sink}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj)hhubah}(h]h ]h"]h$]h&]uh1j hjx(hhhj(hMubeh}(h]h ](j functioneh"]h$]h&]j j j j)j j)j j j uh1jv hhhj5hNhNubj )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 pps_buf[128]`` 128 bytes to be written into PPS buffer for HDMI sink by PCON. **Description** Returns 0 on success, else returns negative error code.h](h)}(h**Parameters**h]j )}(hj)h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj)ubjU )}(hhh](jZ )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj)h]hstruct drm_dp_aux *aux}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj)ubj| )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj *hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj *hMhj *ubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hj *hMhj)ubjZ )}(hS``u8 pps_buf[128]`` 128 bytes to be written into PPS buffer for HDMI sink by PCON. h](j` )}(h``u8 pps_buf[128]``h]jf )}(hj-*h]hu8 pps_buf[128]}(hj/*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+*ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj'*ubj| )}(hhh]h)}(h>128 bytes to be written into PPS buffer for HDMI sink by PCON.h]h>128 bytes to be written into PPS buffer for HDMI sink by PCON.}(hjF*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjB*hMhjC*ubah}(h]h ]h"]h$]h&]uh1j{ hj'*ubeh}(h]h ]h"]h$]h&]uh1jY hjB*hMhj)ubeh}(h]h ]h"]h$]h&]uh1jT hj)ubh)}(h**Description**h]j )}(hjh*h]h Description}(hjj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjf*ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj)ubh)}(h7Returns 0 on success, else returns negative error code.h]h7Returns 0 on success, else returns negative error code.}(hj~*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_edp_backlight_set_level (C function)c.drm_edp_backlight_set_levelhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hlint drm_edp_backlight_set_level (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, u32 level)h]j )}(hkint drm_edp_backlight_set_level(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, u32 level)h](j)}(hinth]hint}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM^ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*hhhj*hM^ubj )}(hdrm_edp_backlight_set_levelh]j )}(hdrm_edp_backlight_set_levelh]hdrm_edp_backlight_set_level}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj*hhhj*hM^ubj)}(hL(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, u32 level)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj +modnameN classnameNj j )}j ]j)}jj*sbc.drm_edp_backlight_set_levelasbuh1hhj*ubj )}(h h]h }(hj(+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hjOh]h*}(hj6+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*ubj )}(hauxh]haux}(hjC+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*ubj)}(h'const struct drm_edp_backlight_info *blh](j )}(hjAh]hconst}(hj\+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX+ubj )}(h h]h }(hji+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX+ubj )}(hj h]hstruct}(hjw+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX+ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX+ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j$+c.drm_edp_backlight_set_levelasbuh1hhjX+ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX+ubj)}(hjOh]h*}(hj+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjX+ubj )}(hblh]hbl}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*ubj)}(h u32 levelh](h)}(hhh]j )}(hu32h]hu32}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j$+c.drm_edp_backlight_set_levelasbuh1hhj+ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(hlevelh]hlevel}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*ubeh}(h]h ]h"]h$]h&]j j uh1jhj*hhhj*hM^ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj*hhhj*hM^ubah}(h]j*ah ](j j eh"]h$]h&]j j )j huh1j{ hj*hM^hj*hhubj )}(hhh]h)}(h/Set the backlight level of an eDP panel via AUXh]h/Set the backlight level of an eDP panel via AUX}(hj@,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM^hj=,hhubah}(h]h ]h"]h$]h&]uh1j hj*hhhj*hM^ubeh}(h]h ](j functioneh"]h$]h&]j j j jX,j jX,j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() ``u32 level`` The brightness level to set **Description** Sets the brightness level of an eDP panel's backlight. Note that the panel's backlight must already have been enabled by the driver by calling drm_edp_backlight_enable(). **Return** ``0`` on success, negative error code on failureh](h)}(h**Parameters**h]j )}(hjb,h]h Parameters}(hjd,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`,ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMbhj\,ubjU )}(hhh](jZ )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj,h]hstruct drm_dp_aux *aux}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM_hj{,ubj| )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM_hj,ubah}(h]h ]h"]h$]h&]uh1j{ hj{,ubeh}(h]h ]h"]h$]h&]uh1jY hj,hM_hjx,ubjZ )}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](j` )}(h+``const struct drm_edp_backlight_info *bl``h]jf )}(hj,h]h'const struct drm_edp_backlight_info *bl}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM`hj,ubj| )}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM`hj,ubah}(h]h ]h"]h$]h&]uh1j{ hj,ubeh}(h]h ]h"]h$]h&]uh1jY hj,hM`hjx,ubjZ )}(h*``u32 level`` The brightness level to set h](j` )}(h ``u32 level``h]jf )}(hj,h]h u32 level}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMahj,ubj| )}(hhh]h)}(hThe brightness level to seth]hThe brightness level to set}(hj -hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMahj -ubah}(h]h ]h"]h$]h&]uh1j{ hj,ubeh}(h]h ]h"]h$]h&]uh1jY hj-hMahjx,ubeh}(h]h ]h"]h$]h&]uh1jT hj\,ubh)}(h**Description**h]j )}(hj.-h]h Description}(hj0-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMchj\,ubh)}(hSets the brightness level of an eDP panel's backlight. Note that the panel's backlight must already have been enabled by the driver by calling drm_edp_backlight_enable().h]hSets the brightness level of an eDP panel’s backlight. Note that the panel’s backlight must already have been enabled by the driver by calling drm_edp_backlight_enable().}(hjD-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMbhj\,ubh)}(h **Return**h]j )}(hjU-h]hReturn}(hjW-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjS-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMehj\,ubh)}(h0``0`` on success, negative error code on failureh](jf )}(h``0``h]h0}(hjo-hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjk-ubh+ on success, negative error code on failure}(hjk-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMfhj\,ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_edp_backlight_enable (C function)c.drm_edp_backlight_enablehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hoint drm_edp_backlight_enable (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h]j )}(hnint drm_edp_backlight_enable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h](j)}(hinth]hint}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-hhhj-hMubj )}(hdrm_edp_backlight_enableh]j )}(hdrm_edp_backlight_enableh]hdrm_edp_backlight_enable}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj-hhhj-hMubj)}(hR(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j)}jj-sbc.drm_edp_backlight_enableasbuh1hhj-ubj )}(h h]h }(hj#.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj)}(hjOh]h*}(hj1.hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj-ubj )}(hauxh]haux}(hj>.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubj)}(h'const struct drm_edp_backlight_info *blh](j )}(hjAh]hconst}(hjW.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS.ubj )}(h h]h }(hjd.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS.ubj )}(hj h]hstruct}(hjr.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS.ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j.c.drm_edp_backlight_enableasbuh1hhjS.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS.ubj)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjS.ubj )}(hblh]hbl}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubj)}(hconst u32 levelh](j )}(hjAh]hconst}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hu32h]hu32}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]j.c.drm_edp_backlight_enableasbuh1hhj.ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(hlevelh]hlevel}(hj,/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubeh}(h]h ]h"]h$]h&]j j uh1jhj-hhhj-hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj-hhhj-hMubah}(h]j-ah ](j j eh"]h$]h&]j j )j huh1j{ hj-hMhj-hhubj )}(hhh]h)}(h*Enable an eDP panel's backlight using DPCDh]h,Enable an eDP panel’s backlight using DPCD}(hjV/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjS/hhubah}(h]h ]h"]h$]h&]uh1j hj-hhhj-hMubeh}(h]h ](j functioneh"]h$]h&]j j j jn/j jn/j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() ``const u32 level`` The initial backlight level to set via AUX, if there is one **Description** This function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc. Note that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO. **Return** ``0`` on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjx/h]h Parameters}(hjz/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjv/ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjr/ubjU )}(hhh](jZ )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj/h]hstruct drm_dp_aux *aux}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubj| )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hj/hMhj/ubjZ )}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](j` )}(h+``const struct drm_edp_backlight_info *bl``h]jf )}(hj/h]h'const struct drm_edp_backlight_info *bl}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubj| )}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hj/hMhj/ubjZ )}(hP``const u32 level`` The initial backlight level to set via AUX, if there is one h](j` )}(h``const u32 level``h]jf )}(hj 0h]hconst u32 level}(hj 0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj0ubj| )}(hhh]h)}(h;The initial backlight level to set via AUX, if there is oneh]h;The initial backlight level to set via AUX, if there is one}(hj"0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1j{ hj0ubeh}(h]h ]h"]h$]h&]uh1jY hj0hMhj/ubeh}(h]h ]h"]h$]h&]uh1jT hjr/ubh)}(h**Description**h]j )}(hjD0h]h Description}(hjF0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjB0ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjr/ubh)}(hThis function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc.h]hThis function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc.}(hjZ0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjr/ubh)}(hXNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO.h](hNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, }(hji0hhhNhNubh)}(hD:c:type:`drm_edp_backlight_info.aux_enable `h]jf )}(hjs0h]h!drm_edp_backlight_info.aux_enable}(hju0hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjq0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhji0ubh will be set to }(hji0hhhNhNubjf )}(h ``false``h]hfalse}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hji0ubhv, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO.}(hji0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj0hMhjr/ubh)}(h **Return**h]j )}(hj0h]hReturn}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjr/ubh)}(h1``0`` on success, negative error code on failure.h](jf )}(h``0``h]h0}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubh, on success, negative error code on failure.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjr/ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_edp_backlight_disable (C function)c.drm_edp_backlight_disablehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h_int drm_edp_backlight_disable (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h]j )}(h^int drm_edp_backlight_disable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h](j)}(hinth]hint}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhj1hMubj )}(hdrm_edp_backlight_disableh]j )}(hdrm_edp_backlight_disableh]hdrm_edp_backlight_disable}(hj#1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj0hhhj1hMubj)}(hA(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj?1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;1ubj )}(h h]h }(hjL1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;1ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj]1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_1modnameN classnameNj j )}j ]j)}jj%1sbc.drm_edp_backlight_disableasbuh1hhj;1ubj )}(h h]h }(hj}1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;1ubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;1ubj )}(hauxh]haux}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj71ubj)}(h'const struct drm_edp_backlight_info *blh](j )}(hjAh]hconst}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]jy1c.drm_edp_backlight_disableasbuh1hhj1ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(hblh]hbl}(hj#2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj71ubeh}(h]h ]h"]h$]h&]j j uh1jhj0hhhj1hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj0hhhj1hMubah}(h]j0ah ](j j eh"]h$]h&]j j )j huh1j{ hj1hMhj0hhubj )}(hhh]h)}(h1Disable an eDP backlight using DPCD, if supportedh]h1Disable an eDP backlight using DPCD, if supported}(hjM2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJ2hhubah}(h]h ]h"]h$]h&]uh1j hj0hhhj1hMubeh}(h]h ](j functioneh"]h$]h&]j j j je2j je2j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() **Description** This function handles disabling DPCD backlight controls on a panel over AUX. Note that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO. **Return** ``0`` on success or no-op, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjo2h]h Parameters}(hjq2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjm2ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhji2ubjU )}(hhh](jZ )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj2h]hstruct drm_dp_aux *aux}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2ubj| )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hj2hMhj2ubjZ )}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](j` )}(h+``const struct drm_edp_backlight_info *bl``h]jf )}(hj2h]h'const struct drm_edp_backlight_info *bl}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2ubj| )}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hj2hMhj2ubeh}(h]h ]h"]h$]h&]uh1jT hji2ubh)}(h**Description**h]j )}(hj3h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhji2ubh)}(hLThis function handles disabling DPCD backlight controls on a panel over AUX.h]hLThis function handles disabling DPCD backlight controls on a panel over AUX.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhji2ubh)}(hXNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO.h](hNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, }(hj'3hhhNhNubh)}(hD:c:type:`drm_edp_backlight_info.aux_enable `h]jf )}(hj13h]h!drm_edp_backlight_info.aux_enable}(hj33hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj/3ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj'3ubh will be set to }(hj'3hhhNhNubjf )}(h ``false``h]hfalse}(hjS3hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'3ubhw, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO.}(hj'3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjN3hMhji2ubh)}(h **Return**h]j )}(hjm3h]hReturn}(hjo3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjk3ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhji2ubh)}(h:``0`` on success or no-op, negative error code on failure.h](jf )}(h``0``h]h0}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj3ubh5 on success or no-op, negative error code on failure.}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhji2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_edp_backlight_init (C function)c.drm_edp_backlight_inithNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hint drm_edp_backlight_init (struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h]j )}(hint drm_edp_backlight_init(struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h](j)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhj3hMubj )}(hdrm_edp_backlight_inith]j )}(hdrm_edp_backlight_inith]hdrm_edp_backlight_init}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhj3hMubj)}(h(struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj 4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j)}jj3sbc.drm_edp_backlight_initasbuh1hhj3ubj )}(h h]h }(hj;4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hjOh]h*}(hjI4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3ubj )}(hauxh]haux}(hjV4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(h!struct drm_edp_backlight_info *blh](j )}(hj h]hstruct}(hjo4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk4ubj )}(h h]h }(hj|4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk4ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j74c.drm_edp_backlight_initasbuh1hhjk4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk4ubj)}(hjOh]h*}(hj4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjk4ubj )}(hblh]hbl}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hu32 max_luminanceh](h)}(hhh]j )}(hu32h]hu32}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j74c.drm_edp_backlight_initasbuh1hhj4ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h max_luminanceh]h max_luminance}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hu16 driver_pwm_freq_hzh](h)}(hhh]j )}(hu16h]hu16}(hj*5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,5modnameN classnameNj j )}j ]j74c.drm_edp_backlight_initasbuh1hhj#5ubj )}(h h]h }(hjH5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#5ubj )}(hdriver_pwm_freq_hzh]hdriver_pwm_freq_hz}(hjV5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(h+const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]h](j )}(hjAh]hconst}(hjo5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk5ubj )}(h h]h }(hj|5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk5ubh)}(hhh]j )}(hu8h]hu8}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j74c.drm_edp_backlight_initasbuh1hhjk5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk5ubj )}(hedp_dpcdh]hedp_dpcd}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk5ubj)}(hjHh]h[}(hj5hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjk5ubh)}(hhh]j )}(hEDP_DISPLAY_CTL_CAP_SIZEh]hEDP_DISPLAY_CTL_CAP_SIZE}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j74c.drm_edp_backlight_initasbuh1hhjk5ubj)}(hjIh]h]}(hj5hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjk5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hu32 *current_levelh](h)}(hhh]j )}(hu32h]hu32}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj6modnameN classnameNj j )}j ]j74c.drm_edp_backlight_initasbuh1hhj 6ubj )}(h h]h }(hj.6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 6ubj)}(hjOh]h*}(hj<6hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj 6ubj )}(h current_levelh]h current_level}(hjI6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 6ube9h}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hu8 *current_modeh](h)}(hhh]j )}(hu8h]hu8}(hje6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjb6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjg6modnameN classnameNj j )}j ]j74c.drm_edp_backlight_initasbuh1hhj^6ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^6ubj)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^6ubj )}(h current_modeh]h current_mode}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hbool need_luminanceh](j)}(hjIh]hbool}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(hneed_luminanceh]hneed_luminance}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubeh}(h]h ]h"]h$]h&]j j uh1jhj3hhhj3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhj3hMubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j{ hj3hMhj3hhubj )}(hhh]h)}(hMProbe a display panel's TCON using the standard VESA eDP backlight interface.h]hOProbe a display panel’s TCON using the standard VESA eDP backlight interface.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6hhubah}(h]h ]h"]h$]h&]uh1j hj3hhhj3hMubeh}(h]h ](j functioneh"]h$]h&]j j j j7j j7j j j uh1jv hhhj5hNhNubj )}(hXN**Parameters** ``struct drm_dp_aux *aux`` The DP aux device to use for probing ``struct drm_edp_backlight_info *bl`` The :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlight ``u32 max_luminance`` max luminance when need luminance is set as true ``u16 driver_pwm_freq_hz`` Optional PWM frequency from the driver in hz ``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]`` A cached copy of the eDP DPCD ``u32 *current_level`` Where to store the probed brightness level, if any ``u8 *current_mode`` Where to store the currently set backlight control mode ``bool need_luminance`` Tells us if a we want to manipulate backlight using luminance values **Description** Initializes a :c:type:`drm_edp_backlight_info` struct by probing **aux** for it's backlight capabilities, along with also probing the current and maximum supported brightness levels. If **driver_pwm_freq_hz** is non-zero, this will be used as the backlight frequency. Otherwise, the default frequency from the panel is used. **Return** ``0`` on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hj7h]h Parameters}(hj 7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj7ubjU )}(hhh](jZ )}(h@``struct drm_dp_aux *aux`` The DP aux device to use for probing h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj=7h]hstruct drm_dp_aux *aux}(hj?7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;7ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj77ubj| )}(hhh]h)}(h$The DP aux device to use for probingh]h$The DP aux device to use for probing}(hjV7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjR7hMhjS7ubah}(h]h ]h"]h$]h&]uh1j{ hj77ubeh}(h]h ]h"]h$]h&]uh1jY hjR7hMhj47ubjZ )}(h``struct drm_edp_backlight_info *bl`` The :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlight h](j` )}(h%``struct drm_edp_backlight_info *bl``h]jf )}(hjv7h]h!struct drm_edp_backlight_info *bl}(hjx7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjt7ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjp7ubj| )}(hhh]h)}(hYThe :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlighth](hThe }(hj7hhhNhNubh)}(h :c:type:`drm_edp_backlight_info`h]jf )}(hj7h]hdrm_edp_backlight_info}(hj7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhj7hMhj7ubh5 struct to fill out with information on the backlight}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hMhj7ubah}(h]h ]h"]h$]h&]uh1j{ hjp7ubeh}(h]h ]h"]h$]h&]uh1jY hj7hMhj47ubjZ )}(hG``u32 max_luminance`` max luminance when need luminance is set as true h](j` )}(h``u32 max_luminance``h]jf )}(hj7h]hu32 max_luminance}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj7ubj| )}(hhh]h)}(h0max luminance when need luminance is set as trueh]h0max luminance when need luminance is set as true}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj7ubah}(h]h ]h"]h$]h&]uh1j{ hj7ubeh}(h]h ]h"]h$]h&]uh1jY hj7hMhj47ubjZ )}(hH``u16 driver_pwm_freq_hz`` Optional PWM frequency from the driver in hz h](j` )}(h``u16 driver_pwm_freq_hz``h]jf )}(hj 8h]hu16 driver_pwm_freq_hz}(hj 8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj 8ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj8ubj| )}(hhh]h)}(h,Optional PWM frequency from the driver in hzh]h,Optional PWM frequency from the driver in hz}(hj$8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 8hMhj!8ubah}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hj 8hMhj47ubjZ )}(hN``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]`` A cached copy of the eDP DPCD h](j` )}(h/``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]``h]jf )}(hjD8h]h+const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]}(hjF8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjB8ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj>8ubj| )}(hhh]h)}(hA cached copy of the eDP DPCDh]hA cached copy of the eDP DPCD}(hj]8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjY8hMhjZ8ubah}(h]h ]h"]h$]h&]uh1j{ hj>8ubeh}(h]h ]h"]h$]h&]uh1jY hjY8hMhj47ubjZ )}(hJ``u32 *current_level`` Where to store the probed brightness level, if any h](j` )}(h``u32 *current_level``h]jf )}(hj}8h]hu32 *current_level}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{8ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjw8ubj| )}(hhh]h)}(h2Where to store the probed brightness level, if anyh]h2Where to store the probed brightness level, if any}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1j{ hjw8ubeh}(h]h ]h"]h$]h&]uh1jY hj8hMhj47ubjZ )}(hM``u8 *current_mode`` Where to store the currently set backlight control mode h](j` )}(h``u8 *current_mode``h]jf )}(hj8h]hu8 *current_mode}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj8ubj| )}(hhh]h)}(h7Where to store the currently set backlight control modeh]h7Where to store the currently set backlight control mode}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hj8hMhj47ubjZ )}(h]``bool need_luminance`` Tells us if a we want to manipulate backlight using luminance values h](j` )}(h``bool need_luminance``h]jf )}(hj8h]hbool need_luminance}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj8ubj| )}(hhh]h)}(hDTells us if a we want to manipulate backlight using luminance valuesh]hDTells us if a we want to manipulate backlight using luminance values}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubah}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhj47ubeh}(h]h ]h"]h$]h&]uh1jT hj7ubh)}(h**Description**h]j )}(hj*9h]h Description}(hj,9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(9ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj7ubh)}(hInitializes a :c:type:`drm_edp_backlight_info` struct by probing **aux** for it's backlight capabilities, along with also probing the current and maximum supported brightness levels.h](hInitializes a }(hj@9hhhNhNubh)}(h :c:type:`drm_edp_backlight_info`h]jf )}(hjJ9h]hdrm_edp_backlight_info}(hjL9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjH9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj@9ubh struct by probing }(hj@9hhhNhNubj )}(h**aux**h]haux}(hjl9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@9ubhp for it’s backlight capabilities, along with also probing the current and maximum supported brightness levels.}(hj@9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjg9hMhj7ubh)}(hIf **driver_pwm_freq_hz** is non-zero, this will be used as the backlight frequency. Otherwise, the default frequency from the panel is used.h](hIf }(hj9hhhNhNubj )}(h**driver_pwm_freq_hz**h]hdriver_pwm_freq_hz}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubht is non-zero, this will be used as the backlight frequency. Otherwise, the default frequency from the panel is used.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj7ubh)}(h **Return**h]j )}(hj9h]hReturn}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj7ubh)}(h1``0`` on success, negative error code on failure.h](jf )}(h``0``h]h0}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubh, on success, negative error code on failure.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_panel_dp_aux_backlight (C function)c.drm_panel_dp_aux_backlighthNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hPint drm_panel_dp_aux_backlight (struct drm_panel *panel, struct drm_dp_aux *aux)h]j )}(hOint drm_panel_dp_aux_backlight(struct drm_panel *panel, struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM1ubj )}(h h]h }(hj :hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9hhhj:hM1ubj )}(hdrm_panel_dp_aux_backlighth]j )}(hdrm_panel_dp_aux_backlighth]hdrm_panel_dp_aux_backlight}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj9hhhj:hM1ubj)}(h1(struct drm_panel *panel, struct drm_dp_aux *aux)h](j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj7:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3:ubj )}(h h]h }(hjD:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3:ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjU:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjW:modnameN classnameNj j )}j ]j)}jj:sbc.drm_panel_dp_aux_backlightasbuh1hhj3:ubj )}(h h]h }(hju:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3:ubj)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3:ubj )}(hpanelh]hpanel}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/:ubj)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]jq:c.drm_panel_dp_aux_backlightasbuh1hhj:ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj:ubj )}(hauxh]haux}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/:ubeh}(h]h ]h"]h$]h&]j j uh1jhj9hhhj:hM1ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj9hhhj:hM1ubah}(h]j9ah ](j j eh"]h$]h&]j j )j huh1j{ hj:hM1hj9hhubj )}(hhh]h)}(hcreate and use DP AUX backlighth]hcreate and use DP AUX backlight}(hj*;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM1hj';hhubah}(h]h ]h"]h$]h&]uh1j hj9hhhj:hM1ubeh}(h]h ](j functioneh"]h$]h&]j j j jB;j jB;j j j uh1jv hhhj5hNhNubj )}(hX_**Parameters** ``struct drm_panel *panel`` DRM panel ``struct drm_dp_aux *aux`` The DP AUX channel to use **Description** Use this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA's standard backlight control interface. When the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) ` When the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `. A typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjL;h]h Parameters}(hjN;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJ;ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM5hjF;ubjU )}(hhh](jZ )}(h&``struct drm_panel *panel`` DRM panel h](j` )}(h``struct drm_panel *panel``h]jf )}(hjk;h]hstruct drm_panel *panel}(hjm;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hji;ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM2hje;ubj| )}(hhh]h)}(h DRM panelh]h DRM panel}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hM2hj;ubah}(h]h ]h"]h$]h&]uh1j{ hje;ubeh}(h]h ]h"]h$]h&]uh1jY hj;hM2hjb;ubjZ )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hj;h]hstruct drm_dp_aux *aux}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM3hj;ubj| )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hM3hj;ubah}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hj;hM3hjb;ubeh}(h]h ]h"]h$]h&]uh1jT hjF;ubh)}(h**Description**h]j )}(hj;h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM5hjF;ubh)}(hUse this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA's standard backlight control interface.h]hUse this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA’s standard backlight control interface.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM4hjF;ubh)}(hWhen the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) `h](hOWhen the panel is enabled backlight will be enabled after a successful call to }(hj<hhhNhNubh)}(h6:c:type:`drm_panel_funcs.enable\(\) `h]jf )}(hj<h]hdrm_panel_funcs.enable()}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj <ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM8hj<ubeh}(h]h ]h"]h$]h&]uh1hhj+<hM8hjF;ubh)}(hWhen the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `.h](hIWhen the panel is disabled backlight will be disabled before the call to }(hj2<hhhNhNubh)}(h7:c:type:`drm_panel_funcs.disable\(\) `h]jf )}(hj<<h]hdrm_panel_funcs.disable()}(hj><hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM;hj2<ubh.}(hj2<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjY<hM;hjF;ubh)}(hA typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.h]hA typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.}(hjd<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjF;ubh)}(h **Return**h]j )}(hju<h]hReturn}(hjw<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjs<ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMChjF;ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMDhjF;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_link_symbol_cycles (C function)c.drm_dp_link_symbol_cycleshNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hzint drm_dp_link_symbol_cycles (int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h]j )}(hyint drm_dp_link_symbol_cycles(int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h](j)}(hinth]hint}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhj<hMubj )}(hdrm_dp_link_symbol_cyclesh]j )}(hdrm_dp_link_symbol_cyclesh]hdrm_dp_link_symbol_cycles}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj<hhhj<hMubj)}(h\(int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h](j)}(hint lane_counth](j)}(hinth]hint}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(h lane_counth]h lane_count}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(h int pixelsh](j)}(hinth]hint}(hj,=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(=ubj )}(h h]h }(hj:=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(=ubj )}(hpixelsh]hpixels}(hjH=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hint dsc_slice_counth](j)}(hinth]hint}(hja=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]=ubj )}(h h]h }(hjo=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]=ubj )}(hdsc_slice_counth]hdsc_slice_count}(hj}=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(h int bpp_x16h](j)}(hinth]hint}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(hbpp_x16h]hbpp_x16}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hint symbol_sizeh](j)}(hinth]hint}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h symbol_sizeh]h symbol_size}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(h bool is_msth](j)}(hjIh]hbool}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj )}(h h]h }(hj >hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(his_msth]his_mst}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubeh}(h]h ]h"]h$]h&]j j uh1jhj<hhhj<hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhj<hMubah}(h]j<ah ](j j eh"]h$]h&]j j )j huh1j{ hj<hMhj<hhubj )}(hhh]h)}(h0calculate the link symbol count with/without dsch]h0calculate the link symbol count with/without dsc}(hjE>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjB>hhubah}(h]h ]h"]h$]h&]uh1j hj<hhhj<hMubeh}(h]h ](j functioneh"]h$]h&]j j j j]>j j]>j j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``int lane_count`` DP link lane count ``int pixels`` number of pixels in a scanline ``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC ``int bpp_x16`` bits per pixel in .4 binary fixed format ``int symbol_size`` DP symbol size ``bool is_mst`` ``true`` for MST and ``false`` for SST **Description** Calculate the link symbol cycles for both DSC (**dsc_slice_count** !=0) and non-DSC case (**dsc_slice_count** == 0) and return the count.h](h)}(h**Parameters**h]j )}(hjg>h]h Parameters}(hji>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hje>ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhja>ubjU )}(hhh](jZ )}(h&``int lane_count`` DP link lane count h](j` )}(h``int lane_count``h]jf )}(hj>h]hint lane_count}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj>ubj| )}(hhh]h)}(hDP link lane counth]hDP link lane count}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hj>hMhj}>ubjZ )}(h.``int pixels`` number of pixels in a scanline h](j` )}(h``int pixels``h]jf )}(hj>h]h int pixels}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj>ubj| )}(hhh]h)}(hnumber of pixels in a scanlineh]hnumber of pixels in a scanline}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hj>hMhj}>ubjZ )}(hD``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC h](j` )}(h``int dsc_slice_count``h]jf )}(hj>h]hint dsc_slice_count}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj>ubj| )}(hhh]h)}(h+number of slices for DSC or '0' for non-DSCh]h/number of slices for DSC or ‘0’ for non-DSC}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ?hMhj?ubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hj ?hMhj}>ubjZ )}(h9``int bpp_x16`` bits per pixel in .4 binary fixed format h](j` )}(h``int bpp_x16``h]jf )}(hj1?h]h int bpp_x16}(hj3?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/?ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj+?ubj| )}(hhh]h)}(h(bits per pixel in .4 binary fixed formath]h(bits per pixel in .4 binary fixed format}(hjJ?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjF?hMhjG?ubah}(h]h ]h"]h$]h&]uh1j{ hj+?ubeh}(h]h ]h"]h$]h&]uh1jY hjF?hMhj}>ubjZ )}(h#``int symbol_size`` DP symbol size h](j` )}(h``int symbol_size``h]jf )}(hjj?h]hint symbol_size}(hjl?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjh?ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjd?ubj| )}(hhh]h)}(hDP symbol sizeh]hDP symbol size}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1j{ hjd?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hMhj}>ubjZ )}(h7``bool is_mst`` ``true`` for MST and ``false`` for SST h](j` )}(h``bool is_mst``h]jf )}(hj?h]h bool is_mst}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj?ubj| )}(hhh]h)}(h&``true`` for MST and ``false`` for SSTh](jf )}(h``true``h]htrue}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubh for MST and }(hj?hhhNhNubjf )}(h ``false``h]hfalse}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubh for SST}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hMhj}>ubeh}(h]h ]h"]h$]h&]uh1jT hja>ubh)}(h**Description**h]j )}(hj?h]h Description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhja>ubh)}(hCalculate the link symbol cycles for both DSC (**dsc_slice_count** !=0) and non-DSC case (**dsc_slice_count** == 0) and return the count.h](h/Calculate the link symbol cycles for both DSC (}(hj@hhhNhNubj )}(h**dsc_slice_count**h]hdsc_slice_count}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubh !=0) and non-DSC case (}(hj@hhhNhNubj )}(h**dsc_slice_count**h]hdsc_slice_count}(hj.@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubh == 0) and return the count.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhja>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_bw_overhead (C function)c.drm_dp_bw_overheadhNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(hkint drm_dp_bw_overhead (int lane_count, int hactive, int dsc_slice_count, int bpp_x16, unsigned long flags)h]j )}(hjint drm_dp_bw_overhead(int lane_count, int hactive, int dsc_slice_count, int bpp_x16, unsigned long flags)h](j)}(hinth]hint}(hjg@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjc@hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjv@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc@hhhju@hMubj )}(hdrm_dp_bw_overheadh]j )}(hdrm_dp_bw_overheadh]hdrm_dp_bw_overhead}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjc@hhhju@hMubj)}(hT(int lane_count, int hactive, int dsc_slice_count, int bpp_x16, unsigned long flags)h](j)}(hint lane_counth](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h lane_counth]h lane_count}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ubj)}(h int hactiveh](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hhactiveh]hhactive}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ubj)}(hint dsc_slice_counth](j)}(hinth]hint}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Aubj )}(hdsc_slice_counth]hdsc_slice_count}(hj*AhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Aubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ubj)}(h int bpp_x16h](j)}(hinth]hint}(hjCAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?Aubj )}(h h]h }(hjQAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?Aubj )}(hbpp_x16h]hbpp_x16}(hj_AhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?Aubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ubj)}(hunsigned long flagsh](j)}(hunsignedh]hunsigned}(hjxAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtAubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtAubj)}(hlongh]hlong}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtAubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtAubj )}(hflagsh]hflags}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ubeh}(h]h ]h"]h$]h&]j j uh1jhjc@hhhju@hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj_@hhhju@hMubah}(h]jZ@ah ](j j eh"]h$]h&]j j )j huh1j{ hju@hMhj\@hhubj )}(hhh]h)}(h-Calculate the BW overhead of a DP link streamh]h-Calculate the BW overhead of a DP link stream}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjAhhubah}(h]h ]h"]h$]h&]uh1j hj\@hhhju@hMubeh}(h]h ](j functioneh"]h$]h&]j j j jAj jAj j j uh1jv hhhj5hNhNubj )}(hX**Parameters** ``int lane_count`` DP link lane count ``int hactive`` pixel count of the active period in one scanline of the stream ``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC ``int bpp_x16`` bits per pixel in .4 binary fixed point ``unsigned long flags`` DRM_DP_OVERHEAD_x flags **Description** Calculate the BW allocation overhead of a DP link stream, depending on the link's - **lane_count** - SST/MST mode (**flags** / ``DRM_DP_OVERHEAD_MST``) - symbol size (**flags** / ``DRM_DP_OVERHEAD_UHBR``) - FEC mode (**flags** / ``DRM_DP_OVERHEAD_FEC``) - SSC/REF_CLK mode (**flags** / ``DRM_DP_OVERHEAD_SSC_REF_CLK``) as well as the stream's - **hactive** timing - **bpp_x16** color depth - compression mode (**dsc_slice_count** != 0) Note that this overhead doesn't account for the 8b/10b, 128b/132b channel coding efficiency, for that see **drm_dp_link_bw_channel_coding_efficiency\(\)**. Returns the overhead as 100% + overhead% in 1ppm units.h](h)}(h**Parameters**h]j )}(hjAh]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjAubjU )}(hhh](jZ )}(h&``int lane_count`` DP link lane count h](j` )}(h``int lane_count``h]jf )}(hjBh]hint lane_count}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjBubj| )}(hhh]h)}(hDP link lane counth]hDP link lane count}(hj4BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0BhMhj1Bubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hj0BhMhjBubjZ )}(hO``int hactive`` pixel count of the active period in one scanline of the stream h](j` )}(h``int hactive``h]jf )}(hjTBh]h int hactive}(hjVBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRBubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjNBubj| )}(hhh]h)}(h>pixel count of the active period in one scanline of the streamh]h>pixel count of the active period in one scanline of the stream}(hjmBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjiBhMhjjBubah}(h]h ]h"]h$]h&]uh1j{ hjNBubeh}(h]h ]h"]h$]h&]uh1jY hjiBhMhjBubjZ )}(hD``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC h](j` )}(h``int dsc_slice_count``h]jf )}(hjBh]hint dsc_slice_count}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjBubj| )}(hhh]h)}(h+number of slices for DSC or '0' for non-DSCh]h/number of slices for DSC or ‘0’ for non-DSC}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hjBhMhjBubjZ )}(h8``int bpp_x16`` bits per pixel in .4 binary fixed point h](j` )}(h``int bpp_x16``h]jf )}(hjBh]h int bpp_x16}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjBubj| )}(hhh]h)}(h'bits per pixel in .4 binary fixed pointh]h'bits per pixel in .4 binary fixed point}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hjBhMhjBubjZ )}(h0``unsigned long flags`` DRM_DP_OVERHEAD_x flags h](j` )}(h``unsigned long flags``h]jf )}(hjBh]hunsigned long flags}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjBubj| )}(hhh]h)}(hDRM_DP_OVERHEAD_x flagsh]hDRM_DP_OVERHEAD_x flags}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjCubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hjChMhjBubeh}(h]h ]h"]h$]h&]uh1jT hjAubh)}(h**Description**h]j )}(hj:Ch]h Description}(hj 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead(). Returns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.h](h)}(h**Parameters**h]j )}(hjEh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjEubjU )}(hhh]jZ )}(hA``bool is_uhbr`` Whether the link has a 128b/132b channel coding h](j` )}(h``bool is_uhbr``h]jf )}(hj;Eh]h bool is_uhbr}(hj=EhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9Eubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhj5Eubj| )}(hhh]h)}(h/Whether the link has a 128b/132b channel codingh]h/Whether the link has a 128b/132b channel coding}(hjTEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPEhMhjQEubah}(h]h ]h"]h$]h&]uh1j{ hj5Eubeh}(h]h ]h"]h$]h&]uh1jY hjPEhMhj2Eubah}(h]h ]h"]h$]h&]uh1jT hjEubh)}(h**Description**h]j )}(hjvEh]h Description}(hjxEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtEubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjEubh)}(hXReturn the channel coding efficiency of the given DP link type, which is either 8b/10b or 128b/132b (aka UHBR). The corresponding overhead includes the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead().h]hXReturn the channel coding efficiency of the given DP link type, which is either 8b/10b or 128b/132b (aka UHBR). The corresponding overhead includes the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead().}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjEubh)}(hHReturns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.h]hHReturns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMhjEubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj5hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_max_dprx_data_rate (C function)c.drm_dp_max_dprx_data_ratehNtauh1jd hj5hhhNhNubjw )}(hhh](j| )}(h@int drm_dp_max_dprx_data_rate (int max_link_rate, int max_lanes)h]j )}(h?int drm_dp_max_dprx_data_rate(int max_link_rate, int max_lanes)h](j)}(hinth]hint}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEhhhjEhMubj )}(hdrm_dp_max_dprx_data_rateh]j )}(hdrm_dp_max_dprx_data_rateh]hdrm_dp_max_dprx_data_rate}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ](j j eh"]h$]h&]j j uh1j hjEhhhjEhMubj)}(h"(int max_link_rate, int max_lanes)h](j)}(hint max_link_rateh](j)}(hinth]hint}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj )}(h max_link_rateh]h max_link_rate}(hj#FhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(h int max_lanesh](j)}(hinth]hint}(hj``DRM_DP_DUAL_MODE_LSPCON`` Level shifter / protocol converterh](j` )}(h``DRM_DP_DUAL_MODE_LSPCON``h]jf )}(hj4Ph]hDRM_DP_DUAL_MODE_LSPCON}(hj6PhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2Pubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:289: ./include/drm/display/drm_dp_dual_mode_helper.hhKphj.Pubj| )}(hhh]h)}(h"Level shifter / protocol converterh]h"Level shifter / protocol converter}(hjMPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:289: ./include/drm/display/drm_dp_dual_mode_helper.hhKqhjJPubah}(h]h ]h"]h$]h&]uh1j{ hj.Pubeh}(h]h ]h"]h$]h&]uh1jY hjIPhKphjNubeh}(h]h ]h"]h$]h&]uh1jT hjNubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjLhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_dp_dual_mode_read (C function)c.drm_dp_dual_mode_readhNtauh1jd hjLhhhNhNubjw )}(hhh](j| )}(hassize_t drm_dp_dual_mode_read (struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h]j )}(h`ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjPmodnameN classnameNj j )}j ]j)}jdrm_dp_dual_mode_readsbc.drm_dp_dual_mode_readasbuh1hhjPhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK3ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjPhK3ubj )}(hdrm_dp_dual_mode_readh]j )}(hjPh]hdrm_dp_dual_mode_read}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjPhK3ubj)}(hC(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](j)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQmodnameN classnameNj j )}j ]jPc.drm_dp_dual_mode_readasbuh1hhjPubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj)}(hjOh]h*}(hj*QhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjPubj )}(hadapterh]hadapter}(hj7QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjPubj)}(h u8 offseth](h)}(hhh]j )}(hu8h]hu8}(hjSQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUQmodnameN classnameNj j )}j ]jPc.drm_dp_dual_mode_readasbuh1hhjLQubj )}(h h]h }(hjqQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLQubj )}(hoffseth]hoffset}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjPubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj)}(hjOh]h*}(hjQhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjQubj )}(hbufferh]hbuffer}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjPubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQmodnameN classnameNj j )}j ]jPc.drm_dp_dual_mode_readasbuh1hhjQubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(hsizeh]hsize}(hj RhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjPubeh}(h]h ]h"]h$]h&]j j uh1jhjPhhhjPhK3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjPhhhjPhK3ubah}(h]jPah ](j j eh"]h$]h&]j j )j huh1j{ hjPhK3hjPhhubj )}(hhh]h)}(h.Read from the DP dual mode adaptor register(s)h]h.Read from the DP dual mode adaptor register(s)}(hj3RhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK3hj0Rhhubah}(h]h ]h"]h$]h&]uh1j hjPhhhjPhK3ubeh}(h]h ](j functioneh"]h$]h&]j j j jKRj jKRj j j uh1jv hhhjLhNhNubj )}(hX`**Parameters** ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus ``u8 offset`` register offset ``void *buffer`` buffer for return data ``size_t size`` size of the buffer **Description** Reads **size** bytes from the DP dual mode adaptor registers starting at **offset**. **Return** 0 on success, negative error code on failureh](h)}(h**Parameters**h]j )}(hjURh]h Parameters}(hjWRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSRubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK7hjORubjU )}(hhh](jZ )}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjtRh]hstruct i2c_adapter *adapter}(hjvRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrRubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK4hjnRubj| )}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhK4hjRubah}(h]h ]h"]h$]h&]uh1j{ hjnRubeh}(h]h ]h"]h$]h&]uh1jY hjRhK4hjkRubjZ )}(h``u8 offset`` register offset h](j` )}(h ``u8 offset``h]jf )}(hjRh]h u8 offset}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK5hjRubj| )}(hhh]h)}(hregister offseth]hregister offset}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhK5hjRubah}(h]h ]h"]h$]h&]uh1j{ hjRubeh}(h]h ]h"]h$]h&]uh1jY hjRhK5hjkRubjZ )}(h(``void *buffer`` buffer for return data h](j` )}(h``void *buffer``h]jf )}(hjRh]h void *buffer}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK6hjRubj| )}(hhh]h)}(hbuffer for return datah]hbuffer for return data}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhK6hjRubah}(h]h ]h"]h$]h&]uh1j{ hjRubeh}(h]h ]h"]h$]h&]uh1jY hjRhK6hjkRubjZ )}(h#``size_t size`` size of the buffer h](j` )}(h``size_t size``h]jf )}(hjSh]h size_t size}(hj!ShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK7hjSubj| )}(hhh]h)}(hsize of the bufferh]hsize of the buffer}(hj8ShhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4ShK7hj5Subah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hj4ShK7hjkRubeh}(h]h ]h"]h$]h&]uh1jT hjORubh)}(h**Description**h]j )}(hjZSh]h Description}(hj\ShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXSubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK9hjORubh)}(hTReads **size** bytes from the DP dual mode adaptor registers starting at **offset**.h](hReads }(hjpShhhNhNubj )}(h**size**h]hsize}(hjxShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpSubh; bytes from the DP dual mode adaptor registers starting at }(hjpShhhNhNubj )}(h **offset**h]hoffset}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpSubh.}(hjpShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK8hjORubh)}(h **Return**h]j )}(hjSh]hReturn}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK;hjORubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKAttempt to identify the type of the DP dual mode adaptor used.h]h>Attempt to identify the type of the DP dual mode adaptor used.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhjXubh)}(hNote that when the answer is **DRM_DP_DUAL_MODE_UNKNOWN** it's not certain whether we're dealing with a native HDMI port or a type 1 DVI dual mode adaptor. The driver will have to use some other hardware/driver specific mechanism to make that distinction.h](hNote that when the answer is }(hjYhhhNhNubj )}(h**DRM_DP_DUAL_MODE_UNKNOWN**h]hDRM_DP_DUAL_MODE_UNKNOWN}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubh it’s not certain whether we’re dealing with a native HDMI port or a type 1 DVI dual mode adaptor. The driver will have to use some other hardware/driver specific mechanism to make that distinction.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhjXubh)}(h **Return**h]j )}(hjYh]hReturn}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhjXubh)}(h)The type of the DP dual mode adaptor usedh]h)The type of the DP dual mode adaptor used}(hj ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjLhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_dual_mode_max_tmds_clock (C function)!c.drm_dp_dual_mode_max_tmds_clockhNtauh1jd hjLhhhNhNubjw )}(hhh](j| )}(hint drm_dp_dual_mode_max_tmds_clock (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h]j )}(hint drm_dp_dual_mode_max_tmds_clock(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h](j)}(hinth]hint}(hj;ZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7Zhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj )}(h h]h }(hjJZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ZhhhjIZhMubj )}(hdrm_dp_dual_mode_max_tmds_clockh]j )}(hdrm_dp_dual_mode_max_tmds_clockh]hdrm_dp_dual_mode_max_tmds_clock}(hj\ZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXZubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7ZhhhjIZhMubj)}(h\(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h](j)}(hconst struct drm_device *devh](j )}(hjAh]hconst}(hjxZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtZubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtZubj )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtZubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtZubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jj^Zsb!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhjtZubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtZubj)}(hjOh]h*}(hjZhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjtZubj )}(hdevh]hdev}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjpZubj)}(henum drm_dp_dual_mode_type typeh](j )}(hj+h]henum}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hj#[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj [ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%[modnameN classnameNj j )}j ]jZ!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhj[ubj )}(h h]h }(hjA[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(htypeh]htype}(hjO[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjpZubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjh[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd[ubj )}(h h]h }(hju[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd[ubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]jZ!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhjd[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd[ubj)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjd[ubj )}(hadapterh]hadapter}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjpZubeh}(h]h ]h"]h$]h&]j j uh1jhj7ZhhhjIZhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3ZhhhjIZhMubah}(h]j.Zah ](j j eh"]h$]h&]j j )j huh1j{ hjIZhMhj0Zhhubj )}(hhh]h)}(h'Max TMDS clock for DP dual mode adaptorh]h'Max TMDS clock for DP dual mode adaptor}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj[hhubah}(h]h ]h"]h$]h&]uh1j hj0ZhhhjIZhMubeh}(h]h ](j functioneh"]h$]h&]j j j j\j j\j j j uh1jv hhhjLhNhNubj )}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus **Description** Determine the max TMDS clock the adaptor supports based on the type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK register (on type2 adaptors). As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume a 165 MHz limit based on the specification. **Return** Maximum supported TMDS clock rate for the DP dual mode adaptor in kHz.h](h)}(h**Parameters**h]j )}(hj \h]h Parameters}(hj \hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj \ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hj\ubjU )}(hhh](jZ )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j` )}(h ``const struct drm_device *dev``h]jf )}(hj*\h]hconst struct drm_device *dev}(hj,\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(\ubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj$\ubj| )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jf )}(hjI\h]h drm_device}(hjK\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjG\ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhj?\hMhjC\ubh to use}(hjC\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?\hMhj@\ubah}(h]h ]h"]h$]h&]uh1j{ hj$\ubeh}(h]h ]h"]h$]h&]uh1jY hj?\hMhj!\ubjZ )}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j` )}(h#``enum drm_dp_dual_mode_type type``h]jf )}(hj\h]henum drm_dp_dual_mode_type type}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj|\ubj| )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj|\ubeh}(h]h ]h"]h$]h&]uh1jY hj\hMhj!\ubjZ )}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hj\h]hstruct i2c_adapter *adapter}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hj\ubj| )}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hM hj\ubah}(h]h ]h"]h$]h&]uh1j{ hj\ubeh}(h]h ]h"]h$]h&]uh1jY hj\hM hj!\ubeh}(h]h ]h"]h$]h&]uh1jT hj\ubh)}(h**Description**h]j )}(hj\h]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hj\ubh)}(hXiDetermine the max TMDS clock the adaptor supports based on the type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK register (on type2 adaptors). As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume a 165 MHz limit based on the specification.h]hXkDetermine the max TMDS clock the adaptor supports based on the type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK register (on type2 adaptors). As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don’t read the register on those, instead we simply assume a 165 MHz limit based on the specification.}(hj ]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hj\ubh)}(h **Return**h]j )}(hj]h]hReturn}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj\ubh)}(hFMaximum supported TMDS clock rate for the DP dual mode adaptor in kHz.h]hFMaximum supported TMDS clock rate for the DP dual mode adaptor in kHz.}(hj3]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj\ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjLhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_dual_mode_get_tmds_output (C function)"c.drm_dp_dual_mode_get_tmds_outputhNtauh1jd hjLhhhNhNubjw )}(hhh](j| )}(hint drm_dp_dual_mode_get_tmds_output (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool *enabled)h]j )}(hint drm_dp_dual_mode_get_tmds_output(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool *enabled)h](j)}(hinth]hint}(hjb]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^]hhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM2ubj )}(h h]h }(hjq]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^]hhhjp]hM2ubj )}(h drm_dp_dual_mode_get_tmds_outputh]j )}(h drm_dp_dual_mode_get_tmds_outputh]h drm_dp_dual_mode_get_tmds_output}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^]hhhjp]hM2ubj)}(hk(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool *enabled)h](j)}(hconst struct drm_device *devh](j )}(hjAh]hconst}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(hj h]hstruct}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j)}jj]sb"c.drm_dp_dual_mode_get_tmds_outputasbuh1hhj]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj)}(hjOh]h*}(hj^hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj]ubj )}(hdevh]hdev}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubj)}(henum drm_dp_dual_mode_type typeh](j )}(hj+h]henum}(hj,^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(^ubj )}(h h]h }(hj9^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(^ubh)}(hhh]j )}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hjJ^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjL^modnameN classnameNj j )}j ]j]"c.drm_dp_dual_mode_get_tmds_outputasbuh1hhj(^ubj )}(h h]h }(hjh^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(^ubj )}(htypeh]htype}(hjv^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j]"c.drm_dp_dual_mode_get_tmds_outputasbuh1hhj^ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj)}(hjOh]h*}(hj^hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^ubj )}(hadapterh]hadapter}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubj)}(h bool *enabledh](j)}(hjIh]hbool}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj )}(h h]h }(hj _hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^ubj )}(henabledh]henabled}(hj'_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubeh}(h]h ]h"]h$]h&]j j uh1jhj^]hhhjp]hM2ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZ]hhhjp]hM2ubah}(h]jU]ah ](j j eh"]h$]h&]j j )j huh1j{ hjp]hM2hjW]hhubj )}(hhh]h)}(hDGet the state of the TMDS output buffers in the DP dual mode adaptorh]hDGet the state of the TMDS output buffers in the DP dual mode adaptor}(hjQ_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM2hjN_hhubah}(h]h ]h"]h$]h&]uh1j hjW]hhhjp]hM2ubeh}(h]h ](j functioneh"]h$]h&]j j j ji_j ji_j j j uh1jv hhhjLhNhNubj )}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus ``bool *enabled`` current state of the TMDS output buffers **Description** Get the state of the TMDS output buffers in the adaptor. For type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN register. As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume that the buffers are always enabled. **Return** 0 on success, negative error code on failureh](h)}(h**Parameters**h]j )}(hjs_h]h Parameters}(hju_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjq_ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM6hjm_ubjU )}(hhh](jZ )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j` )}(h ``const struct drm_device *dev``h]jf )}(hj_h]hconst struct drm_device *dev}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM3hj_ubj| )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jf )}(hj_h]h drm_device}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhj_hM3hj_ubh to use}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_hM3hj_ubah}(h]h ]h"]h$]h&]uh1j{ hj_ubeh}(h]h ]h"]h$]h&]uh1jY hj_hM3hj_ubjZ )}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j` )}(h#``enum drm_dp_dual_mode_type type``h]jf )}(hj_h]henum drm_dp_dual_mode_type type}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM4hj_ubj| )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hM4hj`ubah}(h]h ]h"]h$]h&]uh1j{ hj_ubeh}(h]h ]h"]h$]h&]uh1jY hj_hM4hj_ubjZ )}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hj#`h]hstruct i2c_adapter *adapter}(hj%`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!`ubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM5hj`ubj| )}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hj<`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8`hM5hj9`ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj8`hM5hj_ubjZ )}(h;``bool *enabled`` current state of the TMDS output buffers h](j` )}(h``bool *enabled``h]jf )}(hj\`h]h bool *enabled}(hj^`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZ`ubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM6hjV`ubj| )}(hhh]h)}(h(current state of the TMDS output buffersh]h(current state of the TMDS output buffers}(hju`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjq`hM6hjr`ubah}(h]h ]h"]h$]h&]uh1j{ hjV`ubeh}(h]h ]h"]h$]h&]uh1jY hjq`hM6hj_ubeh}(h]h ]h"]h$]h&]uh1jT hjm_ubh)}(h**Description**h]j )}(hj`h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM8hjm_ubh)}(hXHGet the state of the TMDS output buffers in the adaptor. For type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN register. As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume that the buffers are always enabled.h]hXJGet the state of the TMDS output buffers in the adaptor. For type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN register. As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don’t read the register on those, instead we simply assume that the buffers are always enabled.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM7hjm_ubh)}(h **Return**h]j )}(hj`h]hReturn}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM>hjm_ubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM?hjm_ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjLhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_dual_mode_set_tmds_output (C function)"c.drm_dp_dual_mode_set_tmds_outputhNtauh1jd hjLhhhNhNubjw )}(hhh](j| )}(hint drm_dp_dual_mode_set_tmds_output (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h]j )}(hint drm_dp_dual_mode_set_tmds_output(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h](j)}(hinth]hint}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM\ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhjahM\ubj )}(h drm_dp_dual_mode_set_tmds_outputh]j )}(h drm_dp_dual_mode_set_tmds_outputh]h drm_dp_dual_mode_set_tmds_output}(hj$ahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj aubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhhjahM\ubj)}(hi(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h](j)}(hconst struct drm_device *devh](j )}(hjAh]hconst}(hj@ahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEnable/disable TMDS output buffers in the DP dual mode adaptorh]h>Enable/disable TMDS output buffers in the DP dual mode adaptor}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM\hjbhhubah}(h]h ]h"]h$]h&]uh1j hj`hhhjahM\ubeh}(h]h ](j functioneh"]h$]h&]j j j jbj jbj j j uh1jv hhhjLhNhNubj )}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus ``bool enable`` enable (as opposed to disable) the TMDS output buffers **Description** Set the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes. **Return** 0 on success, negative error code on failureh](h)}(h**Parameters**h]j )}(hjch]h Parameters}(hj chhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM`hjcubjU )}(hhh](jZ )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j` )}(h ``const struct drm_device *dev``h]jf )}(hj&ch]hconst struct drm_device *dev}(hj(chhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$cubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM]hj cubj| )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jf )}(hjEch]h drm_device}(hjGchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjCcubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhj;chM]hj?cubh to use}(hj?chhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;chM]hj``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j` )}(h#``enum drm_dp_dual_mode_type type``h]jf )}(hj~ch]henum drm_dp_dual_mode_type type}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|cubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM^hjxcubj| )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchM^hjcubah}(h]h ]h"]h$]h&]uh1j{ hjxcubeh}(h]h ]h"]h$]h&]uh1jY hjchM^hjcubjZ )}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjch]hstruct i2c_adapter *adapter}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM_hjcubj| )}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchM_hjcubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hjchM_hjcubjZ )}(hG``bool enable`` enable (as opposed to disable) the TMDS output buffers h](j` )}(h``bool enable``h]jf )}(hjch]h bool enable}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM`hjcubj| )}(hhh]h)}(h6enable (as opposed to disable) the TMDS output buffersh]h6enable (as opposed to disable) the TMDS output buffers}(hj dhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhM`hjdubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hjdhM`hjcubeh}(h]h ]h"]h$]h&]uh1jT hjcubh)}(h**Description**h]j )}(hj+dh]h Description}(hj-dhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)dubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMbhjcubh)}(hSet the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes.h]hSet the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes.}(hjAdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMahjcubh)}(h **Return**h]j )}(hjRdh]hReturn}(hjTdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPdubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMehjcubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hjhdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMfhjcubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjLhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_dp_get_dual_mode_type_name (C function) c.drm_dp_get_dual_mode_type_namehNtauh1jd hjLhhhNhNubjw )}(hhh](j| )}(hMconst char * drm_dp_get_dual_mode_type_name (enum drm_dp_dual_mode_type type)h]j )}(hKconst char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type)h](j )}(hjAh]hconst}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhhjdhMubj)}(hcharh]hchar}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdhhhjdhMubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhhjdhMubj)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdhhhjdhMubj )}(hdrm_dp_get_dual_mode_type_nameh]j )}(hdrm_dp_get_dual_mode_type_nameh]hdrm_dp_get_dual_mode_type_name}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubah}(h]h ](j j eh"]h$]h&]j j uh1j hjdhhhjdhMubj)}(h!(enum drm_dp_dual_mode_type type)h]j)}(henum drm_dp_dual_mode_type typeh](j )}(hj+h]henum}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hj ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjemodnameN classnameNj j )}j ]j)}jjdsb c.drm_dp_get_dual_mode_type_nameasbuh1hhjdubj )}(h h]h }(hj:ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(htypeh]htype}(hjHehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjdubah}(h]h ]h"]h$]h&]j j uh1jhjdhhhjdhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjdhhhjdhMubah}(h]jdah ](j j eh"]h$]h&]j j )j huh1j{ hjdhMhjdhhubj )}(hhh]h)}(h9Get the name of the DP dual mode adaptor type as a stringh]h9Get the name of the DP dual mode adaptor type as a string}(hjrehhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjoehhubah}(h]h ]h"]h$]h&]uh1j hjdhhhjdhMubeh}(h]h ](j functioneh"]h$]h&]j j j jej jej j j uh1jv hhhjLhNhNubj )}(h**Parameters** ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type **Return** String representation of the DP dual mode adaptor typeh](h)}(h**Parameters**h]j )}(hjeh]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjeubjU )}(hhh]jZ )}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j` )}(h#``enum drm_dp_dual_mode_type type``h]jf )}(hjeh]henum drm_dp_dual_mode_type type}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjeubj| )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjeubah}(h]h ]h"]h$]h&]uh1j{ hjeubeh}(h]h ]h"]h$]h&]uh1jY hjehMhjeubah}(h]h ]h"]h$]h&]uh1jT hjeubh)}(h **Return**h]j )}(hjeh]hReturn}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjeubh)}(h6String representation of the DP dual mode adaptor typeh]h6String representation of the DP dual mode adaptor type}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjeubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjLhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_lspcon_get_mode (C function)c.drm_lspcon_get_modehNtauh1jd hjLhhhNhNubjw )}(hhh](j| )}(hoint drm_lspcon_get_mode (const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h]j )}(hnint drm_lspcon_get_mode(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h](j)}(hinth]hint}(hj3fhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/fhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj )}(h h]h }(hjBfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/fhhhjAfhMubj )}(hdrm_lspcon_get_modeh]j )}(hdrm_lspcon_get_modeh]hdrm_lspcon_get_mode}(hjTfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPfubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/fhhhjAfhMubj)}(hW(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h](j)}(hconst struct drm_device *devh](j )}(hjAh]hconst}(hjpfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlfubj )}(h h]h }(hj}fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlfubj )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlfubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]j)}jjVfsbc.drm_lspcon_get_modeasbuh1hhjlfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlfubj)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjlfubj )}(hdevh]hdev}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhfubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hj ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]jfc.drm_lspcon_get_modeasbuh1hhjfubj )}(h h]h }(hj9ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(hjOh]h*}(hjGghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfubj )}(hadapterh]hadapter}(hjTghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhfubj)}(henum drm_lspcon_mode *modeh](j )}(hj+h]henum}(hjmghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjigubj )}(h h]h }(hjzghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjigubh)}(hhh]j )}(hdrm_lspcon_modeh]hdrm_lspcon_mode}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]jfc.drm_lspcon_get_modeasbuh1hhjigubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjigubj)}(hjOh]h*}(hjghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjigubj )}(hmodeh]hmode}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjigubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhfubeh}(h]h ]h"]h$]h&]j j uh1jhj/fhhhjAfhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+fhhhjAfhMubah}(h]j&fah ](j j eh"]h$]h&]j j )j huh1j{ hjAfhMhj(fhhubj )}(hhh]h)}(hEGet LSPCON's current mode of operation by reading offset (0x80, 0x41)h]hGGet LSPCON’s current mode of operation by reading offset (0x80, 0x41)}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjghhubah}(h]h ]h"]h$]h&]uh1j hj(fhhhjAfhMubeh}(h]h ](j functioneh"]h$]h&]j j j jhj jhj j j uh1jv hhhjLhNhNubj )}(hX6**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``struct i2c_adapter *adapter`` I2C-over-aux adapter ``enum drm_lspcon_mode *mode`` current lspcon mode of operation output variable **Return** 0 on success, sets the current_mode value to appropriate mode -error on failureh](h)}(h**Parameters**h]j )}(hjhh]h Parameters}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj hubjU )}(hhh](jZ )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j` )}(h ``const struct drm_device *dev``h]jf )}(hj/hh]hconst struct drm_device *dev}(hj1hhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-hubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj)hubj| )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jf )}(hjNhh]h drm_device}(hjPhhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjLhubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjDhhMhjHhubh to use}(hjHhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhhMhjEhubah}(h]h ]h"]h$]h&]uh1j{ hj)hubeh}(h]h ]h"]h$]h&]uh1jY hjDhhMhj&hubjZ )}(h5``struct i2c_adapter *adapter`` I2C-over-aux adapter h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjhh]hstruct i2c_adapter *adapter}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjhubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjhubj| )}(hhh]h)}(hI2C-over-aux adapterh]hI2C-over-aux adapter}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjhubah}(h]h ]h"]h$]h&]uh1j{ hjhubeh}(h]h ]h"]h$]h&]uh1jY hjhhMhj&hubjZ )}(hP``enum drm_lspcon_mode *mode`` current lspcon mode of operation output variable h](j` )}(h``enum drm_lspcon_mode *mode``h]jf )}(hjhh]henum drm_lspcon_mode *mode}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjhubah}(h]h ]h"]h$]h&]uh1j_ hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjhubj| )}(hhh]h)}(h0current lspcon mode of operation output variableh]h0current lspcon mode of operation output variable}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjhubah}(h]h ]h"]h$]h&]uh1j{ hjhubeh}(h]h ]h"]h$]h&]uh1jY hjhhMhj&hubeh}(h]h ]h"]h$]h&]uh1jT hj hubh)}(h **Return**h]j )}(hjhh]hReturn}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj hubh)}(hO0 on success, sets the current_mode value to appropriate mode -error on failureh]hO0 on success, sets the current_mode value to appropriate mode -error on failure}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj hubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjLhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_lspcon_set_mode (C function)c.drm_lspcon_set_modehNtauh1jd hjLhhhNhNubjw )}(hhh](j| )}(h|int drm_lspcon_set_mode (const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h]j )}(h{int drm_lspcon_set_mode(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h](j)}(hinth]hint}(hj@ihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuh1hhjlhhhhhM(ubh)}(hhh](h)}(hOverviewh]hOverview}(hjlhhhNhNubah}(h]h ]h"]h$]h&]hj]uh1hhjlhhhhhM+ubh)}(hThese functions contain parts of the DisplayPort 1.2a MultiStream Transport protocol. The helpers contain a topology manager and bandwidth manager. The helpers encapsulate the sending and received of sideband msgs.h]hThese functions contain parts of the DisplayPort 1.2a MultiStream Transport protocol. The helpers contain a topology manager and bandwidth manager. The helpers encapsulate the sending and received of sideband msgs.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:301: ./drivers/gpu/drm/display/drm_dp_mst_topology.chK6hjlhhubh)}(hhh](h)}(hTopology refcount overviewh]hTopology refcount overview}(hjlhhhNhNubah}(h]h ]h"]h$]h&]hj|uh1hhjlhNhNubh)}(hXThe refcounting schemes for :c:type:`struct drm_dp_mst_branch ` and :c:type:`struct drm_dp_mst_port ` are somewhat unusual. Both ports and branch devices have two different kinds of refcounts: topology refcounts, and malloc refcounts.h](hThe refcounting schemes for }(hjlhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hjlh]hstruct drm_dp_mst_branch}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMVhjlubh and }(hjlhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hj mh]hstruct drm_dp_mst_port}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj mubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjmhMVhjlubh are somewhat unusual. Both ports and branch devices have two different kinds of refcounts: topology refcounts, and malloc refcounts.}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjmhMVhjlubh)}(hXQTopology refcounts are not exposed to drivers, and are handled internally by the DP MST helpers. The helpers use them in order to prevent the in-memory topology state from being changed in the middle of critical operations like changing the internal state of payload allocations. This means each branch and port will be considered to be connected to the rest of the topology until its topology refcount reaches zero. Additionally, for ports this means that their associated :c:type:`struct drm_connector ` will stay registered with userspace until the port's refcount reaches 0.h](hXTopology refcounts are not exposed to drivers, and are handled internally by the DP MST helpers. The helpers use them in order to prevent the in-memory topology state from being changed in the middle of critical operations like changing the internal state of payload allocations. This means each branch and port will be considered to be connected to the rest of the topology until its topology refcount reaches zero. Additionally, for ports this means that their associated }(hj3mhhhNhNubh)}(h.:c:type:`struct drm_connector `h]jf )}(hj=mh]hstruct drm_connector}(hj?mhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj;mubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMZhj3mubhK will stay registered with userspace until the port’s refcount reaches 0.}(hj3mhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZmhMZhjlubeh}(h]jah ]h"]topology refcount overviewah$]h&]uh1hhjlhhhNhNubh)}(hhh](h)}(hMalloc refcount overviewh]hMalloc refcount overview}(hjomhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjlmhNhNubh)}(hX?Malloc references are used to keep a :c:type:`struct drm_dp_mst_port ` or :c:type:`struct drm_dp_mst_branch ` allocated even after all of its topology references have been dropped, so that the driver or MST helpers can safely access each branch's last known state before it was disconnected from the topology. When the malloc refcount of a port or branch reaches 0, the memory allocation containing the :c:type:`struct drm_dp_mst_branch ` or :c:type:`struct drm_dp_mst_port ` respectively will be freed.h](h%Malloc references are used to keep a }(hj}mhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hjmh]hstruct drm_dp_mst_port}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMfhj}mubh or }(hj}mhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hjmh]hstruct drm_dp_mst_branch}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjmhMfhj}mubhX( allocated even after all of its topology references have been dropped, so that the driver or MST helpers can safely access each branch’s last known state before it was disconnected from the topology. When the malloc refcount of a port or branch reaches 0, the memory allocation containing the }(hj}mhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hjmh]hstruct drm_dp_mst_branch}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjmhMfhj}mubh or }hj}msbh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hjmh]hstruct drm_dp_mst_port}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjmhMfhj}mubh respectively will be freed.}(hj}mhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjmhMfhjlmubh)}(hXFor :c:type:`struct drm_dp_mst_branch `, malloc refcounts are not currently exposed to drivers. As of writing this documentation, there are no drivers that have a usecase for accessing :c:type:`struct drm_dp_mst_branch ` outside of the MST helpers. Exposing this API to drivers in a race-free manner would take more tweaking of the refcounting scheme, however patches are welcome provided there is a legitimate driver usecase for this.h](hFor }(hjnhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hj"nh]hstruct drm_dp_mst_branch}(hj$nhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj nubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMnhjnubh, malloc refcounts are not currently exposed to drivers. As of writing this documentation, there are no drivers that have a usecase for accessing }(hjnhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hjFnh]hstruct drm_dp_mst_branch}(hjHnhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDnubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhj?nhMnhjnubh outside of the MST helpers. Exposing this API to drivers in a race-free manner would take more tweaking of the refcounting scheme, however patches are welcome provided there is a legitimate driver usecase for this.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?nhMnhjlmubeh}(h]jah ]h"]malloc refcount overviewah$]h&]uh1hhjlhhhNhNubh)}(hhh](h)}(h$Refcount relationships in a topologyh]h$Refcount relationships in a topology}(hjwnhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjtnhNhNubh)}(hjLet's take a look at why the relationship between topology and malloc refcounts is designed the way it is.h]hlLet’s take a look at why the relationship between topology and malloc refcounts is designed the way it is.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjtnubkfigure kernel_figure)}(hhh]hfigure)}(hhh](himage)}(hX.. kernel-figure:: dp-mst/topology-figure-1.dot An example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure. h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-1.dot candidates}jOjnsuh1jnhjnhhhKubhcaption)}(hXAn example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure.h]hXAn example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jnhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM}hjnubeh}(h]id5ah ]h"]h$]h&]uh1jnhjnubah}(h]h ]h"]h$]h&]uh1jnhjtnubh)}(hAs you can see in the above figure, every branch increments the topology refcount of its children, and increments the malloc refcount of its parent. Additionally, every payload increments the malloc refcount of its assigned port by 1.h]hAs you can see in the above figure, every branch increments the topology refcount of its children, and increments the malloc refcount of its parent. Additionally, every payload increments the malloc refcount of its assigned port by 1.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjtnubh)}(hSo, what would happen if MSTB #3 from the above figure was unplugged from the system, but the driver hadn't yet removed payload #2 from port #3? The topology would start to look like the figure below.h]hSo, what would happen if MSTB #3 from the above figure was unplugged from the system, but the driver hadn’t yet removed payload #2 from port #3? The topology would start to look like the figure below.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjtnubjn)}(hhh]jn)}(hhh](jn)}(h.. kernel-figure:: dp-mst/topology-figure-2.dot Ports and branch devices which have been released from memory are colored grey, and references which have been removed are colored red. h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-2.dotjn}jOjnsuh1jnhjnhhhKubjn)}(hPorts and branch devices which have been released from memory are colored grey, and references which have been removed are colored red.h]hPorts and branch devices which have been released from memory are colored grey, and references which have been removed are colored red.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jnhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjnubeh}(h]id6ah ]h"]h$]h&]uh1jnhjnubah}(h]h ]h"]h$]h&]uh1jnhjtnubh)}(hXWhenever a port or branch device's topology refcount reaches zero, it will decrement the topology refcounts of all its children, the malloc refcount of its parent, and finally its own malloc refcount. For MSTB #4 and port #4, this means they both have been disconnected from the topology and freed from memory. But, because payload #2 is still holding a reference to port #3, port #3 is removed from the topology but its :c:type:`struct drm_dp_mst_port ` is still accessible from memory. This also means port #3 has not yet decremented the malloc refcount of MSTB #3, so its :c:type:`struct drm_dp_mst_branch ` will also stay allocated in memory until port #3's malloc refcount reaches 0.h](hXWhenever a port or branch device’s topology refcount reaches zero, it will decrement the topology refcounts of all its children, the malloc refcount of its parent, and finally its own malloc refcount. For MSTB #4 and port #4, this means they both have been disconnected from the topology and freed from memory. But, because payload #2 is still holding a reference to port #3, port #3 is removed from the topology but its }(hjohhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hj$oh]hstruct drm_dp_mst_port}(hj&ohhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj"oubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjoubhy is still accessible from memory. This also means port #3 has not yet decremented the malloc refcount of MSTB #3, so its }(hjohhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hjHoh]hstruct drm_dp_mst_branch}(hjJohhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjFoubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjAohMhjoubhP will also stay allocated in memory until port #3’s malloc refcount reaches 0.}(hjohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAohMhjtnubh)}(hThis relationship is necessary because in order to release payload #2, we need to be able to figure out the last relative of port #3 that's still connected to the topology. In this case, we would travel up the topology as shown below.h]hThis relationship is necessary because in order to release payload #2, we need to be able to figure out the last relative of port #3 that’s still connected to the topology. In this case, we would travel up the topology as shown below.}(hjoohhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjtnubjn)}(hhh]jn)}(hhh]jn)}(h0.. kernel-figure:: dp-mst/topology-figure-3.dot h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-3.dotjn}jOjosuh1jnhjohhhKubah}(h]h ]h"]h$]h&]uh1jnhj~oubah}(h]h ]h"]h$]h&]uh1jnhjtnubh)}(h[And finally, remove payload #2 by communicating with port #2 through sideband transactions.h]h[And finally, remove payload #2 by communicating with port #2 through sideband transactions.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:304: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjtnubeh}(h]jah ]h"]$refcount relationships in a topologyah$]h&]uh1hhjlhhhNhNubeh}(h]jcah ]h"]h$]overviewah&]uh1hhjlhhhhhM+jbCKubh)}(hhh](h)}(hFunctions Referenceh]hFunctions Reference}(hjohhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjohhhhhM4ubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_mst_port (C struct)c.drm_dp_mst_porthNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hdrm_dp_mst_porth]j )}(hstruct drm_dp_mst_porth](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhjohKubj )}(hdrm_dp_mst_porth]j )}(hjoh]hdrm_dp_mst_port}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ](j j eh"]h$]h&]j j uh1j hjohhhjohKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjohhhjohKubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j{ hjohKhjohhubj )}(hhh]h)}(hMST porth]hMST port}(hj&phhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKpj j>pj j j uh1jv hhhjohNhNubj )}(hX**Definition**:: struct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; }; **Members** ``topology_kref`` refcount for this port's lifetime in the topology, only the DP MST helpers should need to touch this ``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc(). ``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. ``port_num`` port number ``input`` if this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``mcs`` message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``ddps`` DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``pdt`` Peer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``ldps`` Legacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``dpcd_rev`` DPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``num_sdp_streams`` Number of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``num_sdp_stream_sinks`` Number of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``full_pbn`` Max possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``next`` link to next port on this branch device ``mstb`` the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `. ``aux`` i2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``passthrough_aux`` parent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible. ``parent`` branch device parent of this port ``connector`` DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``mgr`` topology manager this port lives under. ``cached_edid`` for DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately. ``fec_capable`` bool indicating if FEC can be supported up to that point in the MST topology.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjJphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFpubh:}(hjFphhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhK@hjBpubj, )}(hXstruct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; };h]hXstruct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; };}hjcpsbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKBhjBpubh)}(h **Members**h]j )}(hjtph]hMembers}(hjvphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrpubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhK]hjBpubjU )}(hhh](jZ )}(hw``topology_kref`` refcount for this port's lifetime in the topology, only the DP MST helpers should need to touch this h](j` )}(h``topology_kref``h]jf )}(hjph]h topology_kref}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKahjpubj| )}(hhh]h)}(hdrefcount for this port's lifetime in the topology, only the DP MST helpers should need to touch thish]hfrefcount for this port’s lifetime in the topology, only the DP MST helpers should need to touch this}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhK`hjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphKahjpubjZ )}(h``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc(). h](j` )}(h``malloc_kref``h]jf )}(hjph]h malloc_kref}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhhjpubj| )}(hhh]h)}(hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc().h]hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc().}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKfhjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphKhhjpubjZ )}(hv``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. h](j` )}(h``topology_ref_history``h]jf )}(hjqh]htopology_ref_history}(hj qhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKohjqubj| )}(hhh]h)}(h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.h]h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.}(hj qhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKnhjqubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjqhKohjpubjZ )}(h``port_num`` port number h](j` )}(h ``port_num``h]jf )}(hjAqh]hport_num}(hjCqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?qubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhK>hj;qubj| )}(hhh]h)}(h port numberh]h port number}(hjZqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVqhK>hjWqubah}(h]h ]h"]h$]h&]uh1j{ hj;qubeh}(h]h ]h"]h$]h&]uh1jY hjVqhK>hjpubjZ )}(h}``input`` if this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h ``input``h]jf )}(hjzqh]hinput}(hj|qhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjxqubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhK@hjtqubj| )}(hhh]h)}(hrif this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h,if this port is an input port. Protected by }(hjqhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjqh]hdrm_dp_mst_topology_mgr.base}(hjqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhK?hjqubh.lock.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhK?hjqubah}(h]h ]h"]h$]h&]uh1j{ hjtqubeh}(h]h ]h"]h$]h&]uh1jY hjqhK@hjpubjZ )}(h``mcs`` message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h``mcs``h]jf )}(hjqh]hmcs}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKBhjqubj| )}(hhh]h)}(h|message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6message capability status - DP 1.2 spec. Protected by }(hjqhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjqh]hdrm_dp_mst_topology_mgr.base}(hjqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKAhjqubh.lock.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjrhKAhjqubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjqhKBhjpubjZ )}(h``ddps`` DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h``ddps``h]jf )}(hj4rh]hddps}(hj6rhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2rubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKDhj.rubj| )}(hhh]h)}(h|DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6DisplayPort Device Plug Status - DP 1.2. Protected by }(hjMrhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjWrh]hdrm_dp_mst_topology_mgr.base}(hjYrhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjUrubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKChjMrubh.lock.}(hjMrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjtrhKChjJrubah}(h]h ]h"]h$]h&]uh1j{ hj.rubeh}(h]h ]h"]h$]h&]uh1jY hjIrhKDhjpubjZ )}(hn``pdt`` Peer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h``pdt``h]jf )}(hjrh]hpdt}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKFhjrubj| )}(hhh]h)}(hePeer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](hPeer Device Type. Protected by }(hjrhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjrh]hdrm_dp_mst_topology_mgr.base}(hjrhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKEhjrubh.lock.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjrhKEhjrubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjrhKFhjpubjZ )}(hx``ldps`` Legacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h``ldps``h]jf )}(hjrh]hldps}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKHhjrubj| )}(hhh]h)}(hnLegacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h(Legacy Device Plug Status. Protected by }(hjshhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjsh]hdrm_dp_mst_topology_mgr.base}(hjshhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKGhjsubh.lock.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj.shKGhjsubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjshKHhjpubjZ )}(h``dpcd_rev`` DPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h ``dpcd_rev``h]jf )}(hjKsh]hdpcd_rev}(hjMshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIsubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKJhjEsubj| )}(hhh]h)}(hyDPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h3DPCD revision of device on this port. Protected by }(hjdshhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjnsh]hdrm_dp_mst_topology_mgr.base}(hjpshhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjlsubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKIhjdsubh.lock.}(hjdshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjshKIhjasubah}(h]h ]h"]h$]h&]uh1j{ hjEsubeh}(h]h ]h"]h$]h&]uh1jY hj`shKJhjpubjZ )}(h``num_sdp_streams`` Number of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h``num_sdp_streams``h]jf )}(hjsh]hnum_sdp_streams}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKLhjsubj| )}(hhh]h)}(hsNumber of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h-Number of simultaneous streams. Protected by }(hjshhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjsh]hdrm_dp_mst_topology_mgr.base}(hjshhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKKhjsubh.lock.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjshKKhjsubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjshKLhjpubjZ )}(h``num_sdp_stream_sinks`` Number of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h``num_sdp_stream_sinks``h]jf )}(hjth]hnum_sdp_stream_sinks}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKNhjsubj| )}(hhh]h)}(hkNumber of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h%Number of stream sinks. Protected by }(hjthhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hj(th]hdrm_dp_mst_topology_mgr.base}(hj*thhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj&tubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKMhjtubh.lock.}(hjthhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEthKMhjtubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjthKNhjpubjZ )}(h``full_pbn`` Max possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h ``full_pbn``h]jf )}(hjbth]hfull_pbn}(hjdthhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`tubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKPhj\tubj| )}(hhh]h)}(hyMax possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h3Max possible bandwidth for this port. Protected by }(hj{thhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjth]hdrm_dp_mst_topology_mgr.base}(hjthhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKOhj{tubh.lock.}(hj{thhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjthKOhjxtubah}(h]h ]h"]h$]h&]uh1j{ hj\tubeh}(h]h ]h"]h$]h&]uh1jY hjwthKPhjpubjZ )}(h1``next`` link to next port on this branch device h](j` )}(h``next``h]jf )}(hjth]hnext}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKQhjtubj| )}(hhh]h)}(h'link to next port on this branch deviceh]h'link to next port on this branch device}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthKQhjtubah}(h]h ]h"]h$]h&]uh1j{ hjtubeh}(h]h ]h"]h$]h&]uh1jY hjthKQhjpubjZ )}(hXg``mstb`` the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `. h](j` )}(h``mstb``h]jf )}(hjth]hmstb}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjtubj| )}(hhh]h)}(hX]the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `.h](hnthe branch device connected to this port, if there is one. This should be considered protected for reading by }(hjuhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jf )}(hjuh]hdrm_dp_mst_topology_mgr.lock}(hjuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjuubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjuubh$. There are two exceptions to this: }(hjuhhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.up_req_work `h]jf )}(hj?uh]h#drm_dp_mst_topology_mgr.up_req_work}(hjAuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj=uubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj8uhKhjuubh and }(hjuhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.work `h]jf )}(hjbuh]hdrm_dp_mst_topology_mgr.work}(hjduhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj`uubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj8uhKhjuubh, which do not grab }(hjuhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jf )}(hjuh]hdrm_dp_mst_topology_mgr.lock}(hjuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjuubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj8uhKhjuubhd during reads but are the only updaters of this list and are protected from writing concurrently by }(hjuhhhNhNubh)}(hF:c:type:`drm_dp_mst_topology_mgr.probe_lock `h]jf )}(hjuh]h"drm_dp_mst_topology_mgr.probe_lock}(hjuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjuubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj8uhKhjuubh.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8uhKhjuubah}(h]h ]h"]h$]h&]uh1j{ hjtubeh}(h]h ]h"]h$]h&]uh1jY hj uhKhjpubjZ )}(h``aux`` i2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j` )}(h``aux``h]jf )}(hjuh]haux}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjuubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKShjuubj| )}(hhh]h)}(hi2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](hIi2c aux transport to talk to device connected to this port, protected by }(hjuhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjvh]hdrm_dp_mst_topology_mgr.base}(hjvhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKRhjuubh.lock.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!vhKRhjuubah}(h]h ]h"]h$]h&]uh1j{ hjuubeh}(h]h ]h"]h$]h&]uh1jY hjuhKShjpubjZ )}(h|``passthrough_aux`` parent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible. h](j` )}(h``passthrough_aux``h]jf )}(hj>vh]hpassthrough_aux}(hj@vhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`.lock. h](j` )}(h ``connector``h]jf )}(hjvh]h connector}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKXhjvubj| )}(hhh]h)}(h|DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6DRM connector this port is connected to. Protected by }(hjvhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jf )}(hjvh]hdrm_dp_mst_topology_mgr.base}(hjvhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKWhjvubh.lock.}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjvhKWhjvubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjvhKXhjpubjZ )}(h0``mgr`` topology manager this port lives under. h](j` )}(h``mgr``h]jf )}(hjwh]hmgr}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj wubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKYhjwubj| )}(hhh]h)}(h'topology manager this port lives under.h]h'topology manager this port lives under.}(hj'whhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#whKYhj$wubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hj#whKYhjpubjZ )}(hz``cached_edid`` for DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately. h](j` )}(h``cached_edid``h]jf )}(hjGwh]h cached_edid}(hjIwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEwubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjAwubj| )}(hhh]h)}(hifor DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately.h]hifor DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately.}(hj`whhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj]wubah}(h]h ]h"]h$]h&]uh1j{ hjAwubeh}(h]h ]h"]h$]h&]uh1jY hj\whKhjpubjZ )}(h]``fec_capable`` bool indicating if FEC can be supported up to that point in the MST topology.h](j` )}(h``fec_capable``h]jf )}(hjwh]h fec_capable}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj{wubj| )}(hhh]h)}(hMbool indicating if FEC can be supported up to that point in the MST topology.h]hMbool indicating if FEC can be supported up to that point in the MST topology.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhKhjwubah}(h]h ]h"]h$]h&]uh1j{ hj{wubeh}(h]h ]h"]h$]h&]uh1jY hjwhKhjpubeh}(h]h ]h"]h$]h&]uh1jT hjBpubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubh)}(h**Description**h]j )}(hjwh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjohhubh)}(hYThis structure represents an MST port endpoint on a device somewhere in the MST topology.h]hYThis structure represents an MST port endpoint on a device somewhere in the MST topology.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKYhjohhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_mst_branch (C struct)c.drm_dp_mst_branchhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hdrm_dp_mst_branchh]j )}(hstruct drm_dp_mst_branchh](j )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhK_ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhjxhK_ubj )}(hdrm_dp_mst_branchh]j )}(hjwh]hdrm_dp_mst_branch}(hj!xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ](j j eh"]h$]h&]j j uh1j hjwhhhjxhK_ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjwhhhjxhK_ubah}(h]jwah ](j j eh"]h$]h&]j j )j huh1j{ hjxhK_hjwhhubj )}(hhh]h)}(hMST branch device.h]hMST branch device.}(hjCxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj@xhhubah}(h]h ]h"]h$]h&]uh1j hjwhhhjxhK_ubeh}(h]h ](j structeh"]h$]h&]j j j j[xj j[xj j j uh1jv hhhjohNhNubj )}(hX) **Definition**:: struct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; }; **Members** ``topology_kref`` refcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch this ``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc(). ``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. ``destroy_next`` linked-list entry used by drm_dp_delayed_destroy_work() ``rad`` Relative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second. ``lct`` Link count total to talk to this branch device. ``num_ports`` number of ports on the branch. ``ports`` the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock** ``port_parent`` pointer to the port parent, NULL if toplevel. ``mgr`` topology manager for this branch device. ``link_address_sent`` if a link address message has been sent to this device yet. ``guid`` guid for DP 1.2 branch device. port under this branch can be identified by port #.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjgxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcxubh:}(hjcxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj_xubj, )}(hXstruct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; };h]hXstruct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; };}hjxsbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj_xubh)}(h **Members**h]j )}(hjxh]hMembers}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj_xubjU )}(hhh](jZ )}(h``topology_kref`` refcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch this h](j` )}(h``topology_kref``h]jf )}(hjxh]h topology_kref}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjxubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjxubj| )}(hhh]h)}(hmrefcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch thish]horefcount for this branch device’s lifetime in the topology, only the DP MST helpers should need to touch this}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjxubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjxhKhjxubjZ )}(h``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc(). h](j` )}(h``malloc_kref``h]jf )}(hjxh]h malloc_kref}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjxubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjxubj| )}(hhh]h)}(hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc().h]hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc().}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjyubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjxhKhjxubjZ )}(hv``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. h](j` )}(h``topology_ref_history``h]jf )}(hj$yh]htopology_ref_history}(hj&yhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"yubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjyubj| )}(hhh]h)}(h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.h]h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.}(hj=yhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj:yubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hj9yhKhjxubjZ )}(hI``destroy_next`` linked-list entry used by drm_dp_delayed_destroy_work() h](j` )}(h``destroy_next``h]jf )}(hj^yh]h destroy_next}(hj`yhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\yubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjXyubj| )}(hhh]h)}(h7linked-list entry used by drm_dp_delayed_destroy_work()h]h7linked-list entry used by drm_dp_delayed_destroy_work()}(hjwyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjtyubah}(h]h ]h"]h$]h&]uh1j{ hjXyubeh}(h]h ]h"]h$]h&]uh1jY hjsyhKhjxubjZ )}(hXN``rad`` Relative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second. h](j` )}(h``rad``h]jf )}(hjyh]hrad}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjyubj| )}(hhh]h)}(hXERelative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second.h](h(Relative Address of the MST branch. For }(hjyhhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.mst_primary `h]jf )}(hjyh]h#drm_dp_mst_topology_mgr.mst_primary}(hjyhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjyubh, it’s rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second.}(hjyhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjyhKhjyubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjyhKhjxubjZ )}(h8``lct`` Link count total to talk to this branch device. h](j` )}(h``lct``h]jf )}(hjyh]hlct}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjyubj| )}(hhh]h)}(h/Link count total to talk to this branch device.h]h/Link count total to talk to this branch device.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj zhKhj zubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hj zhKhjxubjZ )}(h-``num_ports`` number of ports on the branch. h](j` )}(h ``num_ports``h]jf )}(hj.zh]h num_ports}(hj0zhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,zubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj(zubj| )}(hhh]h)}(hnumber of ports on the branch.h]hnumber of ports on the branch.}(hjGzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjCzhKhjDzubah}(h]h ]h"]h$]h&]uh1j{ hj(zubeh}(h]h ]h"]h$]h&]uh1jY hjCzhKhjxubjZ )}(hX?``ports`` the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock** h](j` )}(h ``ports``h]jf )}(hjgzh]hports}(hjizhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjezubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjazubj| )}(hhh]h)}(hX4the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock**h](h\the list of ports on this branch device. This should be considered protected for reading by }(hjzhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jf )}(hjzh]hdrm_dp_mst_topology_mgr.lock}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjzubh$. There are two exceptions to this: }(hjzhhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.up_req_work `h]jf )}(hjzh]h#drm_dp_mst_topology_mgr.up_req_work}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjzhKhjzubh and }(hjzhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.work `h]jf )}(hjzh]hdrm_dp_mst_topology_mgr.work}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjzhKhjzubh, which do not grab }(hjzhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jf )}(hjzh]hdrm_dp_mst_topology_mgr.lock}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjzhKhjzubhn during reads but are the only updaters of this list and are protected from updating the list concurrently by }(hjzhhhNhNubj )}(h&**drm_dp_mst_topology_mgr.probe_lock**h]h"drm_dp_mst_topology_mgr.probe_lock}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1hhjzhKhj}zubah}(h]h ]h"]h$]h&]uh1j{ hjazubeh}(h]h ]h"]h$]h&]uh1jY hj|zhKhjxubjZ )}(h>``port_parent`` pointer to the port parent, NULL if toplevel. h](j` )}(h``port_parent``h]jf )}(hj;{h]h port_parent}(hj={hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj5{ubj| )}(hhh]h)}(h-pointer to the port parent, NULL if toplevel.h]h-pointer to the port parent, NULL if toplevel.}(hjT{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjP{hKhjQ{ubah}(h]h ]h"]h$]h&]uh1j{ hj5{ubeh}(h]h ]h"]h$]h&]uh1jY hjP{hKhjxubjZ )}(h1``mgr`` topology manager for this branch device. h](j` )}(h``mgr``h]jf )}(hjt{h]hmgr}(hjv{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjr{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjn{ubj| )}(hhh]h)}(h(topology manager for this branch device.h]h(topology manager for this branch device.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hKhj{ubah}(h]h ]h"]h$]h&]uh1j{ hjn{ubeh}(h]h ]h"]h$]h&]uh1jY hj{hKhjxubjZ )}(hR``link_address_sent`` if a link address message has been sent to this device yet. h](j` )}(h``link_address_sent``h]jf )}(hj{h]hlink_address_sent}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj{ubj| )}(hhh]h)}(h;if a link address message has been sent to this device yet.h]h;if a link address message has been sent to this device yet.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hKhj{ubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hj{hKhjxubjZ )}(h[``guid`` guid for DP 1.2 branch device. port under this branch can be identified by port #.h](j` )}(h``guid``h]jf )}(hj{h]hguid}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhj{ubj| )}(hhh]h)}(hRguid for DP 1.2 branch device. port under this branch can be identified by port #.h]hRguid for DP 1.2 branch device. port under this branch can be identified by port #.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hKhj{ubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hj{hKhjxubeh}(h]h ]h"]h$]h&]uh1jT hj_xubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubh)}(h**Description**h]j )}(hj(|h]h Description}(hj*|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&|ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjohhubh)}(hThis structure represents an MST branch device, there is one primary branch device at the root, along with any other branches connected to downstream port of parent branches.h]hThis structure represents an MST branch device, there is one primary branch device at the root, along with any other branches connected to downstream port of parent branches.}(hj>|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKhjohhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_mst_atomic_payload (C struct)c.drm_dp_mst_atomic_payloadhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hdrm_dp_mst_atomic_payloadh]j )}(h struct drm_dp_mst_atomic_payloadh](j )}(hj h]hstruct}(hjf|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjb|hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhKubj )}(h h]h }(hjt|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjb|hhhjs|hKubj )}(hdrm_dp_mst_atomic_payloadh]j )}(hj`|h]hdrm_dp_mst_atomic_payload}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjb|hhhjs|hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^|hhhjs|hKubah}(h]jY|ah ](j j eh"]h$]h&]j j )j huh1j{ hjs|hKhj[|hhubj )}(hhh]h)}(h&Atomic state struct for an MST payloadh]h&Atomic state struct for an MST payload}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj|hhubah}(h]h ]h"]h$]h&]uh1j hj[|hhhjs|hKubeh}(h]h ](j structeh"]h$]h&]j j j j|j j|j j j uh1jv hhhjohNhNubj )}(hX **Definition**:: struct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; }; **Members** ``port`` The MST port assigned to this payload ``vc_start_slot`` The time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations. Since this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either: * Read this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called. * Acquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. If neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads. ``vcpi`` The Virtual Channel Payload Identifier ``time_slots`` The number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx ``pbn`` The payload bandwidth for this payload ``delete`` Whether or not we intend to delete this payload during this atomic commit ``dsc_enabled`` Whether or not this payload has DSC enabled ``payload_allocation_status`` The allocation status of this payload ``next`` The list node for this payloadh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubh:}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj|ubj, )}(hXstruct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; };h]hXstruct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; };}hj|sbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj|ubh)}(h **Members**h]j )}(hj|h]hMembers}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM$hj|ubjU )}(hhh](jZ )}(h/``port`` The MST port assigned to this payload h](j` )}(h``port``h]jf )}(hj}h]hport}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj}ubj| )}(hhh]h)}(h%The MST port assigned to this payloadh]h%The MST port assigned to this payload}(hj.}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*}hMhj+}ubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hj*}hMhj }ubjZ )}(hX``vc_start_slot`` The time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations. Since this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either: * Read this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called. * Acquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. If neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads. h](j` )}(h``vc_start_slot``h]jf )}(hjN}h]h vc_start_slot}(hjP}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjL}ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM2hjH}ubj| )}(hhh](h)}(hXThe time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations.h]hXThe time slot that this payload starts on. Because payload start slots can’t be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn’t usually matter, as the start slot should never be relevant for atomic state computations.}(hjg}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjd}ubh)}(hXSSince this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either:h]hXSSince this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either:}(hjv}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM"hjd}ubh)}(hhh](h)}(hXgRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.h]h)}(hXgRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.h]hXiRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won’t be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM'hj}ubah}(h]h ]h"]h$]h&]uh1hhj}ubh)}(hXAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. h]h)}(hXAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `.h](hAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the }(hj}hhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jf )}(hj}h]hdrm_crtc_commit}(hj}hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM,hj}ubh structs in }(hj}hhhNhNubh)}(hK:c:type:`drm_dp_mst_topology_state.commit_deps `h]jf )}(hj}h]h%drm_dp_mst_topology_state.commit_deps}(hj}hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhj}hM,hj}ubh.}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj}hM,hj}ubah}(h]h ]h"]h$]h&]uh1hhj}ubeh}(h]h ]h"]h$]h&]jNjOuh1hhj}hM'hjd}ubh)}(hIf neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads.h]hIf neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM0hjd}ubeh}(h]h ]h"]h$]h&]uh1j{ hjH}ubeh}(h]h ]h"]h$]h&]uh1jY hjc}hM2hj }ubjZ )}(h0``vcpi`` The Virtual Channel Payload Identifier h](j` )}(h``vcpi``h]jf )}(hj'~h]hvcpi}(hj)~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%~ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM6hj!~ubj| )}(hhh]h)}(h&The Virtual Channel Payload Identifierh]h&The Virtual Channel Payload Identifier}(hj@~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<~hM6hj=~ubah}(h]h ]h"]h$]h&]uh1j{ hj!~ubeh}(h]h ]h"]h$]h&]uh1jY hj<~hM6hj }ubjZ )}(hy``time_slots`` The number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx h](j` )}(h``time_slots``h]jf )}(hj`~h]h time_slots}(hjb~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^~ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM:hjZ~ubj| )}(hhh]h)}(hiThe number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rxh]hiThe number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx}(hjy~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM9hjv~ubah}(h]h ]h"]h$]h&]uh1j{ hjZ~ubeh}(h]h ]h"]h$]h&]uh1jY hju~hM:hj }ubjZ )}(h/``pbn`` The payload bandwidth for this payload h](j` )}(h``pbn``h]jf )}(hj~h]hpbn}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM>hj~ubj| )}(hhh]h)}(h&The payload bandwidth for this payloadh]h&The payload bandwidth for this payload}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hM>hj~ubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hj~hM>hj }ubjZ )}(hU``delete`` Whether or not we intend to delete this payload during this atomic commit h](j` )}(h ``delete``h]jf )}(hj~h]hdelete}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMAhj~ubj| )}(hhh]h)}(hIWhether or not we intend to delete this payload during this atomic commith]hIWhether or not we intend to delete this payload during this atomic commit}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMAhj~ubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hj~hMAhj }ubjZ )}(h<``dsc_enabled`` Whether or not this payload has DSC enabled h](j` )}(h``dsc_enabled``h]jf )}(hj h]h dsc_enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMChjubj| )}(hhh]h)}(h+Whether or not this payload has DSC enabledh]h+Whether or not this payload has DSC enabled}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMChj"ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj!hMChj }ubjZ )}(hD``payload_allocation_status`` The allocation status of this payload h](j` )}(h``payload_allocation_status``h]jf )}(hjEh]hpayload_allocation_status}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMFhj?ubj| )}(hhh]h)}(h%The allocation status of this payloadh]h%The allocation status of this payload}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMFhj[ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hjZhMFhj }ubjZ )}(h'``next`` The list node for this payloadh](j` )}(h``next``h]jf )}(hj~h]hnext}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMHhjxubj| )}(hhh]h)}(hThe list node for this payloadh]hThe list node for this payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMIhjubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjhMHhj }ubeh}(h]h ]h"]h$]h&]uh1jT hj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMLhjohhubh)}(hThe primary atomic state structure for a given MST payload. Stores information like current bandwidth allocation, intended action for this payload, etc.h]hThe primary atomic state structure for a given MST payload. Stores information like current bandwidth allocation, intended action for this payload, etc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjohhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_mst_topology_state (C struct)c.drm_dp_mst_topology_statehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hdrm_dp_mst_topology_stateh]j )}(h struct drm_dp_mst_topology_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_dp_mst_topology_stateh]j )}(hjh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(h%DisplayPort MST topology atomic stateh]h%DisplayPort MST topology atomic state}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMMhj>hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j structeh"]h$]h&]j j j jYj jYj j j uh1jv hhhjohNhNubj )}(hX**Definition**:: struct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; }; **Members** ``base`` Base private state for atomic ``mgr`` The topology manager ``pending_crtc_mask`` A bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed. ``commit_deps`` A list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called. ``num_commit_deps`` The number of CRTC commits in **commit_deps** ``payload_mask`` A bitmask of allocated VCPIs, used for VCPI assignments ``payloads`` The list of payloads being created/destroyed in this state ``total_avail_slots`` The total number of slots this topology can handle (63 or 64) ``start_slot`` The first usable time slot in this topology (1 or 0) ``pbn_div`` The current PBN divisor for this topology. The driver is expected to fill this out itself.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubh:}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMQhj]ubj, )}(hXLstruct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; };h]hXLstruct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; };}hj~sbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMShj]ubh)}(h **Members**h]j )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM`hj]ubjU )}(hhh](jZ )}(h'``base`` Base private state for atomic h](j` )}(h``base``h]jf )}(hjh]hbase}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMShjubj| )}(hhh]h)}(hBase private state for atomich]hBase private state for atomic}(hjǀhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjÀhMShjĀubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjÀhMShjubjZ )}(h``mgr`` The topology manager h](j` )}(h``mgr``h]jf )}(hjh]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMVhjubj| )}(hhh]h)}(hThe topology managerh]hThe topology manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMVhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMVhjubjZ )}(h``pending_crtc_mask`` A bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed. h](j` )}(h``pending_crtc_mask``h]jf )}(hj h]hpending_crtc_mask}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM[hjubj| )}(hhh]h)}(huA bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed.h]huA bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMZhj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hM[hjubjZ )}(h``commit_deps`` A list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called. h](j` )}(h``commit_deps``h]jf )}(hjZh]h commit_deps}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM`hjTubj| )}(hhh]h)}(hA list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called.h]hA list of all CRTC commits affecting this topology, this field isn’t populated until drm_dp_mst_atomic_wait_for_dependencies() is called.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM_hjpubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjohM`hjubjZ )}(hB``num_commit_deps`` The number of CRTC commits in **commit_deps** h](j` )}(h``num_commit_deps``h]jf )}(hjh]hnum_commit_deps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMchjubj| )}(hhh]h)}(h-The number of CRTC commits in **commit_deps**h](hThe number of CRTC commits in }(hjhhhNhNubj )}(h**commit_deps**h]h commit_deps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1hhjhMchjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMchjubjZ )}(hI``payload_mask`` A bitmask of allocated VCPIs, used for VCPI assignments h](j` )}(h``payload_mask``h]jf )}(hjہh]h payload_mask}(hj݁hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjفubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMfhjՁubj| )}(hhh]h)}(h7A bitmask of allocated VCPIs, used for VCPI assignmentsh]h7A bitmask of allocated VCPIs, used for VCPI assignments}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMfhjubah}(h]h ]h"]h$]h&]uh1j{ hjՁubeh}(h]h ]h"]h$]h&]uh1jY hjhMfhjubjZ )}(hH``payloads`` The list of payloads being created/destroyed in this state h](j` )}(h ``payloads``h]jf )}(hjh]hpayloads}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhhjubj| )}(hhh]h)}(h:The list of payloads being created/destroyed in this stateh]h:The list of payloads being created/destroyed in this state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhhj*ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj)hMhhjubjZ )}(hT``total_avail_slots`` The total number of slots this topology can handle (63 or 64) h](j` )}(h``total_avail_slots``h]jf )}(hjMh]htotal_avail_slots}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMkhjGubj| )}(hhh]h)}(h=The total number of slots this topology can handle (63 or 64)h]h=The total number of slots this topology can handle (63 or 64)}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMkhjcubah}(h]h ]h"]h$]h&]uh1j{ hjGubeh}(h]h ]h"]h$]h&]uh1jY hjbhMkhjubjZ )}(hD``start_slot`` The first usable time slot in this topology (1 or 0) h](j` )}(h``start_slot``h]jf )}(hjh]h start_slot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMmhjubj| )}(hhh]h)}(h4The first usable time slot in this topology (1 or 0)h]h4The first usable time slot in this topology (1 or 0)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMmhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMmhjubjZ )}(hf``pbn_div`` The current PBN divisor for this topology. The driver is expected to fill this out itself.h](j` )}(h ``pbn_div``h]jf )}(hjh]hpbn_div}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMqhjubj| )}(hhh]h)}(hZThe current PBN divisor for this topology. The driver is expected to fill this out itself.h]hZThe current PBN divisor for this topology. The driver is expected to fill this out itself.}(hj؂hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjԂhMqhjՂubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjԂhMqhjubeh}(h]h ]h"]h$]h&]uh1jT hj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMuhjohhubh)}(hOThis struct represents the atomic state of the toplevel DisplayPort MST managerh]hOThis struct represents the atomic state of the toplevel DisplayPort MST manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMNhjohhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_dp_mst_topology_mgr (C struct)c.drm_dp_mst_topology_mgrhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hdrm_dp_mst_topology_mgrh]j )}(hstruct drm_dp_mst_topology_mgrh](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMSubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhjLhMSubj )}(hdrm_dp_mst_topology_mgrh]j )}(hj9h]hdrm_dp_mst_topology_mgr}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;hhhjLhMSubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhjLhMSubah}(h]j2ah ](j j eh"]h$]h&]j j )j huh1j{ hjLhMShj4hhubj )}(hhh]h)}(hDisplayPort MST managerh]hDisplayPort MST manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMyhj~hhubah}(h]h ]h"]h$]h&]uh1j hj4hhhjLhMSubeh}(h]h ](j structeh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Definition**:: struct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; }; **Members** ``base`` Base private object for atomic ``dev`` device pointer for adding i2c devices etc. ``cbs`` callbacks for connector addition and destruction. ``max_dpcd_transaction_bytes`` maximum number of bytes to read/write in one go. ``aux`` AUX channel for the DP MST connector this topolgy mgr is controlling. ``max_payloads`` maximum number of payloads the GPU can generate. ``conn_base_id`` DRM connector ID this mgr is connected to. Only used to build the MST connector path value. ``up_req_recv`` Message receiver state for up requests. ``down_rep_recv`` Message receiver state for replies to down requests. ``lock`` protects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**. ``probe_lock`` Prevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology. ``mst_state`` If this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected. ``payload_id_table_cleared`` Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**. ``reset_rx_state`` The down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**. ``payload_count`` The number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. ``next_start_slot`` The starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. ``mst_primary`` Pointer to the primary/first branch device. ``dpcd`` Cache of DPCD for primary port. ``sink_count`` Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0. ``funcs`` Atomic helper callbacks ``qlock`` protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state ` ``tx_msg_downq`` List of pending down requests ``tx_waitq`` Wait to queue stall for the tx worker. ``work`` Probe work. ``tx_work`` Sideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches. ``destroy_port_list`` List of to be destroyed connectors. ``destroy_branch_device_list`` List of to be destroyed branch devices. ``delayed_destroy_lock`` Protects **destroy_port_list** and **destroy_branch_device_list**. ``delayed_destroy_wq`` Workqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it. ``delayed_destroy_work`` Work item to destroy MST port and branch devices, needed to avoid locking inversion. ``up_req_list`` List of pending up requests from the topology that need to be processed, in chronological order. ``up_req_lock`` Protects **up_req_list** ``up_req_work`` Work item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions. ``topology_ref_history_lock`` protects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM}hjubj, )}(hXstruct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; };h]hXstruct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; };}hjsbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(h **Members**h]j )}(hjσh]hMembers}(hjуhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj̓ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubjU )}(hhh](jZ )}(h(``base`` Base private object for atomic h](j` )}(h``base``h]jf )}(hjh]hbase}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hBase private object for atomich]hBase private object for atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h3``dev`` device pointer for adding i2c devices etc. h](j` )}(h``dev``h]jf )}(hj'h]hdev}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj!ubj| )}(hhh]h)}(h*device pointer for adding i2c devices etc.h]h*device pointer for adding i2c devices etc.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj=ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj<hMhjubjZ )}(h:``cbs`` callbacks for connector addition and destruction. h](j` )}(h``cbs``h]jf )}(hj`h]hcbs}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjZubj| )}(hhh]h)}(h1callbacks for connector addition and destruction.h]h1callbacks for connector addition and destruction.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjvubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjuhMhjubjZ )}(hP``max_dpcd_transaction_bytes`` maximum number of bytes to read/write in one go. h](j` )}(h``max_dpcd_transaction_bytes``h]jf )}(hjh]hmax_dpcd_transaction_bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(h0maximum number of bytes to read/write in one go.h]h0maximum number of bytes to read/write in one go.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hN``aux`` AUX channel for the DP MST connector this topolgy mgr is controlling. h](j` )}(h``aux``h]jf )}(hjӄh]haux}(hjՄhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjфubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj̈́ubj| )}(hhh]h)}(hEAUX channel for the DP MST connector this topolgy mgr is controlling.h]hEAUX channel for the DP MST connector this topolgy mgr is controlling.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj̈́ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hB``max_payloads`` maximum number of payloads the GPU can generate. h](j` )}(h``max_payloads``h]jf )}(hj h]h max_payloads}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(h0maximum number of payloads the GPU can generate.h]h0maximum number of payloads the GPU can generate.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMhj#ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj"hMhjubjZ )}(hm``conn_base_id`` DRM connector ID this mgr is connected to. Only used to build the MST connector path value. h](j` )}(h``conn_base_id``h]jf )}(hjFh]h conn_base_id}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj@ubj| )}(hhh]h)}(h[DRM connector ID this mgr is connected to. Only used to build the MST connector path value.h]h[DRM connector ID this mgr is connected to. Only used to build the MST connector path value.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj[hMhjubjZ )}(h8``up_req_recv`` Message receiver state for up requests. h](j` )}(h``up_req_recv``h]jf )}(hjh]h up_req_recv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjzubj| )}(hhh]h)}(h'Message receiver state for up requests.h]h'Message receiver state for up requests.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjzubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hG``down_rep_recv`` Message receiver state for replies to down requests. h](j` )}(h``down_rep_recv``h]jf )}(hjh]h down_rep_recv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(h4Message receiver state for replies to down requests.h]h4Message receiver state for replies to down requests.}(hj҅hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjυubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj΅hMhjubjZ )}(h^``lock`` protects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**. h](j` )}(h``lock``h]jf )}(hjh]hlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hTprotects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**.h](h protects }(hj hhhNhNubj )}(h **mst_state**h]h mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh, }(hj hhhNhNubj )}(h**mst_primary**h]h mst_primary}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh, }hj sbj )}(h**dpcd**h]hdpcd}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh, and }(hj hhhNhNubj )}(h**payload_id_table_cleared**h]hpayload_id_table_cleared}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``probe_lock`` Prevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology. h](j` )}(h``probe_lock``h]jf )}(hjuh]h probe_lock}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjoubj| )}(hhh]h)}(hPrevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology.h](h Prevents }(hjhhhNhNubj )}(h**work**h]hwork}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h**up_req_work**h]h up_req_work}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, the only writers of }(hjhhhNhNubh)}(h0:c:type:`drm_dp_mst_port.mstb `h]jf )}(hjh]hdrm_dp_mst_port.mstb}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubh and }hjsbh)}(h5:c:type:`drm_dp_mst_branch.ports `h]jf )}(hjh]hdrm_dp_mst_branch.ports}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjކubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjنhMhjubh-, from racing while they update the topology.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjنhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjoubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(ht``mst_state`` If this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected. h](j` )}(h ``mst_state``h]jf )}(hjh]h mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(heIf this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected.h]heIf this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj/ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj.hMhjubjZ )}(h{``payload_id_table_cleared`` Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**. h](j` )}(h``payload_id_table_cleared``h]jf )}(hjSh]hpayload_id_table_cleared}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjMubj| )}(hhh]h)}(h]Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**.h](h8Whether or not we’ve cleared the payload ID table for }(hjlhhhNhNubj )}(h**mst_primary**h]h mst_primary}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubh. Protected by }(hjlhhhNhNubj )}(h**lock**h]hlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubh.}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjiubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjhhMhjubjZ )}(h``reset_rx_state`` The down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**. h](j` )}(h``reset_rx_state``h]jf )}(hjh]hreset_rx_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hThe down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**.h](hThe down request’s reply and up request message receiver state must be reset, after the topology manager got removed. Protected by }(hjʇhhhNhNubj )}(h**lock**h]hlock}(hj҇hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjʇubh.}(hjʇhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjLJubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjƇhMhjubjZ )}(h``payload_count`` The number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. h](j` )}(h``payload_count``h]jf )}(hjh]h payload_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hThe number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.h]hThe number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``next_start_slot`` The starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. h](j` )}(h``next_start_slot``h]jf )}(hj7h]hnext_start_slot}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj1ubj| )}(hhh]h)}(hThe starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.h]hThe starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjMubah}(h]h ]h"]h$]h&]uh1j{ hj1ubeh}(h]h ]h"]h$]h&]uh1jY hjLhMhjubjZ )}(h<``mst_primary`` Pointer to the primary/first branch device. h](j` )}(h``mst_primary``h]jf )}(hjqh]h mst_primary}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjkubj| )}(hhh]h)}(h+Pointer to the primary/first branch device.h]h+Pointer to the primary/first branch device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h)``dpcd`` Cache of DPCD for primary port. h](j` )}(h``dpcd``h]jf )}(hjh]hdpcd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hCache of DPCD for primary port.h]hCache of DPCD for primary port.}(hjÈhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h?``sink_count`` Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0. h](j` )}(h``sink_count``h]jf )}(hjh]h sink_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj݈ubj| )}(hhh]h)}(h/Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.h]h/Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj݈ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h"``funcs`` Atomic helper callbacks h](j` )}(h ``funcs``h]jf )}(hjh]hfuncs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hAtomic helper callbacksh]hAtomic helper callbacks}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hMhjubjZ )}(hh``qlock`` protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state ` h](j` )}(h ``qlock``h]jf )}(hjUh]hqlock}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjOubj| )}(hhh]h)}(h]protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state `h](h protects }(hjnhhhNhNubj )}(h**tx_msg_downq**h]h tx_msg_downq}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubh and }(hjnhhhNhNubh)}(h?:c:type:`drm_dp_sideband_msg_tx.state `h]jf )}(hjh]hdrm_dp_sideband_msg_tx.state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_sideband_msg_txuh1hhjjhMhjnubeh}(h]h ]h"]h$]h&]uh1hhjjhMhjkubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjjhMhjubjZ )}(h/``tx_msg_downq`` List of pending down requests h](j` )}(h``tx_msg_downq``h]jf )}(hjh]h tx_msg_downq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hList of pending down requestsh]hList of pending down requests}(hj؉hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjԉhMhjՉubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjԉhMhjubjZ )}(h4``tx_waitq`` Wait to queue stall for the tx worker. h](j` )}(h ``tx_waitq``h]jf )}(hjh]htx_waitq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(h&Wait to queue stall for the tx worker.h]h&Wait to queue stall for the tx worker.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjubjZ )}(h``work`` Probe work. h](j` )}(h``work``h]jf )}(hj1h]hwork}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj+ubj| )}(hhh]h)}(h Probe work.h]h Probe work.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjGubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hjFhMhjubjZ )}(h|``tx_work`` Sideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches. h](j` )}(h ``tx_work``h]jf )}(hjjh]htx_work}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjhubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjdubj| )}(hhh]h)}(hoSideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches.h](h8Sideband transmit worker. This can nest within the main }(hjhhhNhNubj )}(h**work**h]hwork}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh worker for each transaction }(hjhhhNhNubj )}(h**work**h]hwork}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh launches.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjdubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h:``destroy_port_list`` List of to be destroyed connectors. h](j` )}(h``destroy_port_list``h]jf )}(hjȊh]hdestroy_port_list}(hjʊhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjƊubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjŠubj| )}(hhh]h)}(h#List of to be destroyed connectors.h]h#List of to be destroyed connectors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj݊hMhjފubah}(h]h ]h"]h$]h&]uh1j{ hjŠubeh}(h]h ]h"]h$]h&]uh1jY hj݊hMhjubjZ )}(hG``destroy_branch_device_list`` List of to be destroyed branch devices. h](j` )}(h``destroy_branch_device_list``h]jf )}(hjh]hdestroy_branch_device_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM hjubj| )}(hhh]h)}(h'List of to be destroyed branch devices.h]h'List of to be destroyed branch devices.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(h\``delayed_destroy_lock`` Protects **destroy_port_list** and **destroy_branch_device_list**. h](j` )}(h``delayed_destroy_lock``h]jf )}(hj;h]hdelayed_destroy_lock}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj5ubj| )}(hhh]h)}(hBProtects **destroy_port_list** and **destroy_branch_device_list**.h](h Protects }(hjThhhNhNubj )}(h**destroy_port_list**h]hdestroy_port_list}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubh and }(hjThhhNhNubj )}(h**destroy_branch_device_list**h]hdestroy_branch_device_list}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubh.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjQubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hjPhMhjubjZ )}(h``delayed_destroy_wq`` Workqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it. h](j` )}(h``delayed_destroy_wq``h]jf )}(hjh]hdelayed_destroy_wq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hwWorkqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it.h]hwWorkqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hn``delayed_destroy_work`` Work item to destroy MST port and branch devices, needed to avoid locking inversion. h](j` )}(h``delayed_destroy_work``h]jf )}(hjӋh]hdelayed_destroy_work}(hjՋhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjыubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj͋ubj| )}(hhh]h)}(hTWork item to destroy MST port and branch devices, needed to avoid locking inversion.h]hTWork item to destroy MST port and branch devices, needed to avoid locking inversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj͋ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hq``up_req_list`` List of pending up requests from the topology that need to be processed, in chronological order. h](j` )}(h``up_req_list``h]jf )}(hj h]h up_req_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM$hjubj| )}(hhh]h)}(h`List of pending up requests from the topology that need to be processed, in chronological order.h]h`List of pending up requests from the topology that need to be processed, in chronological order.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM#hj#ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj"hM$hjubjZ )}(h)``up_req_lock`` Protects **up_req_list** h](j` )}(h``up_req_lock``h]jf )}(hjGh]h up_req_lock}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM(hjAubj| )}(hhh]h)}(hProtects **up_req_list**h](h Protects }(hj`hhhNhNubj )}(h**up_req_list**h]h up_req_list}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1hhj\hM(hj]ubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hj\hM(hjubjZ )}(h``up_req_work`` Work item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions. h](j` )}(h``up_req_work``h]jf )}(hjh]h up_req_work}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM.hjubj| )}(hhh]h)}(hWork item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions.h]hWork item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM,hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM.hjubjZ )}(h``topology_ref_history_lock`` protects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](j` )}(h``topology_ref_history_lock``h]jf )}(hjȌh]htopology_ref_history_lock}(hjʌhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjƌubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM5hjŒubj| )}(hhh]h)}(hprotects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](h protects }(hjhhhNhNubh)}(h@:c:type:`drm_dp_mst_port.topology_ref_history `h]jf )}(hjh]h$drm_dp_mst_port.topology_ref_history}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM4hjubh and }(hjhhhNhNubh)}(hD:c:type:`drm_dp_mst_branch.topology_ref_history `h]jf )}(hjh]h&drm_dp_mst_branch.topology_ref_history}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhM4hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM4hjތubah}(h]h ]h"]h$]h&]uh1j{ hjŒubeh}(h]h ]h"]h$]h&]uh1jY hj݌hM5hjubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubh)}(h**Description**h]j )}(hjQh]h Description}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM9hjohhubh)}(hThis struct represents the toplevel displayport MST topology manager. There should be one instance of this for every MST capable DP connector on the GPU.h]hThis struct represents the toplevel displayport MST topology manager. There should be one instance of this for every MST capable DP connector on the GPU.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMzhjohhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_mst_mode (C enum)c.drm_dp_mst_modehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hdrm_dp_mst_modeh]j )}(henum drm_dp_mst_modeh](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_mst_modeh]j )}(hjh]hdrm_dp_mst_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hsink's MST mode capabilityh]hsink’s MST mode capability}(hjэhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMChj΍hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j enumeh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX,**Constants** ``DRM_DP_SST`` The sink does not support MST nor single stream sideband messaging. ``DRM_DP_MST`` Sink supports MST, more than one stream and single stream sideband messaging. ``DRM_DP_SST_SIDEBAND_MSG`` Sink supports only one stream and single stream sideband messaging.h](h)}(h **Constants**h]j )}(hjh]h Constants}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMGhjubjU )}(hhh](jZ )}(hS``DRM_DP_SST`` The sink does not support MST nor single stream sideband messaging. h](j` )}(h``DRM_DP_SST``h]jf )}(hjh]h DRM_DP_SST}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMKhj ubj| )}(hhh]h)}(hCThe sink does not support MST nor single stream sideband messaging.h]hCThe sink does not support MST nor single stream sideband messaging.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMJhj(ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj'hMKhj ubjZ )}(h]``DRM_DP_MST`` Sink supports MST, more than one stream and single stream sideband messaging. h](j` )}(h``DRM_DP_MST``h]jf )}(hjLh]h DRM_DP_MST}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMOhjFubj| )}(hhh]h)}(hMSink supports MST, more than one stream and single stream sideband messaging.h]hMSink supports MST, more than one stream and single stream sideband messaging.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMNhjbubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahMOhj ubjZ )}(h_``DRM_DP_SST_SIDEBAND_MSG`` Sink supports only one stream and single stream sideband messaging.h](j` )}(h``DRM_DP_SST_SIDEBAND_MSG``h]jf )}(hjh]hDRM_DP_SST_SIDEBAND_MSG}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMRhjubj| )}(hhh]h)}(hCSink supports only one stream and single stream sideband messaging.h]hCSink supports only one stream and single stream sideband messaging.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMRhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMRhj ubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (__drm_dp_mst_state_iter_get (C function)c.__drm_dp_mst_state_iter_gethNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hbool __drm_dp_mst_state_iter_get (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h]j )}(hbool __drm_dp_mst_state_iter_get(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h](j)}(hjIh]hbool}(hjߎhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjێhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjێhhhjhMubj )}(h__drm_dp_mst_state_iter_geth]j )}(h__drm_dp_mst_state_iter_geth]h__drm_dp_mst_state_iter_get}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjێhhhjhMubj)}(h(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j)}jjsbc.__drm_dp_mst_state_iter_getasbuh1hhjubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h$struct drm_dp_mst_topology_mgr **mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jUc.__drm_dp_mst_state_iter_getasbuh1hhjubj )}(h h]h }(hjɏhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj׏hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h,struct drm_dp_mst_topology_state **old_stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]jUc.__drm_dp_mst_state_iter_getasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjThhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj)}(hjOh]h*}(hjahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h old_stateh]h old_state}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h,struct drm_dp_mst_topology_state **new_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jUc.__drm_dp_mst_state_iter_getasbuh1hhjubj )}(h h]h }(hjÐhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjѐhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj)}(hjOh]h*}(hjސhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h new_stateh]h new_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint ih](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hih]hi}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjێhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj׎hhhjhMubah}(h]jҎah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjԎhhubj )}(hhh]h)}(h=private atomic state iterator function for macro-internal useh]h=private atomic state iterator function for macro-internal use}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjGhhubah}(h]h ]h"]h$]h&]uh1j hjԎhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jbj jbj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` :c:type:`struct drm_atomic_commit ` pointer ``struct drm_dp_mst_topology_mgr **mgr`` pointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``struct drm_dp_mst_topology_state **old_state`` optional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursor ``struct drm_dp_mst_topology_state **new_state`` optional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursor ``int i`` int iteration cursor, for macro-internal use **Description** Used by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't call this directly. **Return** True if the current :c:type:`struct drm_private_obj ` is a :c:type:`struct drm_dp_mst_topology_mgr `, false otherwise.h](h)}(h**Parameters**h]j )}(hjlh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjfubjU )}(hhh](jZ )}(hc``struct drm_atomic_commit *state`` :c:type:`struct drm_atomic_commit ` pointer h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]jf )}(hjh]hstruct drm_atomic_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhjhMhjubh pointer}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``struct drm_dp_mst_topology_mgr **mgr`` pointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j` )}(h(``struct drm_dp_mst_topology_mgr **mgr``h]jf )}(hjh]h$struct drm_dp_mst_topology_mgr **mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjݑubj| )}(hhh]h)}(hbpointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](hpointer to the }(hjhhhNhNubh)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jf )}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjݑubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``struct drm_dp_mst_topology_state **old_state`` optional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursor h](j` )}(h0``struct drm_dp_mst_topology_state **old_state``h]jf )}(hj?h]h,struct drm_dp_mst_topology_state **old_state}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj9ubj| )}(hhh]h)}(hsoptional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursorh](hoptional pointer to the old }(hjXhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jf )}(hjbh]h struct drm_dp_mst_topology_state}(hjdhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjXubh iteration cursor}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjUubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hjThMhjubjZ )}(h``struct drm_dp_mst_topology_state **new_state`` optional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursor h](j` )}(h0``struct drm_dp_mst_topology_state **new_state``h]jf )}(hjh]h,struct drm_dp_mst_topology_state **new_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hsoptional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursorh](hoptional pointer to the new }(hjhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jf )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjܒhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h7``int i`` int iteration cursor, for macro-internal use h](j` )}(h ``int i``h]jf )}(hjh]hint i}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjfubh)}(h**Description**h]j )}(hj4h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjfubh)}(hUsed by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't call this directly.h]hUsed by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don’t call this directly.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjfubh)}(h **Return**h]j )}(hj[h]hReturn}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjfubh)}(hTrue if the current :c:type:`struct drm_private_obj ` is a :c:type:`struct drm_dp_mst_topology_mgr `, false otherwise.h](hTrue if the current }(hjqhhhNhNubh)}(h2:c:type:`struct drm_private_obj `h]jf )}(hj{h]hstruct drm_private_obj}(hj}hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjqubh is a }(hjqhhhNhNubh)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jf )}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjhMhjqubh, false otherwise.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjfubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *for_each_oldnew_mst_mgr_in_state (C macro)"c.for_each_oldnew_mst_mgr_in_statehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(h for_each_oldnew_mst_mgr_in_stateh]j )}(h for_each_oldnew_mst_mgr_in_stateh]j )}(h for_each_oldnew_mst_mgr_in_stateh]j )}(hjh]h for_each_oldnew_mst_mgr_in_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjޓhhhjhMubah}(h]jٓah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjۓhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjۓhhhjhMubeh}(h]h ](j macroeh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubh)}(hN``for_each_oldnew_mst_mgr_in_state (__state, mgr, old_state, new_state, __i)``h]jf )}(hjh]hJfor_each_oldnew_mst_mgr_in_state (__state, mgr, old_state, new_state, __i)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjohhubjiterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj2ubah}(h]h ]h"]h$]h&]uh1j;EhjDhMhjohhubj )}(hX**Parameters** ``__state`` :c:type:`struct drm_atomic_commit ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state ``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.h](h)}(h**Parameters**h]j )}(hjQh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjKubjU )}(hhh](jZ )}(hK``__state`` :c:type:`struct drm_atomic_commit ` pointer h](j` )}(h ``__state``h]jf )}(hjph]h__state}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjjubj| )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]jf )}(hjh]hstruct drm_atomic_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhjhMhjubh pointer}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjgubjZ )}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j` )}(h``mgr``h]jf )}(hjȔh]hmgr}(hjʔhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjƔubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj”ubj| )}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jf )}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjݔhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjݔhMhjޔubah}(h]h ]h"]h$]h&]uh1j{ hj”ubeh}(h]h ]h"]h$]h&]uh1jY hjݔhMhjgubjZ )}(hx``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state h](j` )}(h ``old_state``h]jf )}(hj h]h old_state}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jf )}(hj?h]h struct drm_dp_mst_topology_state}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj9ubh# iteration cursor for the old state}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hMhjgubjZ )}(hx``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state h](j` )}(h ``new_state``h]jf )}(hjyh]h new_state}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjsubj| )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jf )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubh# iteration cursor for the new state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjgubjZ )}(h5``__i`` int iteration cursor, for macro-internal use h](j` )}(h``__i``h]jf )}(hjҕh]h__i}(hjԕhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjЕubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj̕ubj| )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj̕ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjgubeh}(h]h ]h"]h$]h&]uh1jT hjKubh)}(h**Description**h]j )}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM hjKubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjKubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'for_each_old_mst_mgr_in_state (C macro)c.for_each_old_mst_mgr_in_statehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hfor_each_old_mst_mgr_in_stateh]j )}(hfor_each_old_mst_mgr_in_stateh]j )}(hfor_each_old_mst_mgr_in_stateh]j )}(hjLh]hfor_each_old_mst_mgr_in_state}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhjihMubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j{ hjihMhjGhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjGhhhjihMubeh}(h]h ](j macroeh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubh)}(h@``for_each_old_mst_mgr_in_state (__state, mgr, old_state, __i)``h]jf )}(hjh]hiterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j;EhjhMhjohhubj )}(hXC**Parameters** ``__state`` :c:type:`struct drm_atomic_commit ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubjU )}(hhh](jZ )}(hK``__state`` :c:type:`struct drm_atomic_commit ` pointer h](j` )}(h ``__state``h]jf )}(hjܖh]h__state}(hjޖhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjږubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj֖ubj| )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]jf )}(hjh]hstruct drm_atomic_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhjhMhjubh pointer}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj֖ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjӖubjZ )}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j` )}(h``mgr``h]jf )}(hj4h]hmgr}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhj.ubj| )}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jf )}(hjSh]hstruct drm_dp_mst_topology_mgr}(hjUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjIhMhjMubh iteration cursor}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hjIhMhjӖubjZ )}(hx``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state h](j` )}(h ``old_state``h]jf )}(hjh]h old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubj| )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jf )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubh# iteration cursor for the old state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjȗhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjӖubjZ )}(h5``__i`` int iteration cursor, for macro-internal use h](j` )}(h``__i``h]jf )}(hjh]h__i}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjߗubj| )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjߗubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjӖubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'for_each_new_mst_mgr_in_state (C macro)c.for_each_new_mst_mgr_in_statehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hfor_each_new_mst_mgr_in_stateh]j )}(hfor_each_new_mst_mgr_in_stateh]j )}(hfor_each_new_mst_mgr_in_stateh]j )}(hj_h]hfor_each_new_mst_mgr_in_state}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ](j j eh"]h$]h&]j j uh1j hjahhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM#ubah}(h]h ]h"]h$]h&]j j j uh1j j j hj]hhhj|hM#ubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j{ hj|hM#hjZhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjZhhhj|hM#ubeh}(h]h ](j macroeh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubh)}(h@``for_each_new_mst_mgr_in_state (__state, mgr, new_state, __i)``h]jf )}(hjh]hiterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM#hjubah}(h]h ]h"]h$]h&]uh1j;EhjØhM#hjohhubj )}(hXr**Parameters** ``__state`` :c:type:`struct drm_atomic_commit ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.h](h)}(h**Parameters**h]j )}(hjИh]h Parameters}(hjҘhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjΘubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM'hjʘubjU )}(hhh](jZ )}(hK``__state`` :c:type:`struct drm_atomic_commit ` pointer h](j` )}(h ``__state``h]jf )}(hjh]h__state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM%hjubj| )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]jf )}(hjh]hstruct drm_atomic_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhjhM%hjubh pointer}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM%hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM%hjubjZ )}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j` )}(h``mgr``h]jf )}(hjGh]hmgr}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM&hjAubj| )}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jf )}(hjfh]hstruct drm_dp_mst_topology_mgr}(hjhhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj\hM&hj`ubh iteration cursor}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hM&hj]ubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hj\hM&hjubjZ )}(hx``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state h](j` )}(h ``new_state``h]jf )}(hjh]h new_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM(hjubj| )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jf )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM'hjubh# iteration cursor for the new state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjۙhM'hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM(hjubjZ )}(h5``__i`` int iteration cursor, for macro-internal use h](j` )}(h``__i``h]jf )}(hjh]h__i}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM)hjubj| )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM)hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM)hjubeh}(h]h ]h"]h$]h&]uh1jT hjʘubh)}(h**Description**h]j )}(hj3h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM+hjʘubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./include/drm/display/drm_dp_mst_helper.hhM*hjʘubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_mst_get_port_malloc (C function)c.drm_dp_mst_get_port_mallochNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(h>void drm_dp_mst_get_port_malloc (struct drm_dp_mst_port *port)h]j )}(h=void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjhMubj )}(hdrm_dp_mst_get_port_malloch]j )}(hdrm_dp_mst_get_port_malloch]hdrm_dp_mst_get_port_malloc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjthhhjhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjšhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjӚhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjКubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj՚modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_mst_get_port_mallocasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjthhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjphhhjhMubah}(h]jkah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjmhhubj )}(hhh]h)}(h,Increment the malloc refcount of an MST porth]h,Increment the malloc refcount of an MST port}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj5hhubah}(h]h ]h"]h$]h&]uh1j hjmhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jPj jPj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount of **Description** Increments :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used. Because **port** could potentially be freed at any time by the DP MST helpers if :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, including during a call to this function, drivers that which to make use of :c:type:`struct drm_dp_mst_port ` should ensure that they grab at least one main malloc reference to their MST ports in :c:type:`drm_dp_mst_topology_cbs.add_connector `. This callback is called before there is any chance for :c:type:`drm_dp_mst_port.malloc_kref ` to reach 0. See also: drm_dp_mst_put_port_malloc()h](h)}(h**Parameters**h]j )}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjTubjU )}(hhh]jZ )}(h|``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount of h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjyh]hstruct drm_dp_mst_port *port}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjsubj| )}(hhh]h)}(hZThe :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount ofh](hThe }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMhjubh$ to increment the malloc refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjpubah}(h]h ]h"]h$]h&]uh1jT hjTubh)}(h**Description**h]j )}(hjכh]h Description}(hjٛhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj՛ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjTubh)}(hIncrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used.h](h Increments }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj )}(h**port**h]hport}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh will be released and }(hjhhhNhNubj )}(h**port**h]hport}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjTubh)}(hX.Because **port** could potentially be freed at any time by the DP MST helpers if :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, including during a call to this function, drivers that which to make use of :c:type:`struct drm_dp_mst_port ` should ensure that they grab at least one main malloc reference to their MST ports in :c:type:`drm_dp_mst_topology_cbs.add_connector `. This callback is called before there is any chance for :c:type:`drm_dp_mst_port.malloc_kref ` to reach 0.h](hBecause }(hjfhhhNhNubj )}(h**port**h]hport}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubhA could potentially be freed at any time by the DP MST helpers if }(hjfhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjfubhX reaches 0, including during a call to this function, drivers that which to make use of }(hjfhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMhjfubhW should ensure that they grab at least one main malloc reference to their MST ports in }(hjfhhhNhNubh)}(hI:c:type:`drm_dp_mst_topology_cbs.add_connector `h]jf )}(hjɜh]h%drm_dp_mst_topology_cbs.add_connector}(hj˜hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjǜubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_cbsuh1hhjhMhjfubh9. This callback is called before there is any chance for }(hjfhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMhjfubh to reach 0.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjTubh)}(h&See also: drm_dp_mst_put_port_malloc()h]h&See also: drm_dp_mst_put_port_malloc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_mst_put_port_malloc (C function)c.drm_dp_mst_put_port_mallochNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(h>void drm_dp_mst_put_port_malloc (struct drm_dp_mst_port *port)h]j )}(h=void drm_dp_mst_put_port_malloc(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhjPhMubj )}(hdrm_dp_mst_put_port_malloch]j )}(hdrm_dp_mst_put_port_malloch]hdrm_dp_mst_put_port_malloc}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>hhhjPhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjesbc.drm_dp_mst_put_port_mallocasbuh1hhj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj)}(hjOh]h*}(hj˝hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj{ubj )}(hporth]hport}(hj؝hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubah}(h]h ]h"]h$]h&]j j uh1jhj>hhhjPhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:hhhjPhMubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j{ hjPhMhj7hhubj )}(hhh]h)}(h,Decrement the malloc refcount of an MST porth]h,Decrement the malloc refcount of an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj7hhhjPhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount of **Description** Decrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used. See also: drm_dp_mst_get_port_malloc()h](h)}(h**Parameters**h]j )}(hj$h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h|``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount of h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjCh]hstruct drm_dp_mst_port *port}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj=ubj| )}(hhh]h)}(hZThe :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount ofh](hThe }(hj\hhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hjfh]hstruct drm_dp_mst_port}(hjhhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjXhMhj\ubh$ to decrement the malloc refcount of}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhMhjYubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hjXhMhj:ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hDecrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used.h](h Decrements }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjÞhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjޞhMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh will be released and }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjޞhMhjubh)}(h&See also: drm_dp_mst_get_port_malloc()h]h&See also: drm_dp_mst_get_port_malloc()}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_dp_mst_connector_late_register (C function)$c.drm_dp_mst_connector_late_registerhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hfint drm_dp_mst_connector_late_register (struct drm_connector *connector, struct drm_dp_mst_port *port)h]j )}(heint drm_dp_mst_connector_late_register(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhhjmhMubj )}(h"drm_dp_mst_connector_late_registerh]j )}(h"drm_dp_mst_connector_late_registerh]h"drm_dp_mst_connector_late_register}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhjmhMubj)}(h?(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb$c.drm_dp_mst_connector_late_registerasbuh1hhjubj )}(h h]h }(hjڟhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j֟$c.drm_dp_mst_connector_late_registerasbuh1hhj ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjXhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hporth]hport}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj[hhhjmhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjWhhhjmhMubah}(h]jRah ](j j eh"]h$]h&]j j )j huh1j{ hjmhMhjThhubj )}(hhh]h)}(hLate MST connector registrationh]hLate MST connector registration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjThhhjmhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hXv**Parameters** ``struct drm_connector *connector`` The MST connector ``struct drm_dp_mst_port *port`` The MST port for this connector **Description** Helper to register the remote aux device for this MST port. Drivers should call this from their mst connector's late_register hook to enable MST aux devices. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh](jZ )}(h6``struct drm_connector *connector`` The MST connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjРh]hstruct drm_connector *connector$}(hjҠhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjΠubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjʠubj| )}(hhh]h)}(hThe MST connectorh]hThe MST connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjʠubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjǠubjZ )}(hA``struct drm_dp_mst_port *port`` The MST port for this connector h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hj h]hstruct drm_dp_mst_port *port}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hThe MST port for this connectorh]hThe MST port for this connector}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjǠubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjDh]h Description}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hHelper to register the remote aux device for this MST port. Drivers should call this from their mst connector's late_register hook to enable MST aux devices.h]hHelper to register the remote aux device for this MST port. Drivers should call this from their mst connector’s late_register hook to enable MST aux devices.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j )}(hjkh]hReturn}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_dp_mst_connector_early_unregister (C function)'c.drm_dp_mst_connector_early_unregisterhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hjvoid drm_dp_mst_connector_early_unregister (struct drm_connector *connector, struct drm_dp_mst_port *port)h]j )}(hivoid drm_dp_mst_connector_early_unregister(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h%drm_dp_mst_connector_early_unregisterh]j )}(h%drm_dp_mst_connector_early_unregisterh]h%drm_dp_mst_connector_early_unregister}(hjѡhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͡ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h?(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjӡsb'c.drm_dp_mst_connector_early_unregisterasbuh1hhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj9hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j''c.drm_dp_mst_connector_early_unregisterasbuh1hhj[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h"Early MST connector unregistrationh]h"Early MST connector unregistration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjݢhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hXZ**Parameters** ``struct drm_connector *connector`` The MST connector ``struct drm_dp_mst_port *port`` The MST port for this connector **Description** Helper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector's early_unregister hook.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh](jZ )}(h6``struct drm_connector *connector`` The MST connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj!h]hstruct drm_connector *connector}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hThe MST connectorh]hThe MST connector}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhjubjZ )}(hA``struct drm_dp_mst_port *port`` The MST port for this connector h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjZh]hstruct drm_dp_mst_port *port}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjTubj| )}(hhh]h)}(hThe MST port for this connectorh]hThe MST port for this connector}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjohMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hHelper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector's early_unregister hook.h]hHelper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector’s early_unregister hook.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dp_add_payload_part1 (C function)c.drm_dp_add_payload_part1hNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hint drm_dp_add_payload_part1 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h]j )}(hint drm_dp_add_payload_part1(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(hinth]hint}(hjڣhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj֣hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֣hhhjhM ubj )}(hdrm_dp_add_payload_part1h]j )}(hdrm_dp_add_payload_part1h]hdrm_dp_add_payload_part1}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj֣hhhjhM ubj)}(h}(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_add_payload_part1asbuh1hhjubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjchhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jQc.drm_dp_add_payload_part1asbuh1hhjubj )}(h h]h }(hjŤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjӤhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jQc.drm_dp_add_payload_part1asbuh1hhjubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjChhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpayloadh]hpayload}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj֣hhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjңhhhjhM ubah}(h]jͣah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjϣhhubj )}(hhh]h)}(hExecute payload update part 1h]hExecute payload update part 1}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjwhhubah}(h]h ]h"]h$]h&]uh1j hjϣhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``struct drm_dp_mst_atomic_payload *payload`` The payload to write **Description** Determines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets. **Return** 0 on success, error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubjU )}(hhh](jZ )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubj| )}(hhh]h)}(hManager to use.h]hManager to use.}(hjԥhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjХhM hjѥubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjХhM hjubjZ )}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](j` )}(h/``struct drm_dp_mst_topology_state *mst_state``h]jf )}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubj| )}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM hjubjZ )}(hC``struct drm_dp_mst_atomic_payload *payload`` The payload to write h](j` )}(h-``struct drm_dp_mst_atomic_payload *payload``h]jf )}(hj-h]h)struct drm_dp_mst_atomic_payload *payload}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hj'ubj| )}(hhh]h)}(hThe payload to writeh]hThe payload to write}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhM hjCubah}(h]h ]h"]h$]h&]uh1j{ hj'ubeh}(h]h ]h"]h$]h&]uh1jY hjBhM hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjhh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(hDetermines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets.h]hDetermines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(h$0 on success, error code on failure.h]h$0 on success, error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_remove_payload_part1 (C function)c.drm_dp_remove_payload_part1hNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hvoid drm_dp_remove_payload_part1 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h]j )}(hvoid drm_dp_remove_payload_part1(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(hvoidh]hvoid}(hjԦhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjЦhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$ ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjЦhhhjhM$ ubj )}(hdrm_dp_remove_payload_part1h]j )}(hdrm_dp_remove_payload_part1h]hdrm_dp_remove_payload_part1}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjЦhhhjhM$ ubj)}(h}(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_remove_payload_part1asbuh1hhj ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hmgrh]hmgr}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jKc.drm_dp_remove_payload_part1asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjͧhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h mst_stateh]h mst_state}(hjڧhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jKc.drm_dp_remove_payload_part1asbuh1hhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpayloadh]hpayload}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjЦhhhjhM$ ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj̦hhhjhM$ ubah}(h]jǦah ](j j eh"]h$]h&]j j )j huh1j{ hjhM$ hjɦhhubj )}(hhh]h)}(h/Remove an MST payload along the virtual channelh]h/Remove an MST payload along the virtual channel}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$ hjqhhubah}(h]h ]h"]h$]h&]uh1j hjɦhhhjhM$ ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``struct drm_dp_mst_atomic_payload *payload`` The payload to remove **Description** Removes a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM( hjubjU )}(hhh](jZ )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM% hjubj| )}(hhh]h)}(hManager to use.h]hManager to use.}(hjΨhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjʨhM% hj˨ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjʨhM% hjubjZ )}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](j` )}(h/``struct drm_dp_mst_topology_state *mst_state``h]jf )}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM& hjubj| )}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM& hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM& hjubjZ )}(hD``struct drm_dp_mst_atomic_payload *payload`` The payload to remove h](j` )}(h-``struct drm_dp_mst_atomic_payload *payload``h]jf )}(hj'h]h)struct drm_dp_mst_atomic_payload *payload}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM' hj!ubj| )}(hhh]h)}(hThe payload to removeh]hThe payload to remove}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hM' hj=ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj<hM' hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjbh]h Description}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM) hjubh)}(hRemoves a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.h]hRemoves a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM( hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_remove_payload_part2 (C function)c.drm_dp_remove_payload_part2hNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hvoid drm_dp_remove_payload_part2 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h]j )}(hvoid drm_dp_remove_payload_part2(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMC ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMC ubj )}(hdrm_dp_remove_payload_part2h]j )}(hdrm_dp_remove_payload_part2h]hdrm_dp_remove_payload_part2}(hjȩhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĩubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMC ubj)}(h(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjʩsbc.drm_dp_remove_payload_part2asbuh1hhjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjܩubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]jc.drm_dp_remove_payload_part2asbuh1hhjRubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjRubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjܩubj)}(h3const struct drm_dp_mst_atomic_payload *old_payloadh](j )}(hjAh]hconst}(hjƪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjªubj )}(h h]h }(hjӪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjªubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjªubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjªubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_remove_payload_part2asbuh1hhjªubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjªubj)}(hjOh]h*}(hj+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjªubj )}(h old_payloadh]h old_payload}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjªubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjܩubj)}(h-struct drm_dp_mst_atomic_payload *new_payloadh](j )}(hj h]hstruct}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]jc.drm_dp_remove_payload_part2asbuh1hhjMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjMubj )}(h new_payloadh]h new_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjܩubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMC ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMC ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMC hjhhubj )}(hhh]h)}(hRemove an MST payload locallyh]hRemove an MST payload locally}(hjҫhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMC hjϫhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMC ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``const struct drm_dp_mst_atomic_payload *old_payload`` The payload with its old state ``struct drm_dp_mst_atomic_payload *new_payload`` The payload with its latest state **Description** Updates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It's independent to the result of payload allocation/deallocation at branch devices along the virtual channel.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMG hjubjU )}(hhh](jZ )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMD hj ubj| )}(hhh]h)}(hManager to use.h]hManager to use.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMD hj)ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj(hMD hj ubjZ )}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](j` )}(h/``struct drm_dp_mst_topology_state *mst_state``h]jf )}(hjLh]h+struct drm_dp_mst_topology_state *mst_state}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chME hjFubj| )}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahME hjbubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahME hj ubjZ )}(hW``const struct drm_dp_mst_atomic_payload *old_payload`` The payload with its old state h](j` )}(h7``const struct drm_dp_mst_atomic_payload *old_payload``h]jf )}(hjh]h3const struct drm_dp_mst_atomic_payload *old_payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMF hjubj| )}(hhh]h)}(hThe payload with its old stateh]hThe payload with its old state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMF hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMF hj ubjZ )}(hT``struct drm_dp_mst_atomic_payload *new_payload`` The payload with its latest state h](j` )}(h1``struct drm_dp_mst_atomic_payload *new_payload``h]jf )}(hjh]h-struct drm_dp_mst_atomic_payload *new_payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMG hjubj| )}(hhh]h)}(h!The payload with its latest stateh]h!The payload with its latest state}(hj׬hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjӬhMG hjԬubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjӬhMG hj ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMI hjubh)}(hXYUpdates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It's independent to the result of payload allocation/deallocation at branch devices along the virtual channel.h]hX[Updates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It’s independent to the result of payload allocation/deallocation at branch devices along the virtual channel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMH hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dp_add_payload_part2 (C function)c.drm_dp_add_payload_part2hNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hmint drm_dp_add_payload_part2 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h]j )}(hlint drm_dp_add_payload_part2(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h](j)}(hinth]hint}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMf ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:hhhjLhMf ubj )}(hdrm_dp_add_payload_part2h]j )}(hdrm_dp_add_payload_part2h]hdrm_dp_add_payload_part2}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj:hhhjLhMf ubj)}(hP(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjasbc.drm_dp_add_payload_part2asbuh1hhjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hjOh]h*}(hjǭhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjwubj )}(hmgrh]hmgr}(hjԭhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjsubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_dp_add_payload_part2asbuh1hhjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpayloadh]hpayload}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjsubeh}(h]h ]h"]h$]h&]j j uh1jhj:hhhjLhMf ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj6hhhjLhMf ubah}(h]j1ah ](j j eh"]h$]h&]j j )j huh1j{ hjLhMf hj3hhubj )}(hhh]h)}(hExecute payload update part 2h]hExecute payload update part 2}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMf hjkhhubah}(h]h ]h"]h$]h&]uh1j hj3hhhjLhMf ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_atomic_payload *payload`` The payload to update **Description** If **payload** was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMj hjubjU )}(hhh](jZ )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMg hjubj| )}(hhh]h)}(hManager to use.h]hManager to use.}(hjȮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjĮhMg hjŮubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjĮhMg hjubjZ )}(hD``struct drm_dp_mst_atomic_payload *payload`` The payload to update h](j` )}(h-``struct drm_dp_mst_atomic_payload *payload``h]jf )}(hjh]h)struct drm_dp_mst_atomic_payload *payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMh hjubj| )}(hhh]h)}(hThe payload to updateh]hThe payload to update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMh hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMh hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj#h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMj hjubh)}(hIf **payload** was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload.h](hIf }(hj9hhhNhNubj )}(h **payload**h]hpayload}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubh was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMi hjubh)}(h **Return**h]j )}(hj\h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMl hjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMm hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dp_get_vc_payload_bw (C function)c.drm_dp_get_vc_payload_bwhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hHfixed20_12 drm_dp_get_vc_payload_bw (int link_rate, int link_lane_count)h]j )}(hGfixed20_12 drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count)h](h)}(hhh]j )}(h fixed20_12h]h fixed20_12}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_dp_get_vc_payload_bwsbc.drm_dp_get_vc_payload_bwasbuh1hhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjƯhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjůhMubj )}(hdrm_dp_get_vc_payload_bwh]j )}(hj¯h]hdrm_dp_get_vc_payload_bw}(hjدhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԯubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjůhMubj)}(h$(int link_rate, int link_lane_count)h](j)}(h int link_rateh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h link_rateh]h link_rate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint link_lane_counth](j)}(hinth]hint}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(hlink_lane_counth]hlink_lane_count}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjůhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjůhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjůhMhjhhubj )}(hhh]h)}(h%get the VC payload BW for an MTP linkh]h%get the VC payload BW for an MTP link}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjkhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjůhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``int link_rate`` link rate in 10kbits/s units ``int link_lane_count`` lane count **Description** Calculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP. Returns the BW / timeslot value in 20.12 fixed point format.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh](jZ )}(h/``int link_rate`` link rate in 10kbits/s units h](j` )}(h``int link_rate``h]jf )}(hjh]h int link_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hlink rate in 10kbits/s unitsh]hlink rate in 10kbits/s units}(hjȰhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjİhMhjŰubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjİhMhjubjZ )}(h#``int link_lane_count`` lane count h](j` )}(h``int link_lane_count``h]jf )}(hjh]hint link_lane_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h lane counth]h lane count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj#h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXCalculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP.h]hXCalculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hubj| )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjZubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hjYhMhj;ubjZ )}(h]``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the DPCD capabilities for this sink h](j` )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jf )}(hj}h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjwubj| )}(hhh]h)}(h4A cached copy of the DPCD capabilities for this sinkh]h4A cached copy of the DPCD capabilities for this sink}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj;ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h4enum drm_dp_mst_mode to indicate MST mode capabilityh]h4enum drm_dp_mst_mode to indicate MST mode capability}(hjγhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_mst_topology_mgr_set_mst (C function)!c.drm_dp_mst_topology_mgr_set_msthNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hYint drm_dp_mst_topology_mgr_set_mst (struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h]j )}(hXint drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM7ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hM7ubj )}(hdrm_dp_mst_topology_mgr_set_msth]j )}(hdrm_dp_mst_topology_mgr_set_msth]hdrm_dp_mst_topology_mgr_set_mst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hM7ubj)}(h5(struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jj sb!c.drm_dp_mst_topology_mgr_set_mstasbuh1hhj6ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubj)}(hbool mst_stateh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h mst_stateh]h mst_state}(hjǴhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hM7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hM7ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hM7hjhhubj )}(hhh]h)}(h(Set the MST state for a topology managerh]h(Set the MST state for a topology manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM7hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hM7ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjohNhNubj )}(hXH**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to set state for ``bool mst_state`` true to enable MST on this connector - false to disable. **Description** This is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hj ubjU )}(hhh](jZ )}(hA``struct drm_dp_mst_topology_mgr *mgr`` manager to set state for h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``)h]jf )}(hj2h]h#struct drm_dp_mst_topology_mgr *mgr}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM8hj,ubj| )}(hhh]h)}(hmanager to set state forh]hmanager to set state for}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM8hjHubah}(h]h ]h"]h$]h&]uh1j{ hj,ubeh}(h]h ]h"]h$]h&]uh1jY hjGhM8hj)ubjZ )}(hL``bool mst_state`` true to enable MST on this connector - false to disable. h](j` )}(h``bool mst_state``h]jf )}(hjkh]hbool mst_state}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9hjeubj| )}(hhh]h)}(h8true to enable MST on this connector - false to disable.h]h8true to enable MST on this connector - false to disable.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1j{ hjeubeh}(h]h ]h"]h$]h&]uh1jY hjhM9hj)ubeh}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hj ubh)}(hThis is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.h]hThis is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM:hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_mst_topology_queue_probe (C function)!c.drm_dp_mst_topology_queue_probehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hJvoid drm_dp_mst_topology_queue_probe (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hIvoid drm_dp_mst_topology_queue_probe(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_mst_topology_queue_probeh]j )}(hdrm_dp_mst_topology_queue_probeh]hdrm_dp_mst_topology_queue_probe}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j)}jjsb!c.drm_dp_mst_topology_queue_probeasbuh1hhj$ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(hjOh]h*}(hjthhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]j޵ah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hQueue a topology probeh]hQueue a topology probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jöj jöj j j uh1jv hhhjohNhNubj )}(hX[**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to probe **Description** Queue a work to probe the MST topology. Driver's should call this only to sync the topology's HW->SW state after the MST link's parameters have changed in a way the state could've become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.h](h)}(h**Parameters**h]j )}(hjͶh]h Parameters}(hj϶hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj˶ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjǶubjU )}(hhh]jZ )}(h9``struct drm_dp_mst_topology_mgr *mgr`` manager to probe h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hmanager to probeh]hmanager to probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjǶubh)}(h**Description**h]j )}(hj'h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjǶubh)}(hXQueue a work to probe the MST topology. Driver's should call this only to sync the topology's HW->SW state after the MST link's parameters have changed in a way the state could've become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.h]hXQueue a work to probe the MST topology. Driver’s should call this only to sync the topology’s HW->SW state after the MST link’s parameters have changed in a way the state could’ve become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjǶubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_mst_topology_mgr_suspend (C function)!c.drm_dp_mst_topology_mgr_suspendhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hJvoid drm_dp_mst_topology_mgr_suspend (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hIvoid drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjzhMubj )}(hdrm_dp_mst_topology_mgr_suspendh]j )}(hdrm_dp_mst_topology_mgr_suspendh]hdrm_dp_mst_topology_mgr_suspend}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhhjzhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjǷhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjķubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjɷmodnameN classnameNj j )}j ]j)}jjsb!c.drm_dp_mst_topology_mgr_suspendasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhhjzhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjdhhhjzhMubah}(h]j_ah ](j j eh"]h$]h&]j j )j huh1j{ hjzhMhjahhubj )}(hhh]h)}(hsuspend the MST managerh]hsuspend the MST manager}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj)hhubah}(h]h ]h"]h$]h&]uh1j hjahhhjzhMubeh}(h]h ](j functioneh"]h$]h&]j j j jDj jDj j j uh1jv hhhjohNhNubj )}(h**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to suspend **Description** This function tells the MST device that we can't handle UP messages anymore. This should stop it from sending any since we are suspended.h](h)}(h**Parameters**h]j )}(hjNh]h Parameters}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubjU )}(hhh]jZ )}(h;``struct drm_dp_mst_topology_mgr *mgr`` manager to suspend h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjmh]h#struct drm_dp_mst_topology_mgr *mgr}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjgubj| )}(hhh]h)}(hmanager to suspendh]hmanager to suspend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubah}(h]h ]h"]h$]h&]uh1jT hjHubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubh)}(hThis function tells the MST device that we can't handle UP messages anymore. This should stop it from sending any since we are suspended.h]hThis function tells the MST device that we can’t handle UP messages anymore. This should stop it from sending any since we are suspended.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_dp_mst_topology_mgr_resume (C function) c.drm_dp_mst_topology_mgr_resumehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hSint drm_dp_mst_topology_mgr_resume (struct drm_dp_mst_topology_mgr *mgr, bool sync)h]j )}(hRint drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr, bool sync)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_mst_topology_mgr_resumeh]j )}(hdrm_dp_mst_topology_mgr_resumeh]hdrm_dp_mst_topology_mgr_resume}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h0(struct drm_dp_mst_topology_mgr *mgr, bool sync)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJmodnameN classnameNj j )}j ]j)}jjsb c.drm_dp_mst_topology_mgr_resumeasbuh1hhj&ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj)}(hjOh]h*}(hjvhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj&ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(h bool synch](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsynch]hsync}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hresume the MST managerh]hresume the MST manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj޹hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hXT**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to resume ``bool sync`` whether or not to perform topology reprobing synchronously **Description** This will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return. If the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked. During system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with **sync** set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with **sync** set to false in order to avoid deadlocking. **Return** -1 if the MST topology was removed while we were suspended, 0 otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh](jZ )}(h:``struct drm_dp_mst_topology_mgr *mgr`` manager to resume h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hj"h]h#struct drm_dp_mst_topology_mgr *mgr}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hmanager to resumeh]hmanager to resume}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj8ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj7hMhjubjZ )}(hI``bool sync`` whether or not to perform topology reprobing synchronously h](j` )}(h ``bool sync``h]jf )}(hj[h]h bool sync}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjUubj| )}(hhh]h)}(h:whether or not to perform topology reprobing synchronouslyh]h:whether or not to perform topology reprobing synchronously}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjqubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjphMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hwThis will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return.h]hwThis will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hkIf the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked.h]hkIf the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXnDuring system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with **sync** set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with **sync** set to false in order to avoid deadlocking.h](hDuring system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with }(hjʺhhhNhNubj )}(h**sync**h]hsync}(hjҺhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjʺubh set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with }(hjʺhhhNhNubj )}(h**sync**h]hsync}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjʺubh, set to false in order to avoid deadlocking.}(hjʺhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hH-1 if the MST topology was removed while we were suspended, 0 otherwise.h]hH-1 if the MST topology was removed while we were suspended, 0 otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_mst_hpd_irq_handle_event (C function)!c.drm_dp_mst_hpd_irq_handle_eventhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hpint drm_dp_mst_hpd_irq_handle_event (struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h]j )}(hoint drm_dp_mst_hpd_irq_handle_event(struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h](j)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhjRhMxubj )}(hdrm_dp_mst_hpd_irq_handle_eventh]j )}(hdrm_dp_mst_hpd_irq_handle_eventh]hdrm_dp_mst_hpd_irq_handle_event}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@hhhjRhMxubj)}(hL(struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjgsb!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj)}(hjOh]h*}(hjͻhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj}ubj )}(hmgrh]hmgr}(hjڻhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(h const u8 *esih](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hesih]hesi}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(hu8 *ackh](h)}(hhh]j )}(hu8h]hu8}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjhmodnameN classnameNj j )}j ]j!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hackh]hack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(h bool *handledh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjżhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjӼhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hhandledh]hhandled}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubeh}(h]h ]h"]h$]h&]j j uh1jhj@hhhjRhMxubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhjRhMxubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j{ hjRhMxhj9hhubj )}(hhh]h)}(h MST hotplug IRQ handle MST eventh]h MST hotplug IRQ handle MST event}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjhhubah}(h]h ]h"]h$]h&]uh1j hj9hhhjRhMxubeh}(h]h ](j functioneh"]h$]h&]j j j j"j j"j j j uh1jv hhhjohNhNubj )}(hXn**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. ``const u8 *esi`` 4 bytes from SINK_COUNT_ESI ``u8 *ack`` 4 bytes used to ack events starting from SINK_COUNT_ESI ``bool *handled`` whether the hpd interrupt was consumed or not **Description** This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later. Note that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the 'handled' is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed. See also: drm_dp_mst_hpd_irq_send_new_request()h](h)}(h**Parameters**h]j )}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM|hj&ubjU )}(hhh](jZ )}(hC``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjKh]h#struct drm_dp_mst_topology_mgr *mgr}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMyhjEubj| )}(hhh]h)}(hmanager to notify irq for.h]hmanager to notify irq for.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMyhjaubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj`hMyhjBubjZ )}(h.``const u8 *esi`` 4 bytes from SINK_COUNT_ESI h](j` )}(h``const u8 *esi``h]jf )}(hjh]h const u8 *esi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMzhj~ubj| )}(hhh]h)}(h4 bytes from SINK_COUNT_ESIh]h4 bytes from SINK_COUNT_ESI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMzhjubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hjhMzhjBubjZ )}(hD``u8 *ack`` 4 bytes used to ack events starting from SINK_COUNT_ESI h](j` )}(h ``u8 *ack``h]jf )}(hjh]hu8 *ack}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM{hjubj| )}(hhh]h)}(h74 bytes used to ack events starting from SINK_COUNT_ESIh]h74 bytes used to ack events starting from SINK_COUNT_ESI}(hjֽhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjҽhM{hjӽubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjҽhM{hjBubjZ )}(h@``bool *handled`` whether the hpd interrupt was consumed or not h](j` )}(h``bool *handled``h]jf )}(hjh]h bool *handled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM|hjubj| )}(hhh]h)}(h-whether the hpd interrupt was consumed or noth]h-whether the hpd interrupt was consumed or not}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM|hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM|hjBubeh}(h]h ]h"]h$]h&]uh1jT hj&ubh)}(h**Description**h]j )}(hj1h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM~hj&ubh)}(hX>This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later.h]hX>This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM}hj&ubh)}(hNote that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the 'handled' is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed.h]hNote that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the ‘handled’ is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj&ubh)}(h/See also: drm_dp_mst_hpd_irq_send_new_request()h]h/See also: drm_dp_mst_hpd_irq_send_new_request()}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0drm_dp_mst_hpd_irq_send_new_request (C function)%c.drm_dp_mst_hpd_irq_send_new_requesthNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hNvoid drm_dp_mst_hpd_irq_send_new_request (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hMvoid drm_dp_mst_hpd_irq_send_new_request(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h#drm_dp_mst_hpd_irq_send_new_requesth]j )}(h#drm_dp_mst_hpd_irq_send_new_requesth]h#drm_dp_mst_hpd_irq_send_new_request}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjѾhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hj޾hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb%c.drm_dp_mst_hpd_irq_send_new_requestasbuh1hhj;ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;ubj )}(hmgrh]hmgr}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjɾubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h$MST hotplug IRQ kick off new requesth]h$MST hotplug IRQ kick off new request}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjQhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jlj jlj j j uh1jv hhhjohNhNubj )}(hXY**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. **Description** This should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.h](h)}(h**Parameters**h]j )}(hjvh]h Parameters}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjpubjU )}(hhh]jZ )}(hC``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hmanager to notify irq for.h]hmanager to notify irq for.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjpubh)}(h**Description**h]j )}(hjпh]h Description}(hjҿhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjοubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjpubh)}(hThis should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.h]hThis should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_dp_mst_detect_port (C function)c.drm_dp_mst_detect_porthNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hint drm_dp_mst_detect_port (struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hint drm_dp_mst_detect_port(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj#hMubj )}(hdrm_dp_mst_detect_porth]j )}(hdrm_dp_mst_detect_porth]hdrm_dp_mst_detect_port}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj#hMubj)}(h(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]j)}jj8sbc.drm_dp_mst_detect_portasbuh1hhjNubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjNubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_detect_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]jc.drm_dp_mst_detect_portasbuh1hhj0ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj0ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_detect_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj#hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj#hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj#hMhj hhubj )}(hhh]h)}(h%get connection status for an MST porth]h%get connection status for an MST port}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj"hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj#hMubeh}(h]h ](j functioneh"]h$]h&]j j j j=j j=j j j uh1jv hhhjohNhNubj )}(hXm**Parameters** ``struct drm_connector *connector`` DRM connector for this port ``struct drm_modeset_acquire_ctx *ctx`` The acquisition context to use for grabbing locks ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` pointer to a port **Description** This returns the current connection state for a port.h](h)}(h**Parameters**h]j )}(hjGh]h Parameters}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjAubjU )}(hhh](jZ )}(h@``struct drm_connector *connector`` DRM connector for this port h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjfh]hstruct drm_connector *connector}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj`ubj| )}(hhh]h)}(hDRM connector for this porth]hDRM connector for this port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj|ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj{hMhj]ubjZ )}(hZ``struct drm_modeset_acquire_ctx *ctx`` The acquisition context to use for grabbing locks h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h1The acquisition context to use for grabbing locksh]h1The acquisition context to use for grabbing locks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj]ubjZ )}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hmanager for this porth]hmanager for this port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj]ubjZ )}(h3``struct drm_dp_mst_port *port`` pointer to a port h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj| )}(hhh]h)}(hpointer to a porth]hpointer to a port}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj'ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj&hMhj]ubeh}(h]h ]h"]h$]h&]uh1jT hjAubh)}(h**Description**h]j )}(hjLh]h Description}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjAubh)}(h5This returns the current connection state for a port.h]h5This returns the current connection state for a port.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjAubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_dp_mst_edid_read (C function)c.drm_dp_mst_edid_readhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hconst struct drm_edid * drm_dp_mst_edid_read (struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hconst struct drm_edid *drm_dp_mst_edid_read(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_dp_mst_edid_readsbc.drm_dp_mst_edid_readasbuh1hhjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhMubj )}(hdrm_dp_mst_edid_readh]j )}(hjh]hdrm_dp_mst_edid_read}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hd(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]jc.drm_dp_mst_edid_readasbuh1hhj"ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hjOh]h*}(hjphhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubj )}(h connectorh]h connector}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_edid_readasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]jc.drm_dp_mst_edid_readasbuh1hhjubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjPhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hget EDID for an MST porth]hget EDID for an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hXz**Parameters** ``struct drm_connector *connector`` toplevel connector to get EDID for ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` unverified pointer to a port. **Description** This returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh](jZ )}(hG``struct drm_connector *connector`` toplevel connector to get EDID for h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h"toplevel connector to get EDID forh]h"toplevel connector to get EDID for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hmanager for this porth]hmanager for this port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h?``struct drm_dp_mst_port *port`` unverified pointer to a port. h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hj:h]hstruct drm_dp_mst_port *port}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj4ubj| )}(hhh]h)}(hunverified pointer to a port.h]hunverified pointer to a port.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMhjPubah}(h]h ]h"]h$]h&]uh1j{ hj4ubeh}(h]h ]h"]h$]h&]uh1jY hjOhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h]hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn’t require a reference.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dp_mst_get_edid (C function)c.drm_dp_mst_get_edidhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hstruct edid * drm_dp_mst_get_edid (struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hstruct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubh)}(hhh]j )}(hedidh]hedid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_dp_mst_get_edidsbc.drm_dp_mst_get_edidasbuh1hhjhhhjhM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhM ubj )}(hdrm_dp_mst_get_edidh]j )}(hjh]hdrm_dp_mst_get_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hd(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]jc.drm_dp_mst_get_edidasbuh1hhj0ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj0ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_get_edidasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]jc.drm_dp_mst_get_edidasbuh1hhjubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj^hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(hget EDID for an MST porth]hget EDID for an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` toplevel connector to get EDID for ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` unverified pointer to a port. **Description** This function is deprecated; please use drm_dp_mst_edid_read() instead. This returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$hjubjU )}(hhh](jZ )}(hG``struct drm_connector *connector`` toplevel connector to get EDID for h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM!hjubj| )}(hhh]h)}(h"toplevel connector to get EDID forh]h"toplevel connector to get EDID for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM!hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM!hjubjZ )}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM"hj ubj| )}(hhh]h)}(hmanager for this porth]hmanager for this port}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hM"hj%ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj$hM"hjubjZ )}(h?``struct drm_dp_mst_port *port`` unverified pointer to a port. h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjHh]hstruct drm_dp_mst_port *port}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM#hjBubj| )}(hhh]h)}(hunverified pointer to a port.h]hunverified pointer to a port.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hM#hj^ubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hj]hM#hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM%hjubh)}(hGThis function is deprecated; please use drm_dp_mst_edid_read() instead.h]hGThis function is deprecated; please use drm_dp_mst_edid_read() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$hjubh)}(hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h]hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn’t require a reference.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM&hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_dp_atomic_find_time_slots (C function)c.drm_dp_atomic_find_time_slotshNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hint drm_dp_atomic_find_time_slots (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h]j )}(hint drm_dp_atomic_find_time_slots(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM=ubj )}(hdrm_dp_atomic_find_time_slotsh]j )}(hdrm_dp_atomic_find_time_slotsh]hdrm_dp_atomic_find_time_slots}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM=ubj)}(hm(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_atomic_find_time_slotsasbuh1hhjubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jNc.drm_dp_atomic_find_time_slotsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jNc.drm_dp_atomic_find_time_slotsasbuh1hhjubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hint pbnh](j)}(hinth]hint}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(hpbnh]hpbn}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM=ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM=hjhhubj )}(hhh]h)}(h$Find and add time slots to the stateh]h$Find and add time slots to the state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM=hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM=ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port ``struct drm_dp_mst_port *port`` port to find time slots for ``int pbn`` bandwidth required for the mode in PBN **Description** Allocates time slots to **port**, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes. Allocations set by this function are not checked against the bandwidth restraints of **mgr** until the driver calls drm_dp_mst_atomic_check(). Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase. See also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check() **Return** Total slots in the atomic state assigned for this port, or a negative error code if the port no longer existsh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMAhjubjU )}(hhh](jZ )}(h8``struct drm_atomic_commit *state`` global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM>hjubj| )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM>hjubjZ )}(hJ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hj&h]h#struct drm_dp_mst_topology_mgr *mgr}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM?hj ubj| )}(hhh]h)}(h!MST topology manager for the porth]h!MST topology manager for the port}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hM?hj<ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj;hM?hjubjZ )}(h=``struct drm_dp_mst_port *port`` port to find time slots for h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hj_h]hstruct drm_dp_mst_port *port}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM@hjYubj| )}(hhh]h)}(hport to find time slots forh]hport to find time slots for}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthM@hjuubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjthM@hjubjZ )}(h3``int pbn`` bandwidth required for the mode in PBN h](j` )}(h ``int pbn``h]jf )}(hjh]hint pbn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMAhjubj| )}(hhh]h)}(h&bandwidth required for the mode in PBNh]h&bandwidth required for the mode in PBN}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMAhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMAhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMChjubh)}(hXAllocates time slots to **port**, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes.h](hAllocates time slots to }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their }(hjhhhNhNubh)}(hN:c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h]jf )}(hjh]h'drm_encoder_helper_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMBhjubh callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"hMBhjubh)}(hAllocations set by this function are not checked against the bandwidth restraints of **mgr** until the driver calls drm_dp_mst_atomic_check().h](hUAllocations set by this function are not checked against the bandwidth restraints of }(hj-hhhNhNubj )}(h**mgr**h]hmgr}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubh2 until the driver calls drm_dp_mst_atomic_check().}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMHhjubh)}(hAdditionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase.h](hHAdditionally, it is OK to call this function multiple times on the same }(hjNhhhNhNubj )}(h**port**h]hport}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubh~ as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMKhjubh)}(hFSee also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check()h]hFSee also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check()}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMOhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMShjubh)}(hmTotal slots in the atomic state assigned for this port, or a negative error code if the port no longer existsh]hmTotal slots in the atomic state assigned for this port, or a negative error code if the port no longer exists}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMThjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_atomic_release_time_slots (C function)"c.drm_dp_atomic_release_time_slotshNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hint drm_dp_atomic_release_time_slots (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hint drm_dp_atomic_release_time_slots(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h drm_dp_atomic_release_time_slotsh]j )}(h drm_dp_atomic_release_time_slotsh]h drm_dp_atomic_release_time_slots}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hd(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]j)}jjsb"c.drm_dp_atomic_release_time_slotsasbuh1hhjubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjNhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j<"c.drm_dp_atomic_release_time_slotsasbuh1hhjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjpubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j<"c.drm_dp_atomic_release_time_slotsasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hRelease allocated time slotsh]hRelease allocated time slots}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjbhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j}j j}j j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port ``struct drm_dp_mst_port *port`` The port to release the time slots from **Description** Releases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their :c:type:`drm_connector_helper_funcs.atomic_check\(\) ` callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology. It is OK to call this even if **port** has been removed from the system. Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same **port** in a single atomic check phase. See also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check() **Return** 0 on success, negative error code otherwiseh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh](jZ )}(h8``struct drm_atomic_commit *state`` global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hJ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h!MST topology manager for the porth]h!MST topology manager for the port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hI``struct drm_dp_mst_port *port`` The port to release the time slots from h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h'The port to release the time slots fromh]h'The port to release the time slots from}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj.ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj-hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjSh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXReleases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their :c:type:`drm_connector_helper_funcs.atomic_check\(\) ` callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology.h](hReleases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their }(hjihhhNhNubh)}(hR:c:type:`drm_connector_helper_funcs.atomic_check\(\) `h]jf )}(hjsh]h)drm_connector_helper_funcs.atomic_check()}(hjuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjiubh callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hX)It is OK to call this even if **port** has been removed from the system. Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same **port** in a single atomic check phase.h](hIt is OK to call this even if }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhk has been removed from the system. Additionally, it is OK to call this function multiple times on the same }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhh as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh in a single atomic check phase.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hCSee also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check()h]hCSee also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h+0 on success, negative error code otherwiseh]h+0 on success, negative error code otherwise}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_dp_mst_atomic_setup_commit (C function) c.drm_dp_mst_atomic_setup_commithNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hDint drm_dp_mst_atomic_setup_commit (struct drm_atomic_commit *state)h]j )}(hCint drm_dp_mst_atomic_setup_commit(struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2hhhjDhMubj )}(hdrm_dp_mst_atomic_setup_commith]j )}(hdrm_dp_mst_atomic_setup_commith]hdrm_dp_mst_atomic_setup_commit}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ](j j eh"]h$]h&]j j uh1j hj2hhhjDhMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjYsb c.drm_dp_mst_atomic_setup_commitasbuh1hhjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjoubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubah}(h]h ]h"]h$]h&]j j uh1jhj2hhhjDhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj.hhhjDhMubah}(h]j)ah ](j j eh"]h$]h&]j j )j huh1j{ hjDhMhj+hhubj )}(hhh]h)}(h!setup_commit hook for MST helpersh]h!setup_commit hook for MST helpers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj+hhhjDhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state **Description** This function saves all of the :c:type:`drm_crtc_commit` structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook. **Return** 0 if all CRTC commits were retrieved successfully, negative error code otherwiseh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h8``struct drm_atomic_commit *state`` global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj7h]hstruct drm_atomic_commit *state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj1ubj| )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhMhjMubah}(h]h ]h"]h$]h&]uh1j{ hj1ubeh}(h]h ]h"]h$]h&]uh1jY hjLhMhj.ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjrh]h Description}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXThis function saves all of the :c:type:`drm_crtc_commit` structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook.h](hThis function saves all of the }(hjhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jf )}(hjh]hdrm_crtc_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their }(hjhhhNhNubh)}(hY:c:type:`drm_mode_config_helper_funcs.atomic_commit_setup `h]jf )}(hjh]h0drm_mode_config_helper_funcs.atomic_commit_setup}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhjhMhjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hP0 if all CRTC commits were retrieved successfully, negative error code otherwiseh]hP0 if all CRTC commits were retrieved successfully, negative error code otherwise}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_dp_mst_atomic_wait_for_dependencies (C function))c.drm_dp_mst_atomic_wait_for_dependencieshNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hNvoid drm_dp_mst_atomic_wait_for_dependencies (struct drm_atomic_commit *state)h]j )}(hMvoid drm_dp_mst_atomic_wait_for_dependencies(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj2hMubj )}(h'drm_dp_mst_atomic_wait_for_dependenciesh]j )}(h'drm_dp_mst_atomic_wait_for_dependenciesh]h'drm_dp_mst_atomic_wait_for_dependencies}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj2hMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjGsb)c.drm_dp_mst_atomic_wait_for_dependenciesasbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj]ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj2hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj2hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj2hMhjhhubj )}(hhh]h)}(hPWait for all pending commits on MST topologies, prepare new MST state for commith]hPWait for all pending commits on MST topologies, prepare new MST state for commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj2hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state **Description** Goes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology. This function also prepares the new MST state for commit by performing some state preparation which can't be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state. All MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h8``struct drm_atomic_commit *state`` global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj%h]hstruct drm_atomic_commit *state}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj;ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj:hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj`h]h Description}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXGoes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology.h]hXGoes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis function also prepares the new MST state for commit by performing some state preparation which can't be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state.h]hThis function also prepares the new MST state for commit by performing some state preparation which can’t be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(hAll MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.h]hAll MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_dp_mst_root_conn_atomic_check (C function)#c.drm_dp_mst_root_conn_atomic_checkhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hwint drm_dp_mst_root_conn_atomic_check (struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hvint drm_dp_mst_root_conn_atomic_check(struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMIubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMIubj )}(h!drm_dp_mst_root_conn_atomic_checkh]j )}(h!drm_dp_mst_root_conn_atomic_checkh]h!drm_dp_mst_root_conn_atomic_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMIubj)}(hQ(struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(h*struct drm_connector_state *new_conn_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsb#c.drm_dp_mst_root_conn_atomic_checkasbuh1hhjubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hnew_conn_stateh]hnew_conn_state}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j:#c.drm_dp_mst_root_conn_atomic_checkasbuh1hhjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjnubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMIubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMIubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMIhjhhubj )}(hhh]h)}(hFSerialize CRTC commits on MST-capable connectors operating in SST modeh]hFSerialize CRTC commits on MST-capable connectors operating in SST mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMIhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMIubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_connector_state *new_conn_state`` The new connector state of the :c:type:`drm_connector` ``struct drm_dp_mst_topology_mgr *mgr`` The MST topology manager for the :c:type:`drm_connector` **Description** Since MST uses fake :c:type:`drm_encoder` structs, the generic atomic modesetting code isn't able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector's MST topology will never share the same :c:type:`drm_encoder`. This function takes care of this serialization issue, by checking a root MST connector's atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to :c:type:`drm_dp_mst_topology_state.pending_crtc_mask `. Drivers implementing MST must call this function from the :c:type:`drm_connector_helper_funcs.atomic_check ` hook of any physical DP :c:type:`drm_connector` capable of driving MST sinks. **Return** 0 on success, negative error code otherwiseh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMMhjubjU )}(hhh](jZ )}(hf``struct drm_connector_state *new_conn_state`` The new connector state of the :c:type:`drm_connector` h](j` )}(h.``struct drm_connector_state *new_conn_state``h]jf )}(hj4h]h*struct drm_connector_state *new_conn_state}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMKhj.ubj| )}(hhh]h)}(h6The new connector state of the :c:type:`drm_connector`h](hThe new connector state of the }(hjMhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjWh]h drm_connector}(hjYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjIhMKhjMubeh}(h]h ]h"]h$]h&]uh1hhjIhMKhjJubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hjIhMKhj+ubjZ )}(ha``struct drm_dp_mst_topology_mgr *mgr`` The MST topology manager for the :c:type:`drm_connector` h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMLhjubj| )}(hhh]h)}(h8The MST topology manager for the :c:type:`drm_connector`h](h!The MST topology manager for the }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjhMLhjubeh}(h]h ]h"]h$]h&]uh1hhjhMLhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMLhj+ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMNhjubh)}(hXaSince MST uses fake :c:type:`drm_encoder` structs, the generic atomic modesetting code isn't able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector's MST topology will never share the same :c:type:`drm_encoder`.h](hSince MST uses fake }(hjhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hjh]h drm_encoder}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMMhjubhX& structs, the generic atomic modesetting code isn’t able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector’s MST topology will never share the same }(hjhhhNhNubh)}(h:c:type:`drm_encoder`h]jf )}(hj*h]h drm_encoder}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hhj#hMMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hMMhjubh)}(hXBThis function takes care of this serialization issue, by checking a root MST connector's atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to :c:type:`drm_dp_mst_topology_state.pending_crtc_mask `.h](hThis function takes care of this serialization issue, by checking a root MST connector’s atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to }(hjQhhhNhNubh)}(hQ:c:type:`drm_dp_mst_topology_state.pending_crtc_mask `h]jf )}(hj[h]h+drm_dp_mst_topology_state.pending_crtc_mask}(hj]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMRhjQubh.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhMRhjubh)}(hDrivers implementing MST must call this function from the :c:type:`drm_connector_helper_funcs.atomic_check ` hook of any physical DP :c:type:`drm_connector` capable of driving MST sinks.h](h:Drivers implementing MST must call this function from the }(hjhhhNhNubh)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]jf )}(hjh]h'drm_connector_helper_funcs.atomic_check}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMVhjubh hook of any physical DP }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jf )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjhMVhjubh capable of driving MST sinks.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMVhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMZhjubh)}(h+0 on success, negative error code otherwiseh]h+0 on success, negative error code otherwise}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM[hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_mst_update_slots (C function)c.drm_dp_mst_update_slotshNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hevoid drm_dp_mst_update_slots (struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h]j )}(hdvoid drm_dp_mst_update_slots(struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj-hMubj )}(hdrm_dp_mst_update_slotsh]j )}(hdrm_dp_mst_update_slotsh]hdrm_dp_mst_update_slots}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj-hMubj)}(hH(struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h](j)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j)}jjBsbc.drm_dp_mst_update_slotsasbuh1hhjXubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjXubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjTubj)}(huint8_t link_encoding_caph](h)}(hhh]j )}(huint8_th]huint8_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_update_slotsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hlink_encoding_caph]hlink_encoding_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjTubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj-hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj-hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj-hMhjhhubj )}(hhh]h)}(h8updates the slot info depending on the DP ecoding formath]h8updates the slot info depending on the DP ecoding format}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj$hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj-hMubeh}(h]h ](j functioneh"]h$]h&]j j j j?j j?j j j uh1jv hhhjohNhNubj )}(h**Parameters** ``struct drm_dp_mst_topology_state *mst_state`` mst_state to update ``uint8_t link_encoding_cap`` the ecoding format on the linkh](h)}(h**Parameters**h]j )}(hjIh]h Parameters}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjCubjU )}(hhh](jZ )}(hD``struct drm_dp_mst_topology_state *mst_state`` mst_state to update h](j` )}(h/``struct drm_dp_mst_topology_state *mst_state``h]jf )}(hjhh]h+struct drm_dp_mst_topology_state *mst_state}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjbubj| )}(hhh]h)}(hmst_state to updateh]hmst_state to update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj~ubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hj}hMhj_ubjZ )}(h<``uint8_t link_encoding_cap`` the ecoding format on the linkh](j` )}(h``uint8_t link_encoding_cap``h]jf )}(hjh]huint8_t link_encoding_cap}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hthe ecoding format on the linkh]hthe ecoding format on the link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj_ubeh}(h]h ]h"]h$]h&]uh1jT hjCubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dp_check_act_status (C function)c.drm_dp_check_act_statushNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hAint drm_dp_check_act_status (struct drm_dp_mst_topology_mgr *mgr)h]j )}(h@int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_dp_check_act_statush]j )}(hdrm_dp_check_act_statush]hdrm_dp_check_act_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjXmodnameN classnameNj j )}j ]j)}jjsbc.drm_dp_check_act_statusasbuh1hhj4ubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj4ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj0ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(hPolls for ACT handled status.h]hPolls for ACT handled status.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hXK**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to use **Description** Tries waiting for the MST hub to finish updating it's payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long). **Return** 0 if the ACT was handled in time, negative error code on failure.[h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h7``struct drm_dp_mst_topology_mgr *mgr`` manager to use h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hmanager to useh]hmanager to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj7h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hTries waiting for the MST hub to finish updating it's payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long).h]hTries waiting for the MST hub to finish updating it’s payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long).}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j )}(hj^h]hReturn}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hA0 if the ACT was handled in time, negative error code on failure.h]hA0 if the ACT was handled in time, negative error code on failure.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_dp_calc_pbn_mode (C function)c.drm_dp_calc_pbn_modehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(h-int drm_dp_calc_pbn_mode (int clock, int bpp)h]j )}(h,int drm_dp_calc_pbn_mode(int clock, int bpp)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_calc_pbn_modeh]j )}(hdrm_dp_calc_pbn_modeh]hdrm_dp_calc_pbn_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(int clock, int bpp)h](j)}(h int clockh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hclockh]hclock}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint bpph](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hbpph]hbpp}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hCalculate the PBN for a mode.h]hCalculate the PBN for a mode.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjXhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jsj jsj j j uh1jv hhhjohNhNubj )}(h**Parameters** ``int clock`` dot clock ``int bpp`` bpp as .4 binary fixed point **Description** This uses the formula in the spec to calculate the PBN value for a mode.h](h)}(h**Parameters**h]j )}(hj}h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjwubjU )}(hhh](jZ )}(h``int clock`` dot clock h](j` )}(h ``int clock``h]jf )}(hjh]h int clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h dot clockh]h dot clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h)``int bpp`` bpp as .4 binary fixed point h](j` )}(h ``int bpp``h]jf )}(hjh]hint bpp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hbpp as .4 binary fixed pointh]hbpp as .4 binary fixed point}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjwubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjwubh)}(hHThis uses the formula in the spec to calculate the PBN value for a mode.h]hHThis uses the formula in the spec to calculate the PBN value for a mode.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjwubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dp_mst_dump_topology (C function)c.drm_dp_mst_dump_topologyhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hWvoid drm_dp_mst_dump_topology (struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hVvoid drm_dp_mst_dump_topology(struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM)ubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQhhhjchM)ubj )}(hdrm_dp_mst_dump_topologyh]j )}(hdrm_dp_mst_dump_topologyh]hdrm_dp_mst_dump_topology}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ](j j eh"]h$]h&]j j uh1j hjQhhhjchM)ubj)}(h9(struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct seq_file *mh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hseq_fileh]hseq_file}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjxsbc.drm_dp_mst_dump_topologyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hjh]hm}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]jc.drm_dp_mst_dump_topologyasbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjQhhhjchM)ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjMhhhjchM)ubah}(h]jHah ](j j eh"]h$]h&]j j )j huh1j{ hjchM)hjJhhubj )}(hhh]h)}(hdump topology to seq file.h]hdump topology to seq file.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM)hjhhubah}(h]h ]h"]h$]h&]uh1j hjJhhhjchM)ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(h**Parameters** ``struct seq_file *m`` seq_file to dump output to ``struct drm_dp_mst_topology_mgr *mgr`` manager to dump current topology for. **Description** helper to dump MST topology to a seq file for debugfs.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM-hjubjU )}(hhh](jZ )}(h2``struct seq_file *m`` seq_file to dump output to h](j` )}(h``struct seq_file *m``h]jf )}(hjh]hstruct seq_file *m}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM*hjubj| )}(hhh]h)}(hseq_file to dump output toh]hseq_file to dump output to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM*hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM*hjubjZ )}(hN``struct drm_dp_mst_topology_mgr *mgr`` manager to dump current topology for. h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM+hjubj| )}(hhh]h)}(h%manager to dump current topology for.h]h%manager to dump current topology for.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM+hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM+hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj9h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM-hjubh)}(h6helper to dump MST topology to a seq file for debugfs.h]h6helper to dump MST topology to a seq file for debugfs.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM,hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_dp_mst_port_downstream_of_parent (C function)&c.drm_dp_mst_port_downstream_of_parenthNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hbool drm_dp_mst_port_downstream_of_parent (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h]j )}(hbool drm_dp_mst_port_downstream_of_parent(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h](j)}(hjIh]hbool}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzhhhjhMubj )}(h$drm_dp_mst_port_downstream_of_parenth]j )}(h$drm_dp_mst_port_downstream_of_parenth]h$drm_dp_mst_port_downstream_of_parent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjzhhhjhMubj)}(hc(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLmodnameN classnameNj j )}j ]j&c.drm_dp_mst_port_downstream_of_parentasbuh1hhj(ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj)}(hjOh]h*}(hjvhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *parenth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hparenth]hparent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjzhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjvhhhjhMubah}(h]jqah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjshhubj )}(hhh]h)}(h.check if a port is downstream of a parent porth]h.check if a port is downstream of a parent port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjshhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j5j j5j j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager ``struct drm_dp_mst_port *port`` the port being looked up ``struct drm_dp_mst_port *parent`` the parent port **Description** The function returns ``true`` if **port** is downstream of **parent**. If **parent** is ``NULL`` - denoting the root port - the function returns ``true`` if **port** is in **mgr**'s topology.h](h)}(h**Parameters**h]j )}(hj?h]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubjU )}(hhh](jZ )}(h=``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hj^h]h#struct drm_dp_mst_topology_mgr *mgr}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjXubj| )}(hhh]h)}(hMST topology managerh]hMST topology manager}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjtubah}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjshMhjUubjZ )}(h:``struct drm_dp_mst_port *port`` the port being looked up h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hthe port being looked uph]hthe port being looked up}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjUubjZ )}(h3``struct drm_dp_mst_port *parent`` the parent port h](j` )}(h"``struct drm_dp_mst_port *parent``h]jf )}(hjh]hstruct drm_dp_mst_port *parent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hthe parent porth]hthe parent port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjUubeh}(h]h ]h"]h$]h&]uh1jT hj9ubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubh)}(hThe function returns ``true`` if **port** is downstream of **parent**. If **parent** is ``NULL`` - denoting the root port - the function returns ``true`` if **port** is in **mgr**'s topology.h](hThe function returns }(hj!hhhNhNubjf )}(h``true``h]htrue}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubh if }(hj!hhhNhNubj )}(h**port**h]hport}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh is downstream of }(hj!hhhNhNubj )}(h **parent**h]hparent}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh. If }(hj!hhhNhNubj )}(h **parent**h]hparent}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh is }(hj!hhhNhNubjf )}(h``NULL``h]hNULL}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubh1 - denoting the root port - the function returns }(hj!hhhNhNubjf )}(h``true``h]htrue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubh if }hj!sbj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh is in }(hj!hhhNhNubj )}(h**mgr**h]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubh’s topology.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_dp_mst_add_affected_dsc_crtcs (C function)#c.drm_dp_mst_add_affected_dsc_crtcshNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hlint drm_dp_mst_add_affected_dsc_crtcs (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hkint drm_dp_mst_add_affected_dsc_crtcs(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM7ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM7ubj )}(h!drm_dp_mst_add_affected_dsc_crtcsh]j )}(h!drm_dp_mst_add_affected_dsc_crtcsh]h!drm_dp_mst_add_affected_dsc_crtcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM7ubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=modnameN classnameNj j )}j ]j)}jjsb#c.drm_dp_mst_add_affected_dsc_crtcsasbuh1hhjubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjihhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jW#c.drm_dp_mst_add_affected_dsc_crtcsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM7ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM7hjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhM7ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` Pointer to the new struct drm_dp_mst_topology_state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager **Description** Whenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topology See also: drm_dp_mst_atomic_enable_dsc()h](h)}(h**Parameters**h]j )}(hj#h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hjubjU )}(hhh](jZ )}(hX``struct drm_atomic_commit *state`` Pointer to the new struct drm_dp_mst_topology_state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjBh]hstruct drm_atomic_commit *state}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM8hj<ubj| )}(hhh]h)}(h3Pointer to the new struct drm_dp_mst_topology_stateh]h3Pointer to the new struct drm_dp_mst_topology_state}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhM8hjXubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hjWhM8hj9ubjZ )}(h=``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hj{h]h#struct drm_dp_mst_topology_mgr *mgr}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9hjuubj| )}(hhh]h)}(hMST topology managerh]hMST topology manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1j{ hjuubeh}(h]h ]h"]h$]h&]uh1jY hjhM9hj9ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hjubh)}(hWhenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topologyh]hWhenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topology}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM:hjubh)}(h(See also: drm_dp_mst_atomic_enable_dsc()h]h(See also: drm_dp_mst_atomic_enable_dsc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM?hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_mst_atomic_enable_dsc (C function)c.drm_dp_mst_atomic_enable_dschNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hvint drm_dp_mst_atomic_enable_dsc (struct drm_atomic_commit *state, struct drm_dp_mst_port *port, int pbn, bool enable)h]j )}(huint drm_dp_mst_atomic_enable_dsc(struct drm_atomic_commit *state, struct drm_dp_mst_port *port, int pbn, bool enable)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMtubj )}(hdrm_dp_mst_atomic_enable_dsch]j )}(hdrm_dp_mst_atomic_enable_dsch]hdrm_dp_mst_atomic_enable_dsc}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMtubj)}(hU(struct drm_atomic_commit *state, struct drm_dp_mst_port *port, int pbn, bool enable)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]j)}jj-sbc.drm_dp_mst_atomic_enable_dscasbuh1hhjCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjCubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_enable_dscasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubj)}(hint pbnh](j)}(hinth]hint}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(hpbnh]hpbn}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubj)}(h bool enableh](j)}(hjIh]hbool}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj )}(henableh]henable}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMtubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMtubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMthjhhubj )}(hhh]h)}(hSet DSC Enable Flag to On/Offh]hSet DSC Enable Flag to On/Off}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMthjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMtubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` Pointer to the new drm_atomic_commit ``struct drm_dp_mst_port *port`` Pointer to the affected MST Port ``int pbn`` Newly recalculated bw required for link with DSC enabled ``bool enable`` Boolean flag to enable or disable DSC on the port **Description** This function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabledh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjubjU )}(hhh](jZ )}(hI``struct drm_atomic_commit *state`` Pointer to the new drm_atomic_commit h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMuhjubj| )}(hhh]h)}(h$Pointer to the new drm_atomic_commith]h$Pointer to the new drm_atomic_commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMuhjubjZ )}(hB``struct drm_dp_mst_port *port`` Pointer to the affected MST Port h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMvhjubj| )}(hhh]h)}(h Pointer to the affected MST Porth]h Pointer to the affected MST Port}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMvhj3ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj2hMvhjubjZ )}(hE``int pbn`` Newly recalculated bw required for link with DSC enabled h](j` )}(h ``int pbn``h]jf )}(hjVh]hint pbn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjTubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMwhjPubj| )}(hhh]h)}(h8Newly recalculated bw required for link with DSC enabledh]h8Newly recalculated bw required for link with DSC enabled}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMwhjlubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjkhMwhjubjZ )}(hB``bool enable`` Boolean flag to enable or disable DSC on the port h](j` )}(h``bool enable``h]jf )}(hjh]h bool enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjubj| )}(hhh]h)}(h1Boolean flag to enable or disable DSC on the porth]h1Boolean flag to enable or disable DSC on the port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMxhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMxhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMzhjubh)}(hThis function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabledh]hThis function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMyhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_mst_atomic_check_mgr (C function)c.drm_dp_mst_atomic_check_mgrhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hint drm_dp_mst_atomic_check_mgr (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h]j )}(hint drm_dp_mst_atomic_check_mgr(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj )}(hdrm_dp_mst_atomic_check_mgrh]j )}(hdrm_dp_mst_atomic_check_mgrh]hdrm_dp_mst_atomic_check_mgr}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMubj)}(h(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjlmodnameN classnameNj j )}j ]j)}jj2sbc.drm_dp_mst_atomic_check_mgrasbuh1hhjHubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjHubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjDubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjDubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_check_mgrasbuh1hhj*ubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hjOh]h*}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*ubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjDubj)}(h%struct drm_dp_mst_port **failing_porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h failing_porth]h failing_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjDubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h1Check the atomic state of an MST topology managerh]h1Check the atomic state of an MST topology manager}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj)hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jDj jDj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` The global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` Manager to check ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state for **mgr** ``struct drm_dp_mst_port **failing_port`` Returns the port with a BW limitation **Description** Checks the given MST manager's topology state for an atomic update to ensure that it's valid. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update. Any atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback. See also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots() - The non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists. - ``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. - ``-EINVAL``, if the new state is invalid, because the root port has too many payloads. **Return** - 0 if the new state is valid - ``-ENOSPC``, if the new state is invalid, because of BW limitation **failing_port** is set to:h](h)}(h**Parameters**h]j )}(hjNh]h Parameters}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubjU )}(hhh](jZ )}(h<``struct drm_atomic_commit *state`` The global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjmh]hstruct drm_atomic_commit *state}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjkubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjgubj| )}(hhh]h)}(hThe global atomic stateh]hThe global atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubjZ )}(h9``struct drm_dp_mst_topology_mgr *mgr`` Manager to check h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hManager to checkh]hManager to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubjZ )}(hQ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state for **mgr** h](j` )}(h/``struct drm_dp_mst_topology_state *mst_state``h]jf )}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h The MST atomic state for **mgr**h](hThe MST atomic state for }(hjhhhNhNubj )}(h**mgr**h]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjdubjZ )}(hP``struct drm_dp_mst_port **failing_port`` Returns the port with a BW limitation h](j` )}(h)``struct drm_dp_mst_port **failing_port``h]jf )}(hj&h]h%struct drm_dp_mst_port **failing_port}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj| )}(hhh]h)}(h%Returns the port with a BW limitationh]h%Returns the port with a BW limitation}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj<ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj;hMhjdubeh}(h]h ]h"]h$]h&]uh1jT hjHubh)}(h**Description**h]j )}(hjah]h Description}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubh)}(hChecks the given MST manager's topology state for an atomic update to ensure that it's valid. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update.h]hChecks the given MST manager’s topology state for an atomic update to ensure that it’s valid. This includes checking whether there’s enough bandwidth to support the new timeslot allocations in the atomic update.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubh)}(hAny atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback.h](hAny atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their }(hjhhhNhNubh)}(hH:c:type:`drm_mode_config_funcs.atomic_check\(\) `h]jf )}(hjh]h$drm_mode_config_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjHubh)}(hfSee also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()h]hfSee also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubj` **Description** Checks the given topology state for an atomic update to ensure that it's valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update. Any atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback. See also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots() **Return** 0 if the new state is valid, negative error code otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h~``struct drm_atomic_commit *state`` Pointer to the new :c:type:`struct drm_dp_mst_topology_state ` h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj h]hstruct drm_atomic_commit *state}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hYPointer to the new :c:type:`struct drm_dp_mst_topology_state `h](hPointer to the new }(hj9hhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jf )}(hjCh]h struct drm_dp_mst_topology_state}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhj5hMhj9ubeh}(h]h ]h"]h$]h&]uh1hhj5hMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjzh]h Description}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXChecks the given topology state for an atomic update to ensure that it's valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update.h]hXChecks the given topology state for an atomic update to ensure that it’s valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there’s enough bandwidth to support the new timeslot allocations in the atomic update. }(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hAny atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback.h](hqAny atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their }(hjhhhNhNubh)}(hH:c:type:`drm_mode_config_funcs.atomic_check\(\) `h]jf )}(hjh]h$drm_mode_config_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hjSee also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()h]hjSee also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h;0 if the new state is valid, negative error code otherwise.h]h;0 if the new state is valid, negative error code otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_atomic_get_mst_topology_state (C function)#c.drm_atomic_get_mst_topology_statehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hstruct drm_dp_mst_topology_state * drm_atomic_get_mst_topology_state (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hstruct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j )}(hj h]hstruct}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhj4hMubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j)}j!drm_atomic_get_mst_topology_statesb#c.drm_atomic_get_mst_topology_stateasbuh1hhj#hhhj4hMubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhj4hMubj)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#hhhj4hMubj )}(h!drm_atomic_get_mst_topology_stateh]j )}(hjdh]h!drm_atomic_get_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#hhhj4hMubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jb#c.drm_atomic_get_mst_topology_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]jb#c.drm_atomic_get_mst_topology_stateasbuh1hhj ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hmgrh]hmgr}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj#hhhj4hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj4hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj4hMhjhhubj )}(hhh]h)}(hget MST topology stateh]hget MST topology state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj4hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The MST topology state or error pointer.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh](jZ )}(h8``struct drm_atomic_commit *state`` global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hj h]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj!hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjGh]h Description}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j )}(hjnh]hReturn}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h(The MST topology state or error pointer.h]h(The MST topology state or error pointer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_atomic_get_old_mst_topology_state (C function)'c.drm_atomic_get_old_mst_topology_statehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hstruct drm_dp_mst_topology_state * drm_atomic_get_old_mst_topology_state (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hstruct drm_dp_mst_topology_state *drm_atomic_get_old_mst_topology_state(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM+ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM+ubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j%drm_atomic_get_old_mst_topology_statesb'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjhhhjhM+ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM+ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhM+ubj )}(h%drm_atomic_get_old_mst_topology_stateh]j )}(hjh]h%drm_atomic_get_old_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM+ubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]j'c.drm_atomic_get_old_mst_topology_stateasbuh1hhj)ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj)}(hjOh]h*}(hjwhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj)ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM+ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM+ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM+hjhhubj )}(hhh]h)}(h2get old MST topology state in atomic state, if anyh]h2get old MST topology state in atomic state, if any}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM+hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM+ubeh}(h]h ](j functioneh"]h$]h&]j j j j6j j6j j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The old MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh](h)}(h**Parameters**h]j )}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM/hj:ubjU )}(hhh](jZ )}(h8``struct drm_atomic_commit *state`` global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj_h]hstruct drm_atomic_commit *state}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM,hjYubj| )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthM,hjuubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjthM,hjVubjZ )}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM-hjubj| )}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM-hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM-hjVubeh}(h]h ]h"]h$]h&]uh1jT hj:ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM/hj:ubh)}(hThis function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM.hj:ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM2hj:ubh)}(hlThe old MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh]hnThe old MST topology state, or NULL if there’s no topology state for this MST mgr in the global atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM3hj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_atomic_get_new_mst_topology_state (C function)'c.drm_atomic_get_new_mst_topology_statehNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hstruct drm_dp_mst_topology_state * drm_atomic_get_new_mst_topology_state (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hstruct drm_dp_mst_topology_state *drm_atomic_get_new_mst_topology_state(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMCubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhjLhMCubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j)}j%drm_atomic_get_new_mst_topology_statesb'c.drm_atomic_get_new_mst_topology_stateasbuh1hhj;hhhjLhMCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhjLhMCubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;hhhjLhMCubj )}(h%drm_atomic_get_new_mst_topology_stateh]j )}(hj|h]h%drm_atomic_get_new_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;hhhjLhMCubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jz'c.drm_atomic_get_new_mst_topology_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jz'c.drm_atomic_get_new_mst_topology_stateasbuh1hhj%ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj;hhhjLhMCubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhjLhMCubah}(h]j2ah ](j j eh"]h$]h&]j j )j huh1j{ hjLhMChj4hhubj )}(hhh]h)}(h2get new MST topology state in atomic state, if anyh]h2get new MST topology state in atomic state, if any}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMChjhhubah}(h]h ]h"]h$]h&]uh1j hj4hhhjLhMCubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The new MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMGhjubjU )}(hhh](jZ )}(h8``struct drm_atomic_commit *state`` global atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhjubj| )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMDhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMDhjubjZ )}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hj$h]h#struct drm_dp_mst_topology_mgr *mgr}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMEhjubj| )}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMEhj:ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj9hMEhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMGhjubh)}(hThis function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMFhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMJhjubh)}(hlThe new MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh]hnThe new MST topology state, or NULL if there’s no topology state for this MST mgr in the global atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_mst_topology_mgr_init (C function)c.drm_dp_mst_topology_mgr_inithNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hint drm_dp_mst_topology_mgr_init (struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h]j )}(hint drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM[ubj )}(hdrm_dp_mst_topology_mgr_inith]j )}(hdrm_dp_mst_topology_mgr_inith]hdrm_dp_mst_topology_mgr_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM[ubj)}(h(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j)}jjsbc.drm_dp_mst_topology_mgr_initasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjThhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmgrh]hmgr}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jBc.drm_dp_mst_topology_mgr_initasbuh1hhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjvubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jBc.drm_dp_mst_topology_mgr_initasbuh1hhjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hauxh]haux}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint max_dpcd_transaction_bytesh](j)}(hinth]hint}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hmax_dpcd_transaction_bytesh]hmax_dpcd_transaction_bytes}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint max_payloadsh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h max_payloadsh]h max_payloads}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint conn_base_idh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h conn_base_idh]h conn_base_id}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM[ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM[ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM[hjhhubj )}(hhh]h)}(hinitialise a topology managerh]hinitialise a topology manager}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM[hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM[ubeh}(h]h ](j functioneh"]h$]h&]j j j j"j j"j j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager struct to initialise ``struct drm_device *dev`` device providing this structure - for i2c addition. ``struct drm_dp_aux *aux`` DP helper aux channel to talk to this device ``int max_dpcd_transaction_bytes`` hw specific DPCD transaction limit ``int max_payloads`` maximum number of payloads this GPU can source ``int conn_base_id`` the connector object ID the MST device is connected to. **Description** Return 0 for success, or negative error code on failureh](h)}(h**Parameters**h]j )}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM_hj&ubjU )}(hhh](jZ )}(hE``struct drm_dp_mst_topology_mgr *mgr`` manager struct to initialise h](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjKh]h#struct drm_dp_mst_topology_mgr *mgr}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM\hjEubj| )}(hhh]h)}(hmanager struct to initialiseh]hmanager struct to initialise}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM\hjaubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj`hM\hjBubjZ )}(hO``struct drm_device *dev`` device providing this structure - for i2c addition. h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM]hj~ubj| )}(hhh]h)}(h3device providing this structure - for i2c addition.h]h3device providing this structure - for i2c addition.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hjhM]hjBubjZ )}(hH``struct drm_dp_aux *aux`` DP helper aux channel to talk to this device h](j` )}(h``struct drm_dp_aux *aux``h]jf )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM^hjubj| )}(hhh]h)}(h,DP helper aux channel to talk to this deviceh]h,DP helper aux channel to talk to this device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM^hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM^hjBubjZ )}(hF``int max_dpcd_transaction_bytes`` hw specific DPCD transaction limit h](j` )}(h"``int max_dpcd_transaction_bytes``h]jf )}(hjh]hint max_dpcd_transaction_bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM_hjubj| )}(hhh]h)}(h"hw specific DPCD transaction limith]h"hw specific DPCD transaction limit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM_hj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hM_hjBubjZ )}(hD``int max_payloads`` maximum number of payloads this GPU can source h](j` )}(h``int max_payloads``h]jf )}(hj/h]hint max_payloads}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM`hj)ubj| )}(hhh]h)}(h.maximum number of payloads this GPU can sourceh]h.maximum number of payloads this GPU can source}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhM`hjEubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hjDhM`hjBubjZ )}(hM``int conn_base_id`` the connector object ID the MST device is connected to. h](j` )}(h``int conn_base_id``h]jf )}(hjhh]hint conn_base_id}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMahjbubj| )}(hhh]h)}(h7the connector object ID the MST device is connected to.h]h7the connector object ID the MST device is connected to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMahj~ubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hj}hMahjBubeh}(h]h ]h"]h$]h&]uh1jT hj&ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMchj&ubh)}(h7Return 0 for success, or negative error code on failureh]h7Return 0 for success, or negative error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMbhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_dp_mst_topology_mgr_destroy (C function)!c.drm_dp_mst_topology_mgr_destroyhNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hJvoid drm_dp_mst_topology_mgr_destroy (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hIvoid drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_mst_topology_mgr_destroyh]j )}(hdrm_dp_mst_topology_mgr_destroyh]hdrm_dp_mst_topology_mgr_destroy}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjEmodnameN classnameNj j )}j ]j)}jj sb!c.drm_dp_mst_topology_mgr_destroyasbuh1hhj!ubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!ubj )}(hmgrh]hmgr}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hdestroy topology manager.h]hdestroy topology manager.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjohNhNubj )}(hL**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to destroyh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h:``struct drm_dp_mst_topology_mgr *mgr`` manager to destroyh](j` )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jf )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(hmanager to destroyh]hmanager to destroy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dp_mst_aux_for_parent (C function)c.drm_dp_mst_aux_for_parenthNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hLstruct drm_dp_aux * drm_dp_mst_aux_for_parent (struct drm_dp_mst_port *port)h]j )}(hJstruct drm_dp_aux *drm_dp_mst_aux_for_parent(struct drm_dp_mst_port *port)h](j )}(hj h]hstruct}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?hhhjPhMubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j)}jdrm_dp_mst_aux_for_parentsbc.drm_dp_mst_aux_for_parentasbuh1hhj?hhhjPhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?hhhjPhMubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj?hhhjPhMubj )}(hdrm_dp_mst_aux_for_parenth]j )}(hjh]hdrm_dp_mst_aux_for_parent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj?hhhjPhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j~c.drm_dp_mst_aux_for_parentasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj?hhhjPhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj;hhhjPhMubah}(h]j6ah ](j j eh"]h$]h&]j j )j huh1j{ hjPhMhj8hhubj )}(hhh]h)}(h+Get the AUX device for an MST port's parenth]h-Get the AUX device for an MST port’s parent}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj;hhubah}(h]h ]h"]h$]h&]uh1j hj8hhhjPhMubeh}(h]h ](j functioneh"]h$]h&]j j j jVj jVj j j uh1jv hhhjohNhNubj )}(h**Parameters** ``struct drm_dp_mst_port *port`` MST port whose parent's AUX device is returned **Description** Return the AUX device for **port**'s parent or NULL if port's parent is the root port.h](h)}(h**Parameters**h]j )}(hj`h]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjZubjU )}(hhh]jZ )}(hP``struct drm_dp_mst_port *port`` MST port whose parent's AUX device is returned h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjyubj| )}(hhh]h)}(h.MST port whose parent's AUX device is returnedh]h0MST port whose parent’s AUX device is returned}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjvubah}(h]h ]h"]h$]h&]uh1jT hjZubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjZubh)}(hVReturn the AUX device for **port**'s parent or NULL if port's parent is the root port.h](hReturn the AUX device for }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh8’s parent or NULL if port’s parent is the root port.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjZubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dp_mst_dsc_aux_for_port (C function)c.drm_dp_mst_dsc_aux_for_porthNtauh1jd hjohhhNhNubjw )}(hhh](j| )}(hNstruct drm_dp_aux * drm_dp_mst_dsc_aux_for_port (struct drm_dp_mst_port *port)h]j )}(hLstruct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2modnameN classnameNj j )}j ]j)}jdrm_dp_mst_dsc_aux_for_portsbc.drm_dp_mst_dsc_aux_for_portasbuh1hhj hhhjhMubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj hhhjhMubj )}(hdrm_dp_mst_dsc_aux_for_porth]j )}(hjNh]hdrm_dp_mst_dsc_aux_for_port}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jLc.drm_dp_mst_dsc_aux_for_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hFind the correct aux for DSCh]hFind the correct aux for DSC}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j$j j$j j j uh1jv hhhjohNhNubj )}(hX**Parameters** ``struct drm_dp_mst_port *port`` The port to check. A leaf of the MST tree with an attached display. **Description** Depending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector's physical aux. This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED. This operation can be expensive (up to four aux reads), so the caller should cache the return. **Return** NULL if DSC cannot be enabled on this port, otherwise the aux deviceh](h)}(h**Parameters**h]j )}(hj.h]h Parameters}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj(ubjU )}(hhh]jZ )}(he``struct drm_dp_mst_port *port`` The port to check. A leaf of the MST tree with an attached display. h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjMh]hstruct drm_dp_mst_port *port}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjGubj| )}(hhh]h)}(hCThe port to check. A leaf of the MST tree with an attached display.h]hCThe port to check. A leaf of the MST tree with an attached display.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjcubah}(h]h ]h"]h$]h&]uh1j{ hjGubeh}(h]h ]h"]h$]h&]uh1jY hjbhMhjDubah}(h]h ]h"]h$]h&]uh1jT hj(ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj(ubh)}(hDepending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector's physical aux.h]hDepending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector’s physical aux.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj(ubh)}(h]This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED.h]h]This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj(ubh)}(h^This operation can be expensive (up to four aux reads), so the caller should cache the return.h]h^This operation can be expensive (up to four aux reads), so the caller should cache the return.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj(ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj(ubh)}(hDNULL if DSC cannot be enabled on this port, otherwise the aux deviceh]hDNULL if DSC cannot be enabled on this port, otherwise the aux device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:313: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjohhhNhNubeh}(h]jah ]h"]h$]j-ah&]uh1hhjlhhhhhM4jbCKubh)}(hhh](h)}(hTopology Lifetime Internalsh]hTopology Lifetime Internals}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhM=ubh)}(h~These functions aren't exported to drivers, but are documented here to help make the MST topology helpers easier to understandh]hThese functions aren’t exported to drivers, but are documented here to help make the MST topology helpers easier to understand}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM?hjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_mst_get_mstb_malloc (C function)c.drm_dp_mst_get_mstb_mallochNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h@void drm_dp_mst_get_mstb_malloc (struct drm_dp_mst_branch *mstb)h]j )}(h?void drm_dp_mst_get_mstb_malloc(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhjEhMubj )}(hdrm_dp_mst_get_mstb_malloch]j )}(hdrm_dp_mst_get_mstb_malloch]hdrm_dp_mst_get_mstb_malloc}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhjEhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjZsbc.drm_dp_mst_get_mstb_mallocasbuh1hhjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjpubj )}(hmstbh]hmstb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubah}(h]h ]h"]h$]h&]j j uh1jhj3hhhjEhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj/hhhjEhMubah}(h]j*ah ](j j eh"]h$]h&]j j )j huh1j{ hjEhMhj,hhubj )}(hhh]h)}(h0Increment the malloc refcount of a branch deviceh]h0Increment the malloc refcount of a branch device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj,hhhjEhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount of **Description** Increments :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used. See also: drm_dp_mst_put_mstb_malloc()h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount of h](j` )}(h"``struct drm_dp_mst_branch *mstb``h]jf )}(hj8h]hstruct drm_dp_mst_branch *mstb}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj2ubj| )}(hhh]h)}(h^The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount ofh](hThe }(hjQhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hj[h]hstruct drm_dp_mst_branch}(hj]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjMhMhjQubh$ to increment the malloc refcount of}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjMhMhjNubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hjMhMhj/ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hIncrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used.h](h Increments }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_branch.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_branch.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj )}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh will be released and }(hjhhhNhNubj )}(h**mstb**h]hmstb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h&See also: drm_dp_mst_put_mstb_malloc()h]h&See also: drm_dp_mst_put_mstb_malloc()}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dp_mst_put_mstb_malloc (C function)c.drm_dp_mst_put_mstb_mallochNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h@void drm_dp_mst_put_mstb_malloc (struct drm_dp_mst_branch *mstb)h]j )}(h?void drm_dp_mst_put_mstb_malloc(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjbhMubj )}(hdrm_dp_mst_put_mstb_malloch]j )}(hdrm_dp_mst_put_mstb_malloch]hdrm_dp_mst_put_mstb_malloc}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjbhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjwsbc.drm_dp_mst_put_mstb_mallocasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmstbh]hmstb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjPhhhjbhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjbhMubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j{ hjbhMhjIhhubj )}(hhh]h)}(h0Decrement the malloc refcount of a branch deviceh]h0Decrement the malloc refcount of a branch device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjbhMubeh}(h]h ](j functioneh"]h$]h&]j j j j,j j,j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount of **Description** Decrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used. See also: drm_dp_mst_get_mstb_malloc()h](h)}(h**Parameters**h]j )}(hj6h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj0ubjU )}(hhh]jZ )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount of h](j` )}(h"``struct drm_dp_mst_branch *mstb``h]jf )}(hjUh]hstruct drm_dp_mst_branch *mstb}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjOubj| )}(hhh]h)}(h^The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount ofh](hThe }(hjnhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hjxh]hstruct drm_dp_mst_branch}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjjhMhjnubh$ to decrement the malloc refcount of}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjhMhjkubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjjhMhjLubah}(h]h ]h"]h$]h&]uh1jT hj0ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj0ubh)}(hDecrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used.h](h Decrements }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_branch.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jf )}(hjh]hdrm_dp_mst_branch.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj )}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh will be released and }(hjhhhNhNubj )}(h**mstb**h]hmstb}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj0ubh)}(h&See also: drm_dp_mst_get_mstb_malloc()h]h&See also: drm_dp_mst_get_mstb_malloc()}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_mst_topology_try_get_mstb (C function)"c.drm_dp_mst_topology_try_get_mstbhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hEint drm_dp_mst_topology_try_get_mstb (struct drm_dp_mst_branch *mstb)h]j )}(hDint drm_dp_mst_topology_try_get_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hinth]hint}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmhhhjhMubj )}(h drm_dp_mst_topology_try_get_mstbh]j )}(h drm_dp_mst_topology_try_get_mstbh]h drm_dp_mst_topology_try_get_mstb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjmhhhjhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb"c.drm_dp_mst_topology_try_get_mstbasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmstbh]hmstb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjmhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjihhhjhMubah}(h]jdah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjfhhubj )}(hhh]h)}(hCIncrement the topology refcount of a branch device unless it's zeroh]hEIncrement the topology refcount of a branch device unless it’s zero}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj.hhubah}(h]h ]h"]h$]h&]uh1j hjfhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jIj jIj j j uh1jv hhhjhNhNubj )}(hXz**Parameters** ``struct drm_dp_mst_branch *mstb`` :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of **Description** Attempts to grab a topology reference to **mstb**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_branch.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **mstb** as long as the user holds the topology reference. Care should be taken to ensure that the user has at least one malloc reference to **mstb**. If you already have a topology reference to **mstb**, you should use drm_dp_mst_topology_get_mstb() instead. See also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb() **Return** * 1: A topology reference was grabbed successfully * 0: **port** is no longer in the topology, no reference was grabbedh](h)}(h**Parameters**h]j )}(hjSh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubjU )}(hhh]jZ )}(h``struct drm_dp_mst_branch *mstb`` :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of h](j` )}(h"``struct drm_dp_mst_branch *mstb``h]jf )}(hjrh]hstruct drm_dp_mst_branch *mstb}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubj| )}(hhh]h)}(h\:c:type:`struct drm_dp_mst_branch ` to increment the topology refcount ofh](h)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hjh]hstruct drm_dp_mst_branch}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjubh& to increment the topology refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjiubah}(h]h ]h"]h$]h&]uh1jT hjMubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubh)}(hX>Attempts to grab a topology reference to **mstb**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_branch.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **mstb** as long as the user holds the topology reference.h](h)Attempts to grab a topology reference to }(hjhhhNhNubj )}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh:, if it hasn’t yet been removed from the topology (e.g. }(hjhhhNhNubh)}(h=:c:type:`drm_dp_mst_branch.topology_kref `h]jf )}(hjh]hdrm_dp_mst_branch.topology_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh^ has reached 0). Holding a topology reference implies that a malloc reference will be held to }(hjhhhNhNubj )}(h**mstb**h]hmstb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh2 as long as the user holds the topology reference.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjMubh)}(hCare should be taken to ensure that the user has at least one malloc reference to **mstb**. If you already have a topology reference to **mstb**, you should use drm_dp_mst_topology_get_mstb() instead.h](hRCare should be taken to ensure that the user has at least one malloc reference to }(hj8hhhNhNubj )}(h**mstb**h]hmstb}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubh.. If you already have a topology reference to }(hj8hhhNhNubj )}(h**mstb**h]hmstb}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubh8, you should use drm_dp_mst_topology_get_mstb() instead.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubh)}(hGSee also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb()h]hGSee also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb()}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubh)}(h **Return**h]j )}(hj|h]hReturn}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubh)}(hhh](h)}(h01: A topology reference was grabbed successfullyh]h)}(hjh]h01: A topology reference was grabbed successfully}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hB0: **port** is no longer in the topology, no reference was grabbedh]h)}(hjh](h0: }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh7 is no longer in the topology, no reference was grabbed}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNjOuh1hhjhMhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_mst_topology_get_mstb (C function)c.drm_dp_mst_topology_get_mstbhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hBvoid drm_dp_mst_topology_get_mstb (struct drm_dp_mst_branch *mstb)h]j )}(hAvoid drm_dp_mst_topology_get_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_dp_mst_topology_get_mstbh]j )}(hdrm_dp_mst_topology_get_mstbh]hdrm_dp_mst_topology_get_mstb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jj sbc.drm_dp_mst_topology_get_mstbasbuh1hhj6ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(hmstbh]hmstb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(h2Increment the topology refcount of a branch deviceh]h2Increment the topology refcount of a branch device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX9**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of **Description** Increments :c:type:`drm_dp_mst_branch.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **mstb**. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used. See also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of h](j` )}(h"``struct drm_dp_mst_branch *mstb``h]jf )}(hjh]hstruct drm_dp_mst_branch *mstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj| )}(hhh]h)}(h`The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount ofh](hThe }(hjhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hj!h]hstruct drm_dp_mst_branch}(hj#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjubh& to increment the topology refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj\h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXDIncrements :c:type:`drm_dp_mst_branch.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **mstb**. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used.h](h Increments }(hjrhhhNhNubh)}(hA:c:type:`drm_dp_mst_branch.topology_refcount `h]jf )}(hj|h]h#drm_dp_mst_branch.topology_refcount}(hj~hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjrubh without checking whether or not it’s already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to }(hjrhhhNhNubj )}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubh=. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()h]hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_mst_topology_put_mstb (C function)c.drm_dp_mst_topology_put_mstbhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hBvoid drm_dp_mst_topology_put_mstb (struct drm_dp_mst_branch *mstb)h]j )}(hAvoid drm_dp_mst_topology_put_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_mst_topology_put_mstbh]j )}(hdrm_dp_mst_topology_put_mstbh]hdrm_dp_mst_topology_put_mstb}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hj" hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj/ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hj@ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj= ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjB modnameN classnameNj j )}j ]j)}jj sbc.drm_dp_mst_topology_put_mstbasbuh1hhj ubj )}(h h]h }(hj` hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjn hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hmstbh]hmstb}(hj{ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h/release a topology reference to a branch deviceh]h/release a topology reference to a branch device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjhNhNubj )}(hXp**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to release the topology reference from **Description** Releases a topology reference from **mstb** by decrementing :c:type:`drm_dp_mst_branch.topology_kref `. See also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()h](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubjU )}(hhh]jZ )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to release the topology reference from h](j` )}(h"``struct drm_dp_mst_branch *mstb``h]jf )}(hj h]hstruct drm_dp_mst_branch *mstb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj| )}(hhh]h)}(haThe :c:type:`struct drm_dp_mst_branch ` to release the topology reference fromh](hThe }(hj hhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jf )}(hj h]hstruct drm_dp_mst_branch}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhj hMhj ubh' to release the topology reference from}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjD h]h Description}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjB ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh)}(hzReleases a topology reference from **mstb** by decrementing :c:type:`drm_dp_mst_branch.topology_kref `.h](h#Releases a topology reference from }(hjZ hhhNhNubj )}(h**mstb**h]hmstb}(hjb hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZ ubh by decrementing }(hjZ hhhNhNubh)}(h=:c:type:`drm_dp_mst_branch.topology_kref `h]jf )}(hjv h]hdrm_dp_mst_branch.topology_kref}(hjx hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjt ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjZ ubh.}(hjZ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubh)}(hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()h]hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_dp_mst_topology_try_get_port (C function)"c.drm_dp_mst_topology_try_get_porthNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hCint drm_dp_mst_topology_try_get_port (struct drm_dp_mst_port *port)h]j )}(hBint drm_dp_mst_topology_try_get_port(struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM@ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hM@ubj )}(h drm_dp_mst_topology_try_get_porth]j )}(h drm_dp_mst_topology_try_get_porth]h drm_dp_mst_topology_try_get_port}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hM@ubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj( hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj% ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj* modnameN classnameNj j )}j ]j)}jj sb"c.drm_dp_mst_topology_try_get_portasbuh1hhj ubj )}(h h]h }(hjH hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjV hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hporth]hport}(hjc hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj hM@ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hM@ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hM@hj hhubj )}(hhh]h)}(h:Increment the topology refcount of a port unless it's zeroh]h` to increment the topology refcount of **Description** Attempts to grab a topology reference to **port**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_port.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **port** as long as the user holds the topology reference. Care should be taken to ensure that the user has at least one malloc reference to **port**. If you already have a topology reference to **port**, you should use drm_dp_mst_topology_get_port() instead. See also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port() **Return** * 1: A topology reference was grabbed successfully * 0: **port** is no longer in the topology, no reference was grabbedh](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhj ubjU )}(hhh]jZ )}(hz``struct drm_dp_mst_port *port`` :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hj h]hstruct drm_dp_mst_port *port}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMBhj ubj| )}(hhh]h)}(hX:c:type:`struct drm_dp_mst_port ` to increment the topology refcount ofh](h)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hj h]hstruct drm_dp_mst_port}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhj hMBhj ubh& to increment the topology refcount of}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMBhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMBhj ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj( h]h Description}(hj* hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj& ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhj ubh)}(hX:Attempts to grab a topology reference to **port**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_port.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **port** as long as the user holds the topology reference.h](h)Attempts to grab a topology reference to }(hj> hhhNhNubj )}(h**port**h]hport}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj> ubh:, if it hasn’t yet been removed from the topology (e.g. }(hj> hhhNhNubh)}(h9:c:type:`drm_dp_mst_port.topology_kref `h]jf )}(hjZ h]hdrm_dp_mst_port.topology_kref}(hj\ hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjX ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMChj> ubh^ has reached 0). Holding a topology reference implies that a malloc reference will be held to }(hj> hhhNhNubj )}(h**port**h]hport}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj> ubh2 as long as the user holds the topology reference.}(hj> hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjw hMChj ubh)}(hCare should be taken to ensure that the user has at least one malloc reference to **port**. If you already have a topology reference to **port**, you should use drm_dp_mst_topology_get_port() instead.h](hRCare should be taken to ensure that the user has at least one malloc reference to }(hj hhhNhNubj )}(h**port**h]hport}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh.. If you already have a topology reference to }(hj hhhNhNubj )}(h**port**h]hport}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh8, you should use drm_dp_mst_topology_get_port() instead.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMHhj ubh)}(hGSee also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port()h]hGSee also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMLhj ubh)}(h **Return**h]j )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMPhj ubh)}(hhh](h)}(h01: A topology reference was grabbed successfullyh]h)}(hj h]h01: A topology reference was grabbed successfully}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMQhj ubah}(h]h ]h"]h$]h&]uh1hhj ubh)}(hB0: **port** is no longer in the topology, no reference was grabbedh]h)}(hj h](h0: }(hj hhhNhNubj )}(h**port**h]hport}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh7 is no longer in the topology, no reference was grabbed}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMRhj ubah}(h]h ]h"]h$]h&]uh1hhj ubeh}(h]h ]h"]h$]h&]jNjOuh1hhj hMQhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_mst_topology_get_port (C function)c.drm_dp_mst_topology_get_porthNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h@void drm_dp_mst_topology_get_port (struct drm_dp_mst_port *port)h]j )}(h?void drm_dp_mst_topology_get_port(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjY hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjU hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMfubj )}(h h]h }(hjh hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjU hhhjg hMfubj )}(hdrm_dp_mst_topology_get_porth]j )}(hdrm_dp_mst_topology_get_porth]hdrm_dp_mst_topology_get_port}(hjz hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjU hhhjg hMfubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jj| sbc.drm_dp_mst_topology_get_portasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hporth]hport}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjU hhhjg hMfubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjQ hhhjg hMfubah}(h]jL ah ](j j eh"]h$]h&]j j )j huh1j{ hjg hMfhjN hhubj )}(hhh]h)}(h)Increment the topology refcount of a porth]h)Increment the topology refcount of a port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMfhjhhubah}(h]h ]h"]h$]h&]uh1j hjN hhhjg hMfubeh}(h]h ](j functioneh"]h$]h&]j j j j1j j1j j j uh1jv hhhjhNhNubj )}(hX/**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of **Description** Increments :c:type:`drm_dp_mst_port.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **port**. Otherwise, drm_dp_mst_topology_try_get_port() must be used. See also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()h](h)}(h**Parameters**h]j )}(hj;h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMjhj5ubjU )}(hhh]jZ )}(h~``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjZh]hstruct drm_dp_mst_port *port}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMghjTubj| )}(hhh]h)}(h\The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount ofh](hThe }(hjshhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hj}h]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjohMghjsubh& to increment the topology refcount of}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjohMghjpubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjohMghjQubah}(h]h ]h"]h$]h&]uh1jT hj5ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMihj5ubh)}(hX@Increments :c:type:`drm_dp_mst_port.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **port**. Otherwise, drm_dp_mst_topology_try_get_port() must be used.h](h Increments }(hjhhhNhNubh)}(h=:c:type:`drm_dp_mst_port.topology_refcount `h]jf )}(hjh]h!drm_dp_mst_port.topology_refcount}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhhjubh without checking whether or not it’s already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh=. Otherwise, drm_dp_mst_topology_try_get_port() must be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhhj5ubh)}(hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()h]hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMmhj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_dp_mst_topology_put_port (C function)c.drm_dp_mst_topology_put_porthNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h@void drm_dp_mst_topology_put_port (struct drm_dp_mst_port *port)h]j )}(h?void drm_dp_mst_topology_put_port(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=hhhjOhMubj )}(hdrm_dp_mst_topology_put_porth]j )}(hdrm_dp_mst_topology_put_porth]hdrm_dp_mst_topology_put_port}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj=hhhjOhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjdsbc.drm_dp_mst_topology_put_portasbuh1hhjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjzubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubah}(h]h ]h"]h$]h&]j j uh1jhj=hhhjOhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj9hhhjOhMubah}(h]j4ah ](j j eh"]h$]h&]j j )j huh1j{ hjOhMhj6hhubj )}(hhh]h)}(h&release a topology reference to a porth]h&release a topology reference to a port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj6hhhjOhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXf**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to release the topology reference from **Description** Releases a topology reference from **port** by decrementing :c:type:`drm_dp_mst_port.topology_kref `. See also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()h](h)}(h**Parameters**h]j )}(hj#h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjU )}(hhh]jZ )}(h``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to release the topology reference from h](j` )}(h ``struct drm_dp_mst_port *port``h]jf )}(hjBh]hstruct drm_dp_mst_port *port}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj<ubj| )}(hhh]h)}(h]The :c:type:`struct drm_dp_mst_port ` to release the topology reference fromh](hThe }(hj[hhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jf )}(hjeh]hstruct drm_dp_mst_port}(hjghhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjWhMhj[ubh' to release the topology reference from}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjWhMhjXubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hjWhMhj9ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hvReleases a topology reference from **port** by decrementing :c:type:`drm_dp_mst_port.topology_kref `.h](h#Releases a topology reference from }(hjhhhNhNubj )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh by decrementing }(hjhhhNhNubh)}(h9:c:type:`drm_dp_mst_port.topology_kref `h]jf )}(hjh]hdrm_dp_mst_port.topology_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()h]hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:322: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubeh}(h]jah ]h"]topology lifetime internalsah$]h&]uh1hhjlhhhhhM=ubeh}(h]jDah ]h"]display port mst helpersah$]h&]uh1hhhhhhhhM(ubh)}(hhh](h)}(h#MIPI DBI Helper Functions Referenceh]h#MIPI DBI Helper Functions Reference}(hj!hhhNhNubah}(h]h ]h"]h$]h&]hj>uh1hhjhhhhhMJubh)}(hbThis library provides helpers for MIPI Display Bus Interface (DBI) compatible display controllers.h]hbThis library provides helpers for MIPI Display Bus Interface (DBI) compatible display controllers.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK)hjhhubh)}(hMany controllers for tiny lcd displays are MIPI compliant and can use this library. If a controller uses registers 0x2A and 0x2B to set the area to update and uses register 0x2C to write to frame memory, it is most likely MIPI compliant.h]hMany controllers for tiny lcd displays are MIPI compliant and can use this library. If a controller uses registers 0x2A and 0x2B to set the area to update and uses register 0x2C to write to frame memory, it is most likely MIPI compliant.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK,hjhhubh)}(hLOnly MIPI Type 1 displays are supported since a full frame memory is needed.h]hLOnly MIPI Type 1 displays are supported since a full frame memory is needed.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK1hjhhubh)}(h*There are 3 MIPI DBI implementation types:h]h*There are 3 MIPI DBI implementation types:}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK3hjhhubj+P)}(hhh](h)}(h Motorola 6800 type parallel bus h]h)}(hMotorola 6800 type parallel bush]hMotorola 6800 type parallel bus}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK5hjnubah}(h]h ]h"]h$]h&]uh1hhjkubh)}(hIntel 8080 type parallel bus h]h)}(hIntel 8080 type parallel bush]hIntel 8080 type parallel bus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK7hjubah}(h]h ]h"]h$]h&]uh1hhjkubh)}(hSPI type with 3 options: 1. 9-bit with the Data/Command signal as the ninth bit 2. Same as above except it's sent as 16 bits 3. 8-bit with the Data/Command signal as a separate D/CX pin h](h)}(hSPI type with 3 options:h]hSPI type with 3 options:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK9hjubj+P)}(hhh](h)}(h39-bit with the Data/Command signal as the ninth bith]h)}(hjh]h39-bit with the Data/Command signal as the ninth bit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chK;hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h)Same as above except it's sent as 16 bitsh]h)}(hjh]h+Same as above except it’s sent as 16 bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/drm_mipi_dbi.chKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdbih]hdbi}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j:c.mipi_dbi_command_bufasbuh1hhjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(hcmdh]hcmd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 *datah](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j:c.mipi_dbi_command_bufasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j:c.mipi_dbi_command_bufasbuh1hhj ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hlenh]hlen}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h.MIPI DCS command with parameter(s) in an arrayh]h.MIPI DCS command with parameter(s) in an array}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjehhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure ``u8 cmd`` Command ``u8 *data`` Parameter buffer ``size_t len`` Buffer length **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjubjU )}(hhh](jZ )}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](j` )}(h``struct mipi_dbi *dbi``h]jf )}(hjh]hstruct mipi_dbi *dbi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjubj| )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h``u8 cmd`` Command h](j` )}(h ``u8 cmd``h]jf )}(hjh]hu8 cmd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjubj| )}(hhh]h)}(hCommandh]hCommand}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h``u8 *data`` Parameter buffer h](j` )}(h ``u8 *data``h]jf )}(hj h]hu8 *data}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhj ubj| )}(hhh]h)}(hParameter bufferh]hParameter buffer}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0 hKhj1 ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj0 hKhjubjZ )}(h``size_t len`` Buffer length h](j` )}(h``size_t len``h]jf )}(hjT h]h size_t len}(hjV hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjR ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjN ubj| )}(hhh]h)}(h Buffer lengthh]h Buffer length}(hjm hhhNhNubah}(h]h ]h"]h$]h&]uh1hhji hKhjj ubah}(h]h ]h"]h$]h&]uh1j{ hjN ubeh}(h]h ]h"]h$]h&]uh1jY hji hKhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dbi_buf_copy (C function)c.mipi_dbi_buf_copyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hint mipi_dbi_buf_copy (void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h]j )}(hint mipi_dbi_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hKubj )}(hmipi_dbi_buf_copyh]j )}(hmipi_dbi_buf_copyh]hmipi_dbi_buf_copy}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hKubj)}(h(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h](j)}(h void *dsth](j)}(hvoidh]hvoid}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj !ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj !ubj)}(hjOh]h*}(hj-!hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj !ubj )}(hdsth]hdst}(hj:!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj !ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj !ubj)}(hstruct iosys_map *srch](j )}(hj h]hstruct}(hjS!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO!ubj )}(h h]h }(hj`!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO!ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjq!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjs!modnameN classnameNj j )}j ]j)}jj sbc.mipi_dbi_buf_copyasbuh1hhjO!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO!ubj)}(hjOh]h*}(hj!hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjO!ubj )}(hsrch]hsrc}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj !ubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j!c.mipi_dbi_buf_copyasbuh1hhj!ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj!ubj )}(hfbh]hfb}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj !ubj)}(hstruct drm_rect *cliph](j )}(hj h]hstruct}(hj5"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1"ubj )}(h h]h }(hjB"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1"ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjS"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjP"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjU"modnameN classnameNj j )}j ]j!c.mipi_dbi_buf_copyasbuh1hhj1"ubj )}(h h]h }(hjq"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1"ubj)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1"ubj )}(hcliph]hclip}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj !ubj)}(h bool swaph](j)}(hjIh]hbool}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(hswaph]hswap}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj !ubj)}(h*struct drm_format_conv_state *fmtcnv_stateh](j )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]j!c.mipi_dbi_buf_copyasbuh1hhj"ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hjOh]h*}(hj##hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"ubj )}(h fmtcnv_stateh]h fmtcnv_state}(hj0#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj !ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hKubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hKhj hhubj )}(hhh]h)}(h0Copy a framebuffer, transforming it if necessaryh]h0Copy a framebuffer, transforming it if necessary}(hjZ#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjW#hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hKubeh}(h]h ](j functioneh"]h$]h&]j j j jr#j jr#j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``void *dst`` The destination buffer ``struct iosys_map *src`` The source buffer ``struct drm_framebuffer *fb`` The source framebuffer ``struct drm_rect *clip`` Clipping rectangle of the area to be copied ``bool swap`` When true, swap MSB/LSB of 16-bit values ``struct drm_format_conv_state *fmtcnv_state`` Format-conversion state **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hj|#h]h Parameters}(hj~#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz#ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjv#ubjU )}(hhh](jZ )}(h%``void *dst`` The destination buffer h](j` )}(h ``void *dst``h]jf )}(hj#h]h void *dst}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhj#ubj| )}(hhh]h)}(hThe destination bufferh]hThe destination buffer}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKhj#ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj#hKhj#ubjZ )}(h,``struct iosys_map *src`` The source buffer h](j` )}(h``struct iosys_map *src``h]jf )}(hj#h]hstruct iosys_map *src}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhj#ubj| )}(hhh]h)}(hThe source bufferh]hThe source buffer}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKhj#ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj#hKhj#ubjZ )}(h6``struct drm_framebuffer *fb`` The source framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hj $h]hstruct drm_framebuffer *fb}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj $ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhj$ubj| )}(hhh]h)}(hThe source framebufferh]hThe source framebuffer}(hj&$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"$hKhj#$ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj"$hKhj#ubjZ )}(hF``struct drm_rect *clip`` Clipping rectangle of the area to be copied h](j` )}(h``struct drm_rect *clip``h]jf )}(hjF$h]hstruct drm_rect *clip}(hjH$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjD$ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhj@$ubj| )}(hhh]h)}(h+Clipping rectangle of the area to be copiedh]h+Clipping rectangle of the area to be copied}(hj_$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[$hKhj\$ubah}(h]h ]h"]h$]h&]uh1j{ hj@$ubeh}(h]h ]h"]h$]h&]uh1jY hj[$hKhj#ubjZ )}(h7``bool swap`` When true, swap MSB/LSB of 16-bit values h](j` )}(h ``bool swap``h]jf )}(hj$h]h bool swap}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}$ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjy$ubj| )}(hhh]h)}(h(When true, swap MSB/LSB of 16-bit valuesh]h(When true, swap MSB/LSB of 16-bit values}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj$ubah}(h]h ]h"]h$]h&]uh1j{ hjy$ubeh}(h]h ]h"]h$]h&]uh1jY hj$hKhj#ubjZ )}(hG``struct drm_format_conv_state *fmtcnv_state`` Format-conversion state h](j` )}(h.``struct drm_format_conv_state *fmtcnv_state``h]jf )}(hj$h]h*struct drm_format_conv_state *fmtcnv_state}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhj$ubj| )}(hhh]h)}(hFormat-conversion stateh]hFormat-conversion state}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj$ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj$hKhj#ubeh}(h]h ]h"]h$]h&]uh1jT hjv#ubh)}(h **Return**h]j )}(hj$h]hReturn}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjv#ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj %hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKhjv#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0drm_mipi_dbi_crtc_helper_mode_valid (C function)%c.drm_mipi_dbi_crtc_helper_mode_validhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(huenum drm_mode_status drm_mipi_dbi_crtc_helper_mode_valid (struct drm_crtc *crtc, const struct drm_display_mode *mode)h]j )}(htenum drm_mode_status drm_mipi_dbi_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)h](j )}(hj+h]henum}(hj8%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4%hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM=ubj )}(h h]h }(hjF%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4%hhhjE%hM=ubh)}(hhh]j )}(hdrm_mode_statush]hdrm_mode_status}(hjW%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjY%modnameN classnameNj j )}j ]j)}j#drm_mipi_dbi_crtc_helper_mode_validsb%c.drm_mipi_dbi_crtc_helper_mode_validasbuh1hhj4%hhhjE%hM=ubj )}(h h]h }(hjx%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4%hhhjE%hM=ubj )}(h#drm_mipi_dbi_crtc_helper_mode_validh]j )}(hju%h]h#drm_mipi_dbi_crtc_helper_mode_valid}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj4%hhhjE%hM=ubj)}(h<(struct drm_crtc *crtc, const struct drm_display_mode *mode)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%modnameN classnameNj j )}j ]js%%c.drm_mipi_dbi_crtc_helper_mode_validasbuh1hhj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hcrtch]hcrtc}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubj)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hj"&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(hj h]hstruct}(hj0&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hj=&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjN&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjP&modnameN classnameNj j )}j ]js%%c.drm_mipi_dbi_crtc_helper_mode_validasbuh1hhj&ubj )}(h h]h }(hjl&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj)}(hjOh]h*}(hjz&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj&ubj )}(hmodeh]hmode}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubeh}(h]h ]h"]h$]h&]j j uh1jhj4%hhhjE%hM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj0%hhhjE%hM=ubah}(h]j+%ah ](j j eh"]h$]h&]j j )j huh1j{ hjE%hM=hj-%hhubj )}(hhh]h)}(hMIPI DBI mode-valid helperh]hMIPI DBI mode-valid helper}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM=hj&hhubah}(h]h ]h"]h$]h&]uh1j hj-%hhhjE%hM=ubeh}(h]h ](j functioneh"]h$]h&]j j j j&j j&j j j uh1jv hhhjhNhNubj )}(hXJ**Parameters** ``struct drm_crtc *crtc`` The CRTC ``const struct drm_display_mode *mode`` The mode to test **Description** This function validates a given display mode against the MIPI DBI's hardware display. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.mode_valid ` callback.h](h)}(h**Parameters**h]j )}(hj&h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMAhj&ubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` The CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hj&h]hstruct drm_crtc *crtc}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM>hj&ubj| )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj 'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM>hj'ubah}(h]h ]h"]h$]h&]uh1j{ hj&ubeh}(h]h ]h"]h$]h&]uh1jY hj'hM>hj&ubjZ )}(h9``const struct drm_display_mode *mode`` The mode to test h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hj+'h]h#const struct drm_display_mode *mode}(hj-'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)'ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM?hj%'ubj| )}(hhh]h)}(hThe mode to testh]hThe mode to test}(hjD'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@'hM?hjA'ubah}(h]h ]h"]h$]h&]uh1j{ hj%'ubeh}(h]h ]h"]h$]h&]uh1jY hj@'hM?hj&ubeh}(h]h ]h"]h$]h&]uh1jT hj&ubh)}(h**Description**h]j )}(hjf'h]h Description}(hjh'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjd'ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMAhj&ubh)}(hThis function validates a given display mode against the MIPI DBI's hardware display. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.mode_valid ` callback.h](h}This function validates a given display mode against the MIPI DBI’s hardware display. Drivers can use this as their struct }(hj|'hhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]jf )}(hj'h]h drm_crtc_helper_funcs.mode_valid}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM@hj|'ubh callback.}(hj|'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hM@hj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_mipi_dbi_plane_helper_atomic_check (C function)(c.drm_mipi_dbi_plane_helper_atomic_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(heint drm_mipi_dbi_plane_helper_atomic_check (struct drm_plane *plane, struct drm_atomic_commit *state)h]j )}(hdint drm_mipi_dbi_plane_helper_atomic_check(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMOubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhj'hMOubj )}(h&drm_mipi_dbi_plane_helper_atomic_checkh]j )}(h&drm_mipi_dbi_plane_helper_atomic_checkh]h&drm_mipi_dbi_plane_helper_atomic_check}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'hhhj'hMOubj)}(h:(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj (hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj)(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+(modnameN classnameNj j )}j ]j)}jj'sb(c.drm_mipi_dbi_plane_helper_atomic_checkasbuh1hhj(ubj )}(h h]h }(hjI(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj)}(hjOh]h*}(hjW(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubj )}(hplaneh]hplane}(hjd(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj(ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj}(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy(ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]jE((c.drm_mipi_dbi_plane_helper_atomic_checkasbuh1hhjy(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy(ubj)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjy(ubj )}(hstateh]hstate}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj(ubeh}(h]h ]h"]h$]h&]j j uh1jhj'hhhj'hMOubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj'hhhj'hMOubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j{ hj'hMOhj'hhubj )}(hhh]h)}(hMIPI DBI plane check helperh]hMIPI DBI plane check helper}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMOhj(hhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj'hMOubeh}(h]h ](j functioneh"]h$]h&]j j j j)j j)j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_plane *plane`` Plane to check ``struct drm_atomic_commit *state`` Atomic state **Description** This function performs the default checks on the primary plane of a MIPI DBI device. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hj )h]h Parameters}(hj")hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMShj)ubjU )}(hhh](jZ )}(h+``struct drm_plane *plane`` Plane to check h](j` )}(h``struct drm_plane *plane``h]jf )}(hj?)h]hstruct drm_plane *plane}(hjA)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=)ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMPhj9)ubj| )}(hhh]h)}(hPlane to checkh]hPlane to check}(hjX)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT)hMPhjU)ubah}(h]h ]h"]h$]h&]uh1j{ hj9)ubeh}(h]h ]h"]h$]h&]uh1jY hjT)hMPhj6)ubjZ )}(h1``struct drm_atomic_commit *state`` Atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hjx)h]hstruct drm_atomic_commit *state}(hjz)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjv)ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMQhjr)ubj| )}(hhh]h)}(h Atomic stateh]h Atomic state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMQhj)ubah}(h]h ]h"]h$]h&]uh1j{ hjr)ubeh}(h]h ]h"]h$]h&]uh1jY hj)hMQhj6)ubeh}(h]h ]h"]h$]h&]uh1jT hj)ubh)}(h**Description**h]j )}(hj)h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMShj)ubh)}(hThis function performs the default checks on the primary plane of a MIPI DBI device. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback.h](hzThis function performs the default checks on the primary plane of a MIPI DBI device. Drivers can use this as their struct }(hj)hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]jf )}(hj)h]h"drm_crtc_helper_funcs.atomic_check}(hj)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMRhj)ubh callback.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj)hMRhj)ubh)}(h **Return**h]j )}(hj)h]hReturn}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMVhj)ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMWhj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_mipi_dbi_plane_helper_atomic_update (C function))c.drm_mipi_dbi_plane_helper_atomic_updatehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hgvoid drm_mipi_dbi_plane_helper_atomic_update (struct drm_plane *plane, struct drm_atomic_commit *state)h]j )}(hfvoid drm_mipi_dbi_plane_helper_atomic_update(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjB*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>*hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMrubj )}(h h]h }(hjQ*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>*hhhjP*hMrubj )}(h'drm_mipi_dbi_plane_helper_atomic_updateh]j )}(h'drm_mipi_dbi_plane_helper_atomic_updateh]h'drm_mipi_dbi_plane_helper_atomic_update}(hjc*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_*ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>*hhhjP*hMrubj)}(h:(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{*ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j)}jje*sb)c.drm_mipi_dbi_plane_helper_atomic_updateasbuh1hhj{*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{*ubj)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj{*ubj )}(hplaneh]hplane}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjw*ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj +ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j*)c.drm_mipi_dbi_plane_helper_atomic_updateasbuh1hhj*ubj )}(h h]h }(hj-+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hjOh]h*}(hj;+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*ubj )}(hstateh]hstate}(hjH+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjw*ubeh}(h]h ]h"]h$]h&]j j uh1jhj>*hhhjP*hMrubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:*hhhjP*hMrubah}(h]j5*ah ](j j eh"]h$]h&]j j )j huh1j{ hjP*hMrhj7*hhubj )}(hhh]h)}(hDisplay update helperh]hDisplay update helper}(hjr+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMrhjo+hhubah}(h]h ]h"]h$]h&]uh1j hj7*hhhjP*hMrubeh}(h]h ](j functioneh"]h$]h&]j j j j+j j+j j j uh1jv hhhjhNhNubj )}(hX.**Parameters** ``struct drm_plane *plane`` Plane ``struct drm_atomic_commit *state`` Atomic state **Description** This function handles framebuffer flushing and vblank events. Drivers can use this as their struct :c:type:`drm_plane_helper_funcs.atomic_update ` callback.h](h)}(h**Parameters**h]j )}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMvhj+ubjU )}(hhh](jZ )}(h"``struct drm_plane *plane`` Plane h](j` )}(h``struct drm_plane *plane``h]jf )}(hj+h]hstruct drm_plane *plane}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMshj+ubj| )}(hhh]h)}(hPlaneh]hPlane}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMshj+ubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hj+hMshj+ubjZ )}(h1``struct drm_atomic_commit *state`` Atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj+h]hstruct drm_atomic_commit *state}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMthj+ubj| )}(hhh]h)}(h Atomic stateh]h Atomic state}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMthj,ubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hj,hMthj+ubeh}(h]h ]h"]h$]h&]uh1jT hj+ubh)}(h**Description**h]j )}(hj',h]h Description}(hj),hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%,ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMvhj+ubh)}(hThis function handles framebuffer flushing and vblank events. Drivers can use this as their struct :c:type:`drm_plane_helper_funcs.atomic_update ` callback.h](hcThis function handles framebuffer flushing and vblank events. Drivers can use this as their struct }(hj=,hhhNhNubh)}(hG:c:type:`drm_plane_helper_funcs.atomic_update `h]jf )}(hjG,h]h$drm_plane_helper_funcs.atomic_update}(hjI,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjE,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMuhj=,ubh callback.}(hj=,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjd,hMuhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2drm_mipi_dbi_crtc_helper_atomic_check (C function)'c.drm_mipi_dbi_crtc_helper_atomic_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hbint drm_mipi_dbi_crtc_helper_atomic_check (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(haint drm_mipi_dbi_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj,hMubj )}(h%drm_mipi_dbi_crtc_helper_atomic_checkh]j )}(h%drm_mipi_dbi_crtc_helper_atomic_checkh]h%drm_mipi_dbi_crtc_helper_atomic_check}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj,hMubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j)}jj,sb'c.drm_mipi_dbi_crtc_helper_atomic_checkasbuh1hhj,ubj )}(h h]h }(hj -hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj,ubj )}(hcrtch]hcrtc}(hj%-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj>-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:-ubj )}(h h]h }(hjK-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:-ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj\-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^-modnameN classnameNj j )}j ]j-'c.drm_mipi_dbi_crtc_helper_atomic_checkasbuh1hhj:-ubj )}(h h]h }(hjz-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:-ubj)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj:-ubj )}(hstateh]hstate}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubeh}(h]h ]h"]h$]h&]j j uh1jhj,hhhj,hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj,hhhj,hMubah}(h]j,ah ](j j eh"]h$]h&]j j )j huh1j{ hj,hMhj,hhubj )}(hhh]h)}(hMIPI DBI CRTC check helperh]hMIPI DBI CRTC check helper}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj-hhubah}(h]h ]h"]h$]h&]uh1j hj,hhhj,hMubeh}(h]h ](j functioneh"]h$]h&]j j j j-j j-j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_crtc *crtc`` CRTC to check ``struct drm_atomic_commit *state`` Atomic state **Description** This function performs the default checks on the CRTC of a MIPI DBI device and ensures that the primary plane as been set up correctly. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j )}(hj-h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj-ubjU )}(hhh](jZ )}(h(``struct drm_crtc *crtc`` CRTC to check h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hj.h]hstruct drm_crtc *crtc}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj-ubj| )}(hhh]h)}(h CRTC to checkh]h CRTC to check}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hj.hMhj-ubjZ )}(h1``struct drm_atomic_commit *state`` Atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj9.h]hstruct drm_atomic_commit *state}(hj;.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7.ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj3.ubj| )}(hhh]h)}(h Atomic stateh]h Atomic state}(hjR.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjN.hMhjO.ubah}(h]h ]h"]h$]h&]uh1j{ hj3.ubeh}(h]h ]h"]h$]h&]uh1jY hjN.hMhj-ubeh}(h]h ]h"]h$]h&]uh1jT hj-ubh)}(h**Description**h]j )}(hjt.h]h Description}(hjv.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjr.ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj-ubh)}(hThis function performs the default checks on the CRTC of a MIPI DBI device and ensures that the primary plane as been set up correctly. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback.h](hThis function performs the default checks on the CRTC of a MIPI DBI device and ensures that the primary plane as been set up correctly. Drivers can use this as their struct }(hj.hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]jf )}(hj.h]h"drm_crtc_helper_funcs.atomic_check}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj.ubh callback.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj.hMhj-ubh)}(h **Return**h]j )}(hj.h]hReturn}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj-ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_mipi_dbi_crtc_helper_atomic_disable (C function))c.drm_mipi_dbi_crtc_helper_atomic_disablehNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hevoid drm_mipi_dbi_crtc_helper_atomic_disable (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(hdvoid drm_mipi_dbi_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhj/hMubj )}(h'drm_mipi_dbi_crtc_helper_atomic_disableh]j )}(h'drm_mipi_dbi_crtc_helper_atomic_disableh]h'drm_mipi_dbi_crtc_helper_atomic_disable}(hj$/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj /ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhj/hMubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj@/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj` callback.h](h)}(h**Parameters**h]j )}(hjU0h]h Parameters}(hjW0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjS0ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjO0ubjU )}(hhh](jZ )}(h*``struct drm_crtc *crtc`` CRTC to disable h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjt0h]hstruct drm_crtc *crtc}(hjv0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjr0ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjn0ubj| )}(hhh]h)}(hCRTC to disableh]hCRTC to disable}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1j{ hjn0ubeh}(h]h ]h"]h$]h&]uh1jY hj0hMhjk0ubjZ )}(h1``struct drm_atomic_commit *state`` Atomic state h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj0h]hstruct drm_atomic_commit *state}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0ubj| )}(hhh]h)}(h Atomic stateh]h Atomic state}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1j{ hj0ubeh}(h]h ]h"]h$]h&]uh1jY hj0hMhjk0ubeh}(h]h ]h"]h$]h&]uh1jT hjO0ubh)}(h**Description**h]j )}(hj0h]h Description}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjO0ubh)}(hThis function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_disable ` callback.h](hThis function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their struct }(hj0hhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]jf )}(hj1h]h$drm_crtc_helper_funcs.atomic_disable}(hj 1hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0ubh callback.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj%1hMhjO0ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 4drm_mipi_dbi_connector_helper_get_modes (C function))c.drm_mipi_dbi_connector_helper_get_modeshNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hMint drm_mipi_dbi_connector_helper_get_modes (struct drm_connector *connector)h]j )}(hLint drm_mipi_dbi_connector_helper_get_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjP1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL1hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj_1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjL1hhhj^1hMubj )}(h'drm_mipi_dbi_connector_helper_get_modesh]j )}(h'drm_mipi_dbi_connector_helper_get_modesh]h'drm_mipi_dbi_connector_helper_get_modes}(hjq1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjm1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjL1hhhj^1hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j)}jjs1sb)c.drm_mipi_dbi_connector_helper_get_modesasbuh1hhj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(h connectorh]h connector}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubah}(h]h ]h"]h$]h&]j j uh1jhjL1hhhj^1hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjH1hhhj^1hMubah}(h]jC1ah ](j j eh"]h$]h&]j j )j huh1j{ hj^1hMhjE1hhubj )}(hhh]h)}(h.Duplicates the MIPI DBI mode for the connectorh]h.Duplicates the MIPI DBI mode for the connector}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj 2hhubah}(h]h ]h"]h$]h&]uh1j hjE1hhhj^1hMubeh}(h]h ](j functioneh"]h$]h&]j j j j(2j j(2j j j uh1jv hhhjhNhNubj )}(hXe**Parameters** ``struct drm_connector *connector`` The connector **Description** Sets the connecto rmodes from the MIPI DBI mode. Drivers can use this as their :c:type:`drm_connector_helper_funcs->get_mods ` callback. See drm_gem_destroy_shadow_plane_state() for additional details. **Return** The number of created modes.h](h)}(h**Parameters**h]j )}(hj22h]h Parameters}(hj42hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj02ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj,2ubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` The connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjQ2h]hstruct drm_connector *connector}(hjS2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjO2ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjK2ubj| )}(hhh]h)}(h The connectorh]h The connector}(hjj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjf2hMhjg2ubah}(h]h ]h"]h$]h&]uh1j{ hjK2ubeh}(h]h ]h"]h$]h&]uh1jY hjf2hMhjH2ubah}(h]h ]h"]h$]h&]uh1jT hj,2ubh)}(h**Description**h]j )}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj,2ubh)}(hSets the connecto rmodes from the MIPI DBI mode. Drivers can use this as their :c:type:`drm_connector_helper_funcs->get_mods ` callback. See drm_gem_destroy_shadow_plane_state() for additional details.h](hOSets the connecto rmodes from the MIPI DBI mode. Drivers can use this as their }(hj2hhhNhNubh)}(hK:c:type:`drm_connector_helper_funcs->get_mods `h]jf )}(hj2h]h$drm_connector_helper_funcs->get_mods}(hj2hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj2ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj2ubhK callback. See drm_gem_destroy_shadow_plane_state() for additional details.}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2hMhj,2ubh)}(h **Return**h]j )}(hj2h]hReturn}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj,2ubh)}(hThe number of created modes.h]hThe number of created modes.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj,2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_mipi_dbi_dev_init (C function)c.drm_mipi_dbi_dev_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hint drm_mipi_dbi_dev_init (struct mipi_dbi_dev *dbidev, const struct drm_display_mode *mode, u32 format, unsigned int rotation, size_t tx_buf_size)h]j )}(hint drm_mipi_dbi_dev_init(struct mipi_dbi_dev *dbidev, const struct drm_display_mode *mode, u32 format, unsigned int rotation, size_t tx_buf_size)h](j)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj*3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhj)3hMubj )}(hdrm_mipi_dbi_dev_inith]j )}(hdrm_mipi_dbi_dev_inith]hdrm_mipi_dbi_dev_init}(hj<3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj83ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhj)3hMubj)}(hy(struct mipi_dbi_dev *dbidev, const struct drm_display_mode *mode, u32 format, unsigned int rotation, size_t tx_buf_size)h](j)}(hstruct mipi_dbi_dev *dbidevh](j )}(hj h]hstruct}(hjX3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT3ubj )}(h h]h }(hje3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT3ubh)}(hhh]j )}(h mipi_dbi_devh]h mipi_dbi_dev}(hjv3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjx3modnameN classnameNj j )}j ]j)}jj>3sbc.drm_mipi_dbi_dev_initasbuh1hhjT3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT3ubj)}(hjOh]h*}(hj3hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjT3ubj )}(hdbidevh]hdbidev}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjP3ubj)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j3c.drm_mipi_dbi_dev_initasbuh1hhj3ubj )}(h h]h }(hj!4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hjOh]h*}(hj/4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3ubj )}(hmodeh]hmode}(hj<4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjP3ubj)}(h u32 formath](h)}(hhh]j )}(hu32h]hu32}(hjX4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjU4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZ4modnameN classnameNj j )}j ]j3c.drm_mipi_dbi_dev_initasbuh1hhjQ4ubj )}(h h]h }(hjv4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ4ubj )}(hformath]hformat}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjP3ubj)}(hunsigned int rotationh](j)}(hunsignedh]hunsigned}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj)}(hinth]hint}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(hrotationh]hrotation}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjP3ubj)}(hsize_t tx_buf_sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j3c.drm_mipi_dbi_dev_initasbuh1hhj4ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h tx_buf_sizeh]h tx_buf_size}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjP3ubeh}(h]h ]h"]h$]h&]j j uh1jhj3hhhj)3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhj)3hMubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j{ hj)3hMhj3hhubj )}(hhh]h)}(hMIPI DBI device initializationh]hMIPI DBI device initialization}(hjG5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjD5hhubah}(h]h ]h"]h$]h&]uh1j hj3hhhj)3hMubeh}(h]h ](j functioneh"]h$]h&]j j j j_5j j_5j j j uh1jv hhhjhNhNubj )}(hXr**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure to initialize ``const struct drm_display_mode *mode`` Hardware display mode ``u32 format`` Hardware color format (DRM_FORMAT\_\*). ``unsigned int rotation`` Initial rotation in degrees Counter Clock Wise ``size_t tx_buf_size`` Allocate a transmit buffer of at least this size. **Description** Initializes a MIPI-DBI device. The minimum size of the transmit buffer in **tx_buf_size** is optional. Pass 0 to allocate enough memory to transmit a single scanline of the display. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hji5h]h Parameters}(hjk5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjg5ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM hjc5ubjU )}(hhh](jZ )}(hH``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure to initialize h](j` )}(h``struct mipi_dbi_dev *dbidev``h]jf )}(hj5h]hstruct mipi_dbi_dev *dbidev}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj5ubj| )}(hhh]h)}(h'MIPI DBI device structure to initializeh]h'MIPI DBI device structure to initialize}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj5ubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hj5hMhj5ubjZ )}(h>``const struct drm_display_mode *mode`` Hardware display mode h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hj5h]h#const struct drm_display_mode *mode}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj5ubj| )}(hhh]h)}(hHardware display modeh]hHardware display mode}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj5ubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hj5hMhj5ubjZ )}(h7``u32 format`` Hardware color format (DRM_FORMAT\_\*). h](j` )}(h``u32 format``h]jf )}(hj5h]h u32 format}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj5ubj| )}(hhh]h)}(h'Hardware color format (DRM_FORMAT\_\*).h]h'Hardware color format (DRM_FORMAT_*).}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhj5ubjZ )}(hI``unsigned int rotation`` Initial rotation in degrees Counter Clock Wise h](j` )}(h``unsigned int rotation``h]jf )}(hj36h]hunsigned int rotation}(hj56hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj16ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM hj-6ubj| )}(hhh]h)}(h.Initial rotation in degrees Counter Clock Wiseh]h.Initial rotation in degrees Counter Clock Wise}(hjL6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjH6hM hjI6ubah}(h]h ]h"]h$]h&]uh1j{ hj-6ubeh}(h]h ]h"]h$]h&]uh1jY hjH6hM hj5ubjZ )}(hI``size_t tx_buf_size`` Allocate a transmit buffer of at least this size. h](j` )}(h``size_t tx_buf_size``h]jf )}(hjl6h]hsize_t tx_buf_size}(hjn6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjj6ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM hjf6ubj| )}(hhh]h)}(h1Allocate a transmit buffer of at least this size.h]h1Allocate a transmit buffer of at least this size.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hM hj6ubah}(h]h ]h"]h$]h&]uh1j{ hjf6ubeh}(h]h ]h"]h$]h&]uh1jY hj6hM hj5ubeh}(h]h ]h"]h$]h&]uh1jT hjc5ubh)}(h**Description**h]j )}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM hjc5ubh)}(hInitializes a MIPI-DBI device. The minimum size of the transmit buffer in **tx_buf_size** is optional. Pass 0 to allocate enough memory to transmit a single scanline of the display.h](hJInitializes a MIPI-DBI device. The minimum size of the transmit buffer in }(hj6hhhNhNubj )}(h**tx_buf_size**h]h tx_buf_size}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubh\ is optional. Pass 0 to allocate enough memory to transmit a single scanline of the display.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM hjc5ubh)}(h **Return**h]j )}(hj6h]hReturn}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjc5ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjc5ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dbi_hw_reset (C function)c.mipi_dbi_hw_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h-void mipi_dbi_hw_reset (struct mipi_dbi *dbi)h]j )}(h,void mipi_dbi_hw_reset(struct mipi_dbi *dbi)h](j)}(hvoidh]hvoid}(hj%7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!7hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM:ubj )}(h h]h }(hj47hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!7hhhj37hM:ubj )}(hmipi_dbi_hw_reseth]j )}(hmipi_dbi_hw_reseth]hmipi_dbi_hw_reset}(hjF7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!7hhhj37hM:ubj)}(h(struct mipi_dbi *dbi)h]j)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hjb7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^7ubj )}(h h]h }(hjo7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^7ubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j)}jjH7sbc.mipi_dbi_hw_resetasbuh1hhj^7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^7ubj)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^7ubj )}(hdbih]hdbi}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZ7ubah}(h]h ]h"]h$]h&]j j uh1jhj!7hhhj37hM:ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhj37hM:ubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j{ hj37hM:hj7hhubj )}(hhh]h)}(hHardware reset of controllerh]hHardware reset of controller}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM:hj7hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhj37hM:ubeh}(h]h ](j functioneh"]h$]h&]j j j j7j j7j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure **Description** Reset controller if the :c:type:`mipi_dbi->reset ` gpio is set.h](h)}(h**Parameters**h]j )}(hj8h]h Parameters}(hj 8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM>hj8ubjU )}(hhh]jZ )}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](j` )}(h``struct mipi_dbi *dbi``h]jf )}(hj&8h]hstruct mipi_dbi *dbi}(hj(8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$8ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM;hj 8ubj| )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj?8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;8hM;hj<8ubah}(h]h ]h"]h$]h&]uh1j{ hj 8ubeh}(h]h ]h"]h$]h&]uh1jY hj;8hM;hj8ubah}(h]h ]h"]h$]h&]uh1jT hj8ubh)}(h**Description**h]j )}(hja8h]h Description}(hjc8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_8ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM=hj8ubh)}(hIReset controller if the :c:type:`mipi_dbi->reset ` gpio is set.h](hReset controller if the }(hjw8hhhNhNubh)}(h$:c:type:`mipi_dbi->reset `h]jf )}(hj8h]hmipi_dbi->reset}(hj8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dbiuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM<hjw8ubh gpio is set.}(hjw8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8hM<hj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #mipi_dbi_display_is_on (C function)c.mipi_dbi_display_is_onhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h2bool mipi_dbi_display_is_on (struct mipi_dbi *dbi)h]j )}(h1bool mipi_dbi_display_is_on(struct mipi_dbi *dbi)h](j)}(hjIh]hbool}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMLubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8hhhj8hMLubj )}(hmipi_dbi_display_is_onh]j )}(hmipi_dbi_display_is_onh]hmipi_dbi_display_is_on}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj8hhhj8hMLubj)}(h(struct mipi_dbi *dbi)h]j)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hj#9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%9modnameN classnameNj j )}j ]j)}jj8sbc.mipi_dbi_display_is_onasbuh1hhj9ubj )}(h h]h }(hjC9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj)}(hjOh]h*}(hjQ9hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj9ubj )}(hdbih]hdbi}(hj^9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubah}(h]h ]h"]h$]h&]j j uh1jhj8hhhj8hMLubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj8hhhj8hMLubah}(h]j8ah ](j j eh"]h$]h&]j j )j huh1j{ hj8hMLhj8hhubj )}(hhh]h)}(hCheck if display is onh]hCheck if display is on}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMLhj9hhubah}(h]h ]h"]h$]h&]uh1j hj8hhhj8hMLubeh}(h]h ](j functioneh"]h$]h&]j j j j9j j9j j j uh1jv hhhjhNhNubj )}(hXx**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure **Description** This function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled. **Return** true if the display can be verified to be on, false otherwise.h](h)}(h**Parameters**h]j )}(hj9h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMPhj9ubjU )}(hhh]jZ )}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](j` )}(h``struct mipi_dbi *dbi``h]jf )}(hj9h]hstruct mipi_dbi *dbi}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMMhj9ubj| )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMMhj9ubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hj9hMMhj9ubah}(h]h ]h"]h$]h&]uh1jT hj9ubh)}(h**Description**h]j )}(hj:h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMOhj9ubh)}(hThis function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled.h]hThis function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMNhj9ubh)}(h **Return**h]j )}(hj+:h]hReturn}(hj-:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj):ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMShj9ubh)}(h>true if the display can be verified to be on, false otherwise.h]h>true if the display can be verified to be on, false otherwise.}(hjA:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMThj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #mipi_dbi_poweron_reset (C function)c.mipi_dbi_poweron_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h8int mipi_dbi_poweron_reset (struct mipi_dbi_dev *dbidev)h]j )}(h7int mipi_dbi_poweron_reset(struct mipi_dbi_dev *dbidev)h](j)}(hinth]hint}(hjp:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl:hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjl:hhhj~:hMubj )}(hmipi_dbi_poweron_reseth]j )}(hmipi_dbi_poweron_reseth]hmipi_dbi_poweron_reset}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjl:hhhj~:hMubj)}(h(struct mipi_dbi_dev *dbidev)h]j)}(hstruct mipi_dbi_dev *dbidevh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(h mipi_dbi_devh]h mipi_dbi_dev}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]j)}jj:sbc.mipi_dbi_poweron_resetasbuh1hhj:ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj:ubj )}(hdbidevh]hdbidev}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:ubah}(h]h ]h"]h$]h&]j j uh1jhjl:hhhj~:hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjh:hhhj~:hMubah}(h]jc:ah ](j j eh"]h$]h&]j j )j huh1j{ hj~:hMhje:hhubj )}(hhh]h)}(hMIPI DBI poweron and reseth]hMIPI DBI poweron and reset}(hj0;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj-;hhubah}(h]h ]h"]h$]h&]uh1j hje:hhhj~:hMubeh}(h]h ](j functioneh"]h$]h&]j j j jH;j jH;j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure **Description** This function enables the regulator if used and does a hardware and software reset. **Return** Zero on success, or a negative error code.h](h)}(h**Parameters**h]j )}(hjR;h]h Parameters}(hjT;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjP;ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjL;ubjU )}(hhh]jZ )}(h:``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure h](j` )}(h``struct mipi_dbi_dev *dbidev``h]jf )}(hjq;h]hstruct mipi_dbi_dev *dbidev}(hjs;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjo;ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjk;ubj| )}(hhh]h)}(hMIPI DBI device structureh]hMIPI DBI device structure}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1j{ hjk;ubeh}(h]h ]h"]h$]h&]uh1jY hj;hMhjh;ubah}(h]h ]h"]h$]h&]uh1jT hjL;ubh)}(h**Description**h]j )}(hj;h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjL;ubh)}(hSThis function enables the regulator if used and does a hardware and software reset.h]hSThis function enables the regulator if used and does a hardware and software reset.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjL;ubh)}(h **Return**h]j )}(hj;h]hReturn}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjL;ubh)}(h*Zero on success, or a negative error code.h]h*Zero on success, or a negative error code.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjL;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /mipi_dbi_poweron_conditional_reset (C function)$c.mipi_dbi_poweron_conditional_resethNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hDint mipi_dbi_poweron_conditional_reset (struct mipi_dbi_dev *dbidev)h]j )}(hCint mipi_dbi_poweron_conditional_reset(struct mipi_dbi_dev *dbidev)h](j)}(hinth]hint}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj'<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhj&<hMubj )}(h"mipi_dbi_poweron_conditional_reseth]j )}(h"mipi_dbi_poweron_conditional_reseth]h"mipi_dbi_poweron_conditional_reset}(hj9<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5<ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj<hhhj&<hMubj)}(h(struct mipi_dbi_dev *dbidev)h]j)}(hstruct mipi_dbi_dev *dbidevh](j )}(hj h]hstruct}(hjU<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ<ubj )}(h h]h }(hjb<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ<ubh)}(hhh]j )}(h mipi_dbi_devh]h mipi_dbi_dev}(hjs<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjp<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetju<modnameN classnameNj j )}j ]j)}jj;<sb$c.mipi_dbi_poweron_conditional_resetasbuh1hhjQ<ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ<ubj)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjQ<ubj )}(hdbidevh]hdbidev}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjM<ubah}(h]h ]h"]h$]h&]j j uh1jhj<hhhj&<hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhj&<hMubah}(h]j <ah ](j j eh"]h$]h&]j j )j huh1j{ hj&<hMhj <hhubj )}(hhh]h)}(h&MIPI DBI poweron and conditional reseth]h&MIPI DBI poweron and conditional reset}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj<hhubah}(h]h ]h"]h$]h&]uh1j hj <hhhj&<hMubeh}(h]h ](j functioneh"]h$]h&]j j j j<j j<j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure **Description** This function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed. **Return** Zero if the controller was reset, 1 if the display was already on, or a negative error code.h](h)}(h**Parameters**h]j )}(hj<h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj<ubjU )}(hhh]jZ )}(h:``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure h](j` )}(h``struct mipi_dbi_dev *dbidev``h]jf )}(hj=h]hstruct mipi_dbi_dev *dbidev}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj=ubj| )}(hhh]h)}(hMIPI DBI device structureh]hMIPI DBI device structure}(hj2=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.=hMhj/=ubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hj.=hMhj=ubah}(h]h ]h"]h$]h&]uh1jT hj<ubh)}(h**Description**h]j )}(hjT=h]h Description}(hjV=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjR=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj<ubh)}(hThis function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed.h]hThis function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed.}(hjj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj<ubh)}(h **Return**h]j )}(hj{=h]hReturn}(hj}=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjy=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj<ubh)}(h\Zero if the controller was reset, 1 if the display was already on, or a negative error code.h]h\Zero if the controller was reset, 1 if the display was already on, or a negative error code.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'mipi_dbi_spi_cmd_max_speed (C function)c.mipi_dbi_spi_cmd_max_speedhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hCu32 mipi_dbi_spi_cmd_max_speed (struct spi_device *spi, size_t len)h]j )}(hBu32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len)h](h)}(hhh]j )}(hu32h]hu32}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=modnameN classnameNj j )}j ]j)}jmipi_dbi_spi_cmd_max_speedsbc.mipi_dbi_spi_cmd_max_speedasbuh1hhj=hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=hhhj=hMubj )}(hmipi_dbi_spi_cmd_max_speedh]j )}(hj=h]hmipi_dbi_spi_cmd_max_speed}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj=hhhj=hMubj)}(h$(struct spi_device *spi, size_t len)h](j)}(hstruct spi_device *spih](j )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubh)}(hhh]j )}(h spi_deviceh]h spi_device}(hj0>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj->ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2>modnameN classnameNj j )}j ]j=c.mipi_dbi_spi_cmd_max_speedasbuh1hhj>ubj )}(h h]h }(hjN>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj)}(hjOh]h*}(hj\>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>ubj )}(hspih]hspi}(hji>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj >ubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]j=c.mipi_dbi_spi_cmd_max_speedasbuh1hhj~>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~>ubj )}(hlenh]hlen}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj >ubeh}(h]h ]h"]h$]h&]j j uh1jhj=hhhj=hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj=hhhj=hMubah}(h]j=ah ](j j eh"]h$]h&]j j )j huh1j{ hj=hMhj=hhubj )}(hhh]h)}(hget the maximum SPI bus speedh]hget the maximum SPI bus speed}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj>hhubah}(h]h ]h"]h$]h&]uh1j hj=hhhj=hMubeh}(h]h ](j functione.h"]h$]h&]j j j j>j j>j j j uh1jv hhhjhNhNubj )}(hXU**Parameters** ``struct spi_device *spi`` SPI device ``size_t len`` The transfer buffer length. **Description** Many controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.h](h)}(h**Parameters**h]j )}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj>ubjU )}(hhh](jZ )}(h&``struct spi_device *spi`` SPI device h](j` )}(h``struct spi_device *spi``h]jf )}(hj?h]hstruct spi_device *spi}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubj| )}(hhh]h)}(h SPI deviceh]h SPI device}(hj5?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1?hMhj2?ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj1?hMhj?ubjZ )}(h+``size_t len`` The transfer buffer length. h](j` )}(h``size_t len``h]jf )}(hjU?h]h size_t len}(hjW?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjS?ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjO?ubj| )}(hhh]h)}(hThe transfer buffer length.h]hThe transfer buffer length.}(hjn?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjj?hMhjk?ubah}(h]h ]h"]h$]h&]uh1j{ hjO?ubeh}(h]h ]h"]h$]h&]uh1jY hjj?hMhj?ubeh}(h]h ]h"]h$]h&]uh1jT hj>ubh)}(h**Description**h]j )}(hj?h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj>ubh)}(hMany controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.h]hMany controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dbi_spi_init (C function)c.mipi_dbi_spi_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hZint mipi_dbi_spi_init (struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h]j )}(hYint mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h](j)}(hinth]hint}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMLubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?hhhj?hMLubj )}(hmipi_dbi_spi_inith]j )}(hmipi_dbi_spi_inith]hmipi_dbi_spi_init}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj?hhhj?hMLubj)}(hD(struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h](j)}(hstruct spi_device *spih](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(h spi_deviceh]h spi_device}(hj0@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2@modnameN classnameNj j )}j ]j)}jj?sbc.mipi_dbi_spi_initasbuh1hhj@ubj )}(h h]h }(hjP@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hj^@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(hspih]hspi}(hjk@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj @ubj)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]jL@c.mipi_dbi_spi_initasbuh1hhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(hdbih]hdbi}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj @ubj)}(hstruct gpio_desc *dch](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(h gpio_desch]h gpio_desc}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]jL@c.mipi_dbi_spi_initasbuh1hhj@ubj )}(h h]h }(hj0AhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hj>AhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(hdch]hdc}(hjKAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj @ubeh}(h]h ]h"]h$]h&]j j uh1jhj?hhhj?hMLubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?hhhj?hMLubah}(h]j?ah ](j j eh"]h$]h&]j j )j huh1j{ hj?hMLhj?hhubj )}(hhh]h)}(h!Initialize MIPI DBI SPI interfaceh]h!Initialize MIPI DBI SPI interface}(hjuAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMLhjrAhhubah}(h]h ]h"]h$]h&]uh1j hj?hhhj?hMLubeh}(h]h ](j functioneh"]h$]h&]j j j jAj jAj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct spi_device *spi`` SPI device ``struct mipi_dbi *dbi`` MIPI DBI structure to initialize ``struct gpio_desc *dc`` D/C gpio (optional) **Description** This function sets :c:type:`mipi_dbi->command `, enables :c:type:`mipi_dbi->read_commands ` for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init. If **dc** is set, a Type C Option 3 interface is assumed, if not Type C Option 1. If the command is ``MIPI_DCS_WRITE_MEMORY_START`` and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (``DRM_FORMAT_BIG_ENDIAN`` is not supported). This is how endianness is handled: Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is byteswapped before transfer. Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be sent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. This handling is optimised for ``DRM_FORMAT_RGB565`` framebuffers. If the interface is Option 1 and the SPI controller doesn't support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjAh]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMPhjAubjU )}(hhh](jZ )}(h&``struct spi_device *spi`` SPI device h](j` )}(h``struct spi_device *spi``h]jf )}(hjAh]hstruct spi_device *spi}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMMhjAubj| )}(hhh]h)}(h SPI deviceh]h SPI device}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhMMhjAubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjAhMMhjAubjZ )}(h:``struct mipi_dbi *dbi`` MIPI DBI structure to initialize h](j` )}(h``struct mipi_dbi *dbi``h]jf )}(hjAh]hstruct mipi_dbi *dbi}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMNhjAubj| )}(hhh]h)}(h MIPI DBI structure to initializeh]h MIPI DBI structure to initialize}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMNhjBubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjBhMNhjAubjZ )}(h-``struct gpio_desc *dc`` D/C gpio (optional) h](j` )}(h``struct gpio_desc *dc``h]jf )}(hj(Bh]hstruct gpio_desc *dc}(hj*BhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&Bubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMOhj"Bubj| )}(hhh]h)}(hD/C gpio (optional)h]hD/C gpio (optional)}(hjABhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=BhMOhj>Bubah}(h]h ]h"]h$]h&]uh1j{ hj"Bubeh}(h]h ]h"]h$]h&]uh1jY hj=BhMOhjAubeh}(h]h ]h"]h$]h&]uh1jT hjAubh)}(h**Description**h]j )}(hjcBh]h Description}(hjeBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaBubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMQhjAubh)}(hThis function sets :c:type:`mipi_dbi->command `, enables :c:type:`mipi_dbi->read_commands ` for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init.h](hThis function sets }(hjyBhhhNhNubh)}(h&:c:type:`mipi_dbi->command `h]jf )}(hjBh]hmipi_dbi->command}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dbiuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMPhjyBubh , enables }(hjyBhhhNhNubh)}(h,:c:type:`mipi_dbi->read_commands `h]jf )}(hjBh]hmipi_dbi->read_commands}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dbiuh1hhjBhMPhjyBubho for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init.}(hjyBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhMPhjAubh)}(hQIf **dc** is set, a Type C Option 3 interface is assumed, if not Type C Option 1.h](hIf }(hjBhhhNhNubj )}(h**dc**h]hdc}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubhH is set, a Type C Option 3 interface is assumed, if not Type C Option 1.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMThjAubh)}(hXIf the command is ``MIPI_DCS_WRITE_MEMORY_START`` and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (``DRM_FORMAT_BIG_ENDIAN`` is not supported).h](hIf the command is }(hjBhhhNhNubjf )}(h``MIPI_DCS_WRITE_MEMORY_START``h]hMIPI_DCS_WRITE_MEMORY_START}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubh and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (}(hjBhhhNhNubjf )}(h``DRM_FORMAT_BIG_ENDIAN``h]hDRM_FORMAT_BIG_ENDIAN}(hj ChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubh is not supported).}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMWhjAubh)}(h"This is how endianness is handled:h]h"This is how endianness is handled:}(hj"ChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM[hjAubjU )}(hhh](jZ )}(hzOption 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is byteswapped before transfer. h](j` )}(h\Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer ish]h\Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is}(hj8ChhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chM^hj4Cubj| )}(hhh]h)}(hbyteswapped before transfer.h]hbyteswapped before transfer.}(hjJChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFChM^hjGCubah}(h]h ]h"]h$]h&]uh1j{ hj4Cubeh}(h]h ]h"]h$]h&]uh1jY hjFChM^hj1CubjZ )}(hOption 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be sent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. h](j` )}(h[Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can beh]h[Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be}(hjhChhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMbhjdCubj| )}(hhh]h)}(hsent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw.h]hsent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw.}(hjzChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMahjwCubah}(h]h ]h"]h$]h&]uh1j{ hjdCubeh}(h]h ]h"]h$]h&]uh1jY hjvChMbhj1Cubeh}(h]h ]h"]h$]h&]uh1jT hjAubh)}(hBThis handling is optimised for ``DRM_FORMAT_RGB565`` framebuffers.h](hThis handling is optimised for }(hjChhhNhNubjf )}(h``DRM_FORMAT_RGB565``h]hDRM_FORMAT_RGB565}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubh framebuffers.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMdhjAubh)}(hIf the interface is Option 1 and the SPI controller doesn't support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary.h]hIf the interface is Option 1 and the SPI controller doesn’t support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMfhjAubh)}(h **Return**h]j )}(hjCh]hReturn}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMihjAubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMjhjAubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "mipi_dbi_spi_transfer (C function)c.mipi_dbi_spi_transferhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(heint mipi_dbi_spi_transfer (struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h]j )}(hdint mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h](j)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj!DhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDhhhj DhMubj )}(hmipi_dbi_spi_transferh]j )}(hmipi_dbi_spi_transferh]hmipi_dbi_spi_transfer}(hj3DhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Dubah}(h]h ](j j eh"]h$]h&]j j uh1j hjDhhhj DhMubj)}(hK(struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h](j)}(hstruct spi_device *spih](j )}(hj h]hstruct}(hjODhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKDubj )}(h h]h }(hj\DhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKDubh)}(hhh]j )}(h spi_deviceh]h spi_device}(hjmDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjoDmodnameN classnameNj j )}j ]j)}jj5Dsbc.mipi_dbi_spi_transferasbuh1hhjKDubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKDubj)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjKDubj )}(hspih]hspi}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjGDubj)}(h u32 speed_hzh](h)}(hhh]j )}(hu32h]hu32}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]jDc.mipi_dbi_spi_transferasbuh1hhjDubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj )}(hspeed_hzh]hspeed_hz}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjGDubj)}(hu8 bpwh](h)}(hhh]j )}(hu8h]hu8}(hj EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Eubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjEmodnameN classnameNj j )}j ]jDc.mipi_dbi_spi_transferasbuh1hhjEubj )}(h h]h }(hj*EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj )}(hbpwh]hbpw}(hj8EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjGDubj)}(hconst void *bufh](j )}(hjAh]hconst}(hjQEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMEubj )}(h h]h }(hj^EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMEubj)}(hvoidh]hvoid}(hjlEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMEubj )}(h h]h }(hjzEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMEubj)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjMEubj )}(hbufh]hbuf}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjGDubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjEmodnameN classnameNj j )}j ]jDc.mipi_dbi_spi_transferasbuh1hhjEubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj )}(hlenh]hlen}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjGDubeh}(h]h ]h"]h$]h&]j j uh1jhjDhhhj DhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj Dhhhj DhMubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j{ hj DhMhjDhhubj )}(hhh]h)}(hSPI transfer helperh]hSPI transfer helper}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjFhhubah}(h]h ]h"]h$]h&]uh1j hjDhhhj DhMubeh}(h]h ](j functioneh"]h$]h&]j j j jFj jFj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct spi_device *spi`` SPI device ``u32 speed_hz`` Override speed (optional) ``u8 bpw`` Bits per word ``const void *buf`` Buffer to transfer ``size_t len`` Buffer length **Description** This SPI transfer helper breaks up the transfer of **buf** into chunks which the SPI controller driver can handle. The SPI bus must be locked when calling this. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hj)Fh]h Parameters}(hj+FhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'Fubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj#FubjU )}(hhh](jZ )}(h&``struct spi_device *spi`` SPI device h](j` )}(h``struct spi_device *spi``h]jf )}(hjHFh]hstruct spi_device *spi}(hjJFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFFubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjBFubj| )}(hhh]h)}(h SPI deviceh]h SPI device}(hjaFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]FhMhj^Fubah}(h]h ]h"]h$]h&]uh1j{ hjBFubeh}(h]h ]h"]h$]h&]uh1jY hj]FhMhj?FubjZ )}(h+``u32 speed_hz`` Override speed (optional) h](j` )}(h``u32 speed_hz``h]jf )}(hjFh]h u32 speed_hz}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj{Fubj| )}(hhh]h)}(hOverride speed (optional)h]hOverride speed (optional)}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjFubah}(h]h ]h"]h$]h&]uh1j{ hj{Fubeh}(h]h ]h"]h$]h&]uh1jY hjFhMhj?FubjZ )}(h``u8 bpw`` Bits per word h](j` )}(h ``u8 bpw``h]jf )}(hjFh]hu8 bpw}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjFubj| )}(hhh]h)}(h Bits per wordh]h Bits per word}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjFubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjFhMhj?FubjZ )}(h'``const void *buf`` Buffer to transfer h](j` )}(h``const void *buf``h]jf )}(hjFh]hconst void *buf}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhjFubj| )}(hhh]h)}(hBuffer to transferh]hBuffer to transfer}(hj GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhj Gubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjGhMhj?FubjZ )}(h``size_t len`` Buffer length h](j` )}(h``size_t len``h]jf )}(hj,Gh]h size_t len}(hj.GhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj*Gubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj&Gubj| )}(hhh]h)}(h Buffer lengthh]h Buffer length}(hjEGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAGhMhjBGubah}(h]h ]h"]h$]h&]uh1j{ hj&Gubeh}(h]h ]h"]h$]h&]uh1jY hjAGhMhj?Fubeh}(h]h ]h"]h$]h&]uh1jT hj#Fubh)}(h**Description**h]j )}(hjgGh]h Description}(hjiGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeGubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj#Fubh)}(hThis SPI transfer helper breaks up the transfer of **buf** into chunks which the SPI controller driver can handle. The SPI bus must be locked when calling this.h](h3This SPI transfer helper breaks up the transfer of }(hj}GhhhNhNubj )}(h**buf**h]hbuf}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}Gubhf into chunks which the SPI controller driver can handle. The SPI bus must be locked when calling this.}(hj}GhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj#Fubh)}(h **Return**h]j )}(hjGh]hReturn}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj#Fubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMhj#Fubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "mipi_dbi_debugfs_init (C function)c.mipi_dbi_debugfs_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h4void mipi_dbi_debugfs_init (struct drm_minor *minor)h]j )}(h3void mipi_dbi_debugfs_init(struct drm_minor *minor)h](j)}(hvoidh]hvoid}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMRubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGhhhjGhMRubj )}(hmipi_dbi_debugfs_inith]j )}(hmipi_dbi_debugfs_inith]hmipi_dbi_debugfs_init}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhjGhMRubj)}(h(struct drm_minor *minor)h]j)}(hstruct drm_minor *minorh](j )}(hj h]hstruct}(hj"HhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hj/HhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(h drm_minorh]h drm_minor}(hj@HhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=Hubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBHmodnameN classnameNj j )}j ]j)}jjHsbc.mipi_dbi_debugfs_initasbuh1hhjHubj )}(h h]h }(hj`HhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj)}(hjOh]h*}(hjnHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjHubj )}(hminorh]hminor}(hj{HhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubah}(h]h ]h"]h$]h&]j j uh1jhjGhhhjGhMRubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhjGhMRubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j{ hjGhMRhjGhhubj )}(hhh]h)}(hCreate debugfs entriesh]hCreate debugfs entries}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMRhjHhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhjGhMRubeh}(h]h ](j functioneh"]h$]h&]j j j jHj jHj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct drm_minor *minor`` DRM minor **Description** This function creates a 'command' debugfs file for sending commands to the controller or getting the read command values. Drivers can use this as their :c:type:`drm_driver->debugfs_init ` callback.h](h)}(h**Parameters**h]j )}(hjHh]h Parameters}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMVhjHubjU )}(hhh]jZ )}(h&``struct drm_minor *minor`` DRM minor h](j` )}(h``struct drm_minor *minor``h]jf )}(hjHh]hstruct drm_minor *minor}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMShjHubj| )}(hhh]h)}(h DRM minorh]h DRM minor}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMShjHubah}(h]h ]h"]h$]h&]uh1j{ hjHubeh}(h]h ]h"]h$]h&]uh1jY hjHhMShjHubah}(h]h ]h"]h$]h&]uh1jT hjHubh)}(h**Description**h]j )}(hj!Ih]h Description}(hj#IhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMUhjHubh)}(hThis function creates a 'command' debugfs file for sending commands to the controller or getting the read command values. Drivers can use this as their :c:type:`drm_driver->debugfs_init ` callback.h](hThis function creates a ‘command’ debugfs file for sending commands to the controller or getting the read command values. Drivers can use this as their }(hj7IhhhNhNubh)}(h/:c:type:`drm_driver->debugfs_init `h]jf )}(hjAIh]hdrm_driver->debugfs_init}(hjCIhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj?Iubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_driveruh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chMThj7Iubh callback.}(hj7IhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^IhMThjHubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubeh}(h]jDah ]h"]#mipi dbi helper functions referenceah$]h&]uh1hhhhhhhhMJubh)}(hhh](h)}(h#MIPI DSI Helper Functions Referenceh]h#MIPI DSI Helper Functions Reference}(hjzIhhhNhNubah}(h]h ]h"]h$]h&]hj`uh1hhjwIhhhhhMVubh)}(hXThese functions contain some common logic and helpers to deal with MIPI DSI peripherals.h]hXThese functions contain some common logic and helpers to deal with MIPI DSI peripherals.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dsi.chK-hjwIhhubh)}(hoHelpers are provided for a number of standard MIPI DSI command as well as a subset of the MIPI DCS command set.h]hoHelpers are provided for a number of standard MIPI DSI command as well as a subset of the MIPI DCS command set.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dsi.chK0hjwIhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_msg (C struct)c.mipi_dsi_msghNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h mipi_dsi_msgh]j )}(hstruct mipi_dsi_msgh](j )}(hj h]hstruct}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjIhKubj )}(h mipi_dsi_msgh]j )}(hjIh]h mipi_dsi_msg}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ](j j eh"]h$]h&]j j uh1j hjIhhhjIhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjIhhhjIhKubah}(h]jIah ](j j eh"]h$]h&]j j )j huh1j{ hjIhKhjIhhubj )}(hhh]h)}(hread/write DSI bufferh]hread/write DSI buffer}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjIhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjIhKubeh}(h]h ](j structeh"]h$]h&]j j j jJj jJj j j uh1jv hhhjwIhNhNubj )}(hX**Definition**:: struct mipi_dsi_msg { u8 channel; u8 type; u16 flags; size_t tx_len; const void *tx_buf; size_t rx_len; void *rx_buf; }; **Members** ``channel`` virtual channel id ``type`` payload data type ``flags`` flags controlling this message transmission ``tx_len`` length of **tx_buf** ``tx_buf`` data to be written ``rx_len`` length of **rx_buf** ``rx_buf`` data to be read, or NULLh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj%JhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!Jubh:}(hj!JhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjJubj, )}(hstruct mipi_dsi_msg { u8 channel; u8 type; u16 flags; size_t tx_len; const void *tx_buf; size_t rx_len; void *rx_buf; };h]hstruct mipi_dsi_msg { u8 channel; u8 type; u16 flags; size_t tx_len; const void *tx_buf; size_t rx_len; void *rx_buf; };}hj>Jsbah}(h]h ]h"]h$]h&]j j uh1j+ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjJubh)}(h **Members**h]j )}(hjOJh]hMembers}(hjQJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMJubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK)hjJubjU )}(hhh](jZ )}(h``channel`` virtual channel id h](j` )}(h ``channel``h]jf )}(hjnJh]hchannel}(hjpJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlJubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjhJubj| )}(hhh]h)}(hvirtual channel idh]hvirtual channel id}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1j{ hjhJubeh}(h]h ]h"]h$]h&]uh1jY hjJhKhjeJubjZ )}(h``type`` payload data type h](j` )}(h``type``h]jf )}(hjJh]htype}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjJubj| )}(hhh]h)}(hpayload data typeh]hpayload data type}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1j{ hjJubeh}(h]h ]h"]h$]h&]uh1jY hjJhKhjeJubjZ )}(h6``flags`` flags controlling this message transmission h](j` )}(h ``flags``h]jf )}(hjJh]hflags}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjJubj| )}(hhh]h)}(h+flags controlling this message transmissionh]h+flags controlling this message transmission}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1j{ hjJubeh}(h]h ]h"]h$]h&]uh1jY hjJhKhjeJubjZ )}(h ``tx_len`` length of **tx_buf** h](j` )}(h ``tx_len``h]jf )}(hjKh]htx_len}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjKubj| )}(hhh]h)}(hlength of **tx_buf**h](h length of }(hj2KhhhNhNubj )}(h **tx_buf**h]htx_buf}(hj:KhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2Kubeh}(h]h ]h"]h$]h&]uh1hhj.KhKhj/Kubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hj.KhKhjeJubjZ )}(h``tx_buf`` data to be written h](j` )}(h ``tx_buf``h]jf )}(hj`Kh]htx_buf}(hjbKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^Kubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjZKubj| )}(hhh]h)}(hdata to be writtenh]hdata to be written}(hjyKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuKhKhjvKubah}(h]h ]h"]h$]h&]uh1j{ hjZKubeh}(h]h ]h"]h$]h&]uh1jY hjuKhKhjeJubjZ )}(h ``rx_len`` length of **rx_buf** h](j` )}(h ``rx_len``h]jf )}(hjKh]hrx_len}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK hjKubj| )}(hhh]h)}(hlength of **rx_buf**h](h length of }(hjKhhhNhNubj )}(h **rx_buf**h]hrx_buf}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]uh1hhjKhK hjKubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjKhK hjeJubjZ )}(h#``rx_buf`` data to be read, or NULLh](j` )}(h ``rx_buf``h]jf )}(hjKh]hrx_buf}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK hjKubj| )}(hhh]h)}(hdata to be read, or NULLh]hdata to be read, or NULL}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK!hjKubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjKhK hjeJubeh}(h]h ]h"]h$]h&]uh1jT hjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_packet (C struct)c.mipi_dsi_packethNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hmipi_dsi_packeth]j )}(hstruct mipi_dsi_packeth](j )}(hj h]hstruct}(hj:LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Lhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK'ubj )}(h h]h }(hjHLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6LhhhjGLhK'ubj )}(hmipi_dsi_packeth]j )}(hj4Lh]hmipi_dsi_packet}(hjZLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVLubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6LhhhjGLhK'ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2LhhhjGLhK'ubah}(h]j-Lah ](j j eh"]h$]h&]j j )j huh1j{ hjGLhK'hj/Lhhubj )}(hhh]h)}(h/represents a MIPI DSI packet in protocol formath]h/represents a MIPI DSI packet in protocol format}(hj|LhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK2hjyLhhubah}(h]h ]h"]h$]h&]uh1j hj/LhhhjGLhK'ubeh}(h]h ](j structeh"]h$]h&]j j j jLj jLj j j uh1jv hhhjwIhNhNubj )}(hX**Definition**:: struct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; }; **Members** ``size`` size (in bytes) of the packet ``header`` the four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC) ``payload_length`` number of bytes in the payload ``payload`` a pointer to a buffer containing the payload, if anyh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubh:}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK6hjLubj, )}(hpstruct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; };h]hpstruct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; };}hjLsbah}(h]h ]h"]h$]h&]j j uh1j+ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK8hjLubh)}(h **Members**h]j )}(hjLh]hMembers}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK?hjLubjU )}(hhh](jZ )}(h'``size`` size (in bytes) of the packet h](j` )}(h``size``h]jf )}(hjLh]hsize}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK4hjLubj| )}(hhh]h)}(hsize (in bytes) of the packeth]hsize (in bytes) of the packet}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhK4hjLubah}(h]h ]h"]h$]h&]uh1j{ hjLubeh}(h]h ]h"]h$]h&]uh1jY hjLhK4hjLubjZ )}(h```header`` the four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC) h](j` )}(h ``header``h]jf )}(hj"Mh]hheader}(hj$MhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj Mubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK6hjMubj| )}(hhh]h)}(hTthe four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC)h]hTthe four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC)}(hj;MhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK5hj8Mubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hj7MhK6hjLubjZ )}(h2``payload_length`` number of bytes in the payload h](j` )}(h``payload_length``h]jf )}(hj\Mh]hpayload_length}(hj^MhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZMubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK7hjVMubj| )}(hhh]h)}(hnumber of bytes in the payloadh]hnumber of bytes in the payload}(hjuMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqMhK7hjrMubah}(h]h ]h"]h$]h&]uh1j{ hjVMubeh}(h]h ]h"]h$]h&]uh1jY hjqMhK7hjLubjZ )}(h@``payload`` a pointer to a buffer containing the payload, if anyh](j` )}(h ``payload``h]jf )}(hjMh]hpayload}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK7hjMubj| )}(hhh]h)}(h4a pointer to a buffer containing the payload, if anyh]h4a pointer to a buffer containing the payload, if any}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK8hjMubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjMhK7hjLubeh}(h]h ]h"]h$]h&]uh1jT hjLubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_host_ops (C struct)c.mipi_dsi_host_opshNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hmipi_dsi_host_opsh]j )}(hstruct mipi_dsi_host_opsh](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK>ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMhhhjMhK>ubj )}(hmipi_dsi_host_opsh]j )}(hjMh]hmipi_dsi_host_ops}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Nubah}(h]h ](j j eh"]h$]h&]j j uh1j hjMhhhjMhK>ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjMhhhjMhK>ubah}(h]jMah ](j j eh"]h$]h&]j j )j huh1j{ hjMhK>hjMhhubj )}(hhh]h)}(hDSI bus operationsh]hDSI bus operations}(hj1NhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKDhj.Nhhubah}(h]h ]h"]h$]h&]uh1j hjMhhhjMhK>ubeh}(h]h ](j structeh"]h$]h&]j j j jINj jINj j j uh1jv hhhjwIhNhNubj )}(hX**Definition**:: struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); }; **Members** ``attach`` attach DSI device to DSI host ``detach`` detach DSI device from DSI host ``transfer`` transmit a DSI packeth](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjUNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQNubh:}(hjQNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKHhjMNubj, )}(hX struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); };h]hX struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); };}hjnNsbah}(h]h ]h"]h$]h&]j j uh1j+ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKJhjMNubh)}(h **Members**h]j )}(hjNh]hMembers}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}Nubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKPhjMNubjU )}(hhh](jZ )}(h)``attach`` attach DSI device to DSI host h](j` )}(h ``attach``h]jf )}(hjNh]hattach}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKFhjNubj| )}(hhh]h)}(hattach DSI device to DSI hosth]hattach DSI device to DSI host}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKFhjNubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjNhKFhjNubjZ )}(h+``detach`` detach DSI device from DSI host h](j` )}(h ``detach``h]jf )}(hjNh]hdetach}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKGhjNubj| )}(hhh]h)}(hdetach DSI device from DSI hosth]hdetach DSI device from DSI host}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKGhjNubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjNhKGhjNubjZ )}(h"``transfer`` transmit a DSI packeth](j` )}(h ``transfer``h]jf )}(hjOh]htransfer}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKGhj Oubj| )}(hhh]h)}(htransmit a DSI packeth]htransmit a DSI packet}(hj)OhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKHhj&Oubah}(h]h ]h"]h$]h&]uh1j{ hj Oubeh}(h]h ]h"]h$]h&]uh1jY hj%OhKGhjNubeh}(h]h ]h"]h$]h&]uh1jT hjMNubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubh)}(h**Description**h]j )}(hjSOh]h Description}(hjUOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQOubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKKhjwIhhubh)}(hXDSI packets transmitted by .transfer() are passed in as mipi_dsi_msg structures. This structure contains information about the type of packet being transmitted as well as the transmit and receive buffers. When an error is encountered during transmission, this function will return a negative error code. On success it shall return the number of bytes transmitted for write packets or the number of bytes received for read packets.h]hXDSI packets transmitted by .transfer() are passed in as mipi_dsi_msg structures. This structure contains information about the type of packet being transmitted as well as the transmit and receive buffers. When an error is encountered during transmission, this function will return a negative error code. On success it shall return the number of bytes transmitted for write packets or the number of bytes received for read packets.}(hjiOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKHhjwIhhubh)}(hNote that typically DSI packet transmission is atomic, so the .transfer() function will seldomly return anything other than the number of bytes contained in the transmit buffer on success.h]hNote that typically DSI packet transmission is atomic, so the .transfer() function will seldomly return anything other than the number of bytes contained in the transmit buffer on success.}(hjxOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKPhjwIhhubh)}(hAlso note that those callbacks can be called no matter the state the host is in. Drivers that need the underlying device to be powered to perform these operations will first need to make sure it's been properly enabled.h]hAlso note that those callbacks can be called no matter the state the host is in. Drivers that need the underlying device to be powered to perform these operations will first need to make sure it’s been properly enabled.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKThjwIhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_host (C struct)c.mipi_dsi_hosthNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h mipi_dsi_hosth]j )}(hstruct mipi_dsi_hosth](j )}(hj h]hstruct}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhK\ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOhhhjOhK\ubj )}(h mipi_dsi_hosth]j )}(hjOh]h mipi_dsi_host}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hjOhhhjOhK\ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjOhhhjOhK\ubah}(h]jOah ](j j eh"]h$]h&]j j )j huh1j{ hjOhK\hjOhhubj )}(hhh]h)}(hDSI host deviceh]hDSI host device}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKdhjOhhubah}(h]h ]h"]h$]h&]uh1j hjOhhhjOhK\ubeh}(h]h ](j structeh"]h$]h&]j j j j Pj j Pj j j uh1jv hhhjwIhNhNubj )}(hX**Definition**:: struct mipi_dsi_host { struct device *dev; const struct mipi_dsi_host_ops *ops; struct list_head list; }; **Members** ``dev`` driver model device node for this DSI host ``ops`` DSI host operations ``list`` list managementh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubh:}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhhj Pubj, )}(hustruct mipi_dsi_host { struct device *dev; const struct mipi_dsi_host_ops *ops; struct list_head list; };h]hustruct mipi_dsi_host { struct device *dev; const struct mipi_dsi_host_ops *ops; struct list_head list; };}hj.Psbah}(h]h ]h"]h$]h&]j j uh1j+ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKjhj Pubh)}(h **Members**h]j )}(hj?Ph]hMembers}(hjAPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=Pubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKphj PubjU )}(hhh](jZ )}(h3``dev`` driver model device node for this DSI host h](j` )}(h``dev``h]jf )}(hj^Ph]hdev}(hj`PhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\Pubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKfhjXPubj| )}(hhh]h)}(h*driver model device node for this DSI hosth]h*driver model device node for this DSI host}(hjwPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjsPhKfhjtPubah}(h]h ]h"]h$]h&]uh1j{ hjXPubeh}(h]h ]h"]h$]h&]uh1jY hjsPhKfhjUPubjZ )}(h``ops`` DSI host operations h](j` )}(h``ops``h]jf )}(hjPh]hops}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKghjPubj| )}(hhh]h)}(hDSI host operationsh]hDSI host operations}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhKghjPubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjPhKghjUPubjZ )}(h``list`` list managementh](j` )}(h``list``h]jf )}(hjPh]hlist}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKghjPubj| )}(hhh]h)}(hlist managementh]hlist management}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhhjPubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjPhKghjUPubeh}(h]h ]h"]h$]h&]uh1jT hj Pubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_device_info (C struct)c.mipi_dsi_device_infohNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hmipi_dsi_device_infoh]j )}(hstruct mipi_dsi_device_infoh](j )}(hj h]hstruct}(hj*QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&Qhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKnubj )}(h h]h }(hj8QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&Qhhhj7QhKnubj )}(hmipi_dsi_device_infoh]j )}(hj$Qh]hmipi_dsi_device_info}(hjJQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFQubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&Qhhhj7QhKnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"Qhhhj7QhKnubah}(h]jQah ](j j eh"]h$]h&]j j )j huh1j{ hj7QhKnhjQhhubj )}(hhh]h)}(h'template for creating a mipi_dsi_deviceh]h'template for creating a mipi_dsi_device}(hjlQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjiQhhubah}(h]h ]h"]h$]h&]uh1j hjQhhhj7QhKnubeh}(h]h ](j structeh"]h$]h&]j j j jQj jQj j j uh1jv hhhjwIhNhNubj )}(hX'**Definition**:: struct mipi_dsi_device_info { char type[DSI_DEV_NAME_SIZE]; u32 channel; struct device_node *node; }; **Members** ``type`` DSI peripheral chip type ``channel`` DSI virtual channel assigned to peripheral ``node`` pointer to OF device node or NULLh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubh:}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjQubj, )}(hqstruct mipi_dsi_device_info { char type[DSI_DEV_NAME_SIZE]; u32 channel; struct device_node *node; };h]hqstruct mipi_dsi_device_info { char type[DSI_DEV_NAME_SIZE]; u32 channel; struct device_node *node; };}hjQsbah}(h]h ]h"]h$]h&]j j uh1j+ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjQubh)}(h **Members**h]j )}(hjQh]hMembers}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjQubjU )}(hhh](jZ )}(h"``type`` DSI peripheral chip type h](j` )}(h``type``h]jf )}(hjQh]htype}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjQubj| )}(hhh]h)}(hDSI peripheral chip typeh]hDSI peripheral chip type}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhKhjQubah}(h]h ]h"]h$]h&]uh1j{ hjQubeh}(h]h ]h"]h$]h&]uh1jY hjQhKhjQubjZ )}(h7``channel`` DSI virtual channel assigned to peripheral h](j` )}(h ``channel``h]jf )}(hjRh]hchannel}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhj Rubj| )}(hhh]h)}(h*DSI virtual channel assigned to peripheralh]h*DSI virtual channel assigned to peripheral}(hj+RhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'RhKhj(Rubah}(h]h ]h"]h$]h&]uh1j{ hj Rubeh}(h]h ]h"]h$]h&]uh1jY hj'RhKhjQubjZ )}(h*``node`` pointer to OF device node or NULLh](j` )}(h``node``h]jf )}(hjKRh]hnode}(hjMRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIRubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjERubj| )}(hhh]h)}(h!pointer to OF device node or NULLh]h!pointer to OF device node or NULL}(hjdRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjaRubah}(h]h ]h"]h$]h&]uh1j{ hjERubeh}(h]h ]h"]h$]h&]uh1jY hj`RhKhjQubeh}(h]h ]h"]h$]h&]uh1jT hjQubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubh)}(h**Description**h]j )}(hjRh]h Description}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjwIhhubh)}(hNThis is populated and passed to mipi_dsi_device_new to create a new DSI deviceh]hNThis is populated and passed to mipi_dsi_device_new to create a new DSI device}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjwIhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_device (C struct)c.mipi_dsi_devicehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hmipi_dsi_deviceh]j )}(hstruct mipi_dsi_deviceh](j )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRhhhjRhKubj )}(hmipi_dsi_deviceh]j )}(hjRh]hmipi_dsi_device}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ](j j eh"]h$]h&]j j uh1j hjRhhhjRhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjRhhhjRhKubah}(h]jRah ](j j eh"]h$]h&]j j )j huh1j{ hjRhKhjRhhubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhj Shhubah}(h]h ]h"]h$]h&]uh1j hjRhhhjRhKubeh}(h]h ](j structeh"]h$]h&]j j j j&Sj j&Sj j j uh1jv hhhjwIhNhNubj )}(hX**Definition**:: struct mipi_dsi_device { struct mipi_dsi_host *host; struct device dev; bool attached; char name[DSI_DEV_NAME_SIZE]; unsigned int channel; unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; }; **Members** ``host`` DSI host for this peripheral ``dev`` driver model device node for this peripheral ``attached`` the DSI device has been successfully attached ``name`` DSI peripheral chip type ``channel`` virtual channel assigned to the peripheral ``lanes`` number of active data lanes ``format`` pixel format for video mode ``mode_flags`` DSI operation mode related flags ``hs_rate`` maximum lane frequency for high speed mode in hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy drivers ``lp_rate`` maximum lane frequency for low power mode in hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy drivers ``dsc`` panel/bridge DSC pps payload to be senth](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj2ShhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.Subh:}(hj.ShhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhj*Subj, )}(hXTstruct mipi_dsi_device { struct mipi_dsi_host *host; struct device dev; bool attached; char name[DSI_DEV_NAME_SIZE]; unsigned int channel; unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; };h]hXTstruct mipi_dsi_device { struct mipi_dsi_host *host; struct device dev; bool attached; char name[DSI_DEV_NAME_SIZE]; unsigned int channel; unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; };}hjKSsbah}(h]h ]h"]h$]h&]j j uh1j+ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhj*Subh)}(h **Members**h]j )}(hj\Sh]hMembers}(hj^ShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZSubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhj*SubjU )}(hhh](jZ )}(h&``host`` DSI host for this peripheral h](j` )}(h``host``h]jf )}(hj{Sh]hhost}(hj}ShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjySubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjuSubj| )}(hhh]h)}(hDSI host for this peripheralh]hDSI host for this peripheral}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShKhjSubah}(h]h ]h"]h$]h&]uh1j{ hjuSubeh}(h]h ]h"]h$]h&]uh1jY hjShKhjrSubjZ )}(h5``dev`` driver model device node for this peripheral h](j` )}(h``dev``h]jf )}(hjSh]hdev}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjSubj| )}(hhh]h)}(h,driver model device node for this peripheralh]h,driver model device node for this peripheral}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShKhjSubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjShKhjrSubjZ )}(h;``attached`` the DSI device has been successfully attached h](j` )}(h ``attached``h]jf )}(hjSh]hattached}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhjSubj| )}(hhh]h)}(h-the DSI device has been successfully attachedh]h-the DSI device has been successfully attached}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKhjTubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjThKhjrSubjZ )}(h"``name`` DSI peripheral chip type h](j` )}(h``name``h]jf )}(hj&Th]hname}(hj(ThhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$Tubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhKhj Tubj| )}(hhh]h)}(hDSI peripheral chip typeh]hDSI peripheral chip type}(hj?ThhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;ThKhjhjYhhubah}(h]h ]h"]h$]h&]uh1j hjXhhhjXhKubeh}(h]h ](j enumeh"]h$]h&]j j j j0Yj j0Yj j j uh1jv hhhjwIhNhNubj )}(h**Constants** ``MIPI_DSI_DCS_TEAR_MODE_VBLANK`` the TE output line consists of V-Blanking information only ``MIPI_DSI_DCS_TEAR_MODE_VHBLANK`` the TE output line consists of both V-Blanking and H-Blanking informationh](h)}(h **Constants**h]j )}(hj:Yh]h Constants}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhj:^ubah}(h]h ]h"]h$]h&]uh1j;EhjL^hMhjwIhhubj )}(hX**Parameters** ``ctx`` Context for multiple DSI transactions ``cmd`` Command ``seq...`` buffer containing data to be transmitted **Description** This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j )}(hjY^h]h Parameters}(hj[^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjW^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhjS^ubjU )}(hhh](jZ )}(h.``ctx`` Context for multiple DSI transactions h](j` )}(h``ctx``h]jf )}(hjx^h]hctx}(hjz^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjv^ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhjr^ubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj^ubah}(h]h ]h"]h$]h&]uh1j{ hjr^ubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhjo^ubjZ )}(h``cmd`` Command h](j` )}(h``cmd``h]jf )}(hj^h]hcmd}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhj^ubj| )}(hhh]h)}(hCommandh]hCommand}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj^ubah}(h]h ]h"]h$]h&]uh1j{ hj^ubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhjo^ubjZ )}(h4``seq...`` buffer containing data to be transmitted h](j` )}(h ``seq...``h]jf )}(hj^h]hseq...}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhj^ubj| )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj_ubah}(h]h ]h"]h$]h&]uh1j{ hj^ubeh}(h]h ]h"]h$]h&]uh1jY hj^hMhjo^ubeh}(h]h ]h"]h$]h&]uh1jT hjS^ubh)}(h**Description**h]j )}(hj%_h]h Description}(hj'_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhjS^ubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hj;_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhjS^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_dual (C macro)c.mipi_dsi_dualhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h mipi_dsi_dualh]j )}(h mipi_dsi_dualh]j )}(h mipi_dsi_dualh]j )}(hjd_h]h mipi_dsi_dual}(hjn_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjj_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjf_hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjb_hhhj_hMubah}(h]j]_ah ](j j eh"]h$]h&]j j )j huh1j{ hj_hMhj__hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj__hhhj_hMubeh}(h]h ](j macroeh"]h$]h&]j j j j_j j_j j j uh1jv hhhjwIhNhNubh)}(h2``mipi_dsi_dual (_func, _ctx, _dsi1, _dsi2, ...)``h]jf )}(hj_h]h.mipi_dsi_dual (_func, _ctx, _dsi1, _dsi2, ...)}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhMhjwIhhubjchhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj>chhhj`chM ubeh}(h]h ](j macroeh"]h$]h&]j j j jycj jycj j j uh1jv hhhjwIhNhNubh)}(hI``mipi_dsi_dual_dcs_write_seq_multi (_ctx, _dsi1, _dsi2, _cmd, _seq...)``h]jf )}(hjch]hEmipi_dsi_dual_dcs_write_seq_multi (_ctx, _dsi1, _dsi2, _cmd, _seq...)}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}cubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:347: ./include/drm/drm_mipi_dsi.hhM hjwIhhubjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chKhj;lhhubah}(h]h ]h"]h$]h&]uh1j hjskhhhjkhKubeh}(h]h ](j functioneh"]h$]h&]j j j jVlj jVlj j j uh1jv hhhjwIhNhNubj )}(hG**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral deviceh](h)}(h**Parameters**h]j )}(hj`lh]h Parameters}(hjblhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^lubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chKhjZlubjU )}(hhh]jZ )}(h5``struct mipi_dsi_device *dsi`` DSI peripheral deviceh](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjlh]hstruct mipi_dsi_device *dsi}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}lubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chKhjylubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chKhjlubah}(h]h ]h"]h$]h&]uh1j{ hjylubeh}(h]h ]h"]h$]h&]uh1jY hjlhKhjvlubah}(h]h ]h"]h$]h&]uh1jT hjZlubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /devm_mipi_dsi_device_register_full (C function)$c.devm_mipi_dsi_device_register_fullhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hstruct mipi_dsi_device * devm_mipi_dsi_device_register_full (struct device *dev, struct mipi_dsi_host *host, const struct mipi_dsi_device_info *info)h]j )}(hstruct mipi_dsi_device *devm_mipi_dsi_device_register_full(struct device *dev, struct mipi_dsi_host *host, const struct mipi_dsi_device_info *info)h](j )}(hj h]hstruct}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlhhhjlhMubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjlmodnameN classnameNj j )}j ]j)}j"devm_mipi_dsi_device_register_fullsb$c.devm_mipi_dsi_device_register_fullasbuh1hhjlhhhjlhMubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlhhhjlhMubj)}(hjOh]h*}(hj'mhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjlhhhjlhMubj )}(h"devm_mipi_dsi_device_register_fullh]j )}(hjmh]h"devm_mipi_dsi_device_register_full}(hj8mhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4mubah}(h]h ](j j eh"]h$]h&]j j uh1j hjlhhhjlhMubj)}(hY(struct device *dev, struct mipi_dsi_host *host, const struct mipi_dsi_device_info *info)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjSmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOmubj )}(h h]h }(hj`mhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOmubh)}(hhh]j )}(hdeviceh]hdevice}(hjqmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmmodnameN classnameNj j )}j ]jm$c.devm_mipi_dsi_device_register_fullasbuh1hhjOmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOmubj)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjOmubj )}(hdevh]hdev}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjKmubj)}(hstruct mipi_dsi_host *hosth](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(h mipi_dsi_hosth]h mipi_dsi_host}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]jm$c.devm_mipi_dsi_device_register_fullasbuh1hhjmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj)}(hjOh]h*}(hj nhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjmubj )}(hhosth]hhost}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjKmubj)}(h'const struct mipi_dsi_device_info *infoh](j )}(hjAh]hconst}(hj3nhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/nubj )}(h h]h }(hj@nhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/nubj )}(hj h]hstruct}(hjNnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/nubj )}(h h]h }(hj[nhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/nubh)}(hhh]j )}(hmipi_dsi_device_infoh]hmipi_dsi_device_info}(hjlnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjinubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnnmodnameN classnameNj j )}j ]jm$c.devm_mipi_dsi_device_register_fullasbuh1hhj/nubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/nubj)}(hjOh]h*}(hjnhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/nubj )}(hinfoh]hinfo}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/nubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjKmubeh}(h]h ]h"]h$]h&]j j uh1jhjlhhhjlhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjlhhhjlhMubah}(h]jlah ](j j eh"]h$]h&]j j )j huh1j{ hjlhMhjlhhubj )}(hhh]h)}(h create a managed MIPI DSI deviceh]h create a managed MIPI DSI device}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjnhhubah}(h]h ]h"]h$]h&]uh1j hjlhhhjlhMubeh}(h]h ](j functioneh"]h$]h&]j j j jnj jnj j j uh1jv hhhjwIhNhNubj )}(hXn**Parameters** ``struct device *dev`` device to tie the MIPI-DSI device lifetime to ``struct mipi_dsi_host *host`` DSI host to which this device is connected ``const struct mipi_dsi_device_info *info`` pointer to template containing DSI device information **Description** Create a MIPI DSI device by using the device information provided by mipi_dsi_device_info template This is the managed version of mipi_dsi_device_register_full() which automatically calls mipi_dsi_device_unregister() when **dev** is unbound. **Return** A pointer to the newly created MIPI DSI device, or, a pointer encoded with an errorh](h)}(h**Parameters**h]j )}(hjnh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjnubjU )}(hhh](jZ )}(hE``struct device *dev`` device to tie the MIPI-DSI device lifetime to h](j` )}(h``struct device *dev``h]jf )}(hjoh]hstruct device *dev}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj oubj| )}(hhh]h)}(h-device to tie the MIPI-DSI device lifetime toh]h-device to tie the MIPI-DSI device lifetime to}(hj)ohhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%ohMhj&oubah}(h]h ]h"]h$]h&]uh1j{ hj oubeh}(h]h ]h"]h$]h&]uh1jY hj%ohMhjoubjZ )}(hJ``struct mipi_dsi_host *host`` DSI host to which this device is connected h](j` )}(h``struct mipi_dsi_host *host``h]jf )}(hjIoh]hstruct mipi_dsi_host *host}(hjKohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGoubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjCoubj| )}(hhh]h)}(h*DSI host to which this device is connectedh]h*DSI host to which this device is connected}(hjbohhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^ohMhj_oubah}(h]h ]h"]h$]h&]uh1j{ hjCoubeh}(h]h ]h"]h$]h&]uh1jY hj^ohMhjoubjZ )}(hb``const struct mipi_dsi_device_info *info`` pointer to template containing DSI device information h](j` )}(h+``const struct mipi_dsi_device_info *info``h]jf )}(hjoh]h'const struct mipi_dsi_device_info *info}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hj|oubj| )}(hhh]h)}(h5pointer to template containing DSI device informationh]h5pointer to template containing DSI device information}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohM hjoubah}(h]h ]h"]h$]h&]uh1j{ hj|oubeh}(h]h ]h"]h$]h&]uh1jY hjohM hjoubeh}(h]h ]h"]h$]h&]uh1jT hjnubh)}(h**Description**h]j )}(hjoh]h Description}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjnubh)}(hbCreate a MIPI DSI device by using the device information provided by mipi_dsi_device_info templateh]hbCreate a MIPI DSI device by using the device information provided by mipi_dsi_device_info template}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjnubh)}(hThis is the managed version of mipi_dsi_device_register_full() which automatically calls mipi_dsi_device_unregister() when **dev** is unbound.h](h{This is the managed version of mipi_dsi_device_register_full() which automatically calls mipi_dsi_device_unregister() when }(hjohhhNhNubj )}(h**dev**h]hdev}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubh is unbound.}(hjohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjnubh)}(h **Return**h]j )}(hjph]hReturn}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjnubh)}(hSA pointer to the newly created MIPI DSI device, or, a pointer encoded with an errorh]hSA pointer to the newly created MIPI DSI device, or, a pointer encoded with an error}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjnubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *of_find_mipi_dsi_host_by_node (C function)c.of_find_mipi_dsi_host_by_nodehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hOstruct mipi_dsi_host * of_find_mipi_dsi_host_by_node (struct device_node *node)h]j )}(hMstruct mipi_dsi_host *of_find_mipi_dsi_host_by_node(struct device_node *node)h](j )}(hj h]hstruct}(hjJphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFphhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM0ubj )}(h h]h }(hjXphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFphhhjWphM0ubh)}(hhh]j )}(h mipi_dsi_hosth]h mipi_dsi_host}(hjiphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfpubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkpmodnameN classnameNj j )}j ]j)}jof_find_mipi_dsi_host_by_nodesbc.of_find_mipi_dsi_host_by_nodeasbuh1hhjFphhhjWphM0ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFphhhjWphM0ubj)}(hjOh]h*}(hjphhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjFphhhjWphM0ubj )}(hof_find_mipi_dsi_host_by_nodeh]j )}(hjph]hof_find_mipi_dsi_host_by_node}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ](j j eh"]h$]h&]j j uh1j hjFphhhjWphM0ubj)}(h(struct device_node *node)h]j)}(hstruct device_node *nodeh](j )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(h device_nodeh]h device_node}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]jpc.of_find_mipi_dsi_host_by_nodeasbuh1hhjpubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjpubj )}(hnodeh]hnode}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjpubah}(h]h ]h"]h$]h&]j j uh1jhjFphhhjWphM0ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjBphhhjWphM0ubah}(h]j=pah ](j j eh"]h$]h&]j j )j huh1j{ hjWphM0hj?phhubj )}(hhh]h)}(h2find the MIPI DSI host matching a device tree nodeh]h2find the MIPI DSI host matching a device tree node}(hjEqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM0hjBqhhubah}(h]h ]h"]h$]h&]uh1j hj?phhhjWphM0ubeh}(h]h ](j functioneh"]h$]h&]j j j j]qj j]qj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct device_node *node`` device tree node **Return** A pointer to the MIPI DSI host corresponding to **node** or NULL if no such device exists (or has not been registered yet).h](h)}(h**Parameters**h]j )}(hjgqh]h Parameters}(hjiqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjequbah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM4hjaqubjU )}(hhh]jZ )}(h.``struct device_node *node`` device tree node h](j` )}(h``struct device_node *node``h]jf )}(hjqh]hstruct device_node *node}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjqubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM2hjqubj| )}(hhh]h)}(hdevice tree nodeh]hdevice tree node}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhM2hjqubah}(h]h ]h"]h$]h&]uh1j{ hjqubeh}(h]h ]h"]h$]h&]uh1jY hjqhM2hj}qubah}(h]h ]h"]h$]h&]uh1jT hjaqubh)}(h **Return**h]j )}(hjqh]hReturn}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM4hjaqubh)}(h{A pointer to the MIPI DSI host corresponding to **node** or NULL if no such device exists (or has not been registered yet).h](h0A pointer to the MIPI DSI host corresponding to }(hjqhhhNhNubj )}(h**node**h]hnode}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubhC or NULL if no such device exists (or has not been registered yet).}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM4hjaqubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_attach (C function)c.mipi_dsi_attachhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h1int mipi_dsi_attach (struct mipi_dsi_device *dsi)h]j )}(h0int mipi_dsi_attach(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMtubj )}(h h]h }(hj'rhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrhhhj&rhMtubj )}(hmipi_dsi_attachh]j )}(hmipi_dsi_attachh]hmipi_dsi_attach}(hj9rhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5rubah}(h]h ](j j eh"]h$]h&]j j uh1j hjrhhhj&rhMtubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjUrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQrubj )}(h h]h }(hjbrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQrubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjsrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjprubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjurmodnameN classnameNj j )}j ]j)}jj;rsbc.mipi_dsi_attachasbuh1hhjQrubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQrubj)}(hjOh]h*}(hjrhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjQrubj )}(hdsih]hdsi}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjMrubah}(h]h ]h"]h$]h&]j j uh1jhjrhhhj&rhMtubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhj&rhMtubah}(h]j rah ](j j eh"]h$]h&]j j )j huh1j{ hj&rhMthj rhhubj )}(hhh]h)}(h#attach a DSI device to its DSI hosth]h#attach a DSI device to its DSI host}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMthjrhhubah}(h]h ]h"]h$]h&]uh1j hj rhhhj&rhMtubeh}(h]h ](j functioneh"]h$]h&]j j j jrj jrj j j uh1jv hhhjwIhNhNubj )}(h@**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheralh](h)}(h**Parameters**h]j )}(hjrh]h Parameters}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMxhjrubjU )}(hhh]jZ )}(h.``struct mipi_dsi_device *dsi`` DSI peripheralh](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjsh]hstruct mipi_dsi_device *dsi}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMzhjsubj| )}(hhh]h)}(hDSI peripheralh]hDSI peripheral}(hj2shhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMuhj/subah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hj.shMzhjsubah}(h]h ]h"]h$]h&]uh1jT hjrubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_detach (C function)c.mipi_dsi_detachhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h1int mipi_dsi_detach (struct mipi_dsi_device *dsi)h]j )}(h0int mipi_dsi_detach(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjsshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoshhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoshhhjshMubj )}(hmipi_dsi_detachh]j )}(hmipi_dsi_detachh]hmipi_dsi_detach}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ](j j eh"]h$]h&]j j uh1j hjoshhhjshMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]j)}jjssbc.mipi_dsi_detachasbuh1hhjsubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjsubj )}(hdsih]hdsi}(hj thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjsubah}(h]h ]h"]h$]h&]j j uh1jhjoshhhjshMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjkshhhjshMubah}(h]jfsah ](j j eh"]h$]h&]j j )j huh1j{ hjshMhjhshhubj )}(hhh]h)}(h%detach a DSI device from its DSI hosth]h%detach a DSI device from its DSI host}(hj3thhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj0thhubah}(h]h ]h"]h$]h&]uh1j hjhshhhjshMubeh}(h]h ](j functioneh"]h$]h&]j j j jKtj jKtj j j uh1jv hhhjwIhNhNubj )}(h@**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheralh](h)}(h**Parameters**h]j )}(hjUth]h Parameters}(hjWthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjStubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjOtubjU )}(hhh]jZ )}(h.``struct mipi_dsi_device *dsi`` DSI peripheralh](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjtth]hstruct mipi_dsi_device *dsi}(hjvthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrtubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjntubj| )}(hhh]h)}(hDSI peripheralh]hDSI peripheral}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjtubah}(h]h ]h"]h$]h&]uh1j{ hjntubeh}(h]h ]h"]h$]h&]uh1jY hjthMhjktubah}(h]h ]h"]h$]h&]uh1jT hjOtubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !devm_mipi_dsi_attach (C function)c.devm_mipi_dsi_attachhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hJint devm_mipi_dsi_attach (struct device *dev, struct mipi_dsi_device *dsi)h]j )}(hIint devm_mipi_dsi_attach(struct device *dev, struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjthMubj )}(hdevm_mipi_dsi_attachh]j )}(hdevm_mipi_dsi_attachh]hdevm_mipi_dsi_attach}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ](j j eh"]h$]h&]j j uh1j hjthhhjthMubj)}(h1(struct device *dev, struct mipi_dsi_device *dsi)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hj uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubh)}(hhh]j )}(hdeviceh]hdevice}(hj)uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&uubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+umodnameN classnameNj j )}j ]j)}jjtsbc.devm_mipi_dsi_attachasbuh1hhjuubj )}(h h]h }(hjIuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hjOh]h*}(hjWuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjuubj )}(hdevh]hdev}(hjduhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubj)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj}uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyuubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]jEuc.devm_mipi_dsi_attachasbuh1hhjyuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyuubj)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjyuubj )}(hdsih]hdsi}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubeh}(h]h ]h"]h$]h&]j j uh1jhjthhhjthMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjthhhjthMubah}(h]jtah ](j j eh"]h$]h&]j j )j huh1j{ hjthMhjthhubj )}(hhh]h)}(h(Attach a MIPI-DSI device to its DSI Hosth]h(Attach a MIPI-DSI device to its DSI Host}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjuhhubah}(h]h ]h"]h$]h&]uh1j hjthhhjthMubeh}(h]h ](j functioneh"]h$]h&]j j j jvj jvj j j uh1jv hhhjwIhNhNubj )}(hXX**Parameters** ``struct device *dev`` device to tie the MIPI-DSI device attachment lifetime to ``struct mipi_dsi_device *dsi`` DSI peripheral **Description** This is the managed version of mipi_dsi_attach() which automatically calls mipi_dsi_detach() when **dev** is unbound. **Return** 0 on success, a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj vh]h Parameters}(hj"vhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjvubjU )}(hhh](jZ )}(hP``struct device *dev`` device to tie the MIPI-DSI device attachment lifetime to h](j` )}(h``struct device *dev``h]jf )}(hj?vh]hstruct device *dev}(hjAvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=vubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj9vubj| )}(hhh]h)}(h8device to tie the MIPI-DSI device attachment lifetime toh]h8device to tie the MIPI-DSI device attachment lifetime to}(hjXvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjTvhMhjUvubah}(h]h ]h"]h$]h&]uh1j{ hj9vubeh}(h]h ]h"]h$]h&]uh1jY hjTvhMhj6vubjZ )}(h/``struct mipi_dsi_device *dsi`` DSI peripheral h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjxvh]hstruct mipi_dsi_device *dsi}(hjzvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvvubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjrvubj| )}(hhh]h)}(hDSI peripheralh]hDSI peripheral}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjvubah}(h]h ]h"]h$]h&]uh1j{ hjrvubeh}(h]h ]h"]h$]h&]uh1jY hjvhMhj6vubeh}(h]h ]h"]h$]h&]uh1jT hjvubh)}(h**Description**h]j )}(hjvh]h Description}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjvubh)}(huThis is the managed version of mipi_dsi_attach() which automatically calls mipi_dsi_detach() when **dev** is unbound.h](hbThis is the managed version of mipi_dsi_attach() which automatically calls mipi_dsi_detach() when }(hjvhhhNhNubj )}(h**dev**h]hdev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubh is unbound.}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjvubh)}(h **Return**h]j )}(hjvh]hReturn}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjvubh)}(h/0 on success, a negative error code on failure.h]h/0 on success, a negative error code on failure.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,mipi_dsi_packet_format_is_short (C function)!c.mipi_dsi_packet_format_is_shorthNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h.bool mipi_dsi_packet_format_is_short (u8 type)h]j )}(h-bool mipi_dsi_packet_format_is_short(u8 type)h](j)}(hjIh]hbool}(hj1whhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-whhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj?whhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-whhhj>whMubj )}(hmipi_dsi_packet_format_is_shorth]j )}(hmipi_dsi_packet_format_is_shorth]hmipi_dsi_packet_format_is_short}(hjQwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMwubah}(h]h ](j j eh"]h$]h&]j j uh1j hj-whhhj>whMubj)}(h (u8 type)h]j)}(hu8 typeh](h)}(hhh]j )}(hu8h]hu8}(hjpwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrwmodnameN classnameNj j )}j ]j)}jjSwsb!c.mipi_dsi_packet_format_is_shortasbuh1hhjiwubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiwubj )}(htypeh]htype}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjewubah}(h]h ]h"]h$]h&]j j uh1jhj-whhhj>whMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj)whhhj>whMubah}(h]j$wah ](j j eh"]h$]h&]j j )j huh1j{ hj>whMhj&whhubj )}(hhh]h)}(h(check if a packet is of the short formath]h(check if a packet is of the short format}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjwhhubah}(h]h ]h"]h$]h&]uh1j hj&whhhj>whMubeh}(h]h ](j functioneh"]h$]h&]j j j jwj jwj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``u8 type`` MIPI DSI data type of the packet **Return** true if the packet for the given data type is a short packet, false otherwise.h](h)}(h**Parameters**h]j )}(hjwh]h Parameters}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjwubjU )}(hhh]jZ )}(h-``u8 type`` MIPI DSI data type of the packet h](j` )}(h ``u8 type``h]jf )}(hj xh]hu8 type}(hj xhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjxubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjxubj| )}(hhh]h)}(h MIPI DSI data type of the packeth]h MIPI DSI data type of the packet}(hj"xhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjxubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjxhMhjxubah}(h]h ]h"]h$]h&]uh1jT hjwubh)}(h **Return**h]j )}(hjDxh]hReturn}(hjFxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBxubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjwubh)}(hNtrue if the packet for the given data type is a short packet, false otherwise.h]hNtrue if the packet for the given data type is a short packet, false otherwise.}(hjZxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjwubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +mipi_dsi_packet_format_is_long (C function) c.mipi_dsi_packet_format_is_longhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h-bool mipi_dsi_packet_format_is_long (u8 type)h]j )}(h,bool mipi_dsi_packet_format_is_long(u8 type)h](j)}(hjIh]hbool}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhhjxhMubj )}(hmipi_dsi_packet_format_is_longh]j )}(hmipi_dsi_packet_format_is_longh]hmipi_dsi_packet_format_is_long}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxhhhjxhMubj)}(h (u8 type)h]j)}(hu8 typeh](h)}(hhh]j )}(hu8h]hu8}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjxmodnameN classnameNj j )}j ]j)}jjxsb c.mipi_dsi_packet_format_is_longasbuh1hhjxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(htypeh]htype}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjxubah}(h]h ]h"]h$]h&]j j uh1jhjxhhhjxhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjxhhhjxhMubah}(h]j|xah ](j j eh"]h$]h&]j j )j huh1j{ hjxhMhj~xhhubj )}(hhh]h)}(h'check if a packet is of the long formath]h'check if a packet is of the long format}(hj yhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjyhhubah}(h]h ]h"]h$]h&]uh1j hj~xhhhjxhMubeh}(h]h ](j functioneh"]h$]h&]j j j j8yj j8yj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``u8 type`` MIPI DSI data type of the packet **Return** true if the packet for the given data type is a long packet, false otherwise.h](h)}(h**Parameters**h]j )}(hjByh]h Parameters}(hjDyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@yubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjzmodnameN classnameNj j )}j ]j)}jjzsbc.mipi_dsi_create_packetasbuh1hhjzubj )}(h h]h }(hj\zhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj)}(hjOh]h*}(hjjzhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjzubj )}(hpacketh]hpacket}(hjwzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubj)}(hconst struct mipi_dsi_msg *msgh](j )}(hjAh]hconst}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubh)}(hhh]j )}(h mipi_dsi_msgh]h mipi_dsi_msg}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]jXzc.mipi_dsi_create_packetasbuh1hhjzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj)}(hjOh]h*}(hjzhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjzubj )}(hmsgh]hmsg}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubeh}(h]h ]h"]h$]h&]j j uh1jhjyhhhjyhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjyhhhjyhMubah}(h]jyah ](j j eh"]h$]h&]j j )j huh1j{ hjyhMhjyhhubj )}(hhh]h)}(hint mipi_dsi_shutdown_peripheral (struct mipi_dsi_device *dsi)h]j )}(h=int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hj&|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"|hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMKubj )}(h h]h }(hj5|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"|hhhj4|hMKubj )}(hmipi_dsi_shutdown_peripheralh]j )}(hmipi_dsi_shutdown_peripheralh]hmipi_dsi_shutdown_peripheral}(hjG|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"|hhhj4|hMKubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjc|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_|ubj )}(h h]h }(hjp|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_|ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j)}jjI|sbc.mipi_dsi_shutdown_peripheralasbuh1hhj_|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_|ubj)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_|ubj )}(hdsih]hdsi}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[|ubah}(h]h ]h"]h$]h&]j j uh1jhj"|hhhj4|hMKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj|hhhj4|hMKubah}(h]j|ah ](j j eh"]h$]h&]j j )j huh1j{ hj4|hMKhj|hhubj )}(hhh]h)}(h#sends a Shutdown Peripheral commandh]h#sends a Shutdown Peripheral command}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMKhj|hhubah}(h]h ]h"]h$]h&]uh1j hj|hhhj4|hMKubeh}(h]h ](j functioneh"]h$]h&]j j j j|j j|j j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_shutdown_peripheral_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj}h]h Parameters}(hj }hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMOhj}ubjU )}(hhh]jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj'}h]hstruct mipi_dsi_device *dsi}(hj)}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%}ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMLhj!}ubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj@}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<}hMLhj=}ubah}(h]h ]h"]h$]h&]uh1j{ hj!}ubeh}(h]h ]h"]h$]h&]uh1jY hj<}hMLhj}ubah}(h]h ]h"]h$]h&]uh1jT hj}ubh)}(h**Description**h]j )}(hjb}h]h Description}(hjd}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`}ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMNhj}ubh)}(hNThis function is deprecated. Use mipi_dsi_shutdown_peripheral_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_shutdown_peripheral_multi() instead.}(hjx}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMMhj}ubh)}(h **Return**h]j )}(hj}h]hReturn}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMPhj}ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMQhj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (mipi_dsi_turn_on_peripheral (C function)c.mipi_dsi_turn_on_peripheralhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h=int mipi_dsi_turn_on_peripheral (struct mipi_dsi_device *dsi)h]j )}(hubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj:ubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj_h]hstruct mipi_dsi_device *dsi}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjYubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjthMhjVubjZ )}(h5``bool enable`` Whether to enable or disable the DSC h](j` )}(h``bool enable``h]jf )}(hjh]h bool enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h$Whether to enable or disable the DSCh]h$Whether to enable or disable the DSC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjVubjZ )}(hG``enum mipi_dsi_compression_algo algo`` Selected compression algorithm h](j` )}(h'``enum mipi_dsi_compression_algo algo``h]jf )}(hjсh]h#enum mipi_dsi_compression_algo algo}(hjӁhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjρubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjˁubj| )}(hhh]h)}(hSelected compression algorithmh]hSelected compression algorithm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjˁubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjVubjZ )}(h^``unsigned int pps_selector`` Select PPS from the table of pre-stored or uploaded PPS entries h](j` )}(h``unsigned int pps_selector``h]jf )}(hj h]hunsigned int pps_selector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h?Select PPS from the table of pre-stored or uploaded PPS entriesh]h?Select PPS from the table of pre-stored or uploaded PPS entries}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjVubeh}(h]h ]h"]h$]h&]uh1jT hj:ubh)}(h**Description**h]j )}(hjEh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj:ubh)}(hEnable or disable Display Stream Compression on the peripheral. This function is deprecated. Use mipi_dsi_compression_mode_ext_multi() instead.h]hEnable or disable Display Stream Compression on the peripheral. This function is deprecated. Use mipi_dsi_compression_mode_ext_multi() instead.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj:ubh)}(h **Return**h]j )}(hjlh]hReturn}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj:ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &mipi_dsi_compression_mode (C function)c.mipi_dsi_compression_modehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hHint mipi_dsi_compression_mode (struct mipi_dsi_device *dsi, bool enable)h]j )}(hGint mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_compression_modeh]j )}(hmipi_dsi_compression_modeh]hmipi_dsi_compression_mode}(hj҂hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj΂ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h*(struct mipi_dsi_device *dsi, bool enable)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjԂsbc.mipi_dsi_compression_modeasbuh1hhjubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool enableh](j)}(hjIh]hbool}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj )}(henableh]henable}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h$enable/disable DSC on the peripheralh]h$enable/disable DSC on the peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hXS**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``bool enable`` Whether to enable or disable the DSC **Description** Enable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjǃh]h Parameters}(hjɃhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjŃubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj݃ubjZ )}(h5``bool enable`` Whether to enable or disable the DSC h](j` )}(h``bool enable``h]jf )}(hjh]h bool enable}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h$Whether to enable or disable the DSCh]h$Whether to enable or disable the DSC}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj5ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj4hMhj݃ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjZh]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.h]hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +mipi_dsi_picture_parameter_set (C function) c.mipi_dsi_picture_parameter_sethNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hqint mipi_dsi_picture_parameter_set (struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps)h]j )}(hpint mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps)h](j)}(hinth]hint}(hjƄhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj„hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjՄhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj„hhhjԄhMubj )}(hmipi_dsi_picture_parameter_seth]j )}(hmipi_dsi_picture_parameter_seth]hmipi_dsi_picture_parameter_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj„hhhjԄhMubj)}(hN(struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j)}jjsb c.mipi_dsi_picture_parameter_setasbuh1hhjubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjOhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h/const struct drm_dsc_picture_parameter_set *ppsh](j )}(hjAh]hconst}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(hdrm_dsc_picture_parameter_seth]hdrm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j= c.mipi_dsi_picture_parameter_setasbuh1hhjqubj )}(h h]h }(hj̅hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj)}(hjOh]h*}(hjڅhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjqubj )}(hppsh]hpps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj„hhhjԄhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjԄhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjԄhMhjhhubj )}(hhh]h)}(h&transmit the DSC PPS to the peripheralh]h&transmit the DSC PPS to the peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjԄhMubeh}(h]h ](j functioneh"]h$]h&]j j j j)j j)j j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const struct drm_dsc_picture_parameter_set *pps`` VESA DSC 1.1 Picture Parameter Set **Description** Transmit the VESA DSC 1.1 Picture Parameter Set to the peripheral. This function is deprecated. Use mipi_dsi_picture_parameter_set_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj3h]h Parameters}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj-ubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjRh]hstruct mipi_dsi_device *dsi}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjLubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghMhjhubah}(h]h ]h"]h$]h&]uh1j{ hjLubeh}(h]h ]h"]h$]h&]uh1jY hjghMhjIubjZ )}(hW``const struct drm_dsc_picture_parameter_set *pps`` VESA DSC 1.1 Picture Parameter Set h](j` )}(h3``const struct drm_dsc_picture_parameter_set *pps``h]jf )}(hjh]h/const struct drm_dsc_picture_parameter_set *pps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h"VESA DSC 1.1 Picture Parameter Seth]h"VESA DSC 1.1 Picture Parameter Set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjIubeh}(h]h ]h"]h$]h&]uh1jT hj-ubh)}(h**Description**h]j )}(hjƆh]h Description}(hjȆhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjĆubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj-ubh)}(hTransmit the VESA DSC 1.1 Picture Parameter Set to the peripheral. This function is deprecated. Use mipi_dsi_picture_parameter_set_multi() instead.h]hTransmit the VESA DSC 1.1 Picture Parameter Set to the peripheral. This function is deprecated. Use mipi_dsi_picture_parameter_set_multi() instead.}(hj܆hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj-ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj-ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #mipi_dsi_generic_write (C function)c.mipi_dsi_generic_writehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h^ssize_t mipi_dsi_generic_write (struct mipi_dsi_device *dsi, const void *payload, size_t size)h]j )}(h]ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j)}jmipi_dsi_generic_writesbc.mipi_dsi_generic_writeasbuh1hhj.hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhjVhMubj )}(hmipi_dsi_generic_writeh]j )}(hjSh]hmipi_dsi_generic_write}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhjVhMubj)}(h?(struct mipi_dsi_device *dsi, const void *payload, size_t size)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jQc.mipi_dsi_generic_writeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj·hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjۇhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubj)}(hconst void *payloadh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpayloadh]hpayload}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjVmodnameN classnameNj j )}j ]jQc.mipi_dsi_generic_writeasbuh1hhjMubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubeh}(h]h ]h"]h$]h&]j j uh1jhj.hhhjVhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj*hhhjVhMubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j{ hjVhMhj'hhubj )}(hhh]h)}(h*transmit data using a generic write packeth]h*transmit data using a generic write packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj'hhhjVhMubeh}(h]h ](j functioneh"]h$]h&]j j j jˆj jˆj j j uh1jv hhhjwIhNhNubj )}(hXv**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const void *payload`` buffer containing the payload ``size_t size`` size of payload buffer **Description** This function will automatically choose the right data type depending on the payload length. **Return** The number of bytes transmitted on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj̈h]h Parameters}(hjΈhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjʈubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjƈubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h6``const void *payload`` buffer containing the payload h](j` )}(h``const void *payload``h]jf )}(hj$h]hconst void *payload}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhjubjZ )}(h'``size_t size`` size of payload buffer h](j` )}(h``size_t size``h]jf )}(hj]h]h size_t size}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjWubj| )}(hhh]h)}(hsize of payload bufferh]hsize of payload buffer}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMhjsubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjrhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjƈubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjƈubh)}(h\This function will automatically choose the right data type depending on the payload length.h]h\This function will automatically choose the right data type depending on the payload length.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjƈubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjƈubh)}(hOThe number of bytes transmitted on success or a negative error code on failure.h]hOThe number of bytes transmitted on success or a negative error code on failure.}(hjՉhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjƈubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )mipi_dsi_generic_write_multi (C function)c.mipi_dsi_generic_write_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hhvoid mipi_dsi_generic_write_multi (struct mipi_dsi_multi_context *ctx, const void *payload, size_t size)h]j )}(hgvoid mipi_dsi_generic_write_multi(struct mipi_dsi_multi_context *ctx, const void *payload, size_t size)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hmipi_dsi_generic_write_multih]j )}(hmipi_dsi_generic_write_multih]hmipi_dsi_generic_write_multi}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hF(struct mipi_dsi_multi_context *ctx, const void *payload, size_t size)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j)}jj'sbc.mipi_dsi_generic_write_multiasbuh1hhj=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubj)}(hconst void *payloadh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hjΊhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj܊hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hpayloadh]hpayload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j{c.mipi_dsi_generic_write_multiasbuh1hhj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hsizeh]hsize}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h%mipi_dsi_generic_write() w/ accum_errh]h%mipi_dsi_generic_write() w/ accum_err}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjfhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hXV**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``const void *payload`` buffer containing the payload ``size_t size`` size of payload buffer **Description** A wrapper around mipi_dsi_generic_write() that deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjËhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(h6``const void *payload`` buffer containing the payload h](j` )}(h``const void *payload``h]jf )}(hjh]hconst void *payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hj݋ubj| )}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hj݋ubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjubjZ )}(h'``size_t size`` size of payload buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hsize of payload bufferh]hsize of payload buffer}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjWh]h Description}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hA wrapper around mipi_dsi_generic_write() that deals with errors in a way that makes it convenient to make several calls in a row.h]hA wrapper around mipi_dsi_generic_write() that deals with errors in a way that makes it convenient to make several calls in a row.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .mipi_dsi_dual_generic_write_multi (C function)#c.mipi_dsi_dual_generic_write_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hvoid mipi_dsi_dual_generic_write_multi (struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *payload, size_t size)h]j )}(hvoid mipi_dsi_dual_generic_write_multi(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *payload, size_t size)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM'ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM'ubj )}(h!mipi_dsi_dual_generic_write_multih]j )}(h!mipi_dsi_dual_generic_write_multih]h!mipi_dsi_dual_generic_write_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM'ubj)}(h(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *payload, size_t size)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjٌhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjՌubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjՌubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb#c.mipi_dsi_dual_generic_write_multiasbuh1hhjՌubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjՌubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjՌubj )}(hctxh]hctx}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjՌubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjьubj)}(hstruct mipi_dsi_device *dsi1h](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j#c.mipi_dsi_dual_generic_write_multiasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubj )}(hdsi1h]hdsi1}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjьubj)}(hstruct mipi_dsi_device *dsi2h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjȍhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjٍhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֍ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjۍmodnameN classnameNj j )}j ]j#c.mipi_dsi_dual_generic_write_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsi2h]hdsi2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjьubj)}(hconst void *payloadh](j )}(hjAh]hconst}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj)}(hvoidh]hvoid}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj)}(hjOh]h*}(hjbhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj'ubj )}(hpayloadh]hpayload}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjьubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.mipi_dsi_dual_generic_write_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjьubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM'ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM'ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM'hjhhubj )}(hhh]h)}(hHmipi_dsi_generic_write_multi() for two dsi channels, one after the otherh]hHmipi_dsi_generic_write_multi() for two dsi channels, one after the other}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM'hjގhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM'ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to ``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to ``const void *payload`` Buffer containing the payload ``size_t size`` Size of payload buffer **Description** A wrapper around mipi_dsi_generic_write_multi() that allows the user to conveniently write to two dsi channels, one after the other.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM+hjubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj"h]h"struct mipi_dsi_multi_context *ctx}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM)hjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hM)hj8ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj7hM)hjubjZ )}(hF``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to h](j` )}(h ``struct mipi_dsi_device *dsi1``h]jf )}(hj[h]hstruct mipi_dsi_device *dsi1}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM*hjUubj| )}(hhh]h)}(h$First dsi channel to write buffer toh]h$First dsi channel to write buffer to}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphM*hjqubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjphM*hjubjZ )}(hG``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to h](j` )}(h ``struct mipi_dsi_device *dsi2``h]jf )}(hjh]hstruct mipi_dsi_device *dsi2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM+hjubj| )}(hhh]h)}(h%Second dsi channel to write buffer toh]h%Second dsi channel to write buffer to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM+hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM+hjubjZ )}(h6``const void *payload`` Buffer containing the payload h](j` )}(h``const void *payload``h]jf )}(hj͏h]hconst void *payload}(hjϏhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjˏubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM,hjǏubj| )}(hhh]h)}(hBuffer containing the payloadh]hBuffer containing the payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM,hjubah}(h]h ]h"]h$]h&]uh1j{ hjǏubeh}(h]h ]h"]h$]h&]uh1jY hjhM,hjubjZ )}(h'``size_t size`` Size of payload buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM-hjubj| )}(hhh]h)}(hSize of payload bufferh]hSize of payload buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM-hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM-hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjAh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM/hjubh)}(hA wrapper around mipi_dsi_generic_write_multi() that allows the user to conveniently write to two dsi channels, one after the other.h]hA wrapper around mipi_dsi_generic_write_multi() that allows the user to conveniently write to two dsi channels, one after the other.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM.hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "mipi_dsi_generic_read (C function)c.mipi_dsi_generic_readhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h{ssize_t mipi_dsi_generic_read (struct mipi_dsi_device *dsi, const void *params, size_t num_params, void *data, size_t size)h]j )}(hzssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params, size_t num_params, void *data, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jmipi_dsi_generic_readsbc.mipi_dsi_generic_readasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM?ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM?ubj )}(hmipi_dsi_generic_readh]j )}(hjh]hmipi_dsi_generic_read}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM?ubj)}(h](struct mipi_dsi_device *dsi, const void *params, size_t num_params, void *data, size_t size)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjؐhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԐubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԐubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_generic_readasbuh1hhjԐubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԐubj)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjԐubj )}(hdsih]hdsi}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԐubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjАubj)}(hconst void *paramsh](j )}(hjAh]hconst}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj)}(hvoidh]hvoid}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjDubj )}(hparamsh]hparams}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjАubj)}(hsize_t num_paramsh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_generic_readasbuh1hhjubj )}(h h]h }(hjƑhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h num_paramsh]h num_params}(hjԑhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjАubj)}(h void *datah](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjАubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]jc.mipi_dsi_generic_readasbuh1hhj+ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(hsizeh]hsize}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjАubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM?ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhjhM?ubah}(h]jyah ](j j eh"]h$]h&]j j )j huh1j{ hjhM?hj{hhubj )}(hhh]h)}(h(receive data using a generic read packeth]h(receive data using a generic read packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM?hjhhubah}(h]h ]h"]h$]h&]uh1j hj{hhhjhM?ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const void *params`` buffer containing the request parameters ``size_t num_params`` number of request parameters ``void *data`` buffer in which to return the received data ``size_t size`` size of receive buffer **Description** This function will automatically choose the right data type depending on the number of parameters passed in. **Return** The number of bytes successfully read or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMChjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjɒh]hstruct mipi_dsi_device *dsi}(hj˒hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjǒubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM@hjÒubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjޒhM@hjߒubah}(h]h ]h"]h$]h&]uh1j{ hjÒubeh}(h]h ]h"]h$]h&]uh1jY hjޒhM@hjubjZ )}(h@``const void *params`` buffer containing the request parameters h](j` )}(h``const void *params``h]jf )}(hjh]hconst void *params}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMAhjubj| )}(hhh]h)}(h(buffer containing the request parametersh]h(buffer containing the request parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMAhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMAhjubjZ )}(h3``size_t num_params`` number of request parameters h](j` )}(h``size_t num_params``h]jf )}(hj;h]hsize_t num_params}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMBhj5ubj| )}(hhh]h)}(hnumber of request parametersh]hnumber of request parameters}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMBhjQubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hjPhMBhjubjZ )}(h;``void *data`` buffer in which to return the received data h](j` )}(h``void *data``h]jf )}(hjth]h void *data}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMChjnubj| )}(hhh]h)}(h+buffer in which to return the received datah]h+buffer in which to return the received data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjhMChjubjZ )}(h'``size_t size`` size of receive buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMDhjubj| )}(hhh]h)}(hsize of receive bufferh]hsize of receive buffer}(hjƓhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj“hMDhjÓubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj“hMDhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMFhjubh)}(hlThis function will automatically choose the right data type depending on the number of parameters passed in.h]hlThis function will automatically choose the right data type depending on the number of parameters passed in.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMEhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMHhjubh)}(hJThe number of bytes successfully read or a negative error code on failure.h]hJThe number of bytes successfully read or a negative error code on failure.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMIhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_mipi_dsi_get_input_bus_fmt (C function) c.drm_mipi_dsi_get_input_bus_fmthNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hJu32 drm_mipi_dsi_get_input_bus_fmt (enum mipi_dsi_pixel_format dsi_format)h]j )}(hIu32 drm_mipi_dsi_get_input_bus_fmt(enum mipi_dsi_pixel_format dsi_format)h](h)}(hhh]j )}(hu32h]hu32}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]j)}jdrm_mipi_dsi_get_input_bus_fmtsb c.drm_mipi_dsi_get_input_bus_fmtasbuh1hhjPhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMmubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjxhMmubj )}(hdrm_mipi_dsi_get_input_bus_fmth]j )}(hjuh]hdrm_mipi_dsi_get_input_bus_fmt}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjxhMmubj)}(h'(enum mipi_dsi_pixel_format dsi_format)h]j)}(h%enum mipi_dsi_pixel_format dsi_formath](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_pixel_formath]hmipi_dsi_pixel_format}(hjĔhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjƔmodnameN classnameNj j )}j ]js c.drm_mipi_dsi_get_input_bus_fmtasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h dsi_formath]h dsi_format}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjPhhhjxhMmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjxhMmubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j{ hjxhMmhjIhhubj )}(hhh]h)}(h]Get the required MEDIA_BUS_FMT_* based input pixel format for a given DSI output pixel formath]h]Get the required MEDIA_BUS_FMT_* based input pixel format for a given DSI output pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMmhjhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjxhMmubeh}(h]h ](j functioneh"]h$]h&]j j j j2j j2j j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``enum mipi_dsi_pixel_format dsi_format`` pixel format that a DSI host needs to output **Description** Various DSI hosts can use this function during their :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input. **Return** a 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.h](h)}(h**Parameters**h]j )}(hj<h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMqhj6ubjU )}(hhh]jZ )}(hW``enum mipi_dsi_pixel_format dsi_format`` pixel format that a DSI host needs to output h](j` )}(h)``enum mipi_dsi_pixel_format dsi_format``h]jf )}(hj[h]h%enum mipi_dsi_pixel_format dsi_format}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMphjUubj| )}(hhh]h)}(h,pixel format that a DSI host needs to outputh]h,pixel format that a DSI host needs to output}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMphjqubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjphMphjRubah}(h]h ]h"]h$]h&]uh1jT hj6ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMrhj6ubh)}(hVarious DSI hosts can use this function during their :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input.h](h5Various DSI hosts can use this function during their }(hjhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]jf )}(hjh]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjubhK operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjӕhMqhj6ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjޕubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMuhj6ubh)}(hBa 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.h]hBa 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMvhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &mipi_dsi_dcs_write_buffer (C function)c.mipi_dsi_dcs_write_bufferhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h]ssize_t mipi_dsi_dcs_write_buffer (struct mipi_dsi_device *dsi, const void *data, size_t len)h]j )}(h\ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi, const void *data, size_t len)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j)}jmipi_dsi_dcs_write_buffersbc.mipi_dsi_dcs_write_bufferasbuh1hhj!hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!hhhjIhMubj )}(hmipi_dsi_dcs_write_bufferh]j )}(hjFh]hmipi_dsi_dcs_write_buffer}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!hhhjIhMubj)}(h;(struct mipi_dsi_device *dsi, const void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jDc.mipi_dsi_dcs_write_bufferasbuh1hhjsubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjsubj )}(hdsih]hdsi}(hjΖhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubj)}(hconst void *datah](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jDc.mipi_dsi_dcs_write_bufferasbuh1hhj@ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hlenh]hlen}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubeh}(h]h ]h"]h$]h&]j j uh1jhj!hhhjIhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjIhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjIhMhjhhubj )}(hhh]h)}(h#transmit a DCS command with payloadh]h#transmit a DCS command with payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjIhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const void *data`` buffer containing data to be transmitted ``size_t len`` size of transmission buffer **Description** This function will automatically choose the right data type depending on the command payload length. **Return** The number of bytes successfully transmitted or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjޗh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjܗubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjؗubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjؗubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj՗ubjZ )}(h>``const void *data`` buffer containing data to be transmitted h](j` )}(h``const void *data``h]jf )}(hjh]hconst void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj-ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj,hMhj՗ubjZ )}(h+``size_t len`` size of transmission buffer h](j` )}(h``size_t len``h]jf )}(hjPh]h size_t len}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjJubj| )}(hhh]h)}(hsize of transmission bufferh]hsize of transmission buffer}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjfubah}(h]h ]h"]h$]h&]uh1j{ hjJubeh}(h]h ]h"]h$]h&]uh1jY hjehMhj՗ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hdThis function will automatically choose the right data type depending on the command payload length.h]hdThis function will automatically choose the right data type depending on the command payload length.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hQThe number of bytes successfully transmitted or a negative error code on failure.h]hQThe number of bytes successfully transmitted or a negative error code on failure.}(hjȘhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -mipi_dsi_dcs_write_buffer_chatty (C function)"c.mipi_dsi_dcs_write_buffer_chattyhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h`int mipi_dsi_dcs_write_buffer_chatty (struct mipi_dsi_device *dsi, const void *data, size_t len)h]j )}(h_int mipi_dsi_dcs_write_buffer_chatty(struct mipi_dsi_device *dsi, const void *data, size_t len)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h mipi_dsi_dcs_write_buffer_chattyh]j )}(h mipi_dsi_dcs_write_buffer_chattyh]h mipi_dsi_dcs_write_buffer_chatty}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h;(struct mipi_dsi_device *dsi, const void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]j)}jjsb"c.mipi_dsi_dcs_write_buffer_chattyasbuh1hhj0ubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj0ubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hconst void *datah](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjϙhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjݙhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jn"c.mipi_dsi_dcs_write_buffer_chattyasbuh1hhjubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hlenh]hlen}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h+mipi_dsi_dcs_write_buffer() w/ an error logh]h+mipi_dsi_dcs_write_buffer() w/ an error log}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjYhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jtj jtj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const void *data`` buffer containing data to be transmitted ``size_t len`` size of transmission buffer **Description** Like mipi_dsi_dcs_write_buffer() but includes a dev_err() call for you and returns 0 upon success, not the number of bytes sent. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjxubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h>``const void *data`` buffer containing data to be transmitted h](j` )}(h``const void *data``h]jf )}(hj֚h]hconst void *data}(hjؚhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjԚubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjКubj| )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjКubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h+``size_t len`` size of transmission buffer h](j` )}(h``size_t len``h]jf )}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubj| )}(hhh]h)}(hsize of transmission bufferh]hsize of transmission buffer}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj%ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj$hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjxubh)}(h**Description**h]j )}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjxubh)}(hLike mipi_dsi_dcs_write_buffer() but includes a dev_err() call for you and returns 0 upon success, not the number of bytes sent.h]hLike mipi_dsi_dcs_write_buffer() but includes a dev_err() call for you and returns 0 upon success, not the number of bytes sent.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjxubh)}(h **Return**h]j )}(hjqh]hReturn}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjxubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,mipi_dsi_dcs_write_buffer_multi (C function)!c.mipi_dsi_dcs_write_buffer_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hgvoid mipi_dsi_dcs_write_buffer_multi (struct mipi_dsi_multi_context *ctx, const void *data, size_t len)h]j )}(hfvoid mipi_dsi_dcs_write_buffer_multi(struct mipi_dsi_multi_context *ctx, const void *data, size_t len)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjśhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjěhMubj )}(hmipi_dsi_dcs_write_buffer_multih]j )}(hmipi_dsi_dcs_write_buffer_multih]hmipi_dsi_dcs_write_buffer_multi}(hjכhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӛubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjěhMubj)}(hB(struct mipi_dsi_multi_context *ctx, const void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjٛsb!c.mipi_dsi_dcs_write_buffer_multiasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst void *datah](j )}(hjAh]hconst}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjaubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjŜhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjœubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjǜmodnameN classnameNj j )}j ]j-!c.mipi_dsi_dcs_write_buffer_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hlenh]hlen}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjěhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjěhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjěhMhjhhubj )}(hhh]h)}(h/mipi_dsi_dcs_write_buffer_chatty() w/ accum_errh]h/mipi_dsi_dcs_write_buffer_chatty() w/ accum_err}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjěhMubeh}(h]h ](j functioneh"]h$]h&]j j j j3j j3j j j uh1jv hhhjwIhNhNubj )}(hX_**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``const void *data`` buffer containing data to be transmitted ``size_t len`` size of transmission buffer **Description** Like mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hj=h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj7ubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj\h]h"struct mipi_dsi_multi_context *ctx}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjVubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjrubah}(h]h ]h"]h$]h&]uh1j{ hjVubeh}(h]h ]h"]h$]h&]uh1jY hjqhMhjSubjZ )}(h>``const void *data`` buffer containing data to be transmitted h](j` )}(h``const void *data``h]jf )}(hjh]hconst void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjSubjZ )}(h+``size_t len`` size of transmission buffer h](j` )}(h``size_t len``h]jf )}(hjΝh]h size_t len}(hjНhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj̝ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjȝubj| )}(hhh]h)}(hsize of transmission bufferh]hsize of transmission buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjȝubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjSubeh}(h]h ]h"]h$]h&]uh1jT hj7ubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj7ubh)}(hLike mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.h]hLike mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1mipi_dsi_dual_dcs_write_buffer_multi (C function)&c.mipi_dsi_dual_dcs_write_buffer_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hvoid mipi_dsi_dual_dcs_write_buffer_multi (struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h]j )}(hvoid mipi_dsi_dual_dcs_write_buffer_multi(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h](j)}(hvoidh]hvoid}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJhhhj\hMubj )}(h$mipi_dsi_dual_dcs_write_buffer_multih]j )}(h$mipi_dsi_dual_dcs_write_buffer_multih]h$mipi_dsi_dual_dcs_write_buffer_multi}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ](j j eh"]h$]h&]j j uh1j hjJhhhj\hMubj)}(h~(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjqsb&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhjubj )}(h h]h }(hjɞhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjמhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct mipi_dsi_device *dsi1h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jŞ&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhjubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjGhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsi1h]hdsi1}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct mipi_dsi_device *dsi2h](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jŞ&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjiubj )}(hdsi2h]hdsi2}(hjğhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst void *datah](j )}(hjAh]hconst}(hjݟhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٟubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٟubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjٟubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٟubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjٟubj )}(hdatah]hdata}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٟubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?modnameN classnameNj j )}j ]jŞ&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhj6ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(hlenh]hlen}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjJhhhj\hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjFhhhj\hMubah}(h]jAah ](j j eh"]h$]h&]j j )j huh1j{ hj\hMhjChhubj )}(hhh]h)}(hKmipi_dsi_dcs_write_buffer_multi() for two dsi channels, one after the otherh]hKmipi_dsi_dcs_write_buffer_multi() for two dsi channels, one after the other}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjChhhj\hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to ``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to ``const void *data`` Buffer containing data to be transmitted ``size_t len`` Size of transmission buffer **Description** A wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjԠh]h"struct mipi_dsi_multi_context *ctx}(hj֠hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjҠubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjΠubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjΠubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjˠubjZ )}(hF``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to h](j` )}(h ``struct mipi_dsi_device *dsi1``h]jf )}(hj h]hstruct mipi_dsi_device *dsi1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h$First dsi channel to write buffer toh]h$First dsi channel to write buffer to}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMhj#ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj"hMhjˠubjZ )}(hG``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to h](j` )}(h ``struct mipi_dsi_device *dsi2``h]jf )}(hjFh]hstruct mipi_dsi_device *dsi2}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj@ubj| )}(hhh]h)}(h%Second dsi channel to write buffer toh]h%Second dsi channel to write buffer to}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj[hMhjˠubjZ )}(h>``const void *data`` Buffer containing data to be transmitted h](j` )}(h``const void *data``h]jf )}(hjh]hconst void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjyubj| )}(hhh]h)}(h(Buffer containing data to be transmittedh]h(Buffer containing data to be transmitted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjˠubjZ )}(h+``size_t len`` Size of transmission buffer h](j` )}(h``size_t len``h]jf )}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hSize of transmission bufferh]hSize of transmission buffer}(hjѡhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj͡hMhjΡubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj͡hMhjˠubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hA wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.h]hA wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_dcs_write (C function)c.mipi_dsi_dcs_writehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h^ssize_t mipi_dsi_dcs_write (struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h]j )}(h]ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=modnameN classnameNj j )}j ]j)}jmipi_dsi_dcs_writesbc.mipi_dsi_dcs_writeasbuh1hhj4hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4hhhj\hM ubj )}(hmipi_dsi_dcs_writeh]j )}(hjYh]hmipi_dsi_dcs_write}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ](j j eh"]h$]h&]j j uh1j hj4hhhj\hM ubj)}(hC(struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jWc.mipi_dsi_dcs_writeasbuh1hhjubj )}(h h]h }(hjƢhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjԢhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jWc.mipi_dsi_dcs_writeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcmdh]hcmd}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst void *datah](j )}(hjAh]hconst}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj)}(hvoidh]hvoid}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>ubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jWc.mipi_dsi_dcs_writeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hlenh]hlen}(hjΣhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj4hhhj\hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j $hj0hhhj\hM ubah}(h]j+ah ](j j eh"]h$]h&]j j )j huh1j{ hj\hM hj-hhubj )}(hhh]h)}(hsend DCS write commandh]hsend DCS write command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj-hhhj\hM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 cmd`` DCS command ``const void *data`` buffer containing the command payload ``size_t len`` command payload length **Description** This function will automatically choose the right data type depending on the command payload length. **Return** The number of bytes successfully transmitted or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj9h]hstruct mipi_dsi_device *dsi}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hj3ubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhM hjOubah}(h]h ]h"]h$]h&]uh1j{ hj3ubeh}(h]h ]h"]h$]h&]uh1jY hjNhM hj0ubjZ )}(h``u8 cmd`` DCS command h](j` )}(h ``u8 cmd``h]jf )}(hjrh]hu8 cmd}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjlubj| )}(hhh]h)}(h DCS commandh]h DCS command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj0ubjZ )}(h;``const void *data`` buffer containing the command payload h](j` )}(h``const void *data``h]jf )}(hjh]hconst void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubj| )}(hhh]h)}(h%buffer containing the command payloadh]h%buffer containing the command payload}(hjĤhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj0ubjZ )}(h&``size_t len`` command payload length h](j` )}(h``size_t len``h]jf )}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjޤubj| )}(hhh]h)}(hcommand payload lengthh]hcommand payload length}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjޤubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj0ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hdThis function will automatically choose the right data type depending on the command payload length.h]hdThis function will automatically choose the right data type depending on the command payload length.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjFh]hReturn}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hQThe number of bytes successfully transmitted or a negative error code on failure.h]hQThe number of bytes successfully transmitted or a negative error code on failure.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_dcs_read (C function)c.mipi_dsi_dcs_readhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hWssize_t mipi_dsi_dcs_read (struct mipi_dsi_device *dsi, u8 cmd, void *data, size_t len)h]j )}(hVssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data, size_t len)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jmipi_dsi_dcs_readsbc.mipi_dsi_dcs_readasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM6ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM6ubj )}(hmipi_dsi_dcs_readh]j )}(hjh]hmipi_dsi_dcs_read}(hj¥hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM6ubj)}(h=(struct mipi_dsi_device *dsi, u8 cmd, void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjݥhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj٥ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj٥ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_readasbuh1hhj٥ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj٥ubj)}(hjOh]h*}(hj'hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj٥ubj )}(hdsih]hdsi}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj٥ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjեubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_readasbuh1hhjIubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(hcmdh]hcmd}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjեubj)}(h void *datah](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjեubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjڦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjצubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjܦmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_readasbuh1hhjӦubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӦubj )}(hlenh]hlen}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӦubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjեubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM6ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM6ubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j{ hjhM6hjhhubj )}(hhh]h)}(hsend DCS read request commandh]hsend DCS read request command}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM6hj-hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM6ubeh}(h]h ](j functioneh"]h$]h&]j j j jHj jHj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 cmd`` DCS command ``void *data`` buffer in which to receive data ``size_t len`` size of receive buffer **Return** The number of bytes read or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjRh]h Parameters}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM:hjLubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjqh]hstruct mipi_dsi_device *dsi}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM7hjkubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjhM7hjhubjZ )}(h``u8 cmd`` DCS command h](j` )}(h ``u8 cmd``h]jf )}(hjh]hu8 cmd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM8hjubj| )}(hhh]h)}(h DCS commandh]h DCS command}(hjçhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM8hjhubjZ )}(h/``void *data`` buffer in which to receive data h](j` )}(h``void *data``h]jf )}(hjh]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM9hjݧubj| )}(hhh]h)}(hbuffer in which to receive datah]hbuffer in which to receive data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1j{ hjݧubeh}(h]h ]h"]h$]h&]uh1jY hjhM9hjhubjZ )}(h&``size_t len`` size of receive buffer h](j` )}(h``size_t len``h]jf )}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM:hjubj| )}(hhh]h)}(hsize of receive bufferh]hsize of receive buffer}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hM:hj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hM:hjhubeh}(h]h ]h"]h$]h&]uh1jT hjLubh)}(h **Return**h]j )}(hjWh]hReturn}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM<hjLubh)}(h=The number of bytes read or a negative error code on failure.h]h=The number of bytes read or a negative error code on failure.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM<hjLubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $mipi_dsi_dcs_read_multi (C function)c.mipi_dsi_dcs_read_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(havoid mipi_dsi_dcs_read_multi (struct mipi_dsi_multi_context *ctx, u8 cmd, void *data, size_t len)h]j )}(h`void mipi_dsi_dcs_read_multi(struct mipi_dsi_multi_context *ctx, u8 cmd, void *data, size_t len)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMOubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMOubj )}(hmipi_dsi_dcs_read_multih]j )}(hmipi_dsi_dcs_read_multih]hmipi_dsi_dcs_read_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMOubj)}(hD(struct mipi_dsi_multi_context *ctx, u8 cmd, void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj٨hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjըubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjըubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.mipi_dsi_dcs_read_multiasbuh1hhjըubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjըubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjըubj )}(hctxh]hctx}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjըubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjѨubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjPmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_read_multiasbuh1hhjGubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(hcmdh]hcmd}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjѨubj)}(h void *datah](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjѨubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjةhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjթubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjکmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_read_multiasbuh1hhjѩubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjѩubj )}(hlenh]hlen}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjѩubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjѨubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMOubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMOubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMOhjhhubj )}(hhh]h)}(h mipi_dsi_dcs_read() w/ accum_errh]h mipi_dsi_dcs_read() w/ accum_err}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMOhj+hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMOubeh}(h]h ](j functioneh"]h$]h&]j j j jFj jFj j j uh1jv hhhjwIhNhNubj )}(hXV**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u8 cmd`` DCS command ``void *data`` buffer in which to receive data ``size_t len`` size of receive buffer **Description** Like mipi_dsi_dcs_read() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMShjJubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjoh]h"struct mipi_dsi_multi_context *ctx}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMPhjiubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMPhjubah}(h]h ]h"]h$]h&]uh1j{ hjiubeh}(h]h ]h"]h$]h&]uh1jY hjhMPhjfubjZ )}(h``u8 cmd`` DCS command h](j` )}(h ``u8 cmd``h]jf )}(hjh]hu8 cmd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMQhjubj| )}(hhh]h)}(h DCS commandh]h DCS command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMQhjfubjZ )}(h/``void *data`` buffer in which to receive data h](j` )}(h``void *data``h]jf )}(hjh]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjߪubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMRhj۪ubj| )}(hhh]h)}(hbuffer in which to receive datah]hbuffer in which to receive data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMRhjubah}(h]h ]h"]h$]h&]uh1j{ hj۪ubeh}(h]h ]h"]h$]h&]uh1jY hjhMRhjfubjZ )}(h&``size_t len`` size of receive buffer h](j` )}(h``size_t len``h]jf )}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMShjubj| )}(hhh]h)}(hsize of receive bufferh]hsize of receive buffer}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMShj0ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj/hMShjfubeh}(h]h ]h"]h$]h&]uh1jT hjJubh)}(h**Description**h]j )}(hjUh]h Description}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjJubh)}(hpLike mipi_dsi_dcs_read() but deals with errors in a way that makes it convenient to make several calls in a row.h]hpLike mipi_dsi_dcs_read() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMThjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq mipi_dsi_dcs_nop (C function)c.mipi_dsi_dcs_nophNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h2int mipi_dsi_dcs_nop (struct mipi_dsi_device *dsi)h]j )}(h1int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMtubj )}(hmipi_dsi_dcs_noph]j )}(hmipi_dsi_dcs_noph]hmipi_dsi_dcs_nop}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMtubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj׫hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӫubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӫubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.mipi_dsi_dcs_nopasbuh1hhjӫubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӫubj)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjӫubj )}(hdsih]hdsi}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӫubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjϫubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMtubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMtubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMthjhhubj )}(hhh]h)}(hsend DCS nop packeth]hsend DCS nop packet}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMthjWhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMtubeh}(h]h ](j functioneh"]h$]h&]j j j jrj jrj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_nop_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj|h]h Parameters}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMxhjvubjU )}(hhh]jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMuhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMuhjubah}(h]h ]h"]h$]h&]uh1jT hjvubh)}(h**Description**h]j )}(hj֬h]h Description}(hjجhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjԬubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMwhjvubh)}(hBThis function is deprecated. Use mipi_dsi_dcs_nop_multi() instead.h]hBThis function is deprecated. Use mipi_dsi_dcs_nop_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMvhjvubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMxhjvubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMyhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $mipi_dsi_dcs_soft_reset (C function)c.mipi_dsi_dcs_soft_resethNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h9int mipi_dsi_dcs_soft_reset (struct mipi_dsi_device *dsi)h]j )}(h8int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhjPhMubj )}(hmipi_dsi_dcs_soft_reseth]j )}(hmipi_dsi_dcs_soft_reseth]hmipi_dsi_dcs_soft_reset}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>hhhjPhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjesbc.mipi_dsi_dcs_soft_resetasbuh1hhj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj)}(hjOh]h*}(hj˭hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj{ubj )}(hdsih]hdsi}(hjحhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubah}(h]h ]h"]h$]h&]j j uh1jhj>hhhjPhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:hhhjPhMubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j{ hjPhMhj7hhubj )}(hhh]h)}(h.perform a software reset of the display moduleh]h.perform a software reset of the display module}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj7hhhjPhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_soft_reset_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj$h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh]jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjCh]hstruct mipi_dsi_device *dsi}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj=ubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMhjYubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hjXhMhj:ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj~h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hIThis function is deprecated. Use mipi_dsi_dcs_soft_reset_multi() instead.h]hIThis function is deprecated. Use mipi_dsi_dcs_soft_reset_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (mipi_dsi_dcs_get_power_mode (C function)c.mipi_dsi_dcs_get_power_modehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hGint mipi_dsi_dcs_get_power_mode (struct mipi_dsi_device *dsi, u8 *mode)h]j )}(hFint mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_get_power_modeh]j )}(hmipi_dsi_dcs_get_power_modeh]hmipi_dsi_dcs_get_power_mode}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h'(struct mipi_dsi_device *dsi, u8 *mode)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjGmodnameN classnameNj j )}j ]j)}jj sbc.mipi_dsi_dcs_get_power_modeasbuh1hhj#ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hjOh]h*}(hjshhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 *modeh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jac.mipi_dsi_dcs_get_power_modeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjȯhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmodeh]hmode}(hjկhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jݮah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhj߮hhubj )}(hhh]h)}(h-query the display module's current power modeh]h/query the display module’s current power mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj߮hhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 *mode`` return location for the current power mode **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj!h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj@h]hstruct mipi_dsi_device *dsi}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj:ubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMhjVubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hjUhMhj7ubjZ )}(h8``u8 *mode`` return location for the current power mode h](j` )}(h ``u8 *mode``h]jf )}(hjyh]hu8 *mode}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjsubj| )}(hhh]h)}(h*return location for the current power modeh]h*return location for the current power mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj7ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjʰhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *mipi_dsi_dcs_get_pixel_format (C function)c.mipi_dsi_dcs_get_pixel_formathNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hKint mipi_dsi_dcs_get_pixel_format (struct mipi_dsi_device *dsi, u8 *format)h]j )}(hJint mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_get_pixel_formath]j )}(hmipi_dsi_dcs_get_pixel_formath]hmipi_dsi_dcs_get_pixel_format}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h)(struct mipi_dsi_device *dsi, u8 *format)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjVmodnameN classnameNj j )}j ]j)}jjsbc.mipi_dsi_dcs_get_pixel_formatasbuh1hhj2ubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj2ubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(h u8 *formath](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jpc.mipi_dsi_dcs_get_pixel_formatasbuh1hhjubj )}(h h]h }(hjɱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjױhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hformath]hformat}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hBgets the pixel format for the RGB image data used by the interfaceh]hBgets the pixel format for the RGB image data used by the interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j&j j&j j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 *format`` return location for the pixel format **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj*ubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjOh]hstruct mipi_dsi_device *dsi}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjIubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjdhMhjFubjZ )}(h4``u8 *format`` return location for the pixel format h](j` )}(h``u8 *format``h]jf )}(hjh]h u8 *format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h$return location for the pixel formath]h$return location for the pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjFubeh}(h]h ]h"]h$]h&]uh1jT hj*ubh)}(h **Return**h]j )}(hjòh]hReturn}(hjŲhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj*ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjٲhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *mipi_dsi_dcs_enter_sleep_mode (C function)c.mipi_dsi_dcs_enter_sleep_modehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h?int mipi_dsi_dcs_enter_sleep_mode (struct mipi_dsi_device *dsi)h]j )}(h>int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_enter_sleep_modeh]j )}(hmipi_dsi_dcs_enter_sleep_modeh]hmipi_dsi_dcs_enter_sleep_mode}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjemodnameN classnameNj j )}j ]j)}jj+sbc.mipi_dsi_dcs_enter_sleep_modeasbuh1hhjAubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjAubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hWdisable all unnecessary blocks inside the display module except interface communicationh]hWdisable all unnecessary blocks inside the display module except interface communication}(hjȳhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjųhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh]jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj h]hstruct mipi_dsi_device *dsi}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjDh]h Description}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hOThis function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead.h]hOThis function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjkh]hReturn}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )mipi_dsi_dcs_exit_sleep_mode (C function)c.mipi_dsi_dcs_exit_sleep_modehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h>int mipi_dsi_dcs_exit_sleep_mode (struct mipi_dsi_device *dsi)h]j )}(h=int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_exit_sleep_modeh]j )}(hmipi_dsi_dcs_exit_sleep_modeh]hmipi_dsi_dcs_exit_sleep_mode}(hjѴhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʹubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjӴsbc.mipi_dsi_dcs_exit_sleep_modeasbuh1hhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj9hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h+enable all blocks inside the display moduleh]h+enable all blocks inside the display module}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjmhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh]jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjʵhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjƵhMhjǵubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjƵhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hNThis function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )mipi_dsi_dcs_set_display_off (C function)c.mipi_dsi_dcs_set_display_offhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h>int mipi_dsi_dcs_set_display_off (struct mipi_dsi_device *dsi)h]j )}(h=int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjThhhjfhMubj )}(hmipi_dsi_dcs_set_display_offh]j )}(hmipi_dsi_dcs_set_display_offh]hmipi_dsi_dcs_set_display_off}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ](j j eh"]h$]h&]j j uh1j hjThhhjfhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj{sbc.mipi_dsi_dcs_set_display_offasbuh1hhjubj )}(h h]h }(hjӶhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjThhhjfhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjPhhhjfhMubah}(h]jKah ](j j eh"]h$]h&]j j )j huh1j{ hjfhMhjMhhubj )}(hhh]h)}(h4stop displaying the image data on the display deviceh]h4stop displaying the image data on the display device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjMhhhjfhMubeh}(h]h ](j functioneh"]h$]h&]j j j j0j j0j j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj:h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj4ubjU )}(hhh]jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjYh]hstruct mipi_dsi_device *dsi}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjSubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjoubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjnhMhjPubah}(h]h ]h"]h$]h&]uh1jT hj4ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj4ubh)}(hNThis function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj4ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj4ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjѷhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (mipi_dsi_dcs_set_display_on (C function)c.mipi_dsi_dcs_set_display_onhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h=int mipi_dsi_dcs_set_display_on (struct mipi_dsi_device *dsi)h]j )}(hhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjܸubh)}(hMThis function is deprecated. Use mipi_dsi_dcs_set_display_on_multi() instead.h]hMThis function is deprecated. Use mipi_dsi_dcs_set_display_on_multi() instead.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjܸubh)}(h **Return**h]j )}(hjch]hReturn}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjܸubh)}(h00 on success or a negative error code on failureh]h00 on success or a negative error code on failure}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjܸubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,mipi_dsi_dcs_set_column_address (C function)!c.mipi_dsi_dcs_set_column_addresshNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hUint mipi_dsi_dcs_set_column_address (struct mipi_dsi_device *dsi, u16 start, u16 end)h]j )}(hTint mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start, u16 end)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM"ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM"ubj )}(hmipi_dsi_dcs_set_column_addressh]j )}(hmipi_dsi_dcs_set_column_addressh]hmipi_dsi_dcs_set_column_address}(hjɹhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŹubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM"ubj)}(h1(struct mipi_dsi_device *dsi, u16 start, u16 end)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj˹sb!c.mipi_dsi_dcs_set_column_addressasbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݹubj)}(h u16 starth](h)}(hhh]j )}(hu16h]hu16}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j!c.mipi_dsi_dcs_set_column_addressasbuh1hhjSubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(hstarth]hstart}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݹubj)}(hu16 endh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.mipi_dsi_dcs_set_column_addressasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendh]hend}(hjκhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݹubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM"ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM"ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM"hjhhubj )}(hhh]h)}(hKdefine the column extent of the frame memory accessed by the host processorh]hKdefine the column extent of the frame memory accessed by the host processor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM"hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM"ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hXC**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 start`` first column of frame memory ``u16 end`` last column of frame memory **Description** This function is deprecated. Use mipi_dsi_dcs_set_column_address_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM&hjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj9h]hstruct mipi_dsi_device *dsi}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM$hj3ubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhM$hjOubah}(h]h ]h"]h$]h&]uh1j{ hj3ubeh}(h]h ]h"]h$]h&]uh1jY hjNhM$hj0ubjZ )}(h+``u16 start`` first column of frame memory h](j` )}(h ``u16 start``h]jf )}(hjrh]h u16 start}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM%hjlubj| )}(hhh]h)}(hfirst column of frame memoryh]hfirst column of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM%hjubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjhM%hj0ubjZ )}(h(``u16 end`` last column of frame memory h](j` )}(h ``u16 end``h]jf )}(hjh]hu16 end}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM&hjubj| )}(hhh]h)}(hlast column of frame memoryh]hlast column of frame memory}(hjĻhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM&hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM&hj0ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM(hjubh)}(hQThis function is deprecated. Use mipi_dsi_dcs_set_column_address_multi() instead.h]hQThis function is deprecated. Use mipi_dsi_dcs_set_column_address_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM'hjubh)}(h **Return**h]j )}(hj h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM*hjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM+hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *mipi_dsi_dcs_set_page_address (C function)c.mipi_dsi_dcs_set_page_addresshNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hSint mipi_dsi_dcs_set_page_address (struct mipi_dsi_device *dsi, u16 start, u16 end)h]j )}(hRint mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start, u16 end)h](j)}(hinth]hint}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM=ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhj`hM=ubj )}(hmipi_dsi_dcs_set_page_addressh]j )}(hmipi_dsi_dcs_set_page_addressh]hmipi_dsi_dcs_set_page_address}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhj`hM=ubj)}(h1(struct mipi_dsi_device *dsi, u16 start, u16 end)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjusbc.mipi_dsi_dcs_set_page_addressasbuh1hhjubj )}(h h]h }(hjͼhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjۼhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u16 starth](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jɼc.mipi_dsi_dcs_set_page_addressasbuh1hhjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstarth]hstart}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 endh](h)}(hhh]j )}(hu16h]hu16}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNmodnameN classnameNj j )}j ]jɼc.mipi_dsi_dcs_set_page_addressasbuh1hhjEubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj )}(hendh]hend}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjNhhhj`hM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhj`hM=ubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j{ hj`hM=hjGhhubj )}(hhh]h)}(hIdefine the page extent of the frame memory accessed by the host processorh]hIdefine the page extent of the frame memory accessed by the host processor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM=hjhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhj`hM=ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX=**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 start`` first page of frame memory ``u16 end`` last page of frame memory **Description** This function is deprecated. Use mipi_dsi_dcs_set_page_address_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjĽh]h Parameters}(hjƽhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj½ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMAhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM?hjݽubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM?hjubah}(h]h ]h"]h$]h&]uh1j{ hjݽubeh}(h]h ]h"]h$]h&]uh1jY hjhM?hjڽubjZ )}(h)``u16 start`` first page of frame memory h](j` )}(h ``u16 start``h]jf )}(hjh]h u16 start}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM@hjubj| )}(hhh]h)}(hfirst page of frame memoryh]hfirst page of frame memory}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hM@hj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hM@hjڽubjZ )}(h&``u16 end`` last page of frame memory h](j` )}(h ``u16 end``h]jf )}(hjUh]hu16 end}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMAhjOubj| )}(hhh]h)}(hlast page of frame memoryh]hlast page of frame memory}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMAhjkubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjjhMAhjڽubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMChjubh)}(hOThis function is deprecated. Use mipi_dsi_dcs_set_page_address_multi() instead.h]hOThis function is deprecated. Use mipi_dsi_dcs_set_page_address_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMBhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMEhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMFhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %mipi_dsi_dcs_set_tear_on (C function)c.mipi_dsi_dcs_set_tear_onhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h\int mipi_dsi_dcs_set_tear_on (struct mipi_dsi_device *dsi, enum mipi_dsi_dcs_tear_mode mode)h]j )}(h[int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi, enum mipi_dsi_dcs_tear_mode mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMXubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMXubj )}(hmipi_dsi_dcs_set_tear_onh]j )}(hmipi_dsi_dcs_set_tear_onh]hmipi_dsi_dcs_set_tear_on}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMXubj)}(h?(struct mipi_dsi_device *dsi, enum mipi_dsi_dcs_tear_mode mode)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]j)}jjsbc.mipi_dsi_dcs_set_tear_onasbuh1hhj5ubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj5ubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(h enum mipi_dsi_dcs_tear_mode modeh](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_dcs_tear_modeh]hmipi_dsi_dcs_tear_mode}(hjɿhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjƿubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj˿modnameN classnameNj j )}j ]jsc.mipi_dsi_dcs_set_tear_onasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMXubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMXubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMXhjhhubj )}(hhh]h)}(hPturn on the display module's Tearing Effect output signal on the TE signal line.h]hRturn on the display module’s Tearing Effect output signal on the TE signal line.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMXhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMXubeh}(h]h ](j functioneh"]h$]h&]j j j j7j j7j j j uh1jv hhhjwIhNhNubj )}(hX.**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode **Description** This function is deprecated. Use mipi_dsi_dcs_set_tear_on_multi() instead. **Return** 0 on success or a negative error code on failureh](h)}(h**Parameters**h]j )}(hjAh]h Parameters}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM\hj;ubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj`h]hstruct mipi_dsi_device *dsi}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMZhjZubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMZhjvubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjuhMZhjWubjZ )}(hI``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode h](j` )}(h$``enum mipi_dsi_dcs_tear_mode mode``h]jf )}(hjh]h enum mipi_dsi_dcs_tear_mode mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM[hjubj| )}(hhh]h)}(h#the Tearing Effect Output Line modeh]h#the Tearing Effect Output Line mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM[hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM[hjWubeh}(h]h ]h"]h$]h&]uh1jT hj;ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM]hj;ubh)}(hJThis function is deprecated. Use mipi_dsi_dcs_set_tear_on_multi() instead.h]hJThis function is deprecated. Use mipi_dsi_dcs_set_tear_on_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM\hj;ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM^hj;ubh)}(h00 on success or a negative error code on failureh]h00 on success or a negative error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM_hj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *mipi_dsi_dcs_set_pixel_format (C function)c.mipi_dsi_dcs_set_pixel_formathNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hJint mipi_dsi_dcs_set_pixel_format (struct mipi_dsi_device *dsi, u8 format)h]j )}(hIint mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format)h](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMqubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhjNhMqubj )}(hmipi_dsi_dcs_set_pixel_formath]j )}(hmipi_dsi_dcs_set_pixel_formath]hmipi_dsi_dcs_set_pixel_format}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj<hhhjNhMqubj)}(h((struct mipi_dsi_device *dsi, u8 format)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjcsbc.mipi_dsi_dcs_set_pixel_formatasbuh1hhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjyubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubj)}(h u8 formath](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_set_pixel_formatasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hformath]hformat}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubeh}(h]h ]h"]h$]h&]j j uh1jhj<hhhjNhMqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj8hhhjNhMqubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j{ hjNhMqhj5hhubj )}(hhh]h)}(hBsets the pixel format for the RGB image data used by the interfaceh]hBsets the pixel format for the RGB image data used by the interface}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjEhhubah}(h]h ]h"]h$]h&]uh1j hj5hhhjNhMqubeh}(h]h ](j functioneh"]h$]h&]j j j j`j j`j j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 format`` pixel format **Description** This function is deprecated. Use mipi_dsi_dcs_set_pixel_format_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjjh]h Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMuhjdubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMshjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMshjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMshjubjZ )}(h``u8 format`` pixel format h](j` )}(h ``u8 format``h]jf )}(hjh]h u8 format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMthjubj| )}(hhh]h)}(h pixel formath]h pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMthjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMthjubeh}(h]h ]h"]h$]h&]uh1jT hjdubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMvhjdubh)}(hOThis function is deprecated. Use mipi_dsi_dcs_set_pixel_format_multi() instead.h]hOThis function is deprecated. Use mipi_dsi_dcs_set_pixel_format_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMuhjdubh)}(h **Return**h]j )}(hj$h]hReturn}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMxhjdubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMyhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +mipi_dsi_dcs_set_tear_scanline (C function) c.mipi_dsi_dcs_set_tear_scanlinehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hNint mipi_dsi_dcs_set_tear_scanline (struct mipi_dsi_device *dsi, u16 scanline)h]j )}(hMint mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline)h](j)}(hinth]hint}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjwhMubj )}(hmipi_dsi_dcs_set_tear_scanlineh]j )}(hmipi_dsi_dcs_set_tear_scanlineh]hmipi_dsi_dcs_set_tear_scanline}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjwhMubj)}(h+(struct mipi_dsi_device *dsi, u16 scanline)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb c.mipi_dsi_dcs_set_tear_scanlineasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u16 scanlineh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.mipi_dsi_dcs_set_tear_scanlineasbuh1hhjubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hscanlineh]hscanline}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjehhhjwhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjwhMubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j{ hjwhMhj^hhubj )}(hhh]h)}(h]set the scanline to use as trigger for the Tearing Effect output signal of the display moduleh]h]set the scanline to use as trigger for the Tearing Effect output signal of the display module}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjnhhubah}(h]h ]h"]h$]h&]uh1j hj^hhhjwhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 scanline`` scanline to use as trigger **Description** This function is deprecated. Use mipi_dsi_dcs_set_tear_scanline_multi() instead. **Return** 0 on success or a negative error code on failureh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h,``u16 scanline`` scanline to use as trigger h](j` )}(h``u16 scanline``h]jf )}(hjh]h u16 scanline}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hscanline to use as triggerh]hscanline to use as trigger}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj&h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hPThis function is deprecated. Use mipi_dsi_dcs_set_tear_scanline_multi() instead.h]hPThis function is deprecated. Use mipi_dsi_dcs_set_tear_scanline_multi() instead.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjMh]hReturn}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h00 on success or a negative error code on failureh]h00 on success or a negative error code on failure}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0mipi_dsi_dcs_set_display_brightness (C function)%c.mipi_dsi_dcs_set_display_brightnesshNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hUint mipi_dsi_dcs_set_display_brightness (struct mipi_dsi_device *dsi, u16 brightness)h]j )}(hTint mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h#mipi_dsi_dcs_set_display_brightnessh]j )}(h#mipi_dsi_dcs_set_display_brightnessh]h#mipi_dsi_dcs_set_display_brightness}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h-(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb%c.mipi_dsi_dcs_set_display_brightnessasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 brightnessh](h)}(hhh]j )}(hu16h]hu16}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]j %c.mipi_dsi_dcs_set_display_brightnessasbuh1hhj=ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h brightnessh]h brightness}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h(sets the brightness value of the displayh]h(sets the brightness value of the display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 brightness`` brightness value **Description** This function is deprecated. Use mipi_dsi_dcs_set_display_brightness_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h$``u16 brightness`` brightness value h](j` )}(h``u16 brightness``h]jf )}(hjh]hu16 brightness}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hbrightness valueh]hbrightness value}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj*ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj)hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjOh]h Description}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hUThis function is deprecated. Use mipi_dsi_dcs_set_display_brightness_multi() instead.h]hUThis function is deprecated. Use mipi_dsi_dcs_set_display_brightness_multi() instead.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j )}(hjvh]hReturn}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0mipi_dsi_dcs_get_display_brightness (C function)%c.mipi_dsi_dcs_get_display_brightnesshNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hVint mipi_dsi_dcs_get_display_brightness (struct mipi_dsi_device *dsi, u16 *brightness)h]j )}(hUint mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi, u16 *brightness)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h#mipi_dsi_dcs_get_display_brightnessh]j )}(h#mipi_dsi_dcs_get_display_brightnessh]h#mipi_dsi_dcs_get_display_brightness}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h.(struct mipi_dsi_device *dsi, u16 *brightness)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb%c.mipi_dsi_dcs_get_display_brightnessasbuh1hhjubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 *brightnessh](h)}(hhh]j )}(hu16h]hu16}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjomodnameN classnameNj j )}j ]j2%c.mipi_dsi_dcs_get_display_brightnessasbuh1hhjfubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfubj )}(h brightnessh]h brightness}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h0gets the current brightness value of the displayh]h0gets the current brightness value of the display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 *brightness`` brightness value **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj'ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj&hMhjubjZ )}(h%``u16 *brightness`` brightness value h](j` )}(h``u16 *brightness``h]jf )}(hjJh]hu16 *brightness}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjDubj| )}(hhh]h)}(hbrightness valueh]hbrightness value}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj`ubah}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hj_hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6mipi_dsi_dcs_set_display_brightness_large (C function)+c.mipi_dsi_dcs_set_display_brightness_largehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h[int mipi_dsi_dcs_set_display_brightness_large (struct mipi_dsi_device *dsi, u16 brightness)h]j )}(hZint mipi_dsi_dcs_set_display_brightness_large(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h)mipi_dsi_dcs_set_display_brightness_largeh]j )}(h)mipi_dsi_dcs_set_display_brightness_largeh]h)mipi_dsi_dcs_set_display_brightness_large}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h-(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j)}jjsb+c.mipi_dsi_dcs_set_display_brightness_largeasbuh1hhjubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjShhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 brightnessh](h)}(hhh]j )}(hu16h]hu16}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]jA+c.mipi_dsi_dcs_set_display_brightness_largeasbuh1hhjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h brightnessh]h brightness}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h/sets the 16-bit brightness value of the displayh]h/sets the 16-bit brightness value of the display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 brightness`` brightness value **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj(hMhj ubjZ )}(h$``u16 brightness`` brightness value h](j` )}(h``u16 brightness``h]jf )}(hjLh]hu16 brightness}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjFubj| )}(hhh]h)}(hbrightness valueh]hbrightness value}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjbubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahMhj ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6mipi_dsi_dcs_get_display_brightness_large (C function)+c.mipi_dsi_dcs_get_display_brightness_largehNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h\int mipi_dsi_dcs_get_display_brightness_large (struct mipi_dsi_device *dsi, u16 *brightness)h]j )}(h[int mipi_dsi_dcs_get_display_brightness_large(struct mipi_dsi_device *dsi, u16 *brightness)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h)mipi_dsi_dcs_get_display_brightness_largeh]j )}(h)mipi_dsi_dcs_get_display_brightness_largeh]h)mipi_dsi_dcs_get_display_brightness_large}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h.(struct mipi_dsi_device *dsi, u16 *brightness)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]j)}jjsb+c.mipi_dsi_dcs_get_display_brightness_largeasbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsih]hdsi}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 *brightnessh](h)}(hhh]j )}(hu16h]hu16}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jC+c.mipi_dsi_dcs_get_display_brightness_largeasbuh1hhjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjwubj )}(h brightnessh]h brightness}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h7gets the current 16-bit brightness value of the displayh]h7gets the current 16-bit brightness value of the display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 *brightness`` brightness value **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j` )}(h``struct mipi_dsi_device *dsi``h]jf )}(hj"h]hstruct mipi_dsi_device *dsi}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj8ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj7hMhjubjZ )}(h%``u16 *brightness`` brightness value h](j` )}(h``u16 *brightness``h]jf )}(hj[h]hu16 *brightness}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjUubj| )}(hhh]h)}(hbrightness valueh]hbrightness value}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjqubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjphMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1mipi_dsi_picture_parameter_set_multi (C function)&c.mipi_dsi_picture_parameter_set_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hvoid mipi_dsi_picture_parameter_set_multi (struct mipi_dsi_multi_context *ctx, const struct drm_dsc_picture_parameter_set *pps)h]j )}(h~void mipi_dsi_picture_parameter_set_multi(struct mipi_dsi_multi_context *ctx, const struct drm_dsc_picture_parameter_set *pps)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h$mipi_dsi_picture_parameter_set_multih]j )}(h$mipi_dsi_picture_parameter_set_multih]h$mipi_dsi_picture_parameter_set_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hU(struct mipi_dsi_multi_context *ctx, const struct drm_dsc_picture_parameter_set *pps)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j)}jjsb&c.mipi_dsi_picture_parameter_set_multiasbuh1hhjubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h/const struct drm_dsc_picture_parameter_set *ppsh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_picture_parameter_seth]hdrm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jR&c.mipi_dsi_picture_parameter_set_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hppsh]hpps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h&transmit the DSC PPS to the peripheralh]h&transmit the DSC PPS to the peripheral}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hj#hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j>j j>j j j uh1jv hhhjwIhNhNubj )}(hXH**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``const struct drm_dsc_picture_parameter_set *pps`` VESA DSC 1.1 Picture Parameter Set **Description** Like mipi_dsi_picture_parameter_set() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjHh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjBubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjgh]h"struct mipi_dsi_multi_context *ctx}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjaubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hM hj}ubah}(h]h ]h"]h$]h&]uh1j{ hjaubeh}(h]h ]h"]h$]h&]uh1jY hj|hM hj^ubjZ )}(hW``const struct drm_dsc_picture_parameter_set *pps`` VESA DSC 1.1 Picture Parameter Set h](j` )}(h3``const struct drm_dsc_picture_parameter_set *pps``h]jf )}(hjh]h/const struct drm_dsc_picture_parameter_set *pps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubj| )}(hhh]h)}(h"VESA DSC 1.1 Picture Parameter Seth]h"VESA DSC 1.1 Picture Parameter Set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hj^ubeh}(h]h ]h"]h$]h&]uh1jT hjBubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjBubh)}(h}Like mipi_dsi_picture_parameter_set() but deals with errors in a way that makes it convenient to make several calls in a row.h]h}Like mipi_dsi_picture_parameter_set() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hjBubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0mipi_dsi_compression_mode_ext_multi (C function)%c.mipi_dsi_compression_mode_ext_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hvoid mipi_dsi_compression_mode_ext_multi (struct mipi_dsi_multi_context *ctx, bool enable, enum mipi_dsi_compression_algo algo, unsigned int pps_selector)h]j )}(hvoid mipi_dsi_compression_mode_ext_multi(struct mipi_dsi_multi_context *ctx, bool enable, enum mipi_dsi_compression_algo algo, unsigned int pps_selector)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM%ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj.hM%ubj )}(h#mipi_dsi_compression_mode_ext_multih]j )}(h#mipi_dsi_compression_mode_ext_multih]h#mipi_dsi_compression_mode_ext_multi}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj.hM%ubj)}(hq(struct mipi_dsi_multi_context *ctx, bool enable, enum mipi_dsi_compression_algo algo, unsigned int pps_selector)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]j)}jjCsb%c.mipi_dsi_compression_mode_ext_multiasbuh1hhjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjYubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubj)}(h bool enableh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(henableh]henable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubj)}(h#enum mipi_dsi_compression_algo algoh](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_compression_algoh]hmipi_dsi_compression_algo}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j%c.mipi_dsi_compression_mode_ext_multiasbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(halgoh]halgo}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubj)}(hunsigned int pps_selectorh](j)}(hunsignedh]hunsigned}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(h pps_selectorh]h pps_selector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj.hM%ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj.hM%ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj.hM%hjhhubj )}(hhh]h)}(h$enable/disable DSC on the peripheralh]h$enable/disable DSC on the peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM%hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj.hM%ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``bool enable`` Whether to enable or disable the DSC ``enum mipi_dsi_compression_algo algo`` Selected compression algorithm ``unsigned int pps_selector`` Select PPS from the table of pre-stored or uploaded PPS entries **Description** Like mipi_dsi_compression_mode_ext() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM)hjubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj h]h"struct mipi_dsi_multi_context *ctx}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM&hjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM&hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM&hjubjZ )}(h5``bool enable`` Whether to enable or disable the DSC h](j` )}(h``bool enable``h]jf )}(hjBh]h bool enable}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM'hj<ubj| )}(hhh]h)}(h$Whether to enable or disable the DSCh]h$Whether to enable or disable the DSC}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhM'hjXubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hjWhM'hjubjZ )}(hG``enum mipi_dsi_compression_algo algo`` Selected compression algorithm h](j` )}(h'``enum mipi_dsi_compression_algo algo``h]jf )}(hj{h]h#enum mipi_dsi_compression_algo algo}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM(hjuubj| )}(hhh]h)}(hSelected compression algorithmh]hSelected compression algorithm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1j{ hjuubeh}(h]h ]h"]h$]h&]uh1jY hjhM(hjubjZ )}(h^``unsigned int pps_selector`` Select PPS from the table of pre-stored or uploaded PPS entries h](j` )}(h``unsigned int pps_selector``h]jf )}(hjh]hunsigned int pps_selector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM)hjubj| )}(hhh]h)}(h?Select PPS from the table of pre-stored or uploaded PPS entriesh]h?Select PPS from the table of pre-stored or uploaded PPS entries}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM)hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM)hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM+hjubh)}(h|Like mipi_dsi_compression_mode_ext() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_compression_mode_ext() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM*hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,mipi_dsi_compression_mode_multi (C function)!c.mipi_dsi_compression_mode_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hVvoid mipi_dsi_compression_mode_multi (struct mipi_dsi_multi_context *ctx, bool enable)h]j )}(hUvoid mipi_dsi_compression_mode_multi(struct mipi_dsi_multi_context *ctx, bool enable)h](j)}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMDubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhjBhMDubj )}(hmipi_dsi_compression_mode_multih]j )}(hmipi_dsi_compression_mode_multih]hmipi_dsi_compression_mode_multi}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ](j j eh"]h$]h&]j j uh1j hj0hhhjBhMDubj)}(h1(struct mipi_dsi_multi_context *ctx, bool enable)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjWsb!c.mipi_dsi_compression_mode_multiasbuh1hhjmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjmubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjiubj)}(h bool enableh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(henableh]henable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjiubeh}(h]h ]h"]h$]h&]j j uh1jhj0hhhjBhMDubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj,hhhjBhMDubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j{ hjBhMDhj)hhubj )}(hhh]h)}(h$enable/disable DSC on the peripheralh]h$enable/disable DSC on the peripheral}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMDhj%hhubah}(h]h ]h"]h$]h&]uh1j hj)hhhjBhMDubeh}(h]h ](j functioneh"]h$]h&]j j j j@j j@j j j uh1jv hhhjwIhNhNubj )}(hX+**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``bool enable`` Whether to enable or disable the DSC **Description** Enable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.h](h)}(h**Parameters**h]j )}(hjJh]h Parameters}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMHhjDubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjih]h"struct mipi_dsi_multi_context *ctx}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMEhjcubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMEhjubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hj~hMEhj`ubjZ )}(h5``bool enable`` Whether to enable or disable the DSC h](j` )}(h``bool enable``h]jf )}(hjh]h bool enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMFhjubj| )}(hhh]h)}(h$Whether to enable or disable the DSCh]h$Whether to enable or disable the DSC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMFhj`ubeh}(h]h ]h"]h$]h&]uh1jT hjDubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMHhjDubh)}(hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.h]hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMGhjDubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #mipi_dsi_dcs_nop_multi (C function)c.mipi_dsi_dcs_nop_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h@void mipi_dsi_dcs_nop_multi (struct mipi_dsi_multi_context *ctx)h]j )}(h?void mipi_dsi_dcs_nop_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMTubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj0hMTubj )}(hmipi_dsi_dcs_nop_multih]j )}(hmipi_dsi_dcs_nop_multih]hmipi_dsi_dcs_nop_multi}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj0hMTubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjEsbc.mipi_dsi_dcs_nop_multiasbuh1hhj[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjWubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj0hMTubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj0hMTubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj0hMThjhhubj )}(hhh]h)}(hsend DCS NOP packeth]hsend DCS NOP packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMThjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj0hMTubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_nop() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMXhjubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj#h]h"struct mipi_dsi_multi_context *ctx}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMUhj9ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj8hMUhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj^h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMWhjubh)}(hoLike mipi_dsi_dcs_nop() but deals with errors in a way that makes it convenient to make several calls in a row.h]hoLike mipi_dsi_dcs_nop() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMVhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0mipi_dsi_dcs_enter_sleep_mode_multi (C function)%c.mipi_dsi_dcs_enter_sleep_mode_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hMvoid mipi_dsi_dcs_enter_sleep_mode_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hLvoid mipi_dsi_dcs_enter_sleep_mode_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMmubj )}(h#mipi_dsi_dcs_enter_sleep_mode_multih]j )}(h#mipi_dsi_dcs_enter_sleep_mode_multih]h#mipi_dsi_dcs_enter_sleep_mode_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMmubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb%c.mipi_dsi_dcs_enter_sleep_mode_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMmubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMmhjhhubj )}(hhh]h)}(h send DCS ENTER_SLEEP_MODE packeth]h send DCS ENTER_SLEEP_MODE packet}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMmhj`hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMmubeh}(h]h ](j functioneh"]h$]h&]j j j j{j j{j j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMnhjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMnhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMnhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMphjubh)}(h|Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMohjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /mipi_dsi_dcs_exit_sleep_mode_multi (C function)$c.mipi_dsi_dcs_exit_sleep_mode_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hLvoid mipi_dsi_dcs_exit_sleep_mode_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hKvoid mipi_dsi_dcs_exit_sleep_mode_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj2hMubj )}(h"mipi_dsi_dcs_exit_sleep_mode_multih]j )}(h"mipi_dsi_dcs_exit_sleep_mode_multih]h"mipi_dsi_dcs_exit_sleep_mode_multi}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj2hMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjGsb$c.mipi_dsi_dcs_exit_sleep_mode_multiasbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj]ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj2hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj2hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj2hMhjhhubj )}(hhh]h)}(hsend DCS EXIT_SLEEP_MODE packeth]hsend DCS EXIT_SLEEP_MODE packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj2hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj%h]h"struct mipi_dsi_multi_context *ctx}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj;ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj:hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj`h]h Description}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h{Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /mipi_dsi_dcs_set_display_off_multi (C function)$c.mipi_dsi_dcs_set_display_off_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hLvoid mipi_dsi_dcs_set_display_off_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hKvoid mipi_dsi_dcs_set_display_off_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h"mipi_dsi_dcs_set_display_off_multih]j )}(h"mipi_dsi_dcs_set_display_off_multih]h"mipi_dsi_dcs_set_display_off_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb$c.mipi_dsi_dcs_set_display_off_multiasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hsend DCS SET_DISPLAY_OFF packeth]hsend DCS SET_DISPLAY_OFF packet}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjbhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j}j j}j j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h{Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .mipi_dsi_dcs_set_display_on_multi (C function)#c.mipi_dsi_dcs_set_display_on_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hKvoid mipi_dsi_dcs_set_display_on_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hJvoid mipi_dsi_dcs_set_display_on_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj4hMubj )}(h!mipi_dsi_dcs_set_display_on_multih]j )}(h!mipi_dsi_dcs_set_display_on_multih]h!mipi_dsi_dcs_set_display_on_multi}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhj4hMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjIsb#c.mipi_dsi_dcs_set_display_on_multiasbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubah}(h]h ]h"]h$]h&]j j uh1jhj"hhhj4hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj4hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj4hMhjhhubj )}(hhh]h)}(hsend DCS SET_DISPLAY_ON packeth]hsend DCS SET_DISPLAY_ON packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj4hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj'h]h"struct mipi_dsi_multi_context *ctx}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj!ubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj=ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj<hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjbh]h Description}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hzLike mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.h]hzLike mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +mipi_dsi_dcs_set_tear_on_multi (C function) c.mipi_dsi_dcs_set_tear_on_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hjvoid mipi_dsi_dcs_set_tear_on_multi (struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h]j )}(hivoid mipi_dsi_dcs_set_tear_on_multi(struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_set_tear_on_multih]j )}(hmipi_dsi_dcs_set_tear_on_multih]hmipi_dsi_dcs_set_tear_on_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hF(struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb c.mipi_dsi_dcs_set_tear_on_multiasbuh1hhjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h enum mipi_dsi_dcs_tear_mode modeh](j )}(hj+h]henum}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubh)}(hhh]j )}(hmipi_dsi_dcs_tear_modeh]hmipi_dsi_dcs_tear_mode}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]j c.mipi_dsi_dcs_set_tear_on_multiasbuh1hhjRubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hsend DCS SET_TEAR_ON packeth]hsend DCS SET_TEAR_ON packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hX4**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode **Description** Like mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj h]h"struct mipi_dsi_multi_context *ctx}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj!ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjubjZ )}(hI``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode h](j` )}(h$``enum mipi_dsi_dcs_tear_mode mode``h]jf )}(hjDh]h enum mipi_dsi_dcs_tear_mode mode}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj>ubj| )}(hhh]h)}(h#the Tearing Effect Output Line modeh]h#the Tearing Effect Output Line mode}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjZubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hjYhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hwLike mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.h]hwLike mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .mipi_dsi_turn_on_peripheral_multi (C function)#c.mipi_dsi_turn_on_peripheral_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hKvoid mipi_dsi_turn_on_peripheral_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hJvoid mipi_dsi_turn_on_peripheral_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h!mipi_dsi_turn_on_peripheral_multih]j )}(h!mipi_dsi_turn_on_peripheral_multih]h!mipi_dsi_turn_on_peripheral_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j)}jjsb#c.mipi_dsi_turn_on_peripheral_multiasbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h"sends a Turn On Peripheral commandh]h"sends a Turn On Peripheral command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hzLike mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h]hzLike mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,mipi_dsi_dcs_set_tear_off_multi (C function)!c.mipi_dsi_dcs_set_tear_off_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hIvoid mipi_dsi_dcs_set_tear_off_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hHvoid mipi_dsi_dcs_set_tear_off_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAhhhjShMubj )}(hmipi_dsi_dcs_set_tear_off_multih]j )}(hmipi_dsi_dcs_set_tear_off_multih]hmipi_dsi_dcs_set_tear_off_multi}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ](j j eh"]h$]h&]j j uh1j hjAhhhjShMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjhsb!c.mipi_dsi_dcs_set_tear_off_multiasbuh1hhj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj~ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubah}(h]h ]h"]h$]h&]j j uh1jhjAhhhjShMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj=hhhjShMubah}(h]j8ah ](j j eh"]h$]h&]j j )j huh1j{ hjShMhj:hhubj )}(hhh]h)}(hPturn off the display module's Tearing Effect output signal on the TE signal lineh]hRturn off the display module’s Tearing Effect output signal on the TE signal line}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj:hhhjShMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h^**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactionsh](h)}(h**Parameters**h]j )}(hj'h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hj!ubjU )}(hhh]jZ )}(hL``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactionsh](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjFh]h"struct mipi_dsi_multi_context *ctx}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hj@ubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj[hM hj=ubah}(h]h ]h"]h$]h&]uh1jT hj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *mipi_dsi_dcs_soft_reset_multi (C function)c.mipi_dsi_dcs_soft_reset_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hGvoid mipi_dsi_dcs_soft_reset_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hFvoid mipi_dsi_dcs_soft_reset_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_soft_reset_multih]j )}(hmipi_dsi_dcs_soft_reset_multih]hmipi_dsi_dcs_soft_reset_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.mipi_dsi_dcs_soft_reset_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h.perform a software reset of the display moduleh]h.perform a software reset of the display module}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj]hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jxj jxj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM hj|ubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hj|ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj|ubh)}(hvLike mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.h]hvLike mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 6mipi_dsi_dcs_set_display_brightness_multi (C function)+c.mipi_dsi_dcs_set_display_brightness_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hcvoid mipi_dsi_dcs_set_display_brightness_multi (struct mipi_dsi_multi_context *ctx, u16 brightness)h]j )}(hbvoid mipi_dsi_dcs_set_display_brightness_multi(struct mipi_dsi_multi_context *ctx, u16 brightness)h](j)}(hvoidh]hvoid}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM5ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj/hM5ubj )}(h)mipi_dsi_dcs_set_display_brightness_multih]j )}(h)mipi_dsi_dcs_set_display_brightness_multih]h)mipi_dsi_dcs_set_display_brightness_multi}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj/hM5ubj)}(h4(struct mipi_dsi_multi_context *ctx, u16 brightness)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]j)}jjDsb+c.mipi_dsi_dcs_set_display_brightness_multiasbuh1hhjZubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubj)}(hu16 brightnessh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j+c.mipi_dsi_dcs_set_display_brightness_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h brightnessh]h brightness}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj/hM5ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj/hM5ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj/hM5hjhhubj )}(hhh]h)}(h(sets the brightness value of the displayh]h(sets the brightness value of the display}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM5hj&hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj/hM5ubeh}(h]h ](j functioneh"]h$]h&]j j j jAj jAj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 brightness`` brightness value **Description** Like mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjKh]h Parameters}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM9hjEubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjjh]h"struct mipi_dsi_multi_context *ctx}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjhubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM7hjdubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1j{ hjdubeh}(h]h ]h"]h$]h&]uh1jY hjhM7hjaubjZ )}(h$``u16 brightness`` brightness value h](j` )}(h``u16 brightness``h]jf )}(hjh]hu16 brightness}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM8hjubj| )}(hhh]h)}(hbrightness valueh]hbrightness value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM8hjaubeh}(h]h ]h"]h$]h&]uh1jT hjEubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM:hjEubh)}(hLike mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.h]hLike mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chM9hjEubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0mipi_dsi_dcs_set_pixel_format_multi (C function)%c.mipi_dsi_dcs_set_pixel_format_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hXvoid mipi_dsi_dcs_set_pixel_format_multi (struct mipi_dsi_multi_context *ctx, u8 format)h]j )}(hWvoid mipi_dsi_dcs_set_pixel_format_multi(struct mipi_dsi_multi_context *ctx, u8 format)h](j)}(hvoidh]hvoid}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMQubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj1hMQubj )}(h#mipi_dsi_dcs_set_pixel_format_multih]j )}(h#mipi_dsi_dcs_set_pixel_format_multih]h#mipi_dsi_dcs_set_pixel_format_multi}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj1hMQubj)}(h/(struct mipi_dsi_multi_context *ctx, u8 format)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjFsb%c.mipi_dsi_dcs_set_pixel_format_multiasbuh1hhj\ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj\ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjXubj)}(h u8 formath](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%c.mipi_dsi_dcs_set_pixel_format_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hformath]hformat}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjXubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj1hMQubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj1hMQubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj1hMQhjhhubj )}(hhh]h)}(hBsets the pixel format for the RGB image data used by the interfaceh]hBsets the pixel format for the RGB image data used by the interface}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMQhj(hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj1hMQubeh}(h]h ](j functioneh"]h$]h&]j j j jCj jCj j j uh1jv hhhjwIhNhNubj )}(hX **Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u8 format`` pixel format **Description** Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjMh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjGubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjlh]h"struct mipi_dsi_multi_context *ctx}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMShjfubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMShjubah}(h]h ]h"]h$]h&]uh1j{ hjfubeh}(h]h ]h"]h$]h&]uh1jY hjhMShjcubjZ )}(h``u8 format`` pixel format h](j` )}(h ``u8 format``h]jf )}(hjh]h u8 format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMThjubj| )}(hhh]h)}(h pixel formath]h pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMThjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMThjcubeh}(h]h ]h"]h$]h&]uh1jT hjGubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMVhjGubh)}(h|Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjGubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 2mipi_dsi_dcs_set_column_address_multi (C function)'c.mipi_dsi_dcs_set_column_address_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hcvoid mipi_dsi_dcs_set_column_address_multi (struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h]j )}(hbvoid mipi_dsi_dcs_set_column_address_multi(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(hvoidh]hvoid}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMmubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!hhhj3hMmubj )}(h%mipi_dsi_dcs_set_column_address_multih]j )}(h%mipi_dsi_dcs_set_column_address_multih]h%mipi_dsi_dcs_set_column_address_multi}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!hhhj3hMmubj)}(h8(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjHsb'c.mipi_dsi_dcs_set_column_address_multiasbuh1hhj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubj)}(h u16 starth](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.mipi_dsi_dcs_set_column_address_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstarth]hstart}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubj)}(hu16 endh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j'c.mipi_dsi_dcs_set_column_address_multiasbuh1hhjubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendh]hend}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubeh}(h]h ]h"]h$]h&]j j uh1jhj!hhhj3hMmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj3hMmubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj3hMmhjhhubj )}(hhh]h)}(hKdefine the column extent of the frame memory accessed by the host processorh]hKdefine the column extent of the frame memory accessed by the host processor}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMmhjrhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj3hMmubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hXH**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 start`` first column of frame memory ``u16 end`` last column of frame memory **Description** Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMohjubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMohjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMohjubjZ )}(h+``u16 start`` first column of frame memory h](j` )}(h ``u16 start``h]jf )}(hjh]h u16 start}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMphjubj| )}(hhh]h)}(hfirst column of frame memoryh]hfirst column of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMphjubjZ )}(h(``u16 end`` last column of frame memory h](j` )}(h ``u16 end``h]jf )}(hj(h]hu16 end}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMqhj"ubj| )}(hhh]h)}(hlast column of frame memoryh]hlast column of frame memory}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMqhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj"ubeh}(h]h ]h"]h$]h&]uh1jY hj=hMqhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjch]h Description}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMshjubh)}(h~Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.h]h~Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMrhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 0mipi_dsi_dcs_set_page_address_multi (C function)%c.mipi_dsi_dcs_set_page_address_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(havoid mipi_dsi_dcs_set_page_address_multi (struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h]j )}(h`void mipi_dsi_dcs_set_page_address_multi(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h#mipi_dsi_dcs_set_page_address_multih]j )}(h#mipi_dsi_dcs_set_page_address_multih]h#mipi_dsi_dcs_set_page_address_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h8(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb%c.mipi_dsi_dcs_set_page_address_multiasbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u16 starth](h)}(hhh]j )}(hu16h]hu16}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j%c.mipi_dsi_dcs_set_page_address_multiasbuh1hhjSubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(hstarth]hstart}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 endh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%c.mipi_dsi_dcs_set_page_address_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendh]hend}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hIdefine the page extent of the frame memory accessed by the host processorh]hIdefine the page extent of the frame memory accessed by the host processor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(hXB**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 start`` first page of frame memory ``u16 end`` last page of frame memory **Description** Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj9h]h"struct mipi_dsi_multi_context *ctx}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj3ubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhMhjOubah}(h]h ]h"]h$]h&]uh1j{ hj3ubeh}(h]h ]h"]h$]h&]uh1jY hjNhMhj0ubjZ )}(h)``u16 start`` first page of frame memory h](j` )}(h ``u16 start``h]jf )}(hjrh]h u16 start}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjlubj| )}(hhh]h)}(hfirst page of frame memoryh]hfirst page of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj0ubjZ )}(h&``u16 end`` last page of frame memory h](j` )}(h ``u16 end``h]jf )}(hjh]hu16 end}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hlast page of frame memoryh]hlast page of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj0ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h|Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1mipi_dsi_dcs_set_tear_scanline_multi (C function)&c.mipi_dsi_dcs_set_tear_scanline_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h\void mipi_dsi_dcs_set_tear_scanline_multi (struct mipi_dsi_multi_context *ctx, u16 scanline)h]j )}(h[void mipi_dsi_dcs_set_tear_scanline_multi(struct mipi_dsi_multi_context *ctx, u16 scanline)h](j)}(hvoidh]hvoid}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhj9hMubj )}(h$mipi_dsi_dcs_set_tear_scanline_multih]j )}(h$mipi_dsi_dcs_set_tear_scanline_multih]h$mipi_dsi_dcs_set_tear_scanline_multi}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'hhhj9hMubj)}(h2(struct mipi_dsi_multi_context *ctx, u16 scanline)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjNsb&c.mipi_dsi_dcs_set_tear_scanline_multiasbuh1hhjdubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubj)}(h u16 scanlineh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j&c.mipi_dsi_dcs_set_tear_scanline_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hscanlineh]hscanline}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`ubeh}(h]h ]h"]h$]h&]j j uh1jhj'hhhj9hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#hhhj9hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj9hMhj hhubj )}(hhh]h)}(h]set the scanline to use as trigger for the Tearing Effect output signal of the display moduleh]h]set the scanline to use as trigger for the Tearing Effect output signal of the display module}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj0hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj9hMubeh}(h]h ](j functioneh"]h$]h&]j j j jKj jKj j j uh1jv hhhjwIhNhNubj )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 scanline`` scanline to use as trigger **Description** Like mipi_dsi_dcs_set_tear_scanline() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjUh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjOubjU )}(hhh](jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hjth]h"struct mipi_dsi_multi_context *ctx}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjnubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjkubjZ )}(h,``u16 scanline`` scanline to use as trigger h](j` )}(h``u16 scanline``h]jf )}(hjh]h u16 scanline}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hscanline to use as triggerh]hscanline to use as trigger}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjkubeh}(h]h ]h"]h$]h&]uh1jT hjOubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjOubh)}(h}Like mipi_dsi_dcs_set_tear_scanline() but deals with errors in a way that makes it convenient to make several calls in a row.h]h}Like mipi_dsi_dcs_set_tear_scanline() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /mipi_dsi_shutdown_peripheral_multi (C function)$c.mipi_dsi_shutdown_peripheral_multihNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hLvoid mipi_dsi_shutdown_peripheral_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hKvoid mipi_dsi_shutdown_peripheral_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)hhhj;hMubj )}(h"mipi_dsi_shutdown_peripheral_multih]j )}(h"mipi_dsi_shutdown_peripheral_multih]h"mipi_dsi_shutdown_peripheral_multi}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ](j j eh"]h$]h&]j j uh1j hj)hhhj;hMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjPsb$c.mipi_dsi_shutdown_peripheral_multiasbuh1hhjfubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjbubah}(h]h ]h"]h$]h&]j j uh1jhj)hhhj;hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj%hhhj;hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj;hMhj"hhubj )}(hhh]h)}(h#sends a Shutdown Peripheral commandh]h#sends a Shutdown Peripheral command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj"hhhj;hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_shutdown_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubjU )}(hhh]jZ )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j` )}(h&``struct mipi_dsi_multi_context *ctx``h]jf )}(hj.h]h"struct mipi_dsi_multi_context *ctx}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj(ubj| )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjDubah}(h]h ]h"]h$]h&]uh1j{ hj(ubeh}(h]h ]h"]h$]h&]uh1jY hjChMhj%ubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hjih]h Description}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubh)}(h{Like mipi_dsi_shutdown_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_shutdown_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *mipi_dsi_driver_register_full (C function)c.mipi_dsi_driver_register_fullhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(hUint mipi_dsi_driver_register_full (struct mipi_dsi_driver *drv, struct module *owner)h]j )}(hTint mipi_dsi_driver_register_full(struct mipi_dsi_driver *drv, struct module *owner)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_driver_register_fullh]j )}(hmipi_dsi_driver_register_fullh]hmipi_dsi_driver_register_full}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h3(struct mipi_dsi_driver *drv, struct module *owner)h](j)}(hstruct mipi_dsi_driver *drvh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_driverh]hmipi_dsi_driver}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsbc.mipi_dsi_driver_register_fullasbuh1hhjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdrvh]hdrv}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct module *ownerh](j )}(hj h]hstruct}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubh)}(hhh]j )}(hmoduleh]hmodule}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]j%c.mipi_dsi_driver_register_fullasbuh1hhjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjYubj )}(hownerh]howner}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h!register a driver for DSI devicesh]h!register a driver for DSI devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjwIhNhNubj )}(h**Parameters** ``struct mipi_dsi_driver *drv`` DSI driver structure ``struct module *owner`` owner module **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjU )}(hhh](jZ )}(h5``struct mipi_dsi_driver *drv`` DSI driver structure h](j` )}(h``struct mipi_dsi_driver *drv``h]jf )}(hjh]hstruct mipi_dsi_driver *drv}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj| )}(hhh]h)}(hDSI driver structureh]hDSI driver structure}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj5ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj4hMhjubjZ )}(h&``struct module *owner`` owner module h](j` )}(h``struct module *owner``h]jf )}(hjXh]hstruct module *owner}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjVubah}(h]h ]h"]h$]h&]uh1j_ hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjRubj| )}(hhh]h)}(h owner moduleh]h owner module}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjnubah}(h]h ]h"]h$]h&]uh1j{ hjRubeh}(h]h ]h"]h$]h&]uh1jY hjmhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjwIhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'mipi_dsi_driver_unregister (C function)c.mipi_dsi_driver_unregisterhNtauh1jd hjwIhhhNhNubjw )}(hhh](j| )}(h=void mipi_dsi_driver_unregister (struct mipi_dsi_driver *drv)h]j )}(h` ``rc_model_size`` Total size of RC model ``flatness_min_qp`` Minimum QP where flatness information is sent ``flatness_max_qp`` Maximum QP where flatness information is sent ``initial_scale_value`` Initial value for the scale factor ``scale_decrement_interval`` Specifies number of group times between decrementing the scale factor at beginning of a slice. ``scale_increment_interval`` Number of group times between incrementing the scale factor value used at the beginning of a slice. ``nfl_bpg_offset`` Non first line BPG offset to be used ``slice_bpg_offset`` BPG offset used to enforce slice bit ``final_offset`` Final RC linear transformation offset value ``vbr_enable`` True if VBR mode is enabled, false if disabled ``mux_word_size`` Mux word size (in bits) for SSM mode ``slice_chunk_size`` The (max) size in bytes of the "chunks" that are used in slice multiplexing. ``rc_bits`` Rate control buffer size in bits ``dsc_version_minor`` DSC minor version ``dsc_version_major`` DSC major version ``native_422`` True if Native 4:2:2 supported, else false ``native_420`` True if Native 4:2:0 supported else false. ``second_line_bpg_offset`` Additional bits/grp for seconnd line of slice for native 4:2:0 ``nsl_bpg_offset`` Num of bits deallocated for each grp that is not in second line of slice ``second_line_offset_adj`` Offset adjustment for second line in Native 4:2:0 modeh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKGhjubj, )}(hXystruct drm_dsc_config { u8 line_buf_depth; u8 bits_per_component; bool convert_rgb; u8 slice_count; u16 slice_width; u16 slice_height; bool simple_422; u16 pic_width; u16 pic_height; u8 rc_tgt_offset_high; u8 rc_tgt_offset_low; u16 bits_per_pixel; u8 rc_edge_factor; u8 rc_quant_incr_limit1; u8 rc_quant_incr_limit0; u16 initial_xmit_delay; u16 initial_dec_delay; bool block_pred_enable; u8 first_line_bpg_offset; u16 initial_offset; u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; u16 rc_model_size; u8 flatness_min_qp; u8 flatness_max_qp; u8 initial_scale_value; u16 scale_decrement_interval; u16 scale_increment_interval; u16 nfl_bpg_offset; u16 slice_bpg_offset; u16 final_offset; bool vbr_enable; u8 mux_word_size; u16 slice_chunk_size; u16 rc_bits; u8 dsc_version_minor; u8 dsc_version_major; bool native_422; bool native_420; u8 second_line_bpg_offset; u16 nsl_bpg_offset; u16 second_line_offset_adj; };h]hXystruct drm_dsc_config { u8 line_buf_depth; u8 bits_per_component; bool convert_rgb; u8 slice_count; u16 slice_width; u16 slice_height; bool simple_422; u16 pic_width; u16 pic_height; u8 rc_tgt_offset_high; u8 rc_tgt_offset_low; u16 bits_per_pixel; u8 rc_edge_factor; u8 rc_quant_incr_limit1; u8 rc_quant_incr_limit0; u16 initial_xmit_delay; u16 initial_dec_delay; bool block_pred_enable; u8 first_line_bpg_offset; u16 initial_offset; u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; u16 rc_model_size; u8 flatness_min_qp; u8 flatness_max_qp; u8 initial_scale_value; u16 scale_decrement_interval; u16 scale_increment_interval; u16 nfl_bpg_offset; u16 slice_bpg_offset; u16 final_offset; bool vbr_enable; u8 mux_word_size; u16 slice_chunk_size; u16 rc_bits; u8 dsc_version_minor; u8 dsc_version_major; bool native_422; bool native_420; u8 second_line_bpg_offset; u16 nsl_bpg_offset; u16 second_line_offset_adj; };}hjsbah}(h]h ]h"]h$]h&]j j uh1j+ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKIhjubh)}(h **Members**h]j )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKvhjubjU )}(hhh](jZ )}(hM``line_buf_depth`` Bits per component for previous reconstructed line buffer h](j` )}(h``line_buf_depth``h]jf )}(hjh]hline_buf_depth}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKKhjubj| )}(hhh]h)}(h9Bits per component for previous reconstructed line bufferh]h9Bits per component for previous reconstructed line buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKKhjubjZ )}(h<``bits_per_component`` Bits per component to code (8/10/12) h](j` )}(h``bits_per_component``h]jf )}(hjh]hbits_per_component}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKPhjubj| )}(hhh]h)}(h$Bits per component to code (8/10/12)h]h$Bits per component to code (8/10/12)}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hKPhj0ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj/hKPhjubjZ )}(hm``convert_rgb`` Flag to indicate if RGB - YCoCg conversion is needed True if RGB input, False if YCoCg input h](j` )}(h``convert_rgb``h]jf )}(hjSh]h convert_rgb}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKUhjMubj| )}(hhh]h)}(h\Flag to indicate if RGB - YCoCg conversion is needed True if RGB input, False if YCoCg inputh]h\Flag to indicate if RGB - YCoCg conversion is needed True if RGB input, False if YCoCg input}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKThjiubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjhhKUhjubjZ )}(hB``slice_count`` Number fo slices per line used by the DSC encoder h](j` )}(h``slice_count``h]jf )}(hjh]h slice_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKZhjubj| )}(hhh]h)}(h1Number fo slices per line used by the DSC encoderh]h1Number fo slices per line used by the DSC encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKZhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKZhjubjZ )}(h.``slice_width`` Width of each slice in pixels h](j` )}(h``slice_width``h]jf )}(hjh]h slice_width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhK^hjubj| )}(hhh]h)}(hWidth of each slice in pixelsh]hWidth of each slice in pixels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK^hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK^hjubjZ )}(h(``slice_height`` Slice height in pixels h](j` )}(h``slice_height``h]jf )}(hjh]h slice_height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKbhjubj| )}(hhh]h)}(hSlice height in pixelsh]hSlice height in pixels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKbhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKbhjubjZ )}(h?``simple_422`` True if simple 4_2_2 mode is enabled else False h](j` )}(h``simple_422``h]jf )}(hj8h]h simple_422}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKfhj2ubj| )}(hhh]h)}(h/True if simple 4_2_2 mode is enabled else Falseh]h/True if simple 4_2_2 mode is enabled else False}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKfhjNubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hjMhKfhjubjZ )}(h9``pic_width`` Width of the input display frame in pixels h](j` )}(h ``pic_width``h]jf )}(hjqh]h pic_width}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKjhjkubj| )}(hhh]h)}(h*Width of the input display frame in pixelsh]h*Width of the input display frame in pixels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKjhjubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjhKjhjubjZ )}(h:``pic_height`` Vertical height of the input display frame h](j` )}(h``pic_height``h]jf )}(hjh]h pic_height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKnhjubj| )}(hhh]h)}(h*Vertical height of the input display frameh]h*Vertical height of the input display frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKnhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKnhjubjZ )}(hR``rc_tgt_offset_high`` Offset to bits/group used by RC to determine QP adjustment h](j` )}(h``rc_tgt_offset_high``h]jf )}(hjh]hrc_tgt_offset_high}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKrhjubj| )}(hhh]h)}(h:Offset to bits/group used by RC to determine QP adjustmenth]h:Offset to bits/group used by RC to determine QP adjustment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKrhjubjZ )}(hQ``rc_tgt_offset_low`` Offset to bits/group used by RC to determine QP adjustment h](j` )}(h``rc_tgt_offset_low``h]jf )}(hjh]hrc_tgt_offset_low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKwhjubj| )}(hhh]h)}(h:Offset to bits/group used by RC to determine QP adjustmenth]h:Offset to bits/group used by RC to determine QP adjustment}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hKwhj2ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj1hKwhjubjZ )}(hU``bits_per_pixel`` Target bits per pixel with 4 fractional bits, bits_per_pixel << 4 h](j` )}(h``bits_per_pixel``h]jf )}(hjUh]hbits_per_pixel}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhK|hjOubj| )}(hhh]h)}(hATarget bits per pixel with 4 fractional bits, bits_per_pixel << 4h]hATarget bits per pixel with 4 fractional bits, bits_per_pixel << 4}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhK|hjkubah}(h]h ]h"]h$]h&]uh1j{ hjOubeh}(h]h ]h"]h$]h&]uh1jY hjjhK|hjubjZ )}(hX``rc_edge_factor`` Factor to determine if an edge is present based on the bits produced h](j` )}(h``rc_edge_factor``h]jf )}(hjh]hrc_edge_factor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(hDFactor to determine if an edge is present based on the bits producedh]hDFactor to determine if an edge is present based on the bits produced}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hR``rc_quant_incr_limit1`` Slow down incrementing once the range reaches this value h](j` )}(h``rc_quant_incr_limit1``h]jf )}(hjh]hrc_quant_incr_limit1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h8Slow down incrementing once the range reaches this valueh]h8Slow down incrementing once the range reaches this value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hR``rc_quant_incr_limit0`` Slow down incrementing once the range reaches this value h](j` )}(h``rc_quant_incr_limit0``h]jf )}(hjh]hrc_quant_incr_limit0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h8Slow down incrementing once the range reaches this valueh]h8Slow down incrementing once the range reaches this value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hJ``initial_xmit_delay`` Number of pixels to delay the initial transmission h](j` )}(h``initial_xmit_delay``h]jf )}(hj9h]hinitial_xmit_delay}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhj3ubj| )}(hhh]h)}(h2Number of pixels to delay the initial transmissionh]h2Number of pixels to delay the initial transmission}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKhjOubah}(h]h ]h"]h$]h&]uh1j{ hj3ubeh}(h]h ]h"]h$]h&]uh1jY hjNhKhjubjZ )}(h``initial_dec_delay`` Initial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. h](j` )}(h``initial_dec_delay``h]jf )}(hjrh]hinitial_dec_delay}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjlubj| )}(hhh]h)}(hInitial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.h]hInitial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hs``block_pred_enable`` True if block prediction is used to code any groups within the picture. False if BP not used h](j` )}(h``block_pred_enable``h]jf )}(hjh]hblock_pred_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h\True if block prediction is used to code any groups within the picture. False if BP not usedh]h\True if block prediction is used to code any groups within the picture. False if BP not used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hi``first_line_bpg_offset`` Number of additional bits allocated for each group on the first line of slice. h](j` )}(h``first_line_bpg_offset``h]jf )}(hjh]hfirst_line_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(hNNumber of additional bits allocated for each group on the first line of slice.h]hNNumber of additional bits allocated for each group on the first line of slice.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hC``initial_offset`` Value to use for RC model offset at slice start h](j` )}(h``initial_offset``h]jf )}(hj h]hinitial_offset}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h/Value to use for RC model offset at slice starth]h/Value to use for RC model offset at slice start}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hKhj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hKhjubjZ )}(h@``rc_buf_thresh`` Thresholds defining each of the buffer ranges h](j` )}(h``rc_buf_thresh``h]jf )}(hjYh]h rc_buf_thresh}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjSubj| )}(hhh]h)}(h-Thresholds defining each of the buffer rangesh]h-Thresholds defining each of the buffer ranges}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhKhjoubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjnhKhjubjZ )}(h``rc_range_params`` Parameters for each of the RC ranges defined in :c:type:`struct drm_dsc_rc_range_parameters ` h](j` )}(h``rc_range_params``h]jf )}(hjh]hrc_range_params}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(hzParameters for each of the RC ranges defined in :c:type:`struct drm_dsc_rc_range_parameters `h](h0Parameters for each of the RC ranges defined in }(hjhhhNhNubh)}(hJ:c:type:`struct drm_dsc_rc_range_parameters `h]jf )}(hjh]h"struct drm_dsc_rc_range_parameters}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_rc_range_parametersuh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubeh}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h)``rc_model_size`` Total size of RC model h](j` )}(h``rc_model_size``h]jf )}(hjh]h rc_model_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(hTotal size of RC modelh]hTotal size of RC model}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hB``flatness_min_qp`` Minimum QP where flatness information is sent h](j` )}(h``flatness_min_qp``h]jf )}(hj$h]hflatness_min_qp}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h-Minimum QP where flatness information is senth]h-Minimum QP where flatness information is sent}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hKhj:ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj9hKhjubjZ )}(hB``flatness_max_qp`` Maximum QP where flatness information is sent h](j` )}(h``flatness_max_qp``h]jf )}(hj]h]hflatness_max_qp}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj[ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjWubj| )}(hhh]h)}(h-Maximum QP where flatness information is senth]h-Maximum QP where flatness information is sent}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhKhjsubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjrhKhjubjZ )}(h;``initial_scale_value`` Initial value for the scale factor h](j` )}(h``initial_scale_value``h]jf )}(hjh]hinitial_scale_value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h"Initial value for the scale factorh]h"Initial value for the scale factor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h|``scale_decrement_interval`` Specifies number of group times between decrementing the scale factor at beginning of a slice. h](j` )}(h``scale_decrement_interval``h]jf )}(hjh]hscale_decrement_interval}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h^Specifies number of group times between decrementing the scale factor at beginning of a slice.h]h^Specifies number of group times between decrementing the scale factor at beginning of a slice.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h``scale_increment_interval`` Number of group times between incrementing the scale factor value used at the beginning of a slice. h](j` )}(h``scale_increment_interval``h]jf )}(hj h]hscale_increment_interval}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(hcNumber of group times between incrementing the scale factor value used at the beginning of a slice.h]hcNumber of group times between incrementing the scale factor value used at the beginning of a slice.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h8``nfl_bpg_offset`` Non first line BPG offset to be used h](j` )}(h``nfl_bpg_offset``h]jf )}(hjCh]hnfl_bpg_offset}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhj=ubj| )}(hhh]h)}(h$Non first line BPG offset to be usedh]h$Non first line BPG offset to be used}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhKhjYubah}(h]h ]h"]h$]h&]uh1j{ hj=ubeh}(h]h ]h"]h$]h&]uh1jY hjXhKhjubjZ )}(h:``slice_bpg_offset`` BPG offset used to enforce slice bit h](j` )}(h``slice_bpg_offset``h]jf )}(hj|h]hslice_bpg_offset}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjvubj| )}(hhh]h)}(h$BPG offset used to enforce slice bith]h$BPG offset used to enforce slice bit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h=``final_offset`` Final RC linear transformation offset value h](j` )}(h``final_offset``h]jf )}(hjh]h final_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h+Final RC linear transformation offset valueh]h+Final RC linear transformation offset value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h>``vbr_enable`` True if VBR mode is enabled, false if disabled h](j` )}(h``vbr_enable``h]jf )}(hjh]h vbr_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h.True if VBR mode is enabled, false if disabledh]h.True if VBR mode is enabled, false if disabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h7``mux_word_size`` Mux word size (in bits) for SSM mode h](j` )}(h``mux_word_size``h]jf )}(hj'h]h mux_word_size}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhj!ubj| )}(hhh]h)}(h$Mux word size (in bits) for SSM modeh]h$Mux word size (in bits) for SSM mode}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hKhj=ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj<hKhjubjZ )}(hb``slice_chunk_size`` The (max) size in bytes of the "chunks" that are used in slice multiplexing. h](j` )}(h``slice_chunk_size``h]jf )}(hj`h]hslice_chunk_size}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjZubj| )}(hhh]h)}(hLThe (max) size in bytes of the "chunks" that are used in slice multiplexing.h]hPThe (max) size in bytes of the “chunks” that are used in slice multiplexing.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjvubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjuhKhjubjZ )}(h-``rc_bits`` Rate control buffer size in bits h](j` )}(h ``rc_bits``h]jf )}(hjh]hrc_bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(h Rate control buffer size in bitsh]h Rate control buffer size in bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h(``dsc_version_minor`` DSC minor version h](j` )}(h``dsc_version_minor``h]jf )}(hjh]hdsc_version_minor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(hDSC minor versionh]hDSC minor version}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h(``dsc_version_major`` DSC major version h](j` )}(h``dsc_version_major``h]jf )}(hj h]hdsc_version_major}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjubj| )}(hhh]h)}(hDSC major versionh]hDSC major version}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj"ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj!hKhjubjZ )}(h:``native_422`` True if Native 4:2:2 supported, else false h](j` )}(h``native_422``h]jf )}(hjEh]h native_422}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhj?ubj| )}(hhh]h)}(h*True if Native 4:2:2 supported, else falseh]h*True if Native 4:2:2 supported, else false}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhKhj[ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hjZhKhjubjZ )}(h:``native_420`` True if Native 4:2:0 supported else false. h](j` )}(h``native_420``h]jf )}(hj~h]h native_420}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKhjxubj| )}(hhh]h)}(h*True if Native 4:2:0 supported else false.h]h*True if Native 4:2:0 supported else false.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjxubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hZ``second_line_bpg_offset`` Additional bits/grp for seconnd line of slice for native 4:2:0 h](j` )}(h``second_line_bpg_offset``h]jf )}(hjh]hsecond_line_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(h>Additional bits/grp for seconnd line of slice for native 4:2:0h]h>Additional bits/grp for seconnd line of slice for native 4:2:0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h\``nsl_bpg_offset`` Num of bits deallocated for each grp that is not in second line of slice h](j` )}(h``nsl_bpg_offset``h]jf )}(hjh]hnsl_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(hHNum of bits deallocated for each grp that is not in second line of sliceh]hHNum of bits deallocated for each grp that is not in second line of slice}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hQ``second_line_offset_adj`` Offset adjustment for second line in Native 4:2:0 modeh](j` )}(h``second_line_offset_adj``h]jf )}(hj*h]hsecond_line_offset_adj}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM hj$ubj| )}(hhh]h)}(h6Offset adjustment for second line in Native 4:2:0 modeh]h6Offset adjustment for second line in Native 4:2:0 mode}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM hj@ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj?hM hjubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhjhNubh)}(h**Description**h]j )}(hjmh]h Description}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjGhhubh)}(h{Driver populates this structure with all the parameters required to configure the display stream compression on the source.h]h{Driver populates this structure with all the parameters required to configure the display stream compression on the source.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKDhjGhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dsc_picture_parameter_set (C struct)c.drm_dsc_picture_parameter_sethNtauh1jd hjGhhhjhNubjw )}(hhh](j| )}(hdrm_dsc_picture_parameter_seth]j )}(h$struct drm_dsc_picture_parameter_seth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhKJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKJubj )}(hdrm_dsc_picture_parameter_seth]j )}(hjh]hdrm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKJubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKJubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKJhjhhubj )}(hhh]h)}(h-Represents 128 bytes of Picture Parameter Seth]h-Represents 128 bytes of Picture Parameter Set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKJubeh}(h]h ](j structeh"]h$]h&]j j j jj jj j j uh1jv hhhjGhjhNubj )}(hXk**Definition**:: struct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; }; **Members** ``dsc_version`` PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC ``pps_identifier`` PPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables. ``pps_reserved`` PPS2[7:0]- RESERVED Byte ``pps_3`` PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2) ``pps_4`` PPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits ``bits_per_pixel_low`` PPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element. ``pic_height`` PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster. ``pic_width`` PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster. ``slice_height`` PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. ``slice_width`` PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. ``chunk_size`` PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing. ``initial_xmit_delay_high`` PPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved ``initial_xmit_delay_low`` PPS17[7:0] - Least significant 8 bits of initial transmission delay. ``initial_dec_delay`` PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. ``pps20_reserved`` PPS20[7:0] - Reserved ``initial_scale_value`` PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved ``scale_increment_interval`` PPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice. ``scale_decrement_interval_high`` PPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved ``scale_decrement_interval_low`` PPS25[7:0] - Lower 8 bits of scale decrement interval ``pps26_reserved`` PPS26[7:0] ``first_line_bpg_offset`` PPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved ``nfl_bpg_offset`` PPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice. ``slice_bpg_offset`` PPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint. ``initial_offset`` PPS32,33[7:0] - Initial value for rcXformOffset ``final_offset`` PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset ``flatness_min_qp`` PPS36[4:0] - Minimum QP at which flatness is signaled and flatness QP adjustment is made. PPS36[7:5] - Reserved ``flatness_max_qp`` PPS37[4:0] - Max QP at which flatness is signalled and the flatness adjustment is made. PPS37[7:5] - Reserved ``rc_model_size`` PPS38,39[7:0] - Number of bits within RC Model. ``rc_edge_factor`` PPS40[3:0] - Ratio of current activity vs, previous activity to determine presence of edge. PPS40[7:4] - Reserved ``rc_quant_incr_limit0`` PPS41[4:0] - QP threshold used in short term RC PPS41[7:5] - Reserved ``rc_quant_incr_limit1`` PPS42[4:0] - QP threshold used in short term RC PPS42[7:5] - Reserved ``rc_tgt_offset`` PPS43[3:0] - Lower end of the variability range around the target bits per group that is allowed by short term RC. PPS43[7:4]- Upper end of the variability range around the target bits per group that i allowed by short term rc. ``rc_buf_thresh`` PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for the 15 ranges defined by 14 thresholds. ``rc_range_parameters`` PPS58[7:0] - PPS87[7:0] Parameters that correspond to each of the 15 ranges. ``native_422_420`` PPS88[0] - 0 = Native 4:2:2 not used 1 = Native 4:2:2 used PPS88[1] - 0 = Native 4:2:0 not use 1 = Native 4:2:0 used PPS88[7:2] - Reserved 6 bits ``second_line_bpg_offset`` PPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reserved ``nsl_bpg_offset`` PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice. ``second_line_offset_adj`` PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode. ``pps_long_94_reserved`` PPS 94, 95, 96, 97 - Reserved ``pps_long_98_reserved`` PPS 98, 99, 100, 101 - Reserved ``pps_long_102_reserved`` PPS 102, 103, 104, 105 - Reserved ``pps_long_106_reserved`` PPS 106, 107, 108, 109 - reserved ``pps_long_110_reserved`` PPS 110, 111, 112, 113 - reserved ``pps_long_114_reserved`` PPS 114 - 117 - reserved ``pps_long_118_reserved`` PPS 118 - 121 - reserved ``pps_long_122_reserved`` PPS 122- 125 - reserved ``pps_short_126_reserved`` PPS 126, 127 - reservedh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj ubj, )}(hXVstruct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; };h]hXVstruct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; };}hj*sbah}(h]h ]h"]h$]h&]j j uh1j+ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj ubh)}(h **Members**h]j )}(hj;h]hMembers}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMIhj ubjU )}(hhh](jZ )}(h``dsc_version`` PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC h](j` )}(h``dsc_version``h]jf )}(hjZh]h dsc_version}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjTubj| )}(hhh]h)}(hyPPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSCh]hyPPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjTubeh}(h]h ]h"]h$]h&]uh1jY hjohMhjQubjZ )}(h``pps_identifier`` PPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables. h](j` )}(h``pps_identifier``h]jf )}(hjh]hpps_identifier}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM%hjubj| )}(hhh]h)}(hkPPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables.h]hkPPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM$hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM%hjQubjZ )}(h*``pps_reserved`` PPS2[7:0]- RESERVED Byte h](j` )}(h``pps_reserved``h]jf )}(hjh]h pps_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM*hjubj| )}(hhh]h)}(hPPS2[7:0]- RESERVED Byteh]hPPS2[7:0]- RESERVED Byte}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM*hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM*hjQubjZ )}(hX``pps_3`` PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2) h](j` )}(h ``pps_3``h]jf )}(hjh]hpps_3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM7hjubj| )}(hhh]h)}(hXPPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2)h]hXPPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM/hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM7hjQubjZ )}(hX``pps_4`` PPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits h](j` )}(h ``pps_4``h]jf )}(hjAh]hpps_4}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMEhj;ubj| )}(hhh]h)}(hXPPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bitsh]hXPPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM<hjWubah}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hjVhMEhjQubjZ )}(h``bits_per_pixel_low`` PPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element. h](j` )}(h``bits_per_pixel_low``h]jf )}(hj{h]hbits_per_pixel_low}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMKhjuubj| )}(hhh]h)}(hjPPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element.h]hjPPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMJhjubah}(h]h ]h"]h$]h&]uh1j{ hjuubeh}(h]h ]h"]h$]h&]uh1jY hjhMKhjQubjZ )}(hg``pic_height`` PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster. h](j` )}(h``pic_height``h]jf )}(hjh]h pic_height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMQhjubj| )}(hhh]h)}(hWPPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster.h]hWPPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMPhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMQhjQubjZ )}(h[``pic_width`` PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster. h](j` )}(h ``pic_width``h]jf )}(hjh]h pic_width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMWhjubj| )}(hhh]h)}(hLPPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster.h]hLPPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMVhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMWhjQubjZ )}(hK``slice_height`` PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. h](j` )}(h``slice_height``h]jf )}(hj)h]h slice_height}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM\hj#ubj| )}(hhh]h)}(h9PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.h]h9PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hM\hj?ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj>hM\hjQubjZ )}(hI``slice_width`` PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. h](j` )}(h``slice_width``h]jf )}(hjbh]h slice_width}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMahj\ubj| )}(hhh]h)}(h8PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.h]h8PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMahjxubah}(h]h ]h"]h$]h&]uh1j{ hj\ubeh}(h]h ]h"]h$]h&]uh1jY hjwhMahjQubjZ )}(hs``chunk_size`` PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing. h](j` )}(h``chunk_size``h]jf )}(hjh]h chunk_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMghjubj| )}(hhh]h)}(hcPPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing.h]hcPPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMfhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMghjQubjZ )}(h``initial_xmit_delay_high`` PPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved h](j` )}(h``initial_xmit_delay_high``h]jf )}(hjh]hinitial_xmit_delay_high}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMohjubj| )}(hhh]h)}(hPPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reservedh]hPPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMlhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMohjQubjZ )}(h```initial_xmit_delay_low`` PPS17[7:0] - Least significant 8 bits of initial transmission delay. h](j` )}(h``initial_xmit_delay_low``h]jf )}(hjh]hinitial_xmit_delay_low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMthj ubj| )}(hhh]h)}(hDPPS17[7:0] - Least significant 8 bits of initial transmission delay.h]hDPPS17[7:0] - Least significant 8 bits of initial transmission delay.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMthj%ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj$hMthjQubjZ )}(h``initial_dec_delay`` PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. h](j` )}(h``initial_dec_delay``h]jf )}(hjHh]hinitial_dec_delay}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjFubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM{hjBubj| )}(hhh]h)}(hPPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.h]hPPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMyhj^ubah}(h]h ]h"]h$]h&]uh1j{ hjBubeh}(h]h ]h"]h$]h&]uh1jY hj]hM{hjQubjZ )}(h)``pps20_reserved`` PPS20[7:0] - Reserved h](j` )}(h``pps20_reserved``h]jf )}(hjh]hpps20_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj|ubj| )}(hhh]h)}(hPPS20[7:0] - Reservedh]hPPS20[7:0] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj|ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjQubjZ )}(hu``initial_scale_value`` PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved h](j` )}(h``initial_scale_value``h]jf )}(hjh]hinitial_scale_value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(h\PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reservedh]h\PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjQubjZ )}(h``scale_increment_interval`` PPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice. h](j` )}(h``scale_increment_interval``h]jf )}(hjh]hscale_increment_interval}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(hnPPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice.h]hnPPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjQubjZ )}(h``scale_decrement_interval_high`` PPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved h](j` )}(h!``scale_decrement_interval_high``h]jf )}(hj/h]hscale_decrement_interval_high}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj)ubj| )}(hhh]h)}(hPPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reservedh]hPPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjEubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hjDhMhjQubjZ )}(hW``scale_decrement_interval_low`` PPS25[7:0] - Lower 8 bits of scale decrement interval h](j` )}(h ``scale_decrement_interval_low``h]jf )}(hjih]hscale_decrement_interval_low}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjcubj| )}(hhh]h)}(h5PPS25[7:0] - Lower 8 bits of scale decrement intervalh]h5PPS25[7:0] - Lower 8 bits of scale decrement interval}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhjubah}(h]h ]h"]h$]h&]uh1j{ hjcubeh}(h]h ]h"]h$]h&]uh1jY hj~hMhjQubjZ )}(h``pps26_reserved`` PPS26[7:0] h](j` )}(h``pps26_reserved``h]jf )}(hjh]hpps26_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(h PPS26[7:0]h]h PPS26[7:0]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjQubjZ )}(h``first_line_bpg_offset`` PPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved h](j` )}(h``first_line_bpg_offset``h]jf )}(hjh]hfirst_line_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(hxPPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reservedh]hxPPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjQubjZ )}(h``nfl_bpg_offset`` PPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice. h](j` )}(h``nfl_bpg_offset``h]jf )}(hjh]hnfl_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(hPPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice.h]hPPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj+ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj*hMhjQubjZ )}(h}``slice_bpg_offset`` PPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint. h](j` )}(h``slice_bpg_offset``h]jf )}(hjOh]hslice_bpg_offset}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjIubj| )}(hhh]h)}(hgPPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint.h]hgPPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjeubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjdhMhjQubjZ )}(hC``initial_offset`` PPS32,33[7:0] - Initial value for rcXformOffset h](j` )}(h``initial_offset``h]jf )}(hjh]hinitial_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(h/PPS32,33[7:0] - Initial value for rcXformOffseth]h/PPS32,33[7:0] - Initial value for rcXformOffset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjQubjZ )}(hN``final_offset`` PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset h](j` )}(h``final_offset``h]jf )}(hjh]h final_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(hh]hsecond_line_bpg_offset}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj8ubj| )}(hhh]h)}(hPPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reservedh]hPPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reserved}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjTubah}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hjShMhjQubjZ )}(h``nsl_bpg_offset`` PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice. h](j` )}(h``nsl_bpg_offset``h]jf )}(hjxh]hnsl_bpg_offset}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjrubj| )}(hhh]h)}(hvPPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice.h]hvPPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjQubjZ )}(hx``second_line_offset_adj`` PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode. h](j` )}(h``second_line_offset_adj``h]jf )}(hjh]hsecond_line_offset_adj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(h\PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode.h]h\PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjQubjZ )}(h7``pps_long_94_reserved`` PPS 94, 95, 96, 97 - Reserved h](j` )}(h``pps_long_94_reserved``h]jf )}(hjh]hpps_long_94_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjubj| )}(hhh]h)}(hPPS 94, 95, 96, 97 - Reservedh]hPPS 94, 95, 96, 97 - Reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjQubjZ )}(h9``pps_long_98_reserved`` PPS 98, 99, 100, 101 - Reserved h](j` )}(h``pps_long_98_reserved``h]jf )}(hj% h]hpps_long_98_reserved}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj# ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhj ubj| )}(hhh]h)}(hPPS 98, 99, 100, 101 - Reservedh]hPPS 98, 99, 100, 101 - Reserved}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj: hMhj; ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj: hMhjQubjZ )}(h<``pps_long_102_reserved`` PPS 102, 103, 104, 105 - Reserved h](j` )}(h``pps_long_102_reserved``h]jf )}(hj^ h]hpps_long_102_reserved}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM#hjX ubj| )}(hhh]h)}(h!PPS 102, 103, 104, 105 - Reservedh]h!PPS 102, 103, 104, 105 - Reserved}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjs hM#hjt ubah}(h]h ]h"]h$]h&]uh1j{ hjX ubeh}(h]h ]h"]h$]h&]uh1jY hjs hM#hjQubjZ )}(h<``pps_long_106_reserved`` PPS 106, 107, 108, 109 - reserved h](j` )}(h``pps_long_106_reserved``h]jf )}(hj h]hpps_long_106_reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM(hj ubj| )}(hhh]h)}(h!PPS 106, 107, 108, 109 - reservedh]h!PPS 106, 107, 108, 109 - reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM(hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hM(hjQubjZ )}(h<``pps_long_110_reserved`` PPS 110, 111, 112, 113 - reserved h](j` )}(h``pps_long_110_reserved``h]jf )}(hj h]hpps_long_110_reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM-hj ubj| )}(hhh]h)}(h!PPS 110, 111, 112, 113 - reservedh]h!PPS 110, 111, 112, 113 - reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM-hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hM-hjQubjZ )}(h3``pps_long_114_reserved`` PPS 114 - 117 - reserved h](j` )}(h``pps_long_114_reserved``h]jf )}(hj h]hpps_long_114_reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM2hj ubj| )}(hhh]h)}(hPPS 114 - 117 - reservedh]hPPS 114 - 117 - reserved}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM2hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hM2hjQubjZ )}(h3``pps_long_118_reserved`` PPS 118 - 121 - reserved h](j` )}(h``pps_long_118_reserved``h]jf )}(hjB h]hpps_long_118_reserved}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM7hj< ubj| )}(hhh]h)}(hPPS 118 - 121 - reservedh]hPPS 118 - 121 - reserved}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjW hM7hjX ubah}(h]h ]h"]h$]h&]uh1j{ hj< ubeh}(h]h ]h"]h$]h&]uh1jY hjW hM7hjQubjZ )}(h2``pps_long_122_reserved`` PPS 122- 125 - reserved h](j` )}(h``pps_long_122_reserved``h]jf )}(hj{ h]hpps_long_122_reserved}(hj} hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjy ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM<hju ubj| )}(hhh]h)}(hPPS 122- 125 - reservedh]hPPS 122- 125 - reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM<hj ubah}(h]h ]h"]h$]h&]uh1j{ hju ubeh}(h]h ]h"]h$]h&]uh1jY hj hM<hjQubjZ )}(h2``pps_short_126_reserved`` PPS 126, 127 - reservedh](j` )}(h``pps_short_126_reserved``h]jf )}(hj h]hpps_short_126_reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhM@hj ubj| )}(hhh]h)}(hPPS 126, 127 - reservedh]hPPS 126, 127 - reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMAhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hM@hjQubeh}(h]h ]h"]h$]h&]uh1jT hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhjhNubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMDhjGhhubh)}(hXlThe VESA DSC standard defines picture parameter set (PPS) which display stream compression encoders must communicate to decoders. The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. The PPS fields that span over more than a byte should be stored in Big Endian format.h]hXlThe VESA DSC standard defines picture parameter set (PPS) which display stream compression encoders must communicate to decoders. The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. The PPS fields that span over more than a byte should be stored in Big Endian format.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMhjGhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dsc_pps_infoframe (C struct)c.drm_dsc_pps_infoframehNtauh1jd hjGhhhjhNubjw )}(hhh](j| )}(hdrm_dsc_pps_infoframeh]j )}(hstruct drm_dsc_pps_infoframeh](j )}(hj h]hstruct}(hj5 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1 hhhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMubj )}(h h]h }(hjC hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1 hhhjB hMubj )}(hdrm_dsc_pps_infoframeh]j )}(hj/ h]hdrm_dsc_pps_infoframe}(hjU hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQ ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj1 hhhjB hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj- hhhjB hMubah}(h]j( ah ](j j eh"]h$]h&]j j )j huh1j{ hjB hMhj* hhubj )}(hhh]h)}(h9DSC infoframe carrying the Picture Parameter Set Metadatah]h9DSC infoframe carrying the Picture Parameter Set Metadata}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMGhjt hhubah}(h]h ]h"]h$]h&]uh1j hj* hhhjB hMubeh}(h]h ](j structeh"]h$]h&]j j j j j j j j j uh1jv hhhjGhjhNubj )}(hX**Definition**:: struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; }; **Members** ``pps_header`` Header for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header ` ``pps_payload`` PPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMKhj ubj, )}(h|struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; };h]h|struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; };}hj sbah}(h]h ]h"]h$]h&]j j uh1j+ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMMhj ubh)}(h **Members**h]j )}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMRhj ubjU )}(hhh](jZ )}(hq``pps_header`` Header for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header ` h](j` )}(h``pps_header``h]jf )}(hj h]h pps_header}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMRhj ubj| )}(hhh]h)}(haHeader for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header `h](h3Header for PPS as per DP SDP header format of type }(hj hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jf )}(hj h]hstruct dp_sdp_header}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMQhj ubeh}(h]h ]h"]h$]h&]uh1hhj$ hMQhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMRhj ubjZ )}(h``pps_payload`` PPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](j` )}(h``pps_payload``h]jf )}(hj= h]h pps_payload}(hj? hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj; ubah}(h]h ]h"]h$]h&]uh1j_ hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMShj7 ubj| )}(hhh]h)}(hPPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](hHPPS payload fields as per DSC specification Table 4-1 as represented in }(hjV hhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]jf )}(hj` h]h$struct drm_dsc_picture_parameter_set}(hjb hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj^ ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_picture_parameter_setuh1hhjR hMShjV ubeh}(h]h ]h"]h$]h&]uh1hhjR hMShjS ubah}(h]h ]h"]h$]h&]uh1j{ hj7 ubeh}(h]h ]h"]h$]h&]uh1jY hjR hMShj ubeh}(h]h ]h"]h$]h&]uh1jT hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhjhNubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMWhjGhhubh)}(hXThis structure represents the DSC PPS infoframe required to send the Picture Parameter Set metadata required before enabling VESA Display Stream Compression. This is based on the DP Secondary Data Packet structure and comprises of SDP Header as defined :c:type:`struct dp_sdp_header ` in drm_dp_helper.h and PPS payload defined in :c:type:`struct drm_dsc_picture_parameter_set `.h](hThis structure represents the DSC PPS infoframe required to send the Picture Parameter Set metadata required before enabling VESA Display Stream Compression. This is based on the DP Secondary Data Packet structure and comprises of SDP Header as defined }(hj hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jf )}(hj h]hstruct dp_sdp_header}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:359: ./include/drm/display/drm_dsc.hhMHhj ubh/ in drm_dp_helper.h and PPS payload defined in }(hj hhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]jf )}(hj h]h$struct drm_dsc_picture_parameter_set}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_picture_parameter_setuh1hhj hMHhj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMHhjGhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_dsc_dp_pps_header_init (C function)c.drm_dsc_dp_pps_header_inithNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(hBvoid drm_dsc_dp_pps_header_init (struct dp_sdp_header *pps_header)h]j )}(hAvoid drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header)h](j)}(hvoidh]hvoid}(hj" hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK$ubj )}(h h]h }(hj1 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj0 hK$ubj )}(hdrm_dsc_dp_pps_header_inith]j )}(hdrm_dsc_dp_pps_header_inith]hdrm_dsc_dp_pps_header_init}(hjC hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj? ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj0 hK$ubj)}(h"(struct dp_sdp_header *pps_header)h]j)}(h struct dp_sdp_header *pps_headerh](j )}(hj h]hstruct}(hj_ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ ubj )}(h h]h }(hjl hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ ubh)}(hhh]j )}(h dp_sdp_headerh]h dp_sdp_header}(hj} hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjE sbc.drm_dsc_dp_pps_header_initasbuh1hhj[ ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ ubj )}(h pps_headerh]h pps_header}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjW ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj0 hK$ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj0 hK$ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj0 hK$hj hhubj )}(hhh]h)}(hBInitializes the PPS Header for DisplayPort as per the DP 1.4 spec.h]hBInitializes the PPS Header for DisplayPort as per the DP 1.4 spec.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK$hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj0 hK$ubeh}(h]h ](j functioneh"]h$]h&]j j j j j j j j j uh1jv hhhjGhNhNubj )}(hX**Parameters** ``struct dp_sdp_header *pps_header`` Secondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header ` **Description** DP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in :c:type:`struct dp_sdp_header `.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK(hj ubjU )}(hhh]jZ )}(h``struct dp_sdp_header *pps_header`` Secondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header ` h](j` )}(h$``struct dp_sdp_header *pps_header``h]jf )}(hj#h]h struct dp_sdp_header *pps_header}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK'hjubj| )}(hhh]h)}(hwSecondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header `h](hISecondary data packet header for DSC Picture Parameter Set as defined in }(hj<hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jf )}(hjFh]hstruct dp_sdp_header}(hjHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK&hj<ubeh}(h]h ]h"]h$]h&]uh1hhjchK&hj9ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj8hK'hjubah}(h]h ]h"]h$]h&]uh1jT hj ubh)}(h**Description**h]j )}(hj~h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK)hj ubh)}(hDP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in :c:type:`struct dp_sdp_header `.h](hDP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in }(hjhhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jf )}(hjh]hstruct dp_sdp_header}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK(hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK(hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dsc_dp_rc_buffer_size (C function)c.drm_dsc_dp_rc_buffer_sizehNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(hJint drm_dsc_dp_rc_buffer_size (u8 rc_buffer_block_size, u8 rc_buffer_size)h]j )}(hIint drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8 rc_buffer_size)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK8ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK8ubj )}(hdrm_dsc_dp_rc_buffer_sizeh]j )}(hdrm_dsc_dp_rc_buffer_sizeh]hdrm_dsc_dp_rc_buffer_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK8ubj)}(h,(u8 rc_buffer_block_size, u8 rc_buffer_size)h](j)}(hu8 rc_buffer_block_sizeh](h)}(hhh]j )}(hu8h]hu8}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j)}jj sbc.drm_dsc_dp_rc_buffer_sizeasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hrc_buffer_block_sizeh]hrc_buffer_block_size}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 rc_buffer_sizeh](h)}(hhh]j )}(hu8h]hu8}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]jBc.drm_dsc_dp_rc_buffer_sizeasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(hrc_buffer_sizeh]hrc_buffer_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK8ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK8ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK8hjhhubj )}(hhh]h)}(hget rc buffer size in bytesh]hget rc buffer size in bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK8hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK8ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjGhNhNubj )}(h**Parameters** ``u8 rc_buffer_block_size`` block size code, according to DPCD offset 62h ``u8 rc_buffer_size`` number of blocks - 1, according to DPCD offset 63h **Return** buffer size in bytes, or 0 on invalid inputh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chKubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK:hj:ubj| )}(hhh]h)}(h2number of blocks - 1, according to DPCD offset 63hh]h2number of blocks - 1, according to DPCD offset 63h}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhK:hjVubah}(h]h ]h"]h$]h&]uh1j{ hj:ubeh}(h]h ]h"]h$]h&]uh1jY hjUhK:hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hj{h]hReturn}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK` ``const struct drm_dsc_config *dsc_cfg`` DSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config ` **Description** DSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.h](h)}(h**Parameters**h]j )}(hj-h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chKWhj'ubjU )}(hhh](jZ )}(h``struct drm_dsc_picture_parameter_set *pps_payload`` Bitwise struct for DSC Picture Parameter Set. This is defined by :c:type:`struct drm_dsc_picture_parameter_set ` h](j` )}(h5``struct drm_dsc_picture_parameter_set *pps_payload``h]jf )}(hjLh]h1struct drm_dsc_picture_parameter_set *pps_payload}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chKVhjFubj| )}(hhh]h)}(hBitwise struct for DSC Picture Parameter Set. This is defined by :c:type:`struct drm_dsc_picture_parameter_set `h](hABitwise struct for DSC Picture Parameter Set. This is defined by }(hjehhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]jf )}(hjoh]h$struct drm_dsc_picture_parameter_set}(hjqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_picture_parameter_setuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chKUhjeubeh}(h]h ]h"]h$]h&]uh1hhjhKUhjbubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahKVhjCubjZ )}(h``const struct drm_dsc_config *dsc_cfg`` DSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config ` h](j` )}(h(``const struct drm_dsc_config *dsc_cfg``h]jf )}(hjh]h$const struct drm_dsc_config *dsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chKYhjubj| )}(hhh]h)}(hfDSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config `h](h6DSC Configuration data filled by driver as defined by }(hjhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jf )}(hjh]hstruct drm_dsc_config}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chKXhjubeh}(h]h ]h"]h$]h&]uh1hhjhKXhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKYhjCubeh}(h]h ]h"]h$]h&]uh1jT hj'ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK[hj'ubh)}(hXwDSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.h]hXwDSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chK[hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_dsc_set_const_params (C function)c.drm_dsc_set_const_paramshNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(h?void drm_dsc_set_const_params (struct drm_dsc_config *vdsc_cfg)h]j )}(h>void drm_dsc_set_const_params(struct drm_dsc_config *vdsc_cfg)h](j)}(hvoidh]hvoid}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAhhhjShMubj )}(hdrm_dsc_set_const_paramsh]j )}(hdrm_dsc_set_const_paramsh]hdrm_dsc_set_const_params}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ](j j eh"]h$]h&]j j uh1j hjAhhhjShMubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjhsbc.drm_dsc_set_const_paramsasbuh1hhj~ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj~ubj )}(hvdsc_cfgh]hvdsc_cfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubah}(h]h ]h"]h$]h&]j j uh1jhjAhhhjShMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj=hhhjShMubah}(h]j8ah ](j j eh"]h$]h&]j j )j huh1j{ hjShMhj:hhubj )}(hhh]h)}(hGSet DSC parameters considered typically constant across operation modesh]hGSet DSC parameters considered typically constant across operation modes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj:hhhjShMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjGhNhNubj )}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j )}(hj'h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj!ubjU )}(hhh]jZ )}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](j` )}(h#``struct drm_dsc_config *vdsc_cfg``h]jf )}(hjFh]hstruct drm_dsc_config *vdsc_cfg}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj@ubj| )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj[hMhj=ubah}(h]h ]h"]h$]h&]uh1jT hj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_dsc_set_rc_buf_thresh (C function)c.drm_dsc_set_rc_buf_threshhNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(h@void drm_dsc_set_rc_buf_thresh (struct drm_dsc_config *vdsc_cfg)h]j )}(h?void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chM0ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM0ubj )}(hdrm_dsc_set_rc_buf_threshh]j )}(hdrm_dsc_set_rc_buf_threshh]hdrm_dsc_set_rc_buf_thresh}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM0ubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dsc_set_rc_buf_threshasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hvdsc_cfgh]hvdsc_cfg}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM0ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM0ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM0hjhhubj )}(hhh]h)}(hMSet thresholds for the RC model in accordance with the DSC 1.2 specification.h]hMSet thresholds for the RC model in accordance with the DSC 1.2 specification.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chM0hj]hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM0ubeh}(h]h ](j functioneh"]h$]h&]j j j jxj jxj j j uh1jv hhhjGhNhNubj )}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chM4hj|ubjU )}(hhh]jZ )}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](j` )}(h#``struct drm_dsc_config *vdsc_cfg``h]jf )}(hjh]hstruct drm_dsc_config *vdsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chM6hjubj| )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chM3hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM6hjubah}(h]h ]h"]h$]h&]uh1jT hj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_dsc_setup_rc_params (C function)c.drm_dsc_setup_rc_paramshNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(h\int drm_dsc_setup_rc_params (struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h]j )}(h[int drm_dsc_setup_rc_params(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_dsc_setup_rc_paramsh]j )}(hdrm_dsc_setup_rc_paramsh]hdrm_dsc_setup_rc_params}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h@(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h](j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjXmodnameN classnameNj j )}j ]j)}jjsbc.drm_dsc_setup_rc_paramsasbuh1hhj4ubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj4ubj )}(hvdsc_cfgh]hvdsc_cfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj0ubj)}(henum drm_dsc_params_type typeh](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_params_typeh]hdrm_dsc_params_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jrc.drm_dsc_setup_rc_paramsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(htypeh]htype}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj0ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(hSet parameters and limits for RC model in accordance with the DSC 1.1 or 1.2 specification and DSC C Model Required bits_per_pixel and bits_per_component to be set before calling this function.Jh]hSet parameters and limits for RC model in accordance with the DSC 1.1 or 1.2 specification and DSC C Model Required bits_per_pixel and bits_per_component to be set before calling this function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j j6j j6j j j uh1jv hhhjGhNhNubj )}(h**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driver ``enum drm_dsc_params_type type`` operating mode and standard to follow **Return** 0 or -error code in case of an errorh](h)}(h**Parameters**h]j )}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj:ubjU )}(hhh](jZ )}(hV``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driver h](j` )}(h#``struct drm_dsc_config *vdsc_cfg``h]jf )}(hj_h]hstruct drm_dsc_config *vdsc_cfg}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjYubj| )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjthMhjVubjZ )}(hH``enum drm_dsc_params_type type`` operating mode and standard to follow h](j` )}(h!``enum drm_dsc_params_type type``h]jf )}(hjh]henum drm_dsc_params_type type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubj| )}(hhh]h)}(h%operating mode and standard to followh]h%operating mode and standard to follow}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjVubeh}(h]h ]h"]h$]h&]uh1jT hj:ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj:ubh)}(h$0 or -error code in case of an errorh]h$0 or -error code in case of an error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_dsc_compute_rc_parameters (C function)c.drm_dsc_compute_rc_parametershNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(hCint drm_dsc_compute_rc_parameters (struct drm_dsc_config *vdsc_cfg)h]j )}(hBint drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj&hMubj )}(hdrm_dsc_compute_rc_parametersh]j )}(hdrm_dsc_compute_rc_parametersh]hdrm_dsc_compute_rc_parameters}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj&hMubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]j)}jj;sbc.drm_dsc_compute_rc_parametersasbuh1hhjQubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjQubj )}(hvdsc_cfgh]hvdsc_cfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjMubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj&hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj&hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj&hMhj hhubj )}(hhh]h)}(hWrite rate control parameters to the dsc configuration defined in :c:type:`struct drm_dsc_config ` in accordance with the DSC 1.2 specification. Some configuration fields must be present beforehand.h](hBWrite rate control parameters to the dsc configuration defined in }(hjhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jf )}(hjh]hstruct drm_dsc_config}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_dsc_compute_rc_parametersasbj drm_dsc_configuh1hhj0 hK$hjubhd in accordance with the DSC 1.2 specification. Some configuration fields must be present beforehand.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj&hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjGhNhNubj )}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j )}(hj"h]h Parameters}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubjU )}(hhh]jZ )}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](j` )}(h#``struct drm_dsc_config *vdsc_cfg``h]jf )}(hjAh]hstruct drm_dsc_config *vdsc_cfg}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj;ubj| )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjWubah}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hjVhMhj8ubah}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dsc_get_bpp_int (C function)c.drm_dsc_get_bpp_inthNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(h?u32 drm_dsc_get_bpp_int (const struct drm_dsc_config *vdsc_cfg)h]j )}(h>u32 drm_dsc_get_bpp_int(const struct drm_dsc_config *vdsc_cfg)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_dsc_get_bpp_intsbc.drm_dsc_get_bpp_intasbuh1hhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dsc_get_bpp_inth]j )}(hjh]hdrm_dsc_get_bpp_int}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h'(const struct drm_dsc_config *vdsc_cfg)h]j)}(h%const struct drm_dsc_config *vdsc_cfgh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]jc.drm_dsc_get_bpp_intasbuh1hhjubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjRhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hvdsc_cfgh]hvdsc_cfg}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h=Get integer bits per pixel value for the given DRM DSC configh]h=Get integer bits per pixel value for the given DRM DSC config}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjGhNhNubj )}(h{**Parameters** ``const struct drm_dsc_config *vdsc_cfg`` Pointer to DRM DSC config struct **Return** Integer BPP valueh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubjU )}(hhh]jZ )}(hK``const struct drm_dsc_config *vdsc_cfg`` Pointer to DRM DSC config struct h](j` )}(h)``const struct drm_dsc_config *vdsc_cfg``h]jf )}(hjh]h%const struct drm_dsc_config *vdsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubj| )}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubh)}(hInteger BPP valueh]hInteger BPP value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dsc_initial_scale_value (C function)c.drm_dsc_initial_scale_valuehNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(hAu8 drm_dsc_initial_scale_value (const struct drm_dsc_config *dsc)h]j )}(h@u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc)h](h)}(hhh]j )}(hu8h]hu8}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]j)}jdrm_dsc_initial_scale_valuesbc.drm_dsc_initial_scale_valueasbuh1hhjFhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFhhhjnhMubj )}(hdrm_dsc_initial_scale_valueh]j )}(hjkh]hdrm_dsc_initial_scale_value}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjFhhhjnhMubj)}(h"(const struct drm_dsc_config *dsc)h]j)}(h const struct drm_dsc_config *dsch](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jic.drm_dsc_initial_scale_valueasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdsch]hdsc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjFhhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjBhhhjnhMubah}(h]j=ah ](j j eh"]h$]h&]j j )j huh1j{ hjnhMhj?hhubj )}(hhh]h)}(h:Calculate the initial scale value for the given DSC configh]h:Calculate the initial scale value for the given DSC config}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj5hhubah}(h]h ]h"]h$]h&]uh1j hj?hhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j j j jPj jPj j j uh1jv hhhjGhNhNubj )}(h**Parameters** ``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct **Return** Calculated initial scale valueh](h)}(h**Parameters**h]j )}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjTubjU )}(hhh]jZ )}(hF``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct h](j` )}(h$``const struct drm_dsc_config *dsc``h]jf )}(hjyh]h const struct drm_dsc_config *dsc}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjsubj| )}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjsubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjpubah}(h]h ]h"]h$]h&]uh1jT hjTubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjTubh)}(hCalculated initial scale valueh]hCalculated initial scale value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_dsc_flatness_det_thresh (C function)c.drm_dsc_flatness_det_threshhNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(hBu32 drm_dsc_flatness_det_thresh (const struct drm_dsc_config *dsc)h]j )}(hAu32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_dsc_flatness_det_threshsbc.drm_dsc_flatness_det_threshasbuh1hhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dsc_flatness_det_threshh]j )}(hjh]hdrm_dsc_flatness_det_thresh}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h"(const struct drm_dsc_config *dsc)h]j)}(h const struct drm_dsc_config *dsch](j )}(hjAh]hconst}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dsc_flatness_det_threshasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubj )}(hdsch]hdsc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h:Calculate the flatness_det_thresh for the given DSC configh]h:Calculate the flatness_det_thresh for the given DSC config}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjGhNhNubj )}(h**Parameters** ``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct **Return** Calculated flatness det thresh valueh](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubjU )}(hhh]jZ )}(hF``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct h](j` )}(h$``const struct drm_dsc_config *dsc``h]jf )}(hj(h]h const struct drm_dsc_config *dsc}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj"ubj| )}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj"ubeh}(h]h ]h"]h$]h&]uh1jY hj=hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjch]hReturn}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubh)}(h$Calculated flatness det thresh valueh]h$Calculated flatness det thresh value}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_dsc_dump_config (C function)c.drm_dsc_dump_confighNtauh1jd hjGhhhNhNubjw )}(hhh](j| )}(h^void drm_dsc_dump_config (struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h]j )}(h]void drm_dsc_dump_config(struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dsc_dump_configh]j )}(hdrm_dsc_dump_configh]hdrm_dsc_dump_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hE(struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h](j)}(hstruct drm_printer *ph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_printerh]h drm_printer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_dsc_dump_configasbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hj"h]hp}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int indenth](j)}(hinth]hint}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(hindenth]hindent}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_dsc_config *cfgh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dsc_dump_configasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcfgh]hcfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h#Dump the provided DSC configurationh]h#Dump the provided DSC configuration}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj$ hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j? j j? j j j uh1jv hhhjGhNhNubj )}(h**Parameters** ``struct drm_printer *p`` The printer used for output ``int indent`` Tab indentation level (max 5) ``const struct drm_dsc_config *cfg`` DSC configuration to print **Description** Print the provided DSC configuration in **cfg**.h](h)}(h**Parameters**h]j )}(hjI h]h Parameters}(hjK hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjG ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjC ubjU )}(hhh](jZ )}(h6``struct drm_printer *p`` The printer used for output h](j` )}(h``struct drm_printer *p``h]jf )}(hjh h]hstruct drm_printer *p}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjf ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjb ubj| )}(hhh]h)}(hThe printer used for outputh]hThe printer used for output}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj} hMhj~ ubah}(h]h ]h"]h$]h&]uh1j{ hjb ubeh}(h]h ]h"]h$]h&]uh1jY hj} hMhj_ ubjZ )}(h-``int indent`` Tab indentation level (max 5) h](j` )}(h``int indent``h]jf )}(hj h]h int indent}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj ubj| )}(hhh]h)}(hTab indentation level (max 5)h]hTab indentation level (max 5)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj_ ubjZ )}(h@``const struct drm_dsc_config *cfg`` DSC configuration to print h](j` )}(h$``const struct drm_dsc_config *cfg``h]jf )}(hj h]h const struct drm_dsc_config *cfg}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj ubj| )}(hhh]h)}(hDSC configuration to printh]hDSC configuration to print}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMhj_ ubeh}(h]h ]h"]h$]h&]uh1jT hjC ubh)}(h**Description**h]j )}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjC ubh)}(h0Print the provided DSC configuration in **cfg**.h](h(Print the provided DSC configuration in }(hj+!hhhNhNubj )}(h**cfg**h]hcfg}(hj3!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+!ubh.}(hj+!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:362: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjC ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjGhhhNhNubeh}(h]jah ]h"]5display stream compression helper functions referenceah$]h&]uh1hhhhhhhhMbubh)}(hhh](h)}(h)Output Probing Helper Functions Referenceh]h)Output Probing Helper Functions Reference}(hj]!hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjZ!hhhhhMnubh)}(hThis library provides some helper code for output probing. It provides an implementation of the core :c:type:`drm_connector_funcs.fill_modes ` interface with drm_helper_probe_single_connector_modes().h](heThis library provides some helper code for output probing. It provides an implementation of the core }(hjk!hhhNhNubh)}(h>:c:type:`drm_connector_funcs.fill_modes `h]jf )}(hju!h]hdrm_connector_funcs.fill_modes}(hjw!hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjs!ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/drm_probe_helper.chK1hjk!ubh: interface with drm_helper_probe_single_connector_modes().}(hjk!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!hK1hjZ!hhubh)}(hIt also provides support for polling connectors with a work item and for generic hotplug interrupt handling where the driver doesn't or cannot keep track of a per-connector hpd interrupt.h]hIt also provides support for polling connectors with a work item and for generic hotplug interrupt handling where the driver doesn’t or cannot keep track of a per-connector hpd interrupt.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/drm_probe_helper.chK5hjZ!hhubh)}(hThis helper library can be used independently of the modeset helper library. Drivers can also overwrite different parts e.g. use their own hotplug handling code to avoid probing unrelated outputs.h]hThis helper library can be used independently of the modeset helper library. Drivers can also overwrite different parts e.g. use their own hotplug handling code to avoid probing unrelated outputs.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/drm_probe_helper.chK9hjZ!hhubh)}(hThe probe helpers share the function table structures with other display helper libraries. See :c:type:`struct drm_connector_helper_funcs ` for the details.h](h_The probe helpers share the function table structures with other display helper libraries. See }(hj!hhhNhNubh)}(hH:c:type:`struct drm_connector_helper_funcs `h]jf )}(hj!h]h!struct drm_connector_helper_funcs}(hj!hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/drm_probe_helper.chK=hj!ubh for the details.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!hK=hjZ!hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_kms_helper_poll_enable (C function)c.drm_kms_helper_poll_enablehNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h8void drm_kms_helper_poll_enable (struct drm_device *dev)h]j )}(h7void drm_kms_helper_poll_enable(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj"hM ubj )}(hdrm_kms_helper_poll_enableh]j )}(hdrm_kms_helper_poll_enableh]hdrm_kms_helper_poll_enable}(hj'"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhj"hM ubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjC"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?"ubj )}(h h]h }(hjP"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?"ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hja"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjc"modnameN classnameNj j )}j ]j)}jj)"sbc.drm_kms_helper_poll_enableasbuh1hhj?"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?"ubj)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj?"ubj )}(hdevh]hdev}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;"ubah}(h]h ]h"]h$]h&]j j uh1jhj"hhhj"hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj!hhhj"hM ubah}(h]j!ah ](j j eh"]h$]h&]j j )j huh1j{ hj"hM hj!hhubj )}(hhh]h)}(hre-enable output polling.h]hre-enable output polling.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM hj"hhubah}(h]h ]h"]h$]h&]uh1j hj!hhhj"hM ubeh}(h]h ](j functioneh"]h$]h&]j j j j"j j"j j j uh1jv hhhjZ!hNhNubj )}(hXt**Parameters** ``struct drm_device *dev`` drm_device **Description** This function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume. Drivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn't enabled. If device polling was never initialized before, this call will trigger a warning and return. Note that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h](h)}(h**Parameters**h]j )}(hj"h]h Parameters}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM$hj"ubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` drm_device h](j` )}(h``struct drm_device *dev``h]jf )}(hj#h]hstruct drm_device *dev}(hj #hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM!hj#ubj| )}(hhh]h)}(h drm_deviceh]h drm_device}(hj #hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hM!hj#ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj#hM!hj"ubah}(h]h ]h"]h$]h&]uh1jT hj"ubh)}(h**Description**h]j )}(hjB#h]h Description}(hjD#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@#ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM#hj"ubh)}(hThis function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume.h]hThis function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume.}(hjX#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM"hj"ubh)}(hDrivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn't enabled.h]hDrivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn’t enabled.}(hjg#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM&hj"ubh)}(h\If device polling was never initialized before, this call will trigger a warning and return.h]h\If device polling was never initialized before, this call will trigger a warning and return.}(hjv#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM)hj"ubh)}(hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h]hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they’re only call from suspend/resume callbacks.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM,hj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_kms_helper_poll_reschedule (C function) c.drm_kms_helper_poll_reschedulehNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h` vfunc for drivers that use the CRTC helpers for output mode filtering and detection. The basic procedure is as follows 1. All modes currently on the connector's modes list are marked as stale 2. New modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order. - :c:type:`drm_connector_helper_funcs.get_modes ` vfunc - if the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) Finally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas. 3. Modes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again. 4. Any non-stale mode on the modes list then undergoes validation - drm_mode_validate_basic() performs basic sanity checks - drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified) - drm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed) - the optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checks - the optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers 5. Any mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()). **Return** The number of modes found on **connector**.h](h)}(h**Parameters**h]j )}(hj)h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj)ubjU )}(hhh](jZ )}(h7``struct drm_connector *connector`` connector to probe h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj)h]hstruct drm_connector *connector}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj)ubj| )}(hhh]h)}(hconnector to probeh]hconnector to probe}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hj)hMhj)ubjZ )}(h&``uint32_t maxX`` max width for modes h](j` )}(h``uint32_t maxX``h]jf )}(hj *h]h uint32_t maxX}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj *ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj*ubj| )}(hhh]h)}(hmax width for modesh]hmax width for modes}(hj&*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"*hMhj#*ubah}(h]h ]h"]h$]h&]uh1j{ hj*ubeh}(h]h ]h"]h$]h&]uh1jY hj"*hMhj)ubjZ )}(h'``uint32_t maxY`` max height for modes h](j` )}(h``uint32_t maxY``h]jf )}(hjF*h]h uint32_t maxY}(hjH*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjD*ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj@*ubj| )}(hhh]h)}(hmax height for modesh]hmax height for modes}(hj_*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[*hMhj\*ubah}(h]h ]h"]h$]h&]uh1j{ hj@*ubeh}(h]h ]h"]h$]h&]uh1jY hj[*hMhj)ubeh}(h]h ]h"]h$]h&]uh1jT hj)ubh)}(h**Description**h]j )}(hj*h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj)ubh)}(hX3Based on the helper callbacks implemented by **connector** in struct :c:type:`drm_connector_helper_funcs` try to detect all valid modes. Modes will first be added to the connector's probed_modes list, then culled (based on validity and the **maxX**, **maxY** parameters) and put into the normal modes list.h](h-Based on the helper callbacks implemented by }(hj*hhhNhNubj )}(h **connector**h]h connector}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubh in struct }(hj*hhhNhNubh)}(h$:c:type:`drm_connector_helper_funcs`h]jf )}(hj*h]hdrm_connector_helper_funcs}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj*ubh try to detect all valid modes. Modes will first be added to the connector’s probed_modes list, then culled (based on validity and the }(hj*hhhNhNubj )}(h**maxX**h]hmaxX}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubh, }(hj*hhhNhNubj )}(h**maxY**h]hmaxY}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubh0 parameters) and put into the normal modes list.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*hMhj)ubh)}(hIntended to be used as a generic implementation of the :c:type:`drm_connector_funcs.fill_modes\(\) ` vfunc for drivers that use the CRTC helpers for output mode filtering and detection.h](h7Intended to be used as a generic implementation of the }(hj*hhhNhNubh)}(hB:c:type:`drm_connector_funcs.fill_modes\(\) `h]jf )}(hj +h]h drm_connector_funcs.fill_modes()}(hj +hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj*ubhU vfunc for drivers that use the CRTC helpers for output mode filtering and detection.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&+hMhj)ubh)}(h!The basic procedure is as followsh]h!The basic procedure is as follows}(hj1+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj)ubj+P)}(hhh](h)}(hFAll modes currently on the connector's modes list are marked as stale h]h)}(hEAll modes currently on the connector's modes list are marked as staleh]hGAll modes currently on the connector’s modes list are marked as stale}(hjG+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjC+ubah}(h]h ]h"]h$]h&]uh1hhj@+ubh)}(hXNew modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order. - :c:type:`drm_connector_helper_funcs.get_modes ` vfunc - if the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) Finally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas. h](h)}(hNew modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order.h]hNew modes are added to the connector’s probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order.}(hj`+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj\+ubh)}(hhh](h)}(hQ:c:type:`drm_connector_helper_funcs.get_modes ` vfunch]h)}(hjt+h](h)}(hK:c:type:`drm_connector_helper_funcs.get_modes `h]jf )}(hj{+h]h$drm_connector_helper_funcs.get_modes}(hj}+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjy+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM hjv+ubh vfunc}(hjv+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hM hjr+ubah}(h]h ]h"]h$]h&]uh1hhjo+ubh)}(hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) h]h)}(hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid())h]hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid())}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM hj+ubah}(h]h ]h"]h$]h&]uh1hhjo+ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj+hM hj\+ubh)}(hFinally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas.h]hFinally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj\+ubeh}(h]h ]h"]h$]h&]uh1hhj@+ubh)}(hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again. h]h)}(hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again.h]hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj+ubah}(h]h ]h"]h$]h&]uh1hhj@+ubh)}(hXAny non-stale mode on the modes list then undergoes validation - drm_mode_validate_basic() performs basic sanity checks - drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified) - drm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed) - the optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checks - the optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers h](h)}(h>Any non-stale mode on the modes list then undergoes validationh]h>Any non-stale mode on the modes list then undergoes validation}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj+ubh)}(hhh](h)}(h6drm_mode_validate_basic() performs basic sanity checksh]h)}(hj,h]h6drm_mode_validate_basic() performs basic sanity checks}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj ,ubah}(h]h ]h"]h$]h&]uh1hhj ,ubh)}(h[drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified)h]h)}(h[drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified)h](h7drm_mode_validate_size() filters out modes larger than }(hj(,hhhNhNubj )}(h**maxX**h]hmaxX}(hj0,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(,ubh and }(hj(,hhhNhNubj )}(h**maxY**h]hmaxY}(hjB,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(,ubh (if specified)}(hj(,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj$,ubah}(h]h ]h"]h$]h&]uh1hhj ,ubh)}(hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)h]h)}(hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)h]hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)}(hje,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhja,ubah}(h]h ]h"]h$]h&]uh1hhj ,ubh)}(hthe optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checksh]h)}(hthe optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checksh](h the optional }(hj~,hhhNhNubh)}(hL:c:type:`drm_connector_helper_funcs.mode_valid `h]jf )}(hj,h]h%drm_connector_helper_funcs.mode_valid}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj~,ubh or }(hj~,hhhNhNubh)}(hP:c:type:`drm_connector_helper_funcs.mode_valid_ctx `h]jf )}(hj,h]h)drm_connector_helper_funcs.mode_valid_ctx}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhj,hMhj~,ubh7 helpers can perform driver and/or sink specific checks}(hj~,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,hMhjz,ubah}(h]h ]h"]h$]h&]uh1hhj ,ubh)}(hXFthe optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers h]h)}(hXEthe optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpersh](h the optional }(hj,hhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]jf )}(hj,h]h drm_crtc_helper_funcs.mode_valid}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM"hj,ubh, }(hj,hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jf )}(hj -h]hdrm_bridge_funcs.mode_valid}(hj -hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj -ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj-hM"hj,ubh and }(hj,hhhNhNubh)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]jf )}(hj.-h]h#drm_encoder_helper_funcs.mode_valid}(hj0-hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj,-ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhj-hM"hj,ubho helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hM"hj,ubah}(h]h ]h"]h$]h&]uh1hhj ,ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj,hMhj+ubeh}(h]h ]h"]h$]h&]uh1hhj@+ubh)}(hAny mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()). h]h)}(hAny mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()).h]hAny mode whose status is not OK is pruned from the connector’s modes list, accompanied by a debug message indicating the reason for the mode’s rejection (see drm_mode_prune_invalid()).}(hjk-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM'hjg-ubah}(h]h ]h"]h$]h&]uh1hhj@+ubeh}(h]h ]h"]h$]h&]j'Rj(Rj)Rhj*Rj+Ruh1j*Phj)ubh)}(h **Return**h]j )}(hj-h]hReturn}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM+hj)ubh)}(h+The number of modes found on **connector**.h](hThe number of modes found on }(hj-hhhNhNubj )}(h **connector**h]h connector}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubh.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM,hj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_kms_helper_hotplug_event (C function)c.drm_kms_helper_hotplug_eventhNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h:void drm_kms_helper_hotplug_event (struct drm_device *dev)h]j )}(h9void drm_kms_helper_hotplug_event(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-hhhj-hMubj )}(hdrm_kms_helper_hotplug_eventh]j )}(hdrm_kms_helper_hotplug_eventh]hdrm_kms_helper_hotplug_event}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj-hhhj-hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj).hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj:.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<.modnameN classnameNj j )}j ]j)}jj.sbc.drm_kms_helper_hotplug_eventasbuh1hhj.ubj )}(h h]h }(hjZ.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj)}(hjOh]h*}(hjh.hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.ubj )}(hdevh]hdev}(hju.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubah}(h]h ]h"]h$]h&]j j uh1jhj-hhhj-hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj-hhhj-hMubah}(h]j-ah ](j j eh"]h$]h&]j j )j huh1j{ hj-hMhj-hhubj )}(hhh]h)}(hfire off KMS hotplug eventsh]hfire off KMS hotplug events}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.hhubah}(h]h ]h"]h$]h&]uh1j hj-hhhj-hMubeh}(h]h ](j functioneh"]h$]h&]j j j j.j j.j j j uh1jv hhhjZ!hNhNubj )}(hX**Parameters** ``struct drm_device *dev`` drm_device whose connector state changed **Description** This function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration. Drivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already. This function must be called from process context with no mode setting locks held. If only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.h](h)}(h**Parameters**h]j )}(hj.h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubjU )}(hhh]jZ )}(hD``struct drm_device *dev`` drm_device whose connector state changed h](j` )}(h``struct drm_device *dev``h]jf )}(hj.h]hstruct drm_device *dev}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubj| )}(hhh]h)}(h(drm_device whose connector state changedh]h(drm_device whose connector state changed}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1j{ hj.ubeh}(h]h ]h"]h$]h&]uh1jY hj.hMhj.ubah}(h]h ]h"]h$]h&]uh1jT hj.ubh)}(h**Description**h]j )}(hj/h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubh)}(hThis function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration.h]hThis function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration.}(hj1/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubh)}(hDrivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already.h]hDrivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already.}(hj@/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubh)}(hRThis function must be called from process context with no mode setting locks held.h]hRThis function must be called from process context with no mode setting locks held.}(hjO/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubh)}(hjIf only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.h]hjIf only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.}(hj^/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_kms_helper_connector_hotplug_event (C function)(c.drm_kms_helper_connector_hotplug_eventhNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(hMvoid drm_kms_helper_connector_hotplug_event (struct drm_connector *connector)h]j )}(hLvoid drm_kms_helper_connector_hotplug_event(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhj/hMubj )}(h&drm_kms_helper_connector_hotplug_eventh]j )}(h&drm_kms_helper_connector_hotplug_eventh]h&drm_kms_helper_connector_hotplug_event}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/hhhj/hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]j)}jj/sb(c.drm_kms_helper_connector_hotplug_eventasbuh1hhj/ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/ubj )}(h connectorh]h connector}(hj#0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubah}(h]h ]h"]h$]h&]j j uh1jhj/hhhj/hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj/hhhj/hMubah}(h]j/ah ](j j eh"]h$]h&]j j )j huh1j{ hj/hMhj/hhubj )}(hhh]h)}(h&fire off a KMS connector hotplug eventh]h&fire off a KMS connector hotplug event}(hjM0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjJ0hhubah}(h]h ]h"]h$]h&]uh1j hj/hhhj/hMubeh}(h]h ](j functioneh"]h$]h&]j j j je0j je0j j j uh1jv hhhjZ!hNhNubj )}(h**Parameters** ``struct drm_connector *connector`` drm_connector which has changed **Description** This is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.h](h)}(h**Parameters**h]j )}(hjo0h]h Parameters}(hjq0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjm0ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhji0ubjU )}(hhh]jZ )}(hD``struct drm_connector *connector`` drm_connector which has changed h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj0h]hstruct drm_connector *connector}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj0ubj| )}(hhh]h)}(hdrm_connector which has changedh]hdrm_connector which has changed}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1j{ hj0ubeh}(h]h ]h"]h$]h&]uh1jY hj0hMhj0ubah}(h]h ]h"]h$]h&]uh1jT hji0ubh)}(h**Description**h]j )}(hj0h]h Description}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhji0ubh)}(hvThis is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.h]hvThis is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhji0ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_kms_helper_is_poll_worker (C function)c.drm_kms_helper_is_poll_workerhNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h)bool drm_kms_helper_is_poll_worker (void)h]j )}(h(bool drm_kms_helper_is_poll_worker(void)h](j)}(hjIh]hbool}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 1hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMWubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 1hhhj1hMWubj )}(hdrm_kms_helper_is_poll_workerh]j )}(hdrm_kms_helper_is_poll_workerh]hdrm_kms_helper_is_poll_worker}(hj.1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj 1hhhj1hMWubj)}(h(void)h]j)}(hvoidh]j)}(hvoidh]hvoid}(hjJ1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF1ubah}(h]h ]h"]h$]h&]noemphj j uh1jhjB1ubah}(h]h ]h"]h$]h&]j j uh1jhj 1hhhj1hMWubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj1hhhj1hMWubah}(h]j1ah ](j j eh"]h$]h&]j j )j huh1j{ hj1hMWhj1hhubj )}(hhh]h)}(h*is ``current`` task an output poll worker?h](his }(hjt1hhhNhNubjf )}(h ``current``h]hcurrent}(hj|1hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjt1ubh task an output poll worker?}(hjt1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMWhjq1hhubah}(h]h ]h"]h$]h&]uh1j hj1hhhj1hMWubeh}(h]h ](j functioneh"]h$]h&]j j j j1j j1j j j uh1jv hhhjZ!hNhNubj )}(hX**Parameters** ``void`` no arguments **Description** Determine if ``current`` task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts. One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.h](h)}(h**Parameters**h]j )}(hj1h]h Parameters}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM[hj1ubjU )}(hhh]jZ )}(h``void`` no arguments h](j` )}(h``void``h]jf )}(hj1h]hvoid}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj1ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chKhj1ubj| )}(hhh]h)}(h no argumentsh]h no arguments}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hKhj1ubah}(h]h ]h"]h$]h&]uh1j{ hj1ubeh}(h]h ]h"]h$]h&]uh1jY hj1hKhj1ubah}(h]h ]h"]h$]h&]uh1jT hj1ubh)}(h**Description**h]j )}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chKhj1ubh)}(hDetermine if ``current`` task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts.h](h Determine if }(hj2hhhNhNubjf )}(h ``current``h]hcurrent}(hj 2hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj2ubhy task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts.}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMXhj1ubh)}(hX.One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.h]hX.One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.}(hj92hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM[hj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_kms_helper_poll_disable (C function)c.drm_kms_helper_poll_disablehNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h9void drm_kms_helper_poll_disable (struct drm_device *dev)h]j )}(h8void drm_kms_helper_poll_disable(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hjh2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjd2hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMkubj )}(h h]h }(hjw2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd2hhhjv2hMkubj )}(hdrm_kms_helper_poll_disableh]j )}(hdrm_kms_helper_poll_disableh]hdrm_kms_helper_poll_disable}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjd2hhhjv2hMkubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2modnameN classnameNj j )}j ]j)}jj2sbc.drm_kms_helper_poll_disableasbuh1hhj2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj2ubj )}(hdevh]hdev}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubah}(h]h ]h"]h$]h&]j j uh1jhjd2hhhjv2hMkubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj`2hhhjv2hMkubah}(h]j[2ah ](j j eh"]h$]h&]j j )j huh1j{ hjv2hMkhj]2hhubj )}(hhh]h)}(hdisable output pollingh]hdisable output polling}(hj(3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMkhj%3hhubah}(h]h ]h"]h$]h&]uh1j hj]2hhhjv2hMkubeh}(h]h ](j functioneh"]h$]h&]j j j j@3j j@3j j j uh1jv hhhjZ!hNhNubj )}(hXX**Parameters** ``struct drm_device *dev`` drm_device **Description** This function disables the output polling work. Drivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn't enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable(). If however, the polling was never initialized, this call will trigger a warning and return. Note that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h](h)}(h**Parameters**h]j )}(hjJ3h]h Parameters}(hjL3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjH3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMohjD3ubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` drm_device h](j` )}(h``struct drm_device *dev``h]jf )}(hji3h]hstruct drm_device *dev}(hjk3hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjg3ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMlhjc3ubj| )}(hhh]h)}(h drm_deviceh]h drm_device}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~3hMlhj3ubah}(h]h ]h"]h$]h&]uh1j{ hjc3ubeh}(h]h ]h"]h$]h&]uh1jY hj~3hMlhj`3ubah}(h]h ]h"]h$]h&]uh1jT hjD3ubh)}(h**Description**h]j )}(hj3h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMnhjD3ubh)}(h/This function disables the output polling work.h]h/This function disables the output polling work.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMmhjD3ubh)}(hDrivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn't enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable().h]hDrivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn’t enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable().}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMohjD3ubh)}(h[If however, the polling was never initialized, this call will trigger a warning and return.h]h[If however, the polling was never initialized, this call will trigger a warning and return.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMshjD3ubh)}(hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h]hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they’re only call from suspend/resume callbacks.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMvhjD3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_kms_helper_poll_init (C function)c.drm_kms_helper_poll_inithNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h6void drm_kms_helper_poll_init (struct drm_device *dev)h]j )}(h5void drm_kms_helper_poll_init(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj%4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4hhhj$4hMubj )}(hdrm_kms_helper_poll_inith]j )}(hdrm_kms_helper_poll_inith]hdrm_kms_helper_poll_init}(hj74hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj34ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj4hhhj$4hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjS4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO4ubj )}(h h]h }(hj`4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO4ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjq4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjs4modnameN classnameNj j )}j ]j)}jj94sbc.drm_kms_helper_poll_initasbuh1hhjO4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO4ubj)}(hjOh]h*}(hj4hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjO4ubj )}(hdevh]hdev}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjK4ubah}(h]h ]h"]h$]h&]j j uh1jhj4hhhj$4hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj4hhhj$4hMubah}(h]j 4ah ](j j eh"]h$]h&]j j )j huh1j{ hj$4hMhj 4hhubj )}(hhh]h)}(h$initialize and enable output pollingh]h$initialize and enable output polling}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj4hhubah}(h]h ]h"]h$]h&]uh1j hj 4hhhj$4hMubeh}(h]h ](j functioneh"]h$]h&]j j j j4j j4j j j uh1jv hhhjZ!hNhNubj )}(hXX**Parameters** ``struct drm_device *dev`` drm_device **Description** This function initializes and then also enables output polling support for **dev**. Drivers which do not have reliable hotplug support in hardware can use this helper infrastructure to regularly poll such connectors for changes in their connection state. Drivers can control which connectors are polled by setting the DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On connectors where probing live outputs can result in visual distortion drivers should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this. Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are completely ignored by the polling logic. Note that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h](h)}(h**Parameters**h]j )}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` drm_device h](j` )}(h``struct drm_device *dev``h]jf )}(hj5h]hstruct drm_device *dev}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj5ubj| )}(hhh]h)}(h drm_deviceh]h drm_device}(hj05hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,5hMhj-5ubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hj,5hMhj5ubah}(h]h ]h"]h$]h&]uh1jT hj4ubh)}(h**Description**h]j )}(hjR5h]h Description}(hjT5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjP5ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubh)}(hThis function initializes and then also enables output polling support for **dev**. Drivers which do not have reliable hotplug support in hardware can use this helper infrastructure to regularly poll such connectors for changes in their connection state.h](hKThis function initializes and then also enables output polling support for }(hjh5hhhNhNubj )}(h**dev**h]hdev}(hjp5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjh5ubh. Drivers which do not have reliable hotplug support in hardware can use this helper infrastructure to regularly poll such connectors for changes in their connection state.}(hjh5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubh)}(hXDrivers can control which connectors are polled by setting the DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On connectors where probing live outputs can result in visual distortion drivers should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this. Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are completely ignored by the polling logic.h]hXDrivers can control which connectors are polled by setting the DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On connectors where probing live outputs can result in visual distortion drivers should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this. Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are completely ignored by the polling logic.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubh)}(hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h]hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_kms_helper_poll_fini (C function)c.drm_kms_helper_poll_finihNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h6void drm_kms_helper_poll_fini (struct drm_device *dev)h]j )}(h5void drm_kms_helper_poll_fini(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5hhhj5hMubj )}(hdrm_kms_helper_poll_finih]j )}(hdrm_kms_helper_poll_finih]hdrm_kms_helper_poll_fini}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj5hhhj5hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj"6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$6modnameN classnameNj j )}j ]j)}jj5sbc.drm_kms_helper_poll_finiasbuh1hhj6ubj )}(h h]h }(hjB6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjP6hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(hdevh]hdev}(hj]6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubah}(h]h ]h"]h$]h&]j j uh1jhj5hhhj5hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5hhhj5hMubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j{ hj5hMhj5hhubj )}(hhh]h)}(h&disable output polling and clean it uph]h&disable output polling and clean it up}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj6hhubah}(h]h ]h"]h$]h&]uh1j hj5hhhj5hMubeh}(h]h ](j functioneh"]h$]h&]j j j j6j j6j j j uh1jv hhhjZ!hNhNubj )}(h7**Parameters** ``struct drm_device *dev`` drm_deviceh](h)}(h**Parameters**h]j )}(hj6h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj6ubjU )}(hhh]jZ )}(h%``struct drm_device *dev`` drm_deviceh](j` )}(h``struct drm_device *dev``h]jf )}(hj6h]hstruct drm_device *dev}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj6ubj| )}(hhh]h)}(h drm_deviceh]h drm_device}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj6ubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hj6hMhj6ubah}(h]h ]h"]h$]h&]uh1jT hj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drmm_kms_helper_poll_init (C function)c.drmm_kms_helper_poll_inithNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h7void drmm_kms_helper_poll_init (struct drm_device *dev)h]j )}(h6void drmm_kms_helper_poll_init(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj"7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj17hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhj07hMubj )}(hdrmm_kms_helper_poll_inith]j )}(hdrmm_kms_helper_poll_inith]hdrmm_kms_helper_poll_init}(hjC7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhj07hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj_7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[7ubj )}(h h]h }(hjl7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[7ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj}7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j)}jjE7sbc.drmm_kms_helper_poll_initasbuh1hhj[7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[7ubj)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[7ubj )}(hdevh]hdev}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjW7ubah}(h]h ]h"]h$]h&]j j uh1jhj7hhhj07hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhj07hMubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j{ hj07hMhj7hhubj )}(hhh]h)}(h$initialize and enable output pollingh]h$initialize and enable output polling}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj7hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhj07hMubeh}(h]h ](j functioneh"]h$]h&]j j j j7j j7j j j uh1jv hhhjZ!hNhNubj )}(hXA**Parameters** ``struct drm_device *dev`` drm_device **Description** This function initializes and then also enables output polling support for **dev** similar to drm_kms_helper_poll_init(). Polling will automatically be cleaned up when the DRM device goes away. See drm_kms_helper_poll_init() for more information.h](h)}(h**Parameters**h]j )}(hj8h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj7ubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` drm_device h](j` )}(h``struct drm_device *dev``h]jf )}(hj#8h]hstruct drm_device *dev}(hj%8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!8ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj8ubj| )}(hhh]h)}(h drm_deviceh]h drm_device}(hj<8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj88hMhj98ubah}(h]h ]h"]h$]h&]uh1j{ hj8ubeh}(h]h ]h"]h$]h&]uh1jY hj88hMhj8ubah}(h]h ]h"]h$]h&]uh1jT hj7ubh)}(h**Description**h]j )}(hj^8h]h Description}(hj`8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\8ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj7ubh)}(hThis function initializes and then also enables output polling support for **dev** similar to drm_kms_helper_poll_init(). Polling will automatically be cleaned up when the DRM device goes away.h](hKThis function initializes and then also enables output polling support for }(hjt8hhhNhNubj )}(h**dev**h]hdev}(hj|8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjt8ubho similar to drm_kms_helper_poll_init(). Polling will automatically be cleaned up when the DRM device goes away.}(hjt8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj7ubh)}(h4See drm_kms_helper_poll_init() for more information.h]h4See drm_kms_helper_poll_init() for more information.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_connector_helper_hpd_irq_event (C function)$c.drm_connector_helper_hpd_irq_eventhNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(hIbool drm_connector_helper_hpd_irq_event (struct drm_connector *connector)h]j )}(hHbool drm_connector_helper_hpd_irq_event(struct drm_connector *connector)h](j)}(hjIh]hbool}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8hhhj8hMubj )}(h"drm_connector_helper_hpd_irq_eventh]j )}(h"drm_connector_helper_hpd_irq_eventh]h"drm_connector_helper_hpd_irq_event}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj8hhhj8hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj 9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj 9modnameN classnameNj j )}j ]j)}jj8sb$c.drm_connector_helper_hpd_irq_eventasbuh1hhj8ubj )}(h h]h }(hj>9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj)}(hjOh]h*}(hjL9hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj8ubj )}(h connectorh]h connector}(hjY9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubah}(h]h ]h"]h$]h&]j j uh1jhj8hhhj8hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj8hhhj8hMubah}(h]j8ah ](j j eh"]h$]h&]j j )j huh1j{ hj8hMhj8hhubj )}(hhh]h)}(hhotplug processingh]hhotplug processing}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9hhubah}(h]h ]h"]h$]h&]uh1j hj8hhhj8hMubeh}(h]h ](j functioneh"]h$]h&]j j j j9j j9j j j uh1jv hhhjZ!hNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` drm_connector **Description** Drivers can use this helper function to run a detect cycle on a connector which has the DRM_CONNECTOR_POLL_HPD flag set in its :c:type:`polled` member. This helper function is useful for drivers which can track hotplug interrupts for a single connector. Drivers that want to send a hotplug event for all connectors or can't track hotplug interrupts per connector need to use drm_helper_hpd_irq_event(). This function must be called from process context with no mode setting locks held. Note that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable. **Return** A boolean indicating whether the connector status changed or noth](h)}(h**Parameters**h]j )}(hj9h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` drm_connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj9h]hstruct drm_connector *connector}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubj| )}(hhh]h)}(h drm_connectorh]h drm_connector}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hj9hMhj9ubah}(h]h ]h"]h$]h&]uh1jT hj9ubh)}(h**Description**h]j )}(hj9h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubh)}(hDrivers can use this helper function to run a detect cycle on a connector which has the DRM_CONNECTOR_POLL_HPD flag set in its :c:type:`polled` member.h](hDrivers can use this helper function to run a detect cycle on a connector which has the DRM_CONNECTOR_POLL_HPD flag set in its }(hj:hhhNhNubh)}(h:c:type:`polled`h]jf )}(hj:h]hpolled}(hj!:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j polleduh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj:ubh member.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<:hMhj9ubh)}(hThis helper function is useful for drivers which can track hotplug interrupts for a single connector. Drivers that want to send a hotplug event for all connectors or can't track hotplug interrupts per connector need to use drm_helper_hpd_irq_event().h]hThis helper function is useful for drivers which can track hotplug interrupts for a single connector. Drivers that want to send a hotplug event for all connectors or can’t track hotplug interrupts per connector need to use drm_helper_hpd_irq_event().}(hjG:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubh)}(hRThis function must be called from process context with no mode setting locks held.h]hRThis function must be called from process context with no mode setting locks held.}(hjV:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubh)}(hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h]hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.}(hje:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubh)}(h **Return**h]j )}(hjv:h]hReturn}(hjx:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjt:ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubh)}(h@A boolean indicating whether the connector status changed or noth]h@A boolean indicating whether the connector status changed or not}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_helper_hpd_irq_event (C function)c.drm_helper_hpd_irq_eventhNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h6bool drm_helper_hpd_irq_event (struct drm_device *dev)h]j )}(h5bool drm_helper_hpd_irq_event(struct drm_device *dev)h](j)}(hjIh]hbool}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:hhhj:hM ubj )}(hdrm_helper_hpd_irq_eventh]j )}(hdrm_helper_hpd_irq_eventh]hdrm_helper_hpd_irq_event}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj:hhhj:hM ubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j)}jj:sbc.drm_helper_hpd_irq_eventasbuh1hhj:ubj )}(h h]h }(hj5;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj)}(hjOh]h*}(hjC;hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj:ubj )}(hdevh]hdev}(hjP;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:ubah}(h]h ]h"]h$]h&]j j uh1jhj:hhhj:hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:hhhj:hM ubah}(h]j:ah ](j j eh"]h$]h&]j j )j huh1j{ hj:hM hj:hhubj )}(hhh]h)}(hhotplug processingh]hhotplug processing}(hjz;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM hjw;hhubah}(h]h ]h"]h$]h&]uh1j hj:hhhj:hM ubeh}(h]h ](j functioneh"]h$]h&]j j j j;j j;j j j uh1jv hhhjZ!hNhNubj )}(hX**Parameters** ``struct drm_device *dev`` drm_device **Description** Drivers can use this helper function to run a detect cycle on all connectors which have the DRM_CONNECTOR_POLL_HPD flag set in their :c:type:`polled` member. All other connectors are ignored, which is useful to avoid reprobing fixed panels. This helper function is useful for drivers which can't or don't track hotplug interrupts for each connector. Drivers which support hotplug interrupts for each connector individually and which have a more fine-grained detect logic can use drm_connector_helper_hpd_irq_event(). Alternatively, they should bypass this code and directly call drm_kms_helper_hotplug_event() in case the connector state changed. This function must be called from process context with no mode setting locks held. Note that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable. **Return** A boolean indicating whether the connector status changed or noth](h)}(h**Parameters**h]j )}(hj;h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM$hj;ubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` drm_device h](j` )}(h``struct drm_device *dev``h]jf )}(hj;h]hstruct drm_device *dev}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM!hj;ubj| )}(hhh]h)}(h drm_deviceh]h drm_device}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hM!hj;ubah}(h]h ]h"]h$]h&]uh1j{ hj;ubeh}(h]h ]h"]h$]h&]uh1jY hj;hM!hj;ubah}(h]h ]h"]h$]h&]uh1jT hj;ubh)}(h**Description**h]j )}(hj;h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM#hj;ubh)}(hDrivers can use this helper function to run a detect cycle on all connectors which have the DRM_CONNECTOR_POLL_HPD flag set in their :c:type:`polled` member. All other connectors are ignored, which is useful to avoid reprobing fixed panels.h](hDrivers can use this helper function to run a detect cycle on all connectors which have the DRM_CONNECTOR_POLL_HPD flag set in their }(hj <hhhNhNubh)}(h:c:type:`polled`h]jf )}(hj<h]hpolled}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j polleduh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM"hj <ubh[ member. All other connectors are ignored, which is useful to avoid reprobing fixed panels.}(hj <hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj3<hM"hj;ubh)}(hlThis helper function is useful for drivers which can't or don't track hotplug interrupts for each connector.h]hpThis helper function is useful for drivers which can’t or don’t track hotplug interrupts for each connector.}(hj><hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM'hj;ubh)}(hX(Drivers which support hotplug interrupts for each connector individually and which have a more fine-grained detect logic can use drm_connector_helper_hpd_irq_event(). Alternatively, they should bypass this code and directly call drm_kms_helper_hotplug_event() in case the connector state changed.h]hX(Drivers which support hotplug interrupts for each connector individually and which have a more fine-grained detect logic can use drm_connector_helper_hpd_irq_event(). Alternatively, they should bypass this code and directly call drm_kms_helper_hotplug_event() in case the connector state changed.}(hjM<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM*hj;ubh)}(hRThis function must be called from process context with no mode setting locks held.h]hRThis function must be called from process context with no mode setting locks held.}(hj\<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM0hj;ubh)}(hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h]hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.}(hjk<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM3hj;ubh)}(h **Return**h]j )}(hj|<h]hReturn}(hj~<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz<ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM6hj;ubh)}(h@A boolean indicating whether the connector status changed or noth]h@A boolean indicating whether the connector status changed or not}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM7hj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_crtc_helper_mode_valid_fixed (C function)"c.drm_crtc_helper_mode_valid_fixedhNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(henum drm_mode_status drm_crtc_helper_mode_valid_fixed (struct drm_crtc *crtc, const struct drm_display_mode *mode, const struct drm_display_mode *fixed_mode)h]j )}(henum drm_mode_status drm_crtc_helper_mode_valid_fixed(struct drm_crtc *crtc, const struct drm_display_mode *mode, const struct drm_display_mode *fixed_mode)h](j )}(hj+h]henum}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMcubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhj<hMcubh)}(hhh]j )}(hdrm_mode_statush]hdrm_mode_status}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j)}j drm_crtc_helper_mode_valid_fixedsb"c.drm_crtc_helper_mode_valid_fixedasbuh1hhj<hhhj<hMcubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhj<hMcubj )}(h drm_crtc_helper_mode_valid_fixedh]j )}(hj<h]h drm_crtc_helper_mode_valid_fixed}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj<hhhj<hMcubj)}(hg(struct drm_crtc *crtc, const struct drm_display_mode *mode, const struct drm_display_mode *fixed_mode)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj.=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*=ubj )}(h h]h }(hj;=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*=ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjL=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjN=modnameN classnameNj j )}j ]j<"c.drm_crtc_helper_mode_valid_fixedasbuh1hhj*=ubj )}(h h]h }(hjj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*=ubj)}(hjOh]h*}(hjx=hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*=ubj )}(hcrtch]hcrtc}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&=ubj)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(hj h]hstruct}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=modnameN classnameNj j )}j ]j<"c.drm_crtc_helper_mode_valid_fixedasbuh1hhj=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=ubj )}(hmodeh]hmode}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&=ubj)}(h)const struct drm_display_mode *fixed_modeh](j )}(hjAh]hconst}(hj)>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%>ubj )}(h h]h }(hj6>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%>ubj )}(hj h]hstruct}(hjD>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%>ubj )}(h h]h }(hjQ>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%>ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjb>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjd>modnameN classnameNj j )}j ]j<"c.drm_crtc_helper_mode_valid_fixedasbuh1hhj%>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%>ubj)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%>ubj )}(h fixed_modeh]h fixed_mode}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&=ubeh}(h]h ]h"]h$]h&]j j uh1jhj<hhhj<hMcubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhj<hMcubah}(h]j<ah ](j j eh"]h$]h&]j j )j huh1j{ hj<hMchj<hhubj )}(hhh]h)}(hValidates a display modeh]hValidates a display mode}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMchj>hhubah}(h]h ]h"]h$]h&]uh1j hj<hhhj<hMcubeh}(h]h ](j functioneh"]h$]h&]j j j j>j j>j j j uh1jv hhhjZ!hNhNubj )}(hX **Parameters** ``struct drm_crtc *crtc`` the crtc ``const struct drm_display_mode *mode`` the mode to validate ``const struct drm_display_mode *fixed_mode`` the display hardware's mode **Return** MODE_OK on success, or another mode-status code otherwise.h](h)}(h**Parameters**h]j )}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMghj>ubjU )}(hhh](jZ )}(h#``struct drm_crtc *crtc`` the crtc h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hj?h]hstruct drm_crtc *crtc}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj?ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMdhj?ubj| )}(hhh]h)}(hthe crtch]hthe crtc}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMdhj?ubah}(h]h ]h"]h$]h&]uh1j{ hj?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hMdhj>ubjZ )}(h=``const struct drm_display_mode *mode`` the mode to validate h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hj??h]h#const struct drm_display_mode *mode}(hjA?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=?ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMehj9?ubj| )}(hhh]h)}(hthe mode to validateh]hthe mode to validate}(hjX?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT?hMehjU?ubah}(h]h ]h"]h$]h&]uh1j{ hj9?ubeh}(h]h ]h"]h$]h&]uh1jY hjT?hMehj>ubjZ )}(hJ``const struct drm_display_mode *fixed_mode`` the display hardware's mode h](j` )}(h-``const struct drm_display_mode *fixed_mode``h]jf )}(hjx?h]h)const struct drm_display_mode *fixed_mode}(hjz?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjv?ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMfhjr?ubj| )}(hhh]h)}(hthe display hardware's modeh]hthe display hardware’s mode}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMfhj?ubah}(h]h ]h"]h$]h&]uh1j{ hjr?ubeh}(h]h ]h"]h$]h&]uh1jY hj?hMfhj>ubeh}(h]h ]h"]h$]h&]uh1jT hj>ubh)}(h **Return**h]j )}(hj?h]hReturn}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhhj>ubh)}(h:MODE_OK on success, or another mode-status code otherwise.h]h:MODE_OK on success, or another mode-status code otherwise.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_connector_helper_get_modes_fixed (C function)&c.drm_connector_helper_get_modes_fixedhNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(huint drm_connector_helper_get_modes_fixed (struct drm_connector *connector, const struct drm_display_mode *fixed_mode)h]j )}(htint drm_connector_helper_get_modes_fixed(struct drm_connector *connector, const struct drm_display_mode *fixed_mode)h](j)}(hinth]hint}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM{ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?hhhj@hM{ubj )}(h$drm_connector_helper_get_modes_fixedh]j )}(h$drm_connector_helper_get_modes_fixedh]h$drm_connector_helper_get_modes_fixed}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj?hhhj@hM{ubj)}(hL(struct drm_connector *connector, const struct drm_display_mode *fixed_mode)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj5@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1@ubj )}(h h]h }(hjB@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1@ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjS@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjP@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjU@modnameN classnameNj j )}j ]j)}jj@sb&c.drm_connector_helper_get_modes_fixedasbuh1hhj1@ubj )}(h h]h }(hjs@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1@ubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1@ubj )}(h connectorh]h connector}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-@ubj)}(h)const struct drm_display_mode *fixed_modeh](j )}(hjAh]hconst}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]jo@&c.drm_connector_helper_get_modes_fixedasbuh1hhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj)}(hjOh]h*}(hj AhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj@ubj )}(h fixed_modeh]h fixed_mode}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-@ubeh}(h]h ]h"]h$]h&]j j uh1jhj?hhhj@hM{ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?hhhj@hM{ubah}(h]j?ah ](j j eh"]h$]h&]j j )j huh1j{ hj@hM{hj?hhubj )}(hhh]h)}(h)Duplicates a display mode for a connectorh]h)Duplicates a display mode for a connector}(hjCAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM{hj@Ahhubah}(h]h ]h"]h$]h&]uh1j hj?hhhj@hM{ubeh}(h]h ](j functioneh"]h$]h&]j j j j[Aj j[Aj j j uh1jv hhhjZ!hNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` the connector ``const struct drm_display_mode *fixed_mode`` the display hardware's mode **Description** This function duplicates a display modes for a connector. Drivers for hardware that only supports a single fixed mode can use this function in their connector's get_modes helper. **Return** The number of created modes.h](h)}(h**Parameters**h]j )}(hjeAh]h Parameters}(hjgAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcAubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj_AubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` the connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjAh]hstruct drm_connector *connector}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM|hj~Aubj| )}(hhh]h)}(h the connectorh]h the connector}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhM|hjAubah}(h]h ]h"]h$]h&]uh1j{ hj~Aubeh}(h]h ]h"]h$]h&]uh1jY hjAhM|hj{AubjZ )}(hJ``const struct drm_display_mode *fixed_mode`` the display hardware's mode h](j` )}(h-``const struct drm_display_mode *fixed_mode``h]jf )}(hjAh]h)const struct drm_display_mode *fixed_mode}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM}hjAubj| )}(hhh]h)}(hthe display hardware's modeh]hthe display hardware’s mode}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhM}hjAubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjAhM}hj{Aubeh}(h]h ]h"]h$]h&]uh1jT hj_Aubh)}(h**Description**h]j )}(hjAh]h Description}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj_Aubh)}(hThis function duplicates a display modes for a connector. Drivers for hardware that only supports a single fixed mode can use this function in their connector's get_modes helper.h]hThis function duplicates a display modes for a connector. Drivers for hardware that only supports a single fixed mode can use this function in their connector’s get_modes helper.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM~hj_Aubh)}(h **Return**h]j )}(hjBh]hReturn}(hj!BhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj_Aubh)}(hThe number of created modes.h]hThe number of created modes.}(hj5BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj_Aubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_connector_helper_get_modes (C function) c.drm_connector_helper_get_modeshNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(hDint drm_connector_helper_get_modes (struct drm_connector *connector)h]j )}(hCint drm_connector_helper_get_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjdBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`Bhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hjsBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`BhhhjrBhMubj )}(hdrm_connector_helper_get_modesh]j )}(hdrm_connector_helper_get_modesh]hdrm_connector_helper_get_modes}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`BhhhjrBhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]j)}jjBsb c.drm_connector_helper_get_modesasbuh1hhjBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjBubj )}(h connectorh]h connector}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjBubah}(h]h ]h"]h$]h&]j j uh1jhj`BhhhjrBhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj\BhhhjrBhMubah}(h]jWBah ](j j eh"]h$]h&]j j )j huh1j{ hjrBhMhjYBhhubj )}(hhh]h)}(hRead EDID and update connector.h]hRead EDID and update connector.}(hj$ChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj!Chhubah}(h]h ]h"]h$]h&]uh1j hjYBhhhjrBhMubeh}(h]h ](j functioneh"]h$]h&]j j j jddc is set), and update the connector using the EDID. This can be used as the "default" connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update. **Return** Number of modes.h](h)}(h**Parameters**h]j )}(hjFCh]h Parameters}(hjHChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDCubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj@CubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` The connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjeCh]hstruct drm_connector *connector}(hjgChhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcCubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj_Cubj| )}(hhh]h)}(h The connectorh]h The connector}(hj~ChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzChMhj{Cubah}(h]h ]h"]h$]h&]uh1j{ hj_Cubeh}(h]h ]h"]h$]h&]uh1jY hjzChMhj\Cubah}(h]h ]h"]h$]h&]uh1jT hj@Cubh)}(h**Description**h]j )}(hjCh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj@Cubh)}(hyRead the EDID using drm_edid_read() (which requires that connector->ddc is set), and update the connector using the EDID.h]hyRead the EDID using drm_edid_read() (which requires that connector->ddc is set), and update the connector using the EDID.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj@Cubh)}(hThis can be used as the "default" connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update.h]hThis can be used as the “default” connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj@Cubh)}(h **Return**h]j )}(hjCh]hReturn}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj@Cubh)}(hNumber of modes.h]hNumber of modes.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj@Cubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq .drm_connector_helper_tv_get_modes (C function)#c.drm_connector_helper_tv_get_modeshNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(hGint drm_connector_helper_tv_get_modes (struct drm_connector *connector)h]j )}(hFint drm_connector_helper_tv_get_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj*DhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDhhhj)DhMubj )}(h!drm_connector_helper_tv_get_modesh]j )}(h!drm_connector_helper_tv_get_modesh]h!drm_connector_helper_tv_get_modes}(hjDsb#c.drm_connector_helper_tv_get_modesasbuh1hhjTDubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTDubj)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjTDubj )}(h connectorh]h connector}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjPDubah}(h]h ]h"]h$]h&]j j uh1jhjDhhhj)DhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjDhhhj)DhMubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j{ hj)DhMhjDhhubj )}(hhh]h)}(h,Fills the modes availables to a TV connectorh]h,Fills the modes availables to a TV connector}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjDhhubah}(h]h ]h"]h$]h&]uh1j hjDhhhj)DhMubeh}(h]h ](j functioneh"]h$]h&]j j j jDj jDj j j uh1jv hhhjZ!hNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` The connector **Description** Fills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line. This can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing. **Return** The number of modes added to the connector.h](h)}(h**Parameters**h]j )}(hjDh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjDubjU )}(hhh]jZ )}(h2``struct drm_connector *connector`` The connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjEh]hstruct drm_connector *connector}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjEubj| )}(hhh]h)}(h The connectorh]h The connector}(hj5EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1EhMhj2Eubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj1EhMhjEubah}(h]h ]h"]h$]h&]uh1jT hjDubh)}(h**Description**h]j )}(hjWEh]h Description}(hjYEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjDubh)}(hFills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line.h]hFills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line.}(hjmEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjDubh)}(hyThis can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing.h]hyThis can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing.}(hj|EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjDubh)}(h **Return**h]j )}(hjEh]hReturn}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjDubh)}(h+The number of modes added to the connector.h]h+The number of modes added to the connector.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjDubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 1drm_connector_helper_detect_from_ddc (C function)&c.drm_connector_helper_detect_from_ddchNtauh1jd hjZ!hhhNhNubjw )}(hhh](j| )}(h{int drm_connector_helper_detect_from_ddc (struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h]j )}(hzint drm_connector_helper_detect_from_ddc(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hinth]hint}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEhhhjEhMubj )}(h$drm_connector_helper_detect_from_ddch]j )}(h$drm_connector_helper_detect_from_ddch]h$drm_connector_helper_detect_from_ddc}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ](j j eh"]h$]h&]j j uh1j hjEhhhjEhMubj)}(hR(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Fubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Fubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj-FhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Fubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/FmodnameN classnameNj j )}j ]j)}jjEsb&c.drm_connector_helper_detect_from_ddcasbuh1hhj Fubj )}(h h]h }(hjMFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Fubj)}(hjOh]h*}(hj[FhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj Fubj )}(h connectorh]h connector}(hjhFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Fubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}Fubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}Fubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]jIF&c.drm_connector_helper_detect_from_ddcasbuh1hhj}Fubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}Fubj)}(hjOh]h*}(hjFhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj}Fubj )}(hctxh]hctx}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}Fubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubj)}(h bool forceh](j)}(hjIh]hbool}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj )}(hforceh]hforce}(hj GhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubeh}(h]h ]h"]h$]h&]j j uh1jhjEhhhjEhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjEhhhjEhMubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j{ hjEhMhjEhhubj )}(hhh]h)}(h&Read EDID and detect connector status.h]h&Read EDID and detect connector status.}(hj6GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhj3Ghhubah}(h]h ]h"]h$]h&]uh1j hjEhhhjEhMubeh}(h]h ](j functioneh"]h$]h&]j j j jNGj jNGj j j uh1jv hhhjZ!hNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` The connector ``struct drm_modeset_acquire_ctx *ctx`` Acquire context ``bool force`` Perform screen-destructive operations, if necessary **Description** Detects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure. **Return** The connector status as defined by enum drm_connector_status.h](h)}(h**Parameters**h]j )}(hjXGh]h Parameters}(hjZGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjRGubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` The connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjwGh]hstruct drm_connector *connector}(hjyGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjuGubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjqGubj| )}(hhh]h)}(h The connectorh]h The connector}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjGubah}(h]h ]h"]h$]h&]uh1j{ hjqGubeh}(h]h ]h"]h$]h&]uh1jY hjGhMhjnGubjZ )}(h8``struct drm_modeset_acquire_ctx *ctx`` Acquire context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjGh]h#struct drm_modeset_acquire_ctx *ctx}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjGubj| )}(hhh]h)}(hAcquire contexth]hAcquire context}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjGubah}(h]h ]h"]h$]h&]uh1j{ hjGubeh}(h]h ]h"]h$]h&]uh1jY hjGhMhjnGubjZ )}(hC``bool force`` Perform screen-destructive operations, if necessary h](j` )}(h``bool force``h]jf )}(hjGh]h bool force}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjGubj| )}(hhh]h)}(h3Perform screen-destructive operations, if necessaryh]h3Perform screen-destructive operations, if necessary}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjGubah}(h]h ]h"]h$]h&]uh1j{ hjGubeh}(h]h ]h"]h$]h&]uh1jY hjGhMhjnGubeh}(h]h ]h"]h$]h&]uh1jT hjRGubh)}(h**Description**h]j )}(hj$Hh]h Description}(hj&HhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"Hubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjRGubh)}(hDetects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure.h]hDetects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure.}(hj:HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chMhjRGubh)}(h **Return**h]j )}(hjKHh]hReturn}(hjMHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIHubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM"hjRGubh)}(h=The connector status as defined by enum drm_connector_status.h]h=The connector status as defined by enum drm_connector_status.}(hjaHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:371: ./drivers/gpu/drm/drm_probe_helper.chM#hjRGubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZ!hhhNhNubeh}(h]jah ]h"])output probing helper functions referenceah$]h&]uh1hhhhhhhhMnubh)}(hhh](h)}(hEDID Helper Functions Referenceh]hEDID Helper Functions Reference}(hjHhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj~HhhhhhMwubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_edid_decode_mfg_id (C function)c.drm_edid_decode_mfg_idhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h>const char * drm_edid_decode_mfg_id (u16 mfg_id, char vend[4])h]j )}(hIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Iubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubj)}(h char vend[4]h](j)}(hcharh]hchar}(hjWIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSIubj )}(h h]h }(hjeIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSIubj )}(hvendh]hvend}(hjsIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSIubj)}(hjHh]h[}(hjIhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjSIubjՕ)}(hjؕh]h4}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhjSIubj)}(hjIh]h]}(hjIhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjSIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubeh}(h]h ]h"]h$]h&]j j uh1jhjHhhhjHhM|ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhjHhM|ubah}(h]jHah ](j j eh"]h$]h&]j j )j huh1j{ hjHhM|hjHhhubj )}(hhh]h)}(hDecode the manufacturer IDh]hDecode the manufacturer ID}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhM|hjIhhubah}(h]h ]h"]h$]h&]uh1j hjHhhhjHhM|ubeh}(h]h ](j functioneh"]h$]h&]j j j jIj jIj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``u16 mfg_id`` The manufacturer ID ``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' terminationh](h)}(h**Parameters**h]j )}(hjIh]h Parameters}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjIubjU )}(hhh](jZ )}(h#``u16 mfg_id`` The manufacturer ID h](j` )}(h``u16 mfg_id``h]jf )}(hjJh]h u16 mfg_id}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhM}hjIubj| )}(hhh]h)}(hThe manufacturer IDh]hThe manufacturer ID}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhM}hjJubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjJhM}hjIubjZ )}(h\``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' terminationh](j` )}(h``char vend[4]``h]jf )}(hj>Jh]h char vend[4]}(hj@JhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj 0x09e52d08 **Return** a 32-bit ID per panel.h](h)}(h**Parameters**h]j )}(hjKh]h Parameters}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjJubjU )}(hhh](jZ )}(h5``vend_chr_0`` First character of the vendor string. h](j` )}(h``vend_chr_0``h]jf )}(hj!Kh]h vend_chr_0}(hj#KhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjKubj| )}(hhh]h)}(h%First character of the vendor string.h]h%First character of the vendor string.}(hj:KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6KhMhj7Kubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hj6KhMhjKubjZ )}(h6``vend_chr_1`` Second character of the vendor string. h](j` )}(h``vend_chr_1``h]jf )}(hjZKh]h vend_chr_1}(hj\KhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXKubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjTKubj| )}(hhh]h)}(h&Second character of the vendor string.h]h&Second character of the vendor string.}(hjsKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjoKhMhjpKubah}(h]h ]h"]h$]h&]uh1j{ hjTKubeh}(h]h ]h"]h$]h&]uh1jY hjoKhMhjKubjZ )}(h5``vend_chr_2`` Third character of the vendor string. h](j` )}(h``vend_chr_2``h]jf )}(hjKh]h vend_chr_2}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjKubj| )}(hhh]h)}(h%Third character of the vendor string.h]h%Third character of the vendor string.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMhjKubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjKhMhjKubjZ )}(h&``product_id`` The 16-bit product ID. h](j` )}(h``product_id``h]jf )}(hjKh]h product_id}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjKubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjKubj| )}(hhh]h)}(hThe 16-bit product ID.h]hThe 16-bit product ID.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMhjKubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjKhMhjKubeh}(h]h ]h"]h$]h&]uh1jT hjJubh)}(h**Description**h]j )}(hjLh]h Description}(hj LhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjJubh)}(hXThis is a macro so that it can be calculated at compile time and used as an initializer.h]hXThis is a macro so that it can be calculated at compile time and used as an initializer.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjJubjU )}(hhh]jZ )}(hLFor instance: drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08 h](j` )}(h For instance:h]h For instance:}(hj3LhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhj/Lubj| )}(hhh]h)}(h=drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08h]hIdrm_edid_encode_panel_id(‘B’, ‘O’, ‘E’, 0x2d08) => 0x09e52d08}(hjELhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjALhMhjBLubah}(h]h ]h"]h$]h&]uh1j{ hj/Lubeh}(h]h ]h"]h$]h&]uh1jY hjALhMhj,Lubah}(h]h ]h"]h$]h&]uh1jT hjJubh)}(h **Return**h]j )}(hjgLh]hReturn}(hjiLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeLubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjJubh)}(ha 32-bit ID per panel.h]ha 32-bit ID per panel.}(hj}LhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_edid_decode_panel_id (C function)c.drm_edid_decode_panel_idhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hKvoid drm_edid_decode_panel_id (u32 panel_id, char vend[4], u16 *product_id)h]j )}(hJvoid drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 *product_id)h](j)}(hvoidh]hvoid}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhjLhMubj )}(hdrm_edid_decode_panel_idh]j )}(hdrm_edid_decode_panel_idh]hdrm_edid_decode_panel_id}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLhhhjLhMubj)}(h-(u32 panel_id, char vend[4], u16 *product_id)h](j)}(h u32 panel_idh](h)}(hhh]j )}(hu32h]hu32}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLmodnameN classnameNj j )}j ]j)}jjLsbc.drm_edid_decode_panel_idasbuh1hhjLubj )}(h h]h }(hj MhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(hpanel_idh]hpanel_id}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(h char vend[4]h](j)}(hcharh]hchar}(hj3MhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/Mubj )}(h h]h }(hjAMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Mubj )}(hvendh]hvend}(hjOMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Mubj)}(hjHh]h[}(hj]MhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/MubjՕ)}(hjؕh]h4}(hjjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jԕhj/Mubj)}(hjIh]h]}(hjwMhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/Mubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(hu16 *product_idh](h)}(hhh]j )}(hu16h]hu16}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]jMc.drm_edid_decode_panel_idasbuh1hhjMubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjMubj )}(h product_idh]h product_id}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubeh}(h]h ]h"]h$]h&]j j uh1jhjLhhhjLhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjLhMubah}(h]jLah ](j j eh"]h$]h&]j j )j huh1j{ hjLhMhjLhhubj )}(hhh]h)}(h1Decode a panel ID from drm_edid_encode_panel_id()h]h1Decode a panel ID from drm_edid_encode_panel_id()}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjMhhubah}(h]h ]h"]h$]h&]uh1j hjLhhhjLhMubeh}(h]h ](j functioneh"]h$]h&]j j j j Nj j Nj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``u32 panel_id`` The panel ID to decode. ``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' termination ``u16 *product_id`` The product ID will be returned here. **Description** For instance, after: drm_edid_decode_panel_id(0x09e52d08, vend, :c:type:`product_id`) These will be true: vend[0] = 'B' vend[1] = 'O' vend[2] = 'E' vend[3] = '\0' product_id = 0x2d08h](h)}(h**Parameters**h]j )}(hjNh]h Parameters}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjNubjU )}(hhh](jZ )}(h)``u32 panel_id`` The panel ID to decode. h](j` )}(h``u32 panel_id``h]jf )}(hj6Nh]h u32 panel_id}(hj8NhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4Nubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhj0Nubj| )}(hhh]h)}(hThe panel ID to decode.h]hThe panel ID to decode.}(hjONhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKNhMhjLNubah}(h]h ]h"]h$]h&]uh1j{ hj0Nubeh}(h]h ]h"]h$]h&]uh1jY hjKNhMhj-NubjZ )}(h]``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' termination h](j` )}(h``char vend[4]``h]jf )}(hjoNh]h char vend[4]}(hjqNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjmNubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjiNubj| )}(hhh]h)}(hKA 4-byte buffer to store the 3-letter vendor string plus a '\0' terminationh]hOA 4-byte buffer to store the 3-letter vendor string plus a ‘0’ termination}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjNubah}(h]h ]h"]h$]h&]uh1j{ hjiNubeh}(h]h ]h"]h$]h&]uh1jY hjNhMhj-NubjZ )}(h:``u16 *product_id`` The product ID will be returned here. h](j` )}(h``u16 *product_id``h]jf )}(hjNh]hu16 *product_id}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjNubj| )}(hhh ]h)}(h%The product ID will be returned here.h]h%The product ID will be returned here.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhMhjNubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjNhMhj-Nubeh}(h]h ]h"]h$]h&]uh1jT hjNubh)}(h**Description**h]j )}(hjNh]h Description}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjNubjU )}(hhh](jZ )}(hUFor instance, after: drm_edid_decode_panel_id(0x09e52d08, vend, :c:type:`product_id`)h](j` )}(hFor instance, after:h]hFor instance, after:}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjNubj| )}(hhh]h)}(h@drm_edid_decode_panel_id(0x09e52d08, vend, :c:type:`product_id`)h](h+drm_edid_decode_panel_id(0x09e52d08, vend, }(hjOhhhNhNubh)}(h:c:type:`product_id`h]jf )}(hjOh]h product_id}(hjOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j product_iduh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjOubh)}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:OhMhjOubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjOhMhjNubjZ )}(h`These will be true: vend[0] = 'B' vend[1] = 'O' vend[2] = 'E' vend[3] = '\0' product_id = 0x2d08h](j` )}(hThese will be true:h]hThese will be true:}(hjUOhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjQOubj| )}(hhh]h)}(hLvend[0] = 'B' vend[1] = 'O' vend[2] = 'E' vend[3] = '\0' product_id = 0x2d08h]h\vend[0] = ‘B’ vend[1] = ‘O’ vend[2] = ‘E’ vend[3] = ‘0’ product_id = 0x2d08}(hjgOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./include/drm/drm_edid.hhMhjdOubah}(h]h ]h"]h$]h&]uh1j{ hjQOubeh}(h]h ]h"]h$]h&]uh1jY hjcOhMhjNubeh}(h]h ]h"]h$]h&]uh1jT hjNubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_edid_header_is_valid (C function)c.drm_edid_header_is_validhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h0int drm_edid_header_is_valid (const void *_edid)h]j )}(h/int drm_edid_header_is_valid(const void *_edid)h](j)}(hinth]hint}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOhhhjOhM ubj )}(hdrm_edid_header_is_validh]j )}(hdrm_edid_header_is_validh]hdrm_edid_header_is_valid}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hjOhhhjOhM ubj)}(h(const void *_edid)h]j)}(hconst void *_edidh](j )}(hjAh]hconst}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj)}(hvoidh]hvoid}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj)}(hjOh]h*}(hjPhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjOubj )}(h_edidh]h_edid}(hj)PhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubah}(h]h ]h"]h$]h&]j j uh1jhjOhhhjOhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjOhhhjOhM ubah}(h]jOah ](j j eh"]h$]h&]j j )j huh1j{ hjOhM hjOhhubj )}(hhh]h)}(h.sanity check the header of the base EDID blockh]h.sanity check the header of the base EDID block}(hjSPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjPPhhubah}(h]h ]h"]h$]h&]uh1j hjOhhhjOhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jkPj jkPj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const void *_edid`` pointer to raw base EDID block **Description** Sanity check the header of the base EDID block. **Return** 8 if the header is perfect, down to 0 if it's totally wrong.h](h)}(h**Parameters**h]j )}(hjuPh]h Parameters}(hjwPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsPubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjoPubjU )}(hhh]jZ )}(h5``const void *_edid`` pointer to raw base EDID block h](j` )}(h``const void *_edid``h]jf )}(hjPh]hconst void *_edid}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjPubj| )}(hhh]h)}(hpointer to raw base EDID blockh]hpointer to raw base EDID block}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhM hjPubah}(h]h ]h"]h$]h&]uh1j{ hjPubeh}(h]h ]h"]h$]h&]uh1jY hjPhM hjPubah}(h]h ]h"]h$]h&]uh1jT hjoPubh)}(h**Description**h]j )}(hjPh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjoPubh)}(h/Sanity check the header of the base EDID block.h]h/Sanity check the header of the base EDID block.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjoPubh)}(h **Return**h]j )}(hjPh]hReturn}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjoPubh)}(h<8 if the header is perfect, down to 0 if it's totally wrong.h]h>8 if the header is perfect, down to 0 if it’s totally wrong.}(hj QhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjoPubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_is_valid (C function)c.drm_edid_is_validhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h*bool drm_edid_is_valid (struct edid *edid)h]j )}(h)bool drm_edid_is_valid(struct edid *edid)h](j)}(hjIh]hbool}(hj;QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7Qhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjIQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7QhhhjHQhM ubj )}(hdrm_edid_is_validh]j )}(hdrm_edid_is_validh]hdrm_edid_is_valid}(hj[QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWQubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7QhhhjHQhM ubj)}(h(struct edid *edid)h]j)}(hstruct edid *edidh](j )}(hj h]hstruct}(hjwQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsQubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsQubh)}(hhh]j )}(hedidh]hedid}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQmodnameN classnameNj j )}j ]j)}jj]Qsbc.drm_edid_is_validasbuh1hhjsQubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsQubj)}(hjOh]h*}(hjQhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjsQubj )}(hedidh]hedid}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoQubah}(h]h ]h"]h$]h&]j j uh1jhj7QhhhjHQhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3QhhhjHQhM ubah}(h]j.Qah ](j j eh"]h$]h&]j j )j huh1j{ hjHQhM hj0Qhhubj )}(hhh]h)}(hsanity check EDID datah]hsanity check EDID data}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjQhhubah}(h]h ]h"]h$]h&]uh1j hj0QhhhjHQhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jRj jRj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``struct edid *edid`` EDID data **Description** Sanity-check an entire EDID record (including extensions) **Return** True if the EDID data is valid, false otherwise.h](h)}(h**Parameters**h]j )}(hjRh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjRubjU )}(hhh]jZ )}(h ``struct edid *edid`` EDID data h](j` )}(h``struct edid *edid``h]jf )}(hj;Rh]hstruct edid *edid}(hj=RhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9Rubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj5Rubj| )}(hhh]h)}(h EDID datah]h EDID data}(hjTRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPRhM hjQRubah}(h]h ]h"]h$]h&]uh1j{ hj5Rubeh}(h]h ]h"]h$]h&]uh1jY hjPRhM hj2Rubah}(h]h ]h"]h$]h&]uh1jT hjRubh)}(h**Description**h]j )}(hjvRh]h Description}(hjxRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtRubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjRubh)}(h9Sanity-check an entire EDID record (including extensions)h]h9Sanity-check an entire EDID record (including extensions)}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjRubh)}(h **Return**h]j )}(hjRh]hReturn}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjRubh)}(h0True if the EDID data is valid, false otherwise.h]h0True if the EDID data is valid, false otherwise.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjRubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_valid (C function)c.drm_edid_validhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h5bool drm_edid_valid (const struct drm_edid *drm_edid)h]j )}(h4bool drm_edid_valid(const struct drm_edid *drm_edid)h](j)}(hjIh]hbool}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM$ubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRhhhjRhM$ubj )}(hdrm_edid_validh]j )}(hdrm_edid_validh]hdrm_edid_valid}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ](j j eh"]h$]h&]j j uh1j hjRhhhjRhM$ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hj+ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(hj h]hstruct}(hj9ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjFShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjWShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTSubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYSmodnameN classnameNj j )}j ]j)}jjSsbc.drm_edid_validasbuh1hhjSubj )}(h h]h }(hjwShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj)}(hjOh]h*}(hjShhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjSubj )}(hdrm_edidh]hdrm_edid}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjSubah}(h]h ]h"]h$]h&]j j uh1jhjRhhhjRhM$ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjRhhhjRhM$ubah}(h]jRah ](j j eh"]h$]h&]j j )j huh1j{ hjRhM$hjRhhubj )}(hhh]h)}(hsanity check EDID datah]hsanity check EDID data}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM$hjShhubah}(h]h ]h"]h$]h&]uh1j hjRhhhjRhM$ubeh}(h]h ](j functioneh"]h$]h&]j j j jSj jSj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const struct drm_edid *drm_edid`` EDID data **Description** Sanity check an EDID. Cross check block count against allocated size and checksum the blocks. **Return** True if the EDID data is valid, false otherwise.h](h)}(h**Parameters**h]j )}(hjSh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM(hjSubjU )}(hhh]jZ )}(h.``const struct drm_edid *drm_edid`` EDID data h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjSh]hconst struct drm_edid *drm_edid}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjSubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM%hjSubj| )}(hhh]h)}(h EDID datah]h EDID data}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThM%hjTubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjThM%hjSubah}(h]h ]h"]h$]h&]uh1jT hjSubh)}(h**Description**h]j )}(hj8Th]h Description}(hj:ThhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6Tubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM'hjSubh)}(h]Sanity check an EDID. Cross check block count against allocated size and checksum the blocks.h]h]Sanity check an EDID. Cross check block count against allocated size and checksum the blocks.}(hjNThhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM&hjSubh)}(h **Return**h]j )}(hj_Th]hReturn}(hjaThhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]Tubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM)hjSubh)}(h0True if the EDID data is valid, false otherwise.h]h0True if the EDID data is valid, false otherwise.}(hjuThhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM*hjSubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_edid_override_connector_update (C function)$c.drm_edid_override_connector_updatehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hHint drm_edid_override_connector_update (struct drm_connector *connector)h]j )}(hGint drm_edid_override_connector_update(struct drm_connector *connector)h](j)}(hinth]hint}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjThhhjThM ubj )}(h"drm_edid_override_connector_updateh]j )}(h"drm_edid_override_connector_updateh]h"drm_edid_override_connector_update}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hjThhhjThM ubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]j)}jjTsb$c.drm_edid_override_connector_updateasbuh1hhjTubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj)}(hjOh]h*}(hj-UhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjTubj )}(h connectorh]h connector}(hj:UhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjTubah}(h]h ]h"]h$]h&]j j uh1jhjThhhjThM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjThhhjThM ubah}(h]jTah ](j j eh"]h$]h&]j j )j huh1j{ hjThM hjThhubj )}(hhh]h)}(h%add modes from override/firmware EDIDh]h%add modes from override/firmware EDID}(hjdUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjaUhhubah}(h]h ]h"]h$]h&]uh1j hjThhhjThM ubeh}(h]h ](j functioneh"]h$]h&]j j j j|Uj j|Uj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing **Description** Add modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped. **Return** The number of modes added or 0 if we couldn't find any.h](h)}(h**Parameters**h]j )}(hjUh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjUubjU )}(hhh]jZ )}(h<``struct drm_connector *connector`` connector we're probing h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjUh]hstruct drm_connector *connector}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjUubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjUubj| )}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhM hjUubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjUhM hjUubah}(h]h ]h"]h$]h&]uh1jT hjUubh)}(h**Description**h]j )}(hjUh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjUubh)}(hAdd modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped.h]hAdd modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjUubh)}(h **Return**h]j )}(hjVh]hReturn}(hj VhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjUubh)}(h7The number of modes added or 0 if we couldn't find any.h]h9The number of modes added or 0 if we couldn’t find any.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjUubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_raw (C function)c.drm_edid_rawhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hBconst struct edid * drm_edid_raw (const struct drm_edid *drm_edid)h]j )}(h@const struct edid *drm_edid_raw(const struct drm_edid *drm_edid)h](j )}(hjAh]hconst}(hjLVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHVhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjZVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHVhhhjYVhM ubj )}(hj h]hstruct}(hjhVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHVhhhjYVhM ubj )}(h h]h }(hjuVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHVhhhjYVhM ubh)}(hhh]j )}(hedidh]hedid}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjVmodnameN classnameNj j )}j ]j)}j drm_edid_rawsbc.drm_edid_rawasbuh1hhjHVhhhjYVhM ubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHVhhhjYVhM ubj)}(hjOh]h*}(hjVhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjHVhhhjYVhM ubj )}(h drm_edid_rawh]j )}(hjVh]h drm_edid_raw}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ](j j eh"]h$]h&]j j uh1j hjHVhhhjYVhM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hj WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]jVc.drm_edid_rawasbuh1hhjVubj )}(h h]h }(hj8WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj)}(hjOh]h*}(hjFWhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjVubj )}(hdrm_edidh]hdrm_edid}(hjSWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubah}(h]h ]h"]h$]h&]j j uh1jhjHVhhhjYVhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjDVhhhjYVhM ubah}(h]j?Vah ](j j eh"]h$]h&]j j )j huh1j{ hjYVhM hjAVhhubj )}(hhh]h)}(h#Get a pointer to the raw EDID data.h]h#Get a pointer to the raw EDID data.}(hj}WhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjzWhhubah}(h]h ]h"]h$]h&]uh1j hjAVhhhjYVhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jWj jWj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const struct drm_edid *drm_edid`` drm_edid container **Description** Get a pointer to the raw EDID data. This is for transition only. Avoid using this like the plague. **Return** Pointer to raw EDID data.h](h)}(h**Parameters**h]j )}(hjWh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjWubjU )}(hhh]jZ )}(h7``const struct drm_edid *drm_edid`` drm_edid container h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjWh]hconst struct drm_edid *drm_edid}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjWubj| )}(hhh]h)}(hdrm_edid containerh]hdrm_edid container}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhM hjWubah}(h]h ]h"]h$]h&]uh1j{ hjWubeh}(h]h ]h"]h$]h&]uh1jY hjWhM hjWubah}(h]h ]h"]h$]h&]uh1jT hjWubh)}(h**Description**h]j )}(hjWh]h Description}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjWubh)}(h#Get a pointer to the raw EDID data.h]h#Get a pointer to the raw EDID data.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjWubh)}(h>This is for transition only. Avoid using this like the plague.h]h>This is for transition only. Avoid using this like the plague.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjWubh)}(h **Return**h]j )}(hj/Xh]hReturn}(hj1XhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-Xubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjWubh)}(hPointer to raw EDID data.h]hPointer to raw EDID data.}(hjEXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjWubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_alloc (C function)c.drm_edid_allochNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hFconst struct drm_edid * drm_edid_alloc (const void *edid, size_t size)h]j )}(hDconst struct drm_edid *drm_edid_alloc(const void *edid, size_t size)h](j )}(hjAh]hconst}(hjtXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpXhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpXhhhjXhM ubj )}(hj h]hstruct}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpXhhhjXhM ubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpXhhhjXhM ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjXmodnameN classnameNj j )}j ]j)}jdrm_edid_allocsbc.drm_edid_allocasbuh1hhjpXhhhjXhM ubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpXhhhjXhM ubj)}(hjOh]h*}(hjXhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjpXhhhjXhM ubj )}(hdrm_edid_alloch]j )}(hjXh]hdrm_edid_alloc}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ](j j eh"]h$]h&]j j uh1j hjpXhhhjXhM ubj)}(h(const void *edid, size_t size)h](j)}(hconst void *edidh](j )}(hjAh]hconst}(hj YhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj)}(hvoidh]hvoid}(hj$YhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj )}(h h]h }(hj2YhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj)}(hjOh]h*}(hj@YhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjYubj )}(hedidh]hedid}(hjMYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjiYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfYubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkYmodnameN classnameNj j )}j ]jXc.drm_edid_allocasbuh1hhjbYubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbYubj )}(hsizeh]hsize}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubeh}(h]h ]h"]h$]h&]j j uh1jhjpXhhhjXhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjlXhhhjXhM ubah}(h]jgXah ](j j eh"]h$]h&]j j )j huh1j{ hjXhM hjiXhhubj )}(hhh]h)}(h!Allocate a new drm_edid containerh]h!Allocate a new drm_edid container}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYhhubah}(h]h ]h"]h$]h&]uh1j hjiXhhhjXhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jYj jYj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``const void *edid`` Pointer to raw EDID data ``size_t size`` Size of memory allocated for EDID **Description** Allocate a new drm_edid container. Do not calculate edid size from edid, pass the actual size that has been allocated for the data. There is no validation of the raw EDID data against the size, but at least the EDID base block must fit in the buffer. The returned pointer must be freed using drm_edid_free(). **Return** drm_edid container, or NULL on errorsh](h)}(h**Parameters**h]j )}(hjYh]h Parameters}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYubjU )}(hhh](jZ )}(h.``const void *edid`` Pointer to raw EDID data h](j` )}(h``const void *edid``h]jf )}(hjZh]hconst void *edid}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYubj| )}(hhh]h)}(hPointer to raw EDID datah]hPointer to raw EDID data}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhM hjZubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjZhM hjYubjZ )}(h2``size_t size`` Size of memory allocated for EDID h](j` )}(h``size_t size``h]jf )}(hj9Zh]h size_t size}(hj;ZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj7Zubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj3Zubj| )}(hhh]h)}(h!Size of memory allocated for EDIDh]h!Size of memory allocated for EDID}(hjRZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNZhM hjOZubah}(h]h ]h"]h$]h&]uh1j{ hj3Zubeh}(h]h ]h"]h$]h&]uh1jY hjNZhM hjYubeh}(h]h ]h"]h$]h&]uh1jT hjYubh)}(h**Description**h]j )}(hjtZh]h Description}(hjvZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrZubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYubh)}(hAllocate a new drm_edid container. Do not calculate edid size from edid, pass the actual size that has been allocated for the data. There is no validation of the raw EDID data against the size, but at least the EDID base block must fit in the buffer.h]hAllocate a new drm_edid container. Do not calculate edid size from edid, pass the actual size that has been allocated for the data. There is no validation of the raw EDID data against the size, but at least the EDID base block must fit in the buffer.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYubh)}(h **Return**h]j )}(hjZh]hReturn}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYubh)}(h%drm_edid container, or NULL on errorsh]h%drm_edid container, or NULL on errors}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_dup (C function)c.drm_edid_duphNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hFconst struct drm_edid * drm_edid_dup (const struct drm_edid *drm_edid)h]j )}(hDconst struct drm_edid *drm_edid_dup(const struct drm_edid *drm_edid)h](j )}(hjAh]hconst}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubj )}(hj h]hstruct}(hj [hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj)[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+[modnameN classnameNj j )}j ]j)}j drm_edid_dupsbc.drm_edid_dupasbuh1hhjZhhhjZhM ubj )}(h h]h }(hjJ[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubj)}(hjOh]h*}(hjX[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZhhhjZhM ubj )}(h drm_edid_duph]j )}(hjG[h]h drm_edid_dup}(hji[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hje[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZhhhjZhM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(hj h]hstruct}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]jE[c.drm_edid_dupasbuh1hhj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(hdrm_edidh]hdrm_edid}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|[ubah}(h]h ]h"]h$]h&]j j uh1jhjZhhhjZhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZhhhjZhM ubah}(h]jZah ](j j eh"]h$]h&]j j )j huh1j{ hjZhM hjZhhubj )}(hhh]h)}(hDuplicate a drm_edid containerh]hDuplicate a drm_edid container}(hj \hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj\hhubah}(h]h ]h"]h$]h&]uh1j hjZhhhjZhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j8\j j8\j j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const struct drm_edid *drm_edid`` EDID to duplicate **Description** The returned pointer must be freed using drm_edid_free(). **Return** drm_edid container copy, or NULL on errorsh](h)}(h**Parameters**h]j )}(hjB\h]h Parameters}(hjD\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@\ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj<\ubjU )}(hhh]jZ )}(h6``const struct drm_edid *drm_edid`` EDID to duplicate h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hja\h]hconst struct drm_edid *drm_edid}(hjc\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj_\ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj[\ubj| )}(hhh]h)}(hEDID to duplicateh]hEDID to duplicate}(hjz\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjv\hM hjw\ubah}(h]h ]h"]h$]h&]uh1j{ hj[\ubeh}(h]h ]h"]h$]h&]uh1jY hjv\hM hjX\ubah}(h]h ]h"]h$]h&]uh1jT hj<\ubh)}(h**Description**h]j )}(hj\h]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj<\ubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj<\ubh)}(h **Return**h]j )}(hj\h]hReturn}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj<\ubh)}(h*drm_edid container copy, or NULL on errorsh]h*drm_edid container copy, or NULL on errors}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj<\ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_free (C function)c.drm_edid_freehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h4void drm_edid_free (const struct drm_edid *drm_edid)h]j )}(h3void drm_edid_free(const struct drm_edid *drm_edid)h](j)}(hvoidh]hvoid}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]hhhj]hM ubj )}(h drm_edid_freeh]j )}(h drm_edid_freeh]h drm_edid_free}(hj)]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj]hhhj]hM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjE]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubj )}(h h]h }(hjR]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubj )}(hj h]hstruct}(hj`]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubj )}(h h]h }(hjm]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj~]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j)}jj+]sbc.drm_edid_freeasbuh1hhjA]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubj)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjA]ubj )}(hdrm_edidh]hdrm_edid}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=]ubah}(h]h ]h"]h$]h&]j j uh1jhj]hhhj]hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj]hhhj]hM ubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j{ hj]hM hj\hhubj )}(hhh]h)}(hFree the drm_edid containerh]hFree the drm_edid container}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj]hhubah}(h]h ]h"]h$]h&]uh1j hj\hhhj]hM ubeh}(h]h ](j functioneh"]h$]h&]j j j j]j j]j j j uh1jv hhhj~HhNhNubj )}(hB**Parameters** ``const struct drm_edid *drm_edid`` EDID to freeh](h)}(h**Parameters**h]j )}(hj^h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM! hj]ubjU )}(hhh]jZ )}(h0``const struct drm_edid *drm_edid`` EDID to freeh](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hj$^h]hconst struct drm_edid *drm_edid}(hj&^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj"^ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM# hj^ubj| )}(hhh]h)}(h EDID to freeh]h EDID to free}(hj=^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj:^ubah}(h]h ]h"]h$]h&]uh1j{ hj^ubeh}(h]h ]h"]h$]h&]uh1jY hj9^hM# hj^ubah}(h]h ]h"]h$]h&]uh1jT hj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_probe_ddc (C function)c.drm_probe_ddchNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h0bool drm_probe_ddc (struct i2c_adapter *adapter)h]j )}(h/bool drm_probe_ddc(struct i2c_adapter *adapter)h](j)}(hjIh]hbool}(hj~^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz^hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM+ ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz^hhhj^hM+ ubj )}(h drm_probe_ddch]j )}(h drm_probe_ddch]h drm_probe_ddc}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjz^hhhj^hM+ ubj)}(h(struct i2c_adapter *adapter)h]j)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j)}jj^sbc.drm_probe_ddcasbuh1hhj^ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj^ubj )}(hadapterh]hadapter}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj^ubah}(h]h ]h"]h$]h&]j j uh1jhjz^hhhj^hM+ ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjv^hhhj^hM+ ubah}(h]jq^ah ](j j eh"]h$]h&]j j )j huh1j{ hj^hM+ hjs^hhubj )}(hhh]h)}(hprobe DDC presenceh]hprobe DDC presence}(hj=_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM+ hj:_hhubah}(h]h ]h"]h$]h&]uh1j hjs^hhhj^hM+ ubeh}(h]h ](j functioneh"]h$]h&]j j j jU_j jU_j j j uh1jv hhhj~HhNhNubj )}(hv**Parameters** ``struct i2c_adapter *adapter`` I2C adapter to probe **Return** True on success, false on failure.h](h)}(h**Parameters**h]j )}(hj__h]h Parameters}(hja_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM/ hjY_ubjU )}(hhh]jZ )}(h5``struct i2c_adapter *adapter`` I2C adapter to probe h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hj~_h]hstruct i2c_adapter *adapter}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj|_ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM, hjx_ubj| )}(hhh]h)}(hI2C adapter to probeh]hI2C adapter to probe}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hM, hj_ubah}(h]h ]h"]h$]h&]uh1j{ hjx_ubeh}(h]h ]h"]h$]h&]uh1jY hj_hM, hju_ubah}(h]h ]h"]h$]h&]uh1jT hjY_ubh)}(h **Return**h]j )}(hj_h]hReturn}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM. hjY_ubh)}(h"True on success, false on failure.h]h"True on success, false on failure.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM. hjY_ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_get_edid (C function)c.drm_get_edidhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hYstruct edid * drm_get_edid (struct drm_connector *connector, struct i2c_adapter *adapter)h]j )}(hWstruct edid *drm_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)h](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM: ubj )}(h h]h }(hj `hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhj `hM: ubh)}(hhh]j )}(hedidh]hedid}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j)}j drm_get_edidsbc.drm_get_edidasbuh1hhj_hhhj `hM: ubj )}(h h]h }(hj>`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhj `hM: ubj)}(hjOh]h*}(hjL`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_hhhj `hM: ubj )}(h drm_get_edidh]j )}(hj;`h]h drm_get_edid}(hj]`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY`ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_hhhj `hM: ubj)}(h>(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjx`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt`ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt`ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j9`c.drm_get_edidasbuh1hhjt`ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt`ubj)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjt`ubj )}(h connectorh]h connector}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjp`ubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j9`c.drm_get_edidasbuh1hhj`ubj )}(h h]h }(hj$ahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hjOh]h*}(hj2ahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj )}(hadapterh]hadapter}(hj?ahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjp`ubeh}(h]h ]h"]h$]h&]j j uh1jhj_hhhj `hM: ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj_hhhj `hM: ubah}(h]j_ah ](j j eh"]h$]h&]j j )j huh1j{ hj `hM: hj_hhubj )}(hhh]h)}(hget EDID data, if availableh]hget EDID data, if available}(hjiahhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM: hjfahhubah}(h]h ]h"]h$]h&]uh1j hj_hhhj `hM: ubeh}(h]h ](j functioneh"]h$]h&]j j j jaj jaj j j uh1jv hhhj~HhNhNubj )}(hXB**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Poke the given I2C channel to grab EDID data if possible. If found, attach it to the connector. **Return** Pointer to valid EDID or NULL if we couldn't find any.h](h)}(h**Parameters**h]j )}(hjah]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM> hjaubjU )}(hhh](jZ )}(h<``struct drm_connector *connector`` connector we're probing h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjah]hstruct drm_connector *connector}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM; hjaubj| )}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahM; hjaubah}(h]h ]h"]h$]h&]uh1j{ hjaubeh}(h]h ]h"]h$]h&]uh1jY hjahM; hjaubjZ )}(h;``struct i2c_adapter *adapter`` I2C adapter to use for DDC h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjah]hstruct i2c_adapter *adapter}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM< hjaubj| )}(hhh]h)}(hI2C adapter to use for DDCh]hI2C adapter to use for DDC}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahM< hjaubah}(h]h ]h"]h$]h&]uh1j{ hjaubeh}(h]h ]h"]h$]h&]uh1jY hjahM< hjaubeh}(h]h ]h"]h$]h&]uh1jT hjaubh)}(h**Description**h]j )}(hjbh]h Description}(hj bhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM> hjaubh)}(h`Poke the given I2C channel to grab EDID data if possible. If found, attach it to the connector.h]h`Poke the given I2C channel to grab EDID data if possible. If found, attach it to the connector.}(hj4bhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM= hjaubh)}(h **Return**h]j )}(hjEbh]hReturn}(hjGbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCbubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM@ hjaubh)}(h6Pointer to valid EDID or NULL if we couldn't find any.h]h8Pointer to valid EDID or NULL if we couldn’t find any.}(hj[bhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMA hjaubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_edid_read_custom (C function)c.drm_edid_read_customhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hwconst struct drm_edid * drm_edid_read_custom (struct drm_connector *connector, read_block_fn read_block, void *context)h]j )}(huconst struct drm_edid *drm_edid_read_custom(struct drm_connector *connector, read_block_fn read_block, void *context)h](j )}(hjAh]hconst}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMU ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbhhhjbhMU ubj )}(hj h]hstruct}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbhhhjbhMU ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbhhhjbhMU ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbmodnameN classnameNj j )}j ]j)}jdrm_edid_read_customsbc.drm_edid_read_customasbuh1hhjbhhhjbhMU ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbhhhjbhMU ubj)}(hjOh]h*}(hjbhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjbhhhjbhMU ubj )}(hdrm_edid_read_customh]j )}(hjbh]hdrm_edid_read_custom}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ](j j eh"]h$]h&]j j uh1j hjbhhhjbhMU ubj)}(hJ(struct drm_connector *connector, read_block_fn read_block, void *context)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj )}(h h]h }(hj,chhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj=chhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:cubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?cmodnameN classnameNj j )}j ]jbc.drm_edid_read_customasbuh1hhjcubj )}(h h]h }(hj[chhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj)}(hjOh]h*}(hjichhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjcubj )}(h connectorh]h connector}(hjvchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubj)}(hread_block_fn read_blockh](h)}(hhh]j )}(h read_block_fnh]h read_block_fn}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]jbc.drm_edid_read_customasbuh1hhjcubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj )}(h read_blockh]h read_block}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubj)}(h void *contexth](j)}(hvoidh]hvoid}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj)}(hjOh]h*}(hjchhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjcubj )}(hcontexth]hcontext}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubeh}(h]h ]h"]h$]h&]j j uh1jhjbhhhjbhMU ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjbhhhjbhMU ubah}(h]j}bah ](j j eh"]h$]h&]j j )j huh1j{ hjbhMU hjbhhubj )}(hhh]h)}(h3Read EDID data using given EDID block read functionh]h3Read EDID data using given EDID block read function}(hj*dhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMU hj'dhhubah}(h]h ]h"]h$]h&]uh1j hjbhhhjbhMU ubeh}(h]h ](j functioneh"]h$]h&]j j j jBdj jBdj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` Connector to use ``read_block_fn read_block`` EDID block read function ``void *context`` Private data passed to the block read function **Description** When the I2C adapter connected to the DDC bus is hidden behind a device that exposes a different interface to read EDID blocks this function can be used to get EDID data using a custom block read function. As in the general case the DDC bus is accessible by the kernel at the I2C level, drivers must make all reasonable efforts to expose it as an I2C adapter and use drm_edid_read() or drm_edid_read_ddc() instead of abusing this function. The EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads. The returned pointer must be freed using drm_edid_free(). **Return** Pointer to EDID, or NULL if probe/read failed.h](h)}(h**Parameters**h]j )}(hjLdh]h Parameters}(hjNdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJdubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMY hjFdubjU )}(hhh](jZ )}(h5``struct drm_connector *connector`` Connector to use h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjkdh]hstruct drm_connector *connector}(hjmdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjidubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMV hjedubj| )}(hhh]h)}(hConnector to useh]hConnector to use}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMV hjdubah}(h]h ]h"]h$]h&]uh1j{ hjedubeh}(h]h ]h"]h$]h&]uh1jY hjdhMV hjbdubjZ )}(h6``read_block_fn read_block`` EDID block read function h](j` )}(h``read_block_fn read_block``h]jf )}(hjdh]hread_block_fn read_block}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMW hjdubj| )}(hhh]h)}(hEDID block read functionh]hEDID block read function}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMW hjdubah}(h]h ]h"]h$]h&]uh1j{ hjdubeh}(h]h ]h"]h$]h&]uh1jY hjdhMW hjbdubjZ )}(hA``void *context`` Private data passed to the block read function h](j` )}(h``void *context``h]jf )}(hjdh]h void *context}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMX hjdubj| )}(hhh]h)}(h.Private data passed to the block read functionh]h.Private data passed to the block read function}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMX hjdubah}(h]h ]h"]h$]h&]uh1j{ hjdubeh}(h]h ]h"]h$]h&]uh1jY hjdhMX hjbdubeh}(h]h ]h"]h$]h&]uh1jT hjFdubh)}(h**Description**h]j )}(hjeh]h Description}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMZ hjFdubh)}(hWhen the I2C adapter connected to the DDC bus is hidden behind a device that exposes a different interface to read EDID blocks this function can be used to get EDID data using a custom block read function.h]hWhen the I2C adapter connected to the DDC bus is hidden behind a device that exposes a different interface to read EDID blocks this function can be used to get EDID data using a custom block read function.}(hj.ehhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMY hjFdubh)}(hAs in the general case the DDC bus is accessible by the kernel at the I2C level, drivers must make all reasonable efforts to expose it as an I2C adapter and use drm_edid_read() or drm_edid_read_ddc() instead of abusing this function.h]hAs in the general case the DDC bus is accessible by the kernel at the I2C level, drivers must make all reasonable efforts to expose it as an I2C adapter and use drm_edid_read() or drm_edid_read_ddc() instead of abusing this function.}(hj=ehhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM] hjFdubh)}(hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.h]hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.}(hjLehhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMb hjFdubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hj[ehhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMf hjFdubh)}(h **Return**h]j )}(hjleh]hReturn}(hjnehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjeubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMh hjFdubh)}(h.Pointer to EDID, or NULL if probe/read failed.h]h.Pointer to EDID, or NULL if probe/read failed.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMi hjFdubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_read_ddc (C function)c.drm_edid_read_ddchNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hhconst struct drm_edid * drm_edid_read_ddc (struct drm_connector *connector, struct i2c_adapter *adapter)h]j )}(hfconst struct drm_edid *drm_edid_read_ddc(struct drm_connector *connector, struct i2c_adapter *adapter)h](j )}(hjAh]hconst}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjehM ubj )}(hj h]hstruct}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjehM ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjehM ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjemodnameN classnameNj j )}j ]j)}jdrm_edid_read_ddcsbc.drm_edid_read_ddcasbuh1hhjehhhjehM ubj )}(h h]h }(hj fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjehM ubj)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjehhhjehM ubj )}(hdrm_edid_read_ddch]j )}(hj fh]hdrm_edid_read_ddc}(hj+fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'fubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjehM ubj)}(h>(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjFfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBfubj )}(h h]h }(hjSfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBfubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjdfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjafubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjffmodnameN classnameNj j )}j ]jfc.drm_edid_read_ddcasbuh1hhjBfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBfubj)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjBfubj )}(h connectorh]h connector}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>fubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]jfc.drm_edid_read_ddcasbuh1hhjfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(hjOh]h*}(hjghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfubj )}(hadapterh]hadapter}(hj ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>fubeh}(h]h ]h"]h$]h&]j j uh1jhjehhhjehM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjehhhjehM ubah}(h]jeah ](j j eh"]h$]h&]j j )j huh1j{ hjehM hjehhubj )}(hhh]h)}(h&Read EDID data using given I2C adapterh]h&Read EDID data using given I2C adapter}(hj7ghhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj4ghhubah}(h]h ]h"]h$]h&]uh1j hjehhhjehM ubeh}(h]h ](j functioneh"]h$]h&]j j j jOgj jOgj j j uh1jv hhhj~HhNhNubj )}(hX~**Parameters** ``struct drm_connector *connector`` Connector to use ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Read EDID using the given I2C adapter. The EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads. Prefer initializing connector->ddc with drm_connector_init_with_ddc() and using drm_edid_read() instead of this function. The returned pointer must be freed using drm_edid_free(). **Return** Pointer to EDID, or NULL if probe/read failed.h](h)}(h**Parameters**h]j )}(hjYgh]h Parameters}(hj[ghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWgubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubjU )}(hhh](jZ )}(h5``struct drm_connector *connector`` Connector to use h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjxgh]hstruct drm_connector *connector}(hjzghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvgubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjrgubj| )}(hhh]h)}(hConnector to useh]hConnector to use}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghM hjgubah}(h]h ]h"]h$]h&]uh1j{ hjrgubeh}(h]h ]h"]h$]h&]uh1jY hjghM hjogubjZ )}(h;``struct i2c_adapter *adapter`` I2C adapter to use for DDC h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjgh]hstruct i2c_adapter *adapter}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1je hjgubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjgubj| )}(hhh]h)}(hI2C adapter to use for DDCh]hI2C adapter to use for DDC}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghM hjgubah}(h]h ]h"]h$]h&]uh1j{ hjgubeh}(h]h ]h"]h$]h&]uh1jY hjghM hjogubeh}(h]h ]h"]h$]h&]uh1jT hjSgubh)}(h**Description**h]j )}(hjgh]h Description}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubh)}(h&Read EDID using the given I2C adapter.h]h&Read EDID using the given I2C adapter.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubh)}(hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.h]hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubh)}(hyPrefer initializing connector->ddc with drm_connector_init_with_ddc() and using drm_edid_read() instead of this function.h]hyPrefer initializing connector->ddc with drm_connector_init_with_ddc() and using drm_edid_read() instead of this function.}(hj hhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hj/hhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubh)}(h **Return**h]j )}(hj@hh]hReturn}(hjBhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>hubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubh)}(h.Pointer to EDID, or NULL if probe/read failed.h]h.Pointer to EDID, or NULL if probe/read failed.}(hjVhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjSgubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_read (C function)c.drm_edid_readhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hGconst struct drm_edid * drm_edid_read (struct drm_connector *connector)h]j )}(hEconst struct drm_edid *drm_edid_read(struct drm_connector *connector)h](j )}(hjAh]hconst}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjhhM ubj )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjhhM ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjhhM ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjhmodnameN classnameNj j )}j ]j)}j drm_edid_readsbc.drm_edid_readasbuh1hhjhhhhjhhM ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjhhM ubj)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhhjhhM ubj )}(h drm_edid_readh]j )}(hjhh]h drm_edid_read}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhhjhhM ubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hj'ihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj8ihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5iubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:imodnameN classnameNj j )}j ]jhc.drm_edid_readasbuh1hhjiubj )}(h h]h }(hjVihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(hjOh]h*}(hjdihhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjiubj )}(h connectorh]h connector}(hjqihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjiubah}(h]h ]h"]h$]h&]j j uh1jhjhhhhjhhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj}hhhhjhhM ubah}(h]jxhah ](j j eh"]h$]h&]j j )j huh1j{ hjhhM hjzhhhubj )}(hhh]h)}(h,Read EDID data using connector's I2C adapterh]h.Read EDID data using connector’s I2C adapter}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjihhubah}(h]h ]h"]h$]h&]uh1j hjzhhhhjhhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jij jij j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` Connector to use **Description** Read EDID using the connector's I2C adapter. The EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads. The returned pointer must be freed using drm_edid_free(). **Return** Pointer to EDID, or NULL if probe/read failed.h](h)}(h**Parameters**h]j )}(hjih]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjiubjU )}(hhh]jZ )}(h5``struct drm_connector *connector`` Connector to use h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjih]hstruct drm_connector *connector}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjiubj| )}(hhh]h)}(hConnector to useh]hConnector to use}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihM hjiubah}(h]h ]h"]h$]h&]uh1j{ hjiubeh}(h]h ]h"]h$]h&]uh1jY hjihM hjiubah}(h]h ]h"]h$]h&]uh1jT hjiubh)}(h**Description**h]j )}(hjjh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjiubh)}(h,Read EDID using the connector's I2C adapter.h]h.Read EDID using the connector’s I2C adapter.}(hj-jhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjiubh)}(hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.h]hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj;nhhubah}(h]h ]h"]h$]h&]uh1j hjlhhhjlhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jVnj jVnj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``struct drm_printer *p`` drm printer ``const struct drm_edid_product_id *id`` EDID product id ``bool raw`` If true, also print the raw hex **Description** See VESA E-EDID 1.4 section 3.4.h](h)}(h**Parameters**h]j )}(hj`nh]h Parameters}(hjbnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^nubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjZnubjU )}(hhh](jZ )}(h&``struct drm_printer *p`` drm printer h](j` )}(h``struct drm_printer *p``h]jf )}(hjnh]hstruct drm_printer *p}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}nubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjynubj| )}(hhh]h)}(h drm printerh]h drm printer}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhM hjnubah}(h]h ]h"]h$]h&]uh1j{ hjynubeh}(h]h ]h"]h$]h&]uh1jY hjnhM hjvnubjZ )}(h9``const struct drm_edid_product_id *id`` EDID product id h](j` )}(h(``const struct drm_edid_product_id *id``h]jf )}(hjnh]h$const struct drm_edid_product_id *id}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjnubj| )}(hhh]h)}(hEDID product idh]hEDID product id}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhM hjnubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjnhM hjvnubjZ )}(h-``bool raw`` If true, also print the raw hex h](j` )}(h ``bool raw``h]jf )}(hjnh]hbool raw}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjnubj| )}(hhh]h)}(hIf true, also print the raw hexh]hIf true, also print the raw hex}(hj ohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohM hjoubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjohM hjvnubeh}(h]h ]h"]h$]h&]uh1jT hjZnubh)}(h**Description**h]j )}(hj,oh]h Description}(hj.ohhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*oubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjZnubh)}(h See VESA E-EDID 1.4 section 3.4.h]h See VESA E-EDID 1.4 section 3.4.}(hjBohhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjZnubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_edid_get_panel_id (C function)c.drm_edid_get_panel_idhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h;u32 drm_edid_get_panel_id (const struct drm_edid *drm_edid)h]j )}(h:u32 drm_edid_get_panel_id(const struct drm_edid *drm_edid)h](h)}(hhh]j )}(hu32h]hu32}(hjtohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvomodnameN classnameNj j )}j ]j)}jdrm_edid_get_panel_idsbc.drm_edid_get_panel_idasbuh1hhjmohhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmohhhjohM ubj )}(hdrm_edid_get_panel_idh]j )}(hjoh]hdrm_edid_get_panel_id}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjmohhhjohM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjomodnameN classnameNj j )}j ]joc.drm_edid_get_panel_idasbuh1hhjoubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj)}(hjOh]h*}(hj(phhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjoubj )}(hdrm_edidh]hdrm_edid}(hj5phhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjoubah}(h]h ]h"]h$]h&]j j uh1jhjmohhhjohM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjiohhhjohM ubah}(h]jdoah ](j j eh"]h$]h&]j j )j huh1j{ hjohM hjfohhubj )}(hhh]h)}(hGet a panel's ID from EDIDh]hGet a panel’s ID from EDID}(hj_phhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj\phhubah}(h]h ]h"]h$]h&]uh1j hjfohhhjohM ubeh}(h]h ](j functioneh"]h$]h&]j j j jwpj jwpj j j uh1jv hhhj~HhNhNubj )}(hXz**Parameters** ``const struct drm_edid *drm_edid`` EDID that contains panel ID. **Description** This function uses the first block of the EDID of a panel and (assuming that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's supposed to be different for each different modem of panel. **Return** A 32-bit ID that should be different for each make/model of panel. See the functions drm_edid_encode_panel_id() and drm_edid_decode_panel_id() for some details on the structure of this ID. Return 0 if the EDID size is less than a base block.h](h)}(h**Parameters**h]j )}(hjph]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj{pubjU )}(hhh]jZ )}(hA``const struct drm_edid *drm_edid`` EDID that contains panel ID. h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjph]hconst struct drm_edid *drm_edid}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjpubj| )}(hhh]h)}(hEDID that contains panel ID.h]hEDID that contains panel ID.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphM hjpubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjphM hjpubah}(h]h ]h"]h$]h&]uh1jT hj{pubh)}(h**Description**h]j )}(hjph]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj{pubh)}(hXThis function uses the first block of the EDID of a panel and (assuming that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's supposed to be different for each different modem of panel.h]hXThis function uses the first block of the EDID of a panel and (assuming that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that’s supposed to be different for each different modem of panel.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj{pubh)}(h **Return**h]j )}(hjqh]hReturn}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj{pubh)}(hA 32-bit ID that should be different for each make/model of panel. See the functions drm_edid_encode_panel_id() and drm_edid_decode_panel_id() for some details on the structure of this ID. Return 0 if the EDID size is less than a base block.h]hA 32-bit ID that should be different for each make/model of panel. See the functions drm_edid_encode_panel_id() and drm_edid_decode_panel_id() for some details on the structure of this ID. Return 0 if the EDID size is less than a base block.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj{pubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_edid_read_base_block (C function)c.drm_edid_read_base_blockhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hNconst struct drm_edid * drm_edid_read_base_block (struct i2c_adapter *adapter)h]j )}(hLconst struct drm_edid *drm_edid_read_base_block(struct i2c_adapter *adapter)h](j )}(hjAh]hconst}(hjGqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCqhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjUqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCqhhhjTqhM ubj )}(hj h]hstruct}(hjcqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCqhhhjTqhM ubj )}(h h]h }(hjpqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCqhhhjTqhM ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~qubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]j)}jdrm_edid_read_base_blocksbc.drm_edid_read_base_blockasbuh1hhjCqhhhjTqhM ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCqhhhjTqhM ubj)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjCqhhhjTqhM ubj )}(hdrm_edid_read_base_blockh]j )}(hjqh]hdrm_edid_read_base_block}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hjCqhhhjTqhM ubj)}(h(struct i2c_adapter *adapter)h]j)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]jqc.drm_edid_read_base_blockasbuh1hhjqubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj)}(hjOh]h*}(hj&rhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjqubj )}(hadapterh]hadapter}(hj3rhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubah}(h]h ]h"]h$]h&]j j uh1jhjCqhhhjTqhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?qhhhjTqhM ubah}(h]j:qah ](j j eh"]h$]h&]j j )j huh1j{ hjTqhM hj(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hj thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj1thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.tubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3tmodnameN classnameNj j )}j ]jsc.drm_get_edid_switcherooasbuh1hhjtubj )}(h h]h }(hjOthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj)}(hjOh]h*}(hj]thhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjtubj )}(h connectorh]h connector}(hjjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj tubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]jsc.drm_get_edid_switcherooasbuh1hhjtubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj)}(hjOh]h*}(hjthhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjtubj )}(hadapterh]hadapter}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj tubeh}(h]h ]h"]h$]h&]j j uh1jhjshhhjshMO ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjshhhjshMO ubah}(h]jsah ](j j eh"]h$]h&]j j )j huh1j{ hjshMO hjshhubj )}(hhh]h)}(h)get EDID data for a vga_switcheroo outputh]h)get EDID data for a vga_switcheroo output}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMO hjuhhubah}(h]h ]h"]h$]h&]uh1j hjshhhjshMO ubeh}(h]h ](j functioneh"]h$]h&]j j j juj juj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Wrapper around drm_get_edid() for laptops with dual GPUs using one set of outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily switch DDC to the GPU which is retrieving EDID. **Return** Pointer to valid EDID or ``NULL`` if we couldn't find any.h](h)}(h**Parameters**h]j )}(hj&uh]h Parameters}(hj(uhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$uubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMS hj uubjU )}(hhh](jZ )}(h<``struct drm_connector *connector`` connector we're probing h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjEuh]hstruct drm_connector *connector}(hjGuhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjCuubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMP hj?uubj| )}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hj^uhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZuhMP hj[uubah}(h]h ]h"]h$]h&]uh1j{ hj?uubeh}(h]h ]h"]h$]h&]uh1jY hjZuhMP hj(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]jvc.drm_edid_read_switcherooasbuh1hhjvubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj)}(hjOh]h*}(hjwhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjvubj )}(h connectorh]h connector}(hj#whhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjxhhhjxhM ubj )}(hdrm_edid_duplicateh]j )}(hj-yh]hdrm_edid_duplicate}(hjOyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKyubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxhhhjxhM ubj)}(h(const struct edid *edid)h]j)}(hconst struct edid *edidh](j )}(hjAh]hconst}(hjjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfyubj )}(h h]h }(hjwyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfyubj )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfyubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfyubh)}(hhh]j )}(hedidh]hedid}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjymodnameN classnameNj j )}j ]j+yc.drm_edid_duplicateasbuh1hhjfyubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfyubj)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfyubj )}(hedidh]hedid}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjbyubah}(h]h ]h"]h$]h&]j j uh1jhjxhhhjxhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjxhhhjxhM ubah}(h]jxah ](j j eh"]h$]h&]j j )j huh1j{ hjxhM hjxhhubj )}(hhh]h)}(h$duplicate an EDID and the extensionsh]h$duplicate an EDID and the extensions}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjzhhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjxhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jzj jzj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const struct edid *edid`` EDID to duplicate **Return** Pointer to duplicated EDID or NULL on allocation failure.h](h)}(h**Parameters**h]j )}(hj(zh]h Parameters}(hj*zhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&zubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj"zubjU )}(hhh]jZ )}(h.``const struct edid *edid`` EDID to duplicate h](j` )}(h``const struct edid *edid``h]jf )}(hjGzh]hconst struct edid *edid}(hjIzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEzubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjAzubj| )}(hhh]h)}(hEDID to duplicateh]hEDID to duplicate}(hj`zhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\zhM hj]zubah}(h]h ]h"]h$]h&]uh1j{ hjAzubeh}(h]h ]h"]h$]h&]uh1jY hj\zhM hj>zubah}(h]h ]h"]h$]h&]uh1jT hj"zubh)}(h **Return**h]j )}(hjzh]hReturn}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj"zubh)}(h9Pointer to duplicated EDID or NULL on allocation failure.h]h9Pointer to duplicated EDID or NULL on allocation failure.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hj"zubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_match_cea_mode (C function)c.drm_match_cea_modehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h?u8 drm_match_cea_mode (const struct drm_display_mode *to_match)h]j )}(h>u8 drm_match_cea_mode(const struct drm_display_mode *to_match)h](h)}(hhh]j )}(hu8h]hu8}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j)}jdrm_match_cea_modesbc.drm_match_cea_modeasbuh1hhjzhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzhhhjzhMubj )}(hdrm_match_cea_modeh]j )}(hjzh]hdrm_match_cea_mode}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ](j j eh"]h$]h&]j j uh1j hjzhhhjzhMubj)}(h)(const struct drm_display_mode *to_match)h]j)}(h'const struct drm_display_mode *to_matchh](j )}(hjAh]hconst}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hj&{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(hj h]hstruct}(hj4{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjA{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjR{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjO{ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjT{modnameN classnameNj j )}j ]jzc.drm_match_cea_modeasbuh1hhj{ubj )}(h h]h }(hjp{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj)}(hjOh]h*}(hj~{hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj{ubj )}(hto_matchh]hto_match}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubah}(h]h ]h"]h$]h&]j j uh1jhjzhhhjzhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjzhhhjzhMubah}(h]jzah ](j j eh"]h$]h&]j j )j huh1j{ hjzhMhjzhhubj )}(hhh]h)}(h'look for a CEA mode matching given modeh]h'look for a CEA mode matching given mode}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj{hhubah}(h]h ]h"]h$]h&]uh1j hjzhhhjzhMubeh}(h]h ](j functioneh"]h$]h&]j j j j{j j{j j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const struct drm_display_mode *to_match`` display mode **Return** The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 mode.h](h)}(h**Parameters**h]j )}(hj{h]h Parameters}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM"hj{ubjU )}(hhh]jZ )}(h9``const struct drm_display_mode *to_match`` display mode h](j` )}(h+``const struct drm_display_mode *to_match``h]jf )}(hj{h]h'const struct drm_display_mode *to_match}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj{ubj| )}(hhh]h)}(h display modeh]h display mode}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj |hMhj |ubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hj |hMhj{ubah}(h]h ]h"]h$]h&]uh1jT hj{ubh)}(h **Return**h]j )}(hj1|h]hReturn}(hj3|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/|ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM!hj{ubh)}(hCThe CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 mode.h]hEThe CEA Video ID (VIC) of the mode or 0 if it isn’t a CEA-861 mode.}(hjG|hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM!hj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_display_mode_from_cea_vic (C function)c.drm_display_mode_from_cea_vichNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h_struct drm_display_mode * drm_display_mode_from_cea_vic (struct drm_device *dev, u8 video_code)h]j )}(h]struct drm_display_mode *drm_display_mode_from_cea_vic(struct drm_device *dev, u8 video_code)h](j )}(hj h]hstruct}(hjv|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr|hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM/ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr|hhhj|hM/ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j)}jdrm_display_mode_from_cea_vicsbc.drm_display_mode_from_cea_vicasbuh1hhjr|hhhj|hM/ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr|hhhj|hM/ubj)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjr|hhhj|hM/ubj )}(hdrm_display_mode_from_cea_vich]j )}(hj|h]hdrm_display_mode_from_cea_vic}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjr|hhhj|hM/ubj)}(h'(struct drm_device *dev, u8 video_code)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj }ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]j|c.drm_display_mode_from_cea_vicasbuh1hhj|ubj )}(h h]h }(hj,}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj)}(hjOh]h*}(hj:}hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj|ubj )}(hdevh]hdev}(hjG}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubj)}(h u8 video_codeh](h)}(hhh]j )}(hu8h]hu8}(hjc}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetje}modnameN classnameNj j )}j ]j|c.drm_display_mode_from_cea_vicasbuh1hhj\}ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\}ubj )}(h video_codeh]h video_code}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubeh}(h]h ]h"]h$]h&]j j uh1jhjr|hhhj|hM/ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjn|hhhj|hM/ubah}(h]ji|ah ](j j eh"]h$]h&]j j )j huh1j{ hj|hM/hjk|hhubj )}(hhh]h)}(hreturn a mode for CEA VICh]hreturn a mode for CEA VIC}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM/hj}hhubah}(h]h ]h"]h$]h&]uh1j hjk|hhhj|hM/ubeh}(h]h ](j functioneh"]h$]h&]j j j j}j j}j j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``struct drm_device *dev`` DRM device ``u8 video_code`` CEA VIC of the mode **Description** Creates a new mode matching the specified CEA VIC. **Return** A new drm_display_mode on success or NULL on failureh](h)}(h**Parameters**h]j )}(hj}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM3hj}ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj}h]hstruct drm_device *dev}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM0hj}ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hM0hj~ubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hj~hM0hj}ubjZ )}(h&``u8 video_code`` CEA VIC of the mode h](j` )}(h``u8 video_code``h]jf )}(hj3~h]h u8 video_code}(hj5~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj1~ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM1hj-~ubj| )}(hhh]h)}(hCEA VIC of the modeh]hCEA VIC of the mode}(hjL~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjH~hM1hjI~ubah}(h]h ]h"]h$]h&]uh1j{ hj-~ubeh}(h]h ]h"]h$]h&]uh1jY hjH~hM1hj}ubeh}(h]h ]h"]h$]h&]uh1jT hj}ubh)}(h**Description**h]j )}(hjn~h]h Description}(hjp~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjl~ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM3hj}ubh)}(h2Creates a new mode matching the specified CEA VIC.h]h2Creates a new mode matching the specified CEA VIC.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM2hj}ubh)}(h **Return**h]j )}(hj~h]hReturn}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM4hj}ubh)}(h4A new drm_display_mode on success or NULL on failureh]h4A new drm_display_mode on success or NULL on failure}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM5hj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_match (C function)c.drm_edid_matchhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hYbool drm_edid_match (const struct drm_edid *drm_edid, const struct drm_edid_ident *ident)h]j )}(hXbool drm_edid_match(const struct drm_edid *drm_edid, const struct drm_edid_ident *ident)h](j)}(hjIh]hbool}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhhj~hMubj )}(hdrm_edid_matchh]j )}(hdrm_edid_matchh]hdrm_edid_match}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj~hhhj~hMubj)}(hE(const struct drm_edid *drm_edid, const struct drm_edid_ident *ident)h](j)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQmodnameN classnameNj j )}j ]j)}jj~sbc.drm_edid_matchasbuh1hhjubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj}hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h"const struct drm_edid_ident *identh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_edid_identh]hdrm_edid_ident}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jkc.drm_edid_matchasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hidenth]hident}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj~hhhj~hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhj~hMubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j{ hj~hMhj~hhubj )}(hhh]h)}(h"match drm_edid with given identityh]h"match drm_edid with given identity}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj<hhubah}(h]h ]h"]h$]h&]uh1j hj~hhhj~hMubeh}(h]h ](j functioneh"]h$]h&]j j j jWj jWj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``const struct drm_edid *drm_edid`` EDID ``const struct drm_edid_ident *ident`` the EDID identity to match with **Description** Check if the EDID matches with the given identity. **Return** True if the given identity matched with EDID, false otherwise.h](h)}(h**Parameters**h]j )}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj[ubjU )}(hhh](jZ )}(h)``const struct drm_edid *drm_edid`` EDID h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjzubj| )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjzubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjwubjZ )}(hG``const struct drm_edid_ident *ident`` the EDID identity to match with h](j` )}(h&``const struct drm_edid_ident *ident``h]jf )}(hjh]h"const struct drm_edid_ident *ident}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubj| )}(hhh]h)}(hthe EDID identity to match withh]hthe EDID identity to match with}(hjҀhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj΀hMhjπubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj΀hMhjwubeh}(h]h ]h"]h$]h&]uh1jT hj[ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj[ubh)}(h2Check if the EDID matches with the given identity.h]h2Check if the EDID matches with the given identity.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj[ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj[ubh)}(h>True if the given identity matched with EDID, false otherwise.h]h>True if the given identity matched with EDID, false otherwise.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_edid_get_monitor_name (C function)c.drm_edid_get_monitor_namehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hQvoid drm_edid_get_monitor_name (const struct edid *edid, char *name, int bufsize)h]j )}(hPvoid drm_edid_get_monitor_name(const struct edid *edid, char *name, int bufsize)h](j)}(hvoidh]hvoid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhjnhMubj )}(hdrm_edid_get_monitor_nameh]j )}(hdrm_edid_get_monitor_nameh]hdrm_edid_get_monitor_name}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj\hhhjnhMubj)}(h2(const struct edid *edid, char *name, int bufsize)h](j)}(hconst struct edid *edidh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjŁhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hedidh]hedid}(hjցhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӁubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj؁modnameN classnameNj j )}j ]j)}jjsbc.drm_edid_get_monitor_nameasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hedidh]hedid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h char *nameh](j)}(hcharh]hchar}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj)}(hjOh]h*}(hjFhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj&ubj )}(hnameh]hname}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int bufsizeh](j)}(hinth]hint}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(hbufsizeh]hbufsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj\hhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjXhhhjnhMubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j{ hjnhMhjUhhubj )}(hhh]h)}(h$fetch the monitor name from the edidh]h$fetch the monitor name from the edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjUhhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j j j jʂj jʂj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const struct edid *edid`` monitor EDID information ``char *name`` pointer to a character array to hold the name of the monitor ``int bufsize`` The size of the name buffer (should be at least 14 chars.)h](h)}(h**Parameters**h]j )}(hjԂh]h Parameters}(hjւhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj҂ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj΂ubjU )}(hhh](jZ )}(h5``const struct edid *edid`` monitor EDID information h](j` )}(h``const struct edid *edid``h]jf )}(hjh]hconst struct edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubj| )}(hhh]h)}(hmonitor EDID informationh]hmonitor EDID information}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hL``char *name`` pointer to a character array to hold the name of the monitor h](j` )}(h``char *name``h]jf )}(hj,h]h char *name}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj*ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj&ubj| )}(hhh]h)}(h` instead of calling this function. **Return** True if the monitor is HDMI, false if not or unknown.h](h)}(h**Parameters**h]j )}(hj%h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM;hjubjU )}(hhh]jZ )}(h5``const struct edid *edid`` monitor EDID information h](j` )}(h``const struct edid *edid``h]jf )}(hjDh]hconst struct edid *edid}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM8hj>ubj| )}(hhh]h)}(hmonitor EDID informationh]hmonitor EDID information}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhM8hjZubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hjYhM8hj;ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM:hjubh)}(h/Parse the CEA extension according to CEA-861-B.h]h/Parse the CEA extension according to CEA-861-B.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM9hjubh)}(hDrivers that have added the modes parsed from EDID to drm_display_info should use :c:type:`drm_display_info.is_hdmi ` instead of calling this function.h](hRDrivers that have added the modes parsed from EDID to drm_display_info should use }(hjhhhNhNubh)}(h5:c:type:`drm_display_info.is_hdmi `h]jf )}(hjh]hdrm_display_info.is_hdmi}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_infouh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM;hjubh" instead of calling this function.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjˌhM;hjubh)}(h **Return**h]j )}(hj،h]hReturn}(hjڌhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj֌ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM>hjubh)}(h5True if the monitor is HDMI, false if not or unknown.h]h5True if the monitor is HDMI, false if not or unknown.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM?hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_detect_monitor_audio (C function)c.drm_detect_monitor_audiohNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h7bool drm_detect_monitor_audio (const struct edid *edid)h]j )}(h6bool drm_detect_monitor_audio(const struct edid *edid)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMtubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj*hMtubj )}(hdrm_detect_monitor_audioh]j )}(hdrm_detect_monitor_audioh]hdrm_detect_monitor_audio}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj*hMtubj)}(h(const struct edid *edid)h]j)}(hconst struct edid *edidh](j )}(hjAh]hconst}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubh)}(hhh]j )}(hedidh]hedid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj?sbc.drm_detect_monitor_audioasbuh1hhjUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjUubj )}(hedidh]hedid}(hj͍hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjQubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj*hMtubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj*hMtubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj*hMthjhhubj )}(hhh]h)}(hcheck monitor audio capabilityh]hcheck monitor audio capability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMthjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj*hMtubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``const struct edid *edid`` EDID block to scan **Description** Monitor should have CEA extension block. If monitor has 'basic audio', but no CEA audio blocks, it's 'basic audio' only. If there is any audio extension block and supported audio format, assume at least 'basic audio' support, even if 'basic audio' is not defined in EDID. **Return** True if the monitor supports audio, false otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMxhjubjU )}(hhh]jZ )}(h/``const struct edid *edid`` EDID block to scan h](j` )}(h``const struct edid *edid``h]jf )}(hj8h]hconst struct edid *edid}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMuhj2ubj| )}(hhh]h)}(hEDID block to scanh]hEDID block to scan}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhMuhjNubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hjMhMuhj/ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjsh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMwhjubh)}(hXMonitor should have CEA extension block. If monitor has 'basic audio', but no CEA audio blocks, it's 'basic audio' only. If there is any audio extension block and supported audio format, assume at least 'basic audio' support, even if 'basic audio' is not defined in EDID.h]hX!Monitor should have CEA extension block. If monitor has ‘basic audio’, but no CEA audio blocks, it’s ‘basic audio’ only. If there is any audio extension block and supported audio format, assume at least ‘basic audio’ support, even if ‘basic audio’ is not defined in EDID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMvhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM|hjubh)}(h4True if the monitor supports audio, false otherwise.h]h4True if the monitor supports audio, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM}hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_default_rgb_quant_range (C function)c.drm_default_rgb_quant_rangehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h^enum hdmi_quantization_range drm_default_rgb_quant_range (const struct drm_display_mode *mode)h]j )}(h]enum hdmi_quantization_range drm_default_rgb_quant_range(const struct drm_display_mode *mode)h](j )}(hj+h]henum}(hjߎhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjێhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjێhhhjhMubh)}(hhh]j )}(hhdmi_quantization_rangeh]hhdmi_quantization_range}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_default_rgb_quant_rangesbc.drm_default_rgb_quant_rangeasbuh1hhjێhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjێhhhjhMubj )}(hdrm_default_rgb_quant_rangeh]j )}(hjh]hdrm_default_rgb_quant_range}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjێhhhjhMubj)}(h%(const struct drm_display_mode *mode)h]j)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_default_rgb_quant_rangeasbuh1hhjHubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjHubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjDubah}(h]h ]h"]h$]h&]j j uh1jhjێhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj׎hhhjhMubah}(h]jҎah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjԎhhubj )}(hhh]h)}(hdefault RGB quantization rangeh]hdefault RGB quantization range}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjԎhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const struct drm_display_mode *mode`` display mode **Description** Determine the default RGB quantization range for the mode, as specified in CEA-861. **Return** The default RGB quantization range for the modeh](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubjU )}(hhh]jZ )}(h5``const struct drm_display_mode *mode`` display mode h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hj)h]h#const struct drm_display_mode *mode}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj#ubj| )}(hhh]h)}(h display modeh]h display mode}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj?ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj>hMhj ubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjdh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubh)}(hSDetermine the default RGB quantization range for the mode, as specified in CEA-861.h]hSDetermine the default RGB quantization range for the mode, as specified in CEA-861.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h/The default RGB quantization range for the modeh]h/The default RGB quantization range for the mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_edid_connector_update (C function)c.drm_edid_connector_updatehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h`int drm_edid_connector_update (struct drm_connector *connector, const struct drm_edid *drm_edid)h]j )}(h_int drm_edid_connector_update(struct drm_connector *connector, const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjАhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̐hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hjߐhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̐hhhjސhMubj )}(hdrm_edid_connector_updateh]j )}(hdrm_edid_connector_updateh]hdrm_edid_connector_update}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj̐hhhjސhMubj)}(hB(struct drm_connector *connector, const struct drm_edid *drm_edid)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]j)}jjsbc.drm_edid_connector_updateasbuh1hhj ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjYhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(h connectorh]h connector}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jGc.drm_edid_connector_updateasbuh1hhj{ubj )}(h h]h }(hj֑hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj{ubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj̐hhhjސhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjȐhhhjސhMubah}(h]jÐah ](j j eh"]h$]h&]j j )j huh1j{ hjސhMhjŐhhubj )}(hhh]h)}(h&Update connector information from EDIDh]h&Update connector information from EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjŐhhhjސhMubeh}(h]h ](j functioneh"]h$]h&]j j j j3j j3j j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` Connector ``const struct drm_edid *drm_edid`` EDID **Description** Update the connector display info, ELD, HDR metadata, relevant properties, etc. from the passed in EDID. If EDID is NULL, reset the information. Must be called before calling drm_edid_connector_add_modes(). **Return** 0 on success, negative error on errors.h](h)}(h**Parameters**h]j )}(hj=h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj7ubjU )}(hhh](jZ )}(h.``struct drm_connector *connector`` Connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj\h]hstruct drm_connector *connector}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjZubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjVubj| )}(hhh]h)}(h Connectorh]h Connector}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjrubah}(h]h ]h"]h$]h&]uh1j{ hjVubeh}(h]h ]h"]h$]h&]uh1jY hjqhMhjSubjZ )}(h)``const struct drm_edid *drm_edid`` EDID h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubj| )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjSubeh}(h]h ]h"]h$]h&]uh1jT hj7ubh)}(h**Description**h]j )}(hjВh]h Description}(hjҒhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjΒubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj7ubh)}(hhUpdate the connector display info, ELD, HDR metadata, relevant properties, etc. from the passed in EDID.h]hhUpdate the connector display info, ELD, HDR metadata, relevant properties, etc. from the passed in EDID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj7ubh)}(h'If EDID is NULL, reset the information.h]h'If EDID is NULL, reset the information.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj7ubh)}(h=Must be called before calling drm_edid_connector_add_modes().h]h=Must be called before calling drm_edid_connector_add_modes().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj7ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj7ubh)}(h'0 on success, negative error on errors.h]h'0 on success, negative error on errors.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_edid_connector_add_modes (C function)c.drm_edid_connector_add_modeshNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hBint drm_edid_connector_add_modes (struct drm_connector *connector)h]j )}(hAint drm_edid_connector_add_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjhhMubj )}(hdrm_edid_connector_add_modesh]j )}(hdrm_edid_connector_add_modesh]hdrm_edid_connector_add_modes}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ](j j eh"]h$]h&]j j uh1j hjVhhhjhhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj}sbc.drm_edid_connector_add_modesasbuh1hhjubj )}(h h]h }(hjՓhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjVhhhjhhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjRhhhjhhMubah}(h]jMah ](j j eh"]h$]h&]j j )j huh1j{ hjhhMhjOhhubj )}(hhh]h)}(h*Update probed modes from the EDID propertyh]h*Update probed modes from the EDID property}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjOhhhjhhMubeh}(h]h ](j functioneh"]h$]h&]j j j j2j j2j j j uh1jv hhhj~HhNhNubj )}(hXO**Parameters** ``struct drm_connector *connector`` Connector **Description** Add the modes from the previously updated EDID property to the connector probed modes list. drm_edid_connector_update() must have been called before this to update the EDID property. **Return** The number of modes added, or 0 if we couldn't find any.h](h)}(h**Parameters**h]j )}(hj<h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj6ubjU )}(hhh]jZ )}(h.``struct drm_connector *connector`` Connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj[h]hstruct drm_connector *connector}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjUubj| )}(hhh]h)}(h Connectorh]h Connector}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjqubah}(h]h ]h"]h$]h&]uh1j{ hjUubeh}(h]h ]h"]h$]h&]uh1jY hjphMhjRubah}(h]h ]h"]h$]h&]uh1jT hj6ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj6ubh)}(h[Add the modes from the previously updated EDID property to the connector probed modes list.h]h[Add the modes from the previously updated EDID property to the connector probed modes list.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj6ubh)}(hZdrm_edid_connector_update() must have been called before this to update the EDID property.h]hZdrm_edid_connector_update() must have been called before this to update the EDID property.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj6ubh)}(h **Return**h]j )}(hj̔h]hReturn}(hjΔhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjʔubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj6ubh)}(h8The number of modes added, or 0 if we couldn't find any.h]h:The number of modes added, or 0 if we couldn’t find any.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_connector_update_edid_property (C function)$c.drm_connector_update_edid_propertyhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(haint drm_connector_update_edid_property (struct drm_connector *connector, const struct edid *edid)h]j )}(h`int drm_connector_update_edid_property(struct drm_connector *connector, const struct edid *edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj )}(h"drm_connector_update_edid_propertyh]j )}(h"drm_connector_update_edid_propertyh]h"drm_connector_update_edid_property}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMubj)}(h:(struct drm_connector *connector, const struct edid *edid)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]j)}jj4sb$c.drm_connector_update_edid_propertyasbuh1hhjJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjJubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubj)}(hconst struct edid *edidh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj͕hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjەhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hedidh]hedid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j$c.drm_connector_update_edid_propertyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hedidh]hedid}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h'update the edid property of a connectorh]h'update the edid property of a connector}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjYhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jtj jtj j j uh1jv hhhj~HhNhNubj )}(hX"**Parameters** ``struct drm_connector *connector`` drm connector ``const struct edid *edid`` new value of the edid property **Description** This function creates a new blob modeset object and assigns its id to the connector's edid property. Since we also parse tile information from EDID's displayID block, we also set the connector's tile property here. See drm_connector_set_tile_property() for more details. This function is deprecated. Use drm_edid_connector_update() instead. **Return** Zero on success, negative errno on failure.h](h)}(h**Parameters**h]j )}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjxubjU )}(hhh](jZ )}(h2``struct drm_connector *connector`` drm connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubj| )}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h;``const struct edid *edid`` new value of the edid property h](j` )}(h``const struct edid *edid``h]jf )}(hj֖h]hconst struct edid *edid}(hjؖhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjԖubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjЖubj| )}(hhh]h)}(hnew value of the edid propertyh]hnew value of the edid property}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjЖubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjxubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjxubh)}(hXThis function creates a new blob modeset object and assigns its id to the connector's edid property. Since we also parse tile information from EDID's displayID block, we also set the connector's tile property here. See drm_connector_set_tile_property() for more details.h]hXThis function creates a new blob modeset object and assigns its id to the connector’s edid property. Since we also parse tile information from EDID’s displayID block, we also set the connector’s tile property here. See drm_connector_set_tile_property() for more details.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjxubh)}(hEThis function is deprecated. Use drm_edid_connector_update() instead.h]hEThis function is deprecated. Use drm_edid_connector_update() instead.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM$hjxubh)}(h **Return**h]j )}(hjGh]hReturn}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM&hjxubh)}(h+Zero on success, negative errno on failure.h]h+Zero on success, negative errno on failure.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM'hjxubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_add_edid_modes (C function)c.drm_add_edid_modeshNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hKint drm_add_edid_modes (struct drm_connector *connector, struct edid *edid)h]j )}(hJint drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM4ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM4ubj )}(hdrm_add_edid_modesh]j )}(hdrm_add_edid_modesh]hdrm_add_edid_modes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM4ubj)}(h4(struct drm_connector *connector, struct edid *edid)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjɗhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŗubj )}(h h]h }(hj֗hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŗubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_add_edid_modesasbuh1hhjŗubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŗubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjŗubj )}(h connectorh]h connector}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŗubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct edid *edidh](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubh)}(hhh]j )}(hedidh]hedid}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]jc.drm_add_edid_modesasbuh1hhj7ubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj7ubj )}(hedidh]hedid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM4ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM4ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM4hjhhubj )}(hhh]h)}(h&add modes from EDID data, if availableh]h&add modes from EDID data, if available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM4hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM4ubeh}(h]h ](j functioneh"]h$]h&]j j j jԘj jԘj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct edid *edid`` EDID data **Description** Add the specified modes to the connector's mode list. Also fills out the :c:type:`drm_display_info` structure and ELD in **connector** with any information which can be derived from the edid. This function is deprecated. Use drm_edid_connector_add_modes() instead. **Return** The number of modes added or 0 if we couldn't find any.h](h)}(h**Parameters**h]j )}(hjޘh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjܘubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM8hjؘubjU )}(hhh](jZ )}(h<``struct drm_connector *connector`` connector we're probing h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM5hjubj| )}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM5hjubjZ )}(h ``struct edid *edid`` EDID data h](j` )}(h``struct edid *edid``h]jf )}(hj6h]hstruct edid *edid}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM6hj0ubj| )}(hhh]h)}(h EDID datah]h EDID data}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhM6hjLubah}(h]h ]h"]h$]h&]uh1j{ hj0ubeh}(h]h ]h"]h$]h&]uh1jY hjKhM6hjubeh}(h]h ]h"]h$]h&]uh1jT hjؘubh)}(h**Description**h]j )}(hjqh]h Description}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM8hjؘubh)}(hAdd the specified modes to the connector's mode list. Also fills out the :c:type:`drm_display_info` structure and ELD in **connector** with any information which can be derived from the edid.h](hKAdd the specified modes to the connector’s mode list. Also fills out the }(hjhhhNhNubh)}(h:c:type:`drm_display_info`h]jf )}(hjh]hdrm_display_info}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_infouh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM7hjubh structure and ELD in }(hjhhhNhNubj )}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh9 with any information which can be derived from the edid.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM7hjؘubh)}(hHThis function is deprecated. Use drm_edid_connector_add_modes() instead.h]hHThis function is deprecated. Use drm_edid_connector_add_modes() instead.}(hj˙hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM;hjؘubh)}(h **Return**h]j )}(hjܙh]hReturn}(hjޙhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjڙubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM=hjؘubh)}(h7The number of modes added or 0 if we couldn't find any.h]h9The number of modes added or 0 if we couldn’t find any.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM>hjؘubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_add_modes_noedid (C function)c.drm_add_modes_noedidhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hhint drm_add_modes_noedid (struct drm_connector *connector, unsigned int hdisplay, unsigned int vdisplay)h]j )}(hgint drm_add_modes_noedid(struct drm_connector *connector, unsigned int hdisplay, unsigned int vdisplay)h](j)}(hinth]hint}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMTubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj/hMTubj )}(hdrm_add_modes_noedidh]j )}(hdrm_add_modes_noedidh]hdrm_add_modes_noedid}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj/hMTubj)}(hO(struct drm_connector *connector, unsigned int hdisplay, unsigned int vdisplay)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]j)}jjDsbc.drm_add_modes_noedidasbuh1hhjZubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubj)}(hunsigned int hdisplayh](j)}(hunsignedh]hunsigned}(hjКhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̚ubj )}(h h]h }(hjޚhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̚ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̚ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̚ubj )}(hhdisplayh]hhdisplay}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̚ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubj)}(hunsigned int vdisplayh](j)}(hunsignedh]hunsigned}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hvdisplayh]hvdisplay}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj/hMTubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj/hMTubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj/hMThjhhubj )}(hhh]h)}(h)add modes for the connectors without EDIDh]h)add modes for the connectors without EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMThjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj/hMTubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing ``unsigned int hdisplay`` the horizontal display limit ``unsigned int vdisplay`` the vertical display limit **Description** Add the specified modes to the connector's mode list. Only when the hdisplay/vdisplay is not beyond the given limit, it will be added. **Return** The number of modes added or 0 if we couldn't find any.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMXhjubjU )}(hhh](jZ )}(h<``struct drm_connector *connector`` connector we're probing h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjěh]hstruct drm_connector *connector}(hjƛhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj›ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMUhjubj| )}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjݛhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjٛhMUhjڛubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjٛhMUhjubjZ )}(h7``unsigned int hdisplay`` the horizontal display limit h](j` )}(h``unsigned int hdisplay``h]jf )}(hjh]hunsigned int hdisplay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMVhjubj| )}(hhh]h)}(hthe horizontal display limith]hthe horizontal display limit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMVhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMVhjubjZ )}(h5``unsigned int vdisplay`` the vertical display limit h](j` )}(h``unsigned int vdisplay``h]jf )}(hj6h]hunsigned int vdisplay}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMWhj0ubj| )}(hhh]h)}(hthe vertical display limith]hthe vertical display limit}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMWhjLubah}(h]h ]h"]h$]h&]uh1j{ hj0ubeh}(h]h ]h"]h$]h&]uh1jY hjKhMWhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjqh]h Description}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMYhjubh)}(hAdd the specified modes to the connector's mode list. Only when the hdisplay/vdisplay is not beyond the given limit, it will be added.h]hAdd the specified modes to the connector’s mode list. Only when the hdisplay/vdisplay is not beyond the given limit, it will be added.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMXhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM[hjubh)}(h7The number of modes added or 0 if we couldn't find any.h]h9The number of modes added or 0 if we couldn’t find any.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM\hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 5drm_hdmi_avi_infoframe_from_display_mode (C function)*c.drm_hdmi_avi_infoframe_from_display_modehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hint drm_hdmi_avi_infoframe_from_display_mode (struct hdmi_avi_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h]j )}(hint drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(hinth]hint}(hjݜhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjٜhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٜhhhjhMubj )}(h(drm_hdmi_avi_infoframe_from_display_modeh]j )}(h(drm_hdmi_avi_infoframe_from_display_modeh]h(drm_hdmi_avi_infoframe_from_display_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjٜhhhjhMubj)}(hn(struct hdmi_avi_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(h struct hdmi_avi_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_avi_infoframeh]hhdmi_avi_infoframe}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]j)}jjsb*c.drm_hdmi_avi_infoframe_from_display_modeasbuh1hhjubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h%const struct drm_connector *connectorh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjŝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjǝmodnameN classnameNj j )}j ]jT*c.drm_hdmi_avi_infoframe_from_display_modeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRmodnameN classnameNj j )}j ]jT*c.drm_hdmi_avi_infoframe_from_display_modeasbuh1hhjubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjٜhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj՜hhhjhMubah}(h]jМah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjҜhhubj )}(hhh]h)}(hubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjCmodnameN classnameNj j )}j ]j)}jj sb$c.drm_hdmi_avi_infoframe_quant_rangeasbuh1hhjubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjohhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h%const struct drm_connector *connectorh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjΠhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjˠubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjРmodnameN classnameNj j )}j ]j]$c.drm_hdmi_avi_infoframe_quant_rangeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]j]$c.drm_hdmi_avi_infoframe_quant_rangeasbuh1hhjubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h,enum hdmi_quantization_range rgb_quant_rangeh](j )}(hj+h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_quantization_rangeh]hhdmi_quantization_range}(hjɡhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjơubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjˡmodnameN classnameNj j )}j ]j]$c.drm_hdmi_avi_infoframe_quant_rangeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hrgb_quant_rangeh]hrgb_quant_range}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjޟhhhjhM ubah}(h]jٟah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hj۟hhubj )}(hhh]h)}(h:fill the HDMI AVI infoframe quantization range informationh]h:fill the HDMI AVI infoframe quantization range information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj۟hhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j7j j7j j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe ``const struct drm_connector *connector`` the connector ``const struct drm_display_mode *mode`` DRM display mode ``enum hdmi_quantization_range rgb_quant_range`` RGB quantization range (Q)h](h)}(h**Parameters**h]j )}(hjAh]h Parameters}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj;ubjU )}(hhh](jZ )}(h8``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe h](j` )}(h$``struct hdmi_avi_infoframe *frame``h]jf )}(hj`h]h struct hdmi_avi_infoframe *frame}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjZubj| )}(hhh]h)}(hHDMI AVI infoframeh]hHDMI AVI infoframe}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjvubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjuhMhjWubjZ )}(h8``const struct drm_connector *connector`` the connector h](j` )}(h)``const struct drm_connector *connector``h]jf )}(hjh]h%const struct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubj| )}(hhh]h)}(h the connectorh]h the connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjWubjZ )}(h9``const struct drm_display_mode *mode`` DRM display mode h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hjҢh]h#const struct drm_display_mode *mode}(hjԢhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjТubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj̢ubj| )}(hhh]h)}(hDRM display modeh]hDRM display mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj̢ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjWubjZ )}(hK``enum hdmi_quantization_range rgb_quant_range`` RGB quantization range (Q)h](j` )}(h0``enum hdmi_quantization_range rgb_quant_range``h]jf )}(hj h]h,enum hdmi_quantization_range rgb_quant_range}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubj| )}(hhh]h)}(hRGB quantization range (Q)h]hRGB quantization range (Q)}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhj!ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjWubeh}(h]h ]h"]h$]h&]uh1jT hj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 8drm_hdmi_vendor_infoframe_from_display_mode (C function)-c.drm_hdmi_vendor_infoframe_from_display_modehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hint drm_hdmi_vendor_infoframe_from_display_mode (struct hdmi_vendor_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h]j )}(hint drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjahhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM^ubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhjshM^ubj )}(h+drm_hdmi_vendor_infoframe_from_display_modeh]j )}(h+drm_hdmi_vendor_infoframe_from_display_modeh]h+drm_hdmi_vendor_infoframe_from_display_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjahhhjshM^ubj)}(hq(struct hdmi_vendor_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(h#struct hdmi_vendor_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_vendor_infoframeh]hhdmi_vendor_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj£modnameN classnameNj j )}j ]j)}jjsb-c.drm_hdmi_vendor_infoframe_from_display_modeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h%const struct drm_connector *connectorh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]jܣ-c.drm_hdmi_vendor_infoframe_from_display_modeasbuh1hhjubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const struct drm_display_mode *modeh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjǤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjؤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjդubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjڤmodnameN classnameNj j )}j ]jܣ-c.drm_hdmi_vendor_infoframe_from_display_modeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjahhhjshM^ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj]hhhjshM^ubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j{ hjshM^hjZhhubj )}(hhh]h)}(h8fill an HDMI infoframe with data from a DRM display modeh]h8fill an HDMI infoframe with data from a DRM display mode}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM^hj8hhubah}(h]h ]h"]h$]h&]uh1j hjZhhhjshM^ubeh}(h]h ](j functioneh"]h$]h&]j j j jSj jSj j j uh1jv hhhj~HhNhNubj )}(hX**Parameters** ``struct hdmi_vendor_infoframe *frame`` HDMI vendor infoframe ``const struct drm_connector *connector`` the connector ``const struct drm_display_mode *mode`` DRM display mode **Description** Note that there's is a need to send HDMI vendor infoframes only when using a 4k or stereoscopic 3D mode. So when giving any other mode as input this function will return -EINVAL, error that can be safely ignored. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj]h]h Parameters}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMbhjWubjU )}(hhh](jZ )}(h>``struct hdmi_vendor_infoframe *frame`` HDMI vendor infoframe h](j` )}(h'``struct hdmi_vendor_infoframe *frame``h]jf )}(hj|h]h#struct hdmi_vendor_infoframe *frame}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chM`hjvubj| )}(hhh]h)}(hHDMI vendor infoframeh]hHDMI vendor infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjhM`hjsubjZ )}(h8``const struct drm_connector *connector`` the connector h](j` )}(h)``const struct drm_connector *connector``h]jf )}(hjh]h%const struct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMahjubj| )}(hhh]h)}(h the connectorh]h the connector}(hjΥhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjʥhMahj˥ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjʥhMahjsubjZ )}(h9``const struct drm_display_mode *mode`` DRM display mode h](j` )}(h'``const struct drm_display_mode *mode``h]jf )}(hjh]h#const struct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMbhjubj| )}(hhh]h)}(hDRM display modeh]hDRM display mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMbhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMbhjsubeh}(h]h ]h"]h$]h&]uh1jT hjWubh)}(h**Description**h]j )}(hj)h]h Description}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMdhjWubh)}(hNote that there's is a need to send HDMI vendor infoframes only when using a 4k or stereoscopic 3D mode. So when giving any other mode as input this function will return -EINVAL, error that can be safely ignored.h]hNote that there’s is a need to send HDMI vendor infoframes only when using a 4k or stereoscopic 3D mode. So when giving any other mode as input this function will return -EINVAL, error that can be safely ignored.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMchjWubh)}(h **Return**h]j )}(hjPh]hReturn}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMghjWubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhhjWubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_edid_is_digital (C function)c.drm_edid_is_digitalhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h:bool drm_edid_is_digital (const struct drm_edid *drm_edid)h]j )}(h9bool drm_edid_is_digital(const struct drm_edid *drm_edid)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_edid_is_digitalh]j )}(hdrm_edid_is_digitalh]hdrm_edid_is_digital}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjAh]hconst}(hjѦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͦubj )}(h h]h }(hjަhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͦubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͦubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͦubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j)}jjsbc.drm_edid_is_digitalasbuh1hhjͦubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͦubj)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjͦubj )}(hdrm_edidh]hdrm_edid}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͦubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjɦubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h is digital?h]h is digital?}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjlhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(hq**Parameters** ``const struct drm_edid *drm_edid`` The EDID **Description** Return true if input is digital.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubjU )}(hhh]jZ )}(h-``const struct drm_edid *drm_edid`` The EDID h](j` )}(h#``const struct drm_edid *drm_edid``h]jf )}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubj| )}(hhh]h)}(hThe EDIDh]hThe EDID}(hjɧhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjŧhMhjƧubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjŧhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h Return true if input is digital.h]h Return true if input is digital.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:380: ./drivers/gpu/drm/drm_edid.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_eld_mnl (C function) c.drm_eld_mnlhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hint drm_eld_mnl (const u8 *eld)h]j )}(hint drm_eld_mnl(const u8 *eld)h](j)}(hinth]hint}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKHubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj>hKHubj )}(h drm_eld_mnlh]j )}(h drm_eld_mnlh]h drm_eld_mnl}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj>hKHubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j )}(hjAh]hconst}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjSsb c.drm_eld_mnlasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjiubj )}(heldh]held}(hjƨhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubah}(h]h ]h"]h$]h&]j j uh1jhj,hhhj>hKHubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj>hKHubah}(h]j#ah ](j j eh"]h$]h&]j j )j huh1j{ hj>hKHhj%hhubj )}(hhh]h)}(h%Get ELD monitor name length in bytes.h]h%Get ELD monitor name length in bytes.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKHhjhhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj>hKHubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(hS**Parameters** ``const u8 *eld`` pointer to an eld memory structure with mnl seth](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKLhj ubjU )}(hhh]jZ )}(hA``const u8 *eld`` pointer to an eld memory structure with mnl seth](j` )}(h``const u8 *eld``h]jf )}(hj1h]h const u8 *eld}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1j_ hZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKNhj+ubj| )}(hhh]h)}(h/pointer to an eld memory structure with mnl seth]h/pointer to an eld memory structure with mnl set}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKIhjGubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hjFhKNhj(ubah}(h]h ]h"]h$]h&]uh1jT hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_eld_sad (C function) c.drm_eld_sadhNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h&const u8 * drm_eld_sad (const u8 *eld)h]j )}(h$const u8 *drm_eld_sad(const u8 *eld)h](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKTubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKTubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j drm_eld_sadsb c.drm_eld_sadasbuh1hhjhhhjhKTubj )}(h h]h }(hj˩hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKTubj)}(hjOh]h*}(hj٩hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjhhhjhKTubj )}(h drm_eld_sadh]j )}(hjȩh]h drm_eld_sad}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKTubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%modnameN classnameNj j )}j ]jƩ c.drm_eld_sadasbuh1hhjubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjOhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(heldh]held}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKTubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKTubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j{ hjhKThjhhubj )}(hhh]h)}(hGet ELD SAD structures.h]hGet ELD SAD structures.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKThjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKTubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(hY**Parameters** ``const u8 *eld`` pointer to an eld memory structure with sad_count seth](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKXhjubjU )}(hhh]jZ )}(hG``const u8 *eld`` pointer to an eld memory structure with sad_count seth](j` )}(h``const u8 *eld``h]jf )}(hjǪh]h const u8 *eld}(hjɪhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjŪubah}(h]h ]h"]h$]h&]uh1j_ hZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKZhjubj| )}(hhh]h)}(h5pointer to an eld memory structure with sad_count seth]h5pointer to an eld memory structure with sad_count set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKUhjݪubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjܪhKZhjubah}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_eld_sad_count (C function)c.drm_eld_sad_counthNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h%int drm_eld_sad_count (const u8 *eld)h]j )}(h$int drm_eld_sad_count(const u8 *eld)h](j)}(hinth]hint}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKgubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj/hKgubj )}(hdrm_eld_sad_counth]j )}(hdrm_eld_sad_counth]hdrm_eld_sad_count}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj/hKgubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j )}(hjAh]hconst}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubh)}(hhh]j )}(hu8h]hu8}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]j)}jjDsbc.drm_eld_sad_countasbuh1hhjZubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjZubj )}(heldh]held}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj/hKgubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj/hKgubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj/hKghjhhubj )}(hhh]h)}(hGet ELD SAD count.h]hGet ELD SAD count.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKghjޫhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj/hKgubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(hY**Parameters** ``const u8 *eld`` pointer to an eld memory structure with sad_count seth](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKkhjubjU )}(hhh]jZ )}(hG``const u8 *eld`` pointer to an eld memory structure with sad_count seth](j` )}(h``const u8 *eld``h]jf )}(hj"h]h const u8 *eld}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKmhjubj| )}(hhh]h)}(h5pointer to an eld memory structure with sad_count seth]h5pointer to an eld memory structure with sad_count set}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhhj8ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj7hKmhjubah}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_eld_calc_baseline_block_size (C function)"c.drm_eld_calc_baseline_block_sizehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h4int drm_eld_calc_baseline_block_size (const u8 *eld)h]j )}(h3int drm_eld_calc_baseline_block_size(const u8 *eld)h](j)}(hinth]hint}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhhjhKqubj )}(h drm_eld_calc_baseline_block_sizeh]j )}(h drm_eld_calc_baseline_block_sizeh]h drm_eld_calc_baseline_block_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxhhhjhKqubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjƬhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj׬hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԬubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj٬modnameN classnameNj j )}j ]j)}jjsb"c.drm_eld_calc_baseline_block_sizeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(heldh]held}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjxhhhjhKqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjthhhjhKqubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j{ hjhKqhjqhhubj )}(hhh]h)}(h&Calculate baseline block size in bytesh]h&Calculate baseline block size in bytes}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKqhj9hhubah}(h]h ]h"]h$]h&]uh1j hjqhhhjhKqubeh}(h]h ](j functioneh"]h$]h&]j j j jTj jTj j j uh1jv hhhj~HhNhNubj )}(hX **Parameters** ``const u8 *eld`` pointer to an eld memory structure with mnl and sad_count set **Description** This is a helper for determining the payload size of the baseline block, in bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.h](h)}(h**Parameters**h]j )}(hj^h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKuhjXubjU )}(hhh]jZ )}(hP``const u8 *eld`` pointer to an eld memory structure with mnl and sad_count set h](j` )}(h``const u8 *eld``h]jf )}(hj}h]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKrhjwubj| )}(hhh]h)}(h=pointer to an eld memory structure with mnl and sad_count seth]h=pointer to an eld memory structure with mnl and sad_count set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhKrhjtubah}(h]h ]h"]h$]h&]uh1jT hjXubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKthjXubh)}(hThis is a helper for determining the payload size of the baseline block, in bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.h]hThis is a helper for determining the payload size of the baseline block, in bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.}(hjέhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKshjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_eld_size (C function)c.drm_eld_sizehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h int drm_eld_size (const u8 *eld)h]j )}(hint drm_eld_size(const u8 *eld)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhK~ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hK~ubj )}(h drm_eld_sizeh]j )}(h drm_eld_sizeh]h drm_eld_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hK~ubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j )}(hjAh]hconst}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(hu8h]hu8}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jj sbc.drm_eld_sizeasbuh1hhj6ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(heldh]held}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj hK~ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hK~ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hK~hjhhubj )}(hhh]h)}(hGet ELD size in bytesh]hGet ELD size in bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhK~hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hK~ubeh}(h]h ](j functioneh"]h$]h&]j j j jծj jծj j j uh1jv hhhj~HhNhNubj )}(hX\**Parameters** ``const u8 *eld`` pointer to a complete eld memory structure **Description** The returned value does not include the vendor block. It's vendor specific, and comprises of the remaining bytes in the ELD memory buffer after drm_eld_size() bytes of header and baseline block. The returned value is guaranteed to be a multiple of 4.h](h)}(h**Parameters**h]j )}(hj߮h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjݮubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjٮubjU )}(hhh]jZ )}(h=``const u8 *eld`` pointer to a complete eld memory structure h](j` )}(h``const u8 *eld``h]jf )}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjubj| )}(hhh]h)}(h*pointer to a complete eld memory structureh]h*pointer to a complete eld memory structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hjٮubh)}(h**Description**h]j )}(hj9h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjٮubh)}(hThe returned value does not include the vendor block. It's vendor specific, and comprises of the remaining bytes in the ELD memory buffer after drm_eld_size() bytes of header and baseline block.h]hThe returned value does not include the vendor block. It’s vendor specific, and comprises of the remaining bytes in the ELD memory buffer after drm_eld_size() bytes of header and baseline block.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjٮubh)}(h7The returned value is guaranteed to be a multiple of 4.h]h7The returned value is guaranteed to be a multiple of 4.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjٮubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_eld_get_spk_alloc (C function)c.drm_eld_get_spk_allochNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h(u8 drm_eld_get_spk_alloc (const u8 *eld)h]j )}(h'u8 drm_eld_get_spk_alloc(const u8 *eld)h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_eld_get_spk_allocsbc.drm_eld_get_spk_allocasbuh1hhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_eld_get_spk_alloch]j )}(hjh]hdrm_eld_get_spk_alloc}(hjįhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j )}(hjAh]hconst}(hj߯hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۯubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۯubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_eld_get_spk_allocasbuh1hhjۯubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۯubj)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjۯubj )}(heldh]held}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۯubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjׯubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(hGet speaker allocationh]hGet speaker allocation}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhj]hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jxj jxj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const u8 *eld`` pointer to an ELD memory structure **Description** The returned value is the speakers mask. User has to use ``DRM_ELD_SPEAKER`` field definitions to identify speakers.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhj|ubjU )}(hhh]jZ )}(h5``const u8 *eld`` pointer to an ELD memory structure h](j` )}(h``const u8 *eld``h]jf )}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjubj| )}(hhh]h)}(h"pointer to an ELD memory structureh]h"pointer to an ELD memory structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubah}(h]h ]h"]h$]h&]uh1jT hj|ubh)}(h**Description**h]j )}(hjܰh]h Description}(hjްhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjڰubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhj|ubh)}(htThe returned value is the speakers mask. User has to use ``DRM_ELD_SPEAKER`` field definitions to identify speakers.h](h9The returned value is the speakers mask. User has to use }(hjhhhNhNubjf )}(h``DRM_ELD_SPEAKER``h]hDRM_ELD_SPEAKER}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh( field definitions to identify speakers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_eld_get_conn_type (C function)c.drm_eld_get_conn_typehNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(h(u8 drm_eld_get_conn_type (const u8 *eld)h]j )}(h'u8 drm_eld_get_conn_type(const u8 *eld)h](h)}(hhh]j )}(hu8h]hu8}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j)}jdrm_eld_get_conn_typesbc.drm_eld_get_conn_typeasbuh1hhj/hhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhjWhKubj )}(hdrm_eld_get_conn_typeh]j )}(hjTh]hdrm_eld_get_conn_type}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/hhhjWhKubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jRc.drm_eld_get_conn_typeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjϱhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(heldh]held}(hjܱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubah}(h]h ]h"]h$]h&]j j uh1jhj/hhhjWhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+hhhjWhKubah}(h]j&ah ](j j eh"]h$]h&]j j )j huh1j{ hjWhKhj(hhubj )}(hhh]h)}(h!Get device type hdmi/dp connectedh]h!Get device type hdmi/dp connected}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjhhubah}(h]h ]h"]h$]h&]uh1j hj(hhhjWhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const u8 *eld`` pointer to an ELD memory structure **Description** The caller need to use ``DRM_ELD_CONN_TYPE_HDMI`` or ``DRM_ELD_CONN_TYPE_DP`` to identify the display type connected.h](h)}(h**Parameters**h]j )}(hj(h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhj"ubjU )}(hhh]jZ )}(h5``const u8 *eld`` pointer to an ELD memory structure h](j` )}(h``const u8 *eld``h]jf )}(hjGh]h const u8 *eld}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEubah}(h]h ]h"]h$]h&]uh1j_ hZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhjAubj| )}(hhh]h)}(h"pointer to an ELD memory structureh]h"pointer to an ELD memory structure}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hKhj]ubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hj\hKhj>ubah}(h]h ]h"]h$]h&]uh1jT hj"ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhj"ubh)}(huThe caller need to use ``DRM_ELD_CONN_TYPE_HDMI`` or ``DRM_ELD_CONN_TYPE_DP`` to identify the display type connected.h](hThe caller need to use }(hjhhhNhNubjf )}(h``DRM_ELD_CONN_TYPE_HDMI``h]hDRM_ELD_CONN_TYPE_HDMI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh or }(hjhhhNhNubjf )}(h``DRM_ELD_CONN_TYPE_DP``h]hDRM_ELD_CONN_TYPE_DP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubh( to identify the display type connected.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_eld.hhKhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_eld_sad_get (C function)c.drm_eld_sad_gethNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hKint drm_eld_sad_get (const u8 *eld, int sad_index, struct cea_sad *cta_sad)h]j )}(hJint drm_eld_sad_get(const u8 *eld, int sad_index, struct cea_sad *cta_sad)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_eld_sad_geth]j )}(hdrm_eld_sad_geth]hdrm_eld_sad_get}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h7(const u8 *eld, int sad_index, struct cea_sad *cta_sad)h](j)}(h const u8 *eldh](j )}(hjAh]hconst}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(hu8h]hu8}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j)}jjsbc.drm_eld_sad_getasbuh1hhj$ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj)}(hjOh]h*}(hjthhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj$ubj )}(heldh]held}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h int sad_indexh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h sad_indexh]h sad_index}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct cea_sad *cta_sadh](j )}(hj h]hstruct}(hjϳhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˳ubj )}(h h]h }(hjܳhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˳ubh)}(hhh]j )}(hcea_sadh]hcea_sad}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jbc.drm_eld_sad_getasbuh1hhj˳ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˳ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj˳ubj )}(hcta_sadh]hcta_sad}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˳ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]j޲ah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h"get SAD from ELD to struct cea_sadh]h"get SAD from ELD to struct cea_sad}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKhjMhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jhj jhj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``const u8 *eld`` ELD buffer ``int sad_index`` SAD index ``struct cea_sad *cta_sad`` destination struct cea_sad **Return** 0 on success, or negative on errorsh](h)}(h**Parameters**h]j )}(hjrh]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKhjlubjU )}(hhh](jZ )}(h``const u8 *eld`` ELD buffer h](j` )}(h``const u8 *eld``h]jf )}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKhjubj| )}(hhh]h)}(h ELD bufferh]h ELD buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h``int sad_index`` SAD index h](j` )}(h``int sad_index``h]jf )}(hjʴh]h int sad_index}(hj̴hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjȴubah}(h]h ]h"]h$]h&]uh1j_ h^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKhjĴubj| )}(hhh]h)}(h SAD indexh]h SAD index}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjߴhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjĴubeh}(h]h ]h"]h$]h&]uh1jY hjߴhKhjubjZ )}(h7``struct cea_sad *cta_sad`` destination struct cea_sad h](j` )}(h``struct cea_sad *cta_sad``h]jf )}(hjh]hstruct cea_sad *cta_sad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKhjubj| )}(hhh]h)}(hdestination struct cea_sadh]hdestination struct cea_sad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubeh}(h]h ]h"]h$]h&]uh1jT hjlubh)}(h **Return**h]j )}(hj>h]hReturn}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKhjlubh)}(h#0 on success, or negative on errorsh]h#0 on success, or negative on errors}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chKhjlubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_eld_sad_set (C function)c.drm_eld_sad_sethNtauh1jd hj~HhhhNhNubjw )}(hhh](j| )}(hKint drm_eld_sad_set (u8 *eld, int sad_index, const struct cea_sad *cta_sad)h]j )}(hJint drm_eld_sad_set(u8 *eld, int sad_index, const struct cea_sad *cta_sad)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK%ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK%ubj )}(hdrm_eld_sad_seth]j )}(hdrm_eld_sad_seth]hdrm_eld_sad_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK%ubj)}(h7(u8 *eld, int sad_index, const struct cea_sad *cta_sad)h](j)}(hu8 *eldh](h)}(hhh]j )}(hu8h]hu8}(hjõhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjŵmodnameN classnameNj j )}j ]j)}jjsbc.drm_eld_sad_setasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(heldh]held}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int sad_indexh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h sad_indexh]h sad_index}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct cea_sad *cta_sadh](j )}(hjAh]hconst}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(hcea_sadh]hcea_sad}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jߵc.drm_eld_sad_setasbuh1hhjHubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjHubj )}(hcta_sadh]hcta_sad}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK%ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{hhhjhK%ubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j{ hjhK%hjxhhubj )}(hhh]h)}(h"set SAD to ELD from struct cea_sadh]h"set SAD to ELD from struct cea_sad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK%hjhhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjhK%ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj~HhNhNubj )}(h**Parameters** ``u8 *eld`` ELD buffer ``int sad_index`` SAD index ``const struct cea_sad *cta_sad`` source struct cea_sad **Return** 0 on success, or negative on errorsh](h)}(h**Parameters**h]j )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK)hjubjU )}(hhh](jZ )}(h``u8 *eld`` ELD buffer h](j` )}(h ``u8 *eld``h]jf )}(hj)h]hu8 *eld}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubah}(h]h ]h"]h$]h&]uh1j_ h^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK&hj#ubj| )}(hhh]h)}(h ELD bufferh]h ELD buffer}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hK&hj?ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj>hK&hj ubjZ )}(h``int sad_index`` SAD index h](j` )}(h``int sad_index``h]jf )}(hjbh]h int sad_index}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ h^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK'hj\ubj| )}(hhh]h)}(h SAD indexh]h SAD index}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhK'hjxubah}(h]h ]h"]h$]h&]uh1j{ hj\ubeh}(h]h ]h"]h$]h&]uh1jY hjwhK'hj ubjZ )}(h8``const struct cea_sad *cta_sad`` source struct cea_sad h](j` )}(h!``const struct cea_sad *cta_sad``h]jf )}(hjh]hconst struct cea_sad *cta_sad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK(hjubj| )}(hhh]h)}(hsource struct cea_sadh]hsource struct cea_sad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK(hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK(hj ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h **Return**h]j )}(hjַh]hReturn}(hjطhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjԷubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK*hjubh)}(h#0 on success, or negative on errorsh]h#0 on success, or negative on errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_eld.chK*hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj~HhhhNhNubeh}(h]jah ]h"]edid helper functions referenceah$]h&]uh1hhhhhhhhMwubh)}(hhh](h)}(hSCDC Helper Functions Referenceh]hSCDC Helper Functions Reference}(hj hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj hhhhhMubh)}(hXStatus and Control Data Channel (SCDC) is a mechanism introduced by the HDMI 2.0 specification. It is a point-to-point protocol that allows the HDMI source and HDMI sink to exchange data. The same I2C interface that is used to access EDID serves as the transport mechanism for SCDC.h]hXStatus and Control Data Channel (SCDC) is a mechanism introduced by the HDMI 2.0 specification. It is a point-to-point protocol that allows the HDMI source and HDMI sink to exchange data. The same I2C interface that is used to access EDID serves as the transport mechanism for SCDC.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:392: ./drivers/gpu/drm/display/drm_scdc_helper.chK#hj hhubh)}(hNote: The SCDC status is going to be lost when the display is disconnected. This can happen physically when the user disconnects the cable, but also when a display is switched on (such as waking up a TV).h]hNote: The SCDC status is going to be lost when the display is disconnected. This can happen physically when the user disconnects the cable, but also when a display is switched on (such as waking up a TV).}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:392: ./drivers/gpu/drm/display/drm_scdc_helper.chK(hj hhubh)}(hXThis is further complicated by the fact that, upon a disconnection / reconnection, KMS won't change the mode on its own. This means that one can't just rely on setting the SCDC status on enable, but also has to track the connector status changes using interrupts and restore the SCDC status. The typical solution for this is to trigger an empty modeset in drm_connector_helper_funcs.detect_ctx(), like what vc4 does in vc4_hdmi_reset_link().h]hXThis is further complicated by the fact that, upon a disconnection / reconnection, KMS won’t change the mode on its own. This means that one can’t just rely on setting the SCDC status on enable, but also has to track the connector status changes using interrupts and restore the SCDC status. The typical solution for this is to trigger an empty modeset in drm_connector_helper_funcs.detect_ctx(), like what vc4 does in vc4_hdmi_reset_link().}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:392: ./drivers/gpu/drm/display/drm_scdc_helper.chK-hj hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_scdc_readb (C function)c.drm_scdc_readbhNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hFint drm_scdc_readb (struct i2c_adapter *adapter, u8 offset, u8 *value)h]j )}(hEint drm_scdc_readb(struct i2c_adapter *adapter, u8 offset, u8 *value)h](j)}(hinth]hint}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK(ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhjnhK(ubj )}(hdrm_scdc_readbh]j )}(hdrm_scdc_readbh]hdrm_scdc_readb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj\hhhjnhK(ubj)}(h3(struct i2c_adapter *adapter, u8 offset, u8 *value)h](j)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_scdc_readbasbuh1hhjubj )}(h h]h }(hj۸hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hadapterh]hadapter}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u8 offseth](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j׸c.drm_scdc_readbasbuh1hhj ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hoffseth]hoffset}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u8 *valueh](h)}(hhh]j )}(hu8h]hu8}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j׸c.drm_scdc_readbasbuh1hhjSubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjSubj )}(hvalueh]hvalue}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj\hhhjnhK(ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjXhhhjnhK(ubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j{ hjnhK(hjUhhubj )}(hhh]h)}(hread a single byte from SCDCh]hread a single byte from SCDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK(hjhhubah}(h]h ]h"]h$]h&]uh1j hjUhhhjnhK(ubeh}(h]h ](j functioneh"]h$]h&]j j j jչj jչj j j uh1jv hhhj hNhNubj )}(hXT**Parameters** ``struct i2c_adapter *adapter`` I2C adapter ``u8 offset`` offset of register to read ``u8 *value`` return location for the register value **Description** Reads a single byte from SCDC. This is a convenience wrapper around the drm_scdc_read() function. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj߹h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjݹubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK,hjٹubjU )}(hhh](jZ )}(h,``struct i2c_adapter *adapter`` I2C adapter h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjh]hstruct i2c_adapter *adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK)hjubj| )}(hhh]h)}(h I2C adapterh]h I2C adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK)hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK)hjubjZ )}(h)``u8 offset`` offset of register to read h](j` )}(h ``u8 offset``h]jf )}(hj7h]h u8 offset}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5ubah}(h]h ]h"]h$]h&]uh1j_ hj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK*hj1ubj| )}(hhh]h)}(hoffset of register to readh]hoffset of register to read}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhK*hjMubah}(h]h ]h"]h$]h&]uh1j{ hj1ubeh}(h]h ]h"]h$]h&]uh1jY hjLhK*hjubjZ )}(h5``u8 *value`` return location for the register value h](j` )}(h ``u8 *value``h]jf )}(hjph]h u8 *value}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnubah}(h]h ]h"]h$]h&]uh1j_ hj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK+hjjubj| )}(hhh]h)}(h&return location for the register valueh]h&return location for the register value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK+hjubah}(h]h ]h"]h$]h&]uh1j{ hjjubeh}(h]h ]h"]h$]h&]uh1jY hjhK+hjubeh}(h]h ]h"]h$]h&]uh1jT hjٹubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK-hjٹubh)}(haReads a single byte from SCDC. This is a convenience wrapper around the drm_scdc_read() function.h]haReads a single byte from SCDC. This is a convenience wrapper around the drm_scdc_read() function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK,hjٹubh)}(h **Return**h]j )}(hjҺh]hReturn}(hjԺhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjкubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK/hjٹubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK0hjٹubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_scdc_writeb (C function)c.drm_scdc_writebhNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hFint drm_scdc_writeb (struct i2c_adapter *adapter, u8 offset, u8 value)h]j )}(hEint drm_scdc_writeb(struct i2c_adapter *adapter, u8 offset, u8 value)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK:ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj%hK:ubj )}(hdrm_scdc_writebh]j )}(hdrm_scdc_writebh]hdrm_scdc_writeb}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj%hK:ubj)}(h2(struct i2c_adapter *adapter, u8 offset, u8 value)h](j)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]j)}jj:sbc.drm_scdc_writebasbuh1hhjPubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjPubj )}(hadapterh]hadapter}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(h u8 offseth](h)}(hhh]j )}(hu8h]hu8}(hjɻhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjƻubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj˻modnameN classnameNj j )}j ]jc.drm_scdc_writebasbuh1hhj»ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj»ubj )}(hoffseth]hoffset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj»ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(hu8 valueh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_scdc_writebasbuh1hhj ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hvalueh]hvalue}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj%hK:ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj%hK:ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj%hK:hj hhubj )}(hhh]h)}(hwrite a single byte to SCDCh]hwrite a single byte to SCDC}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK:hjdhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj%hK:ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj hNhNubj )}(hXS**Parameters** ``struct i2c_adapter *adapter`` I2C adapter ``u8 offset`` offset of register to read ``u8 value`` return location for the register value **Description** Writes a single byte to SCDC. This is a convenience wrapper around the drm_scdc_write() function. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK>hjubjU )}(hhh](jZ )}(h,``struct i2c_adapter *adapter`` I2C adapter h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjh]hstruct i2c_adapter *adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhK;hjubj| )}(hhh]h)}(h I2C adapterh]h I2C adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK;hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK;hjubjZ )}(h)``u8 offset`` offset of register to read h](j` )}(h ``u8 offset``h]jf )}(hjh]h u8 offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj߼ubah}(h]h ]h"]h$]h&]uh1j_ hj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhKhjubh)}(h **Return**h]j )}(hj|h]hReturn}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhKAhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:395: ./include/drm/display/drm_scdc_helper.hhKBhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_scdc_read (C function)c.drm_scdc_readhNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hYssize_t drm_scdc_read (struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h]j )}(hXssize_t drm_scdc_read(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjĽhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjƽmodnameN classnameNj j )}j ]j)}j drm_scdc_readsbc.drm_scdc_readasbuh1hhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chK;ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK;ubj )}(h drm_scdc_readh]j )}(hjh]h drm_scdc_read}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK;ubj)}(hC(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](j)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]jc.drm_scdc_readasbuh1hhjubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hadapterh]hadapter}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h u8 offseth](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_scdc_readasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hoffseth]hoffset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj˾hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjǾubj )}(h h]h }(hjپhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǾubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjǾubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǾubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_scdc_readasbuh1hhj ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hsizeh]hsize}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK;ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK;ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK;hjhhubj )}(hhh]h)}(hread a block of data from SCDCh]hread a block of data from SCDC}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chK;hjchhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK;ubeh}(h]h ](j functioneh"]h$]h&]j j j j~j j~j j j uh1jv hhhj hNhNubj )}(hX`**Parameters** ``struct i2c_adapter *adapter`` I2C controller ``u8 offset`` start offset of block to read ``void *buffer`` return location for the block to read ``size_t size`` size of the block to read **Description** Reads a block of data from SCDC, starting at a given offset. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chK?hjubjU )}(hhh](jZ )}(h/``struct i2c_adapter *adapter`` I2C controller h](j` )}(h``struct i2c_adapter *adapter``h]jf )}(hjh]hstruct i2c_adapter *adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubj| )}(hhh]h)}(h%return location for the block to readh]h%return location for the block to read}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hK>hj/ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj.hK>hjubjZ )}(h*``size_t size`` size of the block to read h](j` )}(h``size_t size``h]jf )}(hjRh]h size_t size}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chK?hjLubj| )}(hhh]h)}(hsize of the block to readh]hsize of the block to read}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghK?hjhubah}(h]h ]h"]h$]h&]uh1j{ hjLubeh}(h]h ]h"]h$]h&]uh1jY hjghK?hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKAhjubh)}(hTrue if scrambling is set/reset successfully, false otherwise.h]h>True if scrambling is set/reset successfully, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_scdc_set_high_tmds_clock_ratio (C function)$c.drm_scdc_set_high_tmds_clock_ratiohNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hSbool drm_scdc_set_high_tmds_clock_ratio (struct drm_connector *connector, bool set)h]j )}(hRbool drm_scdc_set_high_tmds_clock_ratio(struct drm_connector *connector, bool set)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h"drm_scdc_set_high_tmds_clock_ratioh]j )}(h"drm_scdc_set_high_tmds_clock_ratioh]h"drm_scdc_set_high_tmds_clock_ratio}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h+(struct drm_connector *connector, bool set)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]j)}jj)sb$c.drm_scdc_set_high_tmds_clock_ratioasbuh1hhj?ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj?ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubj)}(hbool seth](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hseth]hset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(hset TMDS clock ratioh]hset TMDS clock ratio}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj hNhNubj )}(hX|**Parameters** ``struct drm_connector *connector`` connector ``bool set`` ret or reset the high clock ratio **Description** TMDS clock ratio calculations go like this: TMDS character = 10 bit TMDS encoded value TMDS character rate = The rate at which TMDS characters are transmitted (Mcsc) TMDS bit rate = 10x TMDS character rate As per the spec: TMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate Writes to the TMDS config register over SCDC channel, and: sets TMDS clock ratio to 1/40 when set = 1 sets TMDS clock ratio to 1/10 when set = 0 **Return** True if write is successful, false otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubjU )}(hhh](jZ )}(h.``struct drm_connector *connector`` connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hj;h]hstruct drm_connector *connector}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhj5ubj| )}(hhh]h)}(h connectorh]h connector}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhKhjQubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hjPhKhj2ubjZ )}(h/``bool set`` ret or reset the high clock ratio h](j` )}(h ``bool set``h]jf )}(hjth]hbool set}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjnubj| )}(hhh]h)}(h!ret or reset the high clock ratioh]h!ret or reset the high clock ratio}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj2ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubj 340 MHz = 0.25x the character rate = 1/40 pixel clock rate Writes to the TMDS config register over SCDC channel, and: sets TMDS clock ratio to 1/40 when set = 1 sets TMDS clock ratio to 1/10 when set = 0 h]jU )}(hhh](jZ )}(hTMDS clock ratio calculations go like this: TMDS character = 10 bit TMDS encoded value TMDS character rate = The rate at which TMDS characters are transmitted (Mcsc) TMDS bit rate = 10x TMDS character rate h](j` )}(h+TMDS clock ratio calculations go like this:h]h+TMDS clock ratio calculations go like this:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubj| )}(hhh](h)}(h*TMDS character = 10 bit TMDS encoded valueh]h*TMDS character = 10 bit TMDS encoded value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubh)}(hNTMDS character rate = The rate at which TMDS characters are transmitted (Mcsc)h]hNTMDS character rate = The rate at which TMDS characters are transmitted (Mcsc)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubh)}(h'TMDS bit rate = 10x TMDS character rateh]h'TMDS bit rate = 10x TMDS character rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(hAs per the spec: TMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate h](j` )}(hAs per the spec:h]hAs per the spec:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubj| )}(hhh](h)}(hYTMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rateh]hYTMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhj-ubh)}(h\TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rateh]h\TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhj-ubeh}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj,hKhjubjZ )}(hWrites to the TMDS config register over SCDC channel, and: sets TMDS clock ratio to 1/40 when set = 1 sets TMDS clock ratio to 1/10 when set = 0 h](j` )}(h:Writes to the TMDS config register over SCDC channel, and:h]h:Writes to the TMDS config register over SCDC channel, and:}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjZubj| )}(hhh](h)}(h*sets TMDS clock ratio to 1/40 when set = 1h]h*sets TMDS clock ratio to 1/40 when set = 1}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjmubh)}(h*sets TMDS clock ratio to 1/10 when set = 0h]h*sets TMDS clock ratio to 1/10 when set = 0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhKhjmubeh}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjlhKhjubeh}(h]h ]h"]h$]h&]uh1jT hjubah}(h]h ]h"]h$]h&]uh1j;Ehn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubh)}(h-True if write is successful, false otherwise.h]h-True if write is successful, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:398: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubeh}(h]jah ]h"]scdc helper functions referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h HDMI Infoframes Helper Referenceh]h HDMI Infoframes Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hj uh1hhjhhhhhMubh)}(hStrictly speaking this is not a DRM helper library but generally usable by any driver interfacing with HDMI outputs like v4l or alsa drivers. But it nicely fits into the overall topic of mode setting helper libraries and hence is also included here.h]hStrictly speaking this is not a DRM helper library but generally usable by any driver interfacing with HDMI outputs like v4l or alsa drivers. But it nicely fits into the overall topic of mode setting helper libraries and hence is also included here.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq hdr_sink_metadata (C struct)c.hdr_sink_metadatahNtauh1jd hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhNubjw )}(hhh](j| )}(hhdr_sink_metadatah]j )}(hstruct hdr_sink_metadatah](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhKubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj!hKubj )}(hhdr_sink_metadatah]j )}(hjh]hhdr_sink_metadata}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj!hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj!hKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj!hKhj hhubj )}(hhh]h)}(hHDR sink metadatah]hHDR sink metadata}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjShhubah}(h]h ]h"]h$]h&]uh1j hj hhhj!hKubeh}(h]h ](j structeh"]h$]h&]j j j jnj jnj j j uh1jv hhhjhjhNubj )}(hX"**Definition**:: struct hdr_sink_metadata { __u32 metadata_type; union { struct hdr_static_metadata hdmi_type1; }; }; **Members** ``metadata_type`` Static_Metadata_Descriptor_ID. ``{unnamed_union}`` anonymous ``hdmi_type1`` HDR Metadata Infoframe.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubh:}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjrubj, )}(hxstruct hdr_sink_metadata { __u32 metadata_type; union { struct hdr_static_metadata hdmi_type1; }; };h]hxstruct hdr_sink_metadata { __u32 metadata_type; union { struct hdr_static_metadata hdmi_type1; }; };}hjsbah}(h]h ]h"]h$]h&]j j uh1j+ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjrubh)}(h **Members**h]j )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjrubjU )}(hhh](jZ )}(h1``metadata_type`` Static_Metadata_Descriptor_ID. h](j` )}(h``metadata_type``h]jf )}(hjh]h metadata_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjubj| )}(hhh]h)}(hStatic_Metadata_Descriptor_ID.h]hStatic_Metadata_Descriptor_ID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``{unnamed_union}`` anonymous h](j` )}(h``{unnamed_union}``h]jf )}(hjh]h{unnamed_union}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhKhjubj| )}(hhh]h)}(h anonymoush]h anonymous}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubjZ )}(h&``hdmi_type1`` HDR Metadata Infoframe.h](j` )}(h``hdmi_type1``h]jf )}(hj5h]h hdmi_type1}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj3ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhj/ubj| )}(hhh]h)}(hHDR Metadata Infoframe.h]hHDR Metadata Infoframe.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjKubah}(h]h ]h"]h$]h&]uh1j{ hj/ubeh}(h]h ]h"]h$]h&]uh1jY hjJhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjrubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhjhNubh)}(h**Description**h]j )}(hjxh]h Description}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjhhubh)}(h*Metadata Information read from Sink's EDIDh]h,Metadata Information read from Sink’s EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq hdmi_infoframe (C union)c.hdmi_infoframehNtauh1jd hjhhhjhNubjw )}(hhh](j| )}(hhdmi_infoframeh]j )}(hunion hdmi_infoframeh](j )}(hunionh]hunion}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hhdmi_infoframeh]j )}(hjh]hhdmi_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h7overall union of all abstract infoframe representationsh]h7overall union of all abstract infoframe representations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j unioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhjhNubj )}(hX**Definition**:: union hdmi_infoframe { struct hdmi_any_infoframe any; struct hdmi_avi_infoframe avi; struct hdmi_spd_infoframe spd; union hdmi_vendor_any_infoframe vendor; struct hdmi_audio_infoframe audio; struct hdmi_drm_infoframe drm; }; **Members** ``any`` generic infoframe ``avi`` avi infoframe ``spd`` spd infoframe ``vendor`` union of all vendor infoframes ``audio`` audio infoframe ``drm`` Dynamic Range and Mastering infoframeh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjubj, )}(hunion hdmi_infoframe { struct hdmi_any_infoframe any; struct hdmi_avi_infoframe avi; struct hdmi_spd_infoframe spd; union hdmi_vendor_any_infoframe vendor; struct hdmi_audio_infoframe audio; struct hdmi_drm_infoframe drm; };h]hunion hdmi_infoframe { struct hdmi_any_infoframe any; struct hdmi_avi_infoframe avi; struct hdmi_spd_infoframe spd; union hdmi_vendor_any_infoframe vendor; struct hdmi_audio_infoframe audio; struct hdmi_drm_infoframe drm; };}hj6sbah}(h]h ]h"]h$]h&]j j uh1j+ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjubh)}(h **Members**h]j )}(hjGh]hMembers}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjubjU )}(hhh](jZ )}(h``any`` generic infoframe h](j` )}(h``any``h]jf )}(hjfh]hany}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjdubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhj`ubj| )}(hhh]h)}(hgeneric infoframeh]hgeneric infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj|ubah}(h]h ]h"]h$]h&]uh1j{ hj`ubeh}(h]h ]h"]h$]h&]uh1jY hj{hMhj]ubjZ )}(h``avi`` avi infoframe h](j` )}(h``avi``h]jf )}(hjh]havi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjubj| )}(hhh]h)}(h avi infoframeh]h avi infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj]ubjZ )}(h``spd`` spd infoframe h](j` )}(h``spd``h]jf )}(hjh]hspd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjubj| )}(hhh]h)}(h spd infoframeh]h spd infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj]ubjZ )}(h*``vendor`` union of all vendor infoframes h](j` )}(h ``vendor``h]jf )}(hjh]hvendor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhj ubj| )}(hhh]h)}(hunion of all vendor infoframesh]hunion of all vendor infoframes}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj'ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj&hMhj]ubjZ )}(h``audio`` audio infoframe h](j` )}(h ``audio``h]jf )}(hjJh]haudio}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjDubj| )}(hhh]h)}(haudio infoframeh]haudio infoframe}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj`ubah}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hj_hMhj]ubjZ )}(h-``drm`` Dynamic Range and Mastering infoframeh](j` )}(h``drm``h]jf )}(hjh]hdrm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhj}ubj| )}(hhh]h)}(h%Dynamic Range and Mastering infoframeh]h%Dynamic Range and Mastering infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj]ubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhjhNubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjhhubh)}(hThis is used by the generic pack function. This works since all infoframes have the same header which also indicates which type of infoframe should be packed.h]hThis is used by the generic pack function. This works since all infoframes have the same header which also indicates which type of infoframe should be packed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:409: ./include/linux/hdmi.hhMhjhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $hdmi_avi_infoframe_init (C function)c.hdmi_avi_infoframe_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h?void hdmi_avi_infoframe_init (struct hdmi_avi_infoframe *frame)h]j )}(h>void hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chK7ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK7ubj )}(hhdmi_avi_infoframe_inith]j )}(hhdmi_avi_infoframe_inith]hhdmi_avi_infoframe_init}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK7ubj)}(h"(struct hdmi_avi_infoframe *frame)h]j)}(h struct hdmi_avi_infoframe *frameh](j )}(hj h]hstruct}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hhdmi_avi_infoframeh]hhdmi_avi_infoframe}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j)}jj'sbc.hdmi_avi_infoframe_initasbuh1hhj=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=ubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK7ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK7hjhhubj )}(hhh]h)}(h initialize an HDMI AVI infoframeh]h initialize an HDMI AVI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chK7hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK7ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hI**Parameters** ``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframeh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chK;hjubjU )}(hhh]jZ )}(h7``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframeh](j` )}(h$``struct hdmi_avi_infoframe *frame``h]jf )}(hjh]h struct hdmi_avi_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chK=hjubj| )}(hhh]h)}(hHDMI AVI infoframeh]hHDMI AVI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chK8hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK=hjubah}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %hdmi_avi_infoframe_check (C function)c.hdmi_avi_infoframe_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h?int hdmi_avi_infoframe_check (struct hdmi_avi_infoframe *frame)h]j )}(h>int hdmi_avi_infoframe_check(struct hdmi_avi_infoframe *frame)h](j)}(hinth]hint}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKRubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhhjmhKRubj )}(hhdmi_avi_infoframe_checkh]j )}(hhdmi_avi_infoframe_checkh]hhdmi_avi_infoframe_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhjmhKRubj)}(h"(struct hdmi_avi_infoframe *frame)h]j)}(h struct hdmi_avi_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_avi_infoframeh]hhdmi_avi_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.hdmi_avi_infoframe_checkasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj[hhhjmhKRubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjWhhhjmhKRubah}(h]jRah ](j j eh"]h$]h&]j j )j huh1j{ hjmhKRhjThhubj )}(hhh]h)}(hcheck a HDMI AVI infoframeh]hcheck a HDMI AVI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKRhjhhubah}(h]h ]h"]h$]h&]uh1j hjThhhjmhKRubeh}(h]h ](j functioneh"]h$]h&]j j j j7j j7j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjAh]h Parameters}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKVhj;ubjU )}(hhh]jZ )}(h8``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe h](j` )}(h$``struct hdmi_avi_infoframe *frame``h]jf )}(hj`h]h struct hdmi_avi_infoframe *frame}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKShjZubj| )}(hhh]h)}(hHDMI AVI infoframeh]hHDMI AVI infoframe}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhKShjvubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjuhKShjWubah}(h]h ]h"]h$]h&]uh1jT hj;ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKUhj;ubh)}(hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.h]hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKThj;ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKWhj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )hdmi_avi_infoframe_pack_only (C function)c.hdmi_avi_infoframe_pack_onlyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hhssize_t hdmi_avi_infoframe_pack_only (const struct hdmi_avi_infoframe *frame, void *buffer, size_t size)h]j )}(hgssize_t hdmi_avi_infoframe_pack_only(const struct hdmi_avi_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jhdmi_avi_infoframe_pack_onlysbc.hdmi_avi_infoframe_pack_onlyasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKaubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKaubj )}(hhdmi_avi_infoframe_pack_onlyh]j )}(hjh]hhdmi_avi_infoframe_pack_only}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKaubj)}(hC(const struct hdmi_avi_infoframe *frame, void *buffer, size_t size)h](j)}(h&const struct hdmi_avi_infoframe *frameh](j )}(hjAh]hconst}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hhdmi_avi_infoframeh]hhdmi_avi_infoframe}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]jc.hdmi_avi_infoframe_pack_onlyasbuh1hhj=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=ubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_avi_infoframe_pack_onlyasbuh1hhj ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hsizeh]hsize}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKaubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKaubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKahjhhubj )}(hhh]h)}(h)write HDMI AVI infoframe to binary bufferh]h)write HDMI AVI infoframe to binary buffer}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKahjdhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKaubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKehjubjU )}(hhh](jZ )}(h>``const struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe h](j` )}(h*``const struct hdmi_avi_infoframe *frame``h]jf )}(hjh]h&const struct hdmi_avi_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKbhjubj| )}(hhh]h)}(hHDMI AVI infoframeh]hHDMI AVI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKbhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKbhjubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKchjubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKchjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKchjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKdhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hKdhj0ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj/hKdhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjUh]h Description}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKfhjubh)}(hPacks the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hjkhhhNhNubj )}(h **frame**h]hframe}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubh structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjkhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKehjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKjhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $hdmi_avi_infoframe_pack (C function)c.hdmi_avi_infoframe_packhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h]ssize_t hdmi_avi_infoframe_pack (struct hdmi_avi_infoframe *frame, void *buffer, size_t size)h]j )}(h\ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jhdmi_avi_infoframe_packsbc.hdmi_avi_infoframe_packasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hhdmi_avi_infoframe_packh]j )}(hjh]hhdmi_avi_infoframe_pack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h=(struct hdmi_avi_infoframe *frame, void *buffer, size_t size)h](j)}(h struct hdmi_avi_infoframe *frameh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hhdmi_avi_infoframeh]hhdmi_avi_infoframe}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]jc.hdmi_avi_infoframe_packasbuh1hhj ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hframeh]hframe}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjyubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_avi_infoframe_packasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h9check a HDMI AVI infoframe, and write it to binary bufferh]h9check a HDMI AVI infoframe, and write it to binary buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j j j j0j j0j j j uh1jv hhhjhNhNubj )}(hX{**Parameters** ``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj:h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhj4ubjU )}(hhh](jZ )}(h8``struct hdmi_avi_infoframe *frame`` HDMI AVI infoframe h](j` )}(h$``struct hdmi_avi_infoframe *frame``h]jf )}(hjYh]h struct hdmi_avi_infoframe *frame}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjSubj| )}(hhh]h)}(hHDMI AVI infoframeh]hHDMI AVI infoframe}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhKhjoubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjnhKhjPubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjPubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjPubeh}(h]h ]h"]h$]h&]uh1jT hj4ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhj4ubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](hValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the }(hjhhhNhNubj )}(h **frame**h]hframe}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhj4ubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $hdmi_spd_infoframe_init (C function)c.hdmi_spd_infoframe_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hgint hdmi_spd_infoframe_init (struct hdmi_spd_infoframe *frame, const char *vendor, const char *product)h]j )}(hfint hdmi_spd_infoframe_init(struct hdmi_spd_infoframe *frame, const char *vendor, const char *product)h](j)}(hinth]hint}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjzhKubj )}(hhdmi_spd_infoframe_inith]j )}(hhdmi_spd_infoframe_inith]hhdmi_spd_infoframe_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhhjzhKubj)}(hK(struct hdmi_spd_infoframe *frame, const char *vendor, const char *product)h](j)}(h struct hdmi_spd_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_spd_infoframeh]hhdmi_spd_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.hdmi_spd_infoframe_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst char *vendorh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hcharh]hchar}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjRhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hvendorh]hvendor}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst char *producth](j )}(hjAh]hconst}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjtubj )}(hproducth]hproduct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhhjzhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjdhhhjzhKubah}(h]j_ah ](j j eh"]h$]h&]j j )j huh1j{ hjzhKhjahhubj )}(hhh]h)}(h initialize an HDMI SPD infoframeh]h initialize an HDMI SPD infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjahhhjzhKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe ``const char *vendor`` vendor string ``const char *product`` product string **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubjU )}(hhh](jZ )}(h8``struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe h](j` )}(h$``struct hdmi_spd_infoframe *frame``h]jf )}(hj'h]h struct hdmi_spd_infoframe *frame}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhj!ubj| )}(hhh]h)}(hHDMI SPD infoframeh]hHDMI SPD infoframe}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hKhj=ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj<hKhjubjZ )}(h%``const char *vendor`` vendor string h](j` )}(h``const char *vendor``h]jf )}(hj`h]hconst char *vendor}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjZubj| )}(hhh]h)}(h vendor stringh]h vendor string}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhKhjvubah}(h]h ]h"]h$]h&]uh1j{ hjZubeh}(h]h ]h"]h$]h&]uh1jY hjuhKhjubjZ )}(h'``const char *product`` product string h](j` )}(h``const char *product``h]jf )}(hjh]hconst char *product}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubj| )}(hhh]h)}(hproduct stringh]hproduct string}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %hdmi_spd_infoframe_check (C function)c.hdmi_spd_infoframe_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h?int hdmi_spd_infoframe_check (struct hdmi_spd_infoframe *frame)h]j )}(h>int hdmi_spd_infoframe_check(struct hdmi_spd_infoframe *frame)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj'hKubj )}(hhdmi_spd_infoframe_checkh]j )}(hhdmi_spd_infoframe_checkh]hhdmi_spd_infoframe_check}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj'hKubj)}(h"(struct hdmi_spd_infoframe *frame)h]j)}(h struct hdmi_spd_infoframe *frameh](j )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubh)}(hhh]j )}(hhdmi_spd_infoframeh]hhdmi_spd_infoframe}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]j)}jj<sbc.hdmi_spd_infoframe_checkasbuh1hhjRubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjRubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj'hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj'hKubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj'hKhjhhubj )}(hhh]h)}(hcheck a HDMI SPD infoframeh]hcheck a HDMI SPD infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj'hKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh]jZ )}(h8``struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe h](j` )}(h$``struct hdmi_spd_infoframe *frame``h]jf )}(hjh]h struct hdmi_spd_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubj| )}(hhh]h)}(hHDMI SPD infoframeh]hHDMI SPD infoframe}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hKhj0ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj/hKhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjUh]h Description}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.h]hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chKhjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )hdmi_spd_infoframe_pack_only (C function)c.hdmi_spd_infoframe_pack_onlyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hhssize_t hdmi_spd_infoframe_pack_only (const struct hdmi_spd_infoframe *frame, void *buffer, size_t size)h]j )}(hgssize_t hdmi_spd_infoframe_pack_only(const struct hdmi_spd_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jhdmi_spd_infoframe_pack_onlysbc.hdmi_spd_infoframe_pack_onlyasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hhdmi_spd_infoframe_pack_onlyh]j )}(hjh]hhdmi_spd_infoframe_pack_only}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hC(const struct hdmi_spd_infoframe *frame, void *buffer, size_t size)h](j)}(h&const struct hdmi_spd_infoframe *frameh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_spd_infoframeh]hhdmi_spd_infoframe}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj6modnameN classnameNj j )}j ]jc.hdmi_spd_infoframe_pack_onlyasbuh1hhjubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_spd_infoframe_pack_onlyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhM hjhhubj )}(hhh]h)}(h)write HDMI SPD infoframe to binary bufferh]h)write HDMI SPD infoframe to binary buffer}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j j j j9j j9j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjCh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj=ubjU )}(hhh](jZ )}(h>``const struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe h](j` )}(h*``const struct hdmi_spd_infoframe *frame``h]jf )}(hjbh]h&const struct hdmi_spd_infoframe *frame}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM hj\ubj| )}(hhh]h)}(hHDMI SPD infoframeh]hHDMI SPD infoframe}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhM hjxubah}(h]h ]h"]h$]h&]uh1j{ hj\ubeh}(h]h ]h"]h$]h&]uh1jY hjwhM hjYubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjYubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjYubeh}(h]h ]h"]h$]h&]uh1jT hj=ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj=ubh)}(hPacks the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hj%hhhNhNubj )}(h **frame**h]hframe}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubh structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj=ubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $hdmi_spd_infoframe_pack (C function)c.hdmi_spd_infoframe_packhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h]ssize_t hdmi_spd_infoframe_pack (struct hdmi_spd_infoframe *frame, void *buffer, size_t size)h]j )}(h\ssize_t hdmi_spd_infoframe_pack(struct hdmi_spd_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j)}jhdmi_spd_infoframe_packsbc.hdmi_spd_infoframe_packasbuh1hhjqhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM?ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqhhhjhM?ubj )}(hhdmi_spd_infoframe_packh]j )}(hjh]hhdmi_spd_infoframe_pack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjqhhhjhM?ubj)}(h=(struct hdmi_spd_infoframe *frame, void *buffer, size_t size)h](j)}(h struct hdmi_spd_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_spd_infoframeh]hhdmi_spd_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_spd_infoframe_packasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj)}(hjOh]h*}(hjShhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj3ubj )}(hbufferh]hbuffer}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]jc.hdmi_spd_infoframe_packasbuh1hhjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjqhhhjhM?ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjmhhhjhM?ubah}(h]jhah ](j j eh"]h$]h&]j j )j huh1j{ hjhM?hjjhhubj )}(hhh]h)}(h9check a HDMI SPD infoframe, and write it to binary bufferh]h9check a HDMI SPD infoframe, and write it to binary buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM?hjhhubah}(h]h ]h"]h$]h&]uh1j hjjhhhjhM?ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX{**Parameters** ``struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMChjubjU )}(hhh](jZ )}(h8``struct hdmi_spd_infoframe *frame`` HDMI SPD infoframe h](j` )}(h$``struct hdmi_spd_infoframe *frame``h]jf )}(hjh]h struct hdmi_spd_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMAhj ubj| )}(hhh]h)}(hHDMI SPD infoframeh]hHDMI SPD infoframe}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMAhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj(hMAhj ubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjLh]h void *buffer}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjJubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMBhjFubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMBhjbubah}(h]h ]h"]h$]h&]uh1j{ hjFubeh}(h]h ]h"]h$]h&]uh1jY hjahMBhj ubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMChjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMChj ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMEhjubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](hValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the }(hjhhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMDhjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &hdmi_audio_infoframe_init (C function)c.hdmi_audio_infoframe_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hBint hdmi_audio_infoframe_init (struct hdmi_audio_infoframe *frame)h]j )}(hAint hdmi_audio_infoframe_init(struct hdmi_audio_infoframe *frame)h](j)}(hinth]hint}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM]ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj4hM]ubj )}(hhdmi_audio_infoframe_inith]j )}(hhdmi_audio_infoframe_inith]hhdmi_audio_infoframe_init}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhj4hM]ubj)}(h$(struct hdmi_audio_infoframe *frame)h]j)}(h"struct hdmi_audio_infoframe *frameh](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hhdmi_audio_infoframeh]hhdmi_audio_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjIsbc.hdmi_audio_infoframe_initasbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubah}(h]h ]h"]h$]h&]j j uh1jhj"hhhj4hM]ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj4hM]ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj4hM]hjhhubj )}(hhh]h)}(h"initialize an HDMI audio infoframeh]h"initialize an HDMI audio infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM]hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj4hM]ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct hdmi_audio_infoframe *frame`` HDMI audio infoframe **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMahjubjU )}(hhh]jZ )}(h<``struct hdmi_audio_infoframe *frame`` HDMI audio infoframe h](j` )}(h&``struct hdmi_audio_infoframe *frame``h]jf )}(hj'h]h"struct hdmi_audio_infoframe *frame}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM^hj!ubj| )}(hhh]h)}(hHDMI audio infoframeh]hHDMI audio infoframe}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hM^hj=ubah}(h]h ]h"]h$]h&]uh1j{ hj!ubeh}(h]h ]h"]h$]h&]uh1jY hj<hM^hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjbh]h Description}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM`hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM_hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'hdmi_audio_infoframe_check (C function)c.hdmi_audio_infoframe_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hIint hdmi_audio_infoframe_check (const struct hdmi_audio_infoframe *frame)h]j )}(hHint hdmi_audio_infoframe_check(const struct hdmi_audio_infoframe *frame)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMyubj )}(hhdmi_audio_infoframe_checkh]j )}(hhdmi_audio_infoframe_checkh]hhdmi_audio_infoframe_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMyubj)}(h*(const struct hdmi_audio_infoframe *frame)h]j)}(h(const struct hdmi_audio_infoframe *frameh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_audio_infoframeh]hhdmi_audio_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.hdmi_audio_infoframe_checkasbuh1hhjubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjKhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMyubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMyubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMyhjhhubj )}(hhh]h)}(hcheck a HDMI audio infoframeh]hcheck a HDMI audio infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMyhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMyubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX **Parameters** ``const struct hdmi_audio_infoframe *frame`` HDMI audio infoframe **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM}hjubjU )}(hhh]jZ )}(hB``const struct hdmi_audio_infoframe *frame`` HDMI audio infoframe h](j` )}(h,``const struct hdmi_audio_infoframe *frame``h]jf )}(hjh]h(const struct hdmi_audio_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMzhjubj| )}(hhh]h)}(hHDMI audio infoframeh]hHDMI audio infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMzhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMzhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM|hjubh)}(hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.h]hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM{hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM~hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +hdmi_audio_infoframe_pack_only (C function) c.hdmi_audio_infoframe_pack_onlyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hlssize_t hdmi_audio_infoframe_pack_only (const struct hdmi_audio_infoframe *frame, void *buffer, size_t size)h]j )}(hkssize_t hdmi_audio_infoframe_pack_only(const struct hdmi_audio_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]j)}jhdmi_audio_infoframe_pack_onlysb c.hdmi_audio_infoframe_pack_onlyasbuh1hhjNhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhjvhMubj )}(hhdmi_audio_infoframe_pack_onlyh]j )}(hjsh]hhdmi_audio_infoframe_pack_only}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhjvhMubj)}(hE(const struct hdmi_audio_infoframe *frame, void *buffer, size_t size)h](j)}(h(const struct hdmi_audio_infoframe *frameh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_audio_infoframeh]hhdmi_audio_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jq c.hdmi_audio_infoframe_pack_onlyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj)}(hjOh]h*}(hjKhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj+ubj )}(hbufferh]hbuffer}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]jq c.hdmi_audio_infoframe_pack_onlyasbuh1hhjmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjNhhhjvhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhjvhMubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j{ hjvhMhjGhhubj )}(hhh]h)}(h+write HDMI audio infoframe to binary bufferh]h+write HDMI audio infoframe to binary buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhjvhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct hdmi_audio_infoframe *frame`` HDMI audio infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh](jZ )}(hB``const struct hdmi_audio_infoframe *frame`` HDMI audio infoframe h](j` )}(h,``const struct hdmi_audio_infoframe *frame``h]jf )}(hj h]h(const struct hdmi_audio_infoframe *frame}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI audio infoframeh]hHDMI audio infoframe}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj!ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjDh]h void *buffer}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjBubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj>ubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjZubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hjYhMhjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hj}h]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjwubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(hPacks the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hjhhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &hdmi_audio_infoframe_pack (C function)c.hdmi_audio_infoframe_packhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hassize_t hdmi_audio_infoframe_pack (struct hdmi_audio_infoframe *frame, void *buffer, size_t size)h]j )}(h`ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j)}jhdmi_audio_infoframe_packsbc.hdmi_audio_infoframe_packasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjBhMubj )}(hhdmi_audio_infoframe_packh]j )}(hj?h]hhdmi_audio_infoframe_pack}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjBhMubj)}(h?(struct hdmi_audio_infoframe *frame, void *buffer, size_t size)h](j)}(h"struct hdmi_audio_infoframe *frameh](j )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubh)}(hhh]j )}(hhdmi_audio_infoframeh]hhdmi_audio_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j=c.hdmi_audio_infoframe_packasbuh1hhjlubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjlubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbufferh]hbuffer}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j=c.hdmi_audio_infoframe_packasbuh1hhjubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjBhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjBhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjBhMhjhhubj )}(hhh]h)}(h;check a HDMI Audio infoframe, and write it to binary bufferh]h;check a HDMI Audio infoframe, and write it to binary buffer}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjxhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjBhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct hdmi_audio_infoframe *frame`` HDMI Audio infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh](jZ )}(h<``struct hdmi_audio_infoframe *frame`` HDMI Audio infoframe h](j` )}(h&``struct hdmi_audio_infoframe *frame``h]jf )}(hjh]h"struct hdmi_audio_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI Audio infoframeh]hHDMI Audio infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMhjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hj.h]h size_t size}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj(ubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjDubah}(h]h ]h"]h$]h&]uh1j{ hj(ubeh}(h]h ]h"]h$]h&]uh1jY hjChMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjih]h Description}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](hValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the }(hjhhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -hdmi_audio_infoframe_pack_for_dp (C function)"c.hdmi_audio_infoframe_pack_for_dphNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hvssize_t hdmi_audio_infoframe_pack_for_dp (const struct hdmi_audio_infoframe *frame, struct dp_sdp *sdp, u8 dp_version)h]j )}(hussize_t hdmi_audio_infoframe_pack_for_dp(const struct hdmi_audio_infoframe *frame, struct dp_sdp *sdp, u8 dp_version)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}j hdmi_audio_infoframe_pack_for_dpsb"c.hdmi_audio_infoframe_pack_for_dpasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h hdmi_audio_infoframe_pack_for_dph]j )}(hjh]h hdmi_audio_infoframe_pack_for_dp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hM(const struct hdmi_audio_infoframe *frame, struct dp_sdp *sdp, u8 dp_version)h](j)}(h(const struct hdmi_audio_infoframe *frameh](j )}(hjAh]hconst}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_audio_infoframeh]hhdmi_audio_infoframe}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j"c.hdmi_audio_infoframe_pack_for_dpasbuh1hhjubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct dp_sdp *sdph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdp_sdph]hdp_sdp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.hdmi_audio_infoframe_pack_for_dpasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hsdph]hsdp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u8 dp_versionh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j"c.hdmi_audio_infoframe_pack_for_dpasbuh1hhjubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h dp_versionh]h dp_version}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h+Pack a HDMI Audio infoframe for DisplayPorth]h+Pack a HDMI Audio infoframe for DisplayPort}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjrhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct hdmi_audio_infoframe *frame`` HDMI Audio infoframe ``struct dp_sdp *sdp`` Secondary data packet for DisplayPort. ``u8 dp_version`` DisplayPort version to be encoded in the header **Description** Packs a HDMI Audio Infoframe to be sent over DisplayPort. This function fills the secondary data packet to be used for DisplayPort. **Return** Number of total written bytes or a negative errno on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh](jZ )}(hB``const struct hdmi_audio_infoframe *frame`` HDMI Audio infoframe h](j` )}(h,``const struct hdmi_audio_infoframe *frame``h]jf )}(hjh]h(const struct hdmi_audio_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI Audio infoframeh]hHDMI Audio infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h>``struct dp_sdp *sdp`` Secondary data packet for DisplayPort. h](j` )}(h``struct dp_sdp *sdp``h]jf )}(hjh]hstruct dp_sdp *sdp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(h&Secondary data packet for DisplayPort.h]h&Secondary data packet for DisplayPort.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(hB``u8 dp_version`` DisplayPort version to be encoded in the header h](j` )}(h``u8 dp_version``h]jf )}(hj(h]h u8 dp_version}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj"ubj| )}(hhh]h)}(h/DisplayPort version to be encoded in the headerh]h/DisplayPort version to be encoded in the header}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj"ubeh}(h]h ]h"]h$]h&]uh1jY hj=hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjch]h Description}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(hPacks a HDMI Audio Infoframe to be sent over DisplayPort. This function fills the secondary data packet to be used for DisplayPort.h]hPacks a HDMI Audio Infoframe to be sent over DisplayPort. This function fills the secondary data packet to be used for DisplayPort.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(h=Number of total written bytes or a negative errno on failure.h]h=Number of total written bytes or a negative errno on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'hdmi_vendor_infoframe_init (C function)c.hdmi_vendor_infoframe_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hDint hdmi_vendor_infoframe_init (struct hdmi_vendor_infoframe *frame)h]j )}(hCint hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hhdmi_vendor_infoframe_inith]j )}(hhdmi_vendor_infoframe_inith]hhdmi_vendor_infoframe_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h%(struct hdmi_vendor_infoframe *frame)h]j)}(h#struct hdmi_vendor_infoframe *frameh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_vendor_infoframeh]hhdmi_vendor_infoframe}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j)}jjsbc.hdmi_vendor_infoframe_initasbuh1hhjubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjXhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h#initialize an HDMI vendor infoframeh]h#initialize an HDMI vendor infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct hdmi_vendor_infoframe *frame`` HDMI vendor infoframe **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh]jZ )}(h>``struct hdmi_vendor_infoframe *frame`` HDMI vendor infoframe h](j` )}(h'``struct hdmi_vendor_infoframe *frame``h]jf )}(hjh]h#struct hdmi_vendor_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI vendor infoframeh]hHDMI vendor infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (hdmi_vendor_infoframe_check (C function)c.hdmi_vendor_infoframe_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hEint hdmi_vendor_infoframe_check (struct hdmi_vendor_infoframe *frame)h]j )}(hDint hdmi_vendor_infoframe_check(struct hdmi_vendor_infoframe *frame)h](j)}(hinth]hint}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMEubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhj^hMEubj )}(hhdmi_vendor_infoframe_checkh]j )}(hhdmi_vendor_infoframe_checkh]hhdmi_vendor_infoframe_check}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLhhhj^hMEubj)}(h%(struct hdmi_vendor_infoframe *frame)h]j)}(h#struct hdmi_vendor_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_vendor_infoframeh]hhdmi_vendor_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjssbc.hdmi_vendor_infoframe_checkasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjLhhhj^hMEubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhj^hMEubah}(h]jCah ](j j eh"]h$]h&]j j )j huh1j{ hj^hMEhjEhhubj )}(hhh]h)}(hcheck a HDMI vendor infoframeh]hcheck a HDMI vendor infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMEhj hhubah}(h]h ]h"]h$]h&]uh1j hjEhhhj^hMEubeh}(h]h ](j functioneh"]h$]h&]j j j j(j j(j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct hdmi_vendor_infoframe *frame`` HDMI infoframe **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj2h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMIhj,ubjU )}(hhh]jZ )}(h7``struct hdmi_vendor_infoframe *frame`` HDMI infoframe h](j` )}(h'``struct hdmi_vendor_infoframe *frame``h]jf )}(hjQh]h#struct hdmi_vendor_infoframe *frame}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMFhjKubj| )}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMFhjgubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjfhMFhjHubah}(h]h ]h"]h$]h&]uh1jT hj,ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMHhj,ubh)}(hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.h]hiValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMGhj,ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMJhj,ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,hdmi_vendor_infoframe_pack_only (C function)!c.hdmi_vendor_infoframe_pack_onlyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hnssize_t hdmi_vendor_infoframe_pack_only (const struct hdmi_vendor_infoframe *frame, void *buffer, size_t size)h]j )}(hmssize_t hdmi_vendor_infoframe_pack_only(const struct hdmi_vendor_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jhdmi_vendor_infoframe_pack_onlysb!c.hdmi_vendor_infoframe_pack_onlyasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMVubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMVubj )}(hhdmi_vendor_infoframe_pack_onlyh]j )}(hjh]hhdmi_vendor_infoframe_pack_only}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMVubj)}(hF(const struct hdmi_vendor_infoframe *frame, void *buffer, size_t size)h](j)}(h)const struct hdmi_vendor_infoframe *frameh](j )}(hjAh]hconst}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hhdmi_vendor_infoframeh]hhdmi_vendor_infoframe}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]j!c.hdmi_vendor_infoframe_pack_onlyasbuh1hhj.ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj.ubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.hdmi_vendor_infoframe_pack_onlyasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMVubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMVubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMVhjhhubj )}(hhh]h)}(h.write a HDMI vendor infoframe to binary bufferh]h.write a HDMI vendor infoframe to binary buffer}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMVhjUhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMVubeh}(h]h ](j functioneh"]h$]h&]j j j jpj jpj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct hdmi_vendor_infoframe *frame`` HDMI infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMZhjtubjU )}(hhh](jZ )}(h=``const struct hdmi_vendor_infoframe *frame`` HDMI infoframe h](j` )}(h-``const struct hdmi_vendor_infoframe *frame``h]jf )}(hjh]h)const struct hdmi_vendor_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMWhjubj| )}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMWhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMWhjubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMXhjubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMXhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMXhjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hj h]h size_t size}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMYhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMYhj!ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hMYhjubeh}(h]h ]h"]h$]h&]uh1jT hjtubh)}(h**Description**h]j )}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM[hjtubh)}(hPacks the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hj\hhhNhNubj )}(h **frame**h]hframe}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubh structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMZhjtubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM_hjtubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'hdmi_vendor_infoframe_pack (C function)c.hdmi_vendor_infoframe_packhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hcssize_t hdmi_vendor_infoframe_pack (struct hdmi_vendor_infoframe *frame, void *buffer, size_t size)h]j )}(hbssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jhdmi_vendor_infoframe_packsbc.hdmi_vendor_infoframe_packasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hhdmi_vendor_infoframe_packh]j )}(hjh]hhdmi_vendor_infoframe_pack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h@(struct hdmi_vendor_infoframe *frame, void *buffer, size_t size)h](j)}(h#struct hdmi_vendor_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_vendor_infoframeh]hhdmi_vendor_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_vendor_infoframe_packasbuh1hhjubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjjubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_vendor_infoframe_packasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h``struct hdmi_vendor_infoframe *frame`` HDMI Vendor infoframe h](j` )}(h'``struct hdmi_vendor_infoframe *frame``h]jf )}(hjJh]h#struct hdmi_vendor_infoframe *frame}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjHubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjDubj| )}(hhh]h)}(hHDMI Vendor infoframeh]hHDMI Vendor infoframe}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj`ubah}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hj_hMhjAubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj}ubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hj}ubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjAubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjAubeh}(h]h ]h"]h$]h&]uh1jT hj%ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj%ubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](hValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the }(hj hhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj%ubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $hdmi_drm_infoframe_init (C function)c.hdmi_drm_infoframe_inithNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h>int hdmi_drm_infoframe_init (struct hdmi_drm_infoframe *frame)h]j )}(h=int hdmi_drm_infoframe_init(struct hdmi_drm_infoframe *frame)h](j)}(hinth]hint}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhhhjkhMubj )}(hhdmi_drm_infoframe_inith]j )}(hhdmi_drm_infoframe_inith]hhdmi_drm_infoframe_init}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ](j j eh"]h$]h&]j j uh1j hjYhhhjkhMubj)}(h"(struct hdmi_drm_infoframe *frame)h]j)}(h struct hdmi_drm_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.hdmi_drm_infoframe_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjYhhhjkhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjUhhhjkhMubah}(h]jPah ](j j eh"]h$]h&]j j )j huh1j{ hjkhMhjRhhubj )}(hhh]h)}(h9initialize an HDMI Dynaminc Range and mastering infoframeh]h9initialize an HDMI Dynaminc Range and mastering infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjRhhhjkhMubeh}(h]h ](j functioneh"]h$]h&]j j j j5j j5j j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj?h]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj9ubjU )}(hhh]jZ )}(h8``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](j` )}(h$``struct hdmi_drm_infoframe *frame``h]jf )}(hj^h]h struct hdmi_drm_infoframe *frame}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjXubj| )}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjtubah}(h]h ]h"]h$]h&]uh1j{ hjXubeh}(h]h ]h"]h$]h&]uh1jY hjshMhjUubah}(h]h ]h"]h$]h&]uh1jT hj9ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj9ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %hdmi_drm_infoframe_check (C function)c.hdmi_drm_infoframe_checkhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h?int hdmi_drm_infoframe_check (struct hdmi_drm_infoframe *frame)h]j )}(h>int hdmi_drm_infoframe_check(struct hdmi_drm_infoframe *frame)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hhdmi_drm_infoframe_checkh]j )}(hhdmi_drm_infoframe_checkh]hhdmi_drm_infoframe_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h"(struct hdmi_drm_infoframe *frame)h]j)}(h struct hdmi_drm_infoframe *frameh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j)}jjsbc.hdmi_drm_infoframe_checkasbuh1hhjubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjghhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hcheck a HDMI DRM infoframeh]hcheck a HDMI DRM infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe **Description** Validates that the infoframe is consistent. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh]jZ )}(h8``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](j` )}(h$``struct hdmi_drm_infoframe *frame``h]jf )}(hjh]h struct hdmi_drm_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(heValidates that the infoframe is consistent. Returns 0 on success or a negative error code on failure.h]heValidates that the infoframe is consistent. Returns 0 on success or a negative error code on failure.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )hdmi_drm_infoframe_pack_only (C function)c.hdmi_drm_infoframe_pack_onlyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hhssize_t hdmi_drm_infoframe_pack_only (const struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h]j )}(hgssize_t hdmi_drm_infoframe_pack_only(const struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j)}jhdmi_drm_infoframe_pack_onlysbc.hdmi_drm_infoframe_pack_onlyasbuh1hhj[hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhhjhMubj )}(hhdmi_drm_infoframe_pack_onlyh]j )}(hjh]hhdmi_drm_infoframe_pack_only}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhjhMubj)}(hC(const struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h](j)}(h&const struct hdmi_drm_infoframe *frameh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j~c.hdmi_drm_infoframe_pack_onlyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj)}(hjOh]h*}(hjXhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj8ubj )}(hbufferh]hbuffer}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j~c.hdmi_drm_infoframe_pack_onlyasbuh1hhjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj[hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjWhhhjhMubah}(h]jRah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjThhubj )}(hhh]h)}(h)write HDMI DRM infoframe to binary bufferh]h)write HDMI DRM infoframe to binary buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjThhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh](jZ )}(h>``const struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](j` )}(h*``const struct hdmi_drm_infoframe *frame``h]jf )}(hjh]h&const struct hdmi_drm_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj.ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj-hMhjubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjQh]h void *buffer}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1je hjOubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjKubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjgubah}(h]h ]h"]h$]h&]uh1j{ hjKubeh}(h]h ]h"]h$]h&]uh1jY hjfhMhjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(hPacks the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hjhhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $hdmi_drm_infoframe_pack (C function)c.hdmi_drm_infoframe_packhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h]ssize_t hdmi_drm_infoframe_pack (struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h]j )}(h\ssize_t hdmi_drm_infoframe_pack(struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]j)}jhdmi_drm_infoframe_packsbc.hdmi_drm_infoframe_packasbuh1hhj'hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM,ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhjOhM,ubj )}(hhdmi_drm_infoframe_packh]j )}(hjLh]hhdmi_drm_infoframe_pack}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'hhhjOhM,ubj)}(h=(struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h](j)}(h struct hdmi_drm_infoframe *frameh](j )}(hj h]hstruct}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubh)}(hhh]j )}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jJc.hdmi_drm_infoframe_packasbuh1hhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjyubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]jJc.hdmi_drm_infoframe_packasbuh1hhj+ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(hsizeh]hsize}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubeh}(h]h ]h"]h$]h&]j j uh1jhj'hhhjOhM,ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#hhhjOhM,ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjOhM,hj hhubj )}(hhh]h)}(h9check a HDMI DRM infoframe, and write it to binary bufferh]h9check a HDMI DRM infoframe, and write it to binary buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM,hjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhjOhM,ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX{**Parameters** ``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM0hjubjU )}(hhh](jZ )}(h8``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](j` )}(h$``struct hdmi_drm_infoframe *frame``h]jf )}(hjh]h struct hdmi_drm_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM.hjubj| )}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM.hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM.hjubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM/hjubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM/hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM/hjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hj;h]h size_t size}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj9ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM0hj5ubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhM0hjQubah}(h]h ]h"]h$]h&]uh1j{ hj5ubeh}(h]h ]h"]h$]h&]uh1jY hjPhM0hjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjvh]h Description}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM2hjubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](hValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the }(hjhhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM1hjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chM8hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %hdmi_infoframe_pack_only (C function)c.hdmi_infoframe_pack_onlyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(h_ssize_t hdmi_infoframe_pack_only (const union hdmi_infoframe *frame, void *buffer, size_t size)h]j )}(h^ssize_t hdmi_infoframe_pack_only(const union hdmi_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jhdmi_infoframe_pack_onlysbc.hdmi_infoframe_pack_onlyasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hhdmi_infoframe_pack_onlyh]j )}(hjh]hhdmi_infoframe_pack_only}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h>(const union hdmi_infoframe *frame, void *buffer, size_t size)h](j)}(h!const union hdmi_infoframe *frameh](j )}(hjAh]hconst}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(hjh]hunion}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubh)}(hhh]j )}(hhdmi_infoframeh]hhdmi_infoframe}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjimodnameN classnameNj j )}j ]jc.hdmi_infoframe_pack_onlyasbuh1hhj*ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*ubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_infoframe_pack_onlyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h'write a HDMI infoframe to binary bufferh]h'write a HDMI infoframe to binary buffer}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjQhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jlj jlj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``const union hdmi_infoframe *frame`` HDMI infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjvh]h Parameters}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjpubjU )}(hhh](jZ )}(h5``const union hdmi_infoframe *frame`` HDMI infoframe h](j` )}(h%``const union hdmi_infoframe *frame``h]jf )}(hjh]h!const union hdmi_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjpubh)}(h**Description**h]j )}(hjBh]h Description}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjpubh)}(hPacks the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hjXhhhNhNubj )}(h **frame**h]hframe}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubh structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjpubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq hdmi_infoframe_pack (C function)c.hdmi_infoframe_packhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hTssize_t hdmi_infoframe_pack (union hdmi_infoframe *frame, void *buffer, size_t size)h]j )}(hSssize_t hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jhdmi_infoframe_packsbc.hdmi_infoframe_packasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hhdmi_infoframe_packh]j )}(hjh]hhdmi_infoframe_pack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h8(union hdmi_infoframe *frame, void *buffer, size_t size)h](j)}(hunion hdmi_infoframe *frameh](j )}(hjh]hunion}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hhdmi_infoframeh]hhdmi_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_infoframe_packasbuh1hhjubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hframeh]hframe}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjfubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.hdmi_infoframe_packasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h5check a HDMI infoframe, and write it to binary bufferh]h5check a HDMI infoframe, and write it to binary buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hXr**Parameters** ``union hdmi_infoframe *frame`` HDMI infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj'h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj!ubjU )}(hhh](jZ )}(h/``union hdmi_infoframe *frame`` HDMI infoframe h](j` )}(h``union hdmi_infoframe *frame``h]jf )}(hjFh]hunion hdmi_infoframe *frame}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj@ubj| )}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj[hMhj=ubjZ )}(h$``void *buffer`` destination buffer h](j` )}(h``void *buffer``h]jf )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjyubj| )}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj=ubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj=ubeh}(h]h ]h"]h$]h&]uh1jT hj!ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj!ubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](hValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the }(hj hhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh structure into a binary representation that can be written into the corresponding controller registers. This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj!ubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq hdmi_infoframe_log (C function)c.hdmi_infoframe_loghNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hbvoid hdmi_infoframe_log (const char *level, struct device *dev, const union hdmi_infoframe *frame)h]j )}(havoid hdmi_infoframe_log(const char *level, struct device *dev, const union hdmi_infoframe *frame)h](j)}(hvoidh]hvoid}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUhhhjghMubj )}(hhdmi_infoframe_logh]j )}(hhdmi_infoframe_logh]hhdmi_infoframe_log}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ](j j eh"]h$]h&]j j uh1j hjUhhhjghMubj)}(hJ(const char *level, struct device *dev, const union hdmi_infoframe *frame)h](j)}(hconst char *levelh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hlevelh]hlevel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj|sbc.hdmi_infoframe_logasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!const union hdmi_infoframe *frameh](j )}(hjAh]hconst}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(hjh]hunion}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubh)}(hhh]j )}(hhdmi_infoframeh]hhdmi_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j-c.hdmi_infoframe_logasbuh1hhjaubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjaubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjUhhhjghMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjQhhhjghMubah}(h]jLah ](j j eh"]h$]h&]j j )j huh1j{ hjghMhjNhhubj )}(hhh]h)}(hlog info of HDMI infoframeh]hlog info of HDMI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjNhhhjghMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(h**Parameters** ``const char *level`` logging level ``struct device *dev`` device ``const union hdmi_infoframe *frame`` HDMI infoframeh](h)}(h**Parameters**h]j )}(hj#h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh](jZ )}(h$``const char *level`` logging level h](j` )}(h``const char *level``h]jf )}(hjBh]hconst char *level}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj@ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj<ubj| )}(hhh]h)}(h logging levelh]h logging level}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMhjXubah}(h]h ]h"]h$]h&]uh1j{ hj<ubeh}(h]h ]h"]h$]h&]uh1jY hjWhMhj9ubjZ )}(h``struct device *dev`` device h](j` )}(h``struct device *dev``h]jf )}(hj{h]hstruct device *dev}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjyubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjuubj| )}(hhh]h)}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjuubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj9ubjZ )}(h4``const union hdmi_infoframe *frame`` HDMI infoframeh](j` )}(h%``const union hdmi_infoframe *frame``h]jf )}(hjh]h!const union hdmi_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhj9ubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +hdmi_drm_infoframe_unpack_only (C function) c.hdmi_drm_infoframe_unpack_onlyhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hfint hdmi_drm_infoframe_unpack_only (struct hdmi_drm_infoframe *frame, const void *buffer, size_t size)h]j )}(heint hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame, const void *buffer, size_t size)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj )}(hhdmi_drm_infoframe_unpack_onlyh]j )}(hhdmi_drm_infoframe_unpack_onlyh]hhdmi_drm_infoframe_unpack_only}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMubj)}(hC(struct hdmi_drm_infoframe *frame, const void *buffer, size_t size)h](j)}(h struct hdmi_drm_infoframe *frameh](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j)}jj1sb c.hdmi_drm_infoframe_unpack_onlyasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubj )}(hframeh]hframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubj)}(hconst void *bufferh](j )}(hjAh]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.hdmi_drm_infoframe_unpack_onlyasbuh1hhjubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(hQunpack binary buffer of CTA-861-G DRM infoframe DataBytes to a HDMI DRM infoframeh]hQunpack binary buffer of CTA-861-G DRM infoframe DataBytes to a HDMI DRM infoframe}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjphhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe ``const void *buffer`` source buffer ``size_t size`` size of buffer **Description** Unpacks CTA-861-G DRM infoframe DataBytes contained in the binary **buffer** into a structured **frame** of the HDMI Dynamic Range and Mastering (DRM) infoframe. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubjU )}(hhh](jZ )}(h8``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](j` )}(h$``struct hdmi_drm_infoframe *frame``h]jf )}(hjh]h struct hdmi_drm_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h%``const void *buffer`` source buffer h](j` )}(h``const void *buffer``h]jf )}(hjh]hconst void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubj| )}(hhh]h)}(h source bufferh]h source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hj&h]h size_t size}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhj ubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj<ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj;hMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjah]h Description}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(hUnpacks CTA-861-G DRM infoframe DataBytes contained in the binary **buffer** into a structured **frame** of the HDMI Dynamic Range and Mastering (DRM) infoframe.h](hBUnpacks CTA-861-G DRM infoframe DataBytes contained in the binary }(hjwhhhNhNubj )}(h **buffer**h]hbuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubh into a structured }(hjwhhhNhNubj )}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubh9 of the HDMI Dynamic Range and Mastering (DRM) infoframe.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "hdmi_infoframe_unpack (C function)c.hdmi_infoframe_unpackhNtauh1jd hjhhhNhNubjw )}(hhh](j| )}(hXint hdmi_infoframe_unpack (union hdmi_infoframe *frame, const void *buffer, size_t size)h]j )}(hWint hdmi_infoframe_unpack(union hdmi_infoframe *frame, const void *buffer, size_t size)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMUubj )}(hhdmi_infoframe_unpackh]j )}(hhdmi_infoframe_unpackh]hhdmi_infoframe_unpack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMUubj)}(h>(union hdmi_infoframe *frame, const void *buffer, size_t size)h](j)}(hunion hdmi_infoframe *frameh](j )}(hjh]hunion}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj# hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hhdmi_infoframeh]hhdmi_infoframe}(hj4 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1 ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj6 modnameN classnameNj j )}j ]j)}jjsbc.hdmi_infoframe_unpackasbuh1hhj ubj )}(h h]h }(hjT hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hjb hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hframeh]hframe}(hjo hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hconst void *bufferh](j )}(hjAh]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj ubj )}(hbufferh]hbuffer}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jP c.hdmi_infoframe_unpackasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hsizeh]hsize}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMUubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMUubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMUhjhhubj )}(hhh]h)}(h(unpack binary buffer to a HDMI infoframeh]h(unpack binary buffer to a HDMI infoframe}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMUhj; hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMUubeh}(h]h ](j functioneh"]h$]h&]j j j jV j jV j j j uh1jv hhhjhNhNubj )}(hX**Parameters** ``union hdmi_infoframe *frame`` HDMI infoframe ``const void *buffer`` source buffer ``size_t size`` size of buffer **Description** Unpacks the information contained in binary buffer **buffer** into a structured **frame** of a HDMI infoframe. Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4 specification. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j )}(hj` h]h Parameters}(hjb hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMYhjZ ubjU )}(hhh](jZ )}(h/``union hdmi_infoframe *frame`` HDMI infoframe h](j` )}(h``union hdmi_infoframe *frame``h]jf )}(hj h]hunion hdmi_infoframe *frame}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj} ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMVhjy ubj| )}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMVhj ubah}(h]h ]h"]h$]h&]uh1j{ hjy ubeh}(h]h ]h"]h$]h&]uh1jY hj hMVhjv ubjZ )}(h%``const void *buffer`` source buffer h](j` )}(h``const void *buffer``h]jf )}(hj h]hconst void *buffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMWhj ubj| )}(hhh]h)}(h source bufferh]h source buffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMWhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMWhjv ubjZ )}(h``size_t size`` size of buffer h](j` )}(h``size_t size``h]jf )}(hj h]h size_t size}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMXhj ubj| )}(hhh]h)}(hsize of bufferh]hsize of buffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMXhj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hMXhjv ubeh}(h]h ]h"]h$]h&]uh1jT hjZ ubh)}(h**Description**h]j )}(hj, h]h Description}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj* ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:412: ./drivers/video/hdmi.chMZhjZ ubh)}(hUnpacks the information contained in binary buffer **buffer** into a structured **frame** of a HDMI infoframe. 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]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:418: ./include/drm/drm_rect.hhKhj hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect (C struct) c.drm_recthNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hdrm_recth]j )}(hstruct drm_recth](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hKubj )}(hdrm_recth]j )}(hj h]hdrm_rect}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hKubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hKhj hhubj )}(hhh]h)}(htwo dimensional rectangleh]htwo dimensional rectangle}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK%hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hKubeh}(h]h ](j structeh"]h$]h&]j j j j% j j% j j j uh1jv hhhj hNhNubj )}(hX**Definition**:: struct drm_rect { int x1, y1, x2, y2; }; **Members** ``x1`` horizontal starting coordinate (inclusive) ``y1`` vertical starting coordinate (inclusive) ``x2`` horizontal ending coordinate (exclusive) ``y2`` vertical ending coordinate (exclusive)h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj- ubh:}(hj- hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK)hj) ubj, )}(h,struct drm_rect { int x1, y1, x2, y2; };h]h,struct drm_rect { int x1, y1, x2, y2; };}hjJ sbah}(h]h ]h"]h$]h&]j j uh1j+ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK+hj) ubh)}(h **Members**h]j )}(hj[ h]hMembers}(hj] hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjY ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK/hj) ubjU )}(hhh](jZ )}(h2``x1`` horizontal starting coordinate (inclusive) h](j` )}(h``x1``h]jf )}(hjz h]hx1}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjx ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK'hjt ubj| )}(hhh]h)}(h*horizontal starting coordinate (inclusive)h]h*horizontal starting coordinate (inclusive)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK'hj ubah}(h]h ]h"]h$]h&]uh1j{ hjt ubeh}(h]h ]h"]h$]h&]uh1jY hj hK'hjq ubjZ )}(h0``y1`` vertical starting coordinate (inclusive) h](j` )}(h``y1``h]jf )}(hj h]hy1}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK)hj ubj| )}(hhh]h)}(h(vertical starting coordinate (inclusive)h]h(vertical starting coordinate (inclusive)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK)hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hK)hjq ubjZ )}(h0``x2`` horizontal ending coordinate (exclusive) h](j` )}(h``x2``h]jf )}(hj h]hx2}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK(hj ubj| )}(hhh]h)}(h(horizontal ending coordinate (exclusive)h]h(horizontal ending coordinate (exclusive)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK(hj ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj hK(hjq ubjZ )}(h-``y2`` vertical ending coordinate (exclusive)h](j` )}(h``y2``h]jf )}(hj% h]hy2}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj# ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK)hj ubj| )}(hhh]h)}(h&vertical ending coordinate (exclusive)h]h&vertical ending coordinate (exclusive)}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK*hj; ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj: hK)hjq ubeh}(h]h ]h"]h$]h&]uh1jT hj) ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubh)}(h**Description**h]j )}(hjh h]h Description}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjf ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK-hj hhubh)}(hNote that this must match the layout of struct drm_mode_rect or the damage helpers like drm_atomic_helper_damage_iter_init() break.h]hNote that this must match the layout of struct drm_mode_rect or the damage helpers like drm_atomic_helper_damage_iter_init() break.}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK*hj hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq DRM_RECT_INIT (C macro)c.DRM_RECT_INIThNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(h DRM_RECT_INITh]j )}(h DRM_RECT_INITh]j )}(h DRM_RECT_INITh]j )}(hj h]h DRM_RECT_INIT}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK3ubah}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hK3ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj hK3hj hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj hhhj hK3ubeh}(h]h ](j macroeh"]h$]h&]j j j j j j j j j uh1jv hhhj hNhNubh)}(h``DRM_RECT_INIT (x, y, w, h)``h]jf )}(hj h]hDRM_RECT_INIT (x, y, w, h)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK5hj hhubj` h]h)}(h6printf string for :c:type:`struct drm_rect `h](hprintf string for }(hjhhhNhNubh)}(h$:c:type:`struct drm_rect `h]jf )}(hjh]hstruct drm_rect}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_rectuh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKChjubeh}(h]h ]h"]h$]h&]uh1hhjhKChjubah}(h]h ]h"]h$]h&]uh1j;EhjhKChj hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq DRM_RECT_ARG (C macro)c.DRM_RECT_ARGhNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(h DRM_RECT_ARGh]j )}(h DRM_RECT_ARGh]j )}(h DRM_RECT_ARGh]j )}(hjh]h DRM_RECT_ARG}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKGubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKGubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKGhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhKGubeh}(h]h ](j macroeh"]h$]h&]j j j j(j j(j j j uh1jv hhhj hNhNubh)}(h``DRM_RECT_ARG (r)``h]jf )}(hj.h]hDRM_RECT_ARG (r)}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj,ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKIhj hhubj` h]h)}(h9printf arguments for :c:type:`struct drm_rect `h](hprintf arguments for }(hjHhhhNhNubh)}(h$:c:type:`struct drm_rect `h]jf )}(hjRh]hstruct drm_rect}(hjThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_rectuh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKGhjHubeh}(h]h ]h"]h$]h&]uh1hhjohKGhjDubah}(h]h ]h"]h$]h&]uh1j;EhjohKGhj hhubj )}(h(**Parameters** ``r`` rectangle structh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKKhj|ubjU )}(hhh]jZ )}(h``r`` rectangle structh](j` )}(h``r``h]jf )}(hjh]hr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKMhjubj| )}(hhh]h)}(hrectangle structh]hrectangle struct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKHhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKMhjubah}(h]h ]h"]h$]h&]uh1jT hj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq DRM_RECT_FP_FMT (C macro)c.DRM_RECT_FP_FMThNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hDRM_RECT_FP_FMTh]j )}(hDRM_RECT_FP_FMTh]j )}(hDRM_RECT_FP_FMTh]j )}(hjh]hDRM_RECT_FP_FMT}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKMhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhKMubeh}(h]h ](j macroeh"]h$]h&]j j j j+j j+j j j uh1jv hhhj hNhNubh)}(h``DRM_RECT_FP_FMT``h]jf )}(hj1h]hDRM_RECT_FP_FMT}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj/ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKOhj hhubj` in 16.16 fixed point h]h)}(hKprintf string for :c:type:`struct drm_rect ` in 16.16 fixed pointh](hprintf string for }(hjKhhhNhNubh)}(h$:c:type:`struct drm_rect `h]jf )}(hjUh]hstruct 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(r)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKShj hhubj` in 16.16 fixed point h]h)}(hNprintf arguments for :c:type:`struct drm_rect ` in 16.16 fixed pointh](hprintf arguments for }(hjhhhNhNubh)}(h$:c:type:`struct drm_rect `h]jf )}(hjh]hstruct drm_rect}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_rectuh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKQhjubh in 16.16 fixed point}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKQhjubah}(h]h ]h"]h$]h&]uh1j;EhjhKQhj hhubj )}(h**Parameters** ``r`` rectangle struct **Description** This is useful for e.g. printing plane source rectangles, which are in 16.16 fixed point.h](h)}(h**Parameters**h]j )}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKUhj$ubjU )}(hhh]jZ )}(h``r`` rectangle struct h](j` )}(h``r``h]jf )}(hjIh]hr}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKRhjCubj| )}(hhh]h)}(hrectangle structh]hrectangle struct}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hKRhj_ubah}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hj^hKRhj@ubah}(h]h ]h"]h$]h&]uh1jT hj$ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKThj$ubh)}(hYThis is useful for e.g. printing plane source rectangles, which are in 16.16 fixed point.h]hYThis is useful for e.g. printing plane source rectangles, which are in 16.16 fixed point.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKShj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_init (C function)c.drm_rect_inithNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hLvoid drm_rect_init (struct drm_rect *r, int x, int y, int width, int height)h]j )}(hKvoid drm_rect_init(struct drm_rect *r, int x, int y, int width, int height)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK^ubj )}(h drm_rect_inith]j )}(h drm_rect_inith]h drm_rect_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK^ubj)}(h9(struct drm_rect *r, int x, int y, int width, int height)h](j)}(hstruct drm_rect *rh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j)}jjsbc.drm_rect_initasbuh1hhjubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjRhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hrh]hr}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint xh](j)}(hinth]hint}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(hxh]hx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint yh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hyh]hy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int widthh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hwidthh]hwidth}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int heighth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hheighth]hheight}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK^ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK^ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK^hjhhubj )}(hhh]h)}(h%initialize the rectangle from x/y/w/hh]h%initialize the rectangle from x/y/w/h}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK^hjZhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK^ubeh}(h]h ](j functioneh"]h$]h&]j j j juj juj j j uh1jv hhhj hNhNubj )}(h**Parameters** ``struct drm_rect *r`` rectangle ``int x`` x coordinate ``int y`` y coordinate ``int width`` width ``int height`` heighth](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKbhjyubjU )}(hhh](jZ )}(h!``struct drm_rect *r`` rectangle h](j` )}(h``struct drm_rect *r``h]jf )}(hjh]hstruct drm_rect *r}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK_hjubj| )}(hhh]h)}(h rectangleh]h rectangle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK_hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK_hjubjZ )}(h``int x`` x coordinate h](j` )}(h ``int x``h]jf )}(hjh]hint x}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhK`hjubj| )}(hhh]h)}(h x coordinateh]h x coordinate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK`hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK`hjubjZ )}(h``int y`` y coordinate h](j` )}(h ``int y``h]jf )}(hjh]hint y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKahj ubj| )}(hhh]h)}(h y coordinateh]h y coordinate}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hKahj&ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj%hKahjubjZ )}(h``int width`` width h](j` )}(h ``int width``h]jf )}(hjIh]h int width}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjGubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKbhjCubj| )}(hhh]h)}(hwidthh]hwidth}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hKbhj_ubah}(h]h ]h"]h$]h&]uh1j{ hjCubeh}(h]h ]h"]h$]h&]uh1jY hj^hKbhjubjZ )}(h``int height`` heighth](j` )}(h``int height``h]jf )}(hjh]h int height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKdhj|ubj| )}(hhh]h)}(hheighth]hheight}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKchjubah}(h]h ]h"]h$]h&]uh1j{ hj|ubeh}(h]h ]h"]h$]h&]uh1jY hjhKdhjubeh}(h]h ]h"]h$]h&]uh1jT hjyubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_rect_adjust_size (C function)c.drm_rect_adjust_sizehNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(h>void drm_rect_adjust_size (struct drm_rect *r, int dw, int dh)h]j )}(h=void drm_rect_adjust_size(struct drm_rect *r, int dw, int dh)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKoubj )}(hdrm_rect_adjust_sizeh]j )}(hdrm_rect_adjust_sizeh]hdrm_rect_adjust_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKoubj)}(h$(struct drm_rect *r, int dw, int dh)h](j)}(hstruct drm_rect *rh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]j)}jjsbc.drm_rect_adjust_sizeasbuh1hhjubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjehhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hjah]hr}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint dwh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdwh]hdw}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint dhh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdhh]hdh}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKoubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKoubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKohjhhubj )}(hhh]h)}(h adjust the size of the rectangleh]h adjust the size of the rectangle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKohjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKoubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj hNhNubj )}(hX**Parameters** ``struct drm_rect *r`` rectangle to be adjusted ``int dw`` horizontal adjustment ``int dh`` vertical adjustment **Description** Change the size of rectangle **r** by **dw** in the horizontal direction, and by **dh** in the vertical direction, while keeping the center of **r** stationary. Positive **dw** and **dh** increase the size, negative values decrease it.h](h)}(h**Parameters**h]j )}(hj'h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKshj!ubjU )}(hhh](jZ )}(h0``struct drm_rect *r`` rectangle to be adjusted h](j` )}(h``struct drm_rect *r``h]jf )}(hjFh]hstruct drm_rect *r}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKphj@ubj| )}(hhh]h)}(hrectangle to be adjustedh]hrectangle to be adjusted}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hKphj\ubah}(h]h ]h"]h$]h&]uh1j{ hj@ubeh}(h]h ]h"]h$]h&]uh1jY hj[hKphj=ubjZ )}(h!``int dw`` horizontal adjustment h](j` )}(h ``int dw``h]jf )}(hjh]hint dw}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKqhjyubj| )}(hhh]h)}(hhorizontal adjustmenth]hhorizontal adjustment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKqhjubah}(h]h ]h"]h$]h&]uh1j{ hjyubeh}(h]h ]h"]h$]h&]uh1jY hjhKqhj=ubjZ )}(h``int dh`` vertical adjustment h](j` )}(h ``int dh``h]jf )}(hjh]hint dh}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKrhjubj| )}(hhh]h)}(hvertical adjustmenth]hvertical adjustment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKrhj=ubeh}(h]h ]h"]h$]h&]uh1jT hj!ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKthj!ubh)}(hChange the size of rectangle **r** by **dw** in the horizontal direction, and by **dh** in the vertical direction, while keeping the center of **r** stationary.h](hChange the size of rectangle }(hj hhhNhNubj )}(h**r**h]hr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh by }(hj hhhNhNubj )}(h**dw**h]hdw}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh% in the horizontal direction, and by }(hj hhhNhNubj )}(h**dh**h]hdh}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh8 in the vertical direction, while keeping the center of }(hj hhhNhNubj )}(h**r**h]hr}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh stationary.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKshj!ubh)}(hJPositive **dw** and **dh** increase the size, negative values decrease it.h](h Positive }(hj`hhhNhNubj )}(h**dw**h]hdw}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubh and }(hj`hhhNhNubj )}(h**dh**h]hdh}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubh0 increase the size, negative values decrease it.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKwhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_translate (C function)c.drm_rect_translatehNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(h!hhubah}(h]h ]h"]h$]h&]uh1j hj\ hhhju hKubeh}(h]h ](j functioneh"]h$]h&]j j j jY!j jY!j j j uh1jv hhhj hNhNubj )}(hy**Parameters** ``const struct drm_rect *r`` rectangle whose width is returned **Return** The width of the rectangle.h](h)}(h**Parameters**h]j )}(hjc!h]h Parameters}(hje!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hja!ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj]!ubjU )}(hhh]jZ )}(h?``const struct drm_rect *r`` rectangle whose width is returned h](j` )}(h``const struct drm_rect *r``h]jf )}(hj!h]hconst struct drm_rect *r}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj!ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj|!ubj| )}(hhh]h)}(h!rectangle whose width is returnedh]h!rectangle whose width is returned}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj!ubah}(h]h ]h"]h$]h&]uh1j{ hj|!ubeh}(h]h ]h"]h$]h&]uh1jY hj!hKhjy!ubah}(h]h ]h"]h$]h&]uh1jT hj]!ubh)}(h **Return**h]j )}(hj!h]hReturn}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj]!ubh)}(hThe width of the rectangle.h]hThe width of the rectangle.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj]!ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_height (C function)c.drm_rect_heighthNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(h.int drm_rect_height (const struct drm_rect *r)h]j )}(h-int drm_rect_height(const struct drm_rect *r)h](j)}(hinth]hint}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!hhhj"hKubj )}(hdrm_rect_heighth]j )}(hdrm_rect_heighth]hdrm_rect_height}(hj#"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!hhhj"hKubj)}(h(const struct drm_rect *r)h]j)}(hconst struct drm_rect *rh](j )}(hjAh]hconst}(hj?"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;"ubj )}(h h]h }(hjL"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;"ubj )}(hj h]hstruct}(hjZ"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;"ubj )}(h h]h }(hjg"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;"ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjx"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjz"modnameN classnameNj j )}j ]j)}jj%"sbc.drm_rect_heightasbuh1hhj;"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;"ubj)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj;"ubj )}(hjah]hr}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7"ubah}(h]h ]h"]h$]h&]j j uh1jhj!hhhj"hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj!hhhj"hKubah}(h]j!ah ](j j eh"]h$]h&]j j )j huh1j{ hj"hKhj!hhubj )}(hhh]h)}(hdetermine the rectangle heighth]hdetermine the rectangle height}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj"hhubah}(h]h ]h"]h$]h&]uh1j hj!hhhj"hKubeh}(h]h ](j functioneh"]h$]h&]j j j j"j j"j j j uh1jv hhhj hNhNubj )}(h{**Parameters** ``const struct drm_rect *r`` rectangle whose height is returned **Return** The height of the rectangle.h](h)}(h**Parameters**h]j )}(hj"h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj"ubjU )}(hhh]jZ )}(h@``const struct drm_rect *r`` rectangle whose height is returned h](j` )}(h``const struct drm_rect *r``h]jf )}(hj#h]hconst struct drm_rect *r}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj#ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj#ubj| )}(hhh]h)}(h"rectangle whose height is returnedh]h"rectangle whose height is returned}(hj6#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2#hKhj3#ubah}(h]h ]h"]h$]h&]uh1j{ hj#ubeh}(h]h ]h"]h$]h&]uh1jY hj2#hKhj#ubah}(h]h ]h"]h$]h&]uh1jT hj"ubh)}(h **Return**h]j )}(hjX#h]hReturn}(hjZ#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjV#ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj"ubh)}(hThe height of the rectangle.h]hThe height of the rectangle.}(hjn#hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_visible (C function)c.drm_rect_visiblehNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(h0bool drm_rect_visible (const struct drm_rect *r)h]j )}(h/bool drm_rect_visible(const struct drm_rect *r)h](j)}(hjIh]hbool}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhj#hKubj )}(hdrm_rect_visibleh]j )}(hdrm_rect_visibleh]hdrm_rect_visible}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#hhhj#hKubj)}(h(const struct drm_rect *r)h]j)}(hconst struct drm_rect *rh](j )}(hjAh]hconst}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hj h]hstruct}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j)}jj#sbc.drm_rect_visibleasbuh1hhj#ubj )}(h h]h }(hj2$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj)}(hjOh]h*}(hj@$hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj#ubj )}(hjah]hr}(hjM$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj#ubah}(h]h ]h"]h$]h&]j j uh1jhj#hhhj#hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#hhhj#hKubah}(h]j#ah ](j j eh"]h$]h&]j j )j huh1j{ hj#hKhj#hhubj )}(hhh]h)}(h%determine if the rectangle is visibleh]h%determine if the rectangle is visible}(hjv$hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhjs$hhubah}(h]h ]h"]h$]h&]uh1j hj#hhhj#hKubeh}(h]h ](j functioneh"]h$]h&]j j j j$j j$j j j uh1jv hhhj hNhNubj )}(h**Parameters** ``const struct drm_rect *r`` rectangle whose visibility is returned **Return** ``true`` if the rectangle is visible, ``false`` otherwise.h](h)}(h**Parameters**h]j )}(hj$h]h Parameters}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj$ubjU )}(hhh]jZ )}(hD``const struct drm_rect *r`` rectangle whose visibility is returned h](j` )}(h``const struct drm_rect *r``h]jf )}(hj$h]hconst struct drm_rect *r}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj$ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj$ubj| )}(hhh]h)}(h&rectangle whose visibility is returnedh]h&rectangle whose visibility is returned}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj$ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj$hKhj$ubah}(h]h ]h"]h$]h&]uh1jT hj$ubh)}(h **Return**h]j )}(hj$h]hReturn}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj$ubh)}(h:``true`` if the rectangle is visible, ``false`` otherwise.h](jf )}(h``true``h]htrue}(hj %hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubh if the rectangle is visible, }(hj%hhhNhNubjf )}(h ``false``h]hfalse}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%ubh otherwise.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_equals (C function)c.drm_rect_equalshNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hKbool drm_rect_equals (const struct drm_rect *r1, const struct drm_rect *r2)h]j )}(hJbool drm_rect_equals(const struct drm_rect *r1, const struct drm_rect *r2)h](j)}(hjIh]hbool}(hjW%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS%hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKubj )}(h h]h }(hje%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS%hhhjd%hKubj )}(hdrm_rect_equalsh]j )}(hdrm_rect_equalsh]hdrm_rect_equals}(hjw%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjS%hhhjd%hKubj)}(h6(const struct drm_rect *r1, const struct drm_rect *r2)h](j)}(hconst struct drm_rect *r1h](j )}(hjAh]hconst}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%modnameN classnameNj j )}j ]j)}jjy%sbc.drm_rect_equalsasbuh1hhj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj%ubj )}(hr1h]hr1}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubj)}(hconst struct drm_rect *r2h](j )}(hjAh]hconst}(hj &hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hj-&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(hj h]hstruct}(hj;&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hjH&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjY&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[&modnameN classnameNj j )}j ]j%c.drm_rect_equalsasbuh1hhj&ubj )}(h h]h }(hjw&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj&ubj )}(hr2h]hr2}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubeh}(h]h ]h"]h$]h&]j j uh1jhjS%hhhjd%hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjO%hhhjd%hKubah}(h]jJ%ah ](j j eh"]h$]h&]j j )j huh1j{ hjd%hKhjL%hhubj )}(hhh]h)}(h%determine if two rectangles are equalh]h%determine if two rectangles are equal}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj&hhubah}(h]h ]h"]h$]h&]uh1j hjL%hhhjd%hKubeh}(h]h ](j functioneh"]h$]h&]j j j j&j j&j j j uh1jv hhhj hNhNubj )}(h**Parameters** ``const struct drm_rect *r1`` first rectangle ``const struct drm_rect *r2`` second rectangle **Return** ``true`` if the rectangles are equal, ``false`` otherwise.h](h)}(h**Parameters**h]j )}(hj&h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj&ubjU )}(hhh](jZ )}(h.``const struct drm_rect *r1`` first rectangle h](j` )}(h``const struct drm_rect *r1``h]jf )}(hj&h]hconst struct drm_rect *r1}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj&ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj&ubj| )}(hhh]h)}(hfirst rectangleh]hfirst rectangle}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hKhj'ubah}(h]h ]h"]h$]h&]uh1j{ hj&ubeh}(h]h ]h"]h$]h&]uh1jY hj'hKhj&ubjZ )}(h/``const struct drm_rect *r2`` second rectangle h](j` )}(h``const struct drm_rect *r2``h]jf )}(hj6'h]hconst struct drm_rect *r2}(hj8'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj4'ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj0'ubj| )}(hhh]h)}(hsecond rectangleh]hsecond rectangle}(hjO'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjK'hKhjL'ubah}(h]h ]h"]h$]h&]uh1j{ hj0'ubeh}(h]h ]h"]h$]h&]uh1jY hjK'hKhj&ubeh}(h]h ]h"]h$]h&]uh1jT hj&ubh)}(h **Return**h]j )}(hjq'h]hReturn}(hjs'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjo'ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj&ubh)}(h:``true`` if the rectangles are equal, ``false`` otherwise.h](jf )}(h``true``h]htrue}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubh if the rectangles are equal, }(hj'hhhNhNubjf )}(h ``false``h]hfalse}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj'ubh otherwise.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_fp_to_int (C function)c.drm_rect_fp_to_inthNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hJvoid drm_rect_fp_to_int (struct drm_rect *dst, const struct drm_rect *src)h]j )}(hIvoid drm_rect_fp_to_int(struct drm_rect *dst, const struct drm_rect *src)h](j)}(hvoidh]hvoid}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhj'hKubj )}(hdrm_rect_fp_to_inth]j )}(hdrm_rect_fp_to_inth]hdrm_rect_fp_to_int}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'hhhj'hKubj)}(h2(struct drm_rect *dst, const struct drm_rect *src)h](j)}(hstruct drm_rect *dsth](j )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj (hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj1(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3(modnameN classnameNj j )}j ]j)}jj'sbc.drm_rect_fp_to_intasbuh1hhj(ubj )}(h h]h }(hjQ(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj)}(hjOh]h*}(hj_(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubj )}(hdsth]hdst}(hjl(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj (ubj)}(hconst struct drm_rect *srch](j )}(hjAh]hconst}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]jM(c.drm_rect_fp_to_intasbuh1hhj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj(ubj )}(hsrch]hsrc}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj (ubeh}(h]h ]h"]h$]h&]j j uh1jhj'hhhj'hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj'hhhj'hKubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j{ hj'hKhj'hhubj )}(hhh]h)}(h5Convert a rect in 16.16 fixed point form to int form.h]h5Convert a rect in 16.16 fixed point form to int form.}(hj!)hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj)hhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj'hKubeh}(h]h ](j functioneh"]h$]h&]j j j j9)j j9)j j j uh1jv hhhj hNhNubj )}(h**Parameters** ``struct drm_rect *dst`` rect to be stored the converted value ``const struct drm_rect *src`` rect in 16.16 fixed point formh](h)}(h**Parameters**h]j )}(hjC)h]h Parameters}(hjE)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjA)ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj=)ubjU )}(hhh](jZ )}(h?``struct drm_rect *dst`` rect to be stored the converted value h](j` )}(h``struct drm_rect *dst``h]jf )}(hjb)h]hstruct drm_rect *dst}(hjd)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`)ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj\)ubj| )}(hhh]h)}(h%rect to be stored the converted valueh]h%rect to be stored the converted value}(hj{)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjw)hKhjx)ubah}(h]h ]h"]h$]h&]uh1j{ hj\)ubeh}(h]h ]h"]h$]h&]uh1jY hjw)hKhjY)ubjZ )}(h=``const struct drm_rect *src`` rect in 16.16 fixed point formh](j` )}(h``const struct drm_rect *src``h]jf )}(hj)h]hconst struct drm_rect *src}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj)ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj)ubj| )}(hhh]h)}(hrect in 16.16 fixed point formh]hrect in 16.16 fixed point form}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj)ubah}(h]h ]h"]h$]h&]uh1j{ hj)ubeh}(h]h ]h"]h$]h&]uh1jY hj)hKhjY)ubeh}(h]h ]h"]h$]h&]uh1jT hj=)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_overlap (C function)c.drm_rect_overlaphNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hJbool drm_rect_overlap (const struct drm_rect *a, const struct drm_rect *b)h]j )}(hIbool drm_rect_overlap(const struct drm_rect *a, const struct drm_rect *b)h](j)}(hjIh]hbool}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)hhhj*hKubj )}(hdrm_rect_overlaph]j )}(hdrm_rect_overlaph]hdrm_rect_overlap}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj)hhhj*hKubj)}(h4(const struct drm_rect *a, const struct drm_rect *b)h](j)}(hconst struct drm_rect *ah](j )}(hjAh]hconst}(hj1*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-*ubj )}(h h]h }(hj>*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-*ubj )}(hj h]hstruct}(hjL*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-*ubj )}(h h]h }(hjY*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-*ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjg*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjl*modnameN classnameNj j )}j ]j)}jj*sbc.drm_rect_overlapasbuh1hhj-*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-*ubj)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj-*ubj )}(hah]ha}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)*ubj)}(hconst struct drm_rect *bh](j )}(hjAh]hconst}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(hj h]hstruct}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j*c.drm_rect_overlapasbuh1hhj*ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hjOh]h*}(hj#+hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj*ubj )}(hbh]hb}(hj0+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)*ubeh}(h]h ]h"]h$]h&]j j uh1jhj)hhhj*hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj)hhhj*hKubah}(h]j)ah ](j j eh"]h$]h&]j j )j huh1j{ hj*hKhj)hhubj )}(hhh]h)}(hCheck if two rectangles overlaph]hCheck if two rectangles overlap}(hjZ+hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhjW+hhubah}(h]h ]h"]h$]h&]uh1j hj)hhhj*hKubeh}(h]h ](j functioneh"]h$]h&]j j j jr+j jr+j j j uh1jv hhhj hNhNubj )}(h**Parameters** ``const struct drm_rect *a`` first rectangle ``const struct drm_rect *b`` second rectangle **Return** ``true`` if the rectangles overlap, ``false`` otherwise.h](h)}(h**Parameters**h]j )}(hj|+h]h Parameters}(hj~+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz+ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhjv+ubjU )}(hhh](jZ )}(h-``const struct drm_rect *a`` first rectangle h](j` )}(h``const struct drm_rect *a``h]jf )}(hj+h]hconst struct drm_rect *a}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj+ubj| )}(hhh]h)}(hfirst rectangleh]hfirst rectangle}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj+ubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hj+hKhj+ubjZ )}(h.``const struct drm_rect *b`` second rectangle h](j` )}(h``const struct drm_rect *b``h]jf )}(hj+h]hconst struct drm_rect *b}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj+ubah}(h]h ]h"]h$]h&]uh1j_ h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhj+ubj| )}(hhh]h)}(hsecond rectangleh]hsecond rectangle}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj+ubah}(h]h ]h"]h$]h&]uh1j{ hj+ubeh}(h]h ]h"]h$]h&]uh1jY hj+hKhj+ubeh}(h]h ]h"]h$]h&]uh1jT hjv+ubh)}(h **Return**h]j )}(hj,h]hReturn}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ,ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhjv+ubh)}(h8``true`` if the rectangles overlap, ``false`` otherwise.h](jf )}(h``true``h]htrue}(hj),hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%,ubh if the rectangles overlap, }(hj%,hhhNhNubjf )}(h ``false``h]hfalse}(hj;,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj%,ubh otherwise.}(hj%,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:421: ./include/drm/drm_rect.hhKhjv+ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_intersect (C function)c.drm_rect_intersecthNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hHbool drm_rect_intersect (struct drm_rect *r1, const struct drm_rect *r2)h]j )}(hGbool drm_rect_intersect(struct drm_rect *r1, const struct drm_rect *r2)h](j)}(hjIh]hbool}(hjt,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjp,hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK!ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjp,hhhj,hK!ubj )}(hdrm_rect_intersecth]j )}(hdrm_rect_intersecth]hdrm_rect_intersect}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjp,hhhj,hK!ubj)}(h0(struct drm_rect *r1, const struct drm_rect *r2)h](j)}(hstruct drm_rect *r1h](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j)}jj,sbc.drm_rect_intersectasbuh1hhj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj,ubj )}(hr1h]hr1}(hj -hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hconst struct drm_rect *r2h](j )}(hjAh]hconst}(hj"-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hj/-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(hj h]hstruct}(hj=-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hjJ-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj[-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]-modnameN classnameNj j )}j ]j,c.drm_rect_intersectasbuh1hhj-ubj )}(h h]h }(hjy-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj-ubj )}(hr2h]hr2}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubeh}(h]h ]h"]h$]h&]j j uh1jhjp,hhhj,hK!ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjl,hhhj,hK!ubah}(h]jg,ah ](j j eh"]h$]h&]j j )j huh1j{ hj,hK!hji,hhubj )}(hhh]h)}(hintersect two rectanglesh]hintersect two rectangles}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK!hj-hhubah}(h]h ]h"]h$]h&]uh1j hji,hhhj,hK!ubeh}(h]h ](j functioneh"]h$]h&]j j j j-j j-j j j uh1jv hhhj hNhNubj )}(hXP**Parameters** ``struct drm_rect *r1`` first rectangle ``const struct drm_rect *r2`` second rectangle **Description** Calculate the intersection of rectangles **r1** and **r2**. **r1** will be overwritten with the intersection. **Return** ``true`` if rectangle **r1** is still visible after the operation, ``false`` otherwise.h](h)}(h**Parameters**h]j )}(hj-h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK%hj-ubjU )}(hhh](jZ )}(h(``struct drm_rect *r1`` first rectangle h](j` )}(h``struct drm_rect *r1``h]jf )}(hj-h]hstruct drm_rect *r1}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj-ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK"hj-ubj| )}(hhh]h)}(hfirst rectangleh]hfirst rectangle}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hK"hj.ubah}(h]h ]h"]h$]h&]uh1j{ hj-ubeh}(h]h ]h"]h$]h&]uh1jY hj.hK"hj-ubjZ )}(h/``const struct drm_rect *r2`` second rectangle h](j` )}(h``const struct drm_rect *r2``h]jf )}(hj8.h]hconst struct drm_rect *r2}(hj:.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6.ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK#hj2.ubj| )}(hhh]h)}(hsecond rectangleh]hsecond rectangle}(hjQ.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjM.hK#hjN.ubah}(h]h ]h"]h$]h&]uh1j{ hj2.ubeh}(h]h ]h"]h$]h&]uh1jY hjM.hK#hj-ubeh}(h]h ]h"]h$]h&]uh1jT hj-ubh)}(h**Description**h]j )}(hjs.h]h Description}(hju.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjq.ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK%hj-ubh)}(hmCalculate the intersection of rectangles **r1** and **r2**. **r1** will be overwritten with the intersection.h](h)Calculate the intersection of rectangles }(hj.hhhNhNubj )}(h**r1**h]hr1}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubh and }(hj.hhhNhNubj )}(h**r2**h]hr2}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubh. }(hj.hhhNhNubj )}(h**r1**h]hr1}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubh+ will be overwritten with the intersection.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK$hj-ubh)}(h **Return**h]j )}(hj.h]hReturn}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK'hj-ubh)}(hW``true`` if rectangle **r1** is still visible after the operation, ``false`` otherwise.h](jf )}(h``true``h]htrue}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.ubh if rectangle }(hj.hhhNhNubj )}(h**r1**h]hr1}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubh' is still visible after the operation, }(hj.hhhNhNubjf )}(h ``false``h]hfalse}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj.ubh otherwise.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chK(hj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_rect_clip_scaled (C function)c.drm_rect_clip_scaledhNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(hcbool drm_rect_clip_scaled (struct drm_rect *src, struct drm_rect *dst, const struct drm_rect *clip)h]j )}(hbbool drm_rect_clip_scaled(struct drm_rect *src, struct drm_rect *dst, const struct drm_rect *clip)h](j)}(hjIh]hbool}(hjG/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC/hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKNubj )}(h h]h }(hjU/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC/hhhjT/hKNubj )}(hdrm_rect_clip_scaledh]j )}(hdrm_rect_clip_scaledh]hdrm_rect_clip_scaled}(hjg/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc/ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjC/hhhjT/hKNubj)}(hI(struct drm_rect *src, struct drm_rect *dst, const struct drm_rect *clip)h](j)}(hstruct drm_rect *srch](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]j)}jji/sbc.drm_rect_clip_scaledasbuh1hhj/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj)}(hjOh]h*}(hj/hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/ubj )}(hsrch]hsrc}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{/ubj)}(hstruct drm_rect *dsth](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]j/c.drm_rect_clip_scaledasbuh1hhj/ubj )}(h h]h }(hj10hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj)}(hjOh]h*}(hj?0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/ubj )}(hdsth]hdst}(hjL0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{/ubj)}(hconst struct drm_rect *cliph](j )}(hjAh]hconst}(hje0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja0ubj )}(h h]h }(hjr0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja0ubj )}(hj h]hstruct}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja0ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja0ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]j/c.drm_rect_clip_scaledasbuh1hhja0ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja0ubj)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhja0ubj )}(hcliph]hclip}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{/ubeh}(h]h ]h"]h$]h&]j j uh1jhjC/hhhjT/hKNubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?/hhhjT/hKNubah}(h]j:/ah ](j j eh"]h$]h&]j j )j huh1j{ hjT/hKNhjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj>hhubah}(h]h ]h"]h$]h&]uh1j hj<hhhj<hKubeh}(h]h ](j functioneh"]h$]h&]j j j j>j j>j j j uh1jv hhhj hNhNubj )}(hX**Parameters** ``struct drm_rect *r`` rectangle to be rotated ``int width`` Width of the coordinate space ``int height`` Height of the coordinate space ``unsigned int rotation`` Transformation to be applied **Description** Apply **rotation** to the coordinates of rectangle **r**. **width** and **height** combined with **rotation** define the location of the new origin. **width** correcsponds to the horizontal and **height** to the vertical axis of the untransformed coordinate space.h](h)}(h**Parameters**h]j )}(hj'>h]h Parameters}(hj)>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%>ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj!>ubjU )}(hhh](jZ )}(h/``struct drm_rect *r`` rectangle to be rotated h](j` )}(h``struct drm_rect *r``h]jf )}(hjF>h]hstruct drm_rect *r}(hjH>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjD>ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj@>ubj| )}(hhh]h)}(hrectangle to be rotatedh]hrectangle to be rotated}(hj_>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[>hKhj\>ubah}(h]h ]h"]h$]h&]uh1j{ hj@>ubeh}(h]h ]h"]h$]h&]uh1jY hj[>hKhj=>ubjZ )}(h,``int width`` Width of the coordinate space h](j` )}(h ``int width``h]jf )}(hj>h]h int width}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj}>ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhjy>ubj| )}(hhh]h)}(hWidth of the coordinate spaceh]hWidth of the coordinate space}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKhj>ubah}(h]h ]h"]h$]h&]uh1j{ hjy>ubeh}(h]h ]h"]h$]h&]uh1jY hj>hKhj=>ubjZ )}(h.``int height`` Height of the coordinate space h](j` )}(h``int height``h]jf )}(hj>h]h int height}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj>ubj| )}(hhh]h)}(hHeight of the coordinate spaceh]hHeight of the coordinate space}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hKhj>ubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hj>hKhj=>ubjZ )}(h7``unsigned int rotation`` Transformation to be applied h](j` )}(h``unsigned int rotation``h]jf )}(hj>h]hunsigned int rotation}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj>ubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj>ubj| )}(hhh]h)}(hTransformation to be appliedh]hTransformation to be applied}(hj ?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hKhj?ubah}(h]h ]h"]h$]h&]uh1j{ hj>ubeh}(h]h ]h"]h$]h&]uh1jY hj?hKhj=>ubeh}(h]h ]h"]h$]h&]uh1jT hj!>ubh)}(h**Description**h]j )}(hj,?h]h Description}(hj.?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*?ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj!>ubh)}(h9Apply **rotation** to the coordinates of rectangle **r**.h](hApply }(hjB?hhhNhNubj )}(h **rotation**h]hrotation}(hjJ?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjB?ubh! to the coordinates of rectangle }(hjB?hhhNhNubj )}(h**r**h]hr}(hj\?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjB?ubh.}(hjB?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj!>ubh)}(hZ**width** and **height** combined with **rotation** define the location of the new origin.h](j )}(h **width**h]hwidth}(hjy?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hju?ubh and }(hju?hhhNhNubj )}(h **height**h]hheight}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hju?ubh combined with }(hju?hhhNhNubj )}(h **rotation**h]hrotation}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hju?ubh' define the location of the new origin.}(hju?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj!>ubh)}(hs**width** correcsponds to the horizontal and **height** to the vertical axis of the untransformed coordinate space.h](j )}(h **width**h]hwidth}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubh$ correcsponds to the horizontal and }(hj?hhhNhNubj )}(h **height**h]hheight}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubh< to the vertical axis of the untransformed coordinate space.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chKhj!>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_rect_rotate_inv (C function)c.drm_rect_rotate_invhNtauh1jd hj hhhNhNubjw )}(hhh](j| )}(h[void drm_rect_rotate_inv (struct drm_rect *r, int width, int height, unsigned int rotation)h]j )}(hZvoid drm_rect_rotate_inv(struct drm_rect *r, int width, int height, unsigned int rotation)h](j)}(hvoidh]hvoid}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM/ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhj@hM/ubj )}(hdrm_rect_rotate_invh]j )}(hdrm_rect_rotate_invh]hdrm_rect_rotate_inv}(hj&@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@hhhj@hM/ubj)}(hB(struct drm_rect *r, int width, int height, unsigned int rotation)h](j)}(hstruct drm_rect *rh](j )}(hj h]hstruct}(hjB@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>@ubj )}(h h]h }(hjO@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>@ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj`@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjb@modnameN classnameNj j )}j ]j)}jj(@sbc.drm_rect_rotate_invasbuh1hhj>@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>@ubj)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>@ubj )}(hjah]hr}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:@ubj)}(h int widthh](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hwidthh]hwidth}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:@ubj)}(h int heighth](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hheighth]hheight}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:@ubj)}(hunsigned int rotationh](j)}(hunsignedh]hunsigned}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj )}(h h]h }(hj+AhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj)}(hinth]hint}(hj9AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj )}(h h]h }(hjGAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(hrotationh]hrotation}(hjUAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:@ubeh}(h]h ]h"]h$]h&]j j uh1jhj@hhhj@hM/ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?hhhj@hM/ubah}(h]j?ah ](j j eh"]h$]h&]j j )j huh1j{ hj@hM/hj?hhubj )}(hhh]h)}(hInverse rotate the rectangleh]hInverse rotate the rectangle}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM/hj|Ahhubah}(h]h ]h"]h$]h&]uh1j hj?hhhj@hM/ubeh}(h]h ](j functioneh"]h$]h&]j j j jAj jAj j j uh1jv hhhj hNhNubj )}(hX**Parameters** ``struct drm_rect *r`` rectangle to be rotated ``int width`` Width of the coordinate space ``int height`` Height of the coordinate space ``unsigned int rotation`` Transformation whose inverse is to be applied **Description** Apply the inverse of **rotation** to the coordinates of rectangle **r**. **width** and **height** combined with **rotation** define the location of the new origin. **width** correcsponds to the horizontal and **height** to the vertical axis of the original untransformed coordinate space, so that you never have to flip them when doing a rotatation and its inverse. That is, if you do :: drm_rect_rotate(&r, width, height, rotation); drm_rect_rotate_inv(&r, width, height, rotation); you will always get back the original rectangle.h](h)}(h**Parameters**h]j )}(hjAh]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM3hjAubjU )}(hhh](jZ )}(h/``struct drm_rect *r`` rectangle to be rotated h](j` )}(h``struct drm_rect *r``h]jf )}(hjAh]hstruct drm_rect *r}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM0hjAubj| )}(hhh]h)}(hrectangle to be rotatedh]hrectangle to be rotated}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhM0hjAubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjAhM0hjAubjZ )}(h,``int width`` Width of the coordinate space h](j` )}(h ``int width``h]jf )}(hjAh]h int width}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjAubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM1hjAubj| )}(hhh]h)}(hWidth of the coordinate spaceh]hWidth of the coordinate space}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhM1hjBubah}(h]h ]h"]h$]h&]uh1j{ hjAubeh}(h]h ]h"]h$]h&]uh1jY hjBhM1hjAubjZ )}(h.``int height`` Height of the coordinate space h](j` )}(h``int height``h]jf )}(hj2Bh]h int height}(hj4BhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj0Bubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM2hj,Bubj| )}(hhh]h)}(hHeight of the coordinate spaceh]hHeight of the coordinate space}(hjKBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGBhM2hjHBubah}(h]h ]h"]h$]h&]uh1j{ hj,Bubeh}(h]h ]h"]h$]h&]uh1jY hjGBhM2hjAubjZ )}(hH``unsigned int rotation`` Transformation whose inverse is to be applied h](j` )}(h``unsigned int rotation``h]jf )}(hjkBh]hunsigned int rotation}(hjmBhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjiBubah}(h]h ]h"]h$]h&]uh1j_ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM3hjeBubj| )}(hhh]h)}(h-Transformation whose inverse is to be appliedh]h-Transformation whose inverse is to be applied}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhM3hjBubah}(h]h ]h"]h$]h&]uh1j{ hjeBubeh}(h]h ]h"]h$]h&]uh1jY hjBhM3hjAubeh}(h]h ]h"]h$]h&]uh1jT hjAubh)}(h**Description**h]j )}(hjBh]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM5hjAubh)}(hHApply the inverse of **rotation** to the coordinates of rectangle **r**.h](hApply the inverse of }(hjBhhhNhNubj )}(h **rotation**h]hrotation}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh! to the coordinates of rectangle }(hjBhhhNhNubj )}(h**r**h]hr}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM4hjAubh)}(hZ**width** and **height** combined with **rotation** define the location of the new origin.h](j )}(h **width**h]hwidth}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh and }(hjBhhhNhNubj )}(h **height**h]hheight}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh combined with }(hjBhhhNhNubj )}(h **rotation**h]hrotation}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubh' define the location of the new origin.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM7hjAubh)}(h**width** correcsponds to the horizontal and **height** to the vertical axis of the original untransformed coordinate space, so that you never have to flip them when doing a rotatation and its inverse. That is, if you do ::h](j )}(h **width**h]hwidth}(hj4ChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0Cubh$ correcsponds to the horizontal and }(hj0ChhhNhNubj )}(h **height**h]hheight}(hjFChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0Cubh to the vertical axis of the original untransformed coordinate space, so that you never have to flip them when doing a rotatation and its inverse. That is, if you do}(hj0ChhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM:hjAubj, )}(h_drm_rect_rotate(&r, width, height, rotation); drm_rect_rotate_inv(&r, width, height, rotation);h]h_drm_rect_rotate(&r, width, height, rotation); drm_rect_rotate_inv(&r, width, height, rotation);}hj_Csbah}(h]h ]h"]h$]h&]j j uh1j+ h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chM@hjAubh)}(h0you will always get back the original rectangle.h]h0you will always get back the original rectangle.}(hjnChhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:424: ./drivers/gpu/drm/drm_rect.chMChjAubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj hhhNhNubeh}(h]j2ah ]h"]rectangle utilities referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(hFlip-work Helper Referenceh]hFlip-work Helper Reference}(hjChhhNhNubah}(h]h ]h"]h$]h&]hjNuh1hhjChhhhhMubh)}(hX Utility to queue up work to run from work-queue context after flip/vblank. Typically this can be used to defer unref of framebuffer's, cursor bo's, etc until after vblank. The APIs are all thread-safe. Moreover, drm_flip_work_commit() can be called in atomic context.h]hXUtility to queue up work to run from work-queue context after flip/vblank. Typically this can be used to defer unref of framebuffer’s, cursor bo’s, etc until after vblank. The APIs are all thread-safe. Moreover, drm_flip_work_commit() can be called in atomic context.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:430: ./include/drm/drm_flip_work.hhK hjChhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_flip_work (C struct)c.drm_flip_workhNtauh1jd hjChhhNhNubjw )}(hhh](j| )}(h drm_flip_workh]j )}(hstruct drm_flip_workh](j )}(hj h]hstruct}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjChhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:433: ./include/drm/drm_flip_work.hhKubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjChhhjChKubj )}(h drm_flip_workh]j )}(hjCh]h drm_flip_work}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ](j j eh"]h$]h&]j j uh1j hjChhhjChKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjChhhjChKubah}(h]jCah ](j j eh"]h$]h&]j j )j huh1j{ hjChKhjChhubj )}(hhh]h)}(hflip work queueh]hflip work queue}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:433: ./include/drm/drm_flip_work.hhK6hjDhhubah}(h]h ]h"]h$]h&]uh1j hjChhhjChKubeh}(h]h ](j structeh"]h$]h&]j j j jDj jDj j j uh1jv hhhjChNhNubj )}(hX**Definition**:: struct drm_flip_work { const char *name; drm_flip_func_t func; struct work_struct worker; struct list_head queued; struct list_head commited; spinlock_t lock; }; **Members** ``name`` debug name ``func`` callback fxn called for each committed item ``worker`` worker which calls **func** ``queued`` queued tasks ``commited`` commited tasks ``lock`` lock to access queued and commited listsh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hj*DhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&Dubh:}(hj&DhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:433: ./include/drm/drm_flip_work.hhK:hj"Dubj, )}(hstruct drm_flip_work { const char *name; drm_flip_func_t func; struct work_struct worker; struct list_head queued; struct list_head commited; spinlock_t lock; };h]hstruct drm_flip_work { const char *name; drm_flip_func_t func; struct work_struct worker; struct list_head queued; struct list_head commited; spinlock_t lock; };}hjCDsbah}(h]h ]h"]h$]h&]j j uh1j+ h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:433: ./include/drm/drm_flip_work.hhKHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Hubh)}(hhh]j )}(h drm_flip_workh]h drm_flip_work}(hjOHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQHmodnameN classnameNj j )}j ]j)}jjHsbc.drm_flip_work_commitasbuh1hhj-Hubj )}(h h]h }(hjoHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Hubj)}(hjOh]h*}(hj}HhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj-Hubj )}(hworkh]hwork}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Hubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)Hubj)}(hstruct workqueue_struct *wqh](j )}(hj h]hstruct}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(hworkqueue_structh]hworkqueue_struct}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]jkHc.drm_flip_work_commitasbuh1hhjHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjHubj )}(hwqh]hwq}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)Hubeh}(h]h ]h"]h$]h&]j j uh1jhjGhhhjHhKPubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhjHhKPubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j{ hjHhKPhjGhhubj )}(hhh]h)}(hcommit queued workh]hcommit queued work}(hj$IhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:436: ./drivers/gpu/drm/drm_flip_work.chKPhj!Ihhubah}(h]h ]h"]h$]h&]uh1j hjGhhhjHhKPubeh}(h]h ](j functioneh"]h$]h&]j j j jOubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chK.hj:OubjU )}(hhh]jZ )}(h4``struct drm_device *dev`` drm device to operate on h](j` )}(h``struct drm_device *dev``h]jf )}(hj_Oh]hstruct drm_device *dev}(hjaOhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]Oubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chK,hjYOubj| )}(hhh]h)}(hdrm device to operate onh]hdrm device to operate on}(hjxOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjtOhK,hjuOubah}(h]h ]h"]h$]h&]uh1j{ hjYOubeh}(h]h ]h"]h$]h&]uh1jY hjtOhK,hjVOubah}(h]h ]h"]h$]h&]uh1jT hj:Oubh)}(h**Description**h]j )}(hjOh]h Description}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chK.hj:Oubh)}(hXPSome userspace presumes that the first connected connector is the main display, where it's supposed to display e.g. the login screen. For laptops, this should be the main panel. Use this function to sort all (eDP/LVDS/DSI) panels to the front of the connector list, instead of painstakingly trying to initialize them in the right order.h]hXRSome userspace presumes that the first connected connector is the main display, where it’s supposed to display e.g. the login screen. For laptops, this should be the main panel. Use this function to sort all (eDP/LVDS/DSI) panels to the front of the connector list, instead of painstakingly trying to initialize them in the right order.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chK-hj:Oubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj%NhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_helper_mode_fill_fb_struct (C function) c.drm_helper_mode_fill_fb_structhNtauh1jd hj%NhhhNhNubjw )}(hhh](j| )}(hvoid drm_helper_mode_fill_fb_struct (struct drm_device *dev, struct drm_framebuffer *fb, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h]j )}(hvoid drm_helper_mode_fill_fb_struct(struct drm_device *dev, struct drm_framebuffer *fb, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hvoidh]hvoid}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKJubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOhhhjOhKJubj )}(hdrm_helper_mode_fill_fb_structh]j )}(hdrm_helper_mode_fill_fb_structh]hdrm_helper_mode_fill_fb_struct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hjOhhhjOhKJubj)}(h(struct drm_device *dev, struct drm_framebuffer *fb, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hj)PhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj:PhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7Pubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWhhhjTWhKubah}(h]j9Wah ](j j eh"]h$]h&]j j )j huh1j{ hjTWhKhj;Whhubj )}(hhh]h)}(hModeset suspend helperh]hModeset suspend helper}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjXhhubah}(h]h ]h"]h$]h&]uh1j hj;WhhhjTWhKubeh}(h]h ](j functioneh"]h$]h&]j j j jXj jXj j j uh1jv hhhj%NhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device **Description** This helper function takes care of suspending the modeset side. It disables output polling if initialized, suspends fbdev if used and finally calls drm_atomic_helper_suspend(). If suspending fails, fbdev and polling is re-enabled. See also: drm_kms_helper_poll_disable() and drm_client_dev_suspend(). **Return** Zero on success, negative error code on error.h](h)}(h**Parameters**h]j )}(hj(Xh]h Parameters}(hj*XhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&Xubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhj"XubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjGXh]hstruct drm_device *dev}(hjIXhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjEXubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjAXubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj`XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\XhKhj]Xubah}(h]h ]h"]h$]h&]uh1j{ hjAXubeh}(h]h ]h"]h$]h&]uh1jY hj\XhKhj>Xubah}(h]h ]h"]h$]h&]uh1jT hj"Xubh)}(h**Description**h]j )}(hjXh]h Description}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhj"Xubh)}(hThis helper function takes care of suspending the modeset side. It disables output polling if initialized, suspends fbdev if used and finally calls drm_atomic_helper_suspend(). If suspending fails, fbdev and polling is re-enabled.h]hThis helper function takes care of suspending the modeset side. It disables output polling if initialized, suspends fbdev if used and finally calls drm_atomic_helper_suspend(). If suspending fails, fbdev and polling is re-enabled.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhj"Xubh)}(hESee also: drm_kms_helper_poll_disable() and drm_client_dev_suspend().h]hESee also: drm_kms_helper_poll_disable() and drm_client_dev_suspend().}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhj"Xubh)}(h **Return**h]j )}(hjXh]hReturn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhj"Xubh)}(h.Zero on success, negative error code on error.h]h.Zero on success, negative error code on error.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhj"Xubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj%NhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_mode_config_helper_resume (C function)c.drm_mode_config_helper_resumehNtauh1jd hj%NhhhNhNubjw )}(hhh](j| )}(h:int drm_mode_config_helper_resume (struct drm_device *dev)h]j )}(h9int drm_mode_config_helper_resume(struct drm_device *dev)h](j)}(hinth]hint}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKubj )}(h h]h }(hj YhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXhhhj YhKubj )}(hdrm_mode_config_helper_resumeh]j )}(hdrm_mode_config_helper_resumeh]hdrm_mode_config_helper_resume}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ](j j eh"]h$]h&]j j uh1j hjXhhhj YhKubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj:YhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Yubj )}(h h]h }(hjGYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Yubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjXYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUYubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZYmodnameN classnameNj j )}j ]j)}jj Ysbc.drm_mode_config_helper_resumeasbuh1hhj6Yubj )}(h h]h }(hjxYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Yubj)}(hjOh]h*}(hjYhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6Yubj )}(hdevh]hdev}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Yubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2Yubah}(h]h ]h"]h$]h&]j j uh1jhjXhhhj YhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjXhhhj YhKubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j{ hj YhKhjXhhubj )}(hhh]h)}(hModeset resume helperh]hModeset resume helper}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYhhubah}(h]h ]h"]h$]h&]uh1j hjXhhhj YhKubeh}(h]h ](j functioneh"]h$]h&]j j j jYj jYj j j uh1jv hhhj%NhNhNubj )}(hXn**Parameters** ``struct drm_device *dev`` DRM device **Description** This helper function takes care of resuming the modeset side. It calls drm_atomic_helper_resume(), resumes fbdev if used and enables output polling if initiaized. See also: drm_client_dev_resume() and drm_kms_helper_poll_enable(). **Return** Zero on success, negative error code on error.h](h)}(h**Parameters**h]j )}(hjYh]h Parameters}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hjYh]hstruct drm_device *dev}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjYubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhKhjZubah}(h]h ]h"]h$]h&]uh1j{ hjYubeh}(h]h ]h"]h$]h&]uh1jY hjZhKhjYubah}(h]h ]h"]h$]h&]uh1jT hjYubh)}(h**Description**h]j )}(hj9Zh]h Description}(hj;ZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7Zubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYubh)}(hThis helper function takes care of resuming the modeset side. It calls drm_atomic_helper_resume(), resumes fbdev if used and enables output polling if initiaized.h]hThis helper function takes care of resuming the modeset side. It calls drm_atomic_helper_resume(), resumes fbdev if used and enables output polling if initiaized.}(hjOZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYubh)}(hCSee also: drm_client_dev_resume() and drm_kms_helper_poll_enable().h]hCSee also: drm_client_dev_resume() and drm_kms_helper_poll_enable().}(hj^ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYubh)}(h **Return**h]j )}(hjoZh]hReturn}(hjqZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmZubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYubh)}(h.Zero on success, negative error code on error.h]h.Zero on success, negative error code on error.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:445: ./drivers/gpu/drm/drm_modeset_helper.chKhjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj%NhhhNhNubeh}(h]jvah ]h"]auxiliary modeset helpersah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h OF/DT Helpersh]h OF/DT Helpers}(hjZhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjZhhhhhMubh)}(hOA set of helper functions to aid DRM drivers in parsing standard DT properties.h]hOA set of helper functions to aid DRM drivers in parsing standard DT properties.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:451: ./drivers/gpu/drm/drm_of.chKhjZhhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq "drm_of_crtc_port_mask (C function)c.drm_of_crtc_port_maskhNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(hQuint32_t drm_of_crtc_port_mask (struct drm_device *dev, struct device_node *port)h]j )}(hPuint32_t drm_of_crtc_port_mask(struct drm_device *dev, struct device_node *port)h](h)}(hhh]j )}(huint32_th]huint32_t}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jdrm_of_crtc_port_masksbc.drm_of_crtc_port_maskasbuh1hhjZhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhKubj )}(hdrm_of_crtc_port_maskh]j )}(hjZh]hdrm_of_crtc_port_mask}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZhhhjZhKubj)}(h2(struct drm_device *dev, struct device_node *port)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj-[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)[ubj )}(h h]h }(hj:[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)[ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjK[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjH[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjM[modnameN classnameNj j )}j ]jZc.drm_of_crtc_port_maskasbuh1hhj)[ubj )}(h h]h }(hji[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)[ubj)}(hjOh]h*}(hjw[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj)[ubj )}(hdevh]hdev}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%[ubj)}(hstruct device_node *porth](j )}(hj h]hstruct}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(h device_nodeh]h device_node}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]jZc.drm_of_crtc_port_maskasbuh1hhj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj[ubj )}(hporth]hport}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%[ubeh}(h]h ]h"]h$]h&]j j uh1jhjZhhhjZhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZhhhjZhKubah}(h]jZah ](j j eh"]h$]h&]j j )j huh1j{ hjZhKhjZhhubj )}(hhh]h)}(h2find the mask of a registered CRTC by port OF nodeh]h2find the mask of a registered CRTC by port OF node}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKhj\hhubah}(h]h ]h"]h$]h&]uh1j hjZhhhjZhKubeh}(h]h ](j functioneh"]h$]h&]j j j j6\j j6\j j j uh1jv hhhjZhNhNubj )}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct device_node *port`` port OF node **Description** Given a port OF node, return the possible mask of the corresponding CRTC within a device's list of CRTCs. Returns zero if not found.h](h)}(h**Parameters**h]j )}(hj@\h]h Parameters}(hjB\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>\ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKhj:\ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj_\h]hstruct drm_device *dev}(hja\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj]\ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKhjY\ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjx\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjt\hKhju\ubah}(h]h ]h"]h$]h&]uh1j{ hjY\ubeh}(h]h ]h"]h$]h&]uh1jY hjt\hKhjV\ubjZ )}(h*``struct device_node *port`` port OF node h](j` )}(h``struct device_node *port``h]jf )}(hj\h]hstruct device_node *port}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKhj\ubj| )}(hhh]h)}(h port OF nodeh]h port OF node}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hKhj\ubah}(h]h ]h"]h$]h&]uh1j{ hj\ubeh}(h]h ]h"]h$]h&]uh1jY hj\hKhjV\ubeh}(h]h ]h"]h$]h&]uh1jT hj:\ubh)}(h**Description**h]j )}(hj\h]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKhj:\ubh)}(hGiven a port OF node, return the possible mask of the corresponding CRTC within a device's list of CRTCs. Returns zero if not found.h]hGiven a port OF node, return the possible mask of the corresponding CRTC within a device’s list of CRTCs. Returns zero if not found.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKhj:\ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_of_find_possible_crtcs (C function)c.drm_of_find_possible_crtcshNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(hVuint32_t drm_of_find_possible_crtcs (struct drm_device *dev, struct device_node *port)h]j )}(hUuint32_t drm_of_find_possible_crtcs(struct drm_device *dev, struct device_node *port)h](h)}(hhh]j )}(huint32_th]huint32_t}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j)}jdrm_of_find_possible_crtcssbc.drm_of_find_possible_crtcsasbuh1hhj]hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK2ubj )}(h h]h }(hj=]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]hhhj<]hK2ubj )}(hdrm_of_find_possible_crtcsh]j )}(hj9]h]hdrm_of_find_possible_crtcs}(hjO]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj]hhhj<]hK2ubj)}(h2(struct drm_device *dev, struct device_node *port)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf]ubj )}(h h]h }(hjw]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf]ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j7]c.drm_of_find_possible_crtcsasbuh1hhjf]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf]ubj)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjf]ubj )}(hdevh]hdev}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjb]ubj)}(hstruct device_node *porth](j )}(hj h]hstruct}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(h device_nodeh]h device_node}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j7]c.drm_of_find_possible_crtcsasbuh1hhj]ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj)}(hjOh]h*}(hj$^hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj]ubj )}(hporth]hport}(hj1^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjb]ubeh}(h]h ]h"]h$]h&]j j uh1jhj]hhhj<]hK2ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj]hhhj<]hK2ubah}(h]j ]ah ](j j eh"]h$]h&]j j )j huh1j{ hj<]hK2hj ]hhubj )}(hhh]h)}(h+find the possible CRTCs for an encoder porth]h+find the possible CRTCs for an encoder port}(hj[^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK2hjX^hhubah}(h]h ]h"]h$]h&]uh1j hj ]hhhj<]hK2ubeh}(h]h ](j functioneh"]h$]h&]j j j js^j js^j j j uh1jv hhhjZhNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct device_node *port`` encoder port to scan for endpoints **Description** Scan all endpoints attached to a port, locate their attached CRTCs, and generate the DRM mask of CRTCs which may be attached to this encoder. See https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml for the bindings.h](h)}(h**Parameters**h]j )}(hj}^h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{^ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK6hjw^ubjU )}(hhh](jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj^h]hstruct drm_device *dev}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK3hj^ubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hK3hj^ubah}(h]h ]h"]h$]h&]uh1j{ hj^ubeh}(h]h ]h"]h$]h&]uh1jY hj^hK3hj^ubjZ )}(h@``struct device_node *port`` encoder port to scan for endpoints h](j` )}(h``struct device_node *port``h]jf )}(hj^h]hstruct device_node *port}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj^ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK4hj^ubj| )}(hhh]h)}(h"encoder port to scan for endpointsh]h"encoder port to scan for endpoints}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hK4hj^ubah}(h]h ]h"]h$]h&]uh1j{ hj^ubeh}(h]h ]h"]h$]h&]uh1jY hj^hK4hj^ubeh}(h]h ]h"]h$]h&]uh1jT hjw^ubh)}(h**Description**h]j )}(hj_h]h Description}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK6hjw^ubh)}(hScan all endpoints attached to a port, locate their attached CRTCs, and generate the DRM mask of CRTCs which may be attached to this encoder.h]hScan all endpoints attached to a port, locate their attached CRTCs, and generate the DRM mask of CRTCs which may be attached to this encoder.}(hj&_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK5hjw^ubh)}(hgSee https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml for the bindings.h](hSee }(hj5_hhhNhNubjn)}(hQhttps://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yamlh]hQhttps://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml}(hj=_hhhNhNubah}(h]h ]h"]h$]h&]refurij?_uh1jmhj5_ubh for the bindings.}(hj5_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chK9hjw^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_of_component_match_add (C function)c.drm_of_component_match_addhNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(hvoid drm_of_component_match_add (struct device *master, struct component_match **matchptr, int (*compare)(struct device *, void *), struct device_node *node)h]j )}(hvoid drm_of_component_match_add(struct device *master, struct component_match **matchptr, int (*compare)(struct device*, void*), struct device_node *node)h](j)}(hvoidh]hvoid}(hjw_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjs_hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKTubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs_hhhj_hKTubj )}(hdrm_of_component_match_addh]j )}(hdrm_of_component_match_addh]hdrm_of_component_match_add}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjs_hhhj_hKTubj)}(h{(struct device *master, struct component_match **matchptr, int (*compare)(struct device*, void*), struct device_node *node)h](j)}(hstruct device *masterh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hdeviceh]hdevice}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]j)}jj_sbc.drm_of_component_match_addasbuh1hhj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hmasterh]hmaster}(hj `hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(h!struct component_match **matchptrh](j )}(hj h]hstruct}(hj&`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"`ubj )}(h h]h }(hj3`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"`ubh)}(hhh]j )}(hcomponent_matchh]hcomponent_match}(hjD`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjF`modnameN classnameNj j )}j ]j_c.drm_of_component_match_addasbuh1hhj"`ubj )}(h h]h }(hjb`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"`ubj)}(hjOh]h*}(hjp`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"`ubj)}(hjOh]h*}(hj}`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj"`ubj )}(hmatchptrh]hmatchptr}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(h%int (*compare)(struct device*, void*)h](j)}(hinth]hint}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hjh]h(}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj )}(hcompareh]hcompare}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hjʹh]h)}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj)}(hjh]h(}(hj`hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubh)}(hhh]j )}(hdeviceh]hdevice}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!amodnameN classnameNj j )}j ]j_c.drm_of_component_match_addasbuh1hhj`ubj)}(hjOh]h*}(hj=ahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj)}(hjh]h,}(hjJahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj )}(h h]h }(hjWahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hvoidh]hvoid}(hjeahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(hjOh]h*}(hjsahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubj)}(hjʹh]h)}(hjahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(hstruct device_node *nodeh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubh)}(hhh]j )}(h device_nodeh]h device_node}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j_c.drm_of_component_match_addasbuh1hhjaubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj)}(hjOh]h*}(hjahhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjaubj )}(hnodeh]hnode}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubeh}(h]h ]h"]h$]h&]j j uh1jhjs_hhhj_hKTubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjo_hhhj_hKTubah}(h]jj_ah ](j j eh"]h$]h&]j j )j huh1j{ hj_hKThjl_hhubj )}(hhh]h)}(h)Add a component helper OF node match ruleh]h)Add a component helper OF node match rule}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKThjbhhubah}(h]h ]h"]h$]h&]uh1j hjl_hhhj_hKTubeh}(h]h ](j functioneh"]h$]h&]j j j j1bj j1bj j j uh1jv hhhjZhNhNubj )}(h**Parameters** ``struct device *master`` master device ``struct component_match **matchptr`` component match pointer ``int (*compare)(struct device *, void *)`` compare function used for matching component ``struct device_node *node`` of_nodeh](h)}(h**Parameters**h]j )}(hj;bh]h Parameters}(hj=bhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9bubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKXhj5bubjU )}(hhh](jZ )}(h(``struct device *master`` master device h](j` )}(h``struct device *master``h]jf )}(hjZbh]hstruct device *master}(hj\bhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjXbubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKUhjTbubj| )}(hhh]h)}(h master deviceh]h master device}(hjsbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjobhKUhjpbubah}(h]h ]h"]h$]h&]uh1j{ hjTbubeh}(h]h ]h"]h$]h&]uh1jY hjobhKUhjQbubjZ )}(h>``struct component_match **matchptr`` component match pointer h](j` )}(h%``struct component_match **matchptr``h]jf )}(hjbh]h!struct component_match **matchptr}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjbubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKVhjbubj| )}(hhh]h)}(hcomponent match pointerh]hcomponent match pointer}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhKVhjbubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hjbhKVhjQbubjZ )}(hY``int (*compare)(struct device *, void *)`` compare function used for matching component h](j` )}(h+``int (*compare)(struct device *, void *)``h]jf )}(hjbh]h'int (*compare)(struct device *, void *)}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjbubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKWhjbubj| )}(hhh]h)}(h,compare function used for matching componenth]h,compare function used for matching component}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhKWhjbubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hjbhKWhjQbubjZ )}(h$``struct device_node *node`` of_nodeh](j` )}(h``struct device_node *node``h]jf )}(hjch]hstruct device_node *node}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1je hjcubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKYhjbubj| )}(hhh]h)}(hof_nodeh]hof_node}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKXhjcubah}(h]h ]h"]h$]h&]uh1j{ hjbubeh}(h]h ]h"]h$]h&]uh1jY hjchKYhjQbubeh}(h]h ]h"]h$]h&]uh1jT hj5bubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_of_component_probe (C function)c.drm_of_component_probehNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(hint drm_of_component_probe (struct device *dev, int (*compare_of)(struct device *, void *), const struct component_master_ops *m_ops)h]j )}(hint drm_of_component_probe(struct device *dev, int (*compare_of)(struct device*, void*), const struct component_master_ops *m_ops)h](j)}(hinth]hint}(hj_chhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[chhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKfubj )}(h h]h }(hjnchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[chhhjmchKfubj )}(hdrm_of_component_probeh]j )}(hdrm_of_component_probeh]hdrm_of_component_probe}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|cubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[chhhjmchKfubj)}(hh(struct device *dev, int (*compare_of)(struct device*, void*), const struct component_master_ops *m_ops)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubh)}(hhh]j )}(hdeviceh]hdevice}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]j)}jjcsbc.drm_of_component_probeasbuh1hhjcubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj)}(hjOh]h*}(hjchhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjcubj )}(hdevh]hdev}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubj)}(h(int (*compare_of)(struct device*, void*)h](j)}(hinth]hint}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj dubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj dubj)}(hjh]h(}(hj*dhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubj)}(hjOh]h*}(hj7dhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubj )}(h compare_ofh]h compare_of}(hjDdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj dubj)}(hjʹh]h)}(hjRdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubj)}(hjh]h(}(hj_dhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubj )}(hj h]hstruct}(hjldhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj dubj )}(h h]h }(hjydhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj dubh)}(hhh]j )}(hdeviceh]hdevice}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]jcc.drm_of_component_probeasbuh1hhj dubj)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubj)}(hjh]h,}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj dubj)}(hvoidh]hvoid}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj dubj)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubj)}(hjʹh]h)}(hjdhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj dubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubj)}(h(const struct component_master_ops *m_opsh](j )}(hjAh]hconst}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(hj h]hstruct}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hj+ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(hcomponent_master_opsh]hcomponent_master_ops}(hjemodnameN classnameNj j )}j ]jcc.drm_of_component_probeasbuh1hhjdubj )}(h h]h }(hjZehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj)}(hjOh]h*}(hjhehhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjdubj )}(hm_opsh]hm_ops}(hjuehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubeh}(h]h ]h"]h$]h&]j j uh1jhj[chhhjmchKfubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjWchhhjmchKfubah}(h]jRcah ](j j eh"]h$]h&]j j )j huh1j{ hjmchKfhjTchhubj )}(hhh]h)}(h3Generic probe function for a component based masterh]h3Generic probe function for a component based master}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKfhjehhubah}(h]h ]h"]h$]h&]uh1j hjTchhhjmchKfubeh}(h]h ](j functioneh"]h$]h&]j j j jej jej j j uh1jv hhhjZhNhNubj )}(hXz**Parameters** ``struct device *dev`` master device containing the OF node ``int (*compare_of)(struct device *, void *)`` compare function used for matching components ``const struct component_master_ops *m_ops`` component master ops to be used **Description** Parse the platform device OF node and bind all the components associated with the master. Interface ports are added before the encoders in order to satisfy their .bind requirements See https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml for the bindings. Returns zero if successful, or one of the standard error codes if it fails.h](h)}(h**Parameters**h]j )}(hjeh]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKjhjeubjU )}(hhh](jZ )}(h<``struct device *dev`` master device containing the OF node h](j` )}(h``struct device *dev``h]jf )}(hjeh]hstruct device *dev}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1je hjeubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKghjeubj| )}(hhh]h)}(h$master device containing the OF nodeh]h$master device containing the OF node}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehKghjeubah}(h]h ]h"]h$]h&]uh1j{ hjeubeh}(h]h ]h"]h$]h&]uh1jY hjehKghjeubjZ )}(h]``int (*compare_of)(struct device *, void *)`` compare function used for matching components h](j` )}(h.``int (*compare_of)(struct device *, void *)``h]jf )}(hjfh]h*int (*compare_of)(struct device *, void *)}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjfubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKhhjfubj| )}(hhh]h)}(h-compare function used for matching componentsh]h-compare function used for matching components}(hj2fhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.fhKhhj/fubah}(h]h ]h"]h$]h&]uh1j{ hjfubeh}(h]h ]h"]h$]h&]uh1jY hj.fhKhhjeubjZ )}(hM``const struct component_master_ops *m_ops`` component master ops to be used h](j` )}(h,``const struct component_master_ops *m_ops``h]jf )}(hjRfh]h(const struct component_master_ops *m_ops}(hjTfhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjPfubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKihjLfubj| )}(hhh]h)}(hcomponent master ops to be usedh]hcomponent master ops to be used}(hjkfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjgfhKihjhfubah}(h]h ]h"]h$]h&]uh1j{ hjLfubeh}(h]h ]h"]h$]h&]uh1jY hjgfhKihjeubeh}(h]h ]h"]h$]h&]uh1jT hjeubh)}(h**Description**h]j )}(hjfh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKkhjeubh)}(hParse the platform device OF node and bind all the components associated with the master. Interface ports are added before the encoders in order to satisfy their .bind requirementsh]hParse the platform device OF node and bind all the components associated with the master. Interface ports are added before the encoders in order to satisfy their .bind requirements}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKjhjeubh)}(hgSee https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml for the bindings.h](hSee }(hjfhhhNhNubjn)}(hQhttps://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yamlh]hQhttps://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml}(hjfhhhNhNubah}(h]h ]h"]h$]h&]refurijfuh1jmhjfubh for the bindings.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKnhjeubh)}(hKReturns zero if successful, or one of the standard error codes if it fails.h]hKReturns zero if successful, or one of the standard error codes if it fails.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKqhjeubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_of_find_panel_or_bridge (C function)c.drm_of_find_panel_or_bridgehNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(hint drm_of_find_panel_or_bridge (const struct device_node *np, int port, int endpoint, struct drm_panel **panel, struct drm_bridge **bridge)h]j )}(hint drm_of_find_panel_or_bridge(const struct device_node *np, int port, int endpoint, struct drm_panel **panel, struct drm_bridge **bridge)h](j)}(hinth]hint}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chKubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfhhhjghKubj )}(hdrm_of_find_panel_or_bridgeh]j )}(hdrm_of_find_panel_or_bridgeh]hdrm_of_find_panel_or_bridge}(hj$ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj gubah}(h]h ](j j eh"]h$]h&]j j uh1j hjfhhhjghKubj)}(hl(const struct device_node *np, int port, int endpoint, struct drm_panel **panel, struct drm_bridge **bridge)h](j)}(hconst struct device_node *nph](j )}(hjAh]hconst}(hj@ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hjOkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>kubj )}(hj h]hstruct}(hj]khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>kubj )}(h h]h }(hjjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>kubh)}(hhh]j )}(h device_nodeh]h device_node}(hj{khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}kmodnameN classnameNj j )}j ]j)}jj(ksb'c.drm_of_lvds_get_dual_link_pixel_orderasbuh1hhj>kubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>kubj)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj>kubj )}(hport1h]hport1}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>kubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:kubj)}(hconst struct device_node *port2h](j )}(hjAh]hconst}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(hj h]hstruct}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(h device_nodeh]h device_node}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj lmodnameN classnameNj j )}j ]jk'c.drm_of_lvds_get_dual_link_pixel_orderasbuh1hhjkubj )}(h h]h }(hj&lhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj)}(hjOh]h*}(hj4lhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjkubj )}(hport2h]hport2}(hjAlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:kubeh}(h]h ]h"]h$]h&]j j uh1jhjkhhhjkhMiubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjkhMiubah}(h]jjah ](j j eh"]h$]h&]j j )j huh1j{ hjkhMihjjhhubj )}(hhh]h)}(h%Get LVDS dual-link source pixel orderh]h%Get LVDS dual-link source pixel order}(hjklhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMihjhlhhubah}(h]h ]h"]h$]h&]uh1j hjjhhhjkhMiubeh}(h]h ](j functioneh"]h$]h&]j j j jlj jlj j j uh1jv hhhjZhNhNubj )}(hXJ**Parameters** ``const struct device_node *port1`` First DT port node of the Dual-link LVDS source ``const struct device_node *port2`` Second DT port node of the Dual-link LVDS source **Description** An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link source, which port shall transmit the even and odd pixels, based on the requirements of the connected sink. The pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL. If either port is not connected, this function returns -EPIPE. **port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS encoders carry the even and odd pixels. **Return** * DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** carries even pixels and **port2** carries odd pixels * DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** carries odd pixels and **port2** carries even pixels * -EINVAL - **port1** and **port2** are not connected to a dual-link LVDS sink, or the sink configuration is invalid * -EPIPE - when **port1** or **port2** are not connectedh](h)}(h**Parameters**h]j )}(hjlh]h Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMmhjlubjU )}(hhh](jZ )}(hT``const struct device_node *port1`` First DT port node of the Dual-link LVDS source h](j` )}(h#``const struct device_node *port1``h]jf )}(hjlh]hconst struct device_node *port1}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMjhjlubj| )}(hhh]h)}(h/First DT port node of the Dual-link LVDS sourceh]h/First DT port node of the Dual-link LVDS source}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMjhjlubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjlhMjhjlubjZ )}(hU``const struct device_node *port2`` Second DT port node of the Dual-link LVDS source h](j` )}(h#``const struct device_node *port2``h]jf )}(hjlh]hconst struct device_node *port2}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjlubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMkhjlubj| )}(hhh]h)}(h0Second DT port node of the Dual-link LVDS sourceh]h0Second DT port node of the Dual-link LVDS source}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMkhjlubah}(h]h ]h"]h$]h&]uh1j{ hjlubeh}(h]h ]h"]h$]h&]uh1jY hjlhMkhjlubeh}(h]h ]h"]h$]h&]uh1jT hjlubh)}(h**Description**h]j )}(hj mh]h Description}(hj"mhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMmhjlubh)}(hX$An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link source, which port shall transmit the even and odd pixels, based on the requirements of the connected sink.h]hX$An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link source, which port shall transmit the even and odd pixels, based on the requirements of the connected sink.}(hj6mhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMlhjlubh)}(hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.h]hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink’s DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.}(hjEmhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMqhjlubh)}(h>If either port is not connected, this function returns -EPIPE.h]h>If either port is not connected, this function returns -EPIPE.}(hjTmhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMvhjlubh)}(h**port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS encoders carry the even and odd pixels.h](j )}(h **port1**h]hport1}(hjgmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcmubh and }(hjcmhhhNhNubj )}(h **port2**h]hport2}(hjymhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcmubh are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS encoders carry the even and odd pixels.}(hjcmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMxhjlubh)}(h **Return**h]j )}(hjmh]hReturn}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM|hjlubh)}(hhh](h)}(hcDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** carries even pixels and **port2** carries odd pixelsh]h)}(hcDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** carries even pixels and **port2** carries odd pixelsh](h%DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - }(hjmhhhNhNubj )}(h **port1**h]hport1}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubh carries even pixels and }(hjmhhhNhNubj )}(h **port2**h]hport2}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubh carries odd pixels}(hjmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM}hjmubah}(h]h ]h"]h$]h&]uh1hhjmubh)}(hcDRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** carries odd pixels and **port2** carries even pixelsh]h)}(hcDRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** carries odd pixels and **port2** carries even pixelsh](h%DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - }(hjmhhhNhNubj )}(h **port1**h]hport1}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubh carries odd pixels and }(hjmhhhNhNubj )}(h **port2**h]hport2}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubh carries even pixels}(hjmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjmubah}(h]h ]h"]h$]h&]uh1hhjmubh)}(hr-EINVAL - **port1** and **port2** are not connected to a dual-link LVDS sink, or the sink configuration is invalidh]h)}(hr-EINVAL - **port1** and **port2** are not connected to a dual-link LVDS sink, or the sink configuration is invalidh](h -EINVAL - }(hj+nhhhNhNubj )}(h **port1**h]hport1}(hj3nhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+nubh and }(hj+nhhhNhNubj )}(h **port2**h]hport2}(hjEnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+nubhQ are not connected to a dual-link LVDS sink, or the sink configuration is invalid}(hj+nhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj'nubah}(h]h ]h"]h$]h&]uh1hhjmubh)}(h6-EPIPE - when **port1** or **port2** are not connectedh]h)}(hjfnh](h-EPIPE - when }(hjhnhhhNhNubj )}(h **port1**h]hport1}(hjonhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhnubh or }(hjhnhhhNhNubj )}(h **port2**h]hport2}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhnubh are not connected}(hjhnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjdnubah}(h]h ]h"]h$]h&]uh1hhjmubeh}(h]h ]h"]h$]h&]jNjOuh1hhjmhM}hjlubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 7drm_of_lvds_get_dual_link_pixel_order_sink (C function),c.drm_of_lvds_get_dual_link_pixel_order_sinkhNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(heint drm_of_lvds_get_dual_link_pixel_order_sink (struct device_node *port1, struct device_node *port2)h]j )}(hdint drm_of_lvds_get_dual_link_pixel_order_sink(struct device_node *port1, struct device_node *port2)h](j)}(hinth]hint}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjnhMubj )}(h*drm_of_lvds_get_dual_link_pixel_order_sinkh]j )}(h*drm_of_lvds_get_dual_link_pixel_order_sinkh]h*drm_of_lvds_get_dual_link_pixel_order_sink}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjnhMubj)}(h6(struct device_node *port1, struct device_node *port2)h](j)}(hstruct device_node *port1h](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(h device_nodeh]h device_node}(hj!ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#omodnameN classnameNj j )}j ]j)}jjnsb,c.drm_of_lvds_get_dual_link_pixel_order_sinkasbuh1hhjnubj )}(h h]h }(hjAohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj)}(hjOh]h*}(hjOohhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjnubj )}(hport1h]hport1}(hj\ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubj)}(hstruct device_node *port2h](j )}(hj h]hstruct}(hjuohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqoubh)}(hhh]j )}(h device_nodeh]h device_node}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjomodnameN classnameNj j )}j ]j=o,c.drm_of_lvds_get_dual_link_pixel_order_sinkasbuh1hhjqoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqoubj)}(hjOh]h*}(hjohhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjqoubj )}(hport2h]hport2}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnhhhjnhMubah}(h]jnah ](j j eh"]h$]h&]j j )j huh1j{ hjnhMhjnhhubj )}(hhh]h)}(h#Get LVDS dual-link sink pixel orderh]h#Get LVDS dual-link sink pixel order}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjohhubah}(h]h ]h"]h$]h&]uh1j hjnhhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j j j jpj jpj j j uh1jv hhhjZhNhNubj )}(hX**Parameters** ``struct device_node *port1`` First DT port node of the Dual-link LVDS sink ``struct device_node *port2`` Second DT port node of the Dual-link LVDS sink **Description** An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link sink, which port shall transmit the even and odd pixels, based on the requirements of the sink. The pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL. If either port is not connected, this function returns -EPIPE. **port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS decoders receive the even and odd pixels. **Return** * DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** receives even pixels and **port2** receives odd pixels * DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** receives odd pixels and **port2** receives even pixels * -EINVAL - **port1** or **port2** are NULL * -EPIPE - when **port1** or **port2** are not connectedh](h)}(h**Parameters**h]j )}(hjph]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjpubjU )}(hhh](jZ )}(hL``struct device_node *port1`` First DT port node of the Dual-link LVDS sink h](j` )}(h``struct device_node *port1``h]jf )}(hj7ph]hstruct device_node *port1}(hj9phhhNhNubah}(h]h ]h"]h$]h&]uh1je hj5pubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj1pubj| )}(hhh]h)}(h-First DT port node of the Dual-link LVDS sinkh]h-First DT port node of the Dual-link LVDS sink}(hjPphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLphMhjMpubah}(h]h ]h"]h$]h&]uh1j{ hj1pubeh}(h]h ]h"]h$]h&]uh1jY hjLphMhj.pubjZ )}(hM``struct device_node *port2`` Second DT port node of the Dual-link LVDS sink h](j` )}(h``struct device_node *port2``h]jf )}(hjpph]hstruct device_node *port2}(hjrphhhNhNubah}(h]h ]h"]h$]h&]uh1je hjnpubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjjpubj| )}(hhh]h)}(h.Second DT port node of the Dual-link LVDS sinkh]h.Second DT port node of the Dual-link LVDS sink}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1j{ hjjpubeh}(h]h ]h"]h$]h&]uh1jY hjphMhj.pubeh}(h]h ]h"]h$]h&]uh1jT hjpubh)}(h**Description**h]j )}(hjph]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjpubh)}(hXAn LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link sink, which port shall transmit the even and odd pixels, based on the requirements of the sink.h]hXAn LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link sink, which port shall transmit the even and odd pixels, based on the requirements of the sink.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjpubh)}(hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.h]hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink’s DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjpubh)}(h>If either port is not connected, this function returns -EPIPE.h]h>If either port is not connected, this function returns -EPIPE.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjpubh)}(h**port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS decoders receive the even and odd pixels.h](j )}(h **port1**h]hport1}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh and }(hjphhhNhNubj )}(h **port2**h]hport2}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubh are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS decoders receive the even and odd pixels.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjpubh)}(h **Return**h]j )}(hjqh]hReturn}(hj!qhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjpubh)}(hhh](h)}(heDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** receives even pixels and **port2** receives odd pixelsh]h)}(heDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** receives even pixels and **port2** receives odd pixelsh](h%DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - }(hjMEDIA_BUS_FMT_RGB101010_1X7X5_SPWG - data-mapping is "vesa-30"h]h)}(hjIth]hBMEDIA_BUS_FMT_RGB101010_1X7X5_SPWG - data-mapping is “vesa-30”}(hjKthhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjGtubah}(h]h ]h"]h$]h&]uh1hhjsubh)}(h4-EINVAL - the "data-mapping" property is unsupportedh]h)}(hjath]h8-EINVAL - the “data-mapping” property is unsupported}(hjcthhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj_tubah}(h]h ]h"]h$]h&]uh1hhjsubh)}(h0-ENODEV - the "data-mapping" property is missingh]h)}(hjyth]h4-ENODEV - the “data-mapping” property is missing}(hj{thhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjwtubah}(h]h ]h"]h$]h&]uh1hhjsubeh}(h]h ]h"]h$]h&]jNjOuh1hhjshMhjGsubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq (drm_of_get_data_lanes_count (C function)c.drm_of_get_data_lanes_counthNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(htint drm_of_get_data_lanes_count (const struct device_node *endpoint, const unsigned int min, const unsigned int max)h]j )}(hsint drm_of_get_data_lanes_count(const struct device_node *endpoint, const unsigned int min, const unsigned int max)h](j)}(hinth]hint}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjthMubj )}(hdrm_of_get_data_lanes_counth]j )}(hdrm_of_get_data_lanes_counth]hdrm_of_get_data_lanes_count}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ](j j eh"]h$]h&]j j uh1j hjthhhjthMubj)}(hT(const struct device_node *endpoint, const unsigned int min, const unsigned int max)h](j)}(h"const struct device_node *endpointh](j )}(hjAh]hconst}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(hj h]hstruct}(hj uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubh)}(hhh]j )}(h device_nodeh]h device_node}(hj+uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(uubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-umodnameN classnameNj j )}j ]j)}jjtsbc.drm_of_get_data_lanes_countasbuh1hhjtubj )}(h h]h }(hjKuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj)}(hjOh]h*}(hjYuhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjtubj )}(hendpointh]hendpoint}(hjfuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjtubj)}(hconst unsigned int minh](j )}(hjAh]hconst}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{uubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{uubj)}(hunsignedh]hunsigned}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{uubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{uubj)}(hinth]hint}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{uubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{uubj )}(hminh]hmin}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{uubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjtubj)}(hconst unsigned int maxh](j )}(hjAh]hconst}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hunsignedh]hunsigned}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hinth]hint}(hj"vhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj )}(h h]h }(hj0vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(hmaxh]hmax}(hj>vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjtubeh}(h]h ]h"]h$]h&]j j uh1jhjthhhjthMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjthhhjthMubah}(h]jtah ](j j eh"]h$]h&]j j )j huh1j{ hjthMhjthhubj )}(hhh]h)}(hGet DSI/(e)DP data lane counth]hGet DSI/(e)DP data lane count}(hjhvhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjevhhubah}(h]h ]h"]h$]h&]uh1j hjthhhjthMubeh}(h]h ](j functioneh"]h$]h&]j j j jvj jvj j j uh1jv hhhjZhNhNubj )}(hX**Parameters** ``const struct device_node *endpoint`` DT endpoint node of the DSI/(e)DP source or sink ``const unsigned int min`` minimum supported number of data lanes ``const unsigned int max`` maximum supported number of data lanes **Description** Count DT "data-lanes" property elements and check for validity. **Return** * min..max - positive integer count of "data-lanes" elements * -ve - the "data-lanes" property is missing or invalid * -EINVAL - the "data-lanes" property is unsupportedh](h)}(h**Parameters**h]j )}(hjvh]h Parameters}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjvubjU )}(hhh](jZ )}(hX``const struct device_node *endpoint`` DT endpoint node of the DSI/(e)DP source or sink h](j` )}(h&``const struct device_node *endpoint``h]jf )}(hjvh]h"const struct device_node *endpoint}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjvubj| )}(hhh]h)}(h0DT endpoint node of the DSI/(e)DP source or sinkh]h0DT endpoint node of the DSI/(e)DP source or sink}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjvubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjvhMhjvubjZ )}(hB``const unsigned int min`` minimum supported number of data lanes h](j` )}(h``const unsigned int min``h]jf )}(hjvh]hconst unsigned int min}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjvubj| )}(hhh]h)}(h&minimum supported number of data lanesh]h&minimum supported number of data lanes}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjvubah}(h]h ]h"]h$]h&]uh1j{ hjvubeh}(h]h ]h"]h$]h&]uh1jY hjvhMhjvubjZ )}(hB``const unsigned int max`` maximum supported number of data lanes h](j` )}(h``const unsigned int max``h]jf )}(hjwh]hconst unsigned int max}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjwubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjwubj| )}(hhh]h)}(h&maximum supported number of data lanesh]h&maximum supported number of data lanes}(hj4whhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0whMhj1wubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hj0whMhjvubeh}(h]h ]h"]h$]h&]uh1jT hjvubh)}(h**Description**h]j )}(hjVwh]h Description}(hjXwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTwubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjvubh)}(h?Count DT "data-lanes" property elements and check for validity.h]hCCount DT “data-lanes” property elements and check for validity.}(hjlwhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjvubh)}(h **Return**h]j )}(hj}wh]hReturn}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{wubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjvubh)}(hhh](h)}(h:min..max - positive integer count of "data-lanes" elementsh]h)}(hjwh]h>min..max - positive integer count of “data-lanes” elements}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjwubah}(h]h ]h"]h$]h&]uh1hhjwubh)}(h5-ve - the "data-lanes" property is missing or invalidh]h)}(hjwh]h9-ve - the “data-lanes” property is missing or invalid}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjwubah}(h]h ]h"]h$]h&]uh1hhjwubh)}(h2-EINVAL - the "data-lanes" property is unsupportedh]h)}(hjwh]h6-EINVAL - the “data-lanes” property is unsupported}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjwubah}(h]h ]h"]h$]h&]uh1hhjwubeh}(h]h ]h"]h$]h&]jNjOuh1hhjwhMhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq +drm_of_get_data_lanes_count_ep (C function) c.drm_of_get_data_lanes_count_ephNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(hint drm_of_get_data_lanes_count_ep (const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h]j )}(hint drm_of_get_data_lanes_count_ep(const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h](j)}(hinth]hint}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhhjxhMubj )}(hdrm_of_get_data_lanes_count_eph]j )}(hdrm_of_get_data_lanes_count_eph]hdrm_of_get_data_lanes_count_ep}(hj%xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!xubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxhhhjxhMubj)}(hg(const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h](j)}(hconst struct device_node *porth](j )}(hjAh]hconst}(hjAxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=xubj )}(h h]h }(hjNxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=xubj )}(hj h]hstruct}(hj\xhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=xubj )}(h h]h }(hjixhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=xubh)}(hhh]j )}(h device_nodeh]h device_node}(hjzxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|xmodnameN classnameNj j )}j ]j)}jj'xsb c.drm_of_get_data_lanes_count_epasbuh1hhj=xubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=xubj)}(hjOh]h*}(hjxhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj=xubj )}(hporth]hport}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=xubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9xubj)}(h int port_regh](j)}(hinth]hint}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(hport_regh]hport_reg}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9xubj)}(hint regh](j)}(hinth]hint}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubj )}(hregh]hreg}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9xubj)}(hconst unsigned int minh](j )}(hjAh]hconst}(hj8yhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4yubj )}(h h]h }(hjEyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4yubj)}(hunsignedh]hunsigned}(hjSyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4yubj )}(h h]h }(hjayhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4yubj)}(hinth]hint}(hjoyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4yubj )}(h h]h }(hj}yhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4yubj )}(hminh]hmin}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4yubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9xubj)}(hconst unsigned int maxh](j )}(hjAh]hconst}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj)}(hunsignedh]hunsigned}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj)}(hinth]hint}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(hmaxh]hmax}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9xubeh}(h]h ]h"]h$]h&]j j uh1jhjxhhhjxhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjwhhhjxhMubah}(h]jwah ](j j eh"]h$]h&]j j )j huh1j{ hjxhMhjwhhubj )}(hhh]h)}(h)Get DSI/(e)DP data lane count by endpointh]h)Get DSI/(e)DP data lane count by endpoint}(hj!zhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjzhhubah}(h]h ]h"]h$]h&]uh1j hjwhhhjxhMubeh}(h]h ](j functioneh"]h$]h&]j j j j9zj j9zj j j uh1jv hhhjZhNhNubj )}(hX**Parameters** ``const struct device_node *port`` DT port node of the DSI/(e)DP source or sink ``int port_reg`` identifier (value of reg property) of the parent port node ``int reg`` identifier (value of reg property) of the endpoint node ``const unsigned int min`` minimum supported number of data lanes ``const unsigned int max`` maximum supported number of data lanes **Description** Count DT "data-lanes" property elements and check for validity. This variant uses endpoint specifier. **Return** * min..max - positive integer count of "data-lanes" elements * -EINVAL - the "data-mapping" property is unsupported * -ENODEV - the "data-mapping" property is missingh](h)}(h**Parameters**h]j )}(hjCzh]h Parameters}(hjEzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAzubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj=zubjU )}(hhh](jZ )}(hP``const struct device_node *port`` DT port node of the DSI/(e)DP source or sink h](j` )}(h"``const struct device_node *port``h]jf )}(hjbzh]hconst struct device_node *port}(hjdzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj`zubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj\zubj| )}(hhh]h)}(h,DT port node of the DSI/(e)DP source or sinkh]h,DT port node of the DSI/(e)DP source or sink}(hj{zhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwzhMhjxzubah}(h]h ]h"]h$]h&]uh1j{ hj\zubeh}(h]h ]h"]h$]h&]uh1jY hjwzhMhjYzubjZ )}(hL``int port_reg`` identifier (value of reg property) of the parent port node h](j` )}(h``int port_reg``h]jf )}(hjzh]h int port_reg}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjzubj| )}(hhh]h)}(h:identifier (value of reg property) of the parent port nodeh]h:identifier (value of reg property) of the parent port node}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1j{ hjzubeh}(h]h ]h"]h$]h&]uh1jY hjzhMhjYzubjZ )}(hD``int reg`` identifier (value of reg property) of the endpoint node h](j` )}(h ``int reg``h]jf )}(hjzh]hint reg}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjzubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhjzubj| )}(hhh]h)}(h7identifier (value of reg property) of the endpoint nodeh]h7identifier (value of reg property) of the endpoint node}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1j{ hjzubeh}(h]h ]h"]h$]h&]uh1jY hjzhMhjYzubjZ )}(hB``const unsigned int min`` minimum supported number of data lanes h](j` )}(h``const unsigned int min``h]jf )}(hj {$h]hconst unsigned int min}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj {ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj{ubj| )}(hhh]h)}(h&minimum supported number of data lanesh]h&minimum supported number of data lanes}(hj&{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"{hMhj#{ubah}(h]h ]h"]h$]h&]uh1j{ hj{ubeh}(h]h ]h"]h$]h&]uh1jY hj"{hMhjYzubjZ )}(hB``const unsigned int max`` maximum supported number of data lanes h](j` )}(h``const unsigned int max``h]jf )}(hjF{h]hconst unsigned int max}(hjH{hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjD{ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj@{ubj| )}(hhh]h)}(h&maximum supported number of data lanesh]h&maximum supported number of data lanes}(hj_{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[{hMhj\{ubah}(h]h ]h"]h$]h&]uh1j{ hj@{ubeh}(h]h ]h"]h$]h&]uh1jY hj[{hMhjYzubeh}(h]h ]h"]h$]h&]uh1jT hj=zubh)}(h**Description**h]j )}(hj{h]h Description}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj=zubh)}(heCount DT "data-lanes" property elements and check for validity. This variant uses endpoint specifier.h]hiCount DT “data-lanes” property elements and check for validity. This variant uses endpoint specifier.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj=zubh)}(h **Return**h]j )}(hj{h]hReturn}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj=zubh)}(hhh](h)}(h:min..max - positive integer count of "data-lanes" elementsh]h)}(hj{h]h>min..max - positive integer count of “data-lanes” elements}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj{ubah}(h]h ]h"]h$]h&]uh1hhj{ubh)}(h4-EINVAL - the "data-mapping" property is unsupportedh]h)}(hj{h]h8-EINVAL - the “data-mapping” property is unsupported}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj{ubah}(h]h ]h"]h$]h&]uh1hhj{ubh)}(h0-ENODEV - the "data-mapping" property is missingh]h)}(hj{h]h4-ENODEV - the “data-mapping” property is missing}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chMhj{ubah}(h]h ]h"]h$]h&]uh1hhj{ubeh}(h]h ]h"]h$]h&]jNjOuh1hhj{hMhj=zubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq /drm_of_get_data_lanes_count_remote (C function)$c.drm_of_get_data_lanes_count_remotehNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(hint drm_of_get_data_lanes_count_remote (const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h]j )}(hint drm_of_get_data_lanes_count_remote(const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h](j)}(hinth]hint}(hj/|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+|hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM0ubj )}(h h]h }(hj>|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+|hhhj=|hM0ubj )}(h"drm_of_get_data_lanes_count_remoteh]j )}(h"drm_of_get_data_lanes_count_remoteh]h"drm_of_get_data_lanes_count_remote}(hjP|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjL|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj+|hhhj=|hM0ubj)}(hg(const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h](j)}(hconst struct device_node *porth](j )}(hjAh]hconst}(hjl|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh|ubj )}(h h]h }(hjy|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh|ubj )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh|ubh)}(hhh]j )}(h device_nodeh]h device_node}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j)}jjR|sb$c.drm_of_get_data_lanes_count_remoteasbuh1hhjh|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh|ubj)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjh|ubj )}(hporth]hport}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjd|ubj)}(h int port_regh](j)}(hinth]hint}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(hport_regh]hport_reg}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjd|ubj)}(hint regh](j)}(hinth]hint}(hj.}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*}ubj )}(h h]h }(hj<}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*}ubj )}(hregh]hreg}(hjJ}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjd|ubj)}(hconst unsigned int minh](j )}(hjAh]hconst}(hjc}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_}ubj )}(h h]h }(hjp}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_}ubj)}(hunsignedh]hunsigned}(hj~}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_}ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_}ubj)}(hinth]hint}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_}ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_}ubj )}(hminh]hmin}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjd|ubj)}(hconst unsigned int maxh](j )}(hjAh]hconst}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj)}(hunsignedh]hunsigned}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(hmaxh]hmax}(hj"~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjd|ubeh}(h]h ]h"]h$]h&]j j uh1jhj+|hhhj=|hM0ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj'|hhhj=|hM0ubah}(h]j"|ah ](j j eh"]h$]h&]j j )j huh1j{ hj=|hM0hj$|hhubj )}(hhh]h)}(h)Get DSI/(e)DP data lane count by endpointh]h)Get DSI/(e)DP data lane count by endpoint}(hjL~hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM0hjI~hhubah}(h]h ]h"]h$]h&]uh1j hj$|hhhj=|hM0ubeh}(h]h ](j functioneh"]h$]h&]j j j jd~j jd~j j j uh1jv hhhjZhNhNubj )}(hX**Parameters** ``const struct device_node *port`` DT port node of the DSI/(e)DP source or sink ``int port_reg`` identifier (value of reg property) of the parent port node ``int reg`` identifier (value of reg property) of the endpoint node ``const unsigned int min`` minimum supported number of data lanes ``const unsigned int max`` maximum supported number of data lanes **Description** Count DT "data-lanes" property elements in the remote endpoint and check for validity. This variant uses endpoint specifier. **Return** * min..max - positive integer count of "data-lanes" elements * -EINVAL - the "data-lanes" property is unsupported * -ENODEV - the "data-lanes" property is missingh](h)}(h**Parameters**h]j )}(hjn~h]h Parameters}(hjp~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjl~ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM4hjh~ubjU )}(hhh](jZ )}(hP``const struct device_node *port`` DT port node of the DSI/(e)DP source or sink h](j` )}(h"``const struct device_node *port``h]jf )}(hj~h]hconst struct device_node *port}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM1hj~ubj| )}(hhh]h)}(h,DT port node of the DSI/(e)DP source or sinkh]h,DT port node of the DSI/(e)DP source or sink}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hM1hj~ubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hj~hM1hj~ubjZ )}(hL``int port_reg`` identifier (value of reg property) of the parent port node h](j` )}(h``int port_reg``h]jf )}(hj~h]h int port_reg}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM2hj~ubj| )}(hhh]h)}(h:identifier (value of reg property) of the parent port nodeh]h:identifier (value of reg property) of the parent port node}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hM2hj~ubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hj~hM2hj~ubjZ )}(hD``int reg`` identifier (value of reg property) of the endpoint node h](j` )}(h ``int reg``h]jf )}(hj~h]hint reg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj~ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM3hj~ubj| )}(hhh]h)}(h7identifier (value of reg property) of the endpoint nodeh]h7identifier (value of reg property) of the endpoint node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM3hjubah}(h]h ]h"]h$]h&]uh1j{ hj~ubeh}(h]h ]h"]h$]h&]uh1jY hjhM3hj~ubjZ )}(hB``const unsigned int min`` minimum supported number of data lanes h](j` )}(h``const unsigned int min``h]jf )}(hj8h]hconst unsigned int min}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM4hj2ubj| )}(hhh]h)}(h&minimum supported number of data lanesh]h&minimum supported number of data lanes}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM4hjNubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hjMhM4hj~ubjZ )}(hB``const unsigned int max`` maximum supported number of data lanes h](j` )}(h``const unsigned int max``h]jf )}(hjqh]hconst unsigned int max}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1je hjoubah}(h]h ]h"]h$]h&]uh1j_ h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM5hjkubj| )}(hhh]h)}(h&maximum supported number of data lanesh]h&maximum supported number of data lanes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5hjubah}(h]h ]h"]h$]h&]uh1j{ hjkubeh}(h]h ]h"]h$]h&]uh1jY hjhM5hj~ubeh}(h]h ]h"]h$]h&]uh1jT hjh~ubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM7hjh~ubh)}(h}Count DT "data-lanes" property elements in the remote endpoint and check for validity. This variant uses endpoint specifier.h]hCount DT “data-lanes” property elements in the remote endpoint and check for validity. This variant uses endpoint specifier.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM6hjh~ubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM9hjh~ubh)}(hhh](h)}(h:min..max - positive integer count of "data-lanes" elementsh]h)}(hjh]h>min..max - positive integer count of “data-lanes” elements}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM:hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h2-EINVAL - the "data-lanes" property is unsupportedh]h)}(hjh]h6-EINVAL - the “data-lanes” property is unsupported}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM;hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h.-ENODEV - the "data-lanes" property is missingh]h)}(hjh]h2-ENODEV - the “data-lanes” property is missing}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:454: ./drivers/gpu/drm/drm_of.chM<hjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNjOuh1hhjhM:hjh~ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hjZhhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_of_get_dsi_bus (C function)c.drm_of_get_dsi_bushNtauh1jd hjZhhhNhNubjw )}(hhh](j| )}(h>struct mipi_dsi_host * drm_of_get_dsi_bus (struct device *dev)h]j )}(h` interface ties the primary plane together with the CRTC state this does not allow userspace to disable the primary plane itself. The default primary plane only expose XRBG8888 and ARGB8888 as valid pixel formats for the attached framebuffer.h](hThis helper library contains helpers to implement primary plane support on top of the normal CRTC configuration interface. Since the legacy }(hj3hhhNhNubh)}(hB:c:type:`drm_mode_config_funcs.set_config `h]jf )}(hj=h]h drm_mode_config_funcs.set_config}(hj?hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:460: ./drivers/gpu/drm/drm_plane_helper.chK*hj3ubh interface ties the primary plane together with the CRTC state this does not allow userspace to disable the primary plane itself. The default primary plane only expose XRBG8888 and ARGB8888 as valid pixel formats for the attached framebuffer.}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZhK*hj"hhubh)}(hDrivers are highly recommended to implement proper support for primary planes, and newly merged drivers must not rely upon these transitional helpers.h]hDrivers are highly recommended to implement proper support for primary planes, and newly merged drivers must not rely upon these transitional helpers.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:460: ./drivers/gpu/drm/drm_plane_helper.chK1hj"hhubh)}(hThe plane helpers share the function table structures with other helpers, specifically also the atomic helpers. See :c:type:`struct drm_plane_helper_funcs ` for the details.h](htThe plane helpers share the function table structures with other helpers, specifically also the atomic helpers. See }(hjthhhNhNubh)}(h@:c:type:`struct drm_plane_helper_funcs `h]jf )}(hj~h]hstruct drm_plane_helper_funcs}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj|ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:460: ./drivers/gpu/drm/drm_plane_helper.chK5hjtubh for the details.}(hjthhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK5hj"hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq ,drm_plane_helper_update_primary (C function)!c.drm_plane_helper_update_primaryhNtauh1jd hj"hhhNhNubjw )}(hhh](j| )}(hXint drm_plane_helper_update_primary (struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h]j )}(hXint drm_plane_helper_update_primary(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKubj )}(h h]h }(hj΂hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj͂hKubj )}(hdrm_plane_helper_update_primaryh]j )}(hdrm_plane_helper_update_primaryh]hdrm_plane_helper_update_primary}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܂ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj͂hKubj)}(h(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsb!c.drm_plane_helper_update_primaryasbuh1hhjubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hplaneh]hplane}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6!c.drm_plane_helper_update_primaryasbuh1hhjjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjjubj )}(hcrtch]hcrtc}(hjŃhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjރhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڃubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڃubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6!c.drm_plane_helper_update_primaryasbuh1hhjڃubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڃubj)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjڃubj )}(hfbh]hfb}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڃubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int crtc_xh](j)}(hinth]hint}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(hcrtc_xh]hcrtc_x}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int crtc_yh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcrtc_yh]hcrtc_y}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int crtc_wh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjƄhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjԄhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcrtc_wh]hcrtc_w}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int crtc_hh](j)}(hunsignedh]hunsigned}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcrtc_hh]hcrtc_h}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_xh](h)}(hhh]j )}(huint32_th]huint32_t}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]j6!c.drm_plane_helper_update_primaryasbuh1hhjVubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hsrc_xh]hsrc_x}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_yh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6!c.drm_plane_helper_update_primaryasbuh1hhjubj )}(h h]h }(hjÅhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsrc_yh]hsrc_y}(hjхhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_wh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6!c.drm_plane_helper_update_primaryasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsrc_wh]hsrc_w}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_hh](h)}(hhh]j )}(huint32_th]huint32_t}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j6!c.drm_plane_helper_update_primaryasbuh1hhj.ubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(hsrc_hh]hsrc_h}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j6!c.drm_plane_helper_update_primaryasbuh1hhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj)}(hjOh]h*}(hjĆhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjvubj )}(hctxh]hctx}(hjцhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj͂hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj͂hKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj͂hKhjhhubj )}(hhh]h)}(h"Helper for updating primary planesh]h"Helper for updating primary planes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj͂hKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj"hNhNubj )}(hXq**Parameters** ``struct drm_plane *plane`` plane to update ``struct drm_crtc *crtc`` the plane's new CRTC ``struct drm_framebuffer *fb`` the plane's new framebuffer ``int crtc_x`` x coordinate within CRTC ``int crtc_y`` y coordinate within CRTC ``unsigned int crtc_w`` width coordinate within CRTC ``unsigned int crtc_h`` height coordinate within CRTC ``uint32_t src_x`` x coordinate within source ``uint32_t src_y`` y coordinate within source ``uint32_t src_w`` width coordinate within source ``uint32_t src_h`` height coordinate within source ``struct drm_modeset_acquire_ctx *ctx`` modeset locking context **Description** This helper validates the given parameters and updates the primary plane. This function is only useful for non-atomic modesetting. Don't use it in new drivers. **Return** Zero on success, or an errno code otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubjU )}(hhh](jZ )}(h,``struct drm_plane *plane`` plane to update h](j` )}(h``struct drm_plane *plane``h]jf )}(hj<h]hstruct drm_plane *plane}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj:ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhj6ubj| )}(hhh]h)}(hplane to updateh]hplane to update}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhKhjRubah}(h]h ]h"]h$]h&]uh1j{ hj6ubeh}(h]h ]h"]h$]h&]uh1jY hjQhKhj3ubjZ )}(h/``struct drm_crtc *crtc`` the plane's new CRTC h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjuh]hstruct drm_crtc *crtc}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjsubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjoubj| )}(hhh]h)}(hthe plane's new CRTCh]hthe plane’s new CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjoubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj3ubjZ )}(h;``struct drm_framebuffer *fb`` the plane's new framebuffer h](j` )}(h``struct drm_framebuffer *fb``h]jf )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubj| )}(hhh]h)}(hthe plane's new framebufferh]hthe plane’s new framebuffer}(hjLJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjÇhKhjćubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjÇhKhj3ubjZ )}(h(``int crtc_x`` x coordinate within CRTC h](j` )}(h``int crtc_x``h]jf )}(hjh]h int crtc_x}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubj| )}(hhh]h)}(hx coordinate within CRTCh]hx coordinate within CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj3ubjZ )}(h(``int crtc_y`` y coordinate within CRTC h](j` )}(h``int crtc_y``h]jf )}(hj h]h int crtc_y}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubj| )}(hhh]h)}(hy coordinate within CRTCh]hy coordinate within CRTC}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hKhj6ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj5hKhj3ubjZ )}(h5``unsigned int crtc_w`` width coordinate within CRTC h](j` )}(h``unsigned int crtc_w``h]jf )}(hjYh]hunsigned int crtc_w}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjWubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjSubj| )}(hhh]h)}(hwidth coordinate within CRTCh]hwidth coordinate within CRTC}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhKhjoubah}(h]h ]h"]h$]h&]uh1j{ hjSubeh}(h]h ]h"]h$]h&]uh1jY hjnhKhj3ubjZ )}(h6``unsigned int crtc_h`` height coordinate within CRTC h](j` )}(h``unsigned int crtc_h``h]jf )}(hjh]hunsigned int crtc_h}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubj| )}(hhh]h)}(hheight coordinate within CRTCh]hheight coordinate within CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj3ubjZ )}(h.``uint32_t src_x`` x coordinate within source h](j` )}(h``uint32_t src_x``h]jf )}(hjˈh]huint32_t src_x}(hj͈hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjɈubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjňubj| )}(hhh]h)}(hx coordinate within sourceh]hx coordinate within source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjňubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj3ubjZ )}(h.``uint32_t src_y`` y coordinate within source h](j` )}(h``uint32_t src_y``h]jf )}(hjh]huint32_t src_y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubj| )}(hhh]h)}(hy coordinate within sourceh]hy coordinate within source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj3ubjZ )}(h2``uint32_t src_w`` width coordinate within source h](j` )}(h``uint32_t src_w``h]jf )}(hj=h]huint32_t src_w}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj;ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhj7ubj| )}(hhh]h)}(hwidth coordinate within sourceh]hwidth coordinate within source}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhKhjSubah}(h]h ]h"]h$]h&]uh1j{ hj7ubeh}(h]h ]h"]h$]h&]uh1jY hjRhKhj3ubjZ )}(h3``uint32_t src_h`` height coordinate within source h](j` )}(h``uint32_t src_h``h]jf )}(hjvh]huint32_t src_h}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjtubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjpubj| )}(hhh]h)}(hheight coordinate within sourceh]hheight coordinate within source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjpubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj3ubjZ )}(h@``struct drm_modeset_acquire_ctx *ctx`` modeset locking context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubj| )}(hhh]h)}(hmodeset locking contexth]hmodeset locking context}(hjȉhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjĉhKhjʼnubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjĉhKhj3ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(hIThis helper validates the given parameters and updates the primary plane.h]hIThis helper validates the given parameters and updates the primary plane.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(hUThis function is only useful for non-atomic modesetting. Don't use it in new drivers.h]hWThis function is only useful for non-atomic modesetting. Don’t use it in new drivers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(h **Return**h]j )}(hj h]hReturn}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(h,Zero on success, or an errno code otherwise.h]h,Zero on success, or an errno code otherwise.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj"hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_plane_helper_disable_primary (C function)"c.drm_plane_helper_disable_primaryhNtauh1jd hj"hhhNhNubjw )}(hhh](j| )}(hcint drm_plane_helper_disable_primary (struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h]j )}(hbint drm_plane_helper_disable_primary(struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjahhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhjshKubj )}(h drm_plane_helper_disable_primaryh]j )}(h drm_plane_helper_disable_primaryh]h drm_plane_helper_disable_primary}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjahhhjshKubj)}(h>(struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjŠmodnameN classnameNj j )}j ]j)}jjsb"c.drm_plane_helper_disable_primaryasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j܊"c.drm_plane_helper_disable_primaryasbuh1hhjubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj^hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjahhhjshKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj]hhhjshKubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j{ hjshKhjZhhubj )}(hhh]h)}(h#Helper for disabling primary planesh]h#Helper for disabling primary planes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjZhhhjshKubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj"hNhNubj )}(hXM**Parameters** ``struct drm_plane *plane`` plane to disable ``struct drm_modeset_acquire_ctx *ctx`` modeset locking context **Description** This helper returns an error when trying to disable the primary plane. This function is only useful for non-atomic modesetting. Don't use it in new drivers. **Return** An errno code.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubjU )}(hhh](jZ )}(h-``struct drm_plane *plane`` plane to disable h](j` )}(h``struct drm_plane *plane``h]jf )}(hj֋h]hstruct drm_plane *plane}(hj؋hhhNhNubah}(h]h ]h"]h$]h&]uh1je hjԋubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjЋubj| )}(hhh]h)}(hplane to disableh]hplane to disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjЋubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj͋ubjZ )}(h@``struct drm_modeset_acquire_ctx *ctx`` modeset locking context h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhj ubj| )}(hhh]h)}(hmodeset locking contexth]hmodeset locking context}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj%ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj$hKhj͋ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(hFThis helper returns an error when trying to disable the primary plane.h]hFThis helper returns an error when trying to disable the primary plane.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(hUThis function is only useful for non-atomic modesetting. Don't use it in new drivers.h]hWThis function is only useful for non-atomic modesetting. Don’t use it in new drivers.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(hAn errno code.h]hAn errno code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj"hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_plane_helper_destroy (C function)c.drm_plane_helper_destroyhNtauh1jd hj"hhhNhNubjw )}(hhh](j| )}(h7void drm_plane_helper_destroy (struct drm_plane *plane)h]j )}(h6void drm_plane_helper_destroy(struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hjŌhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chM ubj )}(h h]h }(hjԌhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjӌhM ubj )}(hdrm_plane_helper_destroyh]j )}(hdrm_plane_helper_destroyh]hdrm_plane_helper_destroy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjӌhM ubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]j)}jjsbc.drm_plane_helper_destroyasbuh1hhjubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjNhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hplaneh]hplane}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjӌhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjӌhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjӌhM hjhhubj )}(hhh]h)}(h$Helper for primary plane destructionh]h$Helper for primary plane destruction}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjӌhM ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj"hNhNubj )}(hX$**Parameters** ``struct drm_plane *plane`` plane to destroy **Description** Provides a default plane destroy handler for primary planes. This handler is called during CRTC destruction. We disable the primary plane, remove it from the DRM plane list, and deallocate the plane structure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chMhjubjU )}(hhh]jZ )}(h-``struct drm_plane *plane`` plane to destroy h](j` )}(h``struct drm_plane *plane``h]jf )}(hjƍh]hstruct drm_plane *plane}(hjȍhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjčubah}(h]h ]h"]h$]h&]uh1j_ hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chMhjubj| )}(hhh]h)}(hplane to destroyh]hplane to destroy}(hjߍhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjۍhMhj܍ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjۍhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chMhjubh)}(hProvides a default plane destroy handler for primary planes. This handler is called during CRTC destruction. We disable the primary plane, remove it from the DRM plane list, and deallocate the plane structure.h]hProvides a default plane destroy handler for primary planes. This handler is called during CRTC destruction. We disable the primary plane, remove it from the DRM plane list, and deallocate the plane structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:463: ./drivers/gpu/drm/drm_plane_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj"hhhNhNubeh}(h]jah ]h"]legacy plane helper referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h.Legacy CRTC/Modeset Helper Functions Referenceh]h.Legacy CRTC/Modeset Helper Functions Reference}(hj7hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj4hhhhhMubh)}(hXThe CRTC modeset helper library provides a default set_config implementation in drm_crtc_helper_set_config(). Plus a few other convenience functions using the same callbacks which drivers can use to e.g. restore the modeset configuration on resume with drm_helper_resume_force_mode().h]hXThe CRTC modeset helper library provides a default set_config implementation in drm_crtc_helper_set_config(). Plus a few other convenience functions using the same callbacks which drivers can use to e.g. restore the modeset configuration on resume with drm_helper_resume_force_mode().}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:469: ./drivers/gpu/drm/drm_crtc_helper.chKBhj4hhubh)}(hX(Note that this helper library doesn't track the current power state of CRTCs and encoders. It can call callbacks like :c:type:`drm_encoder_helper_funcs.dpms ` even though the hardware is already in the desired state. This deficiency has been fixed in the atomic helpers.h](hxNote that this helper library doesn’t track the current power state of CRTCs and encoders. It can call callbacks like }(hjThhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jf )}(hj^h]hdrm_encoder_helper_funcs.dpms}(hj`hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj\ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:469: ./drivers/gpu/drm/drm_crtc_helper.chKGhjTubhp even though the hardware is already in the desired state. This deficiency has been fixed in the atomic helpers.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{hKGhj4hhubh)}(hXThe driver callbacks are mostly compatible with the atomic modeset helpers, except for the handling of the primary plane: Atomic helpers require that the primary plane is implemented as a real standalone plane and not directly tied to the CRTC state. For easier transition this library provides functions to implement the old semantics required by the CRTC helpers using the new plane and atomic helper callbacks.h]hXThe driver callbacks are mostly compatible with the atomic modeset helpers, except for the handling of the primary plane: Atomic helpers require that the primary plane is implemented as a real standalone plane and not directly tied to the CRTC state. For easier transition this library provides functions to implement the old semantics required by the CRTC helpers using the new plane and atomic helper callbacks.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:469: ./drivers/gpu/drm/drm_crtc_helper.chKLhj4hhubh)}(hDrivers are strongly urged to convert to the atomic helpers (by way of first converting to the plane helpers). New drivers must not use these functions but need to implement the atomic interface instead, potentially using the atomic helpers for that.h]hDrivers are strongly urged to convert to the atomic helpers (by way of first converting to the plane helpers). New drivers must not use these functions but need to implement the atomic interface instead, potentially using the atomic helpers for that.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:469: ./drivers/gpu/drm/drm_crtc_helper.chKShj4hhubh)}(hXThese legacy modeset helpers use the same function table structures as all other modesetting helpers. See the documentation for struct :c:type:`drm_crtc_helper_funcs`, :c:type:`struct drm_encoder_helper_funcs ` and struct :c:type:`drm_connector_helper_funcs`.h](hThese legacy modeset helpers use the same function table structures as all other modesetting helpers. See the documentation for struct }(hjhhhNhNubh)}(h:c:type:`drm_crtc_helper_funcs`h]jf )}(hjh]hdrm_crtc_helper_funcs}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:469: ./drivers/gpu/drm/drm_crtc_helper.chKXhjubh, }(hjhhhNhNubh)}(hD:c:type:`struct drm_encoder_helper_funcs `h]jf )}(hjҎh]hstruct drm_encoder_helper_funcs}(hjԎhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjЎubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjˎhKXhjubh and struct }(hjhhhNhNubh)}(h$:c:type:`drm_connector_helper_funcs`h]jf )}(hjh]hdrm_connector_helper_funcs}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhjˎhKXhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjˎhKXhj4hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_helper_encoder_in_use (C function)c.drm_helper_encoder_in_usehNtauh1jd hj4hhhNhNubjw )}(hhh](j| )}(hdisable() hooks on a disabled function, or ->enable() hooks on an enabled functions. drm_helper_disable_unused_functions() on the other hand throws such guarantees into the wind and calls disable hooks unconditionally on unused functions.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chKhjubjU )}(hhh]jZ )}(h&``struct drm_device *dev`` DRM device h](j` )}(h``struct drm_device *dev``h]jf )}(hj̓h]hstruct drm_device *dev}(hjΓhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjʓubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chKhjƓubj| )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjƓubeh}(h]h ]h"]h$]h&]uh1jY hjhKhjÓubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chKhjubh)}(hXOThis function walks through the entire mode setting configuration of **dev**. It will remove any CRTC links of unused encoders and encoder links of disconnected connectors. Then it will disable all unused encoders and CRTCs either by calling their disable callback if available or by calling their dpms callback with DRM_MODE_DPMS_OFF.h](hEThis function walks through the entire mode setting configuration of }(hjhhhNhNubj )}(h**dev**h]hdev}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhX. It will remove any CRTC links of unused encoders and encoder links of disconnected connectors. Then it will disable all unused encoders and CRTCs either by calling their disable callback if available or by calling their dpms callback with DRM_MODE_DPMS_OFF.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chKhjubh)}(h**NOTE**h]j )}(hj@h]hNOTE}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chKhjubh)}(hXThis function is part of the legacy modeset helper library and will cause major confusion with atomic drivers. This is because atomic helpers guarantee to never call ->disable() hooks on a disabled function, or ->enable() hooks on an enabled functions. drm_helper_disable_unused_functions() on the other hand throws such guarantees into the wind and calls disable hooks unconditionally on unused functions.h]hXThis function is part of the legacy modeset helper library and will cause major confusion with atomic drivers. This is because atomic helpers guarantee to never call ->disable() hooks on a disabled function, or ->enable() hooks on an enabled functions. drm_helper_disable_unused_functions() on the other hand throws such guarantees into the wind and calls disable hooks unconditionally on unused functions.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj4hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq %drm_crtc_helper_set_mode (C function)c.drm_crtc_helper_set_modehNtauh1jd hj4hhhNhNubjw )}(hhh](j| )}(hbool drm_crtc_helper_set_mode (struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *old_fb)h]j )}(hbool drm_crtc_helper_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *old_fb)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_crtc_helper_set_modeh]j )}(hdrm_crtc_helper_set_modeh]hdrm_crtc_helper_set_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hd(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *old_fb)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjΔhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjߔhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܔubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_crtc_helper_set_modeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_display_mode *modeh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjSmodnameN classnameNj j )}j ]jc.drm_crtc_helper_set_modeasbuh1hhj/ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj)}(hjOh]h*}(hj}hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj/ubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint xh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hjh]hx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint yh](j)}(hinth]hint}(hjוhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӕubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӕubj )}(hjh]hy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӕubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *old_fbh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]jc.drm_crtc_helper_set_modeasbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hold_fbh]hold_fb}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj}hhhjhMubah}(h]jxah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjzhhubj )}(hhh]h)}(hinternal helper to set a modeh]hinternal helper to set a mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjzhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj4hNhNubj )}(hXv**Parameters** ``struct drm_crtc *crtc`` CRTC to program ``struct drm_display_mode *mode`` mode to use ``int x`` horizontal offset into the surface ``int y`` vertical offset into the surface ``struct drm_framebuffer *old_fb`` old framebuffer, for cleanup **Description** Try to set **mode** on **crtc**. Give **crtc** and its associated connectors a chance to fixup or reject the mode prior to trying to set it. This is an internal helper that drivers could e.g. use to update properties that require the entire output pipe to be disabled and re-enabled in a new configuration. For example for changing whether audio is enabled on a hdmi link or for changing panel fitter or dither attributes. It is also called by the drm_crtc_helper_set_config() helper function to drive the mode setting sequence. **Return** True if the mode was set successfully, false otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjubjU )}(hhh](jZ )}(h*``struct drm_crtc *crtc`` CRTC to program h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hj͖h]hstruct drm_crtc *crtc}(hjϖhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj˖ubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjǖubj| )}(hhh]h)}(hCRTC to programh]hCRTC to program}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjǖubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjĖubjZ )}(h.``struct drm_display_mode *mode`` mode to use h](j` )}(h!``struct drm_display_mode *mode``h]jf )}(hjh]hstruct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjubj| )}(hhh]h)}(h mode to useh]h mode to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjĖubjZ )}(h-``int x`` horizontal offset into the surface h](j` )}(h ``int x``h]jf )}(hj?h]hint x}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj=ubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hj9ubj| )}(hhh]h)}(h"horizontal offset into the surfaceh]h"horizontal offset into the surface}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThM hjUubah}(h]h ]h"]h$]h&]uh1j{ hj9ubeh}(h]h ]h"]h$]h&]uh1jY hjThM hjĖubjZ )}(h+``int y`` vertical offset into the surface h](j` )}(h ``int y``h]jf )}(hjxh]hint y}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjrubj| )}(hhh]h)}(h vertical offset into the surfaceh]h vertical offset into the surface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjrubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjĖubjZ )}(h@``struct drm_framebuffer *old_fb`` old framebuffer, for cleanup h](j` )}(h"``struct drm_framebuffer *old_fb``h]jf )}(hjh]hstruct drm_framebuffer *old_fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjubj| )}(hhh]h)}(hold framebuffer, for cleanuph]hold framebuffer, for cleanup}(hjʗhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjƗhM hjǗubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjƗhM hjĖubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hXTry to set **mode** on **crtc**. Give **crtc** and its associated connectors a chance to fixup or reject the mode prior to trying to set it. This is an internal helper that drivers could e.g. use to update properties that require the entire output pipe to be disabled and re-enabled in a new configuration. For example for changing whether audio is enabled on a hdmi link or for changing panel fitter or dither attributes. It is also called by the drm_crtc_helper_set_config() helper function to drive the mode setting sequence.h](h Try to set }(hjhhhNhNubj )}(h**mode**h]hmode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh on }(hjhhhNhNubj )}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh. Give }(hjhhhNhNubj )}(h**crtc**h]hcrtc}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhX and its associated connectors a chance to fixup or reject the mode prior to trying to set it. This is an internal helper that drivers could e.g. use to update properties that require the entire output pipe to be disabled and re-enabled in a new configuration. For example for changing whether audio is enabled on a hdmi link or for changing panel fitter or dither attributes. It is also called by the drm_crtc_helper_set_config() helper function to drive the mode setting sequence.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(h **Return**h]j )}(hjIh]hReturn}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(h7True if the mode was set successfully, false otherwise.h]h7True if the mode was set successfully, false otherwise.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj4hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_crtc_helper_atomic_check (C function)c.drm_crtc_helper_atomic_checkhNtauh1jd hj4hhhNhNubjw )}(hhh](j| )}(hYint drm_crtc_helper_atomic_check (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(hXint drm_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_crtc_helper_atomic_checkh]j )}(hdrm_crtc_helper_atomic_checkh]hdrm_crtc_helper_atomic_check}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj˘hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǘubj )}(h h]h }(hjؘhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǘubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_crtc_helper_atomic_checkasbuh1hhjǘubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǘubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjǘubj )}(hcrtch]hcrtc}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǘubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjØubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]jc.drm_crtc_helper_atomic_checkasbuh1hhj9ubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj9ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjØubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhubj )}(hhh]h)}(h!Helper to check CRTC atomic-stateh]h!Helper to check CRTC atomic-state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j֙j j֙j j j uh1jv hhhj4hNhNubj )}(hXc**Parameters** ``struct drm_crtc *crtc`` CRTC to check ``struct drm_atomic_commit *state`` atomic state object **Description** Provides a default CRTC-state check handler for CRTCs that only have one primary plane attached to it. This is often the case for the CRTC of simple framebuffers. **Return** Zero on success, or an errno code otherwise.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjޙubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjڙubjU )}(hhh](jZ )}(h(``struct drm_crtc *crtc`` CRTC to check h](j` )}(h``struct drm_crtc *crtc``h]jf )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubj| )}(hhh]h)}(h CRTC to checkh]h CRTC to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubjZ )}(h8``struct drm_atomic_commit *state`` atomic state object h](j` )}(h#``struct drm_atomic_commit *state``h]jf )}(hj8h]hstruct drm_atomic_commit *state}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj6ubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj2ubj| )}(hhh]h)}(hatomic state objecth]hatomic state object}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhMhjNubah}(h]h ]h"]h$]h&]uh1j{ hj2ubeh}(h]h ]h"]h$]h&]uh1jY hjMhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjڙubh)}(h**Description**h]j )}(hjsh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjڙubh)}(hProvides a default CRTC-state check handler for CRTCs that only have one primary plane attached to it. This is often the case for the CRTC of simple framebuffers.h]hProvides a default CRTC-state check handler for CRTCs that only have one primary plane attached to it. This is often the case for the CRTC of simple framebuffers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjڙubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjڙubh)}(h,Zero on success, or an errno code otherwise.h]h,Zero on success, or an errno code otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjڙubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj4hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 'drm_crtc_helper_set_config (C function)c.drm_crtc_helper_set_confighNtauh1jd hj4hhhNhNubjw )}(hhh](j| )}(h^int drm_crtc_helper_set_config (struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h]j )}(h]int drm_crtc_helper_set_config(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjߚhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjۚhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۚhhhjhMubj )}(hdrm_crtc_helper_set_configh]j )}(hdrm_crtc_helper_set_configh]hdrm_crtc_helper_set_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjۚhhhjhMubj)}(h?(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_mode_set *seth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_mode_seth]h drm_mode_set}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j)}jjsbc.drm_crtc_helper_set_configasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hseth]hset}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jVc.drm_crtc_helper_set_configasbuh1hhjubj )}(h h]h }(hjʛhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj؛hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjۚhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjךhhhjhMubah}(h]jҚah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjԚhhubj )}(hhh]h)}(hset a new config from userspaceh]hset a new config from userspace}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjԚhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j j'j j'j j j uh1jv hhhj4hNhNubj )}(hXF**Parameters** ``struct drm_mode_set *set`` mode set configuration ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context, not used here **Description** The drm_crtc_helper_set_config() helper function implements the of :c:type:`drm_crtc_funcs.set_config ` callback for drivers using the legacy CRTC helpers. It first tries to locate the best encoder for each connector by calling the connector **drm_connector_helper_funcs.best_encoder** helper operation. After locating the appropriate encoders, the helper function will call the mode_fixup encoder and CRTC helper operations to adjust the requested mode, or reject it completely in which case an error will be returned to the application. If the new configuration after mode adjustment is identical to the current configuration the helper function will return without performing any other operation. If the adjusted mode is identical to the current mode but changes to the frame buffer need to be applied, the drm_crtc_helper_set_config() function will call the CRTC :c:type:`drm_crtc_helper_funcs.mode_set_base ` helper operation. If the adjusted mode differs from the current mode, or if the ->mode_set_base() helper operation is not provided, the helper function performs a full mode set sequence by calling the ->prepare(), ->mode_set() and ->commit() CRTC and encoder helper operations, in that order. Alternatively it can also use the dpms and disable helper operations. For details see :c:type:`struct drm_crtc_helper_funcs ` and struct :c:type:`drm_encoder_helper_funcs`. This function is deprecated. New drivers must implement atomic modeset support, for which this function is unsuitable. Instead drivers should use drm_atomic_helper_set_config(). **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j )}(hj1h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj+ubjU )}(hhh](jZ )}(h4``struct drm_mode_set *set`` mode set configuration h](j` )}(h``struct drm_mode_set *set``h]jf )}(hjPh]hstruct drm_mode_set *set}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjNubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjJubj| )}(hhh]h)}(hmode set configurationh]hmode set configuration}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjfubah}(h]h ]h"]h$]h&]uh1j{ hjJubeh}(h]h ]h"]h$]h&]uh1jY hjehMhjGubjZ )}(hL``struct drm_modeset_acquire_ctx *ctx`` lock acquire context, not used here h](j` )}(h'``struct drm_modeset_acquire_ctx *ctx``h]jf )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubj| )}(hhh]h)}(h#lock acquire context, not used hereh]h#lock acquire context, not used here}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjGubeh}(h]h ]h"]h$]h&]uh1jT hj+ubh)}(h**Description**h]j )}(hjĜh]h Description}(hjƜhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjœubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj+ubh)}(hThe drm_crtc_helper_set_config() helper function implements the of :c:type:`drm_crtc_funcs.set_config ` callback for drivers using the legacy CRTC helpers.h](hCThe drm_crtc_helper_set_config() helper function implements the of }(hjڜhhhNhNubh)}(h4:c:type:`drm_crtc_funcs.set_config `h]jf )}(hjh]hdrm_crtc_funcs.set_config}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjڜubh4 callback for drivers using the legacy CRTC helpers.}(hjڜhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj+ubh)}(hIt first tries to locate the best encoder for each connector by calling the connector **drm_connector_helper_funcs.best_encoder** helper operation.h](hVIt first tries to locate the best encoder for each connector by calling the connector }(hj hhhNhNubj )}(h+**drm_connector_helper_funcs.best_encoder**h]h'drm_connector_helper_funcs.best_encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh helper operation.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hj+ubh)}(hXAfter locating the appropriate encoders, the helper function will call the mode_fixup encoder and CRTC helper operations to adjust the requested mode, or reject it completely in which case an error will be returned to the application. If the new configuration after mode adjustment is identical to the current configuration the helper function will return without performing any other operation.h]hXAfter locating the appropriate encoders, the helper function will call the mode_fixup encoder and CRTC helper operations to adjust the requested mode, or reject it completely in which case an error will be returned to the application. If the new configuration after mode adjustment is identical to the current configuration the helper function will return without performing any other operation.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hj+ubh)}(hIf the adjusted mode is identical to the current mode but changes to the frame buffer need to be applied, the drm_crtc_helper_set_config() function will call the CRTC :c:type:`drm_crtc_helper_funcs.mode_set_base ` helper operation.h](hIf the adjusted mode is identical to the current mode but changes to the frame buffer need to be applied, the drm_crtc_helper_set_config() function will call the CRTC }(hj<hhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.mode_set_base `h]jf )}(hjFh]h#drm_crtc_helper_funcs.mode_set_base}(hjHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj<ubh helper operation.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchMhj+ubh)}(hXIf the adjusted mode differs from the current mode, or if the ->mode_set_base() helper operation is not provided, the helper function performs a full mode set sequence by calling the ->prepare(), ->mode_set() and ->commit() CRTC and encoder helper operations, in that order. Alternatively it can also use the dpms and disable helper operations. For details see :c:type:`struct drm_crtc_helper_funcs ` and struct :c:type:`drm_encoder_helper_funcs`.h](hXiIf the adjusted mode differs from the current mode, or if the ->mode_set_base() helper operation is not provided, the helper function performs a full mode set sequence by calling the ->prepare(), ->mode_set() and ->commit() CRTC and encoder helper operations, in that order. Alternatively it can also use the dpms and disable helper operations. For details see }(hjnhhhNhNubh)}(h>:c:type:`struct drm_crtc_helper_funcs `h]jf )}(hjxh]hstruct drm_crtc_helper_funcs}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjvubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjnubh and struct }(hjnhhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]jf )}(hjh]hdrm_encoder_helper_funcs}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjhMhjnubh.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj+ubh)}(hThis function is deprecated. New drivers must implement atomic modeset support, for which this function is unsuitable. Instead drivers should use drm_atomic_helper_set_config().h]hThis function is deprecated. New drivers must implement atomic modeset support, for which this function is unsuitable. Instead drivers should use drm_atomic_helper_set_config().}(hjÝhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hj+ubh)}(h **Return**h]j )}(hjԝh]hReturn}(hj֝hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjҝubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM$hj+ubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM%hj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj4hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq &drm_helper_connector_dpms (C function)c.drm_helper_connector_dpmshNtauh1jd hj4hhhNhNubjw )}(hhh](j| )}(hIint drm_helper_connector_dpms (struct drm_connector *connector, int mode)h]j )}(hHint drm_helper_connector_dpms(struct drm_connector *connector, int mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMyubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj'hMyubj )}(hdrm_helper_connector_dpmsh]j )}(hdrm_helper_connector_dpmsh]hdrm_helper_connector_dpms}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj'hMyubj)}(h+(struct drm_connector *connector, int mode)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]j)}jj<sbc.drm_helper_connector_dpmsasbuh1hhjRubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjRubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(hint modeh](j)}(hinth]hint}(hjȞhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĞubj )}(h h]h }(hj֞hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĞubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĞubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj'hMyubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj'hMyubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j{ hj'hMyhjhhubj )}(hhh]h)}(h$connector dpms helper implementationh]h$connector dpms helper implementation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMyhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj'hMyubeh}(h]h ](j functioneh"]h$]h&]j j j j&j j&j j j uh1jv hhhj4hNhNubj )}(hX8**Parameters** ``struct drm_connector *connector`` affected connector ``int mode`` DPMS mode **Description** The drm_helper_connector_dpms() helper function implements the :c:type:`drm_connector_funcs.dpms ` callback for drivers using the legacy CRTC helpers. This is the main helper function provided by the CRTC helper framework for implementing the DPMS connector attribute. It computes the new desired DPMS state for all encoders and CRTCs in the output mesh and calls the :c:type:`drm_crtc_helper_funcs.dpms ` and :c:type:`drm_encoder_helper_funcs.dpms ` callbacks provided by the driver. This function is deprecated. New drivers must implement atomic modeset support, where DPMS is handled in the DRM core. **Return** Always returns 0.h](h)}(h**Parameters**h]j )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM}hj*ubjU )}(hhh](jZ )}(h7``struct drm_connector *connector`` affected connector h](j` )}(h#``struct drm_connector *connector``h]jf )}(hjOh]hstruct drm_connector *connector}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjMubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMzhjIubj| )}(hhh]h)}(haffected connectorh]haffected connector}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMzhjeubah}(h]h ]h"]h$]h&]uh1j{ hjIubeh}(h]h ]h"]h$]h&]uh1jY hjdhMzhjFubjZ )}(h``int mode`` DPMS mode h](j` )}(h ``int mode``h]jf )}(hjh]hint mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM{hjubj| )}(hhh]h)}(h DPMS modeh]h DPMS mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM{hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhM{hjFubeh}(h]h ]h"]h$]h&]uh1jT hj*ubh)}(h**Description**h]j )}(hjßh]h Description}(hjşhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM}hj*ubh)}(hThe drm_helper_connector_dpms() helper function implements the :c:type:`drm_connector_funcs.dpms ` callback for drivers using the legacy CRTC helpers.h](h?The drm_helper_connector_dpms() helper function implements the }(hjٟhhhNhNubh)}(h8:c:type:`drm_connector_funcs.dpms `h]jf )}(hjh]hdrm_connector_funcs.dpms}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM|hjٟubh4 callback for drivers using the legacy CRTC helpers.}(hjٟhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM|hj*ubh)}(hX~This is the main helper function provided by the CRTC helper framework for implementing the DPMS connector attribute. It computes the new desired DPMS state for all encoders and CRTCs in the output mesh and calls the :c:type:`drm_crtc_helper_funcs.dpms ` and :c:type:`drm_encoder_helper_funcs.dpms ` callbacks provided by the driver.h](hThis is the main helper function provided by the CRTC helper framework for implementing the DPMS connector attribute. It computes the new desired DPMS state for all encoders and CRTCs in the output mesh and calls the }(hj hhhNhNubh)}(h<:c:type:`drm_crtc_helper_funcs.dpms `h]jf )}(hjh]hdrm_crtc_helper_funcs.dpms}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubh and }(hj hhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jf )}(hj9h]hdrm_encoder_helper_funcs.dpms}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hj7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhj2hMhj ubh" callbacks provided by the driver.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2hMhj*ubh)}(hwThis function is deprecated. New drivers must implement atomic modeset support, where DPMS is handled in the DRM core.h]hwThis function is deprecated. New drivers must implement atomic modeset support, where DPMS is handled in the DRM core.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj*ubh)}(h **Return**h]j )}(hjqh]hReturn}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj*ubh)}(hAlways returns 0.h]hAlways returns 0.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj4hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_helper_resume_force_mode (C function)c.drm_helper_resume_force_modehNtauh1jd hj4hhhNhNubjw )}(hhh](j| )}(h:void drm_helper_resume_force_mode (struct drm_device *dev)h]j )}(h9void drm_helper_resume_force_mode(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMubj )}(h h]h }(hjŠhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjĠhMubj )}(hdrm_helper_resume_force_modeh]j )}(hdrm_helper_resume_force_modeh]hdrm_helper_resume_force_mode}(hjנhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӠubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjĠhMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jj٠sbc.drm_helper_resume_force_modeasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjĠhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjĠhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjĠhMhjhhubj )}(hhh]h)}(h(force-restore mode setting configurationh]h(force-restore mode setting configuration}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjshhubah}(h]h ]h"]h$]h&]uh1j hjhhhjĠhMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj4hNhNubj )}(hXL**Parameters** ``struct drm_device *dev`` drm_device which should be restored **Description** Drivers which use the mode setting helpers can use this function to force-restore the mode setting configuration e.g. on resume or when something else might have trampled over the hw state (like some overzealous old BIOSen tended to do). This helper doesn't provide a error return value since restoring the old config should never fail due to resource allocation issues since the driver has successfully set the restored configuration already. Hence this should boil down to the equivalent of a few dpms on calls, which also don't provide an error code. Drivers where simply restoring an old configuration again might fail (e.g. due to slight differences in allocating shared resources when the configuration is restored in a different order than when userspace set it up) need to use their own restore logic. This function is deprecated. New drivers should implement atomic mode- setting and use the atomic suspend/resume helpers. See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()Eh](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubjU )}(hhh]jZ )}(h?``struct drm_device *dev`` drm_device which should be restored h](j` )}(h``struct drm_device *dev``h]jf )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubj| )}(hhh]h)}(h#drm_device which should be restoredh]h#drm_device which should be restored}(hjСhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj̡hMhj͡ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj̡hMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hDrivers which use the mode setting helpers can use this function to force-restore the mode setting configuration e.g. on resume or when something else might have trampled over the hw state (like some overzealous old BIOSen tended to do).h]hDrivers which use the mode setting helpers can use this function to force-restore the mode setting configuration e.g. on resume or when something else might have trampled over the hw state (like some overzealous old BIOSen tended to do).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hX;This helper doesn't provide a error return value since restoring the old config should never fail due to resource allocation issues since the driver has successfully set the restored configuration already. Hence this should boil down to the equivalent of a few dpms on calls, which also don't provide an error code.h]hX?This helper doesn’t provide a error return value since restoring the old config should never fail due to resource allocation issues since the driver has successfully set the restored configuration already. Hence this should boil down to the equivalent of a few dpms on calls, which also don’t provide an error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hDrivers where simply restoring an old configuration again might fail (e.g. due to slight differences in allocating shared resources when the configuration is restored in a different order than when userspace set it up) need to use their own restore logic.h]hDrivers where simply restoring an old configuration again might fail (e.g. due to slight differences in allocating shared resources when the configuration is restored in a different order than when userspace set it up) need to use their own restore logic.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hyThis function is deprecated. New drivers should implement atomic mode- setting and use the atomic suspend/resume helpers.h]hyThis function is deprecated. New drivers should implement atomic mode- setting and use the atomic suspend/resume helpers.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()h]hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj4hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq )drm_helper_force_disable_all (C function)c.drm_helper_force_disable_allhNtauh1jd hj4hhhNhNubjw )}(hhh](j| )}(h9int drm_helper_force_disable_all (struct drm_device *dev)h]j )}(h8int drm_helper_force_disable_all(struct drm_device *dev)h](j)}(hinth]hint}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhjhMubj )}(hdrm_helper_force_disable_allh]j )}(hdrm_helper_force_disable_allh]hdrm_helper_force_disable_all}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjohhhjhMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj΢hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjˢubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjТmodnameN classnameNj j )}j ]j)}jjsbc.drm_helper_force_disable_allasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjohhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjkhhhjhMubah}(h]jfah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjhhhubj )}(hhh]h)}(h#Forcibly turn off all enabled CRTCsh]h#Forcibly turn off all enabled CRTCs}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhj0hhubah}(h]h ]h"]h$]h&]uh1j hjhhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jKj jKj j j uh1jv hhhj4hNhNubj )}(hX**Parameters** ``struct drm_device *dev`` DRM device whose CRTCs to turn off **Description** Drivers may want to call this on unload to ensure that all displays are unlit and the GPU is in a consistent, low power state. Takes modeset locks. **Note** This should only be used by non-atomic legacy drivers. For an atomic version look at drm_atomic_helper_shutdown(). **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j )}(hjUh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjOubjU )}(hhh]jZ )}(h>``struct drm_device *dev`` DRM device whose CRTCs to turn off h](j` )}(h``struct drm_device *dev``h]jf )}(hjth]hstruct drm_device *dev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjrubah}(h]h ]h"]h$]h&]uh1j_ hf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjnubj| )}(hhh]h)}(h"DRM device whose CRTCs to turn offh]h"DRM device whose CRTCs to turn off}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j{ hjnubeh}(h]h ]h"]h$]h&]uh1jY hjhM hjkubah}(h]h ]h"]h$]h&]uh1jT hjOubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjOubh)}(hDrivers may want to call this on unload to ensure that all displays are unlit and the GPU is in a consistent, low power state. Takes modeset locks.h]hDrivers may want to call this on unload to ensure that all displays are unlit and the GPU is in a consistent, low power state. Takes modeset locks.}(hjţhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjOubh)}(h**Note**h]j )}(hj֣h]hNote}(hjأhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjԣubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chM hjOubh)}(hrThis should only be used by non-atomic legacy drivers. For an atomic version look at drm_atomic_helper_shutdown().h]hrThis should only be used by non-atomic legacy drivers. For an atomic version look at drm_atomic_helper_shutdown().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjOubh)}(h **Return**h]j )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjOubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:472: ./drivers/gpu/drm/drm_crtc_helper.chMhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj4hhhNhNubeh}(h]jah ]h"].legacy crtc/modeset helper functions referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(hPrivacy-screen classh]hPrivacy-screen class}(hj3hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj0hhhhhMubh)}(hXThis class allows non KMS drivers, from e.g. drivers/platform/x86 to register a privacy-screen device, which the KMS drivers can then use to implement the standard privacy-screen properties, see :ref:`Standard Connector Properties`.h](hThis class allows non KMS drivers, from e.g. drivers/platform/x86 to register a privacy-screen device, which the KMS drivers can then use to implement the standard privacy-screen properties, see }(hjAhhhNhNubh)}(hC:ref:`Standard Connector Properties`h]hinline)}(hjKh]hStandard Connector Properties}(hjOhhhNhNubah}(h]h ](j stdstd-refeh"]h$]h&]uh1jMhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjYreftyperef refexplicitrefwarnj standard_connector_propertiesuh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:478: ./drivers/gpu/drm/drm_privacy_screen.chKhjAubh.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjkhKhj0hhubh)}(hKMS drivers using a privacy-screen class device are advised to use the drm_connector_attach_privacy_screen_provider() and drm_connector_update_privacy_screen() helpers for dealing with this.h]hKMS drivers using a privacy-screen class device are advised to use the drm_connector_attach_privacy_screen_provider() and drm_connector_update_privacy_screen() helpers for dealing with this.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:478: ./drivers/gpu/drm/drm_privacy_screen.chKhj0hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq !drm_privacy_screen_ops (C struct)c.drm_privacy_screen_opshNtauh1jd hj0hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhNubjw )}(hhh](j| )}(hdrm_privacy_screen_opsh]j )}(hstruct drm_privacy_screen_opsh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_privacy_screen_opsh]j )}(hjh]hdrm_privacy_screen_ops}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(hdrm_privacy_screen operationsh]hdrm_privacy_screen operations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKhjޤhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j structeh"]h$]h&]j j j jj jj j j uh1jv hhhj0hjhNubj )}(hX7**Definition**:: struct drm_privacy_screen_ops { int (*set_sw_state)(struct drm_privacy_screen *priv, enum drm_privacy_screen_status sw_state); void (*get_hw_state)(struct drm_privacy_screen *priv); }; **Members** ``set_sw_state`` Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver's responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen's lock held. ``get_hw_state`` Called to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.h](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKhjubj, )}(hstruct drm_privacy_screen_ops { int (*set_sw_state)(struct drm_privacy_screen *priv, enum drm_privacy_screen_status sw_state); void (*get_hw_state)(struct drm_privacy_screen *priv); };h]hstruct drm_privacy_screen_ops { int (*set_sw_state)(struct drm_privacy_screen *priv, enum drm_privacy_screen_status sw_state); void (*get_hw_state)(struct drm_privacy_screen *priv); };}hjsbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKhjubh)}(h **Members**h]j )}(hj/h]hMembers}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKhjubjU )}(hhh](jZ )}(hXF``set_sw_state`` Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver's responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen's lock held. h](j` )}(h``set_sw_state``h]jf )}(hjNh]h set_sw_state}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjLubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK hjHubj| )}(hhh]h)}(hX4Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver's responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen's lock held.h]hX8Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver’s responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen’s lock held.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKhjdubah}(h]h ]h"]h$]h&]uh1j{ hjHubeh}(h]h ]h"]h$]h&]uh1jY hjchK hjEubjZ )}(h``get_hw_state`` Called to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.h](j` )}(h``get_hw_state``h]jf )}(hjh]h get_hw_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK'hjubj| )}(hhh]h)}(hCalled to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.h]hCalled to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK%hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK'hjEubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhjhNubh)}(h**Description**h]j )}(hj˥h]h Description}(hjͥhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjɥubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK+hj0hhubh)}(hDefines the operations which the privacy-screen class code may call. These functions should be implemented by the privacy-screen driver.h]hDefines the operations which the privacy-screen class code may call. These functions should be implemented by the privacy-screen driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKhj0hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq drm_privacy_screen (C struct)c.drm_privacy_screenhNtauh1jd hj0hhhjhNubjw )}(hhh](j| )}(hdrm_privacy_screenh]j )}(hstruct drm_privacy_screenh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_privacy_screenh]j )}(hjh]hdrm_privacy_screen}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKhjhhubj )}(hhh]h)}(h central privacy-screen structureh]h central privacy-screen structure}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK-hjHhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j structeh"]h$]h&]j j j jcj jcj j j uh1jv hhhj0hjhNubj )}(hXM**Definition**:: struct drm_privacy_screen { struct device dev; struct mutex lock; struct list_head list; struct blocking_notifier_head notifier_head; const struct drm_privacy_screen_ops *ops; enum drm_privacy_screen_status sw_state; enum drm_privacy_screen_status hw_state; void *drvdata; }; **Members** ``dev`` device used to register the privacy-screen in sysfs. ``lock`` mutex protection all fields in this struct. ``list`` privacy-screen devices list list-entry. ``notifier_head`` privacy-screen notifier head. ``ops`` :c:type:`struct drm_privacy_screen_ops ` for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen. ``sw_state`` The privacy-screen's software state, see :ref:`Standard Connector Properties` for more info. ``hw_state`` The privacy-screen's hardware state, see :ref:`Standard Connector Properties` for more info. ``drvdata`` Private data owned by the privacy screen providerh](h)}(h**Definition**::h](j )}(h**Definition**h]h Definition}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubh:}(hjkhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK1hjgubj, )}(hX3struct drm_privacy_screen { struct device dev; struct mutex lock; struct list_head list; struct blocking_notifier_head notifier_head; const struct drm_privacy_screen_ops *ops; enum drm_privacy_screen_status sw_state; enum drm_privacy_screen_status hw_state; void *drvdata; };h]hX3struct drm_privacy_screen { struct device dev; struct mutex lock; struct list_head list; struct blocking_notifier_head notifier_head; const struct drm_privacy_screen_ops *ops; enum drm_privacy_screen_status sw_state; enum drm_privacy_screen_status hw_state; void *drvdata; };}hjsbah}(h]h ]h"]h$]h&]j j uh1j+ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK3hjgubh)}(h **Members**h]j )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK>hjgubjU )}(hhh](jZ )}(h=``dev`` device used to register the privacy-screen in sysfs. h](j` )}(h``dev``h]jf )}(hjh]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK4hjubj| )}(hhh]h)}(h4device used to register the privacy-screen in sysfs.h]h4device used to register the privacy-screen in sysfs.}(hjѦhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjͦhK4hjΦubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjͦhK4hjubjZ )}(h5``lock`` mutex protection all fields in this struct. h](j` )}(h``lock``h]jf )}(hjh]hlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK6hjubj| )}(hhh]h)}(h+mutex protection all fields in this struct.h]h+mutex protection all fields in this struct.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK6hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK6hjubjZ )}(h1``list`` privacy-screen devices list list-entry. h](j` )}(h``list``h]jf )}(hj*h]hlist}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1je hj(ubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK8hj$ubj| )}(hhh]h)}(h'privacy-screen devices list list-entry.h]h'privacy-screen devices list list-entry.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hK8hj@ubah}(h]h ]h"]h$]h&]uh1j{ hj$ubeh}(h]h ]h"]h$]h&]uh1jY hj?hK8hjubjZ )}(h0``notifier_head`` privacy-screen notifier head. h](j` )}(h``notifier_head``h]jf )}(hjch]h notifier_head}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1je hjaubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK:hj]ubj| )}(hhh]h)}(hprivacy-screen notifier head.h]hprivacy-screen notifier head.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhK:hjyubah}(h]h ]h"]h$]h&]uh1j{ hj]ubeh}(h]h ]h"]h$]h&]uh1jY hjxhK:hjubjZ )}(h``ops`` :c:type:`struct drm_privacy_screen_ops ` for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen. h](j` )}(h``ops``h]jf )}(hjh]hops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK>hjubj| )}(hhh]h)}(h:c:type:`struct drm_privacy_screen_ops ` for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen.h](h)}(h@:c:type:`struct drm_privacy_screen_ops `h]jf )}(hjh]hstruct drm_privacy_screen_ops}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_privacy_screen_opsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK=hjubhY for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjاhK=hjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhK>hjubjZ )}(h``sw_state`` The privacy-screen's software state, see :ref:`Standard Connector Properties` for more info. h](j` )}(h ``sw_state``h]jf )}(hjh]hsw_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKDhjubj| )}(hhh]h)}(h{The privacy-screen's software state, see :ref:`Standard Connector Properties` for more info.h](h+The privacy-screen’s software state, see }(hjhhhNhNubh)}(hC:ref:`Standard Connector Properties`h]jN)}(hjh]hStandard Connector Properties}(hjhhhNhNubah}(h]h ](j stdstd-refeh"]h$]h&]uh1jMhjubah}(h]h ]h"]h$]h&]refdocj refdomainj$reftyperef refexplicitrefwarnj standard_connector_propertiesuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKBhjubh for more info.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj6hKBhj ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj hKDhjubjZ )}(h``hw_state`` The privacy-screen's hardware state, see :ref:`Standard Connector Properties` for more info. h](j` )}(h ``hw_state``h]jf )}(hjSh]hhw_state}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKJhjMubj| )}(hhh]h)}(h{The privacy-screen's hardware state, see :ref:`Standard Connector Properties` for more info.h](h+The privacy-screen’s hardware state, see }(hjlhhhNhNubh)}(hC:ref:`Standard Connector Properties`h]jN)}(hjvh]hStandard Connector Properties}(hjxhhhNhNubah}(h]h ](j stdstd-refeh"]h$]h&]uh1jMhjtubah}(h]h ]h"]h$]h&]refdocj refdomainjreftyperef refexplicitrefwarnj standard_connector_propertiesuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKHhjlubh for more info.}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKHhjiubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjhhKJhjubjZ )}(h=``drvdata`` Private data owned by the privacy screen providerh](j` )}(h ``drvdata``h]jf )}(hjh]hdrvdata}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKMhjubj| )}(hhh]h)}(h1Private data owned by the privacy screen providerh]h1Private data owned by the privacy screen provider}(hjʨhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKNhjǨubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjƨhKMhjubeh}(h]h ]h"]h$]h&]uh1jT hjgubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhjhNubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhKQhj0hhubh)}(hCentral privacy-screen structure, this contains the struct device used to register the screen in sysfs, the screen's state, ops, etc.h]hCentral privacy-screen structure, this contains the struct device used to register the screen in sysfs, the screen’s state, ops, etc.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:481: ./include/drm/drm_privacy_screen_driver.hhK.hj0hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq $drm_privacy_screen_lookup (C struct)c.drm_privacy_screen_lookuphNtauh1jd hj0hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhNubjw )}(hhh](j| )}(hdrm_privacy_screen_lookuph]j )}(h struct drm_privacy_screen_lookuph](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhj@hKubj )}(hdrm_privacy_screen_lookuph]j )}(hj-h]hdrm_privacy_screen_lookup}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/hhhj@hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+hhhj@hKubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j{ hj@hKhj(hhubj )}(hhh]h)}(h'static privacy-screen lookup list entryh]h'static privacy-screen lookup list entry}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhjrhhubah}(h]h ]h"]h$]h&]uh1j hj(hhhj@hKubeh}(h]h ](j structeh"]h$]h&]j j j jj jj j j uh1jv hhhj0hj'hNubj )}(hX**Definition**:: struct drm_privacy_screen_lookup { struct list_head list; const char *dev_id; const char *con_id; const char *provider; }; **Members** ``list`` Lookup list list-entry. ``dev_id`` Consumer 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./include/drm/drm_privacy_screen_machine.hhKhjubjU )}(hhh](jZ )}(h!``list`` Lookup list list-entry. h](j` )}(h``list``h]jf )}(hjh]hlist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhjܩubj| )}(hhh]h)}(hLookup list list-entry.h]hLookup list list-entry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjܩubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj٩ubjZ )}(h>``dev_id`` Consumer device name or NULL to match all devices. h](j` )}(h ``dev_id``h]jf )}(hjh]hdev_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhjubj| )}(hhh]h)}(h2Consumer device name or NULL to match all devices.h]h2Consumer device name or NULL to match all devices.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKhj1ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj0hKhj٩ubjZ )}(hD``con_id`` Consumer connector name or NULL to match all connectors. h](j` )}(h ``con_id``h]jf )}(hjTh]hcon_id}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjRubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhjNubj| )}(hhh]h)}(h8Consumer connector name or NULL to match all connectors.h]h8Consumer connector name or NULL to match all connectors.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihKhjjubah}(h]h ]h"]h$]h&]uh1j{ hjNubeh}(h]h ]h"]h$]h&]uh1jY hjihKhj٩ubjZ )}(h7``provider`` dev_name() of the privacy_screen provider.h](j` )}(h ``provider``h]jf )}(hjh]hprovider}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhjubj| )}(hhh]h)}(h*dev_name() of the privacy_screen provider.h]h*dev_name() of the privacy_screen provider.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKhj٩ubeh}(h]h ]h"]h$]h&]uh1jT hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhj'hNubh)}(h**Description**h]j )}(hjЪh]h Description}(hjҪhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjΪubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhj0hhubh)}(huUsed for the static lookup-list for mapping privacy-screen consumer dev-connector pairs to a privacy-screen provider.h]huUsed for the static lookup-list for mapping privacy-screen consumer dev-connector pairs to a privacy-screen provider.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:484: ./include/drm/drm_privacy_screen_machine.hhKhj0hhubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_privacy_screen_lookup_add (C function)c.drm_privacy_screen_lookup_addhNtauh1jd hj0hhhNhNubjw )}(hhh](j| )}(hMvoid drm_privacy_screen_lookup_add (struct drm_privacy_screen_lookup *lookup)h]j )}(hLvoid drm_privacy_screen_lookup_add(struct drm_privacy_screen_lookup *lookup)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chK.ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhK.ubj )}(hdrm_privacy_screen_lookup_addh]j )}(hdrm_privacy_screen_lookup_addh]hdrm_privacy_screen_lookup_add}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhK.ubj)}(h*(struct drm_privacy_screen_lookup *lookup)h]j)}(h(struct drm_privacy_screen_lookup *lookuph](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_privacy_screen_lookuph]hdrm_privacy_screen_lookup}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j)}jj1sbc.drm_privacy_screen_lookup_addasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjGubj )}(hlookuph]hlookup}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubah}(h]h ]h"]h$]h&]j j uh1jhj hhhjhK.ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhK.ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhK.hjhhubj )}(hhh]h)}(h5add an entry to the static privacy-screen lookup listh]h5add an entry to the static privacy-screen lookup list}(hjΫhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chK.hj˫hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhK.ubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj0hNhNubj )}(hX'**Parameters** ``struct drm_privacy_screen_lookup *lookup`` lookup list entry to add **Description** Add an entry to the static privacy-screen lookup list. Note the :c:type:`struct list_head ` which is part of the :c:type:`struct drm_privacy_screen_lookup ` gets added to a list owned by the privacy-screen core. So the passed in :c:type:`struct drm_privacy_screen_lookup ` must not be free-ed until it is removed from the lookup list by calling drm_privacy_screen_lookup_remove().h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chK2hjubjU )}(hhh]jZ )}(hF``struct drm_privacy_screen_lookup *lookup`` lookup list entry to add h](j` )}(h,``struct drm_privacy_screen_lookup *lookup``h]jf )}(hjh]h(struct drm_privacy_screen_lookup *lookup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj ubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chK0hj ubj| )}(hhh]h)}(hlookup list entry to addh]hlookup list entry to add}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hK0hj%ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj$hK0hjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chK2hjubh)}(hXAdd an entry to the static privacy-screen lookup list. Note the :c:type:`struct list_head ` which is part of the :c:type:`struct drm_privacy_screen_lookup ` gets added to a list owned by the privacy-screen core. So the passed in :c:type:`struct drm_privacy_screen_lookup ` must not be free-ed until it is removed from the lookup list by calling drm_privacy_screen_lookup_remove().h](h@Add an entry to the static privacy-screen lookup list. Note the }(hj`hhhNhNubh)}(h&:c:type:`struct list_head `h]jf )}(hjjh]hstruct list_head}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjhubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j list_headuh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chK1hj`ubh which is part of the }(hj`hhhNhNubh)}(hF:c:type:`struct drm_privacy_screen_lookup `h]jf )}(hjh]h struct drm_privacy_screen_lookup}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_privacy_screen_lookupuh1hhjhK1hj`ubhI gets added to a list owned by the privacy-screen core. So the passed in }(hj`hhhNhNubh)}(hF:c:type:`struct drm_privacy_screen_lookup `h]jf )}(hjh]h struct drm_privacy_screen_lookup}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_privacy_screen_lookupuh1hhjhK1hj`ubhl must not be free-ed until it is removed from the lookup list by calling drm_privacy_screen_lookup_remove().}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK1hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq -drm_privacy_screen_lookup_remove (C function)"c.drm_privacy_screen_lookup_removehNtauh1jd hj0hhhNhNubjw )}(hhh](j| )}(hPvoid drm_privacy_screen_lookup_remove (struct drm_privacy_screen_lookup *lookup)h]j )}(hOvoid drm_privacy_screen_lookup_remove(struct drm_privacy_screen_lookup *lookup)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKAubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKAubj )}(h drm_privacy_screen_lookup_removeh]j )}(h drm_privacy_screen_lookup_removeh]h drm_privacy_screen_lookup_remove}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKAubj)}(h*(struct drm_privacy_screen_lookup *lookup)h]j)}(h(struct drm_privacy_screen_lookup *lookuph](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_privacy_screen_lookuph]hdrm_privacy_screen_lookup}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]j)}jjsb"c.drm_privacy_screen_lookup_removeasbuh1hhj1ubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj1ubj )}(hlookuph]hlookup}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKAubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKAubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hjhKAhjhhubj )}(hhh]h)}(h8remove an entry to the static privacy-screen lookup listh]h8remove an entry to the static privacy-screen lookup list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKAhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKAubeh}(h]h ](j functioneh"]h$]h&]j j j jЭj jЭj j j uh1jv hhhj0hNhNubj )}(h**Parameters** ``struct drm_privacy_screen_lookup *lookup`` lookup list entry to remove **Description** Remove an entry previously added with drm_privacy_screen_lookup_add() from the static privacy-screen lookup list.h](h)}(h**Parameters**h]j )}(hjڭh]h Parameters}(hjܭhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjحubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKEhjԭubjU )}(hhh]jZ )}(hI``struct drm_privacy_screen_lookup *lookup`` lookup list entry to remove h](j` )}(h,``struct drm_privacy_screen_lookup *lookup``h]jf )}(hjh]h(struct drm_privacy_screen_lookup *lookup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKChjubj| )}(hhh]h)}(hlookup list entry to removeh]hlookup list entry to remove}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKChjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhKChjubah}(h]h ]h"]h$]h&]uh1jT hjԭubh)}(h**Description**h]j )}(hj4h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKEhjԭubh)}(hqRemove an entry previously added with drm_privacy_screen_lookup_add() from the static privacy-screen lookup list.h]hqRemove an entry previously added with drm_privacy_screen_lookup_add() from the static privacy-screen lookup list.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKDhjԭubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_privacy_screen_get (C function)c.drm_privacy_screen_gethNtauh1jd hj0hhhNhNubjw )}(hhh](j| )}(h[struct drm_privacy_screen * drm_privacy_screen_get (struct device *dev, const char *con_id)h]j )}(hYstruct drm_privacy_screen *drm_privacy_screen_get(struct device *dev, const char *con_id)h](j )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuhhhjhKgubh)}(hhh]j )}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jdrm_privacy_screen_getsbc.drm_privacy_screen_getasbuh1hhjuhhhjhKgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuhhhjhKgubj)}(hjOh]h*}(hjǮhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjuhhhjhKgubj )}(hdrm_privacy_screen_geth]j )}(hjh]hdrm_privacy_screen_get}(hjخhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԮubah}(h]h ](j j eh"]h$]h&]j j uh1j hjuhhhjhKgubj)}(h((struct device *dev, const char *con_id)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_privacy_screen_getasbuh1hhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hdevh]hdev}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst char *con_idh](j )}(hjAh]hconst}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hcharh]hchar}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj_ubj )}(hcon_idh]hcon_id}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjuhhhjhKgubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjqhhhjhKgubah}(h]jlah ](j j eh"]h$]h&]j j )j huh1j{ hjhKghjnhhubj )}(hhh]h)}(hget a privacy-screen providerh]hget a privacy-screen provider}(hjѯhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKghjίhhubah}(h]h ]h"]h$]h&]uh1j hjnhhhjhKgubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj0hNhNubj )}(hXi**Parameters** ``struct device *dev`` consumer-device for which to get a privacy-screen provider ``const char *con_id`` (video)connector name for which to get a privacy-screen provider **Description** Get a privacy-screen provider for a privacy-screen attached to the display described by the **dev** and **con_id** parameters. **Return** * A pointer to a :c:type:`struct drm_privacy_screen ` on success. * ERR_PTR(-ENODEV) if no matching privacy-screen is found * ERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen, but it has not been registered yet.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKkhjubjU )}(hhh](jZ )}(hR``struct device *dev`` consumer-device for which to get a privacy-screen provider h](j` )}(h``struct device *dev``h]jf )}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKhhj ubj| )}(hhh]h)}(h:consumer-device for which to get a privacy-screen providerh]h:consumer-device for which to get a privacy-screen provider}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hKhhj(ubah}(h]h ]h"]h$]h&]uh1j{ hj ubeh}(h]h ]h"]h$]h&]uh1jY hj'hKhhj ubjZ )}(hX``const char *con_id`` (video)connector name for which to get a privacy-screen provider h](j` )}(h``const char *con_id``h]jf )}(hjKh]hconst char *con_id}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjIubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKihjEubj| )}(hhh]h)}(h@(video)connector name for which to get a privacy-screen providerh]h@(video)connector name for which to get a privacy-screen provider}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hKihjaubah}(h]h ]h"]h$]h&]uh1j{ hjEubeh}(h]h ]h"]h$]h&]uh1jY hj`hKihj ubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKkhjubh)}(h~Get a privacy-screen provider for a privacy-screen attached to the display described by the **dev** and **con_id** parameters.h](h\Get a privacy-screen provider for a privacy-screen attached to the display described by the }(hjhhhNhNubj )}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h **con_id**h]hcon_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh parameters.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKjhjubh)}(h **Return**h]j )}(hjѰh]hReturn}(hjӰhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjϰubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKmhjubh)}(hhh](h)}(hSA pointer to a :c:type:`struct drm_privacy_screen ` on success.h]h)}(hjh](hA pointer to a }(hjhhhNhNubh)}(h8:c:type:`struct drm_privacy_screen `h]jf )}(hjh]hstruct drm_privacy_screen}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_privacy_screenuh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKnhjubh on success.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKnhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h7ERR_PTR(-ENODEV) if no matching privacy-screen is foundh]h)}(hj'h]h7ERR_PTR(-ENODEV) if no matching privacy-screen is found}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKohj%ubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hxERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen, but it has not been registered yet.h]jU )}(hhh]jZ )}(haERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen, but it has not been registered yet.h](j` )}(h=ERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen,h]h=ERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen,}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKphjDubj| )}(hhh]h)}(h#but it has not been registered yet.h]h#but it has not been registered yet.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chKqhjWubah}(h]h ]h"]h$]h&]uh1j{ hjDubeh}(h]h ]h"]h$]h&]uh1jY hjVhKphjAubah}(h]h ]h"]h$]h&]uh1jT hj=ubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNjOuh1hhjhKnhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq #drm_privacy_screen_put (C function)c.drm_privacy_screen_puthNtauh1jd hj0hhhNhNubjw )}(hhh](j| )}(h=void drm_privacy_screen_put (struct drm_privacy_screen *priv)h]j )}(h` pointer with ops for the privacy-screen ``void *data`` Private data owned by the privacy screen provider **Description** Create and register a privacy-screen. **Return** * A pointer to the created privacy-screen on success. * An ERR_PTR(errno) on failure.h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubjU )}(hhh](jZ )}(h?``struct device *parent`` parent-device for the privacy-screen h](j` )}(h``struct device *parent``h]jf )}(hjh]hstruct device *parent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chM}hjubj| )}(hhh]h)}(h$parent-device for the privacy-screenh]h$parent-device for the privacy-screen}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM}hj0ubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hj/hM}hjubjZ )}(h``const struct drm_privacy_screen_ops *ops`` :c:type:`struct drm_privacy_screen_ops ` pointer with ops for the privacy-screen h](j` )}(h,``const struct drm_privacy_screen_ops *ops``h]jf )}(hjSh]h(const struct drm_privacy_screen_ops *ops}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjQubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chM~hjMubj| )}(hhh]h)}(hh:c:type:`struct drm_privacy_screen_ops ` pointer with ops for the privacy-screenh](h)}(h@:c:type:`struct drm_privacy_screen_ops `h]jf )}(hjrh]hstruct drm_privacy_screen_ops}(hjthhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1je hjpubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_privacy_screen_opsuh1hhjhhM~hjlubh( pointer with ops for the privacy-screen}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhhM~hjiubah}(h]h ]h"]h$]h&]uh1j{ hjMubeh}(h]h ]h"]h$]h&]uh1jY hjhhM~hjubjZ )}(hA``void *data`` Private data owned by the privacy screen provider h](j` )}(h``void *data``h]jf )}(hjh]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubj| )}(hhh]h)}(h1Private data owned by the privacy screen providerh]h1Private data owned by the privacy screen provider}(hjĿhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubeh}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(h%Create and register a privacy-screen.h]h%Create and register a privacy-screen.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(h **Return**h]j )}(hj h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(hhh](h)}(h3A pointer to the created privacy-screen on success.h]h)}(hj(h]h3A pointer to the created privacy-screen on success.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhj&ubah}(h]h ]h"]h$]h&]uh1hhj#ubh)}(hAn ERR_PTR(errno) on failure.h]h)}(hj@h]hAn ERR_PTR(errno) on failure.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhj>ubah}(h]h ]h"]h$]h&]uh1hhj#ubeh}(h]h ]h"]h$]h&]jNjOuh1hhj7hMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq *drm_privacy_screen_unregister (C function)c.drm_privacy_screen_unregisterhNtauh1jd hj0hhhNhNubjw )}(hhh](j| )}(hDvoid drm_privacy_screen_unregister (struct drm_privacy_screen *priv)h]j )}(hCvoid drm_privacy_screen_unregister(struct drm_privacy_screen *priv)h](j)}(hvoidh]hvoid}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhhjhMubj )}(hdrm_privacy_screen_unregisterh]j )}(hdrm_privacy_screen_unregisterh]hdrm_privacy_screen_unregister}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxhhhjhMubj)}(h!(struct drm_privacy_screen *priv)h]j)}(hstruct drm_privacy_screen *privh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)}jjsbc.drm_privacy_screen_unregisterasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhjubj )}(hprivh]hpriv}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjxhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjthhhjhMubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j{ hjhMhjqhhubj )}(hhh]h)}(hunregister privacy-screenh]hunregister privacy-screen}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhj9hhubah}(h]h ]h"]h$]h&]uh1j hjqhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j j j jTj jTj j j uh1jv hhhj0hNhNubj )}(h**Parameters** ``struct drm_privacy_screen *priv`` privacy-screen to unregister **Description** Unregister a privacy-screen registered with drm_privacy_screen_register(). May be called with a NULL or ERR_PTR, in which case it is a no-op.h](h)}(h**Parameters**h]j )}(hj^h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjXubjU )}(hhh]jZ )}(hA``struct drm_privacy_screen *priv`` privacy-screen to unregister h](j` )}(h#``struct drm_privacy_screen *priv``h]jf )}(hj}h]hstruct drm_privacy_screen *priv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hj{ubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjwubj| )}(hhh]h)}(hprivacy-screen to unregisterh]hprivacy-screen to unregister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjwubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjtubah}(h]h ]h"]h$]h&]uh1jT hjXubh)}(h**Description**h]j )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjXubh)}(hUnregister a privacy-screen registered with drm_privacy_screen_register(). May be called with a NULL or ERR_PTR, in which case it is a no-op.h]hUnregister a privacy-screen registered with drm_privacy_screen_register(). May be called with a NULL or ERR_PTR, in which case it is a no-op.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhNhNubje )}(hhh]h}(h]h ]h"]h$]h&]entries](jq 3drm_privacy_screen_call_notifier_chain (C function)(c.drm_privacy_screen_call_notifier_chainhNtauh1jd hj0hhhNhNubjw )}(hhh](j| )}(hMvoid drm_privacy_screen_call_notifier_chain (struct drm_privacy_screen *priv)h]j )}(hLvoid drm_privacy_screen_call_notifier_chain(struct drm_privacy_screen *priv)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(h&drm_privacy_screen_call_notifier_chainh]j )}(h&drm_privacy_screen_call_notifier_chainh]h&drm_privacy_screen_call_notifier_chain}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h!(struct drm_privacy_screen *priv)h]j)}(hstruct drm_privacy_screen *privh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j)}jj sb(c.drm_privacy_screen_call_notifier_chainasbuh1hhj6ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj)}(hjOh]h*}(hjhhhNhNubah}(h]h ]j"ah"]h$]h&]uh1jhj6ubj )}(hprivh]hpriv}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j{ hj hMhjhhubj )}(hhh]h)}(h notify consumers of state changeh]h notify consumers of state change}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j j j jj jj j j uh1jv hhhj0hNhNubj )}(hX**Parameters** ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with **Description** A privacy-screen provider driver can call this functions upon external changes to the privacy-screen state. E.g. the state may be changed by the hardware itself in response to a hotkey press. This function must be called without holding the privacy-screen lock. the driver must update sw_state and hw_state to reflect the new state before calling this function. The expected behavior from the driver upon receiving an external state change event is: 1. Take the lock; 2. Update sw_state and hw_state; 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().h](h)}(h**Parameters**h]j )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubjU )}(hhh]jZ )}(hQ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with h](j` )}(h#``struct drm_privacy_screen *priv``h]jf )}(hjh]hstruct drm_privacy_screen *priv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1je hjubah}(h]h ]h"]h$]h&]uh1j_ hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubj| )}(hhh]h)}(h,Privacy screen to register the notifier withh]h,Privacy screen to register the notifier with}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j{ hjubeh}(h]h ]h"]h$]h&]uh1jY hjhMhjubah}(h]h ]h"]h$]h&]uh1jT hjubh)}(h**Description**h]j )}(hj9h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(hX;A privacy-screen provider driver can call this functions upon external changes to the privacy-screen state. E.g. the state may be changed by the hardware itself in response to a hotkey press. This function must be called without holding the privacy-screen lock. the driver must update sw_state and hw_state to reflect the new state before calling this function. The expected behavior from the driver upon receiving an external state change event is: 1. Take the lock; 2. Update sw_state and hw_state; 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().h]hX;A privacy-screen provider driver can call this functions upon external changes to the privacy-screen state. E.g. the state may be changed by the hardware itself in response to a hotkey press. This function must be called without holding the privacy-screen lock. the driver must update sw_state and hw_state to reflect the new state before calling this function. The expected behavior from the driver upon receiving an external state change event is: 1. Take the lock; 2. Update sw_state and hw_state; 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:487: ./drivers/gpu/drm/drm_privacy_screen.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j hj0hhhNhNubeh}(h]jah ]h"]privacy-screen classah$]h&]uh1hhhhhhhhMubeh}(h]j}ah ]h"]mode setting helper functionsah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid 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implicit target name: “overview”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jalevelKtypejsourceȟlineKuh1jhjhhhhhKubj)}(hhh]h)}(h+Duplicate implicit target name: "overview".h]h/Duplicate implicit target name: “overview”.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6ubah}(h]h ]h"]h$]h&]jcalevelKtypejsourceȟlineM+uh1jhjlhhhhhM+ubj)}(hhh]h)}(h6Duplicate implicit target name: "functions reference".h]h:Duplicate implicit target name: “functions reference”.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQubah}(h]h ]h"]h$]h&]jalevelKtypejsourceȟlineM4uh1jhjohhhhhM4ubetransform_messages](j)}(hhh]h)}(hhh]h7Hyperlink target "drm-atomic-helper" is not referenced.}hjqsbah}(h]h ]h"]h$]h&]uh1hhjnubah}(h]h ]h"]h$]h&]levelKtypejsourceȟlineK/uh1jubj)}(hhh]h)}(hhh]h1Hyperlink target "drm-bridges" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]levelKtypejsourceȟlineKuh1jubj)}(hhh]h)}(hhh]h6Hyperlink target "drm-panel-helper" is not referenced.}hjsbah}(h]h ]h"]h$]h&]uh1hhjubah}(h]h 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