sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget'/translations/zh_CN/gpu/drm-kms-helpersmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/zh_TW/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/it_IT/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ja_JP/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ko_KR/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/pt_BR/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/sp_SP/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hMode Setting Helper Functionsh]hMode Setting Helper Functions}(hhhhhNhNubah}(h]h ]h"]h$]h&]refidid7uh1hhhhhhA/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers.rsthKubh paragraph)}(hXThe DRM subsystem aims for a strong separation between core code and helper libraries. Core code takes care of general setup and teardown and decoding userspace requests to kernel internal objects. Everything else is handled by a large set of helper libraries, which can be combined freely to pick and choose for each driver what fits, and avoid shared code where special behaviour is needed.h]hXThe DRM subsystem aims for a strong separation between core code and helper libraries. Core code takes care of general setup and teardown and decoding userspace requests to kernel internal objects. Everything else is handled by a large set of helper libraries, which can be combined freely to pick and choose for each driver what fits, and avoid shared code where special behaviour is needed.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXThis distinction between core code and helpers is especially strong in the modesetting code, where there's a shared userspace ABI for all drivers. This is in contrast to the render side, where pretty much everything (with very few exceptions) can be considered optional helper code.h]hXThis distinction between core code and helpers is especially strong in the modesetting code, where there’s a shared userspace ABI for all drivers. This is in contrast to the render side, where pretty much everything (with very few exceptions) can be considered optional helper code.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(h5There are a few areas these helpers can grouped into:h]h5There are a few areas these helpers can grouped into:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh bullet_list)}(hhh](h list_item)}(hXTHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there's also the simple display pipe helpers. h]h)}(hXSHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there's also the simple display pipe helpers.h]hXUHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there’s also the simple display pipe helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhhhhhhNubh)}(hXThere's a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally there's also generic helpers for handling output probing, and for dealing with EDIDs. h]h)}(hXThere's a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally there's also generic helpers for handling output probing, and for dealing with EDIDs.h]hXThere’s a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). 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]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]uh1hhjgubeh}(h]h ]h"]h$]h&]uh1hhjdubah}(h]h ]h"]h$]h&]uh1hhjRhhhNhNubeh}(h]contentsah ]contentsah"]contentsah$]h&]uh1jPhhhK$hhhhubh)}(hhh](h)}(h+Modeset Helper Reference for Common Vtablesh]h+Modeset Helper Reference for Common Vtables}(hjK hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjH hhhhhK'ubh)}(hX`The DRM mode setting helper functions are common code for drivers to use if they wish. Drivers are not forced to use this code in their implementations but it would be useful if the code they do use at least provides a consistent interface and operation to userspace. Therefore it is highly recommended to use the provided helpers as much as possible.h]hX`The DRM mode setting helper functions are common code for drivers to use if they wish. Drivers are not forced to use this code in their implementations but it would be useful if the code they do use at least provides a consistent interface and operation to userspace. Therefore it is highly recommended to use the provided helpers as much as possible.}(hjY hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:41: ./include/drm/drm_modeset_helper_vtables.hhK$hjH hhubh)}(hBecause there is only one pointer per modeset object to hold a vfunc table for helper libraries they are by necessity shared among the different helpers.h]hBecause there is only one pointer per modeset object to hold a vfunc table for helper libraries they are by necessity shared among the different helpers.}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:41: ./include/drm/drm_modeset_helper_vtables.hhK*hjH hhubh)}(hTTo make this clear all the helper vtables are pulled together in this location here.h]hTTo make this clear all the helper vtables are pulled together in this location here.}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:41: ./include/drm/drm_modeset_helper_vtables.hhK.hjH hhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single drm_crtc_helper_funcs (C struct)c.drm_crtc_helper_funcshNtauh1j hjH hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhNubhdesc)}(hhh](hdesc_signature)}(hdrm_crtc_helper_funcsh]hdesc_signature_line)}(hstruct drm_crtc_helper_funcsh](hdesc_sig_keyword)}(hstructh]hstruct}(hj hhhNhNubah}(h]h ]kah"]h$]h&]uh1j hj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKubhdesc_sig_space)}(h h]h }(hj hhhNhNubah}(h]h ]wah"]h$]h&]uh1j hj hhhj hKubh desc_name)}(hdrm_crtc_helper_funcsh]h desc_sig_name)}(hj h]hdrm_crtc_helper_funcs}(hj hhhNhNubah}(h]h ]nah"]h$]h&]uh1j hj ubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1j hj hhhj hKubeh}(h]h ]h"]h$]h&]j j add_permalinkuh1j sphinx_line_type declaratorhj hhhj hKubah}(h]j ah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1j hj hKhj hhubh desc_content)}(hhh]h)}(hhelper operations for CRTCsh]hhelper operations for CRTCs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK8hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hKubeh}(h]h ](cstructeh"]h$]h&]domainj objtypej desctypej noindex noindexentrynocontentsentryuh1j hhhjH hj hNubh container)}(hX@**Definition**:: struct drm_crtc_helper_funcs { void (*dpms)(struct drm_crtc *crtc, int mode); void (*prepare)(struct drm_crtc *crtc); void (*commit)(struct drm_crtc *crtc); enum drm_mode_status (*mode_valid)(struct drm_crtc *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, int x, int y, struct drm_framebuffer *old_fb); void (*mode_set_nofb)(struct drm_crtc *crtc); int (*mode_set_base)(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb); void (*disable)(struct drm_crtc *crtc); int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_crtc *crtc, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_crtc *crtc, struct drm_atomic_commit *state); bool (*get_scanout_position)(struct drm_crtc *crtc, bool in_vblank_irq, int *vpos, int *hpos, ktime_t *stime, ktime_t *etime, const struct drm_display_mode *mode); bool (*handle_vblank_timeout)(struct drm_crtc *crtc); }; **Members** ``dpms`` Callback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used. ``prepare`` This callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used. ``commit`` This callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used. ``mode_valid`` This callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``mode_set`` This callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. ``mode_set_nofb`` This callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers. Note that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback. This callback is optional. ``mode_set_base`` This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by the CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. ``disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one. NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. ``atomic_check`` Drivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check(). When using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_begin`` Drivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display. This hook is called before any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_flush`` Drivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates. Simple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates. This hook is called after any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_enable`` This callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers. This function is optional. ``atomic_disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. This function is optional. ``get_scanout_position`` Called by vblank timestamping code. Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback. Parameters: crtc: The CRTC. in_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set. vpos: Target location for current vertical scanout position. hpos: Target location for current horizontal scanout position. stime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp. etime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp. mode: Current display timings. Returns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank." Returns: True on success, false if a reliable scanout position counter could not be read out. ``handle_vblank_timeout`` Handles timeouts of the vblank timer. Called by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout. This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h](h)}(h**Definition**::h](hstrong)}(h**Definition**h]h Definition}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj. ubh:}(hj. hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj* ubh)}(h **Members**h]j3 )}(hj` h]hMembers}(hjb hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKQhj* ubhdefinition_list)}(hhh](hdefinition_list_item)}(hXn``dpms`` Callback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used. h](hterm)}(h``dpms``h]hliteral)}(hj h]hdpms}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKKhj} ubh definition)}(hhh](h)}(hCallback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms().h]hCallback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK@hj ubh)}(huThis callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used.h](hYThis callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the }(hj hhhNhNubj3 )}(h **disable**h]hdisable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh hook isn’t used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKEhj ubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hj hhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh and }(hj hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh should be used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKHhj ubeh}(h]h ]h"]h$]h&]uh1j hj} ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKKhjx ubj| )}(hX``prepare`` This callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used. h](j )}(h ``prepare``h]j )}(hj h]hprepare}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKZhj ubj )}(hhh](h)}(hThis callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF.h](hThis callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their }(hj0 hhhNhNubj3 )}(h**dpms**h]hdpms}(hj8 hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0 ubh hook with DRM_MODE_DPMS_OFF.}(hj0 hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKRhj- ubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hjQ hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hjY hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQ ubh should be used.}(hjQ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKWhj- ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj, hKZhjx ubj| )}(hX``commit`` This callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used. h](j )}(h ``commit``h]j )}(hj h]hcommit}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKihj~ ubj )}(hhh](h)}(hThis callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON.h](hThis callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their }(hj hhhNhNubj3 )}(h**dpms**h]hdpms}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh hook with DRM_MODE_DPMS_ON.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKahj ubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hj hhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh should be used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKfhj ubeh}(h]h ]h"]h$]h&]uh1j hj~ ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKihjx ubj| )}(hX?``mode_valid`` This callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum h](j )}(h``mode_valid``h]j )}(hj h]h mode_valid}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubj )}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKphj ubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKxhj ubh)}(hThis function is optional.h]hThis function is optional.}(hj( hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK}hj ubh)}(hNOTE:h]hNOTE:}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXrSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hjF hhhNhNubj3 )}(h**mode_fixup**h]h mode_fixup}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjF ubh or }(hjF hhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjF ubh.}(hjF hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hRETURNS:h]hRETURNS:}(hjy hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKhjx ubj| )}(hX4``mode_fixup`` This callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](j )}(h``mode_fixup``h]j )}(hj h]h mode_fixup}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubj )}(hhh](h)}(hXThis callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the }(hj hhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hj h]h drm_encoder}(hj hhhNhNubah}(h]h ](xrefj c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocgpu/drm-kms-helpers refdomainj reftypetype refexplicitrefwarn c:parent_keysphinx.domains.c LookupKey)}data]sb reftarget drm_encoderuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh and }(hj hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_fixup `h]j )}(hj h]hdrm_bridge_funcs.mode_fixup}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj hKhj ubh~ vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also }(hj hhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]j )}(hj h]hdrm_crtc_state.adjusted_mode}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhj hKhj ubh for more details.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKhj ubh)}(hiThis function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional.h]hiThis function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional.}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hNOTE:h]hNOTE:}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXIThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.h]hXKThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.}(hjb hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hFThis is in contrast to the legacy CRTC helpers where this was allowed.h]hFThis is in contrast to the legacy CRTC helpers where this was allowed.}(hjq hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXaAtomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only.h](hRAtomic drivers which need to inspect and adjust more state should instead use the }(hj hhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh= callback, but note that they’re not perfectly equivalent: }(hj hhhNhNubj3 )}(h**mode_valid**h]h mode_valid}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh7 is called from drm_atomic_helper_check_modeset(), but }(hj hhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubho is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hXLAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hj hhhNhNubh)}(h-:c:type:`drm_connector.modes `h]j )}(hj h]hdrm_connector.modes}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubha. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into }(hj hhhNhNubj3 )}(h**mode_valid**h]h mode_valid}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKhj ubh)}(hRETURNS:h]hRETURNS:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKhjx ubj| )}(hX``mode_set`` This callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. h](j )}(h ``mode_set``h]j )}(hj9h]hmode_set}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhj3ubj )}(hhh](h)}(hXThis callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support.h]hXThis callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can’t update other planes it’s incompatible with atomic modeset support.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjOubh)}(h:This callback is only used by CRTC helpers and deprecated.h]h:This callback is only used by CRTC helpers and deprecated.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjOubh)}(hRETURNS:h]hRETURNS:}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjOubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKhjOubeh}(h]h ]h"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]uh1j{ hjNhKhjx ubj| )}(hXZ``mode_set_nofb`` This callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers. Note that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback. This callback is optional. h](j )}(h``mode_set_nofb``h]j )}(hjh]h mode_set_nofb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubj )}(hhh](h)}(hThis callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers.h]hThis callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hXdNote that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback.h](hXMNote that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new “ACTIVE” property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the }(hjhhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hThis callback is optional.h]hThis callback is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjx ubj| )}(hX0``mode_set_base`` This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by the CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. h](j )}(h``mode_set_base``h]j )}(hjh]h mode_set_base}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubj )}(hhh](h)}(hXThis callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support.h](hX8This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the }(hj!hhhNhNubj3 )}(h **mode_set**h]hmode_set}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubh` callback. Since it can’t update other planes it’s incompatible with atomic modeset support.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(h>This callback is only used by the CRTC helpers and deprecated.h]h>This callback is only used by the CRTC helpers and deprecated.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hRETURNS:h]hRETURNS:}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjx ubj| )}(hXd``disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one. NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. h](j )}(h ``disable``h]j )}(hjh]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjzubj )}(hhh](h)}(hXThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own }(hjhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]j )}(hjh]h drm_encoder_helper_funcs.disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhKhjubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjubh)}(hXThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one.h](hXThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjhhhNhNubj3 )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh must be the inverse of }(hjhhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh; for atomic drivers. Atomic drivers should consider to use }(hjhhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh instead of this one.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hNOTE:h]hNOTE:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hjubh)}(hX[With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers).h](hEWith legacy CRTC helpers there’s a big semantic difference between }(hjhhhNhNubj3 )}(h **disable**h]hdisable}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and other hooks (like }(hjhhhNhNubj3 )}(h **prepare**h]hprepare}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh or }(hjhhhNhNubj3 )}(h**dpms**h]hdpms}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh) used to shut down a CRTC: }(hjhhhNhNubj3 )}(h **disable**h]hdisable}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhr is only called when also logically disabling the display pipeline and needs to release any resources acquired in }(hjhhhNhNubj3 )}(h **mode_set**h]hmode_set}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh: (like shared PLLs, or again release pinned framebuffers).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hTherefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic.h](h Therefore }(hjhhhNhNubj3 )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh must be the inverse of }(hjhhhNhNubj3 )}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh plus }(hjhhhNhNubj3 )}(h **commit**h]hcommit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh] for drivers still using legacy CRTC helpers, which is different from the rules under atomic.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjx ubj| )}(hX``atomic_check`` Drivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check(). When using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](j )}(h``atomic_check``h]j )}(hjh]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMKhjubj )}(hhh](h)}(hXfDrivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check().h]hXfDrivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXWhen using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.h](hJWhen using drm_atomic_helper_check_planes() this hook is called after the }(hjhhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]j )}(hjh]h#drm_plane_helper_funcs.atomic_check}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM)hjubhX  hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj.hM)hjubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM0hjubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM7hjubh)}(hNOTE:h]hNOTE:}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM:hjubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in.h]hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM<hjubh)}(hXLAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjuhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]j )}(hjh]hdrm_connector.modes}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM@hjuubha. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into }(hjuhhhNhNubj3 )}(h**mode_valid**h]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubh.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM@hjubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhjubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]j )}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMHhjubh deadlock.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMHhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMKhjx ubj| )}(hX``atomic_begin`` Drivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display. This hook is called before any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](j )}(h``atomic_begin``h]j )}(hj h]h atomic_begin}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM`hjubj )}(hhh](h)}(hDrivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display.h]hDrivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMShj"ubh)}(hAThis hook is called before any plane commit functions are called.h]hAThis hook is called before any plane commit functions are called.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMXhj"ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMZhj"ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM_hj"ubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj!hM`hjx ubj| )}(hXS``atomic_flush`` Drivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates. Simple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates. This hook is called after any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](j )}(h``atomic_flush``h]j )}(hjsh]h atomic_flush}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhjmubj )}(hhh](h)}(hDrivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates.h]hDrivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMghjubh)}(hSimple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates.h]hSimple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMlhjubh)}(h@This hook is called after any plane commit functions are called.h]h@This hook is called after any plane commit functions are called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMphjubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMrhjubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMwhjubeh}(h]h ]h"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]uh1j{ hjhMxhjx ubj| )}(hX;``atomic_enable`` This callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers. This function is optional. h](j )}(h``atomic_enable``h]j )}(hjh]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh](h)}(hXThis callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder’s own }(hjhhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.enable `h]j )}(hj h]hdrm_encoder_helper_funcs.enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj)hMhjubh)}(hX\This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers.h](h` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. This function is optional. h](j )}(h``atomic_disable``h]j )}(hjh]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh](h)}(hXThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own }(hjhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]j )}(hjh]h drm_encoder_helper_funcs.disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level.h]hThis hook is used only by atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the CRTC level.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjx ubj| )}(hXD``get_scanout_position`` Called by vblank timestamping code. Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback. Parameters: crtc: The CRTC. in_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set. vpos: Target location for current vertical scanout position. hpos: Target location for current horizontal scanout position. stime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp. etime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp. mode: Current display timings. Returns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank." Returns: True on success, false if a reliable scanout position counter could not be read out. h](j )}(h``get_scanout_position``h]j )}(hjh]hget_scanout_position}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj )}(hhh](h)}(h#Called by vblank timestamping code.h]h#Called by vblank timestamping code.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hX:Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback.h](hX Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the }(hj;hhhNhNubj3 )}(h'**drm_crtc_funcs.get_vblank_timestamp**h]h#drm_crtc_funcs.get_vblank_timestamp}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubh callback.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(h Parameters:h]h Parameters:}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubjw )}(hhh](j| )}(hcrtc: The CRTC.h](j )}(hcrtc:h]hcrtc:}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjnubj )}(hhh]h)}(h The CRTC.h]h The CRTC.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjkubj| )}(hin_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.h](j )}(hin_vblank_irq:h]hin_vblank_irq:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh]h)}(hTrue when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.h]hTrue when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjkubj| )}(hhpos: Target location for current horizontal scanout position.h](j )}(hhpos:h]hhpos:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh]h)}(h8Target location for current horizontal scanout position.h]h8Target location for current horizontal scanout position.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjkubj| )}(htstime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.h](j )}(hstime:h]hstime:}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj2ubj )}(hhh]h)}(hmTarget location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.h]hmTarget location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMhjEubah}(h]h ]h"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]uh1j{ hjDhMhjkubj| )}(hsetime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.h](j )}(hetime:h]hetime:}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjbubj )}(hhh]h)}(hlTarget location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.h]hlTarget location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]uh1j{ hjthMhjkubj| )}(hmode: Current display timings. h](j )}(hmode:h]hmode:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh]h)}(hCurrent display timings.h]hCurrent display timings.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjkubeh}(h]h ]h"]h$]h&]uh1jv hj)ubh)}(hReturns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank."h]hReturns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means “one scanline until start of active scanout / end of vblank.”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hReturns:h]hReturns:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hTTrue on success, false if a reliable scanout position counter could not be read out.h]hTTrue on success, false if a reliable scanout position counter could not be read out.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hMhjx ubj| )}(hXe``handle_vblank_timeout`` Handles timeouts of the vblank timer. Called by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout. This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h](j )}(h``handle_vblank_timeout``h]j )}(hjh]hhandle_vblank_timeout}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh](h)}(h%Handles timeouts of the vblank timer.h]h%Handles timeouts of the vblank timer.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hCalled by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout.h]hCalled by CRTC’s the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(h`This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h]h`This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjx ubeh}(h]h ]h"]h$]h&]uh1jv hj* ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubh)}(h**Description**h]j3 )}(hjgh]h Description}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjeubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjH hhubh)}(hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.h]hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhK9hjH hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_crtc_helper_add (C function)c.drm_crtc_helper_addhNtauh1j hjH hhhj hNubj )}(hhh](j )}(h[void drm_crtc_helper_add (struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h]j )}(hZvoid drm_crtc_helper_add(struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h](hdesc_sig_keyword_type)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_crtc_helper_addh]j )}(hdrm_crtc_helper_addh]hdrm_crtc_helper_add}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubhdesc_parameterlist)}(hB(struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h](hdesc_parameter)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftype identifier reftargetj modnameN classnameNj j )}j ]j ASTIdentifier)}jjsbc.drm_crtc_helper_addasbuh1hhjubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubhdesc_sig_punctuation)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]pah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h)const struct drm_crtc_helper_funcs *funcsh](j )}(hconsth]hconst}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(hj h]hstruct}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hdrm_crtc_helper_funcsh]hdrm_crtc_helper_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j&c.drm_crtc_helper_addasbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj]ubj )}(hfuncsh]hfuncs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h!sets the helper vtable for a crtch]h!sets the helper vtable for a crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjH hj hNubj) )}(h**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``const struct drm_crtc_helper_funcs *funcs`` helper vtable to set for **crtc**h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hj?h]hstruct drm_crtc *crtc}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj9ubj )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThMhjUubah}(h]h ]h"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]uh1j{ hjThMhj6ubj| )}(hO``const struct drm_crtc_helper_funcs *funcs`` helper vtable to set for **crtc**h](j )}(h-``const struct drm_crtc_helper_funcs *funcs``h]j )}(hjxh]h)const struct drm_crtc_helper_funcs *funcs}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjrubj )}(hhh]h)}(h!helper vtable to set for **crtc**h](hhelper vtable to set for }(hjhhhNhNubj3 )}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj6ubeh}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_encoder_helper_funcs (C struct)c.drm_encoder_helper_funcshNtauh1j hjH hhhj hNubj )}(hhh](j )}(hdrm_encoder_helper_funcsh]j )}(hstruct drm_encoder_helper_funcsh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_encoder_helper_funcsh]j )}(hjh]hdrm_encoder_helper_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hhelper operations for encodersh]hhelper operations for encoders}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j structeh"]h$]h&]j" j j# j:j$ j:j% j& j' uh1j hhhjH hj hNubj) )}(hX4**Definition**:: struct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); }; **Members** ``dpms`` Callback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used. ``mode_valid`` This callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``prepare`` This callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used. ``commit`` This callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used. ``mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers. NOTE: If the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead. ``atomic_mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector. ``detect`` This callback can be used by drivers who want to do detection on the encoder object instead of in connector functions. It is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks. FIXME: This should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it. ``atomic_disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers. This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**. ``atomic_enable`` This callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers. This hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**. ``disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers. For atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below! NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. ``enable`` This callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers. ``atomic_check`` This callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector. Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented. This function is used by the atomic helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjBubh:}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj>ubjN )}(hXstruct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); };h]hXstruct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_commit *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); };}hj_sbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj>ubh)}(h **Members**h]j3 )}(hjph]hMembers}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj>ubjw )}(hhh](j| )}(hXn``dpms`` Callback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used. h](j )}(h``dpms``h]j )}(hjh]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh](h)}(hCallback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms().h]hCallback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hyThis callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used.h](h]This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the }(hjhhhNhNubj3 )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh hook isn’t used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj3 )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hXH``mode_valid`` This callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum h](j )}(h``mode_valid``h]j )}(hjh]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM$hjubj )}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hj3ubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(hThis function is optional.h]hThis function is optional.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(hNOTE:h]hNOTE:}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(hXrSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hjrhhhNhNubj3 )}(h**mode_fixup**h]h mode_fixup}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubh or }(hjrhhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubh.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM"hj3ubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hM$hj3ubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj2hM$hjubj| )}(hXz``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](j )}(h``mode_fixup``h]j )}(hjh]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMOhjubj )}(hhh](h)}(hXThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM,hjubh or a }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjhM,hjubh. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also }(hjhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]j )}(hj>h]hdrm_crtc_state.adjusted_mode}(hj@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjhM,hjubh for more details.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM,hjubh)}(h\This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional.h]h\This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM3hjubh)}(hNOTE:h]hNOTE:}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM6hjubh)}(hXIThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.h]hXKThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM8hjubh)}(hFThis is in contrast to the legacy CRTC helpers where this was allowed.h]hFThis is in contrast to the legacy CRTC helpers where this was allowed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM>hjubh)}(hAtomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**.h](hRAtomic drivers which need to inspect and adjust more state should instead use the }(hjhhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh callback. If }(hjhhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh) is used, this hook isn’t called since }(hjhhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 allows a strict superset of the functionality of }(hjhhhNhNubj3 )}(h**mode_fixup**h]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMAhjubh)}(hXOAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]j )}(hjh]hdrm_connector.modes}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhjubhd. To ensure that modes are filtered consistently put any encoder constraints and limits checks into }(hjhhhNhNubj3 )}(h**mode_valid**h]h mode_valid}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMFhjubh)}(hRETURNS:h]hRETURNS:}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMLhjubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMOhjubj| )}(hX``prepare`` This callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used. h](j )}(h ``prepare``h]j )}(hjlh]hprepare}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM`hjfubj )}(hhh](h)}(hThis callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF.h](hThis callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their }(hjhhhNhNubj3 )}(h**dpms**h]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh hook with DRM_MODE_DPMS_OFF.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMXhjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj3 )}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM]hjubeh}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hjhM`hjubj| )}(hX``commit`` This callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used. h](j )}(h ``commit``h]j )}(hjh]hcommit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMohjubj )}(hhh](h)}(hThis callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON.h](hThis callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their }(hjhhhNhNubj3 )}(h**dpms**h]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh hook with DRM_MODE_DPMS_ON.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMghjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj3 )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMlhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMohjubj| )}(hXF``mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers. NOTE: If the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead. h](j )}(h ``mode_set``h]j )}(hjFh]hmode_set}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubj )}(hhh](h)}(h?This callback is used to update the display mode of an encoder.h]h?This callback is used to update the display mode of an encoder.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMvhj\ubh)}(hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback.h](hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new “ACTIVE” property. Such drivers should instead move all their encoder setup into the }(hjnhhhNhNubj3 )}(h **enable**h]henable}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubh callback.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhj\ubh)}(h{This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers.h]h{This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\ubh)}(hNOTE:h]hNOTE:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\ubh)}(hIf the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead.h](hIf the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, }(hjhhhNhNubj3 )}(h**atomic_mode_set**h]hatomic_mode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh can be used instead.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj\ubeh}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1j{ hj[hMhjubj| )}(hXY``atomic_mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector. h](j )}(h``atomic_mode_set``h]j )}(hjh]hatomic_mode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh](h)}(h?This callback is used to update the display mode of an encoder.h]h?This callback is used to update the display mode of an encoder.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback.h](hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new “ACTIVE” property. Such drivers should instead move all their encoder setup into the }(hjhhhNhNubj3 )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX<This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector.h](hDThis callback is used by the atomic modeset helpers in place of the }(hj)hhhNhNubj3 )}(h **mode_set**h]hmode_set}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)ubhN callback, if set by the driver. It is optional and should be used instead of }(hj)hhhNhNubj3 )}(h **mode_set**h]hmode_set}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)ubh if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hX``detect`` This callback can be used by drivers who want to do detection on the encoder object instead of in connector functions. It is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks. FIXME: This should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it. h](j )}(h ``detect``h]j )}(hjnh]hdetect}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjhubj )}(hhh](h)}(hvThis callback can be used by drivers who want to do detection on the encoder object instead of in connector functions.h]hvThis callback can be used by drivers who want to do detection on the encoder object instead of in connector functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hIt is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks.h]hIt is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn’t use this and instead just implement their own private callbacks.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hFIXME:h]hFIXME:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hnThis should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it.h]hnThis should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hX``atomic_disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers. This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**. h](j )}(h``atomic_disable``h]j )}(hjh]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh](h)}(hXThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder’s CRTC has been shut off using their own }(hjhhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]j )}(hjh]h$drm_crtc_helper_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers.h](hThis callback is a variant of }(hj hhhNhNubj3 )}(h **disable**h]hdisable}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh2 that provides the atomic state to the driver. If }(hj hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh is implemented, }(hj hhhNhNubj3 )}(h **disable**h]hdisable}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh is not called by the helpers.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX'This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**.h](hThis hook is only used by atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjehhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjeubh must be the inverse of }(hjehhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjeubh.}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hXn``atomic_enable`` This callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers. This hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**. h](j )}(h``atomic_enable``h]j )}(hjh]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubj )}(hhh](h)}(hXThis callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](h~This callback should be used to enable the encoder. It is called after this encoder’s CRTC has been enabled using their own }(hjhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]j )}(hjh]h#drm_crtc_helper_funcs.atomic_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers.h](hThis callback is a variant of }(hjhhhNhNubj3 )}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 that provides the atomic state to the driver. If }(hjhhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh is implemented, }(hjhhhNhNubj3 )}(h **enable**h]henable}(hj! hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh is not called by the helpers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXThis hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**.h](h@This hook is only used by atomic helpers, it is the opposite of }(hj: hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hjB hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj: ubh. Atomic drivers don’t need to implement it if there’s no need to enable anything at the encoder level. To ensure that runtime PM handling works }(hj: hhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hjT hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj: ubh must be the inverse of }(hj: hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj: ubh.}(hj: hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hXw``disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers. For atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below! NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. h](j )}(h ``disable``h]j )}(hj h]hdisable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj )}(hhh](h)}(hXThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder’s CRTC has been shut off using their own }(hj hhhNhNubh)}(h?:c:type:`drm_crtc_helper_funcs.disable `h]j )}(hj h]hdrm_crtc_helper_funcs.disable}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubh)}(hXDThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers.h](hX This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hj hhhNhNubj3 )}(h **disable**h]hdisable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh must be the inverse of }(hj hhhNhNubj3 )}(h **enable**h]henable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh for atomic drivers.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hiFor atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below!h](h!For atomic drivers also consider }(hj!hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubh6 and save yourself from having to read the NOTE below!}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hNOTE:h]hNOTE:}(hj0!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hX^With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers).h](hEWith legacy CRTC helpers there’s a big semantic difference between }(hj?!hhhNhNubj3 )}(h **disable**h]hdisable}(hjG!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?!ubh and other hooks (like }(hj?!hhhNhNubj3 )}(h **prepare**h]hprepare}(hjY!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?!ubh or }(hj?!hhhNhNubj3 )}(h**dpms**h]hdpms}(hjk!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?!ubh) used to shut down a encoder: }(hj?!hhhNhNubj3 )}(h **disable**h]hdisable}(hj}!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?!ubhr is only called when also logically disabling the display pipeline and needs to release any resources acquired in }(hj?!hhhNhNubj3 )}(h **mode_set**h]hmode_set}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?!ubh: (like shared PLLs, or again release pinned framebuffers).}(hj?!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hTherefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic.h](h Therefore }(hj!hhhNhNubj3 )}(h **disable**h]hdisable}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubh must be the inverse of }(hj!hhhNhNubj3 )}(h **mode_set**h]hmode_set}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubh plus }(hj!hhhNhNubj3 )}(h **commit**h]hcommit}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubh] for drivers still using legacy CRTC helpers, which is different from the rules under atomic.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj ubeh}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(hX``enable`` This callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers. h](j )}(h ``enable``h]j )}(hj!h]henable}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubj )}(hhh](h)}(hXThis callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to enable the encoder. With the atomic drivers it is called after this encoder’s CRTC has been enabled using their own }(hj"hhhNhNubh)}(h>:c:type:`drm_crtc_helper_funcs.enable `h]j )}(hj""h]hdrm_crtc_helper_funcs.enable}(hj$"hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj "ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"ubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?"hMhj"ubh)}(hXNThis hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers.h](h@This hook is only used by atomic helpers, it is the opposite of }(hjJ"hhhNhNubj3 )}(h **disable**h]hdisable}(hjR"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJ"ubh. Atomic drivers don’t need to implement it if there’s no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjJ"hhhNhNubj3 )}(h **enable**h]henable}(hjd"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJ"ubh must be the inverse of }(hjJ"hhhNhNubj3 )}(h **disable**h]hdisable}(hjv"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJ"ubh for atomic drivers.}(hjJ"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"ubeh}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj"hMhjubj| )}(hX``atomic_check`` This callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector. Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented. This function is used by the atomic helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](j )}(h``atomic_check``h]j )}(hj"h]h atomic_check}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM8hj"ubj )}(hhh](h)}(hXThis callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector.h]hXThis callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"ubh)}(hX Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented.h](h>Since this provides a strict superset of the functionality of }(hj"hhhNhNubj3 )}(h**mode_fixup**h]h mode_fixup}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubhL (the requested and adjusted modes are both available through the passed in }(hj"hhhNhNubh)}(h0:c:type:`struct drm_crtc_state `h]j )}(hj"h]hstruct drm_crtc_state}(hj"hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hj"ubh) }(hj"hhhNhNubj3 )}(h**mode_fixup**h]h mode_fixup}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubh is not called when }(hj"hhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubh is implemented.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hM hj"ubh)}(h@This function is used by the atomic helpers, but it is optional.h]h@This function is used by the atomic helpers, but it is optional.}(hj1#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM%hj"ubh)}(hNOTE:h]hNOTE:}(hj@#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM'hj"ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure.h](hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall }(hjO#hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]j )}(hjY#h]hdrm_atomic_commit}(hj[#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjW#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM)hjO#ubh update tracking structure.}(hjO#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjv#hM)hj"ubh)}(hXOAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hj#hhhNhNubh)}(h-:c:type:`drm_connector.modes `h]j )}(hj#h]hdrm_connector.modes}(hj#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM.hj#ubhd. To ensure that modes are filtered consistently put any encoder constraints and limits checks into }(hj#hhhNhNubj3 )}(h**mode_valid**h]h mode_valid}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubh.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hM.hj"ubh)}(hRETURNS:h]hRETURNS:}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM4hj"ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj#hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]j )}(hj#h]hdrm_modeset_lock}(hj#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM6hj#ubh deadlock.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hM6hj"ubeh}(h]h ]h"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]uh1j{ hj"hM8hjubeh}(h]h ]h"]h$]h&]uh1jv hj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubh)}(h**Description**h]j3 )}(hj!$h]h Description}(hj#$hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM<hjH hhubh)}(hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.h]hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.}(hj7$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjH hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_encoder_helper_add (C function)c.drm_encoder_helper_addhNtauh1j hjH hhhj hNubj )}(hhh](j )}(hgvoid drm_encoder_helper_add (struct drm_encoder *encoder, const struct drm_encoder_helper_funcs *funcs)h]j )}(hfvoid drm_encoder_helper_add(struct drm_encoder *encoder, const struct drm_encoder_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hj_$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[$hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMBubj )}(h h]h }(hjn$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[$hhhjm$hMBubj )}(hdrm_encoder_helper_addh]j )}(hdrm_encoder_helper_addh]hdrm_encoder_helper_add}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[$hhhjm$hMBubj)}(hK(struct drm_encoder *encoder, const struct drm_encoder_helper_funcs *funcs)h](j)}(hstruct drm_encoder *encoderh](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(h drm_encoderh]h drm_encoder}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j%)}jj$sbc.drm_encoder_helper_addasbuh1hhj$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj9)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj$ubj )}(hencoderh]hencoder}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj$ubj)}(h,const struct drm_encoder_helper_funcs *funcsh](j )}(hjch]hconst}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %ubj )}(hj h]hstruct}(hj)%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %ubj )}(h h]h }(hj6%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %ubh)}(hhh]j )}(hdrm_encoder_helper_funcsh]hdrm_encoder_helper_funcs}(hjG%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjD%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjI%modnameN classnameNj j )}j ]j$c.drm_encoder_helper_addasbuh1hhj %ubj )}(h h]h }(hje%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %ubj9)}(hjOh]h*}(hjs%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj %ubj )}(hfuncsh]hfuncs}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj$ubeh}(h]h ]h"]h$]h&]j j uh1jhj[$hhhjm$hMBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjW$hhhjm$hMBubah}(h]jR$ah ](j j eh"]h$]h&]j j )j huh1j hjm$hMBhjT$hhubj )}(hhh]h)}(h%sets the helper vtable for an encoderh]h%sets the helper vtable for an encoder}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMBhj%hhubah}(h]h ]h"]h$]h&]uh1j hjT$hhhjm$hMBubeh}(h]h ](j functioneh"]h$]h&]j" j j# j%j$ j%j% j& j' uh1j hhhjH hj hNubj) )}(h**Parameters** ``struct drm_encoder *encoder`` DRM encoder ``const struct drm_encoder_helper_funcs *funcs`` helper vtable to set for **encoder**h](h)}(h**Parameters**h]j3 )}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhj%ubjw )}(hhh](j| )}(h,``struct drm_encoder *encoder`` DRM encoder h](j )}(h``struct drm_encoder *encoder``h]j )}(hj%h]hstruct drm_encoder *encoder}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMChj%ubj )}(hhh]h)}(h DRM encoderh]h DRM encoder}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMChj&ubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hMChj%ubj| )}(hU``const struct drm_encoder_helper_funcs *funcs`` helper vtable to set for **encoder**h](j )}(h0``const struct drm_encoder_helper_funcs *funcs``h]j )}(hj$&h]h,const struct drm_encoder_helper_funcs *funcs}(hj&&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"&ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMEhj&ubj )}(hhh]h)}(h$helper vtable to set for **encoder**h](hhelper vtable to set for }(hj=&hhhNhNubj3 )}(h **encoder**h]hencoder}(hjE&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=&ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMDhj:&ubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1j{ hj9&hMEhj%ubeh}(h]h ]h"]h$]h&]uh1jv hj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_connector_helper_funcs (C struct)c.drm_connector_helper_funcshNtauh1j hjH hhhj hNubj )}(hhh](j )}(hdrm_connector_helper_funcsh]j )}(h!struct drm_connector_helper_funcsh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMIubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&hhhj&hMIubj )}(hdrm_connector_helper_funcsh]j )}(hj&h]hdrm_connector_helper_funcs}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&hhhj&hMIubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj&hhhj&hMIubah}(h]j&ah ](j j eh"]h$]h&]j j )j huh1j hj&hMIhj&hhubj )}(hhh]h)}(h helper operations for connectorsh]h helper operations for connectors}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMMhj&hhubah}(h]h ]h"]h$]h&]uh1j hj&hhhj&hMIubeh}(h]h ](j structeh"]h$]h&]j" j j# j&j$ j&j% j& j' uh1j hhhjH hj hNubj) )}(hXX0**Definition**:: struct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_commit *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); }; **Members** ``get_modes`` This function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property(). The usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in. Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case. Virtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode(). This function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline. This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes(). To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes. ``detect_ctx`` Check to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing. This callback is optional, if not implemented the connector will be considered as always being attached. This is the atomic version of :c:type:`drm_connector_funcs.detect `. To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required. RETURNS: :c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK. ``mode_valid`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional. NOTE: This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here. To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. ``mode_valid_ctx`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `. To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required. Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state. Returns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise. ``best_encoder`` This function should select the best encoder for the given connector. This function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers. NOTE: In atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**. You can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. ``atomic_best_encoder`` This is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically. This function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL). NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure passed in. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. ``atomic_check`` This hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced. Because :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_commit`` This hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `. This hook is optional. This callback is used by the atomic modeset helpers. ``prepare_writeback_job`` As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only. This operation is optional. This callback is used by the atomic modeset helpers. ``cleanup_writeback_job`` This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes. This operation is optional. This callback is used by the atomic modeset helpers. ``enable_hpd`` Enable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_enable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced. ``disable_hpd`` Disable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_disable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubh:}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMQhj&ubjN )}(hXstruct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_commit *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); };h]hXstruct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_commit *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_commit *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); };}hj 'sbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMShj&ubh)}(h **Members**h]j3 )}(hj'h]hMembers}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj'ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMbhj&ubjw )}(hhh](j| )}(hX``get_modes`` This function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property(). The usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in. Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case. Virtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode(). This function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline. This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes(). To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes. h](j )}(h ``get_modes``h]j )}(hj;'h]h get_modes}(hj='hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9'ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM{hj5'ubj )}(hhh](h)}(hThis function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property().h](hMThis function should fill in all modes currently valid for the sink into the }(hjT'hhhNhNubh)}(h4:c:type:`drm_connector.probed_modes `h]j )}(hj^'h]hdrm_connector.probed_modes}(hj`'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj\'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMUhjT'ubh_ list. It should also update the EDID property by calling drm_connector_update_edid_property().}(hjT'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{'hMUhjQ'ubh)}(hXNThe usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in.h](hXThe usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the }(hj'hhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]j )}(hj'h]hdrm_connector.display_info}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMYhj'ubh, }(hj'hhhNhNubh)}(h0:c:type:`drm_connector.width_mm `h]j )}(hj'h]hdrm_connector.width_mm}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj'hMYhj'ubh and }(hj'hhhNhNubh)}(h1:c:type:`drm_connector.height_mm `h]j )}(hj'h]hdrm_connector.height_mm}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj'hMYhj'ubh fields are filled in.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hMYhjQ'ubh)}(hX.Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case.h]hX.Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMchjQ'ubh)}(hVirtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode().h]hVirtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode().}(hj (hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMihjQ'ubh)}(hThis function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline.h](h'This function is only called after the }(hj(hhhNhNubj3 )}(h **detect**h]hdetect}(hj$(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(ubhz hook has indicated that a sink is connected and when the EDID isn’t overridden through sysfs or the kernel commandline.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMmhjQ'ubh)}(h]This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes().h]h]This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes().}(hj=(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMqhjQ'ubh)}(hTo avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `.h](hgTo avoid races with concurrent connector state updates, the helper libraries always call this with the }(hjL(hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]j )}(hjV(h]h drm_mode_config.connection_mutex}(hjX(hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjT(ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMthjL(ubh. held. Because of this it’s safe to inspect }(hjL(hhhNhNubh)}(h.:c:type:`drm_connector->state `h]j )}(hjz(h]hdrm_connector->state}(hj|(hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjx(ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjs(hMthjL(ubh.}(hjL(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjs(hMthjQ'ubh)}(hRETURNS:h]hRETURNS:}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhjQ'ubh)}(h|The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes.h]h|The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMzhjQ'ubeh}(h]h ]h"]h$]h&]uh1j hj5'ubeh}(h]h ]h"]h$]h&]uh1j{ hjP'hM{hj2'ubj| )}(hX``detect_ctx`` Check to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing. This callback is optional, if not implemented the connector will be considered as always being attached. This is the atomic version of :c:type:`drm_connector_funcs.detect `. To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required. RETURNS: :c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK. h](j )}(h``detect_ctx``h]j )}(hj(h]h detect_ctx}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubj )}(hhh](h)}(hXCheck to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing.h]hXCheck to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(hhThis callback is optional, if not implemented the connector will be considered as always being attached.h]hhThis callback is optional, if not implemented the connector will be considered as always being attached.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(hYThis is the atomic version of :c:type:`drm_connector_funcs.detect `.h](hThis is the atomic version of }(hj)hhhNhNubh)}(h::c:type:`drm_connector_funcs.detect `h]j )}(hj)h]hdrm_connector_funcs.detect}(hj)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/)hMhj(ubh)}(hX1To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required.h](hTo avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and }(hj:)hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]j )}(hjD)h]h drm_mode_config.connection_mutex}(hjF)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjB)ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj:)ubho will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required.}(hj:)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhja)hMhj(ubh)}(hRETURNS:h]hRETURNS:}(hjl)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(h}:c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK.h](h)}(h:c:type:`drm_connector_status`h]j )}(hj)h]hdrm_connector_status}(hj)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_statusuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj{)ubha indicating the connector’s status, or the error code returned by drm_modeset_lock(), -EDEADLK.}(hj{)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj)hMhj(ubeh}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hMhj2'ubj| )}(hX``mode_valid`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional. NOTE: This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here. To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. h](j )}(h``mode_valid``h]j )}(hj)h]h mode_valid}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubj )}(hhh](h)}(h`Callback to validate a mode for a connector, irrespective of the specific display configuration.h]h`Callback to validate a mode for a connector, irrespective of the specific display configuration.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().h]hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hThis function is optional.h]hThis function is optional.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hNOTE:h]hNOTE:}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hXThis only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here.h](h]This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to }(hj*hhhNhNubh)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]j )}(hj*h]h#drm_encoder_helper_funcs.mode_valid}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj*ubh, }(hj*hhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]j )}(hj>*h]h drm_crtc_helper_funcs.mode_valid}(hj@*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj<*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhj7*hMhj*ubh and }(hj*hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]j )}(hja*h]hdrm_bridge_funcs.mode_valid}(hjc*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj_*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj7*hMhj*ubhX, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen’s EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7*hMhj)ubh)}(hTo avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `.h](hgTo avoid races with concurrent connector state updates, the helper libraries always call this with the }(hj*hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]j )}(hj*h]h drm_mode_config.connection_mutex}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj*ubh. held. Because of this it’s safe to inspect }(hj*hhhNhNubh)}(h.:c:type:`drm_connector->state `h]j )}(hj*h]hdrm_connector->state}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj*hMhj*ubh.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*hMhj)ubh)}(hRETURNS:h]hRETURNS:}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)ubh)}(hEither :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `.h](hEither }(hj*hhhNhNubh)}(h3:c:type:`drm_mode_status.MODE_OK `h]j )}(hj*h]hdrm_mode_status.MODE_OK}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj*ubh" or one of the failure reasons in }(hj*hhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]j )}(hj+h]henum drm_mode_status}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhj+hMhj*ubh.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hMhj)ubeh}(h]h ]h"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]uh1j{ hj)hMhj2'ubj| )}(hX,``mode_valid_ctx`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `. To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required. Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state. Returns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise. h](j )}(h``mode_valid_ctx``h]j )}(hjS+h]hmode_valid_ctx}(hjU+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQ+ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjM+ubj )}(hhh](h)}(h`Callback to validate a mode for a connector, irrespective of the specific display configuration.h]h`Callback to validate a mode for a connector, irrespective of the specific display configuration.}(hjl+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhji+ubh)}(hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().h]hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().}(hj{+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhji+ubh)}(hThis function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `.h](h8This function is optional, and is the atomic version of }(hj+hhhNhNubh)}(hL:c:type:`drm_connector_helper_funcs.mode_valid `h]j )}(hj+h]h%drm_connector_helper_funcs.mode_valid}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj+ubh.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hMhji+ubh)}(hX9To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required.h](hTo allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and }(hj+hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]j )}(hj+h]h drm_mode_config.connection_mutex}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj+ubh5 will always be locked with the ctx parameter set to }(hj+hhhNhNubj3 )}(h**ctx**h]hctx}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubh6. This allows for taking additional locks as required.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hMhji+ubh)}(hXWEven though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state.h]hX[Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver’s atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn’t be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhji+ubh)}(hReturns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise.h](hReturns: 0 if }(hj,hhhNhNubh)}(hP:c:type:`drm_connector_helper_funcs.mode_valid_ctx `h]j )}(hj,h]h)drm_connector_helper_funcs.mode_valid_ctx}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh succeeded and wrote the }(hj,hhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]j )}(hj=,h]henum drm_mode_status}(hj?,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj;,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhj6,hMhj,ubh value to }(hj,hhhNhNubj3 )}(h **status**h]hstatus}(hj^,hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj,ubh%, or a negative error code otherwise.}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj6,hMhji+ubeh}(h]h ]h"]h$]h&]uh1j hjM+ubeh}(h]h ]h"]h$]h&]uh1j{ hjh+hMhj2'ubj| )}(hX``best_encoder`` This function should select the best encoder for the given connector. This function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers. NOTE: In atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**. You can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. h](j )}(h``best_encoder``h]j )}(hj,h]h best_encoder}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubj )}(hhh](h)}(hEThis function should select the best encoder for the given connector.h]hEThis function should select the best encoder for the given connector.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh)}(hThis function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers.h]hThis function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh)}(hNOTE:h]hNOTE:}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh)}(hXIn atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**.h](hIn atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use }(hj,hhhNhNubj3 )}(h**atomic_best_encoder**h]hatomic_best_encoder}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj,ubh.}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh)}(hYou can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you.h]hYou can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh)}(hRETURNS:h]hRETURNS:}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh)}(hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this.h]hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren’t used twice, drivers should not check for this.}(hj -hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubeh}(h]h ]h"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]uh1j{ hj,hMhj2'ubj| )}(hX6``atomic_best_encoder`` This is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically. This function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL). NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure passed in. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. h](j )}(h``atomic_best_encoder``h]j )}(hj.-h]hatomic_best_encoder}(hj0-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,-ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(-ubj )}(hhh](h)}(hThis is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically.h](hThis is the atomic version of }(hjG-hhhNhNubj3 )}(h**best_encoder**h]h best_encoder}(hjO-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjG-ubh for atomic drivers which need to select the best encoder depending upon the desired configuration and can’t select it statically.}(hjG-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hjD-ubh)}(hThis function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL).h](hpThis function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to }(hjh-hhhNhNubj3 )}(h**best_encoder**h]h best_encoder}(hjp-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjh-ubh+ (or drm_connector_get_single_encoder() if }(hjh-hhhNhNubj3 )}(h**best_encoder**h]h best_encoder}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjh-ubh is NULL).}(hjh-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjD-ubh)}(hNOTE:h]hNOTE:}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjD-ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure passed in.h](h|This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the }(hj-hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]j )}(hj-h]hdrm_atomic_commit}(hj-hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj-ubh% update tracking structure passed in.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMhjD-ubh)}(hRETURNS:h]hRETURNS:}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjD-ubh)}(hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this.h]hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren’t used twice, drivers should not check for this.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjD-ubeh}(h]h ]h"]h$]h&]uh1j hj(-ubeh}(h]h ]h"]h$]h&]uh1j{ hjC-hMhj2'ubj| )}(hX``atomic_check`` This hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced. Because :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](j )}(h``atomic_check``h]j )}(hj .h]h atomic_check}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj .ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM?hj.ubj )}(hhh](h)}(hThis hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced.h](hLThis hook is used to validate connector state. This function is called from }(hj%.hhhNhNubh)}(h):c:type:`drm_atomic_helper_check_modeset`h]j )}(hj/.h]hdrm_atomic_helper_check_modeset}(hj1.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj-.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_helper_check_modesetuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM%hj%.ubhU, and is called when a connector property is set, or a modeset on the crtc is forced.}(hj%.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjL.hM%hj".ubh)}(hBecause :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well.h](hBecause }(hjW.hhhNhNubh)}(h):c:type:`drm_atomic_helper_check_modeset`h]j )}(hja.h]hdrm_atomic_helper_check_modeset}(hjc.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj_.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_helper_check_modesetuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM)hjW.ubh_ may be called multiple times, this function should handle being called multiple times as well.}(hjW.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj~.hM)hj".ubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM,hj".ubh)}(hNOTE:h]hNOTE:}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM3hj".ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_commit` update tracking structure.h](hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall }(hj.hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]j )}(hj.h]hdrm_atomic_commit}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM5hj.ubh update tracking structure.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj.hM5hj".ubh)}(hRETURNS:h]hRETURNS:}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM:hj".ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj.hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]j )}(hj.h]hdrm_modeset_lock}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM<hj.ubh deadlock.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/hM<hj".ubeh}(h]h ]h"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]uh1j{ hj!.hM?hj2'ubj| )}(hXt``atomic_commit`` This hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `. This hook is optional. This callback is used by the atomic modeset helpers. h](j )}(h``atomic_commit``h]j )}(hj,/h]h atomic_commit}(hj./hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*/ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhj&/ubj )}(hhh](h)}(hXThis hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `.h](hThis hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in }(hjE/hhhNhNubh)}(hA:c:type:`drm_connector_state.writeback_job `h]j )}(hjO/h]h!drm_connector_state.writeback_job}(hjQ/hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjM/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMGhjE/ubh.}(hjE/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjl/hMGhjB/ubh)}(hThis hook is optional.h]hThis hook is optional.}(hjw/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMLhjB/ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjA/hMNhjB/ubeh}(h]h ]h"]h$]h&]uh1j hj&/ubeh}(h]h ]h"]h$]h&]uh1j{ hjA/hMNhj2'ubj| )}(hX``prepare_writeback_job`` As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only. This operation is optional. This callback is used by the atomic modeset helpers. h](j )}(h``prepare_writeback_job``h]j )}(hj/h]hprepare_writeback_job}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM_hj/ubj )}(hhh](h)}(hX|As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only.h](hXJAs writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct }(hj/hhhNhNubh)}(h!:c:type:`drm_writeback_connector`h]j )}(hj/h]hdrm_writeback_connector}(hj/hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_writeback_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMVhj/ubh connectors only.}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/hMVhj/ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM]hj/ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM_hj/ubeh}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hj/hM_hj2'ubj| )}(hX{``cleanup_writeback_job`` This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes. This operation is optional. This callback is used by the atomic modeset helpers. h](j )}(h``cleanup_writeback_job``h]j )}(hj 0h]hcleanup_writeback_job}(hj"0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMnhj0ubj )}(hhh](h)}(hX This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes.h]hX This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes.}(hj90hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMfhj60ubh)}(hThis operation is optional.h]hThis operation is optional.}(hjH0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMlhj60ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hjW0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj50hMnhj60ubeh}(h]h ]h"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]uh1j{ hj50hMnhj2'ubj| )}(hXD``enable_hpd`` Enable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_enable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced. h](j )}(h``enable_hpd``h]j )}(hjw0h]h enable_hpd}(hjy0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hju0ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM~hjq0ubj )}(hhh](h)}(h,Enable hot-plug detection for the connector.h]h,Enable hot-plug detection for the connector.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMvhj0ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMxhj0ubh)}(hBThis callback is used by the drm_kms_helper_poll_enable() helpers.h]hBThis callback is used by the drm_kms_helper_poll_enable() helpers.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMzhj0ubh)}(hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h]hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM|hj0ubeh}(h]h ]h"]h$]h&]uh1j hjq0ubeh}(h]h ]h"]h$]h&]uh1j{ hj0hM~hj2'ubj| )}(hXF``disable_hpd`` Disable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_disable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h](j )}(h``disable_hpd``h]j )}(hj0h]h disable_hpd}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubj )}(hhh](h)}(h-Disable hot-plug detection for the connector.h]h-Disable hot-plug detection for the connector.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh)}(hCThis callback is used by the drm_kms_helper_poll_disable() helpers.h]hCThis callback is used by the drm_kms_helper_poll_disable() helpers.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh)}(hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h]hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.}(hj$1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubeh}(h]h ]h"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]uh1j{ hj0hMhj2'ubeh}(h]h ]h"]h$]h&]uh1jv hj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubh)}(h**Description**h]j3 )}(hjN1h]h Description}(hjP1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjL1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjH hhubh)}(h[These functions are used by the atomic and legacy modeset helpers and by the probe helpers.h]h[These functions are used by the atomic and legacy modeset helpers and by the probe helpers.}(hjd1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhjH hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_connector_helper_add (C function)c.drm_connector_helper_addhNtauh1j hjH hhhj hNubj )}(hhh](j )}(hovoid drm_connector_helper_add (struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h]j )}(hnvoid drm_connector_helper_add(struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1hhhj1hMubj )}(hdrm_connector_helper_addh]j )}(hdrm_connector_helper_addh]hdrm_connector_helper_add}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj1hhhj1hMubj)}(hQ(struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j%)}jj1sbc.drm_connector_helper_addasbuh1hhj1ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj9)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj1ubj )}(h connectorh]h connector}(hj"2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(h.const struct drm_connector_helper_funcs *funcsh](j )}(hjch]hconst}(hj;2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj72ubj )}(h h]h }(hjH2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj72ubj )}(hj h]hstruct}(hjV2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj72ubj )}(h h]h }(hjc2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj72ubh)}(hhh]j )}(hdrm_connector_helper_funcsh]hdrm_connector_helper_funcs}(hjt2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjv2modnameN classnameNj j )}j ]j2c.drm_connector_helper_addasbuh1hhj72ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj72ubj9)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj72ubj )}(hfuncsh]hfuncs}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj72ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhj1hhhj1hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj1hhhj1hMubah}(h]j1ah ](j j eh"]h$]h&]j j )j huh1j hj1hMhj1hhubj )}(hhh]h)}(h&sets the helper vtable for a connectorh]h&sets the helper vtable for a connector}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj2hhubah}(h]h ]h"]h$]h&]uh1j hj1hhhj1hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j2j$ j2j% j& j' uh1j hhhjH hj hNubj) )}(h**Parameters** ``struct drm_connector *connector`` DRM connector ``const struct drm_connector_helper_funcs *funcs`` helper vtable to set for **connector**h](h)}(h**Parameters**h]j3 )}(hj2h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj2ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj2ubjw )}(hhh](j| )}(h2``struct drm_connector *connector`` DRM connector h](j )}(h#``struct drm_connector *connector``h]j )}(hj3h]hstruct drm_connector *connector}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubj )}(hhh]h)}(h DRM connectorh]h DRM connector}(hj13hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-3hMhj.3ubah}(h]h ]h"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]uh1j{ hj-3hMhj3ubj| )}(hY``const struct drm_connector_helper_funcs *funcs`` helper vtable to set for **connector**h](j )}(h2``const struct drm_connector_helper_funcs *funcs``h]j )}(hjQ3h]h.const struct drm_connector_helper_funcs *funcs}(hjS3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjO3ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjK3ubj )}(hhh]h)}(h&helper vtable to set for **connector**h](hhelper vtable to set for }(hjj3hhhNhNubj3 )}(h **connector**h]h connector}(hjr3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjj3ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjg3ubah}(h]h ]h"]h$]h&]uh1j hjK3ubeh}(h]h ]h"]h$]h&]uh1j{ hjf3hMhj3ubeh}(h]h ]h"]h$]h&]uh1jv hj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_plane_helper_funcs (C struct)c.drm_plane_helper_funcshNtauh1j hjH hhhj hNubj )}(hhh](j )}(hdrm_plane_helper_funcsh]j )}(hstruct drm_plane_helper_funcsh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhj3hMubj )}(hdrm_plane_helper_funcsh]j )}(hj3h]hdrm_plane_helper_funcs}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhj3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhj3hMubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j hj3hMhj3hhubj )}(hhh]h)}(hhelper operations for planesh]hhelper operations for planes}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj3hhubah}(h]h ]h"]h$]h&]uh1j hj3hhhj3hMubeh}(h]h ](j structeh"]h$]h&]j" j j# j4j$ j4j% j& j' uh1j hhhjH hj hNubj) )}(hX"/**Definition**:: struct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_commit *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); }; **Members** ``prepare_fb`` This hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches. This function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. The resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit. The helpers will call **cleanup_fb** with matching arguments for every successful call to this hook. This callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources. RETURNS: 0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully. ``cleanup_fb`` This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**. This callback is used by the atomic modeset helpers, but it is optional. ``begin_fb_access`` This hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**. For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. The callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip. Returns: 0 on success, or a negative errno code otherwise. ``end_fb_access`` This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state. ``atomic_check`` Drivers should check plane specific constraints in this hook. When using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_update`` Drivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_enable`` Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**. ``atomic_disable`` Drivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented. This hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**. ``atomic_async_check`` Drivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized". This hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update. This function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip. RETURNS: Return 0 on success and any error returned indicates that the update can not be applied in asynchronous manner. ``atomic_async_update`` Drivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized". This hook is called by drm_atomic_helper_async_commit(). An async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane. When doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state. Drivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit. FIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. ``get_scanout_buffer`` Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned. Return: ``0`` on success, negative errno on failure. ``panic_flush`` It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubh:}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubjN )}(hXstruct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_commit *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); };h]hXstruct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_commit *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_commit *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); };}hj84sbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubh)}(h **Members**h]j3 )}(hjI4h]hMembers}(hjK4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjG4ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubjw )}(hhh](j| )}(hX``prepare_fb`` This hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches. This function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. The resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit. The helpers will call **cleanup_fb** with matching arguments for every successful call to this hook. This callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources. RETURNS: 0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully. h](j )}(h``prepare_fb``h]j )}(hjh4h]h prepare_fb}(hjj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjf4ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjb4ubj )}(hhh](h)}(hThis hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches.h]hThis hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj~4ubh)}(hXThis function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure.h](hThis function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the }(hj4hhhNhNubh)}(h1:c:type:`drm_plane_state.fence `h]j )}(hj4h]hdrm_plane_state.fence}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubh of the passed-in }(hj4hhhNhNubh)}(h:c:type:`drm_plane_state`h]j )}(hj4h]hdrm_plane_state}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_stateuh1hhj4hMhj4ubh. If the driver doesn’t support native fences then equivalent functionality should be implemented through private members in the plane structure.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hMhj~4ubh)}(hXFor GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook.h](h#For GEM drivers who neither have a }(hj4hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubh nor }(hj4hhhNhNubj3 )}(h**cleanup_fb**h]h cleanup_fb}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubh hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their }(hj4hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubh hook.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj~4ubh)}(hXThe resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit.h](hThe resources acquired in }(hj*5hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hj25hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*5ubhw persist after the end of the atomic commit. Resources that can be release at the commit’s end should be acquired in }(hj*5hhhNhNubj3 )}(h**begin_fb_access**h]hbegin_fb_access}(hjD5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*5ubh and released in }(hj*5hhhNhNubj3 )}(h**end_fb_access**h]h end_fb_access}(hjV5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*5ubh;. For example, a GEM buffer’s pin operation belongs into }(hj*5hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hjh5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*5ubhh to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into }(hj*5hhhNhNubj3 )}(h**begin_fb_access**h]hbegin_fb_access}(hjz5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*5ubhE, so that atomic helpers remove the mapping at the end of the commit.}(hj*5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj~4ubh)}(hdThe helpers will call **cleanup_fb** with matching arguments for every successful call to this hook.h](hThe helpers will call }(hj5hhhNhNubj3 )}(h**cleanup_fb**h]h cleanup_fb}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5ubh@ with matching arguments for every successful call to this hook.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj~4ubh)}(hThis callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources.h](hMThis callback is used by the atomic modeset helpers, but it is optional. See }(hj5hhhNhNubj3 )}(h**begin_fb_access**h]hbegin_fb_access}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5ubh$ for preparing per-commit resources.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj~4ubh)}(hRETURNS:h]hRETURNS:}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj~4ubh)}(hX0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully.h](hI0 on success or one of the following negative error codes allowed by the }(hj5hhhNhNubh)}(hE:c:type:`drm_mode_config_funcs.atomic_commit `h]j )}(hj5h]h#drm_mode_config_funcs.atomic_commit}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj5ubh vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj 6hMhj~4ubeh}(h]h ]h"]h$]h&]uh1j hjb4ubeh}(h]h ]h"]h$]h&]uh1j{ hj}4hMhj_4ubj| )}(h``cleanup_fb`` This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**. This callback is used by the atomic modeset helpers, but it is optional. h](j )}(h``cleanup_fb``h]j )}(hj(6h]h cleanup_fb}(hj*6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&6ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj"6ubj )}(hhh](h)}(h|This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**.h](hmThis hook is called to clean up any resources allocated for the given framebuffer and plane configuration in }(hjA6hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hjI6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjA6ubh.}(hjA6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj>6ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hjb6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj>6ubeh}(h]h ]h"]h$]h&]uh1j hj"6ubeh}(h]h ]h"]h$]h&]uh1j{ hj=6hMhj_4ubj| )}(hX!``begin_fb_access`` This hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**. For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. The callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip. Returns: 0 on success, or a negative errno code otherwise. h](j )}(h``begin_fb_access``h]j )}(hj6h]hbegin_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj}6ubj )}(hhh](h)}(hThis hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**.h](hPThis hook prepares the plane for access during an atomic commit. In contrast to }(hj6hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubh, resources acquired in }(hj6hhhNhNubj3 )}(h**begin_fb_access**h]hbegin_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubh2, are released at the end of the atomic commit in }(hj6hhhNhNubj3 )}(h**end_fb_access**h]h end_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubh.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj6ubh)}(hX.For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit.h](hWFor example, with shadow-plane helpers, the GEM buffer’s vmap operation belongs into }(hj6hhhNhNubj3 )}(h**begin_fb_access**h]hbegin_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubhM, so that the buffer’s memory will be unmapped at the end of the commit in }(hj6hhhNhNubj3 )}(h**end_fb_access**h]h end_fb_access}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubh2. But a GEM buffer’s pin operation belongs into }(hj6hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hj 7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubh, to keep the buffer pinned after the commit.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj6ubh)}(hThe callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip.h](hLThe callback is used by the atomic modeset helpers, but it is optional. See }(hj&7hhhNhNubj3 )}(h**end_fb_cleanup**h]hend_fb_cleanup}(hj.7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&7ubh for undoing the effects of }(hj&7hhhNhNubj3 )}(h**begin_fb_access**h]hbegin_fb_access}(hj@7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&7ubh and }(hj&7hhhNhNubj3 )}(h**prepare_fb**h]h prepare_fb}(hjR7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&7ubh1 for acquiring resources until the next pageflip.}(hj&7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj6ubh)}(h:Returns: 0 on success, or a negative errno code otherwise.h]h:Returns: 0 on success, or a negative errno code otherwise.}(hjk7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj6ubeh}(h]h ]h"]h$]h&]uh1j hj}6ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMhj_4ubj| )}(h``end_fb_access`` This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state. h](j )}(h``end_fb_access``h]j )}(hj7h]h end_fb_access}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubj )}(hhh]h)}(h|This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state.h](h+This hook cleans up resources allocated by }(hj7hhhNhNubj3 )}(h**begin_fb_access**h]hbegin_fb_access}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubh>. It it called at the end of a commit for the new plane state.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubah}(h]h ]h"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]uh1j{ hj7hMhj_4ubj| )}(hX0``atomic_check`` Drivers should check plane specific constraints in this hook. When using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](j )}(h``atomic_check``h]j )}(hj7h]h atomic_check}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubj )}(hhh](h)}(h=Drivers should check plane specific constraints in this hook.h]h=Drivers should check plane specific constraints in this hook.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hXrWhen using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.h](h6When using drm_atomic_helper_check_planes() plane’s }(hj8hhhNhNubj3 )}(h**atomic_check**h]h atomic_check}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj8ubhX. hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hj!8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj08hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hNOTE:h]hNOTE:}(hj?8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_commit` update tracking structure.h](h|This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the }(hjN8hhhNhNubh)}(h:c:type:`drm_atomic_commit`h]j )}(hjX8h]hdrm_atomic_commit}(hjZ8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjV8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjN8ubh update tracking structure.}(hjN8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhju8hMhj7ubh)}(hRETURNS:h]hRETURNS:}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj8hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]j )}(hj8h]hdrm_modeset_lock}(hj8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj8ubh deadlock.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8hMhj7ubeh}(h]h ]h"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]uh1j{ hj7hMhj_4ubj| )}(hX8``atomic_update`` Drivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](j )}(h``atomic_update``h]j )}(hj8h]h atomic_update}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM-hj8ubj )}(hhh](h)}(hDrivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks.h](h`Drivers should use this function to update the plane state. This hook is called in-between the }(hj8hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]j )}(hj8h]h"drm_crtc_helper_funcs.atomic_begin}(hj8hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM$hj8ubh2 and drm_crtc_helper_funcs.atomic_flush callbacks.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj9hM$hj8ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM(hj8ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj-9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM-hj8ubeh}(h]h ]h"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hj8hM-hj_4ubj| )}(hXB``atomic_enable`` Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**. h](j )}(h``atomic_enable``h]j )}(hjM9h]h atomic_enable}(hjO9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjK9ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMFhjG9ubj )}(hhh](h)}(hX'Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**.h](hgDrivers should use this function to unconditionally enable a plane. This hook is called in-between the }(hjf9hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]j )}(hjp9h]h"drm_crtc_helper_funcs.atomic_begin}(hjr9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjn9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM5hjf9ubhF and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after }(hjf9hhhNhNubj3 )}(h**atomic_update**h]h atomic_update}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjf9ubh@, which will be called for all enabled planes. Drivers that use }(hjf9hhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjf9ubh should set up a plane in }(hjf9hhhNhNubj3 )}(h**atomic_update**h]h atomic_update}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjf9ubh$ and afterwards enable the plane in }(hjf9hhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjf9ubhb. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in }(hjf9hhhNhNubj3 )}(h**atomic_update**h]h atomic_update}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjf9ubh.}(hjf9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj9hM5hjc9ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM>hjc9ubh)}(hXThis callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**.h](hYThis callback is used by the atomic modeset helpers, but it is optional. If implemented, }(hj:hhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj :hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubh should be the inverse of }(hj:hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubh[. Drivers that don’t want to use either can still implement the complete plane update in }(hj:hhhNhNubj3 )}(h**atomic_update**h]h atomic_update}(hj-:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubh.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMChjc9ubeh}(h]h ]h"]h$]h&]uh1j hjG9ubeh}(h]h ]h"]h$]h&]uh1j{ hjb9hMFhj_4ubj| )}(hX``atomic_disable`` Drivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented. This hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**. h](j )}(h``atomic_disable``h]j )}(hjX:h]hatomic_disable}(hjZ:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjV:ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM_hjR:ubj )}(hhh](h)}(hXkDrivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented.h](hhDrivers should use this function to unconditionally disable a plane. This hook is called in-between the }(hjq:hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]j )}(hj{:h]h"drm_crtc_helper_funcs.atomic_begin}(hj}:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjy:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMNhjq:ubhK and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to }(hjq:hhhNhNubj3 )}(h**atomic_update**h]h atomic_update}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjq:ubh9, which will be called for disabling planes, too, if the }(hjq:hhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjq:ubh hook isn’t implemented.}(hjq:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:hMNhjn:ubh)}(hThis hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook.h](hThis hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the }(hj:hhhNhNubh)}(h?:c:type:`drm_crtc_helper_funcs.disable `h]j )}(hj:h]hdrm_crtc_helper_funcs.disable}(hj:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMUhj:ubh hook.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:hMUhjn:ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMYhjn:ubh)}(hThis callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**.h](hsThis callback is used by the atomic modeset helpers, but it is optional. It’s intended to reverse the effects of }(hj;hhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubh.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM^hjn:ubeh}(h]h ]h"]h$]h&]uh1j hjR:ubeh}(h]h ]h"]h$]h&]uh1j{ hjm:hM_hj_4ubj| )}(hX``atomic_async_check`` Drivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized". This hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update. This function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip. RETURNS: Return 0 on success and any error returned indicates that the update can not be applied in asynchronous manner. h](j )}(h``atomic_async_check``h]j )}(hj;;h]hatomic_async_check}(hj=;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9;ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMwhj5;ubj )}(hhh](h)}(hDrivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized".h]hDrivers should set this function pointer to check if the plane’s atomic state can be updated in a async fashion. Here async means “not vblank synchronized”.}(hjT;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMghjQ;ubh)}(hThis hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update.h]hThis hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update.}(hjc;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMkhjQ;ubh)}(hThis function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip.h]hThis function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip.}(hjr;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMohjQ;ubh)}(hRETURNS:h]hRETURNS:}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMthjQ;ubh)}(hoReturn 0 on success and any error returned indicates that the update can not be applied in asynchronous manner.h]hoReturn 0 on success and any error returned indicates that the update can not be applied in asynchronous manner.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMvhjQ;ubeh}(h]h ]h"]h$]h&]uh1j hj5;ubeh}(h]h ]h"]h$]h&]uh1j{ hjP;hMwhj_4ubj| )}(hX<``atomic_async_update`` Drivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized". This hook is called by drm_atomic_helper_async_commit(). An async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane. When doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state. Drivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit. FIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h](j )}(h``atomic_async_update``h]j )}(hj;h]hatomic_async_update}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubj )}(hhh](h)}(hDrivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized".h]hDrivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means “not vblank synchronized”.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubh)}(h8This hook is called by drm_atomic_helper_async_commit().h]h8This hook is called by drm_atomic_helper_async_commit().}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubh)}(hAn async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane.h]hAn async update will happen on legacy cursor updates. An async update won’t happen if there is an outstanding commit modifying the same plane.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubh)}(hWhen doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state.h](h8When doing async_update drivers shouldn’t replace the }(hj;hhhNhNubh)}(h:c:type:`drm_plane_state`h]j )}(hj<h]hdrm_plane_state}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj;ubhU but update the current one with the new plane configurations in the new plane_state.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hMhj;ubh)}(hXDrivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit.h](hGDrivers should also swap the framebuffers between current plane state (}(hj)<hhhNhNubh)}(h%:c:type:`drm_plane.state `h]j )}(hj3<h]hdrm_plane.state}(hj5<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj1<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_planeuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj)<ubhX") and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit.}(hj)<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjP<hMhj;ubjw )}(hhh]j| )}(hXUFIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h](j )}(hFIXME:h]hFIXME:}(hjb<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;hMhj^<ubj )}(hhh]h)}(hhh](h)}(h&It only works for single plane updatesh]h)}(hjx<h]h&It only works for single plane updates}(hjz<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjv<ubah}(h]h ]h"]h$]h&]uh1hhjs<ubh)}(h%Async Pageflips are not supported yeth]h)}(hj<h]h%Async Pageflips are not supported yet}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubah}(h]h ]h"]h$]h&]uh1hhjs<ubh)}(hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h]h)}(hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created.h]hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubah}(h]h ]h"]h$]h&]uh1hhjs<ubeh}(h]h ]h"]h$]h&]jN-uh1hhj<hMhjp<ubah}(h]h ]h"]h$]h&]uh1j hj^<ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hMhj[<ubah}(h]h ]h"]h$]h&]uh1jv hj;ubeh}(h]h ]h"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hMhj_4ubj| )}(hX``get_scanout_buffer`` Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned. Return: ``0`` on success, negative errno on failure. h](j )}(h``get_scanout_buffer``h]j )}(hj<h]hget_scanout_buffer}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj<ubj )}(hhh](h)}(hX<Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned.h](hXGet the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device }(hj=hhhNhNubh)}(h:c:type:`dev.mode_config `h]j )}(hj =h]hdev.mode_config}(hj=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj =ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j devuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj=ubhP.panic_lock is taken before calling this function, so you can safely access the }(hj=hhhNhNubh)}(h:c:type:`plane.state `h]j )}(hj1=h]h plane.state}(hj3=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj/=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j planeuh1hhj*=hMhj=ubhX? It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what’s safe and what is not allowed. It’s a best effort mode, so it’s expected that in some complex cases the panic screen won’t be displayed. The returned }(hj=hhhNhNubh)}(h5:c:type:`drm_scanout_buffer.map `h]j )}(hjT=h]hdrm_scanout_buffer.map}(hjV=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjR=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_scanout_bufferuh1hhj*=hMhj=ubh, must be valid if no error code is returned.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*=hMhj=ubh)}(h4Return: ``0`` on success, negative errno on failure.h](hReturn: }(hj{=hhhNhNubj )}(h``0``h]h0}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{=ubh' on success, negative errno on failure.}(hj{=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj=ubeh}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMhj_4ubj| )}(hX3``panic_flush`` It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](j )}(h``panic_flush``h]j )}(hj=h]h panic_flush}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj=ubj )}(hhh]h)}(hX#It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](hXIt is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the }(hj=hhhNhNubh)}(h:c:type:`dev.mode_config `h]j )}(hj=h]hdev.mode_config}(hj=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j devuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj=ubh.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what’s safe and what is not allowed.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hj=hMhj_4ubeh}(h]h ]h"]h$]h&]uh1jv hj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubh)}(h**Description**h]j3 )}(hj>h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjH hhubh)}(h/These functions are used by the atomic helpers.h]h/These functions are used by the atomic helpers.}(hj*>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjH hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_plane_helper_add (C function)c.drm_plane_helper_addhNtauh1j hjH hhhj hNubj )}(hhh](j )}(h_void drm_plane_helper_add (struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h]j )}(h^void drm_plane_helper_add(struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hjR>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjN>hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hja>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN>hhhj`>hMubj )}(hdrm_plane_helper_addh]j )}(hdrm_plane_helper_addh]hdrm_plane_helper_add}(hjs>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjo>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjN>hhhj`>hMubj)}(hE(struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]j%)}jju>sbc.drm_plane_helper_addasbuh1hhj>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj9)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj>ubj )}(hplaneh]hplane}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>ubj)}(h*const struct drm_plane_helper_funcs *funcsh](j )}(hjch]hconst}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj)?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubh)}(hhh]j )}(hdrm_plane_helper_funcsh]hdrm_plane_helper_funcs}(hj:?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjc.drm_plane_helper_addasbuh1hhj>ubj )}(h h]h }(hjX?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj9)}(hjOh]h*}(hjf?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj>ubj )}(hfuncsh]hfuncs}(hjs?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>ubeh}(h]h ]h"]h$]h&]j j uh1jhjN>hhhj`>hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJ>hhhj`>hMubah}(h]jE>ah ](j j eh"]h$]h&]j j )j huh1j hj`>hMhjG>hhubj )}(hhh]h)}(h"sets the helper vtable for a planeh]h"sets the helper vtable for a plane}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj?hhubah}(h]h ]h"]h$]h&]uh1j hjG>hhhj`>hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j?j$ j?j% j& j' uh1j hhhjH hj hNubj) )}(h**Parameters** ``struct drm_plane *plane`` DRM plane ``const struct drm_plane_helper_funcs *funcs`` helper vtable to set for **plane**h](h)}(h**Parameters**h]j3 )}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj?ubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` DRM plane h](j )}(h``struct drm_plane *plane``h]j )}(hj?h]hstruct drm_plane *plane}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj?ubj )}(hhh]h)}(h DRM planeh]h DRM plane}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hMhj?ubj| )}(hQ``const struct drm_plane_helper_funcs *funcs`` helper vtable to set for **plane**h](j )}(h.``const struct drm_plane_helper_funcs *funcs``h]j )}(hj@h]h*const struct drm_plane_helper_funcs *funcs}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubj )}(hhh]h)}(h"helper vtable to set for **plane**h](hhelper vtable to set for }(hj0@hhhNhNubj3 )}(h **plane**h]hplane}(hj8@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0@ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj-@ubah}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1j{ hj,@hMhj?ubeh}(h]h ]h"]h$]h&]uh1jv hj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_mode_config_helper_funcs (C struct)c.drm_mode_config_helper_funcshNtauh1j hjH hhhj hNubj )}(hhh](j )}(hdrm_mode_config_helper_funcsh]j )}(h#struct drm_mode_config_helper_funcsh](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{@hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{@hhhj@hMubj )}(hdrm_mode_config_helper_funcsh]j )}(hjy@h]hdrm_mode_config_helper_funcs}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj{@hhhj@hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjw@hhhj@hMubah}(h]jr@ah ](j j eh"]h$]h&]j j )j huh1j hj@hMhjt@hhubj )}(hhh]h)}(h global modeset helper operationsh]h global modeset helper operations}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@hhubah}(h]h ]h"]h$]h&]uh1j hjt@hhhj@hMubeh}(h]h ](j structeh"]h$]h&]j" j j# j@j$ j@j% j& j' uh1j hhhjH hj hNubj) )}(hXP **Definition**:: struct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_commit *state); int (*atomic_commit_setup)(struct drm_atomic_commit *state); }; **Members** ``atomic_commit_tail`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers This function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware. After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes(). When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely. This hook is optional, the default implementation is drm_atomic_helper_commit_tail(). ``atomic_commit_setup`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers. This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure. Note that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this. This hook is optional.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubh:}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubjN )}(hstruct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_commit *state); int (*atomic_commit_setup)(struct drm_atomic_commit *state); };h]hstruct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_commit *state); int (*atomic_commit_setup)(struct drm_atomic_commit *state); };}hj@sbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubh)}(h **Members**h]j3 )}(hjAh]hMembers}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj Aubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj@ubjw )}(hhh](j| )}(hXi``atomic_commit_tail`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers This function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware. After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes(). When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely. This hook is optional, the default implementation is drm_atomic_helper_commit_tail(). h](j )}(h``atomic_commit_tail``h]j )}(hj.Ah]hatomic_commit_tail}(hj0AhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,Aubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhj(Aubj )}(hhh](h)}(hX#This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpersh]hX#This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers}(hjGAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjDAubh)}(hXThis function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware.h]hXThis function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware.}(hjVAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjDAubh)}(hX\After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes().h]hX\After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes().}(hjeAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjDAubh)}(hXwWhen disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely.h]hX}When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don’t work on disabled CRTC, hence the core can’t take care of this. And it also can’t rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely.}(hjtAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjDAubh)}(hUThis hook is optional, the default implementation is drm_atomic_helper_commit_tail().h]hUThis hook is optional, the default implementation is drm_atomic_helper_commit_tail().}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjDAubeh}(h]h ]h"]h$]h&]uh1j hj(Aubeh}(h]h ]h"]h$]h&]uh1j{ hjCAhMhj%Aubj| )}(hX``atomic_commit_setup`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers. This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure. Note that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this. This hook is optional.h](j )}(h``atomic_commit_setup``h]j )}(hjAh]hatomic_commit_setup}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubj )}(hhh](h)}(hThis hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers.h]hThis hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubh)}(hX4This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure.h](hXThis function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn’t related to a CRTC, plane or connector, tracked in a }(hjAhhhNhNubh)}(h:c:type:`drm_private_obj`h]j )}(hjAh]hdrm_private_obj}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubh structure.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhMhjAubh)}(hkNote that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this.h](hNote that the documentation of }(hjAhhhNhNubh)}(h:c:type:`drm_private_obj`h]j )}(hjBh]hdrm_private_obj}(hj BhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhM hjAubh3 has more details on how one should implement this.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj%BhM hjAubh)}(hThis hook is optional.h]hThis hook is optional.}(hj0BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjAubeh}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hjAhMhj%Aubeh}(h]h ]h"]h$]h&]uh1jv hj@ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjH hhhj hNubh)}(h**Description**h]j3 )}(hjZBh]h Description}(hj\BhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXBubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjH hhubh)}(h6These helper functions are used by the atomic helpers.h]h6These helper functions are used by the atomic helpers.}(hjpBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:44: ./include/drm/drm_modeset_helper_vtables.hhMhjH hhubhtarget)}(h.. _drm_atomic_helper:h]h}(h]h ]h"]h$]h&]hʌdrm-atomic-helperuh1jBhK/hjH hhhhubeh}(h]jah ]h"]+modeset helper reference for common vtablesah$]h&]uh1hhhhhhhhK'ubh)}(hhh](h)}(h)Atomic Modeset Helper Functions Referenceh]h)Atomic Modeset Helper Functions Reference}(hjBhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjBhhhhhK2ubh)}(hhh](h)}(hOverviewh]hOverview}(hjBhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjBhhhhhK5ubh)}(hXXThis helper library provides implementations of check and commit functions on top of the CRTC modeset helper callbacks and the plane helper callbacks. It also provides convenience implementations for the atomic state handling callbacks for drivers which don't need to subclass the drm core structures to add their own additional internal state.h]hXZThis helper library provides implementations of check and commit functions on top of the CRTC modeset helper callbacks and the plane helper callbacks. It also provides convenience implementations for the atomic state handling callbacks for drivers which don’t need to subclass the drm core structures to add their own additional internal state.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:55: ./drivers/gpu/drm/drm_atomic_helper.chK6hjBhhubh)}(hXTThis library also provides default implementations for the check callback in drm_atomic_helper_check() and for the commit callback with drm_atomic_helper_commit(). But the individual stages and callbacks are exposed to allow drivers to mix and match and e.g. use the plane helpers only together with a driver private modeset implementation.h]hXTThis library also provides default implementations for the check callback in drm_atomic_helper_check() and for the commit callback with drm_atomic_helper_commit(). But the individual stages and callbacks are exposed to allow drivers to mix and match and e.g. use the plane helpers only together with a driver private modeset implementation.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:55: ./drivers/gpu/drm/drm_atomic_helper.chK`, struct :c:type:`drm_encoder_helper_funcs` and :c:type:`struct drm_connector_helper_funcs `. It also shares the :c:type:`struct drm_plane_helper_funcs ` function table with the plane helpers.h](hvThe atomic helper uses the same function table structures as all other modesetting helpers. See the documentation for }(hjBhhhNhNubh)}(h>:c:type:`struct drm_crtc_helper_funcs `h]j )}(hjBh]hstruct drm_crtc_helper_funcs}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:55: ./drivers/gpu/drm/drm_atomic_helper.chKHhjBubh , struct }(hjBhhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]j )}(hjCh]hdrm_encoder_helper_funcs}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhj ChKHhjBubh and }(hjBhhhNhNubh)}(hH:c:type:`struct drm_connector_helper_funcs `h]j )}(hj3Ch]h!struct drm_connector_helper_funcs}(hj5ChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj1Cubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhj ChKHhjBubh. It also shares the }(hjBhhhNhNubh)}(h@:c:type:`struct drm_plane_helper_funcs `h]j )}(hjVCh]hstruct drm_plane_helper_funcs}(hjXChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjTCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhj ChKHhjBubh' function table with the plane helpers.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj ChKHhjBhhubeh}(h]jah ]h"]h$]overviewah&]uh1hhjBhhhhhK5 referencedKubh)}(hhh](h)}(h'Implementing Asynchronous Atomic Commith]h'Implementing Asynchronous Atomic Commit}(hjChhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjChhhhhK;ubh)}(hXNonblocking atomic commits should use struct :c:type:`drm_crtc_commit` to sequence different operations against each another. Locks, especially struct :c:type:`drm_modeset_lock`, should not be held in worker threads or any other asynchronous context used to commit the hardware state.h](h-Nonblocking atomic commits should use struct }(hjChhhNhNubh)}(h:c:type:`drm_crtc_commit`h]j )}(hjCh]hdrm_crtc_commit}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM hjCubhQ to sequence different operations against each another. Locks, especially struct }(hjChhhNhNubh)}(h:c:type:`drm_modeset_lock`h]j )}(hjCh]hdrm_modeset_lock}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhjChM hjCubhk, should not be held in worker threads or any other asynchronous context used to commit the hardware state.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChM hjChhubh)}(hdrm_atomic_helper_commit() implements the recommended sequence for nonblocking commits, using drm_atomic_helper_setup_commit() internally:h]hdrm_atomic_helper_commit() implements the recommended sequence for nonblocking commits, using drm_atomic_helper_setup_commit() internally:}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM hjChhubh)}(h1. Run drm_atomic_helper_prepare_planes(). Since this can fail and we need to propagate out of memory/VRAM errors to userspace, it must be called synchronously.h]h1. Run drm_atomic_helper_prepare_planes(). Since this can fail and we need to propagate out of memory/VRAM errors to userspace, it must be called synchronously.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM! hjChhubh)}(h2. Synchronize with any outstanding nonblocking commit worker threads which might be affected by the new state update. This is handled by drm_atomic_helper_setup_commit().h]h2. Synchronize with any outstanding nonblocking commit worker threads which might be affected by the new state update. This is handled by drm_atomic_helper_setup_commit().}(hj DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM% hjChhubh)}(hXAAsynchronous workers need to have sufficient parallelism to be able to run different atomic commits on different CRTCs in parallel. The simplest way to achieve this is by running them on the :c:type:`system_dfl_wq` work queue. Note that drivers are not required to split up atomic commits and run an individual commit in parallel - userspace is supposed to do that if it cares. But it might be beneficial to do that for modesets, since those necessarily must be done as one global operation, and enabling or disabling a CRTC can take a long time. But even that is not required.h](hAsynchronous workers need to have sufficient parallelism to be able to run different atomic commits on different CRTCs in parallel. The simplest way to achieve this is by running them on the }(hjDhhhNhNubh)}(h:c:type:`system_dfl_wq`h]j )}(hj"Dh]h system_dfl_wq}(hj$DhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj Dubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j system_dfl_wquh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM) hjDubhXk work queue. Note that drivers are not required to split up atomic commits and run an individual commit in parallel - userspace is supposed to do that if it cares. But it might be beneficial to do that for modesets, since those necessarily must be done as one global operation, and enabling or disabling a CRTC can take a long time. But even that is not required.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?DhM) hjChhubh)}(hX,IMPORTANT: A :c:type:`drm_atomic_commit` update for multiple CRTCs is sequenced against all CRTCs therein. Therefore for atomic state updates which only flip planes the driver must not get the struct :c:type:`drm_crtc_state` of unrelated CRTCs in its atomic check code: This would prevent committing of atomic updates to multiple CRTCs in parallel. In general, adding additional state structures should be avoided as much as possible, because this reduces parallelism in (nonblocking) commits, both due to locking and due to commit sequencing requirements.h](h IMPORTANT: A }(hjJDhhhNhNubh)}(h:c:type:`drm_atomic_commit`h]j )}(hjTDh]hdrm_atomic_commit}(hjVDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM2 hjJDubh update for multiple CRTCs is sequenced against all CRTCs therein. Therefore for atomic state updates which only flip planes the driver must not get the struct }(hjJDhhhNhNubh)}(h:c:type:`drm_crtc_state`h]j )}(hjxDh]hdrm_crtc_state}(hjzDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjvDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjqDhM2 hjJDubhXL of unrelated CRTCs in its atomic check code: This would prevent committing of atomic updates to multiple CRTCs in parallel. In general, adding additional state structures should be avoided as much as possible, because this reduces parallelism in (nonblocking) commits, both due to locking and due to commit sequencing requirements.}(hjJDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqDhM2 hjChhubh)}(hX3. The software state is updated synchronously with drm_atomic_helper_swap_state(). Doing this under the protection of all modeset locks means concurrent callers never see inconsistent state. Note that commit workers do not hold any locks; their access is only coordinated through ordering. If workers would access state only through the pointers in the free-standing state objects (currently not the case for any driver) then even multiple pending commits could be in-flight at the same time.h]hX3. The software state is updated synchronously with drm_atomic_helper_swap_state(). Doing this under the protection of all modeset locks means concurrent callers never see inconsistent state. Note that commit workers do not hold any locks; their access is only coordinated through ordering. If workers would access state only through the pointers in the free-standing state objects (currently not the case for any driver) then even multiple pending commits could be in-flight at the same time.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chM; hjChhubh)}(hX4. Schedule a work item to do all subsequent steps, using the split-out commit helpers: a) pre-plane commit b) plane commit c) post-plane commit and then cleaning up the framebuffers after the old framebuffer is no longer being displayed. The scheduled work should synchronize against other workers using the :c:type:`drm_crtc_commit` infrastructure as needed. See drm_atomic_helper_setup_commit() for more details.h](hX54. Schedule a work item to do all subsequent steps, using the split-out commit helpers: a) pre-plane commit b) plane commit c) post-plane commit and then cleaning up the framebuffers after the old framebuffer is no longer being displayed. The scheduled work should synchronize against other workers using the }(hjDhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]j )}(hjDh]hdrm_crtc_commit}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:61: ./drivers/gpu/drm/drm_atomic_helper.chMC hjDubhQ infrastructure as needed. See drm_atomic_helper_setup_commit() for more details.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhMC hjChhubeh}(h]jah ]h"]'implementing asynchronous atomic commitah$]h&]uh1hhjBhhhhhK;ubh)}(hhh](h)}(hHelper Functions Referenceh]hHelper Functions Reference}(hjDhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjDhhhhhKAubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_atomic_crtc_for_each_plane (C macro) c.drm_atomic_crtc_for_each_planehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hdrm_atomic_crtc_for_each_planeh]j )}(hdrm_atomic_crtc_for_each_planeh]j )}(hdrm_atomic_crtc_for_each_planeh]j )}(hj Eh]hdrm_atomic_crtc_for_each_plane}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ](j j eh"]h$]h&]j j uh1j hj Ehhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hj Ehhhj(EhKubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j hj(EhKhjEhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjEhhhj(EhKubeh}(h]h ](j macroeh"]h$]h&]j" j j# jAEj$ jAEj% j& j' uh1j hhhjDhNhNubh)}(h0``drm_atomic_crtc_for_each_plane (plane, crtc)``h]j )}(hjGEh]h,drm_atomic_crtc_for_each_plane (plane, crtc)}(hjIEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEEubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjDhhubh block_quote)}(h/iterate over planes currently attached to CRTC h]h)}(h.iterate over planes currently attached to CRTCh]h.iterate over planes currently attached to CRTC}(hjcEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj_Eubah}(h]h ]h"]h$]h&]uh1j]EhjqEhKhjDhhubj) )}(hX**Parameters** ``plane`` the loop cursor ``crtc`` the CRTC whose planes are iterated **Description** This iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which *will* be attached (more useful in code called from :c:type:`drm_mode_config_funcs.atomic_check `) see drm_atomic_crtc_state_for_each_plane().h](h)}(h**Parameters**h]j3 )}(hj~Eh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|Eubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjxEubjw )}(hhh](j| )}(h``plane`` the loop cursor h](j )}(h ``plane``h]j )}(hjEh]hplane}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjEubj )}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKhjEubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hjEhKhjEubj| )}(h,``crtc`` the CRTC whose planes are iterated h](j )}(h``crtc``h]j )}(hjEh]hcrtc}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjEubj )}(hhh]h)}(h"the CRTC whose planes are iteratedh]h"the CRTC whose planes are iterated}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhKhjEubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hjEhKhjEubeh}(h]h ]h"]h$]h&]uh1jv hjxEubh)}(h**Description**h]j3 )}(hjFh]h Description}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjxEubh)}(hXDThis iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which *will* be attached (more useful in code called from :c:type:`drm_mode_config_funcs.atomic_check `) see drm_atomic_crtc_state_for_each_plane().h](hThis iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which }(hj'FhhhNhNubhemphasis)}(h*will*h]hwill}(hj1FhhhNhNubah}(h]h ]h"]h$]h&]uh1j/Fhj'Fubh. be attached (more useful in code called from }(hj'FhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]j )}(hjEFh]h"drm_mode_config_funcs.atomic_check}(hjGFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj'Fubh-) see drm_atomic_crtc_state_for_each_plane().}(hj'FhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjbFhKhjxEubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_atomic_crtc_state_for_each_plane (C macro)&c.drm_atomic_crtc_state_for_each_planehNtauh1j hjDhhhNhNubj )}(hhh](j )}(h$drm_atomic_crtc_state_for_each_planeh]j )}(h$drm_atomic_crtc_state_for_each_planeh]j )}(h$drm_atomic_crtc_state_for_each_planeh]j )}(hjFh]h$drm_atomic_crtc_state_for_each_plane}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ](j j eh"]h$]h&]j j uh1j hjFhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjFhhhjFhKubah}(h]jFah ](j j eh"]h$]h&]j j )j huh1j hjFhKhjFhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjFhhhjFhKubeh}(h]h ](j macroeh"]h$]h&]j" j j# jFj$ jFj% j& j' uh1j hhhjDhNhNubh)}(h<``drm_atomic_crtc_state_for_each_plane (plane, crtc_state)``h]j )}(hjFh]h8drm_atomic_crtc_state_for_each_plane (plane, crtc_state)}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjDhhubj^E)}(h*iterate over attached planes in new state h]h)}(h)iterate over attached planes in new stateh]h)iterate over attached planes in new state}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjFubah}(h]h ]h"]h$]h&]uh1j]EhjFhKhjDhhubj) )}(hX~**Parameters** ``plane`` the loop cursor ``crtc_state`` the incoming CRTC state **Description** Similar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](h)}(h**Parameters**h]j3 )}(hjFh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjFubjw )}(hhh](j| )}(h``plane`` the loop cursor h](j )}(h ``plane``h]j )}(hjGh]hplane}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjGubj )}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hj0GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,GhKhj-Gubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hj,GhKhjGubj| )}(h'``crtc_state`` the incoming CRTC state h](j )}(h``crtc_state``h]j )}(hjPGh]h crtc_state}(hjRGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNGubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJGubj )}(hhh]h)}(hthe incoming CRTC stateh]hthe incoming CRTC state}(hjiGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjeGhKhjfGubah}(h]h ]h"]h$]h&]uh1j hjJGubeh}(h]h ]h"]h$]h&]uh1j{ hjeGhKhjGubeh}(h]h ]h"]h$]h&]uh1jv hjFubh)}(h**Description**h]j3 )}(hjGh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjFubh)}(hXSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](hSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from }(hjGhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]j )}(hjGh]h"drm_mode_config_funcs.atomic_check}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjGubh, operations, to validate the incoming state.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhKhjFubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_atomic_crtc_state_for_each_plane_state (C macro),c.drm_atomic_crtc_state_for_each_plane_statehNtauh1j hjDhhhNhNubj )}(hhh](j )}(h*drm_atomic_crtc_state_for_each_plane_stateh]j )}(h*drm_atomic_crtc_state_for_each_plane_stateh]j )}(h*drm_atomic_crtc_state_for_each_plane_stateh]j )}(hjGh]h*drm_atomic_crtc_state_for_each_plane_state}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhj HhKubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j hj HhKhjGhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjGhhhj HhKubeh}(h]h ](j macroeh"]h$]h&]j" j j# j#Hj$ j#Hj% j& j' uh1j hhhjDhNhNubh)}(hO``drm_atomic_crtc_state_for_each_plane_state (plane, plane_state, crtc_state)``h]j )}(hj)Hh]hKdrm_atomic_crtc_state_for_each_plane_state (plane, plane_state, crtc_state)}(hj+HhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'Hubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjDhhubj^E)}(h*iterate over attached planes in new state h]h)}(h)iterate over attached planes in new stateh]h)iterate over attached planes in new state}(hjCHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj?Hubah}(h]h ]h"]h$]h&]uh1j]EhjQHhKhjDhhubj) )}(hX**Parameters** ``plane`` the loop cursor ``plane_state`` loop cursor for the plane's state, must be const ``crtc_state`` the incoming CRTC state **Description** Similar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state. Compared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.h](h)}(h**Parameters**h]j3 )}(hj^Hh]h Parameters}(hj`HhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\Hubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjXHubjw )}(hhh](j| )}(h``plane`` the loop cursor h](j )}(h ``plane``h]j )}(hj}Hh]hplane}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{Hubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjwHubj )}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhKhjHubah}(h]h ]h"]h$]h&]uh1j hjwHubeh}(h]h ]h"]h$]h&]uh1j{ hjHhKhjtHubj| )}(hA``plane_state`` loop cursor for the plane's state, must be const h](j )}(h``plane_state``h]j )}(hjHh]h plane_state}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjHubj )}(hhh]h)}(h0loop cursor for the plane's state, must be consth]h2loop cursor for the plane’s state, must be const}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhKhjHubah}(h]h ]h"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]uh1j{ hjHhKhjtHubj| )}(h'``crtc_state`` the incoming CRTC state h](j )}(h``crtc_state``h]j )}(hjHh]h crtc_state}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjHubj )}(hhh]h)}(hthe incoming CRTC stateh]hthe incoming CRTC state}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhKhjIubah}(h]h ]h"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]uh1j{ hjIhKhjtHubeh}(h]h ]h"]h$]h&]uh1jv hjXHubh)}(h**Description**h]j3 )}(hj*Ih]h Description}(hj,IhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(Iubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjXHubh)}(hXSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](hSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from }(hj@IhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]j )}(hjJIh]h"drm_mode_config_funcs.atomic_check}(hjLIhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjHIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj@Iubh, operations, to validate the incoming state.}(hj@IhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjgIhKhjXHubh)}(hCompared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.h]hCompared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.}(hjrIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjXHubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_atomic_plane_enabling (C function)c.drm_atomic_plane_enablinghNtauh1j hjDhhhNhNubj )}(hhh](j )}(hqbool drm_atomic_plane_enabling (struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h]j )}(hpbool drm_atomic_plane_enabling(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(hboolh]hbool}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjIhKubj )}(hdrm_atomic_plane_enablingh]j )}(hdrm_atomic_plane_enablingh]hdrm_atomic_plane_enabling}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ](j j eh"]h$]h&]j j uh1j hjIhhhjIhKubj)}(hR(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(h'struct drm_plane_state *old_plane_stateh](j )}(hj h]hstruct}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j%)}jjIsbc.drm_atomic_plane_enablingasbuh1hhjIubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj9)}(hjOh]h*}(hj*JhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjIubj )}(hold_plane_stateh]hold_plane_state}(hj7JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubj)}(h'struct drm_plane_state *new_plane_stateh](j )}(hj h]hstruct}(hjPJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLJubj )}(h h]h }(hj]JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLJubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjnJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpJmodnameN classnameNj j )}j ]jJc.drm_atomic_plane_enablingasbuh1hhjLJubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLJubj9)}(hjOh]h*}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLJubj )}(hnew_plane_stateh]hnew_plane_state}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubeh}(h]h ]h"]h$]h&]j j uh1jhjIhhhjIhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjIhhhjIhKubah}(h]jIah ](j j eh"]h$]h&]j j )j huh1j hjIhKhjIhhubj )}(hhh]h)}(h&check whether a plane is being enabledh]h&check whether a plane is being enabled}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjIhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jJj$ jJj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_plane_state *old_plane_state`` old atomic plane state ``struct drm_plane_state *new_plane_state`` new atomic plane state **Description** Checks the atomic state of a plane to determine whether it's being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL). **Return** True if the plane is being enabled, false otherwise.h](h)}(h**Parameters**h]j3 )}(hjJh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubjw )}(hhh](j| )}(hC``struct drm_plane_state *old_plane_state`` old atomic plane state h](j )}(h+``struct drm_plane_state *old_plane_state``h]j )}(hjKh]h'struct drm_plane_state *old_plane_state}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhj Kubj )}(hhh]h)}(hold atomic plane stateh]hold atomic plane state}(hj+KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'KhKhj(Kubah}(h]h ]h"]h$]h&]uh1j hj Kubeh}(h]h ]h"]h$]h&]uh1j{ hj'KhKhj Kubj| )}(hC``struct drm_plane_state *new_plane_state`` new atomic plane state h](j )}(h+``struct drm_plane_state *new_plane_state``h]j )}(hjKKh]h'struct drm_plane_state *new_plane_state}(hjMKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIKubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjEKubj )}(hhh]h)}(hnew atomic plane stateh]hnew atomic plane state}(hjdKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`KhKhjaKubah}(h]h ]h"]h$]h&]uh1j hjEKubeh}(h]h ]h"]h$]h&]uh1j{ hj`KhKhj Kubeh}(h]h ]h"]h$]h&]uh1jv hjJubh)}(h**Description**h]j3 )}(hjKh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubh)}(hChecks the atomic state of a plane to determine whether it's being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).h]hChecks the atomic state of a plane to determine whether it’s being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubh)}(h **Return**h]j3 )}(hjKh]hReturn}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubh)}(h4True if the plane is being enabled, false otherwise.h]h4True if the plane is being enabled, false otherwise.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhKhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_atomic_plane_disabling (C function)c.drm_atomic_plane_disablinghNtauh1j hjDhhhNhNubj )}(hhh](j )}(hrbool drm_atomic_plane_disabling (struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h]j )}(hqbool drm_atomic_plane_disabling(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(hjIh]hbool}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKhhhjKhMubj )}(hdrm_atomic_plane_disablingh]j )}(hdrm_atomic_plane_disablingh]hdrm_atomic_plane_disabling}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ](j j eh"]h$]h&]j j uh1j hjKhhhjKhMubj)}(hR(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(h'struct drm_plane_state *old_plane_stateh](j )}(hj h]hstruct}(hj.LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Lubj )}(h h]h }(hj;LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Lubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjLLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjILubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNLmodnameN classnameNj j )}j ]j%)}jjLsbc.drm_atomic_plane_disablingasbuh1hhj*Lubj )}(h h]h }(hjlLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Lubj9)}(hjOh]h*}(hjzLhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*Lubj )}(hold_plane_stateh]hold_plane_state}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*Lubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&Lubj)}(h'struct drm_plane_state *new_plane_stateh](j )}(hj h]hstruct}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLmodnameN classnameNj j )}j ]jhLc.drm_atomic_plane_disablingasbuh1hhjLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj9)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubj )}(hnew_plane_stateh]hnew_plane_state}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj&Lubeh}(h]h ]h"]h$]h&]j j uh1jhjKhhhjKhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjKhhhjKhMubah}(h]jKah ](j j eh"]h$]h&]j j )j huh1j hjKhMhjKhhubj )}(hhh]h)}(h'check whether a plane is being disabledh]h'check whether a plane is being disabled}(hj!MhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMhjMhhubah}(h]h ]h"]h$]h&]uh1j hjKhhhjKhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j9Mj$ j9Mj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_plane_state *old_plane_state`` old atomic plane state ``struct drm_plane_state *new_plane_state`` new atomic plane state **Description** Checks the atomic state of a plane to determine whether it's being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL). **Return** True if the plane is being disabled, false otherwise.h](h)}(h**Parameters**h]j3 )}(hjCMh]h Parameters}(hjEMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjAMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hj=Mubjw )}(hhh](j| )}(hC``struct drm_plane_state *old_plane_state`` old atomic plane state h](j )}(h+``struct drm_plane_state *old_plane_state``h]j )}(hjbMh]h'struct drm_plane_state *old_plane_state}(hjdMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`Mubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hj\Mubj )}(hhh]h)}(hold atomic plane stateh]hold atomic plane state}(hj{MhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwMhM hjxMubah}(h]h ]h"]h$]h&]uh1j hj\Mubeh}(h]h ]h"]h$]h&]uh1j{ hjwMhM hjYMubj| )}(hC``struct drm_plane_state *new_plane_state`` new atomic plane state h](j )}(h+``struct drm_plane_state *new_plane_state``h]j )}(hjMh]h'struct drm_plane_state *new_plane_state}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hjMubj )}(hhh]h)}(hnew atomic plane stateh]hnew atomic plane state}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM hjMubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjMhM hjYMubeh}(h]h ]h"]h$]h&]uh1jv hj=Mubh)}(h**Description**h]j3 )}(hjMh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hj=Mubh)}(hChecks the atomic state of a plane to determine whether it's being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).h]hChecks the atomic state of a plane to determine whether it’s being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhM hj=Mubh)}(h **Return**h]j3 )}(hjMh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMhj=Mubh)}(h5True if the plane is being disabled, false otherwise.h]h5True if the plane is being disabled, false otherwise.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:67: ./include/drm/drm_atomic_helper.hhMhj=Mubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_atomic_helper_check_modeset (C function)!c.drm_atomic_helper_check_modesethNtauh1j hjDhhhNhNubj )}(hhh](j )}(h]int drm_atomic_helper_check_modeset (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h\int drm_atomic_helper_check_modeset(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjBNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>Nhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM_ubj )}(h h]h }(hjQNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>NhhhjPNhM_ubj )}(hdrm_atomic_helper_check_modeseth]j )}(hdrm_atomic_helper_check_modeseth]hdrm_atomic_helper_check_modeset}(hjcNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_Nubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>NhhhjPNhM_ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{Nubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{Nubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNmodnameN classnameNj j )}j ]j%)}jjeNsb!c.drm_atomic_helper_check_modesetasbuh1hhj{Nubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{Nubj9)}(hjOh]h*}(hjNhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj{Nubj )}(hdevh]hdev}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{Nubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwNubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Oubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]jN!c.drm_atomic_helper_check_modesetasbuh1hhjNubj )}(h h]h }(hj-OhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj9)}(hjOh]h*}(hj;OhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjNubj )}(hstateh]hstate}(hjHOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwNubeh}(h]h ]h"]h$]h&]j j uh1jhj>NhhhjPNhM_ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:NhhhjPNhM_ubah}(h]j5Nah ](j j eh"]h$]h&]j j )j huh1j hjPNhM_hj7Nhhubj )}(hhh]h)}(h)validate state object for modeset changesh]h)validate state object for modeset changes}(hjrOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM_hjoOhhubah}(h]h ]h"]h$]h&]uh1j hj7NhhhjPNhM_ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jOj$ jOj% j& j' uh1j hhhjDhNhNubj) )}(hX **Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** Check the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order: 1. :c:type:`drm_connector_helper_funcs.atomic_best_encoder ` for determining the new encoder. 2. :c:type:`drm_connector_helper_funcs.atomic_check ` to validate the connector state. 3. If it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them. 4. :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components. 5. :c:type:`drm_bridge_funcs.mode_fixup ` is called on all encoder bridges. 6. :c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead. 7. :c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints. :c:type:`drm_crtc_state.mode_changed ` is set when the input mode is changed. :c:type:`drm_crtc_state.connectors_changed ` is set when a connector is added or removed from the CRTC. :c:type:`drm_crtc_state.active_changed ` is set when :c:type:`drm_crtc_state.active ` changes, which is used for DPMS. :c:type:`drm_crtc_state.no_vblank ` is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset() IMPORTANT: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the :c:type:`drm_crtc_helper_funcs.atomic_check ` functions depend upon the adjusted dotclock for fifo space allocation and watermark computation. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j3 )}(hjOh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMchjOubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjOh]hstruct drm_device *dev}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM`hjOubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM`hjOubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjOhM`hjOubj| )}(h<``struct drm_atomic_commit *state`` the driver state object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjOh]hstruct drm_atomic_commit *state}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMahjOubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMahjPubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjPhMahjOubeh}(h]h ]h"]h$]h&]uh1jv hjOubh)}(h**Description**h]j3 )}(hj'Ph]h Description}(hj)PhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%Pubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMchjOubh)}(hXCheck the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order:h]hXCheck the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order:}(hj=PhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMbhjOubhenumerated_list)}(hhh](h)}(hv:c:type:`drm_connector_helper_funcs.atomic_best_encoder ` for determining the new encoder.h]h)}(hjSPh](h)}(hU:c:type:`drm_connector_helper_funcs.atomic_best_encoder `h]j )}(hjZPh]h.drm_connector_helper_funcs.atomic_best_encoder}(hj\PhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjXPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMghjUPubh! for determining the new encoder.}(hjUPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjwPhMghjQPubah}(h]h ]h"]h$]h&]uh1hhjNPubh)}(ho:c:type:`drm_connector_helper_funcs.atomic_check ` to validate the connector state.h]h)}(hjPh](h)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]j )}(hjPh]h'drm_connector_helper_funcs.atomic_check}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhhjPubh! to validate the connector state.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhMhhjPubah}(h]h ]h"]h$]h&]uh1hhjNPubh)}(hIf it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them.h]h)}(hIf it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them.h](h`If it’s determined a modeset is needed then all connectors on the affected CRTC are added and }(hjPhhhNhNubh)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]j )}(hjPh]h'drm_connector_helper_funcs.atomic_check}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMihjPubh is run on them.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhMihjPubah}(h]h ]h"]h$]h&]uh1hhjNPubh)}(h:c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components.h]h)}(h:c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components.h](h)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]j )}(hjQh]h#drm_encoder_helper_funcs.mode_valid}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMkhjPubh, }(hjPhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]j )}(hj)Qh]hdrm_bridge_funcs.mode_valid}(hj+QhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj'Qubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj"QhMkhjPubh and }(hjPhhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]j )}(hjLQh]h drm_crtc_helper_funcs.mode_valid}(hjNQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjJQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhj"QhMkhjPubh' are called on the affected components.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"QhMkhjPubah}(h]h ]h"]h$]h&]uh1hhjNPubh)}(hZ:c:type:`drm_bridge_funcs.mode_fixup ` is called on all encoder bridges.h]h)}(hj{Qh](h)}(h8:c:type:`drm_bridge_funcs.mode_fixup `h]j )}(hjQh]hdrm_bridge_funcs.mode_fixup}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMmhj}Qubh" is called on all encoder bridges.}(hj}QhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhMmhjyQubah}(h]h ]h"]h$]h&]uh1hhjNPubh)}(hX:c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead.h]h)}(hX:c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead.h](h)}(hJ:c:type:`drm_encoder_helper_funcs.atomic_check `h]j )}(hjQh]h%drm_encoder_helper_funcs.atomic_check}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMnhjQubh is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, }(hjQhhhNhNubh)}(hV:c:type:`drm_atomic_encoder_helper_funcs.mode_fixup `h]j )}(hjQh]h*drm_atomic_encoder_helper_funcs.mode_fixup}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_encoder_helper_funcsuh1hhjQhMnhjQubh is called instead.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhMnhjQubah}(h]h ]h"]h$]h&]uh1hhjNPubh)}(h}:c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints. h]h)}(h|:c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints.h](h)}(hB:c:type:`drm_crtc_helper_funcs.mode_fixup `h]j )}(hjRh]h drm_crtc_helper_funcs.mode_fixup}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMshjRubh: is called last, to fix up the mode with CRTC constraints.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2RhMshj Rubah}(h]h ]h"]h$]h&]uh1hhjNPubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jLPhjOubh)}(hX:c:type:`drm_crtc_state.mode_changed ` is set when the input mode is changed. :c:type:`drm_crtc_state.connectors_changed ` is set when a connector is added or removed from the CRTC. :c:type:`drm_crtc_state.active_changed ` is set when :c:type:`drm_crtc_state.active ` changes, which is used for DPMS. :c:type:`drm_crtc_state.no_vblank ` is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset()h](h)}(h6:c:type:`drm_crtc_state.mode_changed `h]j )}(hjTRh]hdrm_crtc_state.mode_changed}(hjVRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMuhjNRubh( is set when the input mode is changed. }(hjNRhhhNhNubh)}(h<:c:type:`drm_crtc_state.connectors_changed `h]j )}(hjxRh]h!drm_crtc_state.connectors_changed}(hjzRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjvRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjqRhMuhjNRubh= is set when a connector is added or removed from the CRTC. }(hjNRhhhNhNubh)}(h8:c:type:`drm_crtc_state.active_changed `h]j )}(hjRh]hdrm_crtc_state.active_changed}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjqRhMuhjNRubh is set when }(hjNRhhhNhNubh)}(h0:c:type:`drm_crtc_state.active `h]j )}(hjRh]hdrm_crtc_state.active}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjqRhMuhjNRubh" changes, which is used for DPMS. }(hjNRhhhNhNubh)}(h3:c:type:`drm_crtc_state.no_vblank `h]j )}(hjRh]hdrm_crtc_state.no_vblank}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjqRhMuhjNRubhZ is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset()}(hjNRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqRhMuhjOubh)}(h IMPORTANT:h]h IMPORTANT:}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM|hjOubh)}(hXDrivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the :c:type:`drm_crtc_helper_funcs.atomic_check ` functions depend upon the adjusted dotclock for fifo space allocation and watermark computation.h](hDrivers which set }(hjShhhNhNubh)}(h6:c:type:`drm_crtc_state.mode_changed `h]j )}(hj!Sh]hdrm_crtc_state.mode_changed}(hj#ShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM~hjSubh (e.g. in their }(hjShhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]j )}(hjESh]h#drm_plane_helper_funcs.atomic_check}(hjGShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhj>ShM~hjSubh hooks if a plane update can’t be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the }(hjShhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]j )}(hjhSh]h"drm_crtc_helper_funcs.atomic_check}(hjjShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjfSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhj>ShM~hjSubha functions depend upon the adjusted dotclock for fifo space allocation and watermark computation.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>ShM~hjOubh)}(h **Return**h]j3 )}(hjSh]hReturn}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjSubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjOubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 7drm_atomic_helper_check_wb_connector_state (C function),c.drm_atomic_helper_check_wb_connector_statehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hqint drm_atomic_helper_check_wb_connector_state (struct drm_connector *connector, struct drm_atomic_commit *state)h]j )}(hpint drm_atomic_helper_check_wb_connector_state(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMFubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhjShMFubj )}(h*drm_atomic_helper_check_wb_connector_stateh]j )}(h*drm_atomic_helper_check_wb_connector_stateh]h*drm_atomic_helper_check_wb_connector_state}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ](j j eh"]h$]h&]j j uh1j hjShhhjShMFubj)}(hB(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(h h]h }(hj ThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj1ThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.Tubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3TmodnameN classnameNj j )}j ]j%)}jjSsb,c.drm_atomic_helper_check_wb_connector_stateasbuh1hhjTubj )}(h h]h }(hjQThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj9)}(hjOh]h*}(hj_ThhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjTubj )}(h connectorh]h connector}(hjlThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj Tubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]jMT,c.drm_atomic_helper_check_wb_connector_stateasbuh1hhjTubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj9)}(hjOh]h*}(hjThhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjTubj )}(hstateh]hstate}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj Tubeh}(h]h ]h"]h$]h&]j j uh1jhjShhhjShMFubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjShMFubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j hjShMFhjShhubj )}(hhh]h)}(hCheck writeback connector stateh]hCheck writeback connector state}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMFhjUhhubah}(h]h ]h"]h$]h&]uh1j hjShhhjShMFubeh}(h]h ](j functioneh"]h$]h&]j" j j# jUj$ jUj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` corresponding connector ``struct drm_atomic_commit *state`` the driver state object **Description** Checks if the writeback connector state is valid, and returns an error if it isn't. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j3 )}(hj(Uh]h Parameters}(hj*UhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&Uubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMJhj"Uubjw )}(hhh](j| )}(h<``struct drm_connector *connector`` corresponding connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjGUh]hstruct drm_connector *connector}(hjIUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEUubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMGhjAUubj )}(hhh]h)}(hcorresponding connectorh]hcorresponding connector}(hj`UhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\UhMGhj]Uubah}(h]h ]h"]h$]h&]uh1j hjAUubeh}(h]h ]h"]h$]h&]uh1j{ hj\UhMGhj>Uubj| )}(h<``struct drm_atomic_commit *state`` the driver state object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjUh]hstruct drm_atomic_commit *state}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~Uubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMHhjzUubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMHhjUubah}(h]h ]h"]h$]h&]uh1j hjzUubeh}(h]h ]h"]h$]h&]uh1j{ hjUhMHhj>Uubeh}(h]h ]h"]h$]h&]uh1jv hj"Uubh)}(h**Description**h]j3 )}(hjUh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMJhj"Uubh)}(hSChecks if the writeback connector state is valid, and returns an error if it isn't.h]hUChecks if the writeback connector state is valid, and returns an error if it isn’t.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMIhj"Uubh)}(h **Return**h]j3 )}(hjUh]hReturn}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMLhj"Uubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMMhj"Uubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0drm_atomic_helper_check_plane_state (C function)%c.drm_atomic_helper_check_plane_statehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hint drm_atomic_helper_check_plane_state (struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h]j )}(hint drm_atomic_helper_check_plane_state(struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h](j)}(hinth]hint}(hj'VhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#Vhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMoubj )}(h h]h }(hj6VhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#Vhhhj5VhMoubj )}(h#drm_atomic_helper_check_plane_stateh]j )}(h#drm_atomic_helper_check_plane_stateh]h#drm_atomic_helper_check_plane_state}(hjHVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDVubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#Vhhhj5VhMoubj)}(h(struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h](j)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjdVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`Vubj )}(h h]h }(hjqVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`Vubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjVmodnameN classnameNj j )}j ]j%)}jjJVsb%c.drm_atomic_helper_check_plane_stateasbuh1hhj`Vubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`Vubj9)}(hjOh]h*}(hjVhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj`Vubj )}(h plane_stateh]h plane_state}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`Vubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\Vubj)}(h'const struct drm_crtc_state *crtc_stateh](j )}(hjch]hconst}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj Wubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]jV%c.drm_atomic_helper_check_plane_stateasbuh1hhjVubj )}(h h]h }(hj-WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj9)}(hjOh]h*}(hj;WhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjVubj )}(h crtc_stateh]h crtc_state}(hjHWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\Vubj)}(h int min_scaleh](j)}(hinth]hint}(hjaWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]Wubj )}(h h]h }(hjoWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]Wubj )}(h min_scaleh]h min_scale}(hj}WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]Wubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\Vubj)}(h int max_scaleh](j)}(hinth]hint}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(h max_scaleh]h max_scale}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\Vubj)}(hbool can_positionh](j)}(hjIh]hbool}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(h can_positionh]h can_position}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\Vubj)}(hbool can_update_disabledh](j)}(hjIh]hbool}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj )}(h h]h }(hj XhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(hcan_update_disabledh]hcan_update_disabled}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\Vubeh}(h]h ]h"]h$]h&]j j uh1jhj#Vhhhj5VhMoubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjVhhhj5VhMoubah}(h]jVah ](j j eh"]h$]h&]j j )j huh1j hj5VhMohjVhhubj )}(hhh]h)}(hCheck plane state for validityh]hCheck plane state for validity}(hjDXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMohjAXhhubah}(h]h ]h"]h$]h&]uh1j hjVhhhj5VhMoubeh}(h]h ](j functioneh"]h$]h&]j" j j# j\Xj$ j\Xj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_plane_state *plane_state`` plane state to check ``const struct drm_crtc_state *crtc_state`` CRTC state to check ``int min_scale`` minimum **src**:**dest** scaling factor in 16.16 fixed point ``int max_scale`` maximum **src**:**dest** scaling factor in 16.16 fixed point ``bool can_position`` is it legal to position the plane such that it doesn't cover the entire CRTC? This will generally only be false for primary planes. ``bool can_update_disabled`` can the plane be updated while the CRTC is disabled? **Description** Checks that a desired plane update is valid, and updates various bits of derived state (clipped coordinates etc.). Drivers that provide their own plane handling rather than helper-provided implementations may still wish to call this function to avoid duplication of error checking code. **Return** Zero if update appears valid, error code on failureh](h)}(h**Parameters**h]j3 )}(hjfXh]h Parameters}(hjhXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjdXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMshj`Xubjw )}(hhh](j| )}(h=``struct drm_plane_state *plane_state`` plane state to check h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hjXh]h#struct drm_plane_state *plane_state}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMphjXubj )}(hhh]h)}(hplane state to checkh]hplane state to check}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMphjXubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjXhMphj|Xubj| )}(h@``const struct drm_crtc_state *crtc_state`` CRTC state to check h](j )}(h+``const struct drm_crtc_state *crtc_state``h]j )}(hjXh]h'const struct drm_crtc_state *crtc_state}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMqhjXubj )}(hhh]h)}(hCRTC state to checkh]hCRTC state to check}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMqhjXubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjXhMqhj|Xubj| )}(hO``int min_scale`` minimum **src**:**dest** scaling factor in 16.16 fixed point h](j )}(h``int min_scale``h]j )}(hjXh]h int min_scale}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMrhjXubj )}(hhh]h)}(h` and :c:type:`drm_plane_helper_funcs.atomic_check ` hooks provided by the driver. It also sets :c:type:`drm_crtc_state.planes_changed ` to indicate that a CRTC has updated planes. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j3 )}(hj]h]h Parameters}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj]h]hstruct drm_device *dev}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj]ubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hj]hMhj]ubj| )}(h<``struct drm_atomic_commit *state`` the driver state object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj]h]hstruct drm_atomic_commit *state}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj]ubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hj]hMhj]ubeh}(h]h ]h"]h$]h&]uh1jv hj]ubh)}(h**Description**h]j3 )}(hj ^h]h Description}(hj"^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubh)}(hXBCheck the state object to see if the requested state is physically possible. This does all the plane update related checks using by calling into the :c:type:`drm_crtc_helper_funcs.atomic_check ` and :c:type:`drm_plane_helper_funcs.atomic_check ` hooks provided by the driver.h](hCheck the state object to see if the requested state is physically possible. This does all the plane update related checks using by calling into the }(hj6^hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]j )}(hj@^h]h"drm_crtc_helper_funcs.atomic_check}(hjB^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj>^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj6^ubh and }(hj6^hhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]j )}(hjd^h]h#drm_plane_helper_funcs.atomic_check}(hjf^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjb^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhj]^hMhj6^ubh hooks provided by the driver.}(hj6^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj]^hMhj]ubh)}(hqIt also sets :c:type:`drm_crtc_state.planes_changed ` to indicate that a CRTC has updated planes.h](h It also sets }(hj^hhhNhNubh)}(h8:c:type:`drm_crtc_state.planes_changed `h]j )}(hj^h]hdrm_crtc_state.planes_changed}(hj^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj^ubh, to indicate that a CRTC has updated planes.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMhj]ubh)}(h **Return**h]j3 )}(hj^h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubh)}(hZero for success or -errnoh]hZero for success or -errno}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_atomic_helper_check (C function)c.drm_atomic_helper_checkhNtauh1j hjDhhhNhNubj )}(hhh](j )}(hUint drm_atomic_helper_check (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hTint drm_atomic_helper_check(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM7ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhj_hM7ubj )}(hdrm_atomic_helper_checkh]j )}(hdrm_atomic_helper_checkh]hdrm_atomic_helper_check}(hj%_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_hhhj_hM7ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjA_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubj )}(h h]h }(hjN_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj__hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetja_modnameN classnameNj j )}j ]j%)}jj'_sbc.drm_atomic_helper_checkasbuh1hhj=_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj=_ubj )}(hdevh]hdev}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9_ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]j{_c.drm_atomic_helper_checkasbuh1hhj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubj )}(hstateh]hstate}(hj `hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9_ubeh}(h]h ]h"]h$]h&]j j uh1jhj_hhhj_hM7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^hhhj_hM7ubah}(h]j^ah ](j j eh"]h$]h&]j j )j huh1j hj_hM7hj^hhubj )}(hhh]h)}(hvalidate state objecth]hvalidate state object}(hj4`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM7hj1`hhubah}(h]h ]h"]h$]h&]uh1j hj^hhhj_hM7ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jL`j$ jL`j% j& j' uh1j hhhjDhNhNubj) )}(hXF**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** Check the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their :c:type:`drm_mode_config_funcs.atomic_check ` callback. This just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the **drm_plane_helper_funcs.atomic_check** and **drm_crtc_helper_funcs.atomic_check** functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks. Note that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change. IMPORTANT: As this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j3 )}(hjV`h]h Parameters}(hjX`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjT`ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM;hjP`ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hju`h]hstruct drm_device *dev}(hjw`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjs`ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM8hjo`ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM8hj`ubah}(h]h ]h"]h$]h&]uh1j hjo`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hM8hjl`ubj| )}(h<``struct drm_atomic_commit *state`` the driver state object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj`h]hstruct drm_atomic_commit *state}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM9hj`ubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM9hj`ubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hM9hjl`ubeh}(h]h ]h"]h$]h&]uh1jv hjP`ubh)}(h**Description**h]j3 )}(hj`h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM;hjP`ubh)}(hXkCheck the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their :c:type:`drm_mode_config_funcs.atomic_check ` callback.h](hXCheck the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their }(hj`hhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]j )}(hj ah]h"drm_mode_config_funcs.atomic_check}(hj ahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM:hj`ubh callback.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&ahM:hjP`ubh)}(hXThis just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the **drm_plane_helper_funcs.atomic_check** and **drm_crtc_helper_funcs.atomic_check** functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks.h](hThis just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the }(hj1ahhhNhNubj3 )}(h'**drm_plane_helper_funcs.atomic_check**h]h#drm_plane_helper_funcs.atomic_check}(hj9ahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj1aubh and }(hj1ahhhNhNubj3 )}(h&**drm_crtc_helper_funcs.atomic_check**h]h"drm_crtc_helper_funcs.atomic_check}(hjKahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj1aubhZ functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks.}(hj1ahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM@hjP`ubh)}(hXNote that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change.h]hXNote that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change.}(hjdahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMGhjP`ubh)}(h IMPORTANT:h]h IMPORTANT:}(hjsahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMLhjP`ubh)}(hXAs this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change.h](htAs this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set }(hjahhhNhNubh)}(h6:c:type:`drm_crtc_state.mode_changed `h]j )}(hjah]hdrm_crtc_state.mode_changed}(hjahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMNhjaubh (e.g. in their }(hjahhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]j )}(hjah]h#drm_plane_helper_funcs.atomic_check}(hjahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhjahMNhjaubh hooks if a plane update can’t be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahMNhjP`ubh)}(h **Return**h]j3 )}(hjah]hReturn}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMUhjP`ubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMVhjP`ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ` can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.h](h)}(h**Parameters**h]j3 )}(hjih]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMnhjiubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj jh]hstruct drm_device *dev}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj jubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMkhjjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj&jhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"jhMkhj#jubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hj"jhMkhjjubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjFjh]hstruct drm_atomic_commit *state}(hjHjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMlhj@jubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj_jhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[jhMlhj\jubah}(h]h ]h"]h$]h&]uh1j hj@jubeh}(h]h ]h"]h$]h&]uh1j{ hj[jhMlhjjubeh}(h]h ]h"]h$]h&]uh1jv hjiubh)}(h**Description**h]j3 )}(hjjh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMnhjiubh)}(hfThis function updates all the various legacy modeset state pointers in connectors, encoders and CRTCs.h]hfThis function updates all the various legacy modeset state pointers in connectors, encoders and CRTCs.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMmhjiubh)}(hxDrivers can use this for building their own atomic commit if they don't have a pure helper-based modeset implementation.h]hzDrivers can use this for building their own atomic commit if they don’t have a pure helper-based modeset implementation.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMphjiubh)}(hXrSince these updates are not synchronized with lockings, only code paths called from :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.h](hTSince these updates are not synchronized with lockings, only code paths called from }(hjjhhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]j )}(hjjh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMshjjubh can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjhMshjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j :drm_atomic_helper_calc_timestamping_constants (C function)/c.drm_atomic_helper_calc_timestamping_constantshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hTvoid drm_atomic_helper_calc_timestamping_constants (struct drm_atomic_commit *state)h]j )}(hSvoid drm_atomic_helper_calc_timestamping_constants(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkhhhjkhMubj )}(h-drm_atomic_helper_calc_timestamping_constantsh]j )}(h-drm_atomic_helper_calc_timestamping_constantsh]h-drm_atomic_helper_calc_timestamping_constants}(hj(khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$kubah}(h]h ](j j eh"]h$]h&]j j uh1j hjkhhhjkhMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjDkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@kubj )}(h h]h }(hjQkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@kubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjbkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_kubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdkmodnameN classnameNj j )}j ]j%)}jj*ksb/c.drm_atomic_helper_calc_timestamping_constantsasbuh1hhj@kubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@kubj9)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@kubj )}(hstateh]hstate}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@kubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj]nhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYnhMhjZnubah}(h]h ]h"]h$]h&]uh1j hj>nubeh}(h]h ]h"]h$]h&]uh1j{ hjYnhMhjnubeh}(h]h ]h"]h$]h&]uh1jv hjmubh)}(h**Description**h]j3 )}(hjnh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}nubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjmubh)}(hLoops over all connectors in the current state and if the mode has changed, change the mode of the CRTC, then call down the bridge chain and change the mode in all bridges as well.h]hLoops over all connectors in the current state and if the mode has changed, change the mode of the CRTC, then call down the bridge chain and change the mode in all bridges as well.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjmubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 6drm_atomic_helper_commit_modeset_disables (C function)+c.drm_atomic_helper_commit_modeset_disableshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hhvoid drm_atomic_helper_commit_modeset_disables (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hgvoid drm_atomic_helper_commit_modeset_disables(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjnhMubj )}(h)drm_atomic_helper_commit_modeset_disablesh]j )}(h)drm_atomic_helper_commit_modeset_disablesh]h)drm_atomic_helper_commit_modeset_disables}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjnhMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!omodnameN classnameNj j )}j ]j%)}jjnsb+c.drm_atomic_helper_commit_modeset_disablesasbuh1hhjnubj )}(h h]h }(hj?ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj9)}(hjOh]h*}(hjMohhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjnubj )}(hdevh]hdev}(hjZohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjsohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjooubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjooubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjomodnameN classnameNj j )}j ]j;o+c.drm_atomic_helper_commit_modeset_disablesasbuh1hhjooubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjooubj9)}(hjOh]h*}(hjohhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjooubj )}(hstateh]hstate}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjooubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnhhhjnhMubah}(h]jnah ](j j eh"]h$]h&]j j )j huh1j hjnhMhjnhhubj )}(hhh]h)}(h!modeset commit to disable outputsh]h!modeset commit to disable outputs}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjohhubah}(h]h ]h"]h$]h&]uh1j hjnhhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j pj$ j pj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function shuts down all the outputs that need to be shut down and prepares them (if required) with the new mode. For compatibility with legacy CRTC helpers this should be called before drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h](h)}(h**Parameters**h]j3 )}(hjph]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj5ph]hstruct drm_device *dev}(hj7phhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3pubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj/pubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjNphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJphMhjKpubah}(h]h ]h"]h$]h&]uh1j hj/pubeh}(h]h ]h"]h$]h&]uh1j{ hjJphMhj,pubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjnph]hstruct drm_atomic_commit *state}(hjpphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlpubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhpubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1j hjhpubeh}(h]h ]h"]h$]h&]uh1j{ hjphMhj,pubeh}(h]h ]h"]h$]h&]uh1jv hjpubh)}(h**Description**h]j3 )}(hjph]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubh)}(huThis function shuts down all the outputs that need to be shut down and prepares them (if required) with the new mode.h]huThis function shuts down all the outputs that need to be shut down and prepares them (if required) with the new mode.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubh)}(hX|For compatibility with legacy CRTC helpers this should be called before drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h]hX|For compatibility with legacy CRTC helpers this should be called before drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0drm_atomic_helper_commit_writebacks (C function)%c.drm_atomic_helper_commit_writebackshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hbvoid drm_atomic_helper_commit_writebacks (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(havoid drm_atomic_helper_commit_writebacks(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM1ubj )}(h h]h }(hj qhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjphhhj qhM1ubj )}(h#drm_atomic_helper_commit_writebacksh]j )}(h#drm_atomic_helper_commit_writebacksh]h#drm_atomic_helper_commit_writebacks}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hjphhhj qhM1ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj:qhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6qubj )}(h h]h }(hjGqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6qubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjXqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZqmodnameN classnameNj j )}j ]j%)}jj qsb%c.drm_atomic_helper_commit_writebacksasbuh1hhj6qubj )}(h h]h }(hjxqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6qubj9)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj6qubj )}(hdevh]hdev}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6qubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2qubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]jtq%c.drm_atomic_helper_commit_writebacksasbuh1hhjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj9)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjqubj )}(hstateh]hstate}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2qubeh}(h]h ]h"]h$]h&]j j uh1jhjphhhj qhM1ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjphhhj qhM1ubah}(h]jpah ](j j eh"]h$]h&]j j )j huh1j hj qhM1hjphhubj )}(hhh]h)}(hissue writebacksh]hissue writebacks}(hj-rhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM1hj*rhhubah}(h]h ]h"]h$]h&]uh1j hjphhhj qhM1ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jErj$ jErj% j& j' uh1j hhhjDhNhNubj) )}(hX.**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This loops over the connectors, checks if the new state requires a writeback job to be issued and in that case issues an atomic commit on each connector.h](h)}(h**Parameters**h]j3 )}(hjOrh]h Parameters}(hjQrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMrubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM5hjIrubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjnrh]hstruct drm_device *dev}(hjprhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlrubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM2hjhrubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhM2hjrubah}(h]h ]h"]h$]h&]uh1j hjhrubeh}(h]h ]h"]h$]h&]uh1j{ hjrhM2hjerubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjrh]hstruct drm_atomic_commit *state}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM3hjrubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhM3hjrubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjrhM3hjerubeh}(h]h ]h"]h$]h&]uh1jv hjIrubh)}(h**Description**h]j3 )}(hjrh]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM5hjIrubh)}(hThis loops over the connectors, checks if the new state requires a writeback job to be issued and in that case issues an atomic commit on each connector.h]hThis loops over the connectors, checks if the new state requires a writeback job to be issued and in that case issues an atomic commit on each connector.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM4hjIrubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ?drm_atomic_helper_commit_encoder_bridge_pre_enable (C function)4c.drm_atomic_helper_commit_encoder_bridge_pre_enablehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hqvoid drm_atomic_helper_commit_encoder_bridge_pre_enable (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hpvoid drm_atomic_helper_commit_encoder_bridge_pre_enable(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj'shhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#shhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMPubj )}(h h]h }(hj6shhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#shhhj5shMPubj )}(h2drm_atomic_helper_commit_encoder_bridge_pre_enableh]j )}(h2drm_atomic_helper_commit_encoder_bridge_pre_enableh]h2drm_atomic_helper_commit_encoder_bridge_pre_enable}(hjHshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDsubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#shhhj5shMPubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjdshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`subj )}(h h]h }(hjqshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`subh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]j%)}jjJssb4c.drm_atomic_helper_commit_encoder_bridge_pre_enableasbuh1hhj`subj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`subj9)}(hjOh]h*}(hjshhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj`subj )}(hdevh]hdev}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`subeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\subj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]js4c.drm_atomic_helper_commit_encoder_bridge_pre_enableasbuh1hhjsubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubj9)}(hjOh]h*}(hj thhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjsubj )}(hstateh]hstate}(hj-thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\subeh}(h]h ]h"]h$]h&]j j uh1jhj#shhhj5shMPubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjshhhj5shMPubah}(h]jsah ](j j eh"]h$]h&]j j )j huh1j hj5shMPhjshhubj )}(hhh]h)}(hpre-enable bridgesh]hpre-enable bridges}(hjWthhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMPhjTthhubah}(h]h ]h"]h$]h&]uh1j hjshhhj5shMPubeh}(h]h ](j functioneh"]h$]h&]j" j j# jotj$ jotj% j& j' uh1j hhhjDhNhNubj) )}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.h](h)}(h**Parameters**h]j3 )}(hjyth]h Parameters}(hj{thhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwtubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMThjstubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjth]hstruct drm_device *dev}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMQhjtubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMQhjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthMQhjtubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjth]hstruct drm_atomic_commit *state}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMRhjtubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMRhjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthMRhjtubeh}(h]h ]h"]h$]h&]uh1jv hjstubh)}(h**Description**h]j3 )}(hj uh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj uubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMThjstubh)}(h]This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.h]h]This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.}(hj"uhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMShjstubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_atomic_helper_commit_crtc_enable (C function)&c.drm_atomic_helper_commit_crtc_enablehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hcvoid drm_atomic_helper_commit_crtc_enable (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hbvoid drm_atomic_helper_commit_crtc_enable(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjQuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMuhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMzubj )}(h h]h }(hj`uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMuhhhj_uhMzubj )}(h$drm_atomic_helper_commit_crtc_enableh]j )}(h$drm_atomic_helper_commit_crtc_enableh]h$drm_atomic_helper_commit_crtc_enable}(hjruhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnuubah}(h]h ](j j eh"]h$]h&]j j uh1j hjMuhhhj_uhMzubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]j%)}jjtusb&c.drm_atomic_helper_commit_crtc_enableasbuh1hhjuubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj9)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjuubj )}(hdevh]hdev}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hj vhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj vmodnameN classnameNj j )}j ]ju&c.drm_atomic_helper_commit_crtc_enableasbuh1hhjuubj )}(h h]h }(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:yhMhj;yubah}(h]h ]h"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]uh1j{ hj:yhMhjxubeh}(h]h ]h"]h$]h&]uh1jv hjxubh)}(h**Description**h]j3 )}(hj`yh]h Description}(hjbyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^yubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjxubh)}(hkThis loops over all connectors in the new state, and of the CRTC needs it, enables the entire bridge chain.h]hkThis loops over all connectors in the new state, and of the CRTC needs it, enables the entire bridge chain.}(hjvyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5drm_atomic_helper_commit_modeset_enables (C function)*c.drm_atomic_helper_commit_modeset_enableshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hgvoid drm_atomic_helper_commit_modeset_enables (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hfvoid drm_atomic_helper_commit_modeset_enables(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyhhhjyhMubj )}(h(drm_atomic_helper_commit_modeset_enablesh]j )}(h(drm_atomic_helper_commit_modeset_enablesh]h(drm_atomic_helper_commit_modeset_enables}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ](j j eh"]h$]h&]j j uh1j hjyhhhjyhMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j%)}jjysb*c.drm_atomic_helper_commit_modeset_enablesasbuh1hhjyubj )}(h h]h }(hj zhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj9)}(hjOh]h*}(hj.zhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjyubj )}(hdevh]hdev}(hj;zhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjTzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPzubj )}(h h]h }(hjazhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPzubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjrzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjozubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtzmodnameN classnameNj j )}j ]jz*c.drm_atomic_helper_commit_modeset_enablesasbuh1hhjPzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPzubj9)}(hjOh]h*}(hjzhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjPzubj )}(hstateh]hstate}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubeh}(h]h ]h"]h$]h&]j j uh1jhjyhhhjyhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjyhhhjyhMubah}(h]jyah ](j j eh"]h$]h&]j j )j huh1j hjyhMhjyhhubj )}(hhh]h)}(h modeset commit to enable outputsh]h modeset commit to enable outputs}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjzhhubah}(h]h ]h"]h$]h&]uh1j hjyhhhjyhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jzj$ jzj% j& j' uh1j hhhjDhNhNubj) )}(hX}**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function enables all the outputs with the new configuration which had to be turned off for the update. For compatibility with legacy CRTC helpers this should be called after drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h](h)}(h**Parameters**h]j3 )}(hjzh]h Parameters}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjzubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj{h]hstruct drm_device *dev}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj{ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj/{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+{hMhj,{ubah}(h]h ]h"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]uh1j{ hj+{hMhj {ubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjO{h]hstruct drm_atomic_commit *state}(hjQ{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjM{ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjI{ubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjh{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjd{hMhje{ubah}(h]h ]h"]h$]h&]uh1j hjI{ubeh}(h]h ]h"]h$]h&]uh1j{ hjd{hMhj {ubeh}(h]h ]h"]h$]h&]uh1jv hjzubh)}(h**Description**h]j3 )}(hj{h]h Description}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj{ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjzubh)}(hkThis function enables all the outputs with the new configuration which had to be turned off for the update.h]hkThis function enables all the outputs with the new configuration which had to be turned off for the update.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjzubh)}(hX{For compatibility with legacy CRTC helpers this should be called after drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h]hX{For compatibility with legacy CRTC helpers this should be called after drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjzubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_atomic_helper_wait_for_fences (C function)#c.drm_atomic_helper_wait_for_fenceshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hnint drm_atomic_helper_wait_for_fences (struct drm_device *dev, struct drm_atomic_commit *state, bool pre_swap)h]j )}(hmint drm_atomic_helper_wait_for_fences(struct drm_device *dev, struct drm_atomic_commit *state, bool pre_swap)h](j)}(hinth]hint}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{hhhj{hMubj )}(h!drm_atomic_helper_wait_for_fencesh]j )}(h!drm_atomic_helper_wait_for_fencesh]h!drm_atomic_helper_wait_for_fences}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj{hhhj{hMubj)}(hH(struct drm_device *dev, struct drm_atomic_commit *state, bool pre_swap)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(h h]h }(hj(|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj9|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;|modnameN classnameNj j )}j ]j%)}jj|sb#c.drm_atomic_helper_wait_for_fencesasbuh1hhj|ubj )}(h h]h }(hjY|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj9)}(hjOh]h*}(hjg|hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj|ubj )}(hdevh]hdev}(hjt|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]jU|#c.drm_atomic_helper_wait_for_fencesasbuh1hhj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj9)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj|ubj )}(hstateh]hstate}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubj)}(h bool pre_swaph](j)}(hjIh]hbool}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hj }hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(hpre_swaph]hpre_swap}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubeh}(h]h ]h"]h$]h&]j j uh1jhj{hhhj{hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{hhhj{hMubah}(h]j{ah ](j j eh"]h$]h&]j j )j huh1j hj{hMhj{hhubj )}(hhh]h)}(h&wait for fences stashed in plane stateh]h&wait for fences stashed in plane state}(hjB}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj?}hhubah}(h]h ]h"]h$]h&]uh1j hj{hhhj{hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jZ}j$ jZ}j% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object with old state structures ``bool pre_swap`` If true, do an interruptible wait, and **state** is the new state. Otherwise **state** is the old state. **Description** For implicit sync, driver should fish the exclusive fence out from the incoming fb's and stash it in the drm_plane_state. This is called after drm_atomic_helper_swap_state() so it uses the current plane state (and just uses the atomic state to find the changed planes) Note that **pre_swap** is needed since the point where we block for fences moves around depending upon whether an atomic commit is blocking or non-blocking. For non-blocking commit all waiting needs to happen after drm_atomic_helper_swap_state() is called, but for blocking commits we want to wait **before** we do anything that can't be easily rolled back. That is before we call drm_atomic_helper_swap_state(). Returns zero if success or < 0 if dma_fence_wait() fails.h](h)}(h**Parameters**h]j3 )}(hjd}h]h Parameters}(hjf}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjb}ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj^}ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj}h]hstruct drm_device *dev}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj}}ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1j hj}}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hMhjz}ubj| )}(hR``struct drm_atomic_commit *state`` atomic state object with old state structures h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj}h]hstruct drm_atomic_commit *state}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj}ubj )}(hhh]h)}(h-atomic state object with old state structuresh]h-atomic state object with old state structures}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hMhjz}ubj| )}(h{``bool pre_swap`` If true, do an interruptible wait, and **state** is the new state. Otherwise **state** is the old state. h](j )}(h``bool pre_swap``h]j )}(hj}h]h bool pre_swap}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj}ubj )}(hhh]h)}(hhIf true, do an interruptible wait, and **state** is the new state. Otherwise **state** is the old state.h](h'If true, do an interruptible wait, and }(hj~hhhNhNubj3 )}(h **state**h]hstate}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~ubh is the new state. Otherwise }(hj~hhhNhNubj3 )}(h **state**h]hstate}(hj(~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~ubh is the old state.}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj ~ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj ~hM hjz}ubeh}(h]h ]h"]h$]h&]uh1jv hj^}ubh)}(h**Description**h]j3 )}(hjU~h]h Description}(hjW~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjS~ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM"hj^}ubh)}(hX For implicit sync, driver should fish the exclusive fence out from the incoming fb's and stash it in the drm_plane_state. This is called after drm_atomic_helper_swap_state() so it uses the current plane state (and just uses the atomic state to find the changed planes)h]hXFor implicit sync, driver should fish the exclusive fence out from the incoming fb’s and stash it in the drm_plane_state. This is called after drm_atomic_helper_swap_state() so it uses the current plane state (and just uses the atomic state to find the changed planes)}(hjk~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM!hj^}ubh)}(hXNote that **pre_swap** is needed since the point where we block for fences moves around depending upon whether an atomic commit is blocking or non-blocking. For non-blocking commit all waiting needs to happen after drm_atomic_helper_swap_state() is called, but for blocking commits we want to wait **before** we do anything that can't be easily rolled back. That is before we call drm_atomic_helper_swap_state().h](h Note that }(hjz~hhhNhNubj3 )}(h **pre_swap**h]hpre_swap}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjz~ubhX is needed since the point where we block for fences moves around depending upon whether an atomic commit is blocking or non-blocking. For non-blocking commit all waiting needs to happen after drm_atomic_helper_swap_state() is called, but for blocking commits we want to wait }(hjz~hhhNhNubj3 )}(h **before**h]hbefore}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjz~ubhj we do anything that can’t be easily rolled back. That is before we call drm_atomic_helper_swap_state().}(hjz~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM&hj^}ubh)}(h9Returns zero if success or < 0 if dma_fence_wait() fails.h]h9Returns zero if success or < 0 if dma_fence_wait() fails.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM-hj^}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_atomic_helper_wait_for_vblanks (C function)$c.drm_atomic_helper_wait_for_vblankshNtauh1j hjDhhhNhNubj )}(hhh](j )}(havoid drm_atomic_helper_wait_for_vblanks (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h`void drm_atomic_helper_wait_for_vblanks(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMRubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhhj~hMRubj )}(h"drm_atomic_helper_wait_for_vblanksh]j )}(h"drm_atomic_helper_wait_for_vblanksh]h"drm_atomic_helper_wait_for_vblanks}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj~hhhj~hMRubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]j%)}jj~sb$c.drm_atomic_helper_wait_for_vblanksasbuh1hhjubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jS$c.drm_atomic_helper_wait_for_vblanksasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj~hhhj~hMRubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhj~hMRubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j hj~hMRhj~hhubj )}(hhh]h)}(hwait for vblank on CRTCsh]hwait for vblank on CRTCs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMRhj hhubah}(h]h ]h"]h$]h&]uh1j hj~hhhj~hMRubeh}(h]h ](j functioneh"]h$]h&]j" j j# j$j$ j$j% j& j' uh1j hhhjDhNhNubj) )}(hXl**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** Helper to, after atomic commit, wait for vblanks on all affected CRTCs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). It will only wait on CRTCs where the framebuffers have actually changed to optimize for the legacy cursor and plane update use-case. Drivers using the nonblocking commit tracking support initialized by calling drm_atomic_helper_setup_commit() should look at drm_atomic_helper_wait_for_flip_done() as an alternative.h](h)}(h**Parameters**h]j3 )}(hj.h]h Parameters}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj,ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMVhj(ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjMh]hstruct drm_device *dev}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMShjGubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMShjcubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hjbhMShjDubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMThjubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMThjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMThjDubeh}(h]h ]h"]h$]h&]uh1jv hj(ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjÀhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMVhj(ubh)}(hXHelper to, after atomic commit, wait for vblanks on all affected CRTCs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). It will only wait on CRTCs where the framebuffers have actually changed to optimize for the legacy cursor and plane update use-case.h]hXHelper to, after atomic commit, wait for vblanks on all affected CRTCs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). It will only wait on CRTCs where the framebuffers have actually changed to optimize for the legacy cursor and plane update use-case.}(hj׀hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMUhj(ubh)}(hDrivers using the nonblocking commit tracking support initialized by calling drm_atomic_helper_setup_commit() should look at drm_atomic_helper_wait_for_flip_done() as an alternative.h]hDrivers using the nonblocking commit tracking support initialized by calling drm_atomic_helper_setup_commit() should look at drm_atomic_helper_wait_for_flip_done() as an alternative.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM[hj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_atomic_helper_wait_for_flip_done (C function)&c.drm_atomic_helper_wait_for_flip_donehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hcvoid drm_atomic_helper_wait_for_flip_done (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hbvoid drm_atomic_helper_wait_for_flip_done(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj#hMubj )}(h$drm_atomic_helper_wait_for_flip_doneh]j )}(h$drm_atomic_helper_wait_for_flip_doneh]h$drm_atomic_helper_wait_for_flip_done}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj#hMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]j%)}jj8sb&c.drm_atomic_helper_wait_for_flip_doneasbuh1hhjNubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjNubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjāhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjсhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj߁ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j&c.drm_atomic_helper_wait_for_flip_doneasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjJubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj#hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj#hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj#hMhj hhubj )}(hhh]h)}(h"wait for all page flips to be doneh]h"wait for all page flips to be done}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjBhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj#hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j]j$ j]j% j& j' uh1j hhhjDhNhNubj) )}(hXw**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** Helper to, after atomic commit, wait for page flips on all affected crtcs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). Compared to drm_atomic_helper_wait_for_vblanks() this waits for the completion on all CRTCs, assuming that cursors-only updates are signalling their completion immediately (or using a different path). This requires that drivers use the nonblocking commit tracking support initialized using drm_atomic_helper_setup_commit().h](h)}(h**Parameters**h]j3 )}(hjgh]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjeubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjaubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj}ubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj؂hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjԂhMhjՂubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjԂhMhj}ubeh}(h]h ]h"]h$]h&]uh1jv hjaubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjaubh)}(hXfHelper to, after atomic commit, wait for page flips on all affected crtcs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). Compared to drm_atomic_helper_wait_for_vblanks() this waits for the completion on all CRTCs, assuming that cursors-only updates are signalling their completion immediately (or using a different path).h]hXfHelper to, after atomic commit, wait for page flips on all affected crtcs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). Compared to drm_atomic_helper_wait_for_vblanks() this waits for the completion on all CRTCs, assuming that cursors-only updates are signalling their completion immediately (or using a different path).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjaubh)}(hzThis requires that drivers use the nonblocking commit tracking support initialized using drm_atomic_helper_setup_commit().h]hzThis requires that drivers use the nonblocking commit tracking support initialized using drm_atomic_helper_setup_commit().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjaubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_atomic_helper_commit_tail (C function)c.drm_atomic_helper_commit_tailhNtauh1j hjDhhhNhNubj )}(hhh](j )}(hDvoid drm_atomic_helper_commit_tail (struct drm_atomic_commit *state)h]j )}(hCvoid drm_atomic_helper_commit_tail(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJhhhj\hMubj )}(hdrm_atomic_helper_commit_tailh]j )}(hdrm_atomic_helper_commit_tailh]hdrm_atomic_helper_commit_tail}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ](j j eh"]h$]h&]j j uh1j hjJhhhj\hMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjqsbc.drm_atomic_helper_commit_tailasbuh1hhjubj )}(h h]h }(hjɃhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj׃hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjJhhhj\hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjFhhhj\hMubah}(h]jAah ](j j eh"]h$]h&]j j )j huh1j hj\hMhjChhubj )}(hhh]h)}(h commit atomic update to hardwareh]h commit atomic update to hardware}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjChhhj\hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j&j$ j&j% j& j' uh1j hhhjDhNhNubj) )}(hX **Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This is the default implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that do not support runtime_pm or do not need the CRTC to be enabled to perform a commit. Otherwise, see drm_atomic_helper_commit_tail_rpm(). Note that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.h](h)}(h**Parameters**h]j3 )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj*ubjw )}(hhh]j| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjOh]hstruct drm_atomic_commit *state}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjIubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hjdhMhjFubah}(h]h ]h"]h$]h&]uh1jv hj*ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj*ubh)}(hX#This is the default implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that do not support runtime_pm or do not need the CRTC to be enabled to perform a commit. Otherwise, see drm_atomic_helper_commit_tail_rpm().h](h+This is the default implementation for the }(hjhhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]j )}(hjh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh hook, for drivers that do not support runtime_pm or do not need the CRTC to be enabled to perform a commit. Otherwise, see drm_atomic_helper_commit_tail_rpm().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDŽhMhj*ubh)}(hzNote that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.h]hzNote that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.}(hj҄hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_atomic_helper_commit_tail_rpm (C function)#c.drm_atomic_helper_commit_tail_rpmhNtauh1j hjDhhhNhNubj )}(hhh](j )}(hHvoid drm_atomic_helper_commit_tail_rpm (struct drm_atomic_commit *state)h]j )}(hGvoid drm_atomic_helper_commit_tail_rpm(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h!drm_atomic_helper_commit_tail_rpmh]j )}(h!drm_atomic_helper_commit_tail_rpmh]h!drm_atomic_helper_commit_tail_rpm}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j%)}jj$sb#c.drm_atomic_helper_commit_tail_rpmasbuh1hhj:ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj:ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj6ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h commit atomic update to hardwareh]h commit atomic update to hardware}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jمj$ jمj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` new modeset state to be committed **Description** This is an alternative implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj݅ubjw )}(hhh]j| )}(hF``struct drm_atomic_commit *state`` new modeset state to be committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h!new modeset state to be committedh]h!new modeset state to be committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hj݅ubh)}(h**Description**h]j3 )}(hj=h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj݅ubh)}(hX:This is an alternative implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().h](h.This is an alternative implementation for the }(hjShhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]j )}(hj]h]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjSubh hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjzhMhj݅ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_atomic_helper_async_check (C function)c.drm_atomic_helper_async_checkhNtauh1j hjDhhhNhNubj )}(hhh](j )}(h[int drm_atomic_helper_async_check (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hZint drm_atomic_helper_async_check(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM6ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM6ubj )}(hdrm_atomic_helper_async_checkh]j )}(hdrm_atomic_helper_async_checkh]hdrm_atomic_helper_async_check}(hjƆhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj†ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM6ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjކubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjކubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjȆsbc.drm_atomic_helper_async_checkasbuh1hhjކubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjކubj9)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjކubj )}(hdevh]hdev}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjކubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjچubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]jc.drm_atomic_helper_async_checkasbuh1hhjPubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjPubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjچubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM6ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM6ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM6hjhhubj )}(hhh]h)}(h.check if state can be committed asynchronouslyh]h.check if state can be committed asynchronously}(hjՇhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM6hj҇hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM6ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX5**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** This helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state. It will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can't be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM:hjubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM7hjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hM7hj,ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj+hM7hj ubj| )}(h<``struct drm_atomic_commit *state`` the driver state object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjOh]hstruct drm_atomic_commit *state}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM8hjIubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhM8hjeubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hjdhM8hj ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM:hjubh)}(hThis helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state.h]hThis helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM9hjubh)}(hIt will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can't be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.h]hIt will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can’t be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM=hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_atomic_helper_async_commit (C function) c.drm_atomic_helper_async_commithNtauh1j hjDhhhNhNubj )}(hhh](j )}(h]void drm_atomic_helper_async_commit (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h\void drm_atomic_helper_async_commit(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjވhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjڈhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڈhhhjhMubj )}(hdrm_atomic_helper_async_commith]j )}(hdrm_atomic_helper_async_commith]hdrm_atomic_helper_async_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjڈhhhjhMubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j%)}jjsb c.drm_atomic_helper_async_commitasbuh1hhjubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjghhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jU c.drm_atomic_helper_async_commitasbuh1hhjubj )}(h h]h }(hjɉhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj׉hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjڈhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjֈhhhjhMubah}(h]jшah ](j j eh"]h$]h&]j j )j huh1j hjhMhjӈhhubj )}(hhh]h)}(hcommit state asynchronouslyh]hcommit state asynchronously}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjӈhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j&j$ j&j% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` the driver state object **Description** This function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state. TODO: Implement full swap instead of doing in-place changes.h](h)}(h**Parameters**h]j3 )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj*ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjOh]hstruct drm_device *dev}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjIubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hjdhMhjFubj| )}(h<``struct drm_atomic_commit *state`` the driver state object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjFubeh}(h]h ]h"]h$]h&]uh1jv hj*ubh)}(h**Description**h]j3 )}(hjÊh]h Description}(hjŊhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj*ubh)}(hXThis function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state.h]hXThis function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state.}(hjيhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj*ubh)}(h` callback, or its default implementation drm_atomic_helper_commit_tail(). **Return** Zero for success or -errno.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjՌhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjьhMhjҌubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjьhMhjubj| )}(h<``struct drm_atomic_commit *state`` the driver state object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(h=``bool nonblock`` whether nonblocking behavior is requested. h](j )}(h``bool nonblock``h]j )}(hj.h]h bool nonblock}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj(ubj )}(hhh]h)}(h*whether nonblocking behavior is requested.h]h*whether nonblocking behavior is requested.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjDubah}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hjChMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjih]h Description}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjgubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hThis function commits a with drm_atomic_helper_check() pre-validated state object. This can still fail when e.g. the framebuffer reservation fails. This function implements nonblocking commits, using drm_atomic_helper_setup_commit() and related functions.h]hThis function commits a with drm_atomic_helper_check() pre-validated state object. This can still fail when e.g. the framebuffer reservation fails. This function implements nonblocking commits, using drm_atomic_helper_setup_commit() and related functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hCommitting the actual hardware state is done through the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` callback, or its default implementation drm_atomic_helper_commit_tail().h](h9Committing the actual hardware state is done through the }(hjhhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]j )}(hjh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubhI callback, or its default implementation drm_atomic_helper_commit_tail().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjčhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hZero for success or -errno.h]hZero for success or -errno.}(hj؍hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_atomic_helper_setup_commit (C function) c.drm_atomic_helper_setup_commithNtauh1j hjDhhhNhNubj )}(hhh](j )}(hSint drm_atomic_helper_setup_commit (struct drm_atomic_commit *state, bool nonblock)h]j )}(hRint drm_atomic_helper_setup_commit(struct drm_atomic_commit *state, bool nonblock)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_atomic_helper_setup_commith]j )}(hdrm_atomic_helper_setup_commith]hdrm_atomic_helper_setup_commit}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h0(struct drm_atomic_commit *state, bool nonblock)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j%)}jj*sb c.drm_atomic_helper_setup_commitasbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(h bool nonblockh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjÎhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hnonblockh]hnonblock}(hjюhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h!setup possibly nonblocking commith]h!setup possibly nonblocking commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` new modeset state to be committed ``bool nonblock`` whether nonblocking behavior is requested. **Description** This function prepares **state** to be used by the atomic helper's support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their :c:type:`drm_mode_config_funcs.atomic_commit ` hook. Drivers that need to extend the commit setup to private objects can use the :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook. To be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver's commit hooks look at the :c:type:`drm_crtc.state `, :c:type:`drm_plane.state ` or :c:type:`drm_connector.state ` pointer directly. Completion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Only the free standing **state** with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes(). At the very end, before cleaning up **state** drivers must call drm_atomic_helper_commit_cleanup_done(). This is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook. The tracking of asynchronously executed and still pending commits is done using the core structure :c:type:`drm_crtc_commit`. By default there's no need to clean up resources allocated by this function explicitly: drm_atomic_commit_default_clear() will take care of that automatically. **Return** 0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh](j| )}(hF``struct drm_atomic_commit *state`` new modeset state to be committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj<h]hstruct drm_atomic_commit *state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj6ubj )}(hhh]h)}(h!new modeset state to be committedh]h!new modeset state to be committed}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhM hjRubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hjQhM hj3ubj| )}(h=``bool nonblock`` whether nonblocking behavior is requested. h](j )}(h``bool nonblock``h]j )}(hjuh]h bool nonblock}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjoubj )}(hhh]h)}(h*whether nonblocking behavior is requested.h]h*whether nonblocking behavior is requested.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hj3ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXThis function prepares **state** to be used by the atomic helper's support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their :c:type:`drm_mode_config_funcs.atomic_commit ` hook.h](hThis function prepares }(hjƏhhhNhNubj3 )}(h **state**h]hstate}(hjΏhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjƏubh to be used by the atomic helper’s support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their }(hjƏhhhNhNubh)}(hE:c:type:`drm_mode_config_funcs.atomic_commit `h]j )}(hjh]h#drm_mode_config_funcs.atomic_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjƏubh hook.}(hjƏhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hDrivers that need to extend the commit setup to private objects can use the :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook.h](hLDrivers that need to extend the commit setup to private objects can use the }(hj hhhNhNubh)}(hY:c:type:`drm_mode_config_helper_funcs.atomic_commit_setup `h]j )}(hjh]h0drm_mode_config_helper_funcs.atomic_commit_setup}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubh hook.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hM hjubh)}(hXTo be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver's commit hooks look at the :c:type:`drm_crtc.state `, :c:type:`drm_plane.state ` or :c:type:`drm_connector.state ` pointer directly.h](hXrTo be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver’s commit hooks look at the }(hj<hhhNhNubh)}(h#:c:type:`drm_crtc.state `h]j )}(hjFh]hdrm_crtc.state}(hjHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtcuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj<ubh, }(hj<hhhNhNubh)}(h%:c:type:`drm_plane.state `h]j )}(hjjh]hdrm_plane.state}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_planeuh1hhjchM hj<ubh or }(hj<hhhNhNubh)}(h-:c:type:`drm_connector.state `h]j )}(hjh]hdrm_connector.state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjchM hj<ubh pointer directly.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchM hjubh)}(hXCompletion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Only the free standing **state** with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes().h](hX Completion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]j )}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh locks. Only the free standing }(hjhhhNhNubj3 )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjېhM hjubh)}(hhAt the very end, before cleaning up **state** drivers must call drm_atomic_helper_commit_cleanup_done().h](h$At the very end, before cleaning up }(hjhhhNhNubj3 )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh; drivers must call drm_atomic_helper_commit_cleanup_done().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook.h]hThis is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h}The tracking of asynchronously executed and still pending commits is done using the core structure :c:type:`drm_crtc_commit`.h](hcThe tracking of asynchronously executed and still pending commits is done using the core structure }(hj(hhhNhNubh)}(h:c:type:`drm_crtc_commit`h]j )}(hj2h]hdrm_crtc_commit}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjOhM hjubh)}(hBy default there's no need to clean up resources allocated by this function explicitly: drm_atomic_commit_default_clear() will take care of that automatically.h]hBy default there’s no need to clean up resources allocated by this function explicitly: drm_atomic_commit_default_clear() will take care of that automatically.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h **Return**h]j3 )}(hjkh]hReturn}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.h]h0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_atomic_helper_wait_for_dependencies (C function))c.drm_atomic_helper_wait_for_dependencieshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hNvoid drm_atomic_helper_wait_for_dependencies (struct drm_atomic_commit *state)h]j )}(hMvoid drm_atomic_helper_wait_for_dependencies(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMG ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMG ubj )}(h'drm_atomic_helper_wait_for_dependenciesh]j )}(h'drm_atomic_helper_wait_for_dependenciesh]h'drm_atomic_helper_wait_for_dependencies}(hjёhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͑ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMG ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjӑsb)c.drm_atomic_helper_wait_for_dependenciesasbuh1hhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj9hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMG ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMG ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMG hjhhubj )}(hhh]h)}(h#wait for required preceding commitsh]h#wait for required preceding commits}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMG hjmhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMG ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function waits for all preceding commits that touch the same CRTC as **state** to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the :c:type:`drm_crtc_state.event `). This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMK hjubjw )}(hhh]j| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMH hjubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjʒhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjƒhMH hjǒubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjƒhMH hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMJ hjubh)}(hX9This function waits for all preceding commits that touch the same CRTC as **state** to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the :c:type:`drm_crtc_state.event `).h](hJThis function waits for all preceding commits that touch the same CRTC as }(hjhhhNhNubj3 )}(h **state**h]hstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_state.event `h]j )}(hjh]hdrm_crtc_state.event}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMI hjubh).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hMI hjubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMN hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_atomic_helper_fake_vblank (C function)c.drm_atomic_helper_fake_vblankhNtauh1j hjDhhhNhNubj )}(hhh](j )}(hDvoid drm_atomic_helper_fake_vblank (struct drm_atomic_commit *state)h]j )}(hCvoid drm_atomic_helper_fake_vblank(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMx ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqhhhjhMx ubj )}(hdrm_atomic_helper_fake_vblankh]j )}(hdrm_atomic_helper_fake_vblankh]hdrm_atomic_helper_fake_vblank}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjqhhhjhMx ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjГhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͓ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjғmodnameN classnameNj j )}j ]j%)}jjsbc.drm_atomic_helper_fake_vblankasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjqhhhjhMx ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjmhhhjhMx ubah}(h]jhah ](j j eh"]h$]h&]j j )j huh1j hjhMx hjjhhubj )}(hhh]h)}(hfake VBLANK events if neededh]hfake VBLANK events if needed}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMx hj2hhubah}(h]h ]h"]h$]h&]uh1j hjjhhhjhMx ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jMj$ jMj% j& j' uh1j hhhjDhNhNubj) )}(hX|**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function walks all CRTCs and fakes VBLANK events on those with :c:type:`drm_crtc_state.no_vblank ` set to true and :c:type:`drm_crtc_state.event ` != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt. This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j3 )}(hjWh]h Parameters}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM| hjQubjw )}(hhh]j| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjvh]hstruct drm_atomic_commit *state}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMy hjpubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMy hjubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjhMy hjmubah}(h]h ]h"]h$]h&]uh1jv hjQubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM{ hjQubh)}(hXThis function walks all CRTCs and fakes VBLANK events on those with :c:type:`drm_crtc_state.no_vblank ` set to true and :c:type:`drm_crtc_state.event ` != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt.h](hDThis function walks all CRTCs and fakes VBLANK events on those with }(hjǔhhhNhNubh)}(h3:c:type:`drm_crtc_state.no_vblank `h]j )}(hjєh]hdrm_crtc_state.no_vblank}(hjӔhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjϔubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMz hjǔubh set to true and }(hjǔhhhNhNubh)}(h/:c:type:`drm_crtc_state.event `h]j )}(hjh]hdrm_crtc_state.event}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjhMz hjǔubhX != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt.}(hjǔhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMz hjQubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjQubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_atomic_helper_commit_hw_done (C function)"c.drm_atomic_helper_commit_hw_donehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hGvoid drm_atomic_helper_commit_hw_done (struct drm_atomic_commit *state)h]j )}(hFvoid drm_atomic_helper_commit_hw_done(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGhhhjYhM ubj )}(h drm_atomic_helper_commit_hw_doneh]j )}(h drm_atomic_helper_commit_hw_doneh]h drm_atomic_helper_commit_hw_done}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhjYhM ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjnsb"c.drm_atomic_helper_commit_hw_doneasbuh1hhjubj )}(h h]h }(hjƕhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjԕhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjGhhhjYhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjChhhjYhM ubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j hjYhM hj@hhubj )}(hhh]h)}(h!setup possible nonblocking commith]h!setup possible nonblocking commit}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj@hhhjYhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j#j$ j#j% j& j' uh1j hhhjDhNhNubj) )}(hX\**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Drivers should try to postpone any expensive or delayed cleanup work after this function is called. This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j3 )}(hj-h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj'ubjw )}(hhh]j| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjLh]hstruct drm_atomic_commit *state}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjFubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahM hjbubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1j{ hjahM hjCubah}(h]h ]h"]h$]h&]uh1jv hj'ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj'ubh)}(hXThis function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks.h](hThis function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]j )}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_modeset_lockuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh locks.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjĖhM hj'ubh)}(hcDrivers should try to postpone any expensive or delayed cleanup work after this function is called.h]hcDrivers should try to postpone any expensive or delayed cleanup work after this function is called.}(hjϖhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj'ubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjޖhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_atomic_helper_commit_cleanup_done (C function)'c.drm_atomic_helper_commit_cleanup_donehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hLvoid drm_atomic_helper_commit_cleanup_done (struct drm_atomic_commit *state)h]j )}(hKvoid drm_atomic_helper_commit_cleanup_done(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhM ubj )}(h%drm_atomic_helper_commit_cleanup_doneh]j )}(h%drm_atomic_helper_commit_cleanup_doneh]h%drm_atomic_helper_commit_cleanup_done}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhM ubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjjmodnameN classnameNj j )}j ]j%)}jj0sb'c.drm_atomic_helper_commit_cleanup_doneasbuh1hhjFubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjFubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjBubah}(h]h ]h"]h$]h&]j j uh1jhj hhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(hsignal completion of commith]hsignal completion of commit}(hj͗hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjʗhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This signals completion of the atomic update **state**, including any cleanup work. If used, it must be called right before calling drm_atomic_commit_put(). This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh]j| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hM hj$ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj#hM hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjIh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis signals completion of the atomic update **state**, including any cleanup work. If used, it must be called right before calling drm_atomic_commit_put().h](h-This signals completion of the atomic update }(hj_hhhNhNubj3 )}(h **state**h]hstate}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj_ubhf, including any cleanup work. If used, it must be called right before calling drm_atomic_commit_put().}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_atomic_helper_prepare_planes (C function)"c.drm_atomic_helper_prepare_planeshNtauh1j hjDhhhNhNubj )}(hhh](j )}(h^int drm_atomic_helper_prepare_planes (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h]int drm_atomic_helper_prepare_planes(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h drm_atomic_helper_prepare_planesh]j )}(h drm_atomic_helper_prepare_planesh]h drm_atomic_helper_prepare_planes}(hjИhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̘ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjҘsb"c.drm_atomic_helper_prepare_planesasbuh1hhjubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]j&"c.drm_atomic_helper_prepare_planesasbuh1hhjZubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjZubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h%prepare plane resources before commith]h%prepare plane resources before commit}(hjߙhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjܙhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX1**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object with new state structures **Description** This function prepares plane state, specifically framebuffers, for the new configuration, by calling :c:type:`drm_plane_helper_funcs.prepare_fb `. If any failure is encountered this function will call :c:type:`drm_plane_helper_funcs.cleanup_fb ` on any already successfully prepared framebuffer. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj h]hstruct drm_device *dev}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hM hj6ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj5hM hjubj| )}(hR``struct drm_atomic_commit *state`` atomic state object with new state structures h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjYh]hstruct drm_atomic_commit *state}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjSubj )}(hhh]h)}(h-atomic state object with new state structuresh]h-atomic state object with new state structures}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhM hjoubah}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjnhM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXWThis function prepares plane state, specifically framebuffers, for the new configuration, by calling :c:type:`drm_plane_helper_funcs.prepare_fb `. If any failure is encountered this function will call :c:type:`drm_plane_helper_funcs.cleanup_fb ` on any already successfully prepared framebuffer.h](heThis function prepares plane state, specifically framebuffers, for the new configuration, by calling }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]j )}(hjh]h!drm_plane_helper_funcs.prepare_fb}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh8. If any failure is encountered this function will call }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]j )}(hjؚh]h!drm_plane_helper_funcs.cleanup_fb}(hjښhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj֚ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhjњhM hjubh2 on any already successfully prepared framebuffer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjњhM hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_atomic_helper_unprepare_planes (C function)$c.drm_atomic_helper_unprepare_planeshNtauh1j hjDhhhNhNubj )}(hhh](j )}(havoid drm_atomic_helper_unprepare_planes (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h`void drm_atomic_helper_unprepare_planes(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMT ubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBhhhjThMT ubj )}(h"drm_atomic_helper_unprepare_planesh]j )}(h"drm_atomic_helper_unprepare_planesh]h"drm_atomic_helper_unprepare_planes}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ](j j eh"]h$]h&]j j uh1j hjBhhhjThMT ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjisb$c.drm_atomic_helper_unprepare_planesasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjϛhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjܛhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j$c.drm_atomic_helper_unprepare_planesasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubeh}(h]h ]h"]h$]h&]j j uh1jhjBhhhjThMT ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj>hhhjThMT ubah}(h]j9ah ](j j eh"]h$]h&]j j )j huh1j hjThMT hj;hhubj )}(hhh]h)}(h!release plane resources on abortsh]h!release plane resources on aborts}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMT hjshhubah}(h]h ]h"]h$]h&]uh1j hj;hhhjThMT ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object with old state structures **Description** This function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMX hjubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMU hjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjМhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj̜hMU hj͜ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj̜hMU hjubj| )}(hR``struct drm_atomic_commit *state`` atomic state object with old state structures h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMV hjubj )}(hhh]h)}(h-atomic state object with old state structuresh]h-atomic state object with old state structures}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMV hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMV hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj+h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMX hjubh)}(hXThis function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().h]hXThis function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMW hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_atomic_helper_commit_planes (C function)!c.drm_atomic_helper_commit_planeshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hnvoid drm_atomic_helper_commit_planes (struct drm_device *dev, struct drm_atomic_commit *state, uint32_t flags)h]j )}(hmvoid drm_atomic_helper_commit_planes(struct drm_device *dev, struct drm_atomic_commit *state, uint32_t flags)h](j)}(hvoidh]hvoid}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMz ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlhhhj~hMz ubj )}(hdrm_atomic_helper_commit_planesh]j )}(hdrm_atomic_helper_commit_planesh]hdrm_atomic_helper_commit_planes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjlhhhj~hMz ubj)}(hI(struct drm_device *dev, struct drm_atomic_commit *state, uint32_t flags)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj˝hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjȝubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj͝modnameN classnameNj j )}j ]j%)}jjsb!c.drm_atomic_helper_commit_planesasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?modnameN classnameNj j )}j ]j!c.drm_atomic_helper_commit_planesasbuh1hhjubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjihhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t flagsh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.drm_atomic_helper_commit_planesasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjlhhhj~hMz ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhhj~hMz ubah}(h]jcah ](j j eh"]h$]h&]j j )j huh1j hj~hMz hjehhubj )}(hhh]h)}(hcommit plane stateh]hcommit plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMz hjhhubah}(h]h ]h"]h$]h&]uh1j hjehhhj~hMz ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX"**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed ``uint32_t flags`` flags for committing plane state **Description** This function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail. It still requires the global state object **state** to know which planes and crtcs need to be updated though. Note that this function does all plane updates across all CRTCs in one step. If the hardware can't support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead. Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don't need to be immediately notified of plane updates for a disabled CRTC. Unless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in **flags** in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can't or just don't need to deal with updates on disabled CRTCs, for example when supporting runtime PM. Drivers may set the NO_DISABLE_AFTER_MODESET flag in **flags** if the relevant display controllers require to disable a CRTC's planes when the CRTC is disabled. This function would skip the :c:type:`drm_plane_helper_funcs.atomic_disable ` call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that. The drm_atomic_helper_commit() default implementation doesn't set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM~ hjubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj)h]hstruct drm_device *dev}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM{ hj#ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hM{ hj?ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hM{ hj ubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjbh]hstruct drm_atomic_commit *state}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM| hj\ubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhM| hjxubah}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hjwhM| hj ubj| )}(h4``uint32_t flags`` flags for committing plane state h](j )}(h``uint32_t flags``h]j )}(hjh]huint32_t flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM} hjubj )}(hhh]h)}(h flags for committing plane stateh]h flags for committing plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM} hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM} hj ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj֟h]h Description}(hj؟hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjԟubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.h]hThis function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM~ hjubh)}(hmIt still requires the global state object **state** to know which planes and crtcs need to be updated though.h](h*It still requires the global state object }(hjhhhNhNubj3 )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh: to know which planes and crtcs need to be updated though.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hNote that this function does all plane updates across all CRTCs in one step. If the hardware can't support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead.h]hNote that this function does all plane updates across all CRTCs in one step. If the hardware can’t support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hX<Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don't need to be immediately notified of plane updates for a disabled CRTC.h]hX>Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don’t need to be immediately notified of plane updates for a disabled CRTC.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXrUnless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in **flags** in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can't or just don't need to deal with updates on disabled CRTCs, for example when supporting runtime PM.h](hLUnless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in }(hj:hhhNhNubj3 )}(h **flags**h]hflags}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubhX! in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can’t or just don’t need to deal with updates on disabled CRTCs, for example when supporting runtime PM.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXDrivers may set the NO_DISABLE_AFTER_MODESET flag in **flags** if the relevant display controllers require to disable a CRTC's planes when the CRTC is disabled. This function would skip the :c:type:`drm_plane_helper_funcs.atomic_disable ` call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that.h](h5Drivers may set the NO_DISABLE_AFTER_MODESET flag in }(hj[hhhNhNubj3 )}(h **flags**h]hflags}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[ubh if the relevant display controllers require to disable a CRTC’s planes when the CRTC is disabled. This function would skip the }(hj[hhhNhNubh)}(hH:c:type:`drm_plane_helper_funcs.atomic_disable `h]j )}(hjwh]h%drm_plane_helper_funcs.atomic_disable}(hjyhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj[ubh call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hThe drm_atomic_helper_commit() default implementation doesn't set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.h]hThe drm_atomic_helper_commit() default implementation doesn’t set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_atomic_helper_commit_planes_on_crtc (C function))c.drm_atomic_helper_commit_planes_on_crtchNtauh1j hjDhhhNhNubj )}(hhh](j )}(hTvoid drm_atomic_helper_commit_planes_on_crtc (struct drm_crtc_state *old_crtc_state)h]j )}(hSvoid drm_atomic_helper_commit_planes_on_crtc(struct drm_crtc_state *old_crtc_state)h](j)}(hvoidh]hvoid}(hjΠhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjʠhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjݠhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʠhhhjܠhM ubj )}(h'drm_atomic_helper_commit_planes_on_crtch]j )}(h'drm_atomic_helper_commit_planes_on_crtch]h'drm_atomic_helper_commit_planes_on_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjʠhhhjܠhM ubj)}(h'(struct drm_crtc_state *old_crtc_state)h]j)}(h%struct drm_crtc_state *old_crtc_stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j%)}jjsb)c.drm_atomic_helper_commit_planes_on_crtcasbuh1hhjubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hold_crtc_stateh]hold_crtc_state}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjʠhhhjܠhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjƠhhhjܠhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjܠhM hjàhhubj )}(hhh]h)}(hcommit plane state for a CRTCh]hcommit plane state for a CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjàhhhjܠhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX1**Parameters** ``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state **Description** This function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail. This function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does. This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn't handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh]j| )}(hV``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state h](j )}(h)``struct drm_crtc_state *old_crtc_state``h]j )}(hjϡh]h%struct drm_crtc_state *old_crtc_state}(hjѡhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj͡ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjɡubj )}(hhh]h)}(h+atomic state object with the old CRTC stateh]h+atomic state object with the old CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjɡubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjơubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.h]hThis function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does.h]hThis function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hX)This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn't handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.h]hX+This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn’t handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5drm_atomic_helper_disable_planes_on_crtc (C function)*c.drm_atomic_helper_disable_planes_on_crtchNtauh1j hjDhhhNhNubj )}(hhh](j )}(hbvoid drm_atomic_helper_disable_planes_on_crtc (struct drm_crtc_state *old_crtc_state, bool atomic)h]j )}(havoid drm_atomic_helper_disable_planes_on_crtc(struct drm_crtc_state *old_crtc_state, bool atomic)h](j)}(hvoidh]hvoid}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMO ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjihhhj{hMO ubj )}(h(drm_atomic_helper_disable_planes_on_crtch]j )}(h(drm_atomic_helper_disable_planes_on_crtch]h(drm_atomic_helper_disable_planes_on_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjihhhj{hMO ubj)}(h4(struct drm_crtc_state *old_crtc_state, bool atomic)h](j)}(h%struct drm_crtc_state *old_crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjȢhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŢubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjʢmodnameN classnameNj j )}j ]j%)}jjsb*c.drm_atomic_helper_disable_planes_on_crtcasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hold_crtc_stateh]hold_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool atomich](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hatomich]hatomic}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjihhhj{hMO ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjehhhj{hMO ubah}(h]j`ah ](j j eh"]h$]h&]j j )j huh1j hj{hMO hjbhhubj )}(hhh]h)}(hhelper to disable CRTC's planesh]h!helper to disable CRTC’s planes}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMO hj^hhubah}(h]h ]h"]h$]h&]uh1j hjbhhhj{hMO ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jyj$ jyj% j& j' uh1j hhhjDhNhNubj) )}(hXy**Parameters** ``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state ``bool atomic`` if set, synchronize with CRTC's atomic_begin/flush hooks **Description** Disables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes. If the atomic-parameter is set the function calls the CRTC's atomic_begin hook before and atomic_flush hook after disabling the planes. It is a bug to call this function without having implemented the :c:type:`drm_plane_helper_funcs.atomic_disable ` plane hook.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMS hj}ubjw )}(hhh](j| )}(hV``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state h](j )}(h)``struct drm_crtc_state *old_crtc_state``h]j )}(hjh]h%struct drm_crtc_state *old_crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMP hjubj )}(hhh]h)}(h+atomic state object with the old CRTC stateh]h+atomic state object with the old CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMP hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMP hjubj| )}(hI``bool atomic`` if set, synchronize with CRTC's atomic_begin/flush hooks h](j )}(h``bool atomic``h]j )}(hjۣh]h bool atomic}(hjݣhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj٣ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMQ hjգubj )}(hhh]h)}(h8if set, synchronize with CRTC's atomic_begin/flush hooksh]h:if set, synchronize with CRTC’s atomic_begin/flush hooks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQ hjubah}(h]h ]h"]h$]h&]uh1j hjգubeh}(h]h ]h"]h$]h&]uh1j{ hjhMQ hjubeh}(h]h ]h"]h$]h&]uh1jv hj}ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMS hj}ubh)}(hDisables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes.h]hDisables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMR hj}ubh)}(hIf the atomic-parameter is set the function calls the CRTC's atomic_begin hook before and atomic_flush hook after disabling the planes.h]hIf the atomic-parameter is set the function calls the CRTC’s atomic_begin hook before and atomic_flush hook after disabling the planes.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMV hj}ubh)}(hIt is a bug to call this function without having implemented the :c:type:`drm_plane_helper_funcs.atomic_disable ` plane hook.h](hAIt is a bug to call this function without having implemented the }(hjJhhhNhNubh)}(hH:c:type:`drm_plane_helper_funcs.atomic_disable `h]j )}(hjTh]h%drm_plane_helper_funcs.atomic_disable}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMZ hjJubh plane hook.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhMZ hj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_atomic_helper_cleanup_planes (C function)"c.drm_atomic_helper_cleanup_planeshNtauh1j hjDhhhNhNubj )}(hhh](j )}(h_void drm_atomic_helper_cleanup_planes (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(h^void drm_atomic_helper_cleanup_planes(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM| ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM| ubj )}(h drm_atomic_helper_cleanup_planesh]j )}(h drm_atomic_helper_cleanup_planesh]h drm_atomic_helper_cleanup_planes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM| ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj٤hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjդubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjդubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb"c.drm_atomic_helper_cleanup_planesasbuh1hhjդubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjդubj9)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjդubj )}(hdevh]hdev}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjդubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjѤubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j"c.drm_atomic_helper_cleanup_planesasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjGubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjѤubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM| ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM| ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM| hjhhubj )}(hhh]h)}(h$cleanup plane resources after commith]h$cleanup plane resources after commit}(hj̥hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM| hjɥhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM| ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state object being committed **Description** This function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in **state** to be able to call this function. This function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj h]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM} hjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hM} hj#ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj"hM} hjubj| )}(hH``struct drm_atomic_commit *state`` atomic state object being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjFh]hstruct drm_atomic_commit *state}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM~ hj@ubj )}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hM~ hj\ubah}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1j{ hj[hM~ hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in **state** to be able to call this function.h](hThis function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in }(hjhhhNhNubj3 )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh" to be able to call this function.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.h]hThis function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_atomic_helper_swap_state (C function)c.drm_atomic_helper_swap_statehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hNint drm_atomic_helper_swap_state (struct drm_atomic_commit *state, bool stall)h]j )}(hMint drm_atomic_helper_swap_state(struct drm_atomic_commit *state, bool stall)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_atomic_helper_swap_stateh]j )}(hdrm_atomic_helper_swap_stateh]hdrm_atomic_helper_swap_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h-(struct drm_atomic_commit *state, bool stall)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]j%)}jj sbc.drm_atomic_helper_swap_stateasbuh1hhj ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjphhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hstateh]hstate}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool stallh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstallh]hstall}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjߦhhhjhM ubah}(h]jڦah ](j j eh"]h$]h&]j j )j huh1j hjhM hjܦhhubj )}(hhh]h)}(h(store atomic state into current sw stateh]h(store atomic state into current sw state}(hjۧhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjاhhubah}(h]h ]h"]h$]h&]uh1j hjܦhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` atomic state ``bool stall`` stall for preceding commits **Description** This function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed. For cleanup and error recovery the current state for all changed objects will be swapped into **state**. With that sequence it fits perfectly into the plane prepare/cleanup sequence: 1. Call drm_atomic_helper_prepare_planes() with the staged atomic state. 2. Do any other steps that might fail. 3. Put the staged state into the current state pointers with this function. 4. Actually commit the hardware state. 5. Call drm_atomic_helper_cleanup_planes() with **state**, which since step 3 contains the old state. Also do any other cleanup required with that state. **stall** must be set when nonblocking commits for this driver directly access the :c:type:`drm_plane.state `, :c:type:`drm_crtc.state ` or :c:type:`drm_connector.state ` pointer. With the current atomic helpers this is almost always the case, since the helpers don't pass the right state structures to the callbacks. **Return** Returns 0 on success. Can return -ERESTARTSYS when **stall** is true and the waiting for the previous commits has been interrupted.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh](j| )}(h1``struct drm_atomic_commit *state`` atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj )}(hhh]h)}(h atomic stateh]h atomic state}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hM hj2ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj1hM hjubj| )}(h+``bool stall`` stall for preceding commits h](j )}(h``bool stall``h]j )}(hjUh]h bool stall}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjOubj )}(hhh]h)}(hstall for preceding commitsh]hstall for preceding commits}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhM hjkubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjjhM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed.h]hThis function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hhFor cleanup and error recovery the current state for all changed objects will be swapped into **state**.h](h^For cleanup and error recovery the current state for all changed objects will be swapped into }(hjhhhNhNubj3 )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hMWith that sequence it fits perfectly into the plane prepare/cleanup sequence:h]hMWith that sequence it fits perfectly into the plane prepare/cleanup sequence:}(hj֨hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjMP)}(hhh](h)}(hFCall drm_atomic_helper_prepare_planes() with the staged atomic state. h]h)}(hECall drm_atomic_helper_prepare_planes() with the staged atomic state.h]hECall drm_atomic_helper_prepare_planes() with the staged atomic state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h$Do any other steps that might fail. h]h)}(h#Do any other steps that might fail.h]h#Do any other steps that might fail.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hIPut the staged state into the current state pointers with this function. h]h)}(hHPut the staged state into the current state pointers with this function.h]hHPut the staged state into the current state pointers with this function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h$Actually commit the hardware state. h]h)}(h#Actually commit the hardware state.h]h#Actually commit the hardware state.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hj3ubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jIRjJRjKRhjLRjMRuh1jLPhjubh)}(h5. Call drm_atomic_helper_cleanup_planes() with **state**, which since step 3 contains the old state. Also do any other cleanup required with that state.h](h05. Call drm_atomic_helper_cleanup_planes() with }(hjRhhhNhNubj3 )}(h **state**h]hstate}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubh`, which since step 3 contains the old state. Also do any other cleanup required with that state.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXa**stall** must be set when nonblocking commits for this driver directly access the :c:type:`drm_plane.state `, :c:type:`drm_crtc.state ` or :c:type:`drm_connector.state ` pointer. With the current atomic helpers this is almost always the case, since the helpers don't pass the right state structures to the callbacks.h](j3 )}(h **stall**h]hstall}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjsubhJ must be set when nonblocking commits for this driver directly access the }(hjshhhNhNubh)}(h%:c:type:`drm_plane.state `h]j )}(hjh]hdrm_plane.state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_planeuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjsubh, }(hjshhhNhNubh)}(h#:c:type:`drm_crtc.state `h]j )}(hjh]hdrm_crtc.state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtcuh1hhjhM hjsubh or }(hjshhhNhNubh)}(h-:c:type:`drm_connector.state `h]j )}(hjҩh]hdrm_connector.state}(hjԩhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjЩubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjhM hjsubh pointer. With the current atomic helpers this is almost always the case, since the helpers don’t pass the right state structures to the callbacks.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hReturns 0 on success. Can return -ERESTARTSYS when **stall** is true and the waiting for the previous commits has been interrupted.h](h3Returns 0 on success. Can return -ERESTARTSYS when }(hjhhhNhNubj3 )}(h **stall**h]hstall}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhG is true and the waiting for the previous commits has been interrupted.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_atomic_helper_update_plane (C function) c.drm_atomic_helper_update_planehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hXint drm_atomic_helper_update_plane (struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h]j )}(hXint drm_atomic_helper_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM9 ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhj`hM9 ubj )}(hdrm_atomic_helper_update_planeh]j )}(hdrm_atomic_helper_update_planeh]hdrm_atomic_helper_update_plane}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhj`hM9 ubj)}(h(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjusb c.drm_atomic_helper_update_planeasbuh1hhjubj )}(h h]h }(hjͪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj۪hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]jɪ c.drm_atomic_helper_update_planeasbuh1hhjubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjKhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj ireftypej reftargetjmodnameN classnameNj j )}j ]jɪ c.drm_atomic_helper_update_planeasbuh1hhjmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjmubj )}(hfbh]hfb}(hjȫhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int crtc_xh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݫubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݫubj )}(hcrtc_xh]hcrtc_x}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݫubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int crtc_yh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcrtc_yh]hcrtc_y}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int crtc_wh](j)}(hunsignedh]hunsigned}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj)}(hinth]hint}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(hcrtc_wh]hcrtc_w}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int crtc_hh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjƬhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcrtc_hh]hcrtc_h}(hjԬhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_xh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jɪ c.drm_atomic_helper_update_planeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsrc_xh]hsrc_x}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_yh](h)}(hhh]j )}(huint32_th]huint32_t}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]jɪ c.drm_atomic_helper_update_planeasbuh1hhj1ubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(hsrc_yh]hsrc_y}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_wh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jɪ c.drm_atomic_helper_update_planeasbuh1hhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(hsrc_wh]hsrc_w}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t src_hh](h)}(hhh]j )}(huint32_th]huint32_t}(hjȭhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŭubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjʭmodnameN classnameNj j )}j ]jɪ c.drm_atomic_helper_update_planeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsrc_hh]hsrc_h}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]jɪ c.drm_atomic_helper_update_planeasbuh1hhj ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hctxh]hctx}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjNhhhj`hM9 ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhj`hM9 ubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j hj`hM9 hjGhhubj )}(hhh]h)}(h,Helper for primary plane update using atomich]h,Helper for primary plane update using atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM9 hjhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhj`hM9 ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hXo**Parameters** ``struct drm_plane *plane`` plane object to update ``struct drm_crtc *crtc`` owning CRTC of owning plane ``struct drm_framebuffer *fb`` framebuffer to flip onto plane ``int crtc_x`` x offset of primary plane on **crtc** ``int crtc_y`` y offset of primary plane on **crtc** ``unsigned int crtc_w`` width of primary plane rectangle on **crtc** ``unsigned int crtc_h`` height of primary plane rectangle on **crtc** ``uint32_t src_x`` x offset of **fb** for panning ``uint32_t src_y`` y offset of **fb** for panning ``uint32_t src_w`` width of source rectangle in **fb** ``uint32_t src_h`` height of source rectangle in **fb** ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context **Description** Provides a default plane update handler using the atomic driver interface. **Return** Zero on success, error code on failureh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM= hjubjw )}(hhh](j| )}(h3``struct drm_plane *plane`` plane object to update h](j )}(h``struct drm_plane *plane``h]j )}(hjϮh]hstruct drm_plane *plane}(hjѮhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjͮubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM: hjɮubj )}(hhh]h)}(hplane object to updateh]hplane object to update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM: hjubah}(h]h ]h"]h$]h&]uh1j hjɮubeh}(h]h ]h"]h$]h&]uh1j{ hjhM: hjƮubj| )}(h6``struct drm_crtc *crtc`` owning CRTC of owning plane h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM; hjubj )}(hhh]h)}(howning CRTC of owning planeh]howning CRTC of owning plane}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM; hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM; hjƮubj| )}(h>``struct drm_framebuffer *fb`` framebuffer to flip onto plane h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjAh]hstruct drm_framebuffer *fb}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM< hj;ubj )}(hhh]h)}(hframebuffer to flip onto planeh]hframebuffer to flip onto plane}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhM< hjWubah}(h]h ]h"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]uh1j{ hjVhM< hjƮubj| )}(h5``int crtc_x`` x offset of primary plane on **crtc** h](j )}(h``int crtc_x``h]j )}(hjzh]h int crtc_x}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM= hjtubj )}(hhh]h)}(h%x offset of primary plane on **crtc**h](hx offset of primary plane on }(hjhhhNhNubj3 )}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubeh}(h]h ]h"]h$]h&]uh1hhjhM= hjubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjhM= hjƮubj| )}(h5``int crtc_y`` y offset of primary plane on **crtc** h](j )}(h``int crtc_y``h]j )}(hjh]h int crtc_y}(hjïhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM> hjubj )}(hhh]h)}(h%y offset of primary plane on **crtc**h](hy offset of primary plane on }(hjگhhhNhNubj3 )}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjگubeh}(h]h ]h"]h$]h&]uh1hhj֯hM> hjׯubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj֯hM> hjƮubj| )}(hE``unsigned int crtc_w`` width of primary plane rectangle on **crtc** h](j )}(h``unsigned int crtc_w``h]j )}(hjh]hunsigned int crtc_w}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM? hjubj )}(hhh]h)}(h,width of primary plane rectangle on **crtc**h](h$width of primary plane rectangle on }(hj!hhhNhNubj3 )}(h**crtc**h]hcrtc}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubeh}(h]h ]h"]h$]h&]uh1hhjhM? hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM? hjƮubj| )}(hF``unsigned int crtc_h`` height of primary plane rectangle on **crtc** h](j )}(h``unsigned int crtc_h``h]j )}(hjOh]hunsigned int crtc_h}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM@ hjIubj )}(hhh]h)}(h-height of primary plane rectangle on **crtc**h](h%height of primary plane rectangle on }(hjhhhhNhNubj3 )}(h**crtc**h]hcrtc}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjhubeh}(h]h ]h"]h$]h&]uh1hhjdhM@ hjeubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hjdhM@ hjƮubj| )}(h2``uint32_t src_x`` x offset of **fb** for panning h](j )}(h``uint32_t src_x``h]j )}(hjh]huint32_t src_x}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMA hjubj )}(hhh]h)}(hx offset of **fb** for panningh](h x offset of }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh for panning}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMA hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMA hjƮubj| )}(h2``uint32_t src_y`` y offset of **fb** for panning h](j )}(h``uint32_t src_y``h]j )}(hjh]huint32_t src_y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj߰ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMB hj۰ubj )}(hhh]h)}(hy offset of **fb** for panningh](h y offset of }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh for panning}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMB hjubah}(h]h ]h"]h$]h&]uh1j hj۰ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMB hjƮubj| )}(h7``uint32_t src_w`` width of source rectangle in **fb** h](j )}(h``uint32_t src_w``h]j )}(hj,h]huint32_t src_w}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMC hj&ubj )}(hhh]h)}(h#width of source rectangle in **fb**h](hwidth of source rectangle in }(hjEhhhNhNubj3 )}(h**fb**h]hfb}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjEubeh}(h]h ]h"]h$]h&]uh1hhjAhMC hjBubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1j{ hjAhMC hjƮubj| )}(h8``uint32_t src_h`` height of source rectangle in **fb** h](j )}(h``uint32_t src_h``h]j )}(hjsh]huint32_t src_h}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMD hjmubj )}(hhh]h)}(h$height of source rectangle in **fb**h](hheight of source rectangle in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubeh}(h]h ]h"]h$]h&]uh1hhjhMD hjubah}(h]h ]h"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]uh1j{ hjhMD hjƮubj| )}(h=``struct drm_modeset_acquire_ctx *ctx`` lock acquire context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chME hjubj )}(hhh]h)}(hlock acquire contexth]hlock acquire context}(hjӱhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjϱhME hjбubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjϱhME hjƮubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMG hjubh)}(hJProvides a default plane update handler using the atomic driver interface.h]hJProvides a default plane update handler using the atomic driver interface.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMF hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMH hjubh)}(h&Zero on success, error code on failureh]h&Zero on success, error code on failure}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMI hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_atomic_helper_disable_plane (C function)!c.drm_atomic_helper_disable_planehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hbint drm_atomic_helper_disable_plane (struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h]j )}(haint drm_atomic_helper_disable_plane(struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM| ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]hhhjohM| ubj )}(hdrm_atomic_helper_disable_planeh]j )}(hdrm_atomic_helper_disable_planeh]hdrm_atomic_helper_disable_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj]hhhjohM| ubj)}(h>(struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb!c.drm_atomic_helper_disable_planeasbuh1hhjubj )}(h h]h }(hjܲhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]jز!c.drm_atomic_helper_disable_planeasbuh1hhj ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjZhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hctxh]hctx}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj]hhhjohM| ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjYhhhjohM| ubah}(h]jTah ](j j eh"]h$]h&]j j )j huh1j hjohM| hjVhhubj )}(hhh]h)}(h-Helper for primary plane disable using atomich]h-Helper for primary plane disable using atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM| hjhhubah}(h]h ]h"]h$]h&]uh1j hjVhhhjohM| ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` plane to disable ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context **Description** Provides a default plane disable handler using the atomic driver interface. **Return** Zero on success, error code on failureh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh](j| )}(h-``struct drm_plane *plane`` plane to disable h](j )}(h``struct drm_plane *plane``h]j )}(hjҳh]hstruct drm_plane *plane}(hjԳhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjгubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM} hj̳ubj )}(hhh]h)}(hplane to disableh]hplane to disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM} hjubah}(h]h ]h"]h$]h&]uh1j hj̳ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM} hjɳubj| )}(h=``struct drm_modeset_acquire_ctx *ctx`` lock acquire context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hj h]h#struct drm_modeset_acquire_ctx *ctx}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM~ hjubj )}(hhh]h)}(hlock acquire contexth]hlock acquire context}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM~ hj!ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hM~ hjɳubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjDubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hKProvides a default plane disable handler using the atomic driver interface.h]hKProvides a default plane disable handler using the atomic driver interface.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h **Return**h]j3 )}(hjmh]hReturn}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjkubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h&Zero on success, error code on failureh]h&Zero on success, error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_atomic_helper_set_config (C function)c.drm_atomic_helper_set_confighNtauh1j hjDhhhNhNubj )}(hhh](j )}(h`int drm_atomic_helper_set_config (struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h]j )}(h_int drm_atomic_helper_set_config(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_atomic_helper_set_configh]j )}(hdrm_atomic_helper_set_configh]hdrm_atomic_helper_set_config}(hjӴhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjϴubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h?(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_mode_set *seth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_mode_seth]h drm_mode_set}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjմsbc.drm_atomic_helper_set_configasbuh1hhjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj;hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hseth]hset}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)c.drm_atomic_helper_set_configasbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj]ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(hset a new config from userspaceh]hset a new config from userspace}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjߵhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX~**Parameters** ``struct drm_mode_set *set`` mode set configuration ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default CRTC set_config handler using the atomic driver interface. **NOTE** For backwards compatibility with old userspace this automatically resets the "link-status" property to GOOD, to force any link re-training. The SETCRTC ioctl does not define whether an update does need a full modeset or just a plane update, hence we're allowed to do that. See also drm_connector_set_link_status_property(). **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjw )}(hhh](j| )}(h4``struct drm_mode_set *set`` mode set configuration h](j )}(h``struct drm_mode_set *set``h]j )}(hj#h]hstruct drm_mode_set *set}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj )}(hhh]h)}(hmode set configurationh]hmode set configuration}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM hj9ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj8hM hjubj| )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hj\h]h#struct drm_modeset_acquire_ctx *ctx}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjVubj )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhM hjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hMProvides a default CRTC set_config handler using the atomic driver interface.h]hMProvides a default CRTC set_config handler using the atomic driver interface.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h**NOTE**h]j3 )}(hjh]hNOTE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXCFor backwards compatibility with old userspace this automatically resets the "link-status" property to GOOD, to force any link re-training. The SETCRTC ioctl does not define whether an update does need a full modeset or just a plane update, hence we're allowed to do that. See also drm_connector_set_link_status_property().h]hXIFor backwards compatibility with old userspace this automatically resets the “link-status” property to GOOD, to force any link re-training. The SETCRTC ioctl does not define whether an update does need a full modeset or just a plane update, hence we’re allowed to do that. See also drm_connector_set_link_status_property().}(hjԶhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_atomic_helper_disable_all (C function)c.drm_atomic_helper_disable_allhNtauh1j hjDhhhNhNubj )}(hhh](j )}(h_int drm_atomic_helper_disable_all (struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h]j )}(h^int drm_atomic_helper_disable_all(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&hhhj8hM ubj )}(hdrm_atomic_helper_disable_allh]j )}(hdrm_atomic_helper_disable_allh]hdrm_atomic_helper_disable_all}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&hhhj8hM ubj)}(h=(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjMsbc.drm_atomic_helper_disable_allasbuh1hhjcubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjcubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjٷhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjշubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjշubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_atomic_helper_disable_allasbuh1hhjշubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjշubj9)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjշubj )}(hctxh]hctx}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjշubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubeh}(h]h ]h"]h$]h&]j j uh1jhj&hhhj8hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"hhhj8hM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj8hM hjhhubj )}(hhh]h)}(h$disable all currently active outputsh]h$disable all currently active outputs}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjWhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj8hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jrj$ jrj% j& j' uh1j hhhjDhNhNubj) )}(hXG**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Loops through all connectors, finding those that aren't turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to. This is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown(). Note that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff(). See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj|h]h Parameters}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjԸh]h#struct drm_modeset_acquire_ctx *ctx}(hjָhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjҸubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjθubj )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjθubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubeh}(h]h ]h"]h$]h&]uh1jv hjvubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubh)}(hLoops through all connectors, finding those that aren't turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to.h]hLoops through all connectors, finding those that aren’t turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubh)}(hThis is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown().h]hThis is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown().}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubh)}(hNote that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().h]hNote that if callers haven’t already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubh)}(hcSee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown().h]hcSee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown().}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubh)}(h **Return**h]j3 )}(hjch]hReturn}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_atomic_helper_reset_crtc (C function)c.drm_atomic_helper_reset_crtchNtauh1j hjDhhhNhNubj )}(hhh](j )}(h]int drm_atomic_helper_reset_crtc (struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h]j )}(h\int drm_atomic_helper_reset_crtc(struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM&ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM&ubj )}(hdrm_atomic_helper_reset_crtch]j )}(hdrm_atomic_helper_reset_crtch]hdrm_atomic_helper_reset_crtc}(hjɹhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŹubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM&ubj)}(h<(struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj˹sbc.drm_atomic_helper_reset_crtcasbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݹubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]jc.drm_atomic_helper_reset_crtcasbuh1hhjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjSubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݹubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM&ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM&ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM&hjhhubj )}(hhh]h)}(h"reset the active outputs of a CRTCh]h"reset the active outputs of a CRTC}(hjغhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM&hjպhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM&ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Reset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors. A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges. **NOTE** This relies on resetting :c:type:`drm_crtc_state.connectors_changed `. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM*hjubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM'hjubj )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hM'hj/ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj.hM'hjubj| )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjRh]h#struct drm_modeset_acquire_ctx *ctx}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM(hjLubj )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghM(hjhubah}(h]h ]h"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]uh1j{ hjghM(hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM*hjubh)}(hReset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors.h]hReset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM)hjubh)}(h\A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges.h]h\A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM-hjubh)}(h**NOTE**h]j3 )}(hjûh]hNOTE}(hjŻhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM0hjubh)}(hThis relies on resetting :c:type:`drm_crtc_state.connectors_changed `. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing.h](hThis relies on resetting }(hjٻhhhNhNubh)}(h<:c:type:`drm_crtc_state.connectors_changed `h]j )}(hjh]h!drm_crtc_state.connectors_changed}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM1hjٻubhl. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing.}(hjٻhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM1hjubh)}(h **Return**h]j3 )}(hj h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM5hjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM5hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_atomic_helper_shutdown (C function)c.drm_atomic_helper_shutdownhNtauh1j hjDhhhNhNubj )}(hhh](j )}(h8void drm_atomic_helper_shutdown (struct drm_device *dev)h]j )}(h7void drm_atomic_helper_shutdown(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMVubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhj`hMVubj )}(hdrm_atomic_helper_shutdownh]j )}(hdrm_atomic_helper_shutdownh]hdrm_atomic_helper_shutdown}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhj`hMVubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjusbc.drm_atomic_helper_shutdownasbuh1hhjubj )}(h h]h }(hjͼhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjۼhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjNhhhj`hMVubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhj`hMVubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j hj`hMVhjGhhubj )}(hhh]h)}(hshutdown all CRTCh]hshutdown all CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMVhjhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhj`hMVubeh}(h]h ](j functioneh"]h$]h&]j" j j# j*j$ j*j% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device **Description** This shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume. This is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().h](h)}(h**Parameters**h]j3 )}(hj4h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj2ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMZhj.ubjw )}(hhh]j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjSh]hstruct drm_device *dev}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMWhjMubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMWhjiubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjhhMWhjJubah}(h]h ]h"]h$]h&]uh1jv hj.ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMYhj.ubh)}(hThis shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume.h]hThis shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMXhj.ubh)}(hThis is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().h]hThis is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM\hj.ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_atomic_helper_duplicate_state (C function)#c.drm_atomic_helper_duplicate_statehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hzstruct drm_atomic_commit * drm_atomic_helper_duplicate_state (struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h]j )}(hxstruct drm_atomic_commit *drm_atomic_helper_duplicate_state(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޽hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޽hhhjhMuubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j!drm_atomic_helper_duplicate_statesb#c.drm_atomic_helper_duplicate_stateasbuh1hhj޽hhhjhMuubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޽hhhjhMuubj9)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj޽hhhjhMuubj )}(h!drm_atomic_helper_duplicate_stateh]j )}(hjh]h!drm_atomic_helper_duplicate_state}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj޽hhhjhMuubj)}(h=(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j#c.drm_atomic_helper_duplicate_stateasbuh1hhjXubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjXubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjTubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hj̾hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjȾubj )}(h h]h }(hjپhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjȾubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_atomic_helper_duplicate_stateasbuh1hhjȾubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjȾubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjȾubj )}(hctxh]hctx}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjȾubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjTubeh}(h]h ]h"]h$]h&]j j uh1jhj޽hhhjhMuubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjڽhhhjhMuubah}(h]jսah ](j j eh"]h$]h&]j j )j huh1j hjhMuhj׽hhubj )}(hhh]h)}(h duplicate an atomic state objecth]h duplicate an atomic state object}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMuhjJhhubah}(h]h ]h"]h$]h&]uh1j hj׽hhhjhMuubeh}(h]h ](j functioneh"]h$]h&]j" j j# jej$ jej% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Makes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume. Note that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won't result in confusion or erroneous behaviour. Note that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff(). See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() **Return** A pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.h](h)}(h**Parameters**h]j3 )}(hjoh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjmubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMyhjiubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMvhjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMvhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMvhjubj| )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjǿh]h#struct drm_modeset_acquire_ctx *ctx}(hjɿhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjſubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMwhjubj )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjܿhMwhjݿubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjܿhMwhjubeh}(h]h ]h"]h$]h&]uh1jv hjiubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMyhjiubh)}(hMakes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume.0h]hMakes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMxhjiubh)}(hNote that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won't result in confusion or erroneous behaviour.h]hNote that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won’t result in confusion or erroneous behaviour.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM}hjiubh)}(hNote that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().h]hNote that if callers haven’t already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjiubh)}(hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()h]hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjiubh)}(h **Return**h]j3 )}(hjVh]hReturn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjTubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjiubh)}(hjA pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.h]hjA pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_atomic_helper_suspend (C function)c.drm_atomic_helper_suspendhNtauh1j hjDhhhNhNubj )}(hhh](j )}(hMstruct drm_atomic_commit * drm_atomic_helper_suspend (struct drm_device *dev)h]j )}(hKstruct drm_atomic_commit *drm_atomic_helper_suspend(struct drm_device *dev)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_atomic_helper_suspendsbc.drm_atomic_helper_suspendasbuh1hhjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhMubj )}(hdrm_atomic_helper_suspendh]j )}(hjh]hdrm_atomic_helper_suspend}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]jc.drm_atomic_helper_suspendasbuh1hhjubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hsubsystem-level suspend helperh]hsubsystem-level suspend helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX-**Parameters** ``struct drm_device *dev`` DRM device **Description** Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend. Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device. See also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state() **Return** A pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjw )}(hhh]j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX6Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend.h]hX6Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX!Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device.h]hX!Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hSee also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state()h]hSee also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state()}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j3 )}(hjWh]hReturn}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hA pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.h]hA pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 6drm_atomic_helper_commit_duplicated_state (C function)+c.drm_atomic_helper_commit_duplicated_statehNtauh1j hjDhhhNhNubj )}(hhh](j )}(htint drm_atomic_helper_commit_duplicated_state (struct drm_atomic_commit *state, struct drm_modeset_acquire_ctx *ctx)h]j )}(hsint drm_atomic_helper_commit_duplicated_state(struct drm_atomic_commit *state, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h)drm_atomic_helper_commit_duplicated_stateh]j )}(h)drm_atomic_helper_commit_duplicated_stateh]h)drm_atomic_helper_commit_duplicated_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hF(struct drm_atomic_commit *state, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb+c.drm_atomic_helper_commit_duplicated_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j+c.drm_atomic_helper_commit_duplicated_stateasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjGubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(hcommit duplicated stateh]hcommit duplicated state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` duplicated atomic state to commit ``struct drm_modeset_acquire_ctx *ctx`` pointer to acquire_ctx to use for commit. **Description** The state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit. See also: drm_atomic_helper_suspend() **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjw )}(hhh](j| )}(hF``struct drm_atomic_commit *state`` duplicated atomic state to commit h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj h]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj )}(hhh]h)}(h!duplicated atomic state to commith]h!duplicated atomic state to commit}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hM hj#ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj"hM hjubj| )}(hR``struct drm_modeset_acquire_ctx *ctx`` pointer to acquire_ctx to use for commit. h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjFh]h#struct drm_modeset_acquire_ctx *ctx}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj@ubj )}(hhh]h)}(h)pointer to acquire_ctx to use for commit.h]h)pointer to acquire_ctx to use for commit.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj\ubah}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1j{ hj[hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hThe state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit.h]hThe state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h%See also: drm_atomic_helper_suspend()h]h%See also: drm_atomic_helper_suspend()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_atomic_helper_resume (C function)c.drm_atomic_helper_resumehNtauh1j hjDhhhNhNubj )}(hhh](j )}(hVint drm_atomic_helper_resume (struct drm_device *dev, struct drm_atomic_commit *state)h]j )}(hUint drm_atomic_helper_resume(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM>ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hM>ubj )}(hdrm_atomic_helper_resumeh]j )}(hdrm_atomic_helper_resumeh]hdrm_atomic_helper_resume}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hM>ubj)}(h9(struct drm_device *dev, struct drm_atomic_commit *state)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]j%)}jjsbc.drm_atomic_helper_resumeasbuh1hhj5ubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj5ubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jsc.drm_atomic_helper_resumeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hM>ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hM>ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj hM>hjhhubj )}(hhh]h)}(hsubsystem-level resume helperh]hsubsystem-level resume helper}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM>hj)hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hM>ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jDj$ jDj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_commit *state`` atomic state to resume to **Description** Calls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting. See also: drm_atomic_helper_suspend() **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjNh]h Parameters}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjLubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMBhjHubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjmh]hstruct drm_device *dev}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM?hjgubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM?hjubah}(h]h ]h"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]uh1j{ hjhM?hjdubj| )}(h>``struct drm_atomic_commit *state`` atomic state to resume to h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chM@hjubj )}(hhh]h)}(hatomic state to resume toh]hatomic state to resume to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM@hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM@hjdubeh}(h]h ]h"]h$]h&]uh1jv hjHubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMBhjHubh)}(hXCalls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting.h]hXCalls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMAhjHubh)}(h%See also: drm_atomic_helper_suspend()h]h%See also: drm_atomic_helper_suspend()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMGhjHubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMJhjHubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMGhjHubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_atomic_helper_page_flip (C function)c.drm_atomic_helper_page_fliphNtauh1j hjDhhhNhNubj )}(hhh](j )}(hint drm_atomic_helper_page_flip (struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h]j )}(hint drm_atomic_helper_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXhhhjjhMubj )}(hdrm_atomic_helper_page_fliph]j )}(hdrm_atomic_helper_page_fliph]hdrm_atomic_helper_page_flip}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubah}(h]h ](j j eh"]h$]h&]j j uh1j hjXhhhjjhMubj)}(h(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_atomic_helper_page_flipasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_pending_vblank_event *eventh](j )}(hj h]hstruct}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubh)}(hhh]j )}(hdrm_pending_vblank_eventh]hdrm_pending_vblank_event}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjwubj )}(heventh]hevent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t flagsh](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjSmodnameN classnameNj j )}j ]jc.drm_atomic_helper_page_flipasbuh1hhj/ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj9)}(hjOh]h*}(hj}hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj/ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjXhhhjjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjThhhjjhMubah}(h]jOah ](j j eh"]h$]h&]j j )j huh1j hjjhMhjQhhubj )}(hhh]h)}(hexecute a legacy page fliph]hexecute a legacy page flip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjQhhhjjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjDhNhNubj) )}(hXG**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_framebuffer *fb`` DRM framebuffer ``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion ``uint32_t flags`` flip flags for non-vblank sync'ed updates ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default :c:type:`drm_crtc_funcs.page_flip ` implementation using the atomic driver interface. See also: drm_atomic_helper_page_flip_target() **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(h/``struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hj.h]hstruct drm_framebuffer *fb}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj(ubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjDubah}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hjChMhjubj| )}(hX``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion h](j )}(h*``struct drm_pending_vblank_event *event``h]j )}(hjgh]h&struct drm_pending_vblank_event *event}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjaubj )}(hhh]h)}(h,optional DRM event to signal upon completionh]h,optional DRM event to signal upon completion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj}ubah}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hj|hMhjubj| )}(h=``uint32_t flags`` flip flags for non-vblank sync'ed updates h](j )}(h``uint32_t flags``h]j )}(hjh]huint32_t flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h)flip flags for non-vblank sync'ed updatesh]h+flip flags for non-vblank sync’ed updates}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hxProvides a default :c:type:`drm_crtc_funcs.page_flip ` implementation using the atomic driver interface.h](hProvides a default }(hj*hhhNhNubh)}(h3:c:type:`drm_crtc_funcs.page_flip `h]j )}(hj4h]hdrm_crtc_funcs.page_flip}(hj6hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj*ubh2 implementation using the atomic driver interface.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhMhjubh)}(h.See also: drm_atomic_helper_page_flip_target()h]h.See also: drm_atomic_helper_page_flip_target()}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j3 )}(hjmh]hReturn}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjkubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_atomic_helper_page_flip_target (C function)$c.drm_atomic_helper_page_flip_targethNtauh1j hjDhhhNhNubj )}(hhh](j )}(hint drm_atomic_helper_page_flip_target (struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h]j )}(hint drm_atomic_helper_page_flip_target(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h"drm_atomic_helper_page_flip_targeth]j )}(h"drm_atomic_helper_page_flip_targeth]h"drm_atomic_helper_page_flip_target}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj;hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)$c.drm_atomic_helper_page_flip_targetasbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj]ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_pending_vblank_event *eventh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_pending_vblank_eventh]hdrm_pending_vblank_event}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(heventh]hevent}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t flagsh](h)}(hhh]j )}(huint32_th]huint32_t}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]j)$c.drm_atomic_helper_page_flip_targetasbuh1hhj=ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(hflagsh]hflags}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint32_t targeth](h)}(hhh]j )}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(htargeth]htarget}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j)$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h%do page flip on target vblank period.h]h%do page flip on target vblank period.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjOhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jjj$ jjj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_framebuffer *fb`` DRM framebuffer ``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion ``uint32_t flags`` flip flags for non-vblank sync'ed updates ``uint32_t target`` specifying the target vblank period when the flip to take effect ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default :c:type:`drm_crtc_funcs.page_flip_target ` implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip. **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j3 )}(hjth]h Parameters}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjnubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` DRM CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h/``struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hX``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion h](j )}(h*``struct drm_pending_vblank_event *event``h]j )}(hjh]h&struct drm_pending_vblank_event *event}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h,optional DRM event to signal upon completionh]h,optional DRM event to signal upon completion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h=``uint32_t flags`` flip flags for non-vblank sync'ed updates h](j )}(h``uint32_t flags``h]j )}(hj>h]huint32_t flags}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj8ubj )}(hhh]h)}(h)flip flags for non-vblank sync'ed updatesh]h+flip flags for non-vblank sync’ed updates}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjTubah}(h]h ]h"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hjShMhjubj| )}(hU``uint32_t target`` specifying the target vblank period when the flip to take effect h](j )}(h``uint32_t target``h]j )}(hjwh]huint32_t target}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjqubj )}(hhh]h)}(h@specifying the target vblank period when the flip to take effecth]h@specifying the target vblank period when the flip to take effect}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjnubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjnubh)}(hProvides a default :c:type:`drm_crtc_funcs.page_flip_target ` implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip.h](hProvides a default }(hjhhhNhNubh)}(h::c:type:`drm_crtc_funcs.page_flip_target `h]j )}(hj h]hdrm_crtc_funcs.page_flip_target}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubhw implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(hMhjnubh)}(h **Return**h]j3 )}(hj5h]hReturn}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjnubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjnubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 7drm_atomic_helper_bridge_propagate_bus_fmt (C function),c.drm_atomic_helper_bridge_propagate_bus_fmthNtauh1j hjDhhhNhNubj )}(hhh](j )}(hu32 * drm_atomic_helper_bridge_propagate_bus_fmt (struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h]j )}(hu32 *drm_atomic_helper_bridge_propagate_bus_fmt(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h](h)}(hhh]j )}(hu32h]hu32}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j*drm_atomic_helper_bridge_propagate_bus_fmtsb,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjvhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjvhhhjhMubj )}(h*drm_atomic_helper_bridge_propagate_bus_fmth]j )}(hjh]h*drm_atomic_helper_bridge_propagate_bus_fmt}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhjhMubj)}(h(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h%struct drm_bridge_state *bridge_stateh](j )}(hj h]hstruct}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjimodnameN classnameNj j )}j ]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjEubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjEubj )}(h bridge_stateh]h bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h crtc_stateh]h crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhj%ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjshhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 output_fmth](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h output_fmth]h output_fmt}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int *num_input_fmtsh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hnum_input_fmtsh]hnum_input_fmts}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjvhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjhMubah}(h]jmah ](j j eh"]h$]h&]j j )j huh1j hjhMhjohhubj )}(hhh]h)}(h4Propagate output format to the input end of a bridgeh]h4Propagate output format to the input end of a bridge}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjMhhubah}(h]h ]h"]h$]h&]uh1j hjohhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jhj$ jhj% j& j' uh1j hhhjDhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_bridge_state *bridge_state`` new bridge state ``struct drm_crtc_state *crtc_state`` new CRTC state ``struct drm_connector_state *conn_state`` new connector state ``u32 output_fmt`` tested output bus format ``unsigned int *num_input_fmts`` will contain the size of the returned array **Description** This helper is a pluggable implementation of the :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation for bridges that don't modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to **output_fmt**. **Return** a valid format array of size **num_input_fmts**, or NULL if the allocation failedh](h)}(h**Parameters**h]j3 )}(hjrh]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjlubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h;``struct drm_bridge_state *bridge_state`` new bridge state h](j )}(h)``struct drm_bridge_state *bridge_state``h]j )}(hjh]h%struct drm_bridge_state *bridge_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(hnew bridge stateh]hnew bridge state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h5``struct drm_crtc_state *crtc_state`` new CRTC state h](j )}(h%``struct drm_crtc_state *crtc_state``h]j )}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.cthMhjubj )}(hhh]h)}(hnew CRTC stateh]hnew CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h?``struct drm_connector_state *conn_state`` new connector state h](j )}(h*``struct drm_connector_state *conn_state``h]j )}(hj<h]h&struct drm_connector_state *conn_state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj6ubj )}(hhh]h)}(hnew connector stateh]hnew connector state}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMhjRubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hjQhMhjubj| )}(h,``u32 output_fmt`` tested output bus format h](j )}(h``u32 output_fmt``h]j )}(hjuh]hu32 output_fmt}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjoubj )}(hhh]h)}(htested output bus formath]htested output bus format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hM``unsigned int *num_input_fmts`` will contain the size of the returned array h](j )}(h ``unsigned int *num_input_fmts``h]j )}(hjh]hunsigned int *num_input_fmts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h+will contain the size of the returned arrayh]h+will contain the size of the returned array}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjlubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjlubh)}(hX.This helper is a pluggable implementation of the :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation for bridges that don't modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to **output_fmt**.h](h1This helper is a pluggable implementation of the }(hjhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]j )}(hj h]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh operation for bridges that don’t modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to }(hjhhhNhNubj3 )}(h**output_fmt**h]h output_fmt}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&hMhjlubh)}(h **Return**h]j3 )}(hjEh]hReturn}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjCubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjlubh)}(hQa valid format array of size **num_input_fmts**, or NULL if the allocation failedh](ha valid format array of size }(hj[hhhNhNubj3 )}(h**num_input_fmts**h]hnum_input_fmts}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[ubh", or NULL if the allocation failed}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjlubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j >drm_atomic_helper_bridge_get_hdmi_output_bus_fmts (C function)3c.drm_atomic_helper_bridge_get_hdmi_output_bus_fmtshNtauh1j hjDhhhNhNubj )}(hhh](j )}(hu32 * drm_atomic_helper_bridge_get_hdmi_output_bus_fmts (struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts)h]j )}(hu32 *drm_atomic_helper_bridge_get_hdmi_output_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j1drm_atomic_helper_bridge_get_hdmi_output_bus_fmtssb3c.drm_atomic_helper_bridge_get_hdmi_output_bus_fmtsasbuh1hhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhMubj )}(h1drm_atomic_helper_bridge_get_hdmi_output_bus_fmtsh]j )}(hjh]h1drm_atomic_helper_bridge_get_hdmi_output_bus_fmts}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j3c.drm_atomic_helper_bridge_get_hdmi_output_bus_fmtsasbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h%struct drm_bridge_state *bridge_stateh](j )}(hj h]hstruct}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j3c.drm_atomic_helper_bridge_get_hdmi_output_bus_fmtsasbuh1hhjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjgubj )}(h bridge_stateh]h bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j3c.drm_atomic_helper_bridge_get_hdmi_output_bus_fmtsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h crtc_stateh]h crtc_state}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j3c.drm_atomic_helper_bridge_get_hdmi_output_bus_fmtsasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjGubj )}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int *num_output_fmtsh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hnum_output_fmtsh]hnum_output_fmts}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h7helper implementing atomic_get_output_bus_fmts for HDMIh]h7helper implementing atomic_get_output_bus_fmts for HDMI}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj'hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jBj$ jBj% j& j' uh1j hhhjDhNhNubj) )}(hXw**Parameters** ``struct drm_bridge *bridge`` pointer to :c:type:`struct drm_bridge ` ``struct drm_bridge_state *bridge_state`` pointer to the current bridge state ``struct drm_crtc_state *crtc_state`` pointer to the current CRTC state ``struct drm_connector_state *conn_state`` pointer to the current connector state ``unsigned int *num_output_fmts`` pointer to where the number of entries in the returned array will be stored. Set to 0 if unsuccessful. **Description** Common implementation for the :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` operation that's applicable to HDMI connectors. **Return** a newly allocated array of u32 values of length \***num_output_fmts**, representing all the MEDIA_BUS_FMTS\_ for the current connector state's chosen HDMI output bits per compoennt, or ``NULL`` if it fails to allocate one.h](h)}(h**Parameters**h]j3 )}(hjLh]h Parameters}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjFubjw )}(hhh](j| )}(hR``struct drm_bridge *bridge`` pointer to :c:type:`struct drm_bridge ` h](j )}(h``struct drm_bridge *bridge``h]j )}(hjkh]hstruct drm_bridge *bridge}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjeubj )}(hhh]h)}(h3pointer to :c:type:`struct drm_bridge `h](h pointer to }(hjhhhNhNubh)}(h(:c:type:`struct drm_bridge `h]j )}(hjh]hstruct drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjbubj| )}(hN``struct drm_bridge_state *bridge_state`` pointer to the current bridge state h](j )}(h)``struct drm_bridge_state *bridge_state``h]j )}(hjh]h%struct drm_bridge_state *bridge_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h#pointer to the current bridge stateh]h#pointer to the current bridge state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjbubj| )}(hH``struct drm_crtc_state *crtc_state`` pointer to the current CRTC state h](j )}(h%``struct drm_crtc_state *crtc_state``h]j )}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj )}(hhh]h)}(h!pointer to the current CRTC stateh]h!pointer to the current CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjbubj| )}(hR``struct drm_connector_state *conn_state`` pointer to the current connector state h](j )}(h*``struct drm_connector_state *conn_state``h]j )}(hj5h]h&struct drm_connector_state *conn_state}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhj/ubj )}(hhh]h)}(h&pointer to the current connector stateh]h&pointer to the current connector state}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjKubah}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hjJhMhjbubj| )}(h``unsigned int *num_output_fmts`` pointer to where the number of entries in the returned array will be stored. Set to 0 if unsuccessful. h](j )}(h!``unsigned int *num_output_fmts``h]j )}(hjnh]hunsigned int *num_output_fmts}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjhubj )}(hhh]h)}(hfpointer to where the number of entries in the returned array will be stored. Set to 0 if unsuccessful.h]hfpointer to where the number of entries in the returned array will be stored. Set to 0 if unsuccessful.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjbubeh}(h]h ]h"]h$]h&]uh1jv hjFubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjFubh)}(hCommon implementation for the :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` operation that's applicable to HDMI connectors.h](hCommon implementation for the }(hjhhhNhNubh)}(hH:c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts `h]j )}(hjh]h+drm_bridge_funcs.atomic_get_output_bus_fmts}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh2 operation that’s applicable to HDMI connectors.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjFubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjFubh)}(ha newly allocated array of u32 values of length \***num_output_fmts**, representing all the MEDIA_BUS_FMTS\_ for the current connector state's chosen HDMI output bits per compoennt, or ``NULL`` if it fails to allocate one.h](ha newly allocated array of u32 values of length ***num_output_fmts**, representing all the MEDIA_BUS_FMTS_ for the current connector state’s chosen HDMI output bits per compoennt, or }(hj hhhNhNubj )}(h``NULL``h]hNULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh if it fails to allocate one.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:70: ./drivers/gpu/drm/drm_atomic_helper.chMhjFubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjDhhhNhNubeh}(h]j!ah ]h"]helper functions referenceah$]h&]uh1hhjBhhhhhKAubh)}(hhh](h)}(h%Atomic State Reset and Initializationh]h%Atomic State Reset and Initialization}(hj<hhhNhNubah}(h]h ]h"]h$]h&]hj=uh1hhj9hhhhhKJubh)}(hXsBoth the drm core and the atomic helpers assume that there is always the full and correct atomic software state for all connectors, CRTCs and planes available. Which is a bit a problem on driver load and also after system suspend. One way to solve this is to have a hardware state read-out infrastructure which reconstructs the full software state (e.g. the i915 driver).h]hXsBoth the drm core and the atomic helpers assume that there is always the full and correct atomic software state for all connectors, CRTCs and planes available. Which is a bit a problem on driver load and also after system suspend. One way to solve this is to have a hardware state read-out infrastructure which reconstructs the full software state (e.g. the i915 driver).}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:76: ./drivers/gpu/drm/drm_atomic_state_helper.chK-hj9hhubh)}(hThe simpler solution is to just reset the software state to everything off, which is easiest to do by calling drm_mode_config_reset(). To facilitate this the atomic helpers provide default reset implementations for all hooks.h]hThe simpler solution is to just reset the software state to everything off, which is easiest to do by calling drm_mode_config_reset(). To facilitate this the atomic helpers provide default reset implementations for all hooks.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:76: ./drivers/gpu/drm/drm_atomic_state_helper.chK4hj9hhubh)}(hXHOn the upside the precise state tracking of atomic simplifies system suspend and resume a lot. For drivers using drm_mode_config_reset() a complete recipe is implemented in drm_atomic_helper_suspend() and drm_atomic_helper_resume(). For other drivers the building blocks are split out, see the documentation for these functions.h]hXHOn the upside the precise state tracking of atomic simplifies system suspend and resume a lot. For drivers using drm_mode_config_reset() a complete recipe is implemented in drm_atomic_helper_suspend() and drm_atomic_helper_resume(). For other drivers the building blocks are split out, see the documentation for these functions.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:76: ./drivers/gpu/drm/drm_atomic_state_helper.chK8hj9hhubeh}(h]jCah ]h"]%atomic state reset and initializationah$]h&]uh1hhjBhhhhhKJubh)}(hhh](h)}(hAtomic State Helper Referenceh]hAtomic State Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hj_uh1hhj~hhhhhKPubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0__drm_atomic_helper_crtc_state_init (C function)%c.__drm_atomic_helper_crtc_state_inithNtauh1j hj~hhhNhNubj )}(hhh](j )}(hcvoid __drm_atomic_helper_crtc_state_init (struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h]j )}(hbvoid __drm_atomic_helper_crtc_state_init(struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKBubj )}(h#__drm_atomic_helper_crtc_state_inith]j )}(h#__drm_atomic_helper_crtc_state_inith]h#__drm_atomic_helper_crtc_state_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKBubj)}(h:(struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h](j)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb%c.__drm_atomic_helper_crtc_state_initasbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h crtc_stateh]h crtc_state}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j%c.__drm_atomic_helper_crtc_state_initasbuh1hhjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjSubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKBubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKBhjhhubj )}(hhh]h)}(hInitialize the CRTC stateh]hInitialize the CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKBhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKBubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX%**Parameters** ``struct drm_crtc_state *crtc_state`` atomic CRTC state, must not be NULL ``struct drm_crtc *crtc`` CRTC object, must not be NULL **Description** Initializes the newly allocated **crtc_state** with default values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKFhjubjw )}(hhh](j| )}(hJ``struct drm_crtc_state *crtc_state`` atomic CRTC state, must not be NULL h](j )}(h%``struct drm_crtc_state *crtc_state``h]j )}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKChjubj )}(hhh]h)}(h#atomic CRTC state, must not be NULLh]h#atomic CRTC state, must not be NULL}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hKChj/ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj.hKChjubj| )}(h8``struct drm_crtc *crtc`` CRTC object, must not be NULL h](j )}(h``struct drm_crtc *crtc``h]j )}(hjRh]hstruct drm_crtc *crtc}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKDhjLubj )}(hhh]h)}(hCRTC object, must not be NULLh]hCRTC object, must not be NULL}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghKDhjhubah}(h]h ]h"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]uh1j{ hjghKDhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKFhjubh)}(h|Initializes the newly allocated **crtc_state** with default values. This is useful for drivers that subclass the CRTC state.h](h Initializes the newly allocated }(hjhhhNhNubj3 )}(h**crtc_state**h]h crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhN with default values. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKEhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +__drm_atomic_helper_crtc_reset (C function) c.__drm_atomic_helper_crtc_resethNtauh1j hj~hhhNhNubj )}(hhh](j )}(h^void __drm_atomic_helper_crtc_reset (struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h]j )}(h]void __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKSubj )}(h__drm_atomic_helper_crtc_reseth]j )}(h__drm_atomic_helper_crtc_reseth]h__drm_atomic_helper_crtc_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKSubj)}(h:(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j%)}jjsb c.__drm_atomic_helper_crtc_resetasbuh1hhjubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j[ c.__drm_atomic_helper_crtc_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h crtc_stateh]h crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKSubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKSubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKShjhhubj )}(hhh]h)}(hreset state on CRTCh]hreset state on CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKShjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKSubeh}(h]h ](j functioneh"]h$]h&]j" j j# j,j$ j,j% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_crtc *crtc`` drm CRTC ``struct drm_crtc_state *crtc_state`` CRTC state to assign **Description** Initializes the newly allocated **crtc_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **crtc**, usually required when initializing the drivers or when called from the :c:type:`drm_crtc_funcs.reset ` hook. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j3 )}(hj6h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKWhj0ubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` drm CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjUh]hstruct drm_crtc *crtc}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKThjOubj )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhKThjkubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjjhKThjLubj| )}(h;``struct drm_crtc_state *crtc_state`` CRTC state to assign h](j )}(h%``struct drm_crtc_state *crtc_state``h]j )}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKUhjubj )}(hhh]h)}(hCRTC state to assignh]hCRTC state to assign}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKUhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKUhjLubeh}(h]h ]h"]h$]h&]uh1jv hj0ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKWhj0ubh)}(hInitializes the newly allocated **crtc_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **crtc**, usually required when initializing the drivers or when called from the :c:type:`drm_crtc_funcs.reset ` hook.h](h Initializes the newly allocated }(hjhhhNhNubj3 )}(h**crtc_state**h]h crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and assigns it to the }(hjhhhNhNubh)}(h$:c:type:`drm_crtc->state `h]j )}(hjh]hdrm_crtc->state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtcuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKVhjubh pointer of }(hjhhhNhNubj3 )}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhI, usually required when initializing the drivers or when called from the }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]j )}(hj1h]hdrm_crtc_funcs.reset}(hj3hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhjhKVhjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKVhj0ubh)}(h8This is useful for drivers that subclass the CRTC state.h]h8This is useful for drivers that subclass the CRTC state.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chK[hj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_atomic_helper_crtc_reset (C function)c.drm_atomic_helper_crtc_resethNtauh1j hj~hhhNhNubj )}(hhh](j )}(h9void drm_atomic_helper_crtc_reset (struct drm_crtc *crtc)h]j )}(h8void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKmubj )}(hdrm_atomic_helper_crtc_reseth]j )}(hdrm_atomic_helper_crtc_reseth]hdrm_atomic_helper_crtc_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKmubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_atomic_helper_crtc_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKmubah}(h]jzah ](j j eh"]h$]h&]j j )j huh1j hjhKmhj|hhubj )}(hhh]h)}(hFdefault :c:type:`drm_crtc_funcs.reset ` hook for CRTCsh](hdefault }(hjGhhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]j )}(hjQh]hdrm_crtc_funcs.reset}(hjShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_atomic_helper_crtc_resetasbj drm_crtc_funcsuh1hhjhKBhjGubh hook for CRTCs}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKmhjDhhubah}(h]h ]h"]h$]h&]uh1j hj|hhhjhKmubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC **Description** Resets the atomic state for **crtc** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKqhjubjw )}(hhh]j| )}(h#``struct drm_crtc *crtc`` drm CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKnhjubj )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKnhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKnhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKphjubh)}(hResets the atomic state for **crtc** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hjhhhNhNubj3 )}(h**crtc**h]hcrtc}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKohjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0drm_atomic_helper_crtc_create_state (C function)%c.drm_atomic_helper_crtc_create_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hSstruct drm_crtc_state * drm_atomic_helper_crtc_create_state (struct drm_crtc *crtc)h]j )}(hQstruct drm_crtc_state *drm_atomic_helper_crtc_create_state(struct drm_crtc *crtc)h](j )}(hj h]hstruct}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhjOhKubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]j%)}j#drm_atomic_helper_crtc_create_statesb%c.drm_atomic_helper_crtc_create_stateasbuh1hhj>hhhjOhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhjOhKubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj>hhhjOhKubj )}(h#drm_atomic_helper_crtc_create_stateh]j )}(hjh]h#drm_atomic_helper_crtc_create_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>hhhjOhKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j}%c.drm_atomic_helper_crtc_create_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj>hhhjOhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:hhhjOhKubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j hjOhKhj7hhubj )}(hhh]h)}(hTdefault :c:type:`drm_crtc_funcs.atomic_create_state ` hook for crtcsh](hdefault }(hj=hhhNhNubh)}(h=:c:type:`drm_crtc_funcs.atomic_create_state `h]j )}(hjGh]h"drm_crtc_funcs.atomic_create_state}(hjIhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j}%c.drm_atomic_helper_crtc_create_stateasbj drm_crtc_funcsuh1hhjhKBhj=ubh hook for crtcs}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj:hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhjOhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j}j$ j}j% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_crtc *crtc`` crtc object **Description** Allocates and initializes pristine **drm_crtc_state**. This is useful for drivers that don't subclass **drm_crtc_state**. **Return** Pointer to new crtc state, or ERR_PTR on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubjw )}(hhh]j| )}(h&``struct drm_crtc *crtc`` crtc object h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj )}(hhh]h)}(h crtc objecth]h crtc object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(h7Allocates and initializes pristine **drm_crtc_state**.h](h$Allocates and initializes pristine }(hjhhhNhNubj3 )}(h**drm_crtc_state**h]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(hBThis is useful for drivers that don't subclass **drm_crtc_state**.h](h1This is useful for drivers that don’t subclass }(hjhhhNhNubj3 )}(h**drm_crtc_state**h]hdrm_crtc_state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(h **Return**h]j3 )}(hj;h]hReturn}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(h1Pointer to new crtc state, or ERR_PTR on failure.h]h1Pointer to new crtc state, or ERR_PTR on failure.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5__drm_atomic_helper_crtc_duplicate_state (C function)*c.__drm_atomic_helper_crtc_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hcvoid __drm_atomic_helper_crtc_duplicate_state (struct drm_crtc *crtc, struct drm_crtc_state *state)h]j )}(hbvoid __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|hhhjhKubj )}(h(__drm_atomic_helper_crtc_duplicate_stateh]j )}(h(__drm_atomic_helper_crtc_duplicate_stateh]h(__drm_atomic_helper_crtc_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj|hhhjhKubj)}(h5(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb*c.__drm_atomic_helper_crtc_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_crtc_state *stateh](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]j*c.__drm_atomic_helper_crtc_duplicate_stateasbuh1hhj+ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj9)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj+ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj|hhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjxhhhjhKubah}(h]jsah ](j j eh"]h$]h&]j j )j huh1j hjhKhjuhhubj )}(hhh]h)}(hcopy atomic CRTC stateh]hcopy atomic CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjuhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_crtc *crtc`` CRTC object ``struct drm_crtc_state *state`` atomic CRTC state **Description** Copies atomic state from a CRTC's current state and resets inferred values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubjw )}(hhh](j| )}(h&``struct drm_crtc *crtc`` CRTC object h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj )}(hhh]h)}(h CRTC objecth]h CRTC object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h3``struct drm_crtc_state *state`` atomic CRTC state h](j )}(h ``struct drm_crtc_state *state``h]j )}(hj*h]hstruct drm_crtc_state *state}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj$ubj )}(hhh]h)}(hatomic CRTC stateh]hatomic CRTC state}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hKhj@ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hKhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjeh]h Description}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(hCopies atomic state from a CRTC's current state and resets inferred values. This is useful for drivers that subclass the CRTC state.h]hCopies atomic state from a CRTC’s current state and resets inferred values. This is useful for drivers that subclass the CRTC state.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 3drm_atomic_helper_crtc_duplicate_state (C function)(c.drm_atomic_helper_crtc_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hVstruct drm_crtc_state * drm_atomic_helper_crtc_duplicate_state (struct drm_crtc *crtc)h]j )}(hTstruct drm_crtc_state *drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j&drm_atomic_helper_crtc_duplicate_statesb(c.drm_atomic_helper_crtc_duplicate_stateasbuh1hhjhhhjhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhKubj )}(h&drm_atomic_helper_crtc_duplicate_stateh]j )}(hjh]h&drm_atomic_helper_crtc_duplicate_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]j(c.drm_atomic_helper_crtc_duplicate_stateasbuh1hhj ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjnhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hcrtch]hcrtc}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC **Description** Default CRTC state duplicate hook for drivers which don't have their own subclassed CRTC state structure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubjw )}(hhh]j| )}(h#``struct drm_crtc *crtc`` drm CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(hiDefault CRTC state duplicate hook for drivers which don't have their own subclassed CRTC state structure.h]hkDefault CRTC state duplicate hook for drivers which don’t have their own subclassed CRTC state structure.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 3__drm_atomic_helper_crtc_destroy_state (C function)(c.__drm_atomic_helper_crtc_destroy_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hJvoid __drm_atomic_helper_crtc_destroy_state (struct drm_crtc_state *state)h]j )}(hIvoid __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbhhhjthKubj )}(h&__drm_atomic_helper_crtc_destroy_stateh]j )}(h&__drm_atomic_helper_crtc_destroy_stateh]h&__drm_atomic_helper_crtc_destroy_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjbhhhjthKubj)}(h(struct drm_crtc_state *state)h]j)}(hstruct drm_crtc_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb(c.__drm_atomic_helper_crtc_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjbhhhjthKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^hhhjthKubah}(h]jYah ](j j eh"]h$]h&]j j )j huh1j hjthKhj[hhubj )}(hhh]h)}(hrelease CRTC stateh]hrelease CRTC state}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj#hhubah}(h]h ]h"]h$]h&]uh1j hj[hhhjthKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j>j$ j>j% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_crtc_state *state`` CRTC state object to release **Description** Releases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j3 )}(hjHh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjBubjw )}(hhh]j| )}(h>``struct drm_crtc_state *state`` CRTC state object to release h](j )}(h ``struct drm_crtc_state *state``h]j )}(hjgh]hstruct drm_crtc_state *state}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjaubj )}(hhh]h)}(hCRTC state object to releaseh]hCRTC state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hKhj}ubah}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hj|hKhj^ubah}(h]h ]h"]h$]h&]uh1jv hjBubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjBubh)}(hReleases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.h]hReleases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjBubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_atomic_helper_crtc_destroy_state (C function)&c.drm_atomic_helper_crtc_destroy_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(h_void drm_atomic_helper_crtc_destroy_state (struct drm_crtc *crtc, struct drm_crtc_state *state)h]j )}(h^void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h$drm_atomic_helper_crtc_destroy_stateh]j )}(h$drm_atomic_helper_crtc_destroy_stateh]h$drm_atomic_helper_crtc_destroy_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h5(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]j%)}jj sb&c.drm_atomic_helper_crtc_destroy_stateasbuh1hhj ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjphhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hcrtch]hcrtc}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_crtc_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j^&c.drm_atomic_helper_crtc_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j/j$ j/j% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC ``struct drm_crtc_state *state`` CRTC state object to release **Description** Default CRTC state destroy hook for drivers which don't have their own subclassed CRTC state structure.h](h)}(h**Parameters**h]j3 )}(hj9h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj3ubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` drm CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjXh]hstruct drm_crtc *crtc}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjRubj )}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhKhjnubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjmhKhjOubj| )}(h>``struct drm_crtc_state *state`` CRTC state object to release h](j )}(h ``struct drm_crtc_state *state``h]j )}(hjh]hstruct drm_crtc_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj )}(hhh]h)}(hCRTC state object to releaseh]hCRTC state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjOubeh}(h]h ]h"]h$]h&]uh1jv hj3ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj3ubh)}(hgDefault CRTC state destroy hook for drivers which don't have their own subclassed CRTC state structure.h]hiDefault CRTC state destroy hook for drivers which don’t have their own subclassed CRTC state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1__drm_atomic_helper_plane_state_init (C function)&c.__drm_atomic_helper_plane_state_inithNtauh1j hj~hhhNhNubj )}(hhh](j )}(hhvoid __drm_atomic_helper_plane_state_init (struct drm_plane_state *plane_state, struct drm_plane *plane)h]j )}(hgvoid __drm_atomic_helper_plane_state_init(struct drm_plane_state *plane_state, struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhM ubj )}(h$__drm_atomic_helper_plane_state_inith]j )}(h$__drm_atomic_helper_plane_state_inith]h$__drm_atomic_helper_plane_state_init}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhM ubj)}(h>(struct drm_plane_state *plane_state, struct drm_plane *plane)h](j)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]j%)}jj4sb&c.__drm_atomic_helper_plane_state_initasbuh1hhjJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJubj )}(h plane_stateh]h plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubj)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j&c.__drm_atomic_helper_plane_state_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(hInitialize the plane stateh]hInitialize the plane state}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hj>hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jYj$ jYj% j& j' uh1j hhhj~hNhNubj) )}(hX-**Parameters** ``struct drm_plane_state *plane_state`` atomic plane state, must not be NULL ``struct drm_plane *plane`` plane object, must not be NULL **Description** Initializes the newly allocated **plane_state** with default values. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j3 )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hj]ubjw )}(hhh](j| )}(hM``struct drm_plane_state *plane_state`` atomic plane state, must not be NULL h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hjh]h#struct drm_plane_state *plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hj|ubj )}(hhh]h)}(h$atomic plane state, must not be NULLh]h$atomic plane state, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjyubj| )}(h;``struct drm_plane *plane`` plane object, must not be NULL h](j )}(h``struct drm_plane *plane``h]j )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hjubj )}(hhh]h)}(hplane object, must not be NULLh]hplane object, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjyubeh}(h]h ]h"]h$]h&]uh1jv hj]ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hj]ubh)}(h~Initializes the newly allocated **plane_state** with default values. This is useful for drivers that subclass the plane state.h](h Initializes the newly allocated }(hj hhhNhNubj3 )}(h**plane_state**h]h plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubhO with default values. This is useful for drivers that subclass the plane state.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,__drm_atomic_helper_plane_reset (C function)!c.__drm_atomic_helper_plane_resethNtauh1j hj~hhhNhNubj )}(hhh](j )}(hcvoid __drm_atomic_helper_plane_reset (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(hbvoid __drm_atomic_helper_plane_reset(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMOubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhj[hMOubj )}(h__drm_atomic_helper_plane_reseth]j )}(h__drm_atomic_helper_plane_reseth]h__drm_atomic_helper_plane_reset}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjIhhhj[hMOubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjpsb!c.__drm_atomic_helper_plane_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.__drm_atomic_helper_plane_resetasbuh1hhjubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjFhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h plane_stateh]h plane_state}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjIhhhj[hMOubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjEhhhj[hMOubah}(h]j@ah ](j j eh"]h$]h&]j j )j huh1j hj[hMOhjBhhubj )}(hhh]h)}(hreset state on planeh]hreset state on plane}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMOhjzhhubah}(h]h ]h"]h$]h&]uh1j hjBhhhj[hMOubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` drm plane ``struct drm_plane_state *plane_state`` plane state to assign **Description** Initializes the newly allocated **plane_state** and assigns it to the :c:type:`drm_plane->state ` pointer of **plane**, usually required when initializing the drivers or when called from the :c:type:`drm_plane_funcs.reset ` hook. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMShjubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` drm plane h](j )}(h``struct drm_plane *plane``h]j )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMPhjubj )}(hhh]h)}(h drm planeh]h drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMPhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMPhjubj| )}(h>``struct drm_plane_state *plane_state`` plane state to assign h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hjh]h#struct drm_plane_state *plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMQhjubj )}(hhh]h)}(hplane state to assignh]hplane state to assign}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMQhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMQhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj2h]h Description}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMShjubh)}(hXInitializes the newly allocated **plane_state** and assigns it to the :c:type:`drm_plane->state ` pointer of **plane**, usually required when initializing the drivers or when called from the :c:type:`drm_plane_funcs.reset ` hook.h](h Initializes the newly allocated }(hjHhhhNhNubj3 )}(h**plane_state**h]h plane_state}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubh and assigns it to the }(hjHhhhNhNubh)}(h&:c:type:`drm_plane->state `h]j )}(hjdh]hdrm_plane->state}(hjfhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_planeuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMRhjHubh pointer of }(hjHhhhNhNubj3 )}(h **plane**h]hplane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubhI, usually required when initializing the drivers or when called from the }(hjHhhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]j )}(hjh]hdrm_plane_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhjhMRhjHubh hook.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMRhjubh)}(h9This is useful for drivers that subclass the plane state.h]h9This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMWhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_atomic_helper_plane_reset (C function)c.drm_atomic_helper_plane_resethNtauh1j hj~hhhNhNubj )}(hhh](j )}(h` hook for planesh](hdefault }(hjhhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]j )}(hjh]hdrm_plane_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jgc.drm_atomic_helper_plane_resetasbj drm_plane_funcsuh1hhjhKBhjubh hook for planes}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMehjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMeubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_plane *plane`` drm plane **Description** Resets the atomic state for **plane** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMihjubjw )}(hhh]j| )}(h&``struct drm_plane *plane`` drm plane h](j )}(h``struct drm_plane *plane``h]j )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMfhjubj )}(hhh]h)}(h drm planeh]h drm plane}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMfhj/ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj.hMfhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjTh]h Description}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhhjubh)}(hResets the atomic state for **plane** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hjjhhhNhNubj3 )}(h **plane**h]hplane}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMghjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_atomic_helper_plane_create_state (C function)&c.drm_atomic_helper_plane_create_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hWstruct drm_plane_state * drm_atomic_helper_plane_create_state (struct drm_plane *plane)h]j )}(hUstruct drm_plane_state *drm_atomic_helper_plane_create_state(struct drm_plane *plane)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMxubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j$drm_atomic_helper_plane_create_statesb&c.drm_atomic_helper_plane_create_stateasbuh1hhjhhhjhMxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMxubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhMxubj )}(h$drm_atomic_helper_plane_create_stateh]j )}(hjh]h$drm_atomic_helper_plane_create_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMxubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjEmodnameN classnameNj j )}j ]j&c.drm_atomic_helper_plane_create_stateasbuh1hhj!ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj9)}(hjOh]h*}(hjohhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj!ubj )}(hplaneh]hplane}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMxubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMxubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMxhjhhubj )}(hhh]h)}(hWdefault :c:type:`drm_plane_funcs.atomic_create_state ` hook for planesh](hdefault }(hjhhhNhNubh)}(h?:c:type:`drm_plane_funcs.atomic_create_state `h]j )}(hjh]h#drm_plane_funcs.atomic_create_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j&c.drm_atomic_helper_plane_create_stateasbj drm_plane_funcsuh1hhjhKBhjubh hook for planes}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMxhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMxubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX **Parameters** ``struct drm_plane *plane`` plane object **Description** Allocates and initializes pristine **drm_plane_state**. This is useful for drivers that don't subclass **drm_plane_state**. **Return** Pointer to new plane state, or ERR_PTR on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM|hjubjw )}(hhh]j| )}(h)``struct drm_plane *plane`` plane object h](j )}(h``struct drm_plane *plane``h]j )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMyhj ubj )}(hhh]h)}(h plane objecth]h plane object}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMyhj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMyhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM{hjubh)}(h7Allocates and initializes pristine **drm_plane_state**.h](h#Allocates and initializes pristine }(hj`hhhNhNubj3 )}(h**drm_plane_state**h]hdrm_plane_state}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubh.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMzhjubh)}(hCThis is useful for drivers that don't subclass **drm_plane_state**.h](h1This is useful for drivers that don’t subclass }(hjhhhNhNubj3 )}(h**drm_plane_state**h]hdrm_plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM|hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM~hjubh)}(h2Pointer to new plane state, or ERR_PTR on failure.h]h2Pointer to new plane state, or ERR_PTR on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 6__drm_atomic_helper_plane_duplicate_state (C function)+c.__drm_atomic_helper_plane_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hgvoid __drm_atomic_helper_plane_duplicate_state (struct drm_plane *plane, struct drm_plane_state *state)h]j )}(hfvoid __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h)__drm_atomic_helper_plane_duplicate_stateh]j )}(h)__drm_atomic_helper_plane_duplicate_stateh]h)__drm_atomic_helper_plane_duplicate_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]j%)}jj sb+c.__drm_atomic_helper_plane_duplicate_stateasbuh1hhj"ubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj9)}(hjOh]h*}(hjrhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"ubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j`+c.__drm_atomic_helper_plane_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hcopy atomic plane stateh]hcopy atomic plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j1j$ j1j% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_plane *plane`` plane object ``struct drm_plane_state *state`` atomic plane state **Description** Copies atomic state from a plane's current state. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j3 )}(hj;h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj5ubjw )}(hhh](j| )}(h)``struct drm_plane *plane`` plane object h](j )}(h``struct drm_plane *plane``h]j )}(hjZh]hstruct drm_plane *plane}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjTubj )}(hhh]h)}(h plane objecth]h plane object}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMhjpubah}(h]h ]h"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]uh1j{ hjohMhjQubj| )}(h5``struct drm_plane_state *state`` atomic plane state h](j )}(h!``struct drm_plane_state *state``h]j )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(hatomic plane stateh]hatomic plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjQubeh}(h]h ]h"]h$]h&]uh1jv hj5ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj5ubh)}(hkCopies atomic state from a plane's current state. This is useful for drivers that subclass the plane state.h]hmCopies atomic state from a plane’s current state. This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_atomic_helper_plane_duplicate_state (C function))c.drm_atomic_helper_plane_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hZstruct drm_plane_state * drm_atomic_helper_plane_duplicate_state (struct drm_plane *plane)h]j )}(hXstruct drm_plane_state *drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j%)}j'drm_atomic_helper_plane_duplicate_statesb)c.drm_atomic_helper_plane_duplicate_stateasbuh1hhjhhhj hMubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj9)}(hjOh]h*}(hjahhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhj hMubj )}(h'drm_atomic_helper_plane_duplicate_stateh]j )}(hjPh]h'drm_atomic_helper_plane_duplicate_state}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jN)c.drm_atomic_helper_plane_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj hMhjhhubj )}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j&j$ j&j% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_plane *plane`` drm plane **Description** Default plane state duplicate hook for drivers which don't have their own subclassed plane state structure.h](h)}(h**Parameters**h]j3 )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj*ubjw )}(hhh]j| )}(h&``struct drm_plane *plane`` drm plane h](j )}(h``struct drm_plane *plane``h]j )}(hjOh]hstruct drm_plane *plane}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjIubj )}(hhh]h)}(h drm planeh]h drm plane}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hjdhMhjFubah}(h]h ]h"]h$]h&]uh1jv hj*ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj*ubh)}(hkDefault plane state duplicate hook for drivers which don't have their own subclassed plane state structure.h]hmDefault plane state duplicate hook for drivers which don’t have their own subclassed plane state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4__drm_atomic_helper_plane_destroy_state (C function))c.__drm_atomic_helper_plane_destroy_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hLvoid __drm_atomic_helper_plane_destroy_state (struct drm_plane_state *state)h]j )}(hKvoid __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h'__drm_atomic_helper_plane_destroy_stateh]j )}(h'__drm_atomic_helper_plane_destroy_stateh]h'__drm_atomic_helper_plane_destroy_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_plane_state *state)h]j)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j%)}jjsb)c.__drm_atomic_helper_plane_destroy_stateasbuh1hhjubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjXhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hrelease plane stateh]hrelease plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_plane_state *state`` plane state object to release **Description** Releases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjw )}(hhh]j| )}(h@``struct drm_plane_state *state`` plane state object to release h](j )}(h!``struct drm_plane_state *state``h]j )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(hplane state object to releaseh]hplane state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hReleases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.h]hReleases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_atomic_helper_plane_destroy_state (C function)'c.drm_atomic_helper_plane_destroy_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hcvoid drm_atomic_helper_plane_destroy_state (struct drm_plane *plane, struct drm_plane_state *state)h]j )}(hbvoid drm_atomic_helper_plane_destroy_state(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhj^hMubj )}(h%drm_atomic_helper_plane_destroy_stateh]j )}(h%drm_atomic_helper_plane_destroy_stateh]h%drm_atomic_helper_plane_destroy_state}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLhhhj^hMubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjssb'c.drm_atomic_helper_plane_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.drm_atomic_helper_plane_destroy_stateasbuh1hhjubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjIhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjLhhhj^hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhj^hMubah}(h]jCah ](j j eh"]h$]h&]j j )j huh1j hj^hMhjEhhubj )}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj}hhubah}(h]h ]h"]h$]h&]uh1j hjEhhhj^hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_plane *plane`` drm plane ``struct drm_plane_state *state`` plane state object to release **Description** Default plane state destroy hook for drivers which don't have their own subclassed plane state structure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` drm plane h](j )}(h``struct drm_plane *plane``h]j )}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h drm planeh]h drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h@``struct drm_plane_state *state`` plane state object to release h](j )}(h!``struct drm_plane_state *state``h]j )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(hplane state object to releaseh]hplane state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj5h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hiDefault plane state destroy hook for drivers which don't have their own subclassed plane state structure.h]hkDefault plane state destroy hook for drivers which don’t have their own subclassed plane state structure.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5__drm_atomic_helper_connector_state_init (C function)*c.__drm_atomic_helper_connector_state_inithNtauh1j hj~hhhNhNubj )}(hhh](j )}(hwvoid __drm_atomic_helper_connector_state_init (struct drm_connector_state *conn_state, struct drm_connector *connector)h]j )}(hvvoid __drm_atomic_helper_connector_state_init(struct drm_connector_state *conn_state, struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjhMubj )}(h(__drm_atomic_helper_connector_state_inith]j )}(h(__drm_atomic_helper_connector_state_inith]h(__drm_atomic_helper_connector_state_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhjhMubj)}(hI(struct drm_connector_state *conn_state, struct drm_connector *connector)h](j)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb*c.__drm_atomic_helper_connector_state_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j*c.__drm_atomic_helper_connector_state_initasbuh1hhj%ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjshhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjvhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjhMubah}(h]jmah ](j j eh"]h$]h&]j j )j huh1j hjhMhjohhubj )}(hhh]h)}(hInitialize the connector stateh]hInitialize the connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjohhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hXC**Parameters** ``struct drm_connector_state *conn_state`` atomic connector state, must not be NULL ``struct drm_connector *connector`` connector object, must not be NULL **Description** Initializes the newly allocated **conn_state** with default values. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjw )}(hhh](j| )}(hT``struct drm_connector_state *conn_state`` atomic connector state, must not be NULL h](j )}(h*``struct drm_connector_state *conn_state``h]j )}(hjh]h&struct drm_connector_state *conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h(atomic connector state, must not be NULLh]h(atomic connector state, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hG``struct drm_connector *connector`` connector object, must not be NULL h](j )}(h#``struct drm_connector *connector``h]j )}(hj$h]hstruct drm_connector *connector}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h"connector object, must not be NULLh]h"connector object, must not be NULL}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj9hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hInitializes the newly allocated **conn_state** with default values. This is useful for drivers that subclass the connector state.h](h Initializes the newly allocated }(hjuhhhNhNubj3 )}(h**conn_state**h]h conn_state}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubhS with default values. This is useful for drivers that subclass the connector state.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0__drm_atomic_helper_connector_reset (C function)%c.__drm_atomic_helper_connector_resethNtauh1j hj~hhhNhNubj )}(hhh](j )}(hrvoid __drm_atomic_helper_connector_reset (struct drm_connector *connector, struct drm_connector_state *conn_state)h]j )}(hqvoid __drm_atomic_helper_connector_reset(struct drm_connector *connector, struct drm_connector_state *conn_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h#__drm_atomic_helper_connector_reseth]j )}(h#__drm_atomic_helper_connector_reseth]h#__drm_atomic_helper_connector_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hI(struct drm_connector *connector, struct drm_connector_state *conn_state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb%c.__drm_atomic_helper_connector_resetasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h connectorh]h connector}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j-%c.__drm_atomic_helper_connector_resetasbuh1hhjaubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjaubj )}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hreset state on connectorh]hreset state on connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` drm connector ``struct drm_connector_state *conn_state`` connector state to assign **Description** Initializes the newly allocated **conn_state** and assigns it to the :c:type:`drm_connector->state ` pointer of **connector**, usually required when initializing the drivers or when called from the :c:type:`drm_connector_funcs.reset ` hook. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjw )}(hhh](j| )}(h2``struct drm_connector *connector`` drm connector h](j )}(h#``struct drm_connector *connector``h]j )}(hj'h]hstruct drm_connector *connector}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj!ubj )}(hhh]h)}(h drm connectorh]h drm connector}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj=ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMhjubj| )}(hE``struct drm_connector_state *conn_state`` connector state to assign h](j )}(h*``struct drm_connector_state *conn_state``h]j )}(hj`h]h&struct drm_connector_state *conn_state}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjZubj )}(hhh]h)}(hconnector state to assignh]hconnector state to assign}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjvubah}(h]h ]h"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hXInitializes the newly allocated **conn_state** and assigns it to the :c:type:`drm_connector->state ` pointer of **connector**, usually required when initializing the drivers or when called from the :c:type:`drm_connector_funcs.reset ` hook.h](h Initializes the newly allocated }(hjhhhNhNubj3 )}(h**conn_state**h]h conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and assigns it to the }(hjhhhNhNubh)}(h.:c:type:`drm_connector->state `h]j )}(hjh]hdrm_connector->state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh pointer of }(hjhhhNhNubj3 )}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhI, usually required when initializing the drivers or when called from the }(hjhhhNhNubh)}(h9:c:type:`drm_connector_funcs.reset `h]j )}(hjh]hdrm_connector_funcs.reset}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhjhMhjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h=This is useful for drivers that subclass the connector state.h]h=This is useful for drivers that subclass the connector state.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_atomic_helper_connector_reset (C function)#c.drm_atomic_helper_connector_resethNtauh1j hj~hhhNhNubj )}(hhh](j )}(hHvoid drm_atomic_helper_connector_reset (struct drm_connector *connector)h]j )}(hGvoid drm_atomic_helper_connector_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUhhhjghM ubj )}(h!drm_atomic_helper_connector_reseth]j )}(h!drm_atomic_helper_connector_reseth]h!drm_atomic_helper_connector_reset}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ](j j eh"]h$]h&]j j uh1j hjUhhhjghM ubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj|sb#c.drm_atomic_helper_connector_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjUhhhjghM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjQhhhjghM ubah}(h]jLah ](j j eh"]h$]h&]j j )j huh1j hjghM hjNhhubj )}(hhh]h)}(hUdefault :c:type:`drm_connector_funcs.reset ` hook for connectorsh](hdefault }(hjhhhNhNubh)}(h9:c:type:`drm_connector_funcs.reset `h]j )}(hj#h]hdrm_connector_funcs.reset}(hj%hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j#c.drm_atomic_helper_connector_resetasbj drm_connector_funcsuh1hhjhKBhjubh hook for connectors}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjNhhhjghM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jYj$ jYj% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_connector *connector`` drm connector **Description** Resets the atomic state for **connector** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j3 )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj]ubjw )}(hhh]j| )}(h2``struct drm_connector *connector`` drm connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj|ubj )}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjyubah}(h]h ]h"]h$]h&]uh1jv hj]ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj]ubh)}(hResets the atomic state for **connector** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hjhhhNhNubj3 )}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5drm_atomic_helper_connector_create_state (C function)*c.drm_atomic_helper_connector_create_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hgstruct drm_connector_state * drm_atomic_helper_connector_create_state (struct drm_connector *connector)h]j )}(hestruct drm_connector_state *drm_atomic_helper_connector_create_state(struct drm_connector *connector)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM!ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj!hM!ubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j%)}j(drm_atomic_helper_connector_create_statesb*c.drm_atomic_helper_connector_create_stateasbuh1hhjhhhj!hM!ubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj!hM!ubj9)}(hjOh]h*}(hjbhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhj!hM!ubj )}(h(drm_atomic_helper_connector_create_stateh]j )}(hjQh]h(drm_atomic_helper_connector_create_state}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj!hM!ubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jO*c.drm_atomic_helper_connector_create_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj!hM!ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj!hM!ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj!hM!hj hhubj )}(hhh]h)}(hcdefault :c:type:`drm_connector_funcs.atomic_create_state ` hook for connectorsh](hdefault }(hjhhhNhNubh)}(hG:c:type:`drm_connector_funcs.atomic_create_state `h]j )}(hjh]h'drm_connector_funcs.atomic_create_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jO*c.drm_atomic_helper_connector_create_stateasbj drm_connector_funcsuh1hhjhKBhjubh hook for connectors}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM!hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj!hM!ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jOj$ jOj% j& j' uh1j hhhj~hNhNubj) )}(hX"**Parameters** ``struct drm_connector *connector`` connector object **Description** Allocates and initializes pristine **drm_connector_state**. This is useful for drivers that don't subclass **drm_connector_state**. **Return** Pointer to new connector state, or ERR_PTR on failure.h](h)}(h**Parameters**h]j3 )}(hjYh]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM%hjSubjw )}(hhh]j| )}(h5``struct drm_connector *connector`` connector object h](j )}(h#``struct drm_connector *connector``h]j )}(hjxh]hstruct drm_connector *connector}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM"hjrubj )}(hhh]h)}(hconnector objecth]hconnector object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM"hjubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjhM"hjoubah}(h]h ]h"]h$]h&]uh1jv hjSubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM$hjSubh)}(hhj.ubh)}(h9Resets the TV-related properties attached to a connector.h]h9Resets the TV-related properties attached to a connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM=hj.ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_atomic_helper_connector_tv_reset (C function)&c.drm_atomic_helper_connector_tv_resethNtauh1j hj~hhhNhNubj )}(hhh](j )}(hKvoid drm_atomic_helper_connector_tv_reset (struct drm_connector *connector)h]j )}(hJvoid drm_atomic_helper_connector_tv_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMMubj )}(h$drm_atomic_helper_connector_tv_reseth]j )}(h$drm_atomic_helper_connector_tv_reseth]h$drm_atomic_helper_connector_tv_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]j%)}jjsb&c.drm_atomic_helper_connector_tv_resetasbuh1hhj ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hj\hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(h connectorh]h connector}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMMhjhhubj )}(hhh]h)}(h%Resets Analog TV connector propertiesh]h%Resets Analog TV connector properties}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_connector *connector`` DRM connector **Description** Resets the analog TV properties attached to a connectorh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMQhjubjw )}(hhh]j| )}(h2``struct drm_connector *connector`` DRM connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMNhjubj )}(hhh]h)}(h DRM connectorh]h DRM connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMNhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMNhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMPhjubh)}(h7Resets the analog TV properties attached to a connectorh]h7Resets the analog TV properties attached to a connector}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMOhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_atomic_helper_connector_tv_check (C function)&c.drm_atomic_helper_connector_tv_checkhNtauh1j hj~hhhNhNubj )}(hhh](j )}(hkint drm_atomic_helper_connector_tv_check (struct drm_connector *connector, struct drm_atomic_commit *state)h]j )}(hjint drm_atomic_helper_connector_tv_check(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjbhMubj )}(h$drm_atomic_helper_connector_tv_checkh]j )}(h$drm_atomic_helper_connector_tv_checkh]h$drm_atomic_helper_connector_tv_check}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjbhMubj)}(hB(struct drm_connector *connector, struct drm_atomic_commit *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjwsb&c.drm_atomic_helper_connector_tv_checkasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j&c.drm_atomic_helper_connector_tv_checkasbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjPhhhjbhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjbhMubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j hjbhMhjIhhubj )}(hhh]h)}(h%Validate an analog TV connector stateh]h%Validate an analog TV connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjbhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX,**Parameters** ``struct drm_connector *connector`` DRM Connector ``struct drm_atomic_commit *state`` the DRM State object **Description** Checks the state object to see if the requested state is valid for an analog TV connector. **Return** ``0`` for success, a negative error code on error.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjw )}(hhh](j| )}(h2``struct drm_connector *connector`` DRM Connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h DRM Connectorh]h DRM Connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h9``struct drm_atomic_commit *state`` the DRM State object h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(hthe DRM State objecth]hthe DRM State object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj9 h]h Description}(hj; hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7 ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hZChecks the state object to see if the requested state is valid for an analog TV connector.h]hZChecks the state object to see if the requested state is valid for an analog TV connector.}(hjO hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h **Return**h]j3 )}(hj` h]hReturn}(hjb hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h2``0`` for success, a negative error code on error.h](j )}(h``0``h]h0}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjv ubh- for success, a negative error code on error.}(hjv hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j :__drm_atomic_helper_connector_duplicate_state (C function)/c.__drm_atomic_helper_connector_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hwvoid __drm_atomic_helper_connector_duplicate_state (struct drm_connector *connector, struct drm_connector_state *state)h]j )}(hvvoid __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hMubj )}(h-__drm_atomic_helper_connector_duplicate_stateh]j )}(h-__drm_atomic_helper_connector_duplicate_stateh]h-__drm_atomic_helper_connector_duplicate_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hMubj)}(hD(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jj sb/c.__drm_atomic_helper_connector_duplicate_stateasbuh1hhj ubj )}(h h]h }(hj. hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hj< hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(h connectorh]h connector}(hjI hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h!struct drm_connector_state *stateh](j )}(hj h]hstruct}(hjb hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ ubj )}(h h]h }(hjo hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ ubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj} ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j* /c.__drm_atomic_helper_connector_duplicate_stateasbuh1hhj^ ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj^ ubj )}(hstateh]hstate}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj hMhj hhubj )}(hhh]h)}(hcopy atomic connector stateh]hcopy atomic connector state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj~hNhNubj) )}(hX **Parameters** ``struct drm_connector *connector`` connector object ``struct drm_connector_state *state`` atomic connector state **Description** Copies atomic state from a connector's current state. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubjw )}(hhh](j| )}(h5``struct drm_connector *connector`` connector object h](j )}(h#``struct drm_connector *connector``h]j )}(hj$ h]hstruct drm_connector *connector}(hj& hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj" ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj )}(hhh]h)}(hconnector objecth]hconnector object}(hj= hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9 hMhj: ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj9 hMhj ubj| )}(h=``struct drm_connector_state *state`` atomic connector state h](j )}(h%``struct drm_connector_state *state``h]j )}(hj] h]h!struct drm_connector_state *state}(hj_ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjW ubj )}(hhh]h)}(hatomic connector stateh]hatomic connector state}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr hMhjs ubah}(h]h ]h"]h$]h&]uh1j hjW ubeh}(h]h ]h"]h$]h&]uh1j{ hjr hMhj ubeh}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubh)}(hsCopies atomic state from a connector's current state. This is useful for drivers that subclass the connector state.h]huCopies atomic state from a connector’s current state. This is useful for drivers that subclass the connector state.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 8drm_atomic_helper_connector_duplicate_state (C function)-c.drm_atomic_helper_connector_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hjstruct drm_connector_state * drm_atomic_helper_connector_duplicate_state (struct drm_connector *connector)h]j )}(hhstruct drm_connector_state *drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector)h](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hMubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}j+drm_atomic_helper_connector_duplicate_statesb-c.drm_atomic_helper_connector_duplicate_stateasbuh1hhj hhhj hMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hMubj9)}(hjOh]h*}(hj+ hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj hhhj hMubj )}(h+drm_atomic_helper_connector_duplicate_stateh]j )}(hj h]h+drm_atomic_helper_connector_duplicate_state}(hj< hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8 ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjW hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS ubj )}(h h]h }(hjd hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hju hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjw modnameN classnameNj j )}j ]j -c.drm_atomic_helper_connector_duplicate_stateasbuh1hhjS ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjS ubj )}(h connectorh]h connector}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjO ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj hMhj hhubj )}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj~hNhNubj) )}(h**Parameters** ``struct drm_connector *connector`` drm connector **Description** Default connector state duplicate hook for drivers which don't have their own subclassed connector state structure.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubjw )}(hhh]j| )}(h2``struct drm_connector *connector`` drm connector h](j )}(h#``struct drm_connector *connector``h]j )}(hj h]hstruct drm_connector *connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubj )}(hhh]h)}(h drm connectorh]h drm connector}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj. hMhj/ ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj. hMhj ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjT h]h Description}(hjV hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjR ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubh)}(hsDefault connector state duplicate hook for drivers which don't have their own subclassed connector state structure.h]huDefault connector state duplicate hook for drivers which don’t have their own subclassed connector state structure.}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 8__drm_atomic_helper_connector_destroy_state (C function)-c.__drm_atomic_helper_connector_destroy_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hTvoid __drm_atomic_helper_connector_destroy_state (struct drm_connector_state *state)h]j )}(hSvoid __drm_atomic_helper_connector_destroy_state(struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hMubj )}(h+__drm_atomic_helper_connector_destroy_stateh]j )}(h+__drm_atomic_helper_connector_destroy_stateh]h+__drm_atomic_helper_connector_destroy_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hMubj)}(h#(struct drm_connector_state *state)h]j)}(h!struct drm_connector_state *stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jj sb-c.__drm_atomic_helper_connector_destroy_stateasbuh1hhj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hstateh]hstate}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj hMhj hhubj )}(hhh]h)}(hrelease connector stateh]hrelease connector state}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjVhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jqj$ jqj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_connector_state *state`` connector state object to release **Description** Releases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j3 )}(hj{h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjyubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjuubjw )}(hhh]j| )}(hH``struct drm_connector_state *state`` connector state object to release h](j )}(h%``struct drm_connector_state *state``h]j )}(hjh]h!struct drm_connector_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h!connector state object to releaseh]h!connector state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjuubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjuubh)}(hReleases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.h]hReleases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjuubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 6drm_atomic_helper_connector_destroy_state (C function)+c.drm_atomic_helper_connector_destroy_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hsvoid drm_atomic_helper_connector_destroy_state (struct drm_connector *connector, struct drm_connector_state *state)h]j )}(hrvoid drm_atomic_helper_connector_destroy_state(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj(hMubj )}(h)drm_atomic_helper_connector_destroy_stateh]j )}(h)drm_atomic_helper_connector_destroy_stateh]h)drm_atomic_helper_connector_destroy_state}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj(hMubj)}(hD(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j%)}jj=sb+c.drm_atomic_helper_connector_destroy_stateasbuh1hhjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjSubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(h!struct drm_connector_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j+c.drm_atomic_helper_connector_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj(hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj(hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj(hMhjhhubj )}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjGhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj(hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jbj$ jbj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` drm connector ``struct drm_connector_state *state`` connector state object to release **Description** Default connector state destroy hook for drivers which don't have their own subclassed connector state structure.h](h)}(h**Parameters**h]j3 )}(hjlh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjfubjw )}(hhh](j| )}(h2``struct drm_connector *connector`` drm connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hH``struct drm_connector_state *state`` connector state object to release h](j )}(h%``struct drm_connector_state *state``h]j )}(hjh]h!struct drm_connector_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h!connector state object to releaseh]h!connector state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjfubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjfubh)}(hqDefault connector state destroy hook for drivers which don't have their own subclassed connector state structure.h]hsDefault connector state destroy hook for drivers which don’t have their own subclassed connector state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjfubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 9__drm_atomic_helper_private_obj_create_state (C function).c.__drm_atomic_helper_private_obj_create_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hpvoid __drm_atomic_helper_private_obj_create_state (struct drm_private_obj *obj, struct drm_private_state *state)h]j )}(hovoid __drm_atomic_helper_private_obj_create_state(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hvoidh]hvoid}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM!ubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhjRhM!ubj )}(h,__drm_atomic_helper_private_obj_create_stateh]j )}(h,__drm_atomic_helper_private_obj_create_stateh]h,__drm_atomic_helper_private_obj_create_state}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@hhhjRhM!ubj)}(h>(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hstruct drm_private_obj *objh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j a;h"]h$]h&]uh1j hj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubh)}(hhh]j )}(hdrm_private_objh]hdrm_private_obj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjgsb.c.__drm_atomic_helper_private_obj_create_stateasbuh1hhj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj}ubj )}(hobjh]hobj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubj)}(hstruct drm_private_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_private_stateh]hdrm_private_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j.c.__drm_atomic_helper_private_obj_create_stateasbuh1hhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubeh}(h]h ]h"]h$]h&]j j uh1jhj@hhhjRhM!ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhjRhM!ubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j hjRhM!hj9hhubj )}(hhh]h)}(h initializes private object stateh]h initializes private object state}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM!hjqhhubah}(h]h ]h"]h$]h&]uh1j hj9hhhjRhM!ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hXC**Parameters** ``struct drm_private_obj *obj`` private object ``struct drm_private_state *state`` new state to initialize **Description** Initializes the newly allocated **state**, usually required when initializing the drivers. **obj** is assumed to be zeroed. This is useful for drivers that use private states.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM%hjubjw )}(hhh](j| )}(h/``struct drm_private_obj *obj`` private object h](j )}(h``struct drm_private_obj *obj``h]j )}(hjh]hstruct drm_private_obj *obj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM"hjubj )}(hhh]h)}(hprivate objecth]hprivate object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM"hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM"hjubj| )}(h<``struct drm_private_state *state`` new state to initialize h](j )}(h#``struct drm_private_state *state``h]j )}(hjh]hstruct drm_private_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM#hjubj )}(hhh]h)}(hnew state to initializeh]hnew state to initialize}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM#hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM#hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj)h]h Description}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj'ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM%hjubh)}(hZInitializes the newly allocated **state**, usually required when initializing the drivers.h](h Initializes the newly allocated }(hj?hhhNhNubj3 )}(h **state**h]hstate}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubh1, usually required when initializing the drivers.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM$hjubh)}(h **obj** is assumed to be zeroed.h](j3 )}(h**obj**h]hobj}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubh is assumed to be zeroed.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM'hjubh)}(h3This is useful for drivers that use private states.h]h3This is useful for drivers that use private states.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM)hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j <__drm_atomic_helper_private_obj_duplicate_state (C function)1c.__drm_atomic_helper_private_obj_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hsvoid __drm_atomic_helper_private_obj_duplicate_state (struct drm_private_obj *obj, struct drm_private_state *state)h]j )}(hrvoid __drm_atomic_helper_private_obj_duplicate_state(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM5ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM5ubj )}(h/__drm_atomic_helper_private_obj_duplicate_stateh]j )}(h/__drm_atomic_helper_private_obj_duplicate_stateh]h/__drm_atomic_helper_private_obj_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM5ubj)}(h>(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hstruct drm_private_obj *objh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_private_objh]hdrm_private_obj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjsb1c.__drm_atomic_helper_private_obj_duplicate_stateasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hobjh]hobj}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_private_state *stateh](j )}(hj h]hstruct}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubh)}(hhh]j )}(hdrm_private_stateh]hdrm_private_state}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{modnameN classnameNj j )}j ]j#1c.__drm_atomic_helper_private_obj_duplicate_stateasbuh1hhjWubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjWubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM5ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM5ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM5hjhhubj )}(hhh]h)}(hcopy atomic private stateh]hcopy atomic private state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM5hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM5ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX"**Parameters** ``struct drm_private_obj *obj`` CRTC object ``struct drm_private_state *state`` new private object state **Description** Copies atomic state from a private objects's current state and resets inferred values. This is useful for drivers that subclass the private state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM9hjubjw )}(hhh](j| )}(h,``struct drm_private_obj *obj`` CRTC object h](j )}(h``struct drm_private_obj *obj``h]j )}(hjh]hstruct drm_private_obj *obj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM6hjubj )}(hhh]h)}(h CRTC objecth]h CRTC object}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hM6hj3ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj2hM6hjubj| )}(h=``struct drm_private_state *state`` new private object state h](j )}(h#``struct drm_private_state *state``h]j )}(hjVh]hstruct drm_private_state *state}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM7hjPubj )}(hhh]h)}(hnew private object stateh]hnew private object state}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhM7hjlubah}(h]h ]h"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]uh1j{ hjkhM7hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM9hjubh)}(hCopies atomic state from a private objects's current state and resets inferred values. This is useful for drivers that subclass the private state.h]hCopies atomic state from a private objects’s current state and resets inferred values. This is useful for drivers that subclass the private state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chM8hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 7__drm_atomic_helper_bridge_duplicate_state (C function),c.__drm_atomic_helper_bridge_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hkvoid __drm_atomic_helper_bridge_duplicate_state (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j )}(hjvoid __drm_atomic_helper_bridge_duplicate_state(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMDubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMDubj )}(h*__drm_atomic_helper_bridge_duplicate_stateh]j )}(h*__drm_atomic_helper_bridge_duplicate_stateh]h*__drm_atomic_helper_bridge_duplicate_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMDubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]j%)}jjsb,c.__drm_atomic_helper_bridge_duplicate_stateasbuh1hhjubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hstruct drm_bridge_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jM,c.__drm_atomic_helper_bridge_duplicate_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMDubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMDubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMDhjhhubj )}(hhh]h)}(hCopy atomic bridge stateh]hCopy atomic bridge state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMDhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMDubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object ``struct drm_bridge_state *state`` atomic bridge state **Description** Copies atomic state from a bridge's current state and resets inferred values. This is useful for drivers that subclass the bridge state.h](h)}(h**Parameters**h]j3 )}(hj(h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMHhj"ubjw )}(hhh](j| )}(h,``struct drm_bridge *bridge`` bridge object h](j )}(h``struct drm_bridge *bridge``h]j )}(hjGh]hstruct drm_bridge *bridge}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMEhjAubj )}(hhh]h)}(h bridge objecth]h bridge object}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMEhj]ubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hj\hMEhj>ubj| )}(h7``struct drm_bridge_state *state`` atomic bridge state h](j )}(h"``struct drm_bridge_state *state``h]j )}(hjh]hstruct drm_bridge_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMFhjzubj )}(hhh]h)}(hatomic bridge stateh]hatomic bridge state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjhMFhj>ubeh}(h]h ]h"]h$]h&]uh1jv hj"ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMHhj"ubh)}(hCopies atomic state from a bridge's current state and resets inferred values. This is useful for drivers that subclass the bridge state.h]hCopies atomic state from a bridge’s current state and resets inferred values. This is useful for drivers that subclass the bridge state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMGhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5drm_atomic_helper_bridge_duplicate_state (C function)*c.drm_atomic_helper_bridge_duplicate_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(h^struct drm_bridge_state * drm_atomic_helper_bridge_duplicate_state (struct drm_bridge *bridge)h]j )}(h\struct drm_bridge_state *drm_atomic_helper_bridge_duplicate_state(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMUubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j%)}j(drm_atomic_helper_bridge_duplicate_statesb*c.drm_atomic_helper_bridge_duplicate_stateasbuh1hhjhhhj hMUubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMUubj9)}(hjOh]h*}(hjNhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhj hMUubj )}(h(drm_atomic_helper_bridge_duplicate_stateh]j )}(hj=h]h(drm_atomic_helper_bridge_duplicate_state}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMUubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j;*c.drm_atomic_helper_bridge_duplicate_stateasbuh1hhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjvubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjrubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMUubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMUubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj hMUhjhhubj )}(hhh]h)}(hDuplicate a bridge state objecth]hDuplicate a bridge state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMUhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMUubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hXM**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** Allocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_duplicate_state ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMYhjubjw )}(hhh]j| )}(h,``struct drm_bridge *bridge`` bridge object h](j )}(h``struct drm_bridge *bridge``h]j )}(hj<h]hstruct drm_bridge *bridge}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMVhj6ubj )}(hhh]h)}(h bridge objecth]h bridge object}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMVhjRubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hjQhMVhj3ubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjwh]h Description}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMXhjubh)}(hAllocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_duplicate_state ` hook for bridges that don't subclass the bridge state.h](hAllocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge }(hjhhhNhNubh)}(hD:c:type:`drm_bridge_funcs.atomic_duplicate_state `h]j )}(hjh]h'drm_bridge_funcs.atomic_duplicate_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMWhjubh9 hook for bridges that don’t subclass the bridge state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMWhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 3drm_atomic_helper_bridge_destroy_state (C function)(c.drm_atomic_helper_bridge_destroy_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(hgvoid drm_atomic_helper_bridge_destroy_state (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j )}(hfvoid drm_atomic_helper_bridge_destroy_state(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMnubj )}(h&drm_atomic_helper_bridge_destroy_stateh]j )}(h&drm_atomic_helper_bridge_destroy_stateh]h&drm_atomic_helper_bridge_destroy_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMnubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j%)}jjsb(c.drm_atomic_helper_bridge_destroy_stateasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_bridge_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jV(c.drm_atomic_helper_bridge_destroy_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMnubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMnhjhhubj )}(hhh]h)}(hDestroy a bridge state objecth]hDestroy a bridge state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMnhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMnubeh}(h]h ](j functioneh"]h$]h&]j" j j# j'j$ j'j% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` the bridge this state refers to ``struct drm_bridge_state *state`` bridge state to destroy **Description** Destroys a bridge state previously created by :c:type:`drm_atomic_helper_bridge_create_state`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j3 )}(hj1h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMrhj+ubjw )}(hhh](j| )}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](j )}(h``struct drm_bridge *bridge``h]j )}(hjPh]hstruct drm_bridge *bridge}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMohjJubj )}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMohjfubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hjehMohjGubj| )}(h;``struct drm_bridge_state *state`` bridge state to destroy h](j )}(h"``struct drm_bridge_state *state``h]j )}(hjh]hstruct drm_bridge_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMphjubj )}(hhh]h)}(hbridge state to destroyh]hbridge state to destroy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMphjGubeh}(h]h ]h"]h$]h&]uh1jv hj+ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMrhj+ubh)}(hX>Destroys a bridge state previously created by :c:type:`drm_atomic_helper_bridge_create_state`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state ` hook for bridges that don't subclass the bridge state.h](h.Destroys a bridge state previously created by }(hjhhhNhNubh)}(h:c:type:`drm_atomic_helper_bridge_create_state`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state `h]j )}(hjh]hdrm_atomic_helper_bridge_create_state`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMqhjubh9 hook for bridges that don’t subclass the bridge state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMqhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2__drm_atomic_helper_bridge_state_init (C function)'c.__drm_atomic_helper_bridge_state_inithNtauh1j hj~hhhNhNubj )}(hhh](j )}(hfvoid __drm_atomic_helper_bridge_state_init (struct drm_bridge_state *state, struct drm_bridge *bridge)h]j )}(hevoid __drm_atomic_helper_bridge_state_init(struct drm_bridge_state *state, struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj:hMubj )}(h%__drm_atomic_helper_bridge_state_inith]j )}(h%__drm_atomic_helper_bridge_state_inith]h%__drm_atomic_helper_bridge_state_init}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj:hMubj)}(h;(struct drm_bridge_state *state, struct drm_bridge *bridge)h](j)}(hstruct drm_bridge_state *stateh](j )}(hj h]hstruct}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjOsb'c.__drm_atomic_helper_bridge_state_initasbuh1hhjeubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjeubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubj)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.__drm_atomic_helper_bridge_state_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhj:hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj$hhhj:hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj:hMhj!hhubj )}(hhh]h)}(h(Initialize a bridge state to its defaulth]h(Initialize a bridge state to its default}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjYhhubah}(h]h ]h"]h$]h&]uh1j hj!hhhj:hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jtj$ jtj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_bridge_state *state`` bridge state to initialize ``struct drm_bridge *bridge`` the bridge this state refers to **Description** **state** is assumed to be zeroed. Initializes the bridge state to default values. This is meant to be called by the bridge :c:type:`drm_bridge_funcs.atomic_create_state ` hook for bridges that subclass the bridge state.h](h)}(h**Parameters**h]j3 )}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjxubjw )}(hhh](j| )}(h>``struct drm_bridge_state *state`` bridge state to initialize h](j )}(h"``struct drm_bridge_state *state``h]j )}(hjh]hstruct drm_bridge_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(hbridge state to initializeh]hbridge state to initialize}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjxubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjxubh)}(h"**state** is assumed to be zeroed.h](j3 )}(h **state**h]hstate}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj'ubh is assumed to be zeroed.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjxubh)}(hInitializes the bridge state to default values. This is meant to be called by the bridge :c:type:`drm_bridge_funcs.atomic_create_state ` hook for bridges that subclass the bridge state.h](hYInitializes the bridge state to default values. This is meant to be called by the bridge }(hjDhhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_create_state `h]j )}(hjNh]h$drm_bridge_funcs.atomic_create_state}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjDubh1 hook for bridges that subclass the bridge state.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjkhMhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_atomic_helper_bridge_create_state (C function)'c.drm_atomic_helper_bridge_create_statehNtauh1j hj~hhhNhNubj )}(hhh](j )}(h[struct drm_bridge_state * drm_atomic_helper_bridge_create_state (struct drm_bridge *bridge)h]j )}(hYstruct drm_bridge_state *drm_atomic_helper_bridge_create_state(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j%drm_atomic_helper_bridge_create_statesb'c.drm_atomic_helper_bridge_create_stateasbuh1hhjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhMubj )}(h%drm_atomic_helper_bridge_create_stateh]j )}(hjh]h%drm_atomic_helper_bridge_create_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]j'c.drm_atomic_helper_bridge_create_stateasbuh1hhj ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjZhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hbridgeh]hbridge}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hZdefault :c:type:`drm_bridge_funcs.atomic_create_state ` hook for bridgesh](hdefault }(hjhhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_create_state `h]j )}(hjh]h$drm_bridge_funcs.atomic_create_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j'c.drm_atomic_helper_bridge_create_stateasbj drm_bridge_funcsuh1hhjhKBhjubh hook for bridges}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj~hNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** Allocates and initializes pristine **drm_bridge_state**. This is useful for drivers that don't subclass **drm_bridge_state**. **Return** Pointer to new bridge state, or ERR_PTR on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubjw )}(hhh]j| )}(h,``struct drm_bridge *bridge`` bridge object h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj )}(hhh]h)}(h bridge objecth]h bridge object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj5 h]h Description}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3 ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h8Allocates and initializes pristine **drm_bridge_state**.h](h#Allocates and initializes pristine }(hjK hhhNhNubj3 )}(h**drm_bridge_state**h]hdrm_bridge_state}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjK ubh.}(hjK hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hDThis is useful for drivers that don't subclass **drm_bridge_state**.h](h1This is useful for drivers that don’t subclass }(hjl hhhNhNubj3 )}(h**drm_bridge_state**h]hdrm_bridge_state}(hjt hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjl ubh.}(hjl hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h3Pointer to new bridge state, or ERR_PTR on failure.h]h3Pointer to new bridge state, or ERR_PTR on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:82: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj~hhhNhNubeh}(h]jeah ]h"]atomic state helper referenceah$]h&]uh1hhjBhhhhhKPubh)}(hhh](h)}(hGEM Atomic Helper Referenceh]hGEM Atomic Helper Reference}(hj hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj hhhhhKVubh)}(hThe GEM atomic helpers library implements generic atomic-commit functions for drivers that use GEM objects. Currently, it provides synchronization helpers, and plane state and framebuffer BO mappings for planes with shadow buffers.h]hThe GEM atomic helpers library implements generic atomic-commit functions for drivers that use GEM objects. Currently, it provides synchronization helpers, and plane state and framebuffer BO mappings for planes with shadow buffers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj hhubh)}(hXBefore scanout, a plane's framebuffer needs to be synchronized with possible writers that draw into the framebuffer. All drivers should call drm_gem_plane_helper_prepare_fb() from their implementation of struct :c:type:`drm_plane_helper.prepare_fb ` . It sets the plane's fence from the framebuffer so that the DRM core can synchronize access automatically. drm_gem_plane_helper_prepare_fb() can also be used directly as implementation of prepare_fb.h](hBefore scanout, a plane’s framebuffer needs to be synchronized with possible writers that draw into the framebuffer. All drivers should call drm_gem_plane_helper_prepare_fb() from their implementation of struct }(hj hhhNhNubh)}(h8:c:type:`drm_plane_helper.prepare_fb `h]j )}(hj h]hdrm_plane_helper.prepare_fb}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helperuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj ubh . It sets the plane’s fence from the framebuffer so that the DRM core can synchronize access automatically. drm_gem_plane_helper_prepare_fb() can also be used directly as implementation of prepare_fb.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj !hKhj hhubjN )}(h#include struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., . prepare_fb = drm_gem_plane_helper_prepare_fb, };h]h#include struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., . prepare_fb = drm_gem_plane_helper_prepare_fb, };}hj!sbah}(h]h ]h"]h$]h&]j j forcelanguagej highlight_args}uh1jM hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj hhubh)}(hXXA driver using a shadow buffer copies the content of the shadow buffers into the HW's framebuffer memory during an atomic update. This requires a mapping of the shadow buffer into kernel address space. The mappings cannot be established by commit-tail functions, such as atomic_update, as this would violate locking rules around dma_buf_vmap().h]hXZA driver using a shadow buffer copies the content of the shadow buffers into the HW’s framebuffer memory during an atomic update. This requires a mapping of the shadow buffer into kernel address space. The mappings cannot be established by commit-tail functions, such as atomic_update, as this would violate locking rules around dma_buf_vmap().}(hj'!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK(hj hhubh)}(hThe helpers for shadow-buffered planes establish and release mappings, and provide struct drm_shadow_plane_state, which stores the plane's mapping for commit-tail functions.h]hThe helpers for shadow-buffered planes establish and release mappings, and provide struct drm_shadow_plane_state, which stores the plane’s mapping for commit-tail functions.}(hj6!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK.hj hhubh)}(hShadow-buffered planes can easily be enabled by using the provided macros ``DRM_GEM_SHADOW_PLANE_FUNCS`` and ``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``. These macros set up the plane and plane-helper callbacks to point to the shadow-buffer helpers.h](hJShadow-buffered planes can easily be enabled by using the provided macros }(hjE!hhhNhNubj )}(h``DRM_GEM_SHADOW_PLANE_FUNCS``h]hDRM_GEM_SHADOW_PLANE_FUNCS}(hjM!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjE!ubh and }(hjE!hhhNhNubj )}(h%``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``h]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hj_!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjE!ubha. These macros set up the plane and plane-helper callbacks to point to the shadow-buffer helpers.}(hjE!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK2hj hhubjN )}(hX#include struct drm_plane_funcs driver_plane_funcs = { ..., DRM_GEM_SHADOW_PLANE_FUNCS, }; struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, };h]hX#include struct drm_plane_funcs driver_plane_funcs = { ..., DRM_GEM_SHADOW_PLANE_FUNCS, }; struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, };}hjx!sbah}(h]h ]h"]h$]h&]j j j"!j#!j j$!}uh1jM hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chK7hj hhubh)}(hIn the driver's atomic-update function, shadow-buffer mappings are available from the plane state. Use to_drm_shadow_plane_state() to upcast from struct drm_plane_state.h]hIn the driver’s atomic-update function, shadow-buffer mappings are available from the plane state. Use to_drm_shadow_plane_state() to upcast from struct drm_plane_state.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKEhj hhubjN )}(hXrvoid driver_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state) { struct drm_plane_state *plane_state = plane->state; struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }h]hXrvoid driver_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state) { struct drm_plane_state *plane_state = plane->state; struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }}hj!sbah}(h]h ]h"]h$]h&]j j j"!j#!j j$!}uh1jM hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKIhj hhubh)}(hA mapping address for each of the framebuffer's buffer object is stored in struct :c:type:`drm_shadow_plane_state.map `. The mappings are valid while the state is being used.h](hTA mapping address for each of the framebuffer’s buffer object is stored in struct }(hj!hhhNhNubh)}(h=:c:type:`drm_shadow_plane_state.map `h]j )}(hj!h]hdrm_shadow_plane_state.map}(hj!hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_shadow_plane_stateuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:88: ./drivers/gpu/drm/drm_gem_atomic_helper.chKUhj!ubh7. The mappings are valid while the state is being used.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!hKUhj hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $DRM_SHADOW_PLANE_MAX_WIDTH (C macro)c.DRM_SHADOW_PLANE_MAX_WIDTHhNtauh1j hj hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhNubj )}(hhh](j )}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j )}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j )}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j )}(hj!h]hDRM_SHADOW_PLANE_MAX_WIDTH}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hj!hhhj "hKubah}(h]j!ah ](j j eh"]h$]h&]j j )j huh1j hj "hKhj!hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj!hhhj "hKubeh}(h]h ](j macroeh"]h$]h&]j" j j# j#"j$ j#"j% j& j' uh1j hhhj hj!hNubh)}(h``DRM_SHADOW_PLANE_MAX_WIDTH``h]j )}(hj)"h]hDRM_SHADOW_PLANE_MAX_WIDTH}(hj+"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'"ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhj hhubj^E)}(hX Maximum width of a plane's shadow buffer in pixels **Description** For drivers with shadow planes, the maximum width of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_width from DRM_SHADOW_PLANE_MAX_WIDTH. h](j^E)}(h3Maximum width of a plane's shadow buffer in pixels h]h)}(h2Maximum width of a plane's shadow buffer in pixelsh]h4Maximum width of a plane’s shadow buffer in pixels}(hjG"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhjC"ubah}(h]h ]h"]h$]h&]uh1j]EhjU"hKhj?"ubh)}(h**Description**h]j3 )}(hj^"h]h Description}(hj`"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\"ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhj?"ubh)}(hFor drivers with shadow planes, the maximum width of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_width from DRM_SHADOW_PLANE_MAX_WIDTH.h]hFor drivers with shadow planes, the maximum width of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_width from DRM_SHADOW_PLANE_MAX_WIDTH.}(hjt"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhj?"ubeh}(h]h ]h"]h$]h&]uh1j]EhjU"hKhj hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %DRM_SHADOW_PLANE_MAX_HEIGHT (C macro)c.DRM_SHADOW_PLANE_MAX_HEIGHThNtauh1j hj hhhj!hNubj )}(hhh](j )}(hDRM_SHADOW_PLANE_MAX_HEIGHTh]j )}(hDRM_SHADOW_PLANE_MAX_HEIGHTh]j )}(hDRM_SHADOW_PLANE_MAX_HEIGHTh]j )}(hj"h]hDRM_SHADOW_PLANE_MAX_HEIGHT}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK"ubah}(h]h ]h"]h$]h&]j j j uh1j j j hj"hhhj"hK"ubah}(h]j"ah ](j j eh"]h$]h&]j j )j huh1j hj"hK"hj"hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj"hhhj"hK"ubeh}(h]h ](j macroeh"]h$]h&]j" j j# j"j$ j"j% j& j' uh1j hhhj hj!hNubh)}(h``DRM_SHADOW_PLANE_MAX_HEIGHT``h]j )}(hj"h]hDRM_SHADOW_PLANE_MAX_HEIGHT}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK$hj hhubj^E)}(hX  Maximum height of a plane's shadow buffer in scanlines **Description** For drivers with shadow planes, the maximum height of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_height from DRM_SHADOW_PLANE_MAX_HEIGHT. h](j^E)}(h7Maximum height of a plane's shadow buffer in scanlines h]h)}(h6Maximum height of a plane's shadow buffer in scanlinesh]h8Maximum height of a plane’s shadow buffer in scanlines}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK"hj"ubah}(h]h ]h"]h$]h&]uh1j]Ehj#hK"hj"ubh)}(h**Description**h]j3 )}(hj #h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj #ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK$hj"ubh)}(hFor drivers with shadow planes, the maximum height of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_height from DRM_SHADOW_PLANE_MAX_HEIGHT.h]hFor drivers with shadow planes, the maximum height of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_height from DRM_SHADOW_PLANE_MAX_HEIGHT.}(hj##hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK#hj"ubeh}(h]h ]h"]h$]h&]uh1j]Ehj#hK"hj hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_shadow_plane_state (C struct)c.drm_shadow_plane_statehNtauh1j hj hhhj!hNubj )}(hhh](j )}(hdrm_shadow_plane_stateh]j )}(hstruct drm_shadow_plane_stateh](j )}(hj h]hstruct}(hjQ#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM#hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK*ubj )}(h h]h }(hj_#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM#hhhj^#hK*ubj )}(hdrm_shadow_plane_stateh]j )}(hjK#h]hdrm_shadow_plane_state}(hjq#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjm#ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjM#hhhj^#hK*ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjI#hhhj^#hK*ubah}(h]jD#ah ](j j eh"]h$]h&]j j )j huh1j hj^#hK*hjF#hhubj )}(hhh]h)}(h*plane state for planes with shadow buffersh]h*plane state for planes with shadow buffers}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK+hj#hhubah}(h]h ]h"]h$]h&]uh1j hjF#hhhj^#hK*ubeh}(h]h ](j structeh"]h$]h&]j" j j# j#j$ j#j% j& j' uh1j hhhj hj!hNubj) )}(hXZ**Definition**:: struct drm_shadow_plane_state { struct drm_plane_state base; struct drm_format_conv_state fmtcnv_state; struct iosys_map map[DRM_FORMAT_MAX_PLANES]; struct iosys_map data[DRM_FORMAT_MAX_PLANES]; }; **Members** ``base`` plane state ``fmtcnv_state`` Format-conversion state Per-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion. ``map`` Mappings of the plane's framebuffer BOs in to kernel address space The memory mappings stored in map should be established in the plane's prepare_fb callback and removed in the cleanup_fb callback. ``data`` Address of each framebuffer BO's data The address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.vh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubh:}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK/hj#ubjN )}(hstruct drm_shadow_plane_state { struct drm_plane_state base; struct drm_format_conv_state fmtcnv_state; struct iosys_map map[DRM_FORMAT_MAX_PLANES]; struct iosys_map data[DRM_FORMAT_MAX_PLANES]; };h]hstruct drm_shadow_plane_state { struct drm_plane_state base; struct drm_format_conv_state fmtcnv_state; struct iosys_map map[DRM_FORMAT_MAX_PLANES]; struct iosys_map data[DRM_FORMAT_MAX_PLANES]; };}hj#sbah}(h]h ]h"]h$]h&]j j uh1jM hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK1hj#ubh)}(h **Members**h]j3 )}(hj#h]hMembers}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK8hj#ubjw )}(hhh](j| )}(h``base`` plane state h](j )}(h``base``h]j )}(hj$h]hbase}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK3hj#ubj )}(hhh]h)}(h plane stateh]h plane state}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hK3hj$ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hK3hj#ubj| )}(h``fmtcnv_state`` Format-conversion state Per-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion. h](j )}(h``fmtcnv_state``h]j )}(hj9$h]h fmtcnv_state}(hj;$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7$ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK;hj3$ubj )}(hhh](h)}(hFormat-conversion stateh]hFormat-conversion state}(hjR$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK7hjO$ubh)}(hPer-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion.h]hPer-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion.}(hja$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK9hjO$ubeh}(h]h ]h"]h$]h&]uh1j hj3$ubeh}(h]h ]h"]h$]h&]uh1j{ hjN$hK;hj#ubj| )}(h``map`` Mappings of the plane's framebuffer BOs in to kernel address space The memory mappings stored in map should be established in the plane's prepare_fb callback and removed in the cleanup_fb callback. h](j )}(h``map``h]j )}(hj$h]hmap}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKEhj|$ubj )}(hhh](h)}(hBMappings of the plane's framebuffer BOs in to kernel address spaceh]hDMappings of the plane’s framebuffer BOs in to kernel address space}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKBhj$ubh)}(hThe memory mappings stored in map should be established in the plane's prepare_fb callback and removed in the cleanup_fb callback.h]hThe memory mappings stored in map should be established in the plane’s prepare_fb callback and removed in the cleanup_fb callback.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKDhj$ubeh}(h]h ]h"]h$]h&]uh1j hj|$ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hKEhj#ubj| )}(h``data`` Address of each framebuffer BO's data The address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.h](j )}(h``data``h]j )}(hj$h]hdata}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKLhj$ubj )}(hhh](h)}(h%Address of each framebuffer BO's datah]h'Address of each framebuffer BO’s data}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKJhj$ubh)}(hoThe address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.h]hoThe address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKLhj$ubeh}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hKLhj#ubeh}(h]h ]h"]h$]h&]uh1jv hj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhj!hNubh)}(h**Description**h]j3 )}(hj%h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKPhj hhubh)}(hFor planes that use a shadow buffer, struct drm_shadow_plane_state provides the regular plane state plus mappings of the shadow buffer into kernel address space.h]hFor planes that use a shadow buffer, struct drm_shadow_plane_state provides the regular plane state plus mappings of the shadow buffer into kernel address space.}(hj2%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhK,hj hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &to_drm_shadow_plane_state (C function)c.to_drm_shadow_plane_statehNtauh1j hj hhhj!hNubj )}(hhh](j )}(hYstruct drm_shadow_plane_state * to_drm_shadow_plane_state (struct drm_plane_state *state)h]j )}(hWstruct drm_shadow_plane_state *to_drm_shadow_plane_state(struct drm_plane_state *state)h](j )}(hj h]hstruct}(hjZ%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV%hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKRubj )}(h h]h }(hjh%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV%hhhjg%hKRubh)}(hhh]j )}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hjy%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{%modnameN classnameNj j )}j ]j%)}jto_drm_shadow_plane_statesbc.to_drm_shadow_plane_stateasbuh1hhjV%hhhjg%hKRubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV%hhhjg%hKRubj9)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjV%hhhjg%hKRubj )}(hto_drm_shadow_plane_stateh]j )}(hj%h]hto_drm_shadow_plane_state}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjV%hhhjg%hKRubj)}(h(struct drm_plane_state *state)h]j)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%modnameN classnameNj j )}j ]j%c.to_drm_shadow_plane_stateasbuh1hhj%ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hstateh]hstate}(hj+&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubah}(h]h ]h"]h$]h&]j j uh1jhjV%hhhjg%hKRubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjR%hhhjg%hKRubah}(h]jM%ah ](j j eh"]h$]h&]j j )j huh1j hjg%hKRhjO%hhubj )}(hhh]h)}(h#upcasts from struct drm_plane_stateh]h#upcasts from struct drm_plane_state}(hjU&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKRhjR&hhubah}(h]h ]h"]h$]h&]uh1j hjO%hhhjg%hKRubeh}(h]h ](j functioneh"]h$]h&]j" j j# jm&j$ jm&j% j& j' uh1j hhhj hj!hNubj) )}(hC**Parameters** ``struct drm_plane_state *state`` the plane stateh](h)}(h**Parameters**h]j3 )}(hjw&h]h Parameters}(hjy&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hju&ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKVhjq&ubjw )}(hhh]j| )}(h1``struct drm_plane_state *state`` the plane stateh](j )}(h!``struct drm_plane_state *state``h]j )}(hj&h]hstruct drm_plane_state *state}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKXhj&ubj )}(hhh]h)}(hthe plane stateh]hthe plane state}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKShj&ubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hKXhj&ubah}(h]h ]h"]h$]h&]uh1jv hjq&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhj!hNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $DRM_GEM_SHADOW_PLANE_FUNCS (C macro)c.DRM_GEM_SHADOW_PLANE_FUNCShNtauh1j hj hhhj!hNubj )}(hhh](j )}(hDRM_GEM_SHADOW_PLANE_FUNCSh]j )}(hDRM_GEM_SHADOW_PLANE_FUNCSh]j )}(hDRM_GEM_SHADOW_PLANE_FUNCSh]j )}(hj&h]hDRM_GEM_SHADOW_PLANE_FUNCS}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKgubah}(h]h ]h"]h$]h&]j j j uh1j j j hj&hhhj'hKgubah}(h]j&ah ](j j eh"]h$]h&]j j )j huh1j hj'hKghj&hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj&hhhj'hKgubeh}(h]h ](j macroeh"]h$]h&]j" j j# j 'j$ j 'j% j& j' uh1j hhhj hj!hNubh)}(h``DRM_GEM_SHADOW_PLANE_FUNCS``h]j )}(hj&'h]hDRM_GEM_SHADOW_PLANE_FUNCS}(hj('hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKihj hhubj^E)}(h Initializes struct drm_plane_funcs for shadow-buffered planes **Description** Drivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions. h](j^E)}(h>Initializes struct drm_plane_funcs for shadow-buffered planes h]h)}(h=Initializes struct drm_plane_funcs for shadow-buffered planesh]h=Initializes struct drm_plane_funcs for shadow-buffered planes}(hjD'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKghj@'ubah}(h]h ]h"]h$]h&]uh1j]EhjR'hKghj<'ubh)}(h**Description**h]j3 )}(hj['h]h Description}(hj]'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjY'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKihj<'ubh)}(hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions.h]hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions.}(hjq'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhhj<'ubeh}(h]h ]h"]h$]h&]uh1j]EhjR'hKghj hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +DRM_GEM_SHADOW_PLANE_HELPER_FUNCS (C macro)#c.DRM_GEM_SHADOW_PLANE_HELPER_FUNCShNtauh1j hj hhhj!hNubj )}(hhh](j )}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j )}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j )}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j )}(hj'h]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKvubah}(h]h ]h"]h$]h&]j j j uh1j j j hj'hhhj'hKvubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j hj'hKvhj'hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj'hhhj'hKvubeh}(h]h ](j macroeh"]h$]h&]j" j j# j'j$ j'j% j& j' uh1j hhhj hj!hNubh)}(h%``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``h]j )}(hj'h]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKxhj hhubj^E)}(h Initializes struct drm_plane_helper_funcs for shadow-buffered planes **Description** Drivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_helper_funcs to use the rsp helper functions. h](j^E)}(hEInitializes struct drm_plane_helper_funcs for shadow-buffered planes h]h)}(hDInitializes struct drm_plane_helper_funcs for shadow-buffered planesh]hDInitializes struct drm_plane_helper_funcs for shadow-buffered planes}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKvhj'ubah}(h]h ]h"]h$]h&]uh1j]Ehj(hKvhj'ubh)}(h**Description**h]j3 )}(hj (h]h Description}(hj (hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKxhj'ubh)}(hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_helper_funcs to use the rsp helper functions.h]hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_helper_funcs to use the rsp helper functions.}(hj (hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKwhj'ubeh}(h]h ]h"]h$]h&]uh1j]Ehj(hKvhj hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 8DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS (C macro)0c.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCShNtauh1j hj hhhj!hNubj )}(hhh](j )}(h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCSh]j )}(h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCSh]j )}(h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCSh]j )}(hjH(h]h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS}(hjR(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN(ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjJ(hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjF(hhhje(hKubah}(h]jA(ah ](j j eh"]h$]h&]j j )j huh1j hje(hKhjC(hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjC(hhhje(hKubeh}(h]h ](j macroeh"]h$]h&]j" j j# j~(j$ j~(j% j& j' uh1j hhhj hj!hNubh)}(h2``DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS``h]j )}(hj(h]h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhj hhubj^E)}(hX Initializes struct drm_simple_display_pipe_funcs for shadow-buffered planes **Description** Drivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_simple_display_pipe_funcs to use the rsp helper functions. h](j^E)}(hLInitializes struct drm_simple_display_pipe_funcs for shadow-buffered planes h]h)}(hKInitializes struct drm_simple_display_pipe_funcs for shadow-buffered planesh]hKInitializes struct drm_simple_display_pipe_funcs for shadow-buffered planes}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhj(ubah}(h]h ]h"]h$]h&]uh1j]Ehj(hKhj(ubh)}(h**Description**h]j3 )}(hj(h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhj(ubh)}(hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_simple_display_pipe_funcs to use the rsp helper functions.h]hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_simple_display_pipe_funcs to use the rsp helper functions.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:91: ./include/drm/drm_gem_atomic_helper.hhKhj(ubeh}(h]h ]h"]h$]h&]uh1j]Ehj(hKhj hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_gem_plane_helper_prepare_fb (C function)!c.drm_gem_plane_helper_prepare_fbhNtauh1j hj hhhNhNubj )}(hhh](j )}(h\int drm_gem_plane_helper_prepare_fb (struct drm_plane *plane, struct drm_plane_state *state)h]j )}(h[int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hinth]hint}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKaubj )}(h h]h }(hj )hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj )hKaubj )}(hdrm_gem_plane_helper_prepare_fbh]j )}(hdrm_gem_plane_helper_prepare_fbh]hdrm_gem_plane_helper_prepare_fb}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj )hKaubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj:)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6)ubj )}(h h]h }(hjG)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6)ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjX)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjU)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZ)modnameN classnameNj j )}j ]j%)}jj )sb!c.drm_gem_plane_helper_prepare_fbasbuh1hhj6)ubj )}(h h]h }(hjx)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6)ubj9)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj6)ubj )}(hplaneh]hplane}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2)ubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]jt)!c.drm_gem_plane_helper_prepare_fbasbuh1hhj)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj )}(hstateh]hstate}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2)ubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhj )hKaubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj )hKaubah}(h]j(ah ](j j eh"]h$]h&]j j )j huh1j hj )hKahj(hhubj )}(hhh]h)}(h Prepare a GEM backed framebufferh]h Prepare a GEM backed framebuffer}(hj-*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKahj**hhubah}(h]h ]h"]h$]h&]uh1j hj(hhhj )hKaubeh}(h]h ](j functioneh"]h$]h&]j" j j# jE*j$ jE*j% j& j' uh1j hhhj hNhNubj) )}(hXx**Parameters** ``struct drm_plane *plane`` Plane ``struct drm_plane_state *state`` Plane state the fence will be attached to **Description** This function extracts the exclusive fence from :c:type:`drm_gem_object.resv ` and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct :c:type:`dma_buf`. This function can be used as the :c:type:`drm_plane_helper_funcs.prepare_fb ` callback. There is no need for :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory. This function is the default implementation for GEM drivers of :c:type:`drm_plane_helper_funcs.prepare_fb ` if no callback is provided.h](h)}(h**Parameters**h]j3 )}(hjO*h]h Parameters}(hjQ*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjM*ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKehjI*ubjw )}(hhh](j| )}(h"``struct drm_plane *plane`` Plane h](j )}(h``struct drm_plane *plane``h]j )}(hjn*h]hstruct drm_plane *plane}(hjp*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjl*ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKbhjh*ubj )}(hhh]h)}(hPlaneh]hPlane}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hKbhj*ubah}(h]h ]h"]h$]h&]uh1j hjh*ubeh}(h]h ]h"]h$]h&]uh1j{ hj*hKbhje*ubj| )}(hL``struct drm_plane_state *state`` Plane state the fence will be attached to h](j )}(h!``struct drm_plane_state *state``h]j )}(hj*h]hstruct drm_plane_state *state}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKchj*ubj )}(hhh]h)}(h)Plane state the fence will be attached toh]h)Plane state the fence will be attached to}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hKchj*ubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hj*hKchje*ubeh}(h]h ]h"]h$]h&]uh1jv hjI*ubh)}(h**Description**h]j3 )}(hj*h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKehjI*ubh)}(hXThis function extracts the exclusive fence from :c:type:`drm_gem_object.resv ` and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct :c:type:`dma_buf`. This function can be used as the :c:type:`drm_plane_helper_funcs.prepare_fb ` callback.h](h0This function extracts the exclusive fence from }(hj*hhhNhNubh)}(h.:c:type:`drm_gem_object.resv `h]j )}(hj+h]hdrm_gem_object.resv}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_gem_objectuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKdhj*ubh and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct }(hj*hhhNhNubh)}(h:c:type:`dma_buf`h]j )}(hj&+h]hdma_buf}(hj(+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj$+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dma_bufuh1hhj+hKdhj*ubh#. This function can be used as the }(hj*hhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]j )}(hjI+h]h!drm_plane_helper_funcs.prepare_fb}(hjK+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjG+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhj+hKdhj*ubh callback.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hKdhjI*ubh)}(hThere is no need for :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory.h](hThere is no need for }(hjp+hhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]j )}(hjz+h]h!drm_plane_helper_funcs.cleanup_fb}(hj|+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjx+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKjhjp+ubh` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory.}(hjp+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hKjhjI*ubh)}(hThis function is the default implementation for GEM drivers of :c:type:`drm_plane_helper_funcs.prepare_fb ` if no callback is provided.h](h?This function is the default implementation for GEM drivers of }(hj+hhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]j )}(hj+h]h!drm_plane_helper_funcs.prepare_fb}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKnhj+ubh if no callback is provided.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hKnhjI*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 3__drm_gem_duplicate_shadow_plane_state (C function)(c.__drm_gem_duplicate_shadow_plane_statehNtauh1j hj hhhNhNubj )}(hhh](j )}(h|void __drm_gem_duplicate_shadow_plane_state (struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h]j )}(h{void __drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h](j)}(hvoidh]hvoid}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+hhhj,hKubj )}(h&__drm_gem_duplicate_shadow_plane_stateh]j )}(h&__drm_gem_duplicate_shadow_plane_stateh]h&__drm_gem_duplicate_shadow_plane_state}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj+hhhj,hKubj)}(hP(struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj1,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-,ubj )}(h h]h }(hj>,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-,ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjO,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjL,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQ,modnameN classnameNj j )}j ]j%)}jj,sb(c.__drm_gem_duplicate_shadow_plane_stateasbuh1hhj-,ubj )}(h h]h }(hjo,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-,ubj9)}(hjOh]h*}(hj},hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj-,ubj )}(hplaneh]hplane}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj),ubj)}(h5struct drm_shadow_plane_state *new_shadow_plane_stateh](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]jk,(c.__drm_gem_duplicate_shadow_plane_stateasbuh1hhj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj9)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj,ubj )}(hnew_shadow_plane_stateh]hnew_shadow_plane_state}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj),ubeh}(h]h ]h"]h$]h&]j j uh1jhj+hhhj,hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+hhhj,hKubah}(h]j+ah ](j j eh"]h$]h&]j j )j huh1j hj,hKhj+hhubj )}(hhh]h)}(h&duplicates shadow-buffered plane stateh]h&duplicates shadow-buffered plane state}(hj$-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!-hhubah}(h]h ]h"]h$]h&]uh1j hj+hhhj,hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j<-j$ j<-j% j& j' uh1j hhhj hNhNubj) )}(hX1**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_shadow_plane_state *new_shadow_plane_state`` the new shadow-buffered plane state **Description** This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state. The function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h](h)}(h**Parameters**h]j3 )}(hjF-h]h Parameters}(hjH-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjD-ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj@-ubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` the plane h](j )}(h``struct drm_plane *plane``h]j )}(hje-h]hstruct drm_plane *plane}(hjg-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjc-ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj_-ubj )}(hhh]h)}(h the planeh]h the plane}(hj~-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz-hKhj{-ubah}(h]h ]h"]h$]h&]uh1j hj_-ubeh}(h]h ]h"]h$]h&]uh1j{ hjz-hKhj\-ubj| )}(h^``struct drm_shadow_plane_state *new_shadow_plane_state`` the new shadow-buffered plane state h](j )}(h9``struct drm_shadow_plane_state *new_shadow_plane_state``h]j )}(hj-h]h5struct drm_shadow_plane_state *new_shadow_plane_state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj-ubj )}(hhh]h)}(h#the new shadow-buffered plane stateh]h#the new shadow-buffered plane state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]uh1j{ hj-hKhj\-ubeh}(h]h ]h"]h$]h&]uh1jv hj@-ubh)}(h**Description**h]j3 )}(hj-h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj@-ubh)}(h~This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state.h]h~This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj@-ubh)}(hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h]hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane’s prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj@-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_gem_duplicate_shadow_plane_state (C function)&c.drm_gem_duplicate_shadow_plane_statehNtauh1j hj hhhNhNubj )}(hhh](j )}(hWstruct drm_plane_state * drm_gem_duplicate_shadow_plane_state (struct drm_plane *plane)h]j )}(hUstruct drm_plane_state *drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane)h](j )}(hj h]hstruct}(hj-.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj).hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj )}(h h]h }(hj;.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj).hhhj:.hKubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjL.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjN.modnameN classnameNj j )}j ]j%)}j$drm_gem_duplicate_shadow_plane_statesb&c.drm_gem_duplicate_shadow_plane_stateasbuh1hhj).hhhj:.hKubj )}(h h]h }(hjm.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj).hhhj:.hKubj9)}(hjOh]h*}(hj{.hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj).hhhj:.hKubj )}(h$drm_gem_duplicate_shadow_plane_stateh]j )}(hjj.h]h$drm_gem_duplicate_shadow_plane_state}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj).hhhj:.hKubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]jh.&c.drm_gem_duplicate_shadow_plane_stateasbuh1hhj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj9)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj.ubj )}(hplaneh]hplane}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubah}(h]h ]h"]h$]h&]j j uh1jhj).hhhj:.hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj%.hhhj:.hKubah}(h]j .ah ](j j eh"]h$]h&]j j )j huh1j hj:.hKhj".hhubj )}(hhh]h)}(h&duplicates shadow-buffered plane stateh]h&duplicates shadow-buffered plane state}(hj(/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj%/hhubah}(h]h ]h"]h$]h&]uh1j hj".hhhj:.hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j@/j$ j@/j% j& j' uh1j hhhj hNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` the plane **Description** This function implements struct :c:type:`drm_plane_funcs.atomic_duplicate_state ` for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type. The function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers. **Return** A pointer to a new plane state on success, or NULL otherwise.h](h)}(h**Parameters**h]j3 )}(hjJ/h]h Parameters}(hjL/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjH/ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjD/ubjw )}(hhh]j| )}(h&``struct drm_plane *plane`` the plane h](j )}(h``struct drm_plane *plane``h]j )}(hji/h]hstruct drm_plane *plane}(hjk/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjg/ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjc/ubj )}(hhh]h)}(h the planeh]h the plane}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~/hKhj/ubah}(h]h ]h"]h$]h&]uh1j hjc/ubeh}(h]h ]h"]h$]h&]uh1j{ hj~/hKhj`/ubah}(h]h ]h"]h$]h&]uh1jv hjD/ubh)}(h**Description**h]j3 )}(hj/h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjD/ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.atomic_duplicate_state ` for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type.h](h This function implements struct }(hj/hhhNhNubh)}(hB:c:type:`drm_plane_funcs.atomic_duplicate_state `h]j )}(hj/h]h&drm_plane_funcs.atomic_duplicate_state}(hj/hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj/ubh for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type.}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/hKhjD/ubh)}(hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h]hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane’s prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjD/ubh)}(h **Return**h]j3 )}(hj/h]hReturn}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjD/ubh)}(h=A pointer to a new plane state on success, or NULL otherwise.h]h=A pointer to a new plane state on success, or NULL otherwise.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjD/ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1__drm_gem_destroy_shadow_plane_state (C function)&c.__drm_gem_destroy_shadow_plane_statehNtauh1j hj hhhNhNubj )}(hhh](j )}(h]void __drm_gem_destroy_shadow_plane_state (struct drm_shadow_plane_state *shadow_plane_state)h]j )}(h\void __drm_gem_destroy_shadow_plane_state(struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hvoidh]hvoid}(hjB0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>0hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj )}(h h]h }(hjQ0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>0hhhjP0hKubj )}(h$__drm_gem_destroy_shadow_plane_stateh]j )}(h$__drm_gem_destroy_shadow_plane_stateh]h$__drm_gem_destroy_shadow_plane_state}(hjc0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_0ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>0hhhjP0hKubj)}(h3(struct drm_shadow_plane_state *shadow_plane_state)h]j)}(h1struct drm_shadow_plane_state *shadow_plane_stateh](j )}(hj h]hstruct}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{0ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{0ubh)}(hhh]j )}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj0modnameN classnameNj j )}j ]j%)}jje0sb&c.__drm_gem_destroy_shadow_plane_stateasbuh1hhj{0ubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{0ubj9)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj{0ubj )}(hshadow_plane_stateh]hshadow_plane_state}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjw0ubah}(h]h ]h"]h$]h&]j j uh1jhj>0hhhjP0hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:0hhhjP0hKubah}(h]j50ah ](j j eh"]h$]h&]j j )j huh1j hjP0hKhj70hhubj )}(hhh]h)}(h%cleans up shadow-buffered plane stateh]h%cleans up shadow-buffered plane state}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj0hhubah}(h]h ]h"]h$]h&]uh1j hj70hhhjP0hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j1j$ j1j% j& j' uh1j hhhj hNhNubj) )}(h**Parameters** ``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state **Description** This function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.h](h)}(h**Parameters**h]j3 )}(hj$1h]h Parameters}(hj&1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"1ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj1ubjw )}(hhh]j| )}(hV``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state h](j )}(h5``struct drm_shadow_plane_state *shadow_plane_state``h]j )}(hjC1h]h1struct drm_shadow_plane_state *shadow_plane_state}(hjE1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjA1ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj=1ubj )}(hhh]h)}(hthe shadow-buffered plane stateh]hthe shadow-buffered plane state}(hj\1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjX1hKhjY1ubah}(h]h ]h"]h$]h&]uh1j hj=1ubeh}(h]h ]h"]h$]h&]uh1j{ hjX1hKhj:1ubah}(h]h ]h"]h$]h&]uh1jv hj1ubh)}(h**Description**h]j3 )}(hj~1h]h Description}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|1ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj1ubh)}(huThis function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.h]huThis function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_gem_destroy_shadow_plane_state (C function)$c.drm_gem_destroy_shadow_plane_statehNtauh1j hj hhhNhNubj )}(hhh](j )}(hfvoid drm_gem_destroy_shadow_plane_state (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(hevoid drm_gem_destroy_shadow_plane_state(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1hhhj1hMubj )}(h"drm_gem_destroy_shadow_plane_stateh]j )}(h"drm_gem_destroy_shadow_plane_stateh]h"drm_gem_destroy_shadow_plane_state}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj1hhhj1hMubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj 2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj 2modnameN classnameNj j )}j ]j%)}jj1sb$c.drm_gem_destroy_shadow_plane_stateasbuh1hhj1ubj )}(h h]h }(hj>2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj9)}(hjOh]h*}(hjL2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj1ubj )}(hplaneh]hplane}(hjY2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjr2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn2ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2modnameN classnameNj j )}j ]j:2$c.drm_gem_destroy_shadow_plane_stateasbuh1hhjn2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn2ubj9)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjn2ubj )}(h plane_stateh]h plane_state}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhj1hhhj1hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj1hhhj1hMubah}(h]j1ah ](j j eh"]h$]h&]j j )j huh1j hj1hMhj1hhubj )}(hhh]h)}(h#deletes shadow-buffered plane stateh]h#deletes shadow-buffered plane state}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj2hhubah}(h]h ]h"]h$]h&]uh1j hj1hhhj1hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j 3j$ j 3j% j& j' uh1j hhhj hNhNubj) )}(hXn**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_funcs.atomic_destroy_state ` for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.h](h)}(h**Parameters**h]j3 )}(hj3h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM hj3ubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` the plane h](j )}(h``struct drm_plane *plane``h]j )}(hj43h]hstruct drm_plane *plane}(hj63hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj23ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj.3ubj )}(hhh]h)}(h the planeh]h the plane}(hjM3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI3hMhjJ3ubah}(h]h ]h"]h$]h&]uh1j hj.3ubeh}(h]h ]h"]h$]h&]uh1j{ hjI3hMhj+3ubj| )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hjm3h]h#struct drm_plane_state *plane_state}(hjo3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjk3ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjg3ubj )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMhj3ubah}(h]h ]h"]h$]h&]uh1j hjg3ubeh}(h]h ]h"]h$]h&]uh1j{ hj3hMhj+3ubeh}(h]h ]h"]h$]h&]uh1jv hj3ubh)}(h**Description**h]j3 )}(hj3h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM hj3ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.atomic_destroy_state ` for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.h](h This function implements struct }(hj3hhhNhNubh)}(h@:c:type:`drm_plane_funcs.atomic_destroy_state `h]j )}(hj3h]h$drm_plane_funcs.atomic_destroy_state}(hj3hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj3ubhc for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj3hMhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )__drm_gem_reset_shadow_plane (C function)c.__drm_gem_reset_shadow_planehNtauh1j hj hhhNhNubj )}(hhh](j )}(hnvoid __drm_gem_reset_shadow_plane (struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h]j )}(hmvoid __drm_gem_reset_shadow_plane(struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 4hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 4hhhj4hMubj )}(h__drm_gem_reset_shadow_planeh]j )}(h__drm_gem_reset_shadow_planeh]h__drm_gem_reset_shadow_plane}(hj14hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-4ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj 4hhhj4hMubj)}(hL(struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjM4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI4ubj )}(h h]h }(hjZ4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI4ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjk4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjm4modnameN classnameNj j )}j ]j%)}jj34sbc.__drm_gem_reset_shadow_planeasbuh1hhjI4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI4ubj9)}(hjOh]h*}(hj4hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjI4ubj )}(hplaneh]hplane}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE4ubj)}(h1struct drm_shadow_plane_state *shadow_plane_stateh](j )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j4c.__drm_gem_reset_shadow_planeasbuh1hhj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj9)}(hjOh]h*}(hj 5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj4ubj )}(hshadow_plane_stateh]hshadow_plane_state}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE4ubeh}(h]h ]h"]h$]h&]j j uh1jhj 4hhhj4hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj4hhhj4hMubah}(h]j4ah ](j j eh"]h$]h&]j j )j huh1j hj4hMhj4hhubj )}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hj@5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj=5hhubah}(h]h ]h"]h$]h&]uh1j hj4hhhj4hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jX5j$ jX5j% j& j' uh1j hhhj hNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state **Description** This function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.h](h)}(h**Parameters**h]j3 )}(hjb5h]h Parameters}(hjd5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`5ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj\5ubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` the plane h](j )}(h``struct drm_plane *plane``h]j )}(hj5h]hstruct drm_plane *plane}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj{5ubj )}(hhh]h)}(h the planeh]h the plane}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj5ubah}(h]h ]h"]h$]h&]uh1j hj{5ubeh}(h]h ]h"]h$]h&]uh1j{ hj5hMhjx5ubj| )}(hV``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state h](j )}(h5``struct drm_shadow_plane_state *shadow_plane_state``h]j )}(hj5h]h1struct drm_shadow_plane_state *shadow_plane_state}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj5ubj )}(hhh]h)}(hthe shadow-buffered plane stateh]hthe shadow-buffered plane state}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj5ubah}(h]h ]h"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]uh1j{ hj5hMhjx5ubeh}(h]h ]h"]h$]h&]uh1jv hj\5ubh)}(h**Description**h]j3 )}(hj5h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj\5ubh)}(hwThis function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.h]hwThis function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.}(hj 6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj\5ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_gem_reset_shadow_plane (C function)c.drm_gem_reset_shadow_planehNtauh1j hj hhhNhNubj )}(hhh](j )}(h9void drm_gem_reset_shadow_plane (struct drm_plane *plane)h]j )}(h8void drm_gem_reset_shadow_plane(struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hj:6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj66hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM-ubj )}(h h]h }(hjI6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj66hhhjH6hM-ubj )}(hdrm_gem_reset_shadow_planeh]j )}(hdrm_gem_reset_shadow_planeh]hdrm_gem_reset_shadow_plane}(hj[6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjW6ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj66hhhjH6hM-ubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjw6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs6ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs6ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj6modnameN classnameNj j )}j ]j%)}jj]6sbc.drm_gem_reset_shadow_planeasbuh1hhjs6ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs6ubj9)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjs6ubj )}(hplaneh]hplane}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjo6ubah}(h]h ]h"]h$]h&]j j uh1jhj66hhhjH6hM-ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj26hhhjH6hM-ubah}(h]j-6ah ](j j eh"]h$]h&]j j )j huh1j hjH6hM-hj/6hhubj )}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM-hj6hhubah}(h]h ]h"]h$]h&]uh1j hj/6hhhjH6hM-ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j7j$ j7j% j& j' uh1j hhhj hNhNubj) )}(hX3**Parameters** ``struct drm_plane *plane`` the plane **Description** This function implements struct :c:type:`drm_plane_funcs.reset_plane ` for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.h](h)}(h**Parameters**h]j3 )}(hj7h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM1hj7ubjw )}(hhh]j| )}(h&``struct drm_plane *plane`` the plane h](j )}(h``struct drm_plane *plane``h]j )}(hj;7h]hstruct drm_plane *plane}(hj=7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj97ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM.hj57ubj )}(hhh]h)}(h the planeh]h the plane}(hjT7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjP7hM.hjQ7ubah}(h]h ]h"]h$]h&]uh1j hj57ubeh}(h]h ]h"]h$]h&]uh1j{ hjP7hM.hj27ubah}(h]h ]h"]h$]h&]uh1jv hj7ubh)}(h**Description**h]j3 )}(hjv7h]h Description}(hjx7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjt7ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM0hj7ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.reset_plane ` for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.h](h This function implements struct }(hj7hhhNhNubh)}(h7:c:type:`drm_plane_funcs.reset_plane `h]j )}(hj7h]hdrm_plane_funcs.reset_plane}(hj7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM/hj7ubh for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hM/hj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_gem_begin_shadow_fb_access (C function) c.drm_gem_begin_shadow_fb_accesshNtauh1j hj hhhNhNubj )}(hhh](j )}(haint drm_gem_begin_shadow_fb_access (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(h`int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hinth]hint}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMDubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhj7hMDubj )}(hdrm_gem_begin_shadow_fb_accessh]j )}(hdrm_gem_begin_shadow_fb_accessh]hdrm_gem_begin_shadow_fb_access}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhj7hMDubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj(8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj98hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj68ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;8modnameN classnameNj j )}j ]j%)}jj8sb c.drm_gem_begin_shadow_fb_accessasbuh1hhj8ubj )}(h h]h }(hjY8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hjg8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(hplaneh]hplane}(hjt8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]jU8 c.drm_gem_begin_shadow_fb_accessasbuh1hhj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(h plane_stateh]h plane_state}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubeh}(h]h ]h"]h$]h&]j j uh1jhj7hhhj7hMDubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhj7hMDubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j hj7hMDhj7hhubj )}(hhh]h)}(h+prepares shadow framebuffers for CPU accessh]h+prepares shadow framebuffers for CPU access}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMDhj 9hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhj7hMDubeh}(h]h ](j functioneh"]h$]h&]j" j j# j&9j$ j&9j% j& j' uh1j hhhj hNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_helper_funcs.begin_fb_access `. It maps all buffer objects of the plane's framebuffer into kernel address space and stores them in struct :c:type:`drm_shadow_plane_state.map `. The first data bytes are available in struct :c:type:`drm_shadow_plane_state.data `. See drm_gem_end_shadow_fb_access() for cleanup. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hj09h]h Parameters}(hj29hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.9ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMHhj*9ubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` the plane h](j )}(h``struct drm_plane *plane``h]j )}(hjO9h]hstruct drm_plane *plane}(hjQ9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjM9ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMEhjI9ubj )}(hhh]h)}(h the planeh]h the plane}(hjh9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjd9hMEhje9ubah}(h]h ]h"]h$]h&]uh1j hjI9ubeh}(h]h ]h"]h$]h&]uh1j{ hjd9hMEhjF9ubj| )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hj9h]h#struct drm_plane_state *plane_state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMFhj9ubj )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMFhj9ubah}(h]h ]h"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]uh1j{ hj9hMFhjF9ubeh}(h]h ]h"]h$]h&]uh1jv hj*9ubh)}(h**Description**h]j3 )}(hj9h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMHhj*9ubh)}(hXThis function implements struct :c:type:`drm_plane_helper_funcs.begin_fb_access `. It maps all buffer objects of the plane's framebuffer into kernel address space and stores them in struct :c:type:`drm_shadow_plane_state.map `. The first data bytes are available in struct :c:type:`drm_shadow_plane_state.data `.h](h This function implements struct }(hj9hhhNhNubh)}(hI:c:type:`drm_plane_helper_funcs.begin_fb_access `h]j )}(hj9h]h&drm_plane_helper_funcs.begin_fb_access}(hj9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMGhj9ubhn. It maps all buffer objects of the plane’s framebuffer into kernel address space and stores them in struct }(hj9hhhNhNubh)}(h=:c:type:`drm_shadow_plane_state.map `h]j )}(hj:h]hdrm_shadow_plane_state.map}(hj :hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_shadow_plane_stateuh1hhj:hMGhj9ubh/. The first data bytes are available in struct }(hj9hhhNhNubh)}(h>:c:type:`drm_shadow_plane_state.data `h]j )}(hj*:h]hdrm_shadow_plane_state.data}(hj,:hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj(:ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_shadow_plane_stateuh1hhj:hMGhj9ubh.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:hMGhj*9ubh)}(h/See drm_gem_end_shadow_fb_access() for cleanup.h]h/See drm_gem_end_shadow_fb_access() for cleanup.}(hjQ:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMLhj*9ubh)}(h **Return**h]j3 )}(hjb:h]hReturn}(hjd:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`:ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMNhj*9ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjx:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMOhj*9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_gem_end_shadow_fb_access (C function)c.drm_gem_end_shadow_fb_accesshNtauh1j hj hhhNhNubj )}(hhh](j )}(h`void drm_gem_end_shadow_fb_access (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j )}(h_void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM_ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:hhhj:hM_ubj )}(hdrm_gem_end_shadow_fb_accessh]j )}(hdrm_gem_end_shadow_fb_accessh]hdrm_gem_end_shadow_fb_access}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj:hhhj:hM_ubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j%)}jj:sbc.drm_gem_end_shadow_fb_accessasbuh1hhj:ubj )}(h h]h }(hj";hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj9)}(hjOh]h*}(hj0;hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj:ubj )}(hplaneh]hplane}(hj=;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hjV;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR;ubj )}(h h]h }(hjc;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR;ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjt;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjv;modnameN classnameNj j )}j ]j;c.drm_gem_end_shadow_fb_accessasbuh1hhjR;ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR;ubj9)}(hjOh]h*}(hj;hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjR;ubj )}(h plane_stateh]h plane_state}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj:ubeh}(h]h ]h"]h$]h&]j j uh1jhj:hhhj:hM_ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:hhhj:hM_ubah}(h]j:ah ](j j eh"]h$]h&]j j )j huh1j hj:hM_hj:hhubj )}(hhh]h)}(h,releases shadow framebuffers from CPU accessh]h,releases shadow framebuffers from CPU access}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM_hj;hhubah}(h]h ]h"]h$]h&]uh1j hj:hhhj:hM_ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j;j$ j;j% j& j' uh1j hhhj hNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_helper_funcs.end_fb_access `. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order. See drm_gem_begin_shadow_fb_access() for more information.h](h)}(h**Parameters**h]j3 )}(hj;h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMchj;ubjw )}(hhh](j| )}(h&``struct drm_plane *plane`` the plane h](j )}(h``struct drm_plane *plane``h]j )}(hj<h]hstruct drm_plane *plane}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM`hj<ubj )}(hhh]h)}(h the planeh]h the plane}(hj1<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-<hM`hj.<ubah}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj-<hM`hj<ubj| )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hjQ<h]h#struct drm_plane_state *plane_state}(hjS<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjO<ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMahjK<ubj )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hjj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjf<hMahjg<ubah}(h]h ]h"]h$]h&]uh1j hjK<ubeh}(h]h ]h"]h$]h&]uh1j{ hjf<hMahj<ubeh}(h]h ]h"]h$]h&]uh1jv hj;ubh)}(h**Description**h]j3 )}(hj<h]h Description}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMchj;ubh)}(hThis function implements struct :c:type:`drm_plane_helper_funcs.end_fb_access `. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order.h](h This function implements struct }(hj<hhhNhNubh)}(hG:c:type:`drm_plane_helper_funcs.end_fb_access `h]j )}(hj<h]h$drm_plane_helper_funcs.end_fb_access}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMbhj<ubhM. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hMbhj;ubh)}(h:See drm_gem_begin_shadow_fb_access() for more information.h]h:See drm_gem_begin_shadow_fb_access() for more information.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMehj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 6drm_gem_simple_kms_begin_shadow_fb_access (C function)+c.drm_gem_simple_kms_begin_shadow_fb_accesshNtauh1j hj hhhNhNubj )}(hhh](j )}(hyint drm_gem_simple_kms_begin_shadow_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j )}(hxint drm_gem_simple_kms_begin_shadow_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hinth]hint}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMuubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhj=hMuubj )}(h)drm_gem_simple_kms_begin_shadow_fb_accessh]j )}(h)drm_gem_simple_kms_begin_shadow_fb_accessh]h)drm_gem_simple_kms_begin_shadow_fb_access}(hj$=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj =ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj<hhhj=hMuubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j )}(hj h]hstruct}(hj@=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<=ubj )}(h h]h }(hjM=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<=ubh)}(hhh]j )}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj^=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`=modnameN classnameNj j )}j ]j%)}jj&=sb+c.drm_gem_simple_kms_begin_shadow_fb_accessasbuh1hhj<=ubj )}(h h]h }(hj~=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<=ubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj<=ubj )}(hpipeh]hpipe}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8=ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=modnameN classnameNj j )}j ]jz=+c.drm_gem_simple_kms_begin_shadow_fb_accessasbuh1hhj=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj=ubj )}(h plane_stateh]h plane_state}(hj >hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8=ubeh}(h]h ]h"]h$]h&]j j uh1jhj<hhhj=hMuubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhj=hMuubah}(h]j<ah ](j j eh"]h$]h&]j j )j huh1j hj=hMuhj<hhubj )}(hhh]h)}(h+prepares shadow framebuffers for CPU accessh]h+prepares shadow framebuffers for CPU access}(hj3>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMuhj0>hhubah}(h]h ]h"]h$]h&]uh1j hj<hhhj=hMuubeh}(h]h ](j functioneh"]h$]h&]j" j j# jK>j$ jK>j% j& j' uh1j hhhj hNhNubj) )}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct drm_simple_display_funcs.begin_fb_access. See drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hjU>h]h Parameters}(hjW>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjS>ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMyhjO>ubjw )}(hhh](j| )}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](j )}(h(``struct drm_simple_display_pipe *pipe``h]j )}(hjt>h]h$struct drm_simple_display_pipe *pipe}(hjv>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjr>ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMvhjn>ubj )}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMvhj>ubah}(h]h ]h"]h$]h&]uh1j hjn>ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMvhjk>ubj| )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hj>h]h#struct drm_plane_state *plane_state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMwhj>ubj )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMwhj>ubah}(h]h ]h"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMwhjk>ubeh}(h]h ]h"]h$]h&]uh1jv hjO>ubh)}(h**Description**h]j3 )}(hj>h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMyhjO>ubh)}(hIThis function implements struct drm_simple_display_funcs.begin_fb_access.h]hIThis function implements struct drm_simple_display_funcs.begin_fb_access.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMxhjO>ubh)}(hhSee drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup.h]hhSee drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup.}(hj ?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMzhjO>ubh)}(h **Return**h]j3 )}(hj?h]hReturn}(hj ?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM}hjO>ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj4?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chM~hjO>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_gem_simple_kms_end_shadow_fb_access (C function))c.drm_gem_simple_kms_end_shadow_fb_accesshNtauh1j hj hhhNhNubj )}(hhh](j )}(hxvoid drm_gem_simple_kms_end_shadow_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j )}(hwvoid drm_gem_simple_kms_end_shadow_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hjc?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_?hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hjr?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_?hhhjq?hMubj )}(h'drm_gem_simple_kms_end_shadow_fb_accessh]j )}(h'drm_gem_simple_kms_end_shadow_fb_accessh]h'drm_gem_simple_kms_end_shadow_fb_access}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_?hhhjq?hMubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubh)}(hhh]j )}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?modnameN classnameNj j )}j ]j%)}jj?sb)c.drm_gem_simple_kms_end_shadow_fb_accessasbuh1hhj?ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubj9)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj?ubj )}(hpipeh]hpipe}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubj)}(h#struct drm_plane_state *plane_stateh](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj0@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2@modnameN classnameNj j )}j ]j?)c.drm_gem_simple_kms_end_shadow_fb_accessasbuh1hhj@ubj )}(h h]h }(hjN@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj9)}(hjOh]h*}(hj\@hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubj )}(h plane_stateh]h plane_state}(hji@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubeh}(h]h ]h"]h$]h&]j j uh1jhj_?hhhjq?hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[?hhhjq?hMubah}(h]jV?ah ](j j eh"]h$]h&]j j )j huh1j hjq?hMhjX?hhubj )}(hhh]h)}(h,releases shadow framebuffers from CPU accessh]h,releases shadow framebuffers from CPU access}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj@hhubah}(h]h ]h"]h$]h&]uh1j hjX?hhhjq?hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j@j$ j@j% j& j' uh1j hhhj hNhNubj) )}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order. See drm_gem_simple_kms_begin_shadow_fb_access().h](h)}(h**Parameters**h]j3 )}(hj@h]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj@ubjw )}(hhh](j| )}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](j )}(h(``struct drm_simple_display_pipe *pipe``h]j )}(hj@h]h$struct drm_simple_display_pipe *pipe}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj@ubj )}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhj@ubah}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hMhj@ubj| )}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](j )}(h'``struct drm_plane_state *plane_state``h]j )}(hj Ah]h#struct drm_plane_state *plane_state}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Aubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjAubj )}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj&AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"AhMhj#Aubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hj"AhMhj@ubeh}(h]h ]h"]h$]h&]uh1jv hj@ubh)}(h**Description**h]j3 )}(hjHAh]h Description}(hjJAhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFAubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj@ubh)}(hThis function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order.h]hThis function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order.}(hj^AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj@ubh)}(h0See drm_gem_simple_kms_begin_shadow_fb_access().h]h0See drm_gem_simple_kms_begin_shadow_fb_access().}(hjmAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj@ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_gem_simple_kms_reset_shadow_plane (C function)'c.drm_gem_simple_kms_reset_shadow_planehNtauh1j hj hhhNhNubj )}(hhh](j )}(hQvoid drm_gem_simple_kms_reset_shadow_plane (struct drm_simple_display_pipe *pipe)h]j )}(hPvoid drm_gem_simple_kms_reset_shadow_plane(struct drm_simple_display_pipe *pipe)h](j)}(hvoidh]hvoid}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAhhhjAhMubj )}(h%drm_gem_simple_kms_reset_shadow_planeh]j )}(h%drm_gem_simple_kms_reset_shadow_planeh]h%drm_gem_simple_kms_reset_shadow_plane}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ](j j eh"]h$]h&]j j uh1j hjAhhhjAhMubj)}(h&(struct drm_simple_display_pipe *pipe)h]j)}(h$struct drm_simple_display_pipe *pipeh](j )}(hj h]hstruct}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubh)}(hhh]j )}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j%)}jjAsb'c.drm_gem_simple_kms_reset_shadow_planeasbuh1hhjAubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj9)}(hjOh]h*}(hj%BhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjAubj )}(hpipeh]hpipe}(hj2BhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjAubah}(h]h ]h"]h$]h&]j j uh1jhjAhhhjAhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjAhhhjAhMubah}(h]jAah ](j j eh"]h$]h&]j j )j huh1j hjAhMhjAhhubj )}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hj\BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjYBhhubah}(h]h ]h"]h$]h&]uh1j hjAhhhjAhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jtBj$ jtBj% j& j' uh1j hhhj hNhNubj) )}(h**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe **Description** This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.h](h)}(h**Parameters**h]j3 )}(hj~Bh]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|Bubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjxBubjw )}(hhh]j| )}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](j )}(h(``struct drm_simple_display_pipe *pipe``h]j )}(hjBh]h$struct drm_simple_display_pipe *pipe}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1j hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjBubj )}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]uh1j{ hjBhMhjBubah}(h]h ]h"]h$]h&]uh1jv hjxBubh)}(h**Description**h]j3 )}(hjBh]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjBubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjxBubh)}(h`This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.h]h`This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjxBubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j CmodnameN classnameNj j )}j ]j%)}j/drm_gem_simple_kms_duplicate_shadow_plane_statesb1c.drm_gem_simple_kms_duplicate_shadow_plane_stateasbuh1hhjChhhj*ChMubj )}(h h]h }(hj]ChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjChhhj*ChMubj9)}(hjOh]h*}(hjkChhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjChhhj*ChMubj )}(h/drm_gem_simple_kms_duplicate_shadow_plane_stateh]j )}(hjZCh]h/drm_gem_simple_kms_duplicate_shadow_plane_state}(hj|ChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxCubah}(h]h ](j j eh"]h$]h&]j j uh1j hjChhhj*ChMubj)}(h&(struct drm_simple_display_pipe *pipe)h]j)}(h$struct drm_simple_display_pipe *pipeh](j )}(hj h]hstruct}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubh)}(hhh]j )}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjCmodnameN classnameNj j )}j ]jXC1c.drm_gem_simple_kms_duplicate_shadow_plane_stateasbuh1hhjCubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj9)}(hjOh]h*}(hjChhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjCubj )}(hpipeh]hpipe}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCubah}(h]h ]h"]h$]h&]j j uh1jhjChhhj*ChMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjChhhj*ChMubah}(h]jCah ](j j eh"]h$]h&]j j )j huh1j hj*ChMhjChhubj )}(hhh]h)}(h&duplicates shadow-buffered plane stateh]h&duplicates shadow-buffered plane state}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:94: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjDhhubah}(h]h ]h"]h$]h&]uh1j hjChhhj*ChMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j0Dj$ j0Dj% j& j' uh1j hhhj hNhNubj) )}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe **Description** This function implements struct drm_simple_display_funcs.duplicate_plane_state for shadow-buffered planes. It does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. **Return** A pointer to a new plane state on success, or NULL otherwise.h](h)}(h**Parameters**h]j3 )}(hj:Dh]h Parameters}(hj`.h](hXOnce the driver enables vblank support with drm_vblank_init(), each CRTC’s vblank timer fires according to the programmed display mode. By default, the vblank timer invokes drm_crtc_handle_vblank(). Drivers with more specific requirements can set their own handler function in struct }(hjGhhhNhNubh)}(hM:c:type:`drm_crtc_helper_funcs.handle_vblank_timeout `h]j )}(hjGh]h+drm_crtc_helper_funcs.handle_vblank_timeout}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:100: ./drivers/gpu/drm/drm_vblank_helper.chKhjGubh.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhKhjGhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &DRM_CRTC_HELPER_VBLANK_FUNCS (C macro)c.DRM_CRTC_HELPER_VBLANK_FUNCShNtauh1j hjGhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhNubj )}(hhh](j )}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j )}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j )}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j )}(hjGh]hDRM_CRTC_HELPER_VBLANK_FUNCS}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhjGhKubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j hjGhKhjGhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjGhhhjGhKubeh}(h]h ](j macroeh"]h$]h&]j" j j# j Hj$ j Hj% j& j' uh1j hhhjGhjGhNubh)}(h ``DRM_CRTC_HELPER_VBLANK_FUNCS``h]j )}(hjHh]hDRM_CRTC_HELPER_VBLANK_FUNCS}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Hubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhKhjGhhubj^E)}(h Default implementation for VBLANK helpers **Description** This macro initializes struct :c:type:`drm_crtc_helper_funcs` to default helpers for VBLANK handling. h](j^E)}(h*Default implementation for VBLANK helpers h]h)}(h)Default implementation for VBLANK helpersh]h)Default implementation for VBLANK helpers}(hj-HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhKhj)Hubah}(h]h ]h"]h$]h&]uh1j]Ehj;HhKhj%Hubh)}(h**Description**h]j3 )}(hjDHh]h Description}(hjFHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjBHubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhKhj%Hubh)}(heThis macro initializes struct :c:type:`drm_crtc_helper_funcs` to default helpers for VBLANK handling.h](hThis macro initializes struct }(hjZHhhhNhNubh)}(h:c:type:`drm_crtc_helper_funcs`h]j )}(hjdHh]hdrm_crtc_helper_funcs}(hjfHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjbHubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhKhjZHubh( to default helpers for VBLANK handling.}(hjZHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhKhj%Hubeh}(h]h ]h"]h$]h&]uh1j]Ehj;HhKhjGhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %DRM_CRTC_VBLANK_TIMER_FUNCS (C macro)c.DRM_CRTC_VBLANK_TIMER_FUNCShNtauh1j hjGhhhjGhNubj )}(hhh](j )}(hDRM_CRTC_VBLANK_TIMER_FUNCSh]j )}(hDRM_CRTC_VBLANK_TIMER_FUNCSh]j )}(hDRM_CRTC_VBLANK_TIMER_FUNCSh]j )}(hjHh]hDRM_CRTC_VBLANK_TIMER_FUNCS}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ](j j eh"]h$]h&]j j uh1j hjHhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhK.ubah}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhjHhK.ubah}(h]jHah ](j j eh"]h$]h&]j j )j huh1j hjHhK.hjHhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjHhhhjHhK.ubeh}(h]h ](j macroeh"]h$]h&]j" j j# jHj$ jHj% j& j' uh1j hhhjGhjGhNubh)}(h``DRM_CRTC_VBLANK_TIMER_FUNCS``h]j )}(hjHh]hDRM_CRTC_VBLANK_TIMER_FUNCS}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhK0hjGhhubj^E)}(h Default implementation for VBLANK timers **Description** This macro initializes struct :c:type:`drm_crtc_funcs` to default helpers for VBLANK timers. h](j^E)}(h)Default implementation for VBLANK timers h]h)}(h(Default implementation for VBLANK timersh]h(Default implementation for VBLANK timers}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhK.hjHubah}(h]h ]h"]h$]h&]uh1j]Ehj IhK.hjHubh)}(h**Description**h]j3 )}(hjIh]h Description}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhK0hjHubh)}(h\This macro initializes struct :c:type:`drm_crtc_funcs` to default helpers for VBLANK timers.h](hThis macro initializes struct }(hj,IhhhNhNubh)}(h:c:type:`drm_crtc_funcs`h]j )}(hj6Ih]hdrm_crtc_funcs}(hj8IhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj4Iubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:103: ./include/drm/drm_vblank_helper.hhK/hj,Iubh& to default helpers for VBLANK timers.}(hj,IhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSIhK/hjHubeh}(h]h ]h"]h$]h&]uh1j]Ehj IhK.hjGhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_crtc_vblank_atomic_flush (C function)c.drm_crtc_vblank_atomic_flushhNtauh1j hjGhhhNhNubj )}(hhh](j )}(hZvoid drm_crtc_vblank_atomic_flush (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(hYvoid drm_crtc_vblank_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj}IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyIhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK(ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyIhhhjIhK(ubj )}(hdrm_crtc_vblank_atomic_flushh]j )}(hdrm_crtc_vblank_atomic_flushh]hdrm_crtc_vblank_atomic_flush}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ](j j eh"]h$]h&]j j uh1j hjyIhhhjIhK(ubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j%)}jjIsbc.drm_crtc_vblank_atomic_flushasbuh1hhjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj9)}(hjOh]h*}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjIubj )}(hcrtch]hcrtc}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj,JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Jubj )}(h h]h }(hj9JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Jubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjJJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLJmodnameN classnameNj j )}j ]jIc.drm_crtc_vblank_atomic_flushasbuh1hhj(Jubj )}(h h]h }(hjhJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Jubj9)}(hjOh]h*}(hjvJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj(Jubj )}(hstateh]hstate}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Jubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjIubeh}(h]h ]h"]h$]h&]j j uh1jhjyIhhhjIhK(ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjuIhhhjIhK(ubah}(h]jpIah ](j j eh"]h$]h&]j j )j huh1j hjIhK(hjrIhhubj )}(hhh]h)}(hVImplements struct :c:type:`drm_crtc_helper_funcs.atomic_flush `h](hImplements struct }(hjJhhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_flush `h]j )}(hjJh]h"drm_crtc_helper_funcs.atomic_flush}(hjJhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jIc.drm_crtc_vblank_atomic_flushasbj drm_crtc_helper_funcsuh1hhjIhK(hjJubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK(hjJhhubah}(h]h ]h"]h$]h&]uh1j hjrIhhhjIhK(ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jJj$ jJj% j& j' uh1j hhhjGhNhNubj) )}(hXu**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_commit *state`` The atomic state to apply **Description** The helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event. See also struct :c:type:`drm_crtc_helper_funcs.atomic_flush `.h](h)}(h**Parameters**h]j3 )}(hjJh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK,hjJubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` The CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjKh]hstruct drm_crtc *crtc}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK*hj Kubj )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj+KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'KhK*hj(Kubah}(h]h ]h"]h$]h&]uh1j hj Kubeh}(h]h ]h"]h$]h&]uh1j{ hj'KhK*hj Kubj| )}(h>``struct drm_atomic_commit *state`` The atomic state to apply h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjKKh]hstruct drm_atomic_commit *state}(hjMKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIKubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK+hjEKubj )}(hhh]h)}(hThe atomic state to applyh]hThe atomic state to apply}(hjdKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`KhK+hjaKubah}(h]h ]h"]h$]h&]uh1j hjEKubeh}(h]h ]h"]h$]h&]uh1j{ hj`KhK+hj Kubeh}(h]h ]h"]h$]h&]uh1jv hjJubh)}(h**Description**h]j3 )}(hjKh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjKubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK-hjJubh)}(hThe helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event.h]hThe helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK,hjJubh)}(hUSee also struct :c:type:`drm_crtc_helper_funcs.atomic_flush `.h](hSee also struct }(hjKhhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_flush `h]j )}(hjKh]h"drm_crtc_helper_funcs.atomic_flush}(hjKhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK0hjKubh.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjKhK0hjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjGhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_crtc_vblank_atomic_enable (C function)c.drm_crtc_vblank_atomic_enablehNtauh1j hjGhhhNhNubj )}(hhh](j )}(h[void drm_crtc_vblank_atomic_enable (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(hZvoid drm_crtc_vblank_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKKubj )}(h h]h }(hj LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKhhhj LhKKubj )}(hdrm_crtc_vblank_atomic_enableh]j )}(hdrm_crtc_vblank_atomic_enableh]hdrm_crtc_vblank_atomic_enable}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ](j j eh"]h$]h&]j j uh1j hjKhhhj LhKKubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj:LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Lubj )}(h h]h }(hjGLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Lubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjXLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjULubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZLmodnameN classnameNj j )}j ]j%)}jj Lsbc.drm_crtc_vblank_atomic_enableasbuh1hhj6Lubj )}(h h]h }(hjxLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Lubj9)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj6Lubj )}(hcrtch]hcrtc}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Lubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2Lubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLmodnameN classnameNj j )}j ]jtLc.drm_crtc_vblank_atomic_enableasbuh1hhjLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj9)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubj )}(hstateh]hstate}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2Lubeh}(h]h ]h"]h$]h&]j j uh1jhjKhhhj LhKKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjKhhhj LhKKubah}(h]jKah ](j j eh"]h$]h&]j j )j huh1j hj LhKKhjKhhubj )}(hhh]h)}(hWImplements struct :c:type:`drm_crtc_helper_funcs.atomic_enable `h](hImplements struct }(hj-MhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]j )}(hj7Mh]h#drm_crtc_helper_funcs.atomic_enable}(hj9MhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj5Mubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jtLc.drm_crtc_vblank_atomic_enableasbj drm_crtc_helper_funcsuh1hhjIhK(hj-Mubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKKhj*Mhhubah}(h]h ]h"]h$]h&]uh1j hjKhhhj LhKKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jiMj$ jiMj% j& j' uh1j hhhjGhNhNubj) )}(hXe**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_commit *state`` The atomic state **Description** The helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs. See also struct :c:type:`drm_crtc_helper_funcs.atomic_enable `.h](h)}(h**Parameters**h]j3 )}(hjsMh]h Parameters}(hjuMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjqMubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKOhjmMubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` The CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjMh]hstruct drm_crtc *crtc}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKLhjMubj )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKLhjMubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjMhKLhjMubj| )}(h5``struct drm_atomic_commit *state`` The atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjMh]hstruct drm_atomic_commit *state}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKMhjMubj )}(hhh]h)}(hThe atomic stateh]hThe atomic state}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKMhjMubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjMhKMhjMubeh}(h]h ]h"]h$]h&]uh1jv hjmMubh)}(h**Description**h]j3 )}(hjNh]h Description}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKOhjmMubh)}(hThe helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs.h]hThe helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKNhjmMubh)}(hVSee also struct :c:type:`drm_crtc_helper_funcs.atomic_enable `.h](hSee also struct }(hj+NhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]j )}(hj5Nh]h#drm_crtc_helper_funcs.atomic_enable}(hj7NhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj3Nubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKQhj+Nubh.}(hj+NhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRNhKQhjmMubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjGhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_crtc_vblank_atomic_disable (C function) c.drm_crtc_vblank_atomic_disablehNtauh1j hjGhhhNhNubj )}(hhh](j )}(h\void drm_crtc_vblank_atomic_disable (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(h[void drm_crtc_vblank_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj}NhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyNhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK\ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyNhhhjNhK\ubj )}(hdrm_crtc_vblank_atomic_disableh]j )}(hdrm_crtc_vblank_atomic_disableh]hdrm_crtc_vblank_atomic_disable}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ](j j eh"]h$]h&]j j uh1j hjyNhhhjNhK\ubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNmodnameN classnameNj j )}j ]j%)}jjNsb c.drm_crtc_vblank_atomic_disableasbuh1hhjNubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj9)}(hjOh]h*}(hjOhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjNubj )}(hcrtch]hcrtc}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj,OhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Oubj )}(h h]h }(hj9OhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Oubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjJOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLOmodnameN classnameNj j )}j ]jN c.drm_crtc_vblank_atomic_disableasbuh1hhj(Oubj )}(h h]h }(hjhOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Oubj9)}(hjOh]h*}(hjvOhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj(Oubj )}(hstateh]hstate}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(Oubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubeh}(h]h ]h"]h$]h&]j j uh1jhjyNhhhjNhK\ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjuNhhhjNhK\ubah}(h]jpNah ](j j eh"]h$]h&]j j )j huh1j hjNhK\hjrNhhubj )}(hhh]h)}(hXImplements struct :c:type:`drm_crtc_helper_funcs.atomic_disable `h](hImplements struct }(hjOhhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]j )}(hjOh]h$drm_crtc_helper_funcs.atomic_disable}(hjOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jN c.drm_crtc_vblank_atomic_disableasbj drm_crtc_helper_funcsuh1hhjIhK(hjOubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK\hjOhhubah}(h]h ]h"]h$]h&]uh1j hjrNhhhjNhK\ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jOj$ jOj% j& j' uh1j hhhjGhNhNubj) )}(hX[**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_commit *state`` The atomic state **Description** The helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs. See also struct :c:type:`drm_crtc_funcs.atomic_disable `.h](h)}(h**Parameters**h]j3 )}(hjOh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK`hjOubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` The CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjPh]hstruct drm_crtc *crtc}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK]hj Pubj )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj+PhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'PhK]hj(Pubah}(h]h ]h"]h$]h&]uh1j hj Pubeh}(h]h ]h"]h$]h&]uh1j{ hj'PhK]hj Pubj| )}(h5``struct drm_atomic_commit *state`` The atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjKPh]hstruct drm_atomic_commit *state}(hjMPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIPubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK^hjEPubj )}(hhh]h)}(hThe atomic stateh]hThe atomic state}(hjdPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`PhK^hjaPubah}(h]h ]h"]h$]h&]uh1j hjEPubeh}(h]h ]h"]h$]h&]uh1j{ hj`PhK^hj Pubeh}(h]h ]h"]h$]h&]uh1jv hjOubh)}(h**Description**h]j3 )}(hjPh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjPubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK`hjOubh)}(hThe helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs.h]hThe helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK_hjOubh)}(hISee also struct :c:type:`drm_crtc_funcs.atomic_disable `.h](hSee also struct }(hjPhhhNhNubh)}(h8:c:type:`drm_crtc_funcs.atomic_disable `h]j )}(hjPh]hdrm_crtc_funcs.atomic_disable}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKbhjPubh.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhKbhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjGhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 7drm_crtc_vblank_helper_enable_vblank_timer (C function),c.drm_crtc_vblank_helper_enable_vblank_timerhNtauh1j hjGhhhNhNubj )}(hhh](j )}(hFint drm_crtc_vblank_helper_enable_vblank_timer (struct drm_crtc *crtc)h]j )}(hEint drm_crtc_vblank_helper_enable_vblank_timer(struct drm_crtc *crtc)h](j)}(hinth]hint}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKqubj )}(h h]h }(hj QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhj QhKqubj )}(h*drm_crtc_vblank_helper_enable_vblank_timerh]j )}(h*drm_crtc_vblank_helper_enable_vblank_timerh]h*drm_crtc_vblank_helper_enable_vblank_timer}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhj QhKqubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj:QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Qubj )}(h h]h }(hjGQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Qubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjXQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZQmodnameN classnameNj j )}j ]j%)}jj Qsb,c.drm_crtc_vblank_helper_enable_vblank_timerasbuh1hhj6Qubj )}(h h]h }(hjxQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Qubj9)}(hjOh]h*}(hjQhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj6Qubj )}(hcrtch]hcrtc}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Qubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2Qubah}(h]h ]h"]h$]h&]j j uh1jhjPhhhj QhKqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjPhhhj QhKqubah}(h]jPah ](j j eh"]h$]h&]j j )j huh1j hj QhKqhjPhhubj )}(hhh]h)}(hIImplements struct :c:type:`drm_crtc_funcs.enable_vblank `h](hImplements struct }(hjQhhhNhNubh)}(h7:c:type:`drm_crtc_funcs.enable_vblank `h]j )}(hjQh]hdrm_crtc_funcs.enable_vblank}(hjQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jtQ,c.drm_crtc_vblank_helper_enable_vblank_timerasbj drm_crtc_funcsuh1hhjIhK(hjQubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKqhjQhhubah}(h]h ]h"]h$]h&]uh1j hjPhhhj QhKqubeh}(h]h ](j functioneh"]h$]h&]j" j j# jQj$ jQj% j& j' uh1j hhhjGhNhNubj) )}(hX#**Parameters** ``struct drm_crtc *crtc`` The CRTC **Description** The helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct :c:type:`drm_vblank_crtc.framedur_ns `. See also struct :c:type:`drm_crtc_helper_funcs.enable_vblank `. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hjRh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKuhjQubjw )}(hhh]j| )}(h#``struct drm_crtc *crtc`` The CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hj"Rh]hstruct drm_crtc *crtc}(hj$RhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Rubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKrhjRubj )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj;RhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7RhKrhj8Rubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hj7RhKrhjRubah}(h]h ]h"]h$]h&]uh1jv hjQubh)}(h**Description**h]j3 )}(hj]Rh]h Description}(hj_RhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[Rubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKthjQubh)}(hXEThe helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct :c:type:`drm_vblank_crtc.framedur_ns `.h](hX The helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct }(hjsRhhhNhNubh)}(h7:c:type:`drm_vblank_crtc.framedur_ns `h]j )}(hj}Rh]hdrm_vblank_crtc.framedur_ns}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj{Rubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_vblank_crtcuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKshjsRubh.}(hjsRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhKshjQubh)}(hVSee also struct :c:type:`drm_crtc_helper_funcs.enable_vblank `.h](hSee also struct }(hjRhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.enable_vblank `h]j )}(hjRh]h#drm_crtc_helper_funcs.enable_vblank}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKyhjRubh.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhKyhjQubh)}(h **Return**h]j3 )}(hjRh]hReturn}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK{hjQubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chK|hjQubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjGhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 8drm_crtc_vblank_helper_disable_vblank_timer (C function)-c.drm_crtc_vblank_helper_disable_vblank_timerhNtauh1j hjGhhhNhNubj )}(hhh](j )}(hHvoid drm_crtc_vblank_helper_disable_vblank_timer (struct drm_crtc *crtc)h]j )}(hGvoid drm_crtc_vblank_helper_disable_vblank_timer(struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKubj )}(h h]h }(hj-ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhj,ShKubj )}(h+drm_crtc_vblank_helper_disable_vblank_timerh]j )}(h+drm_crtc_vblank_helper_disable_vblank_timerh]h+drm_crtc_vblank_helper_disable_vblank_timer}(hj?ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;Subah}(h]h ](j j eh"]h$]h&]j j uh1j hjShhhj,ShKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj[ShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWSubj )}(h h]h }(hjhShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWSubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjyShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvSubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{SmodnameN classnameNj j )}j ]j%)}jjASsb-c.drm_crtc_vblank_helper_disable_vblank_timerasbuh1hhjWSubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWSubj9)}(hjOh]h*}(hjShhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjWSubj )}(hcrtch]hcrtc}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjSSubah}(h]h ]h"]h$]h&]j j uh1jhjShhhj,ShKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhj,ShKubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j hj,ShKhjShhubj )}(hhh]h)}(hJImplements struct :c:type:`drm_crtc_funcs.disable_vblank `h](hImplements struct }(hjShhhNhNubh)}(h8:c:type:`drm_crtc_funcs.disable_vblank `h]j )}(hjSh]hdrm_crtc_funcs.disable_vblank}(hjShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jS-c.drm_crtc_vblank_helper_disable_vblank_timerasbj drm_crtc_funcsuh1hhjIhK(hjSubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjShhubah}(h]h ]h"]h$]h&]uh1j hjShhhj,ShKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jTj$ jTj% j& j' uh1j hhhjGhNhNubj) )}(hX2**Parameters** ``struct drm_crtc *crtc`` The CRTC **Description** The helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. See also struct :c:type:`drm_crtc_helper_funcs.disable_vblank `.h](h)}(h**Parameters**h]j3 )}(hj$Th]h Parameters}(hj&ThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"Tubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjTubjw )}(hhh]j| )}(h#``struct drm_crtc *crtc`` The CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjCTh]hstruct drm_crtc *crtc}(hjEThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjATubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhj=Tubj )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj\ThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXThKhjYTubah}(h]h ]h"]h$]h&]uh1j hj=Tubeh}(h]h ]h"]h$]h&]uh1j{ hjXThKhj:Tubah}(h]h ]h"]h$]h&]uh1jv hjTubh)}(h**Description**h]j3 )}(hj~Th]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|Tubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjTubh)}(hThe helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer.h]hThe helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjTubh)}(hWSee also struct :c:type:`drm_crtc_helper_funcs.disable_vblank `.h](hSee also struct }(hjThhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.disable_vblank `h]j )}(hjTh]h$drm_crtc_helper_funcs.disable_vblank}(hjThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjTubh.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjThKhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjGhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j Cdrm_crtc_vblank_helper_get_vblank_timestamp_from_timer (C function)8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerhNtauh1j hjGhhhNhNubj )}(hhh](j )}(hbool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer (struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h]j )}(hbool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer(struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h](j)}(hjIh]hbool}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjThhhjUhKubj )}(h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timerh]j )}(h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timerh]h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timer}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ](j j eh"]h$]h&]j j uh1j hjThhhjUhKubj)}(hQ(struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj1UhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Uubj )}(h h]h }(hj>UhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Uubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjOUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQUmodnameN classnameNj j )}j ]j%)}jjUsb8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbuh1hhj-Uubj )}(h h]h }(hjoUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Uubj9)}(hjOh]h*}(hj}UhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj-Uubj )}(hcrtch]hcrtc}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-Uubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)Uubj)}(hint *max_errorh](j)}(hinth]hint}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj9)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjUubj )}(h max_errorh]h max_error}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)Uubj)}(hktime_t *vblank_timeh](h)}(hhh]j )}(hktime_th]hktime_t}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]jkU8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbuh1hhjUubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj9)}(hjOh]h*}(hjVhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjUubj )}(h vblank_timeh]h vblank_time}(hj!VhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)Uubj)}(hbool in_vblank_irqh](j)}(hjIh]hbool}(hj:VhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Vubj )}(h h]h }(hjGVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Vubj )}(h in_vblank_irqh]h in_vblank_irq}(hjUVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6Vubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)Uubeh}(h]h ]h"]h$]h&]j j uh1jhjThhhjUhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjThhhjUhKubah}(h]jTah ](j j eh"]h$]h&]j j )j huh1j hjUhKhjThhubj )}(hhh]h)}(hPImplements struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `h](hImplements struct }(hjVhhhNhNubh)}(h>:c:type:`drm_crtc_funcs.get_vblank_timestamp `h]j )}(hjVh]h#drm_crtc_funcs.get_vblank_timestamp}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jkU8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbj drm_crtc_funcsuh1hhjIhK(hjVubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhj|Vhhubah}(h]h ]h"]h$]h&]uh1j hjThhhjUhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jVj$ jVj% j& j' uh1j hhhjGhNhNubj) )}(hXY**Parameters** ``struct drm_crtc *crtc`` The CRTC ``int *max_error`` Maximum acceptable error ``ktime_t *vblank_time`` Returns the next vblank timestamp ``bool in_vblank_irq`` True is called from drm_crtc_handle_vblank() **Description** The helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer's expiry time. See also struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `. **Return** True on success, or false otherwise.h](h)}(h**Parameters**h]j3 )}(hjVh]h Parameters}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjVubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` The CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hjVh]hstruct drm_crtc *crtc}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjVubj )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhKhjVubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjVhKhjVubj| )}(h,``int *max_error`` Maximum acceptable error h](j )}(h``int *max_error``h]j )}(hjWh]hint *max_error}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjWubj )}(hhh]h)}(hMaximum acceptable errorh]hMaximum acceptable error}(hj6WhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2WhKhj3Wubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hj2WhKhjVubj| )}(h;``ktime_t *vblank_time`` Returns the next vblank timestamp h](j )}(h``ktime_t *vblank_time``h]j )}(hjVWh]hktime_t *vblank_time}(hjXWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTWubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjPWubj )}(hhh]h)}(h!Returns the next vblank timestamph]h!Returns the next vblank timestamp}(hjoWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkWhKhjlWubah}(h]h ]h"]h$]h&]uh1j hjPWubeh}(h]h ]h"]h$]h&]uh1j{ hjkWhKhjVubj| )}(hD``bool in_vblank_irq`` True is called from drm_crtc_handle_vblank() h](j )}(h``bool in_vblank_irq``h]j )}(hjWh]hbool in_vblank_irq}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjWubj )}(hhh]h)}(h,True is called from drm_crtc_handle_vblank()h]h,True is called from drm_crtc_handle_vblank()}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhKhjWubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjWhKhjVubeh}(h]h ]h"]h$]h&]uh1jv hjVubh)}(h**Description**h]j3 )}(hjWh]h Description}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjVubh)}(hThe helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer's expiry time.h]hThe helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer’s expiry time.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjVubh)}(hOSee also struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `.h](hSee also struct }(hjWhhhNhNubh)}(h>:c:type:`drm_crtc_funcs.get_vblank_timestamp `h]j )}(hjWh]h#drm_crtc_funcs.get_vblank_timestamp}(hjWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjWubh.}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhKhjVubh)}(h **Return**h]j3 )}(hj#Xh]hReturn}(hj%XhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!Xubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjVubh)}(h$True on success, or false otherwise.h]h$True on success, or false otherwise.}(hj9XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:106: ./drivers/gpu/drm/drm_vblank_helper.chKhjVubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjGhhhNhNubeh}(h]jah ]h"]vblank helper referenceah$]h&]uh1hhjBhhhhhKbubeh}(h](jjBeh ]h"]()atomic modeset helper functions referencedrm_atomic_helpereh$]h&]uh1hhhhhhhhK2expect_referenced_by_name}j[XjBsexpect_referenced_by_id}jBjBsubh)}(hhh](h)}(h fbdev Helper Functions Referenceh]h fbdev Helper Functions Reference}(hjeXhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjbXhhhhhKnubh)}(hXhThe fb helper functions are useful to provide an fbdev on top of a drm kernel mode setting driver. They can be used mostly independently from the crtc helper functions used by many drivers to implement the kernel mode setting interfaces. Drivers that use one of the shared memory managers, TTM, SHMEM, DMA, should instead use the corresponding fbdev emulation.h]hXhThe fb helper functions are useful to provide an fbdev on top of a drm kernel mode setting driver. They can be used mostly independently from the crtc helper functions used by many drivers to implement the kernel mode setting interfaces. Drivers that use one of the shared memory managers, TTM, SHMEM, DMA, should instead use the corresponding fbdev emulation.}(hjsXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKPhjbXhhubh)}(hFor suspend/resume consider using drm_mode_config_helper_suspend() and drm_mode_config_helper_resume() which takes care of fbdev as well.h]hFor suspend/resume consider using drm_mode_config_helper_suspend() and drm_mode_config_helper_resume() which takes care of fbdev as well.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKVhjbXhhubh)}(hxAll other functions exported by the fb helper library can be used to implement the fbdev driver interface by the driver.h]hxAll other functions exported by the fb helper library can be used to implement the fbdev driver interface by the driver.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKYhjbXhhubh)}(hX%It is possible, though perhaps somewhat tricky, to implement race-free hotplug detection using the fbdev helpers. The drm_fb_helper_prepare() helper must be called first to initialize the minimum required to make hotplug detection work. Drivers also need to make sure to properly set up the :c:type:`drm_mode_config.funcs ` member. After calling drm_kms_helper_poll_init() it is safe to enable interrupts and start processing hotplug events. At the same time, drivers should initialize all modeset objects such as CRTCs, encoders and connectors. To finish up the fbdev helper initialization, the drm_fb_helper_init() function is called. To probe for all attached displays and set up an initial configuration using the detected hardware, drivers should call drm_fb_helper_initial_config().h](hX#It is possible, though perhaps somewhat tricky, to implement race-free hotplug detection using the fbdev helpers. The drm_fb_helper_prepare() helper must be called first to initialize the minimum required to make hotplug detection work. Drivers also need to make sure to properly set up the }(hjXhhhNhNubh)}(h1:c:type:`drm_mode_config.funcs `h]j )}(hjXh]hdrm_mode_config.funcs}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_configuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chK\hjXubhX member. After calling drm_kms_helper_poll_init() it is safe to enable interrupts and start processing hotplug events. At the same time, drivers should initialize all modeset objects such as CRTCs, encoders and connectors. To finish up the fbdev helper initialization, the drm_fb_helper_init() function is called. To probe for all attached displays and set up an initial configuration using the detected hardware, drivers should call drm_fb_helper_initial_config().}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhK\hjbXhhubh)}(hX4If :c:type:`drm_framebuffer_funcs.dirty ` is set, the drm_fb_helper_{cfb,sys}_{write,fillrect,copyarea,imageblit} functions will accumulate changes and schedule :c:type:`drm_fb_helper.dirty_work ` to run right away. This worker then calls the dirty() function ensuring that it will always run in process context since the fb_*() function could be running in atomic context. If drm_fb_helper_deferred_io() is used as the deferred_io callback it will also schedule dirty_work with the damage collected from the mmap page writes.h](hIf }(hjXhhhNhNubh)}(h=:c:type:`drm_framebuffer_funcs.dirty `h]j )}(hjXh]hdrm_framebuffer_funcs.dirty}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:112: ./drivers/gpu/drm/drm_fb_helper.chKhhjXubhx is set, the drm_fb_helper_{cfb,sys}_{write,fillrect,copyarea,imageblit} functions will accumulate changes and schedule }(hjXhhhNhNubh)}(h2:c:type:`drm_fb_helper.dirty_work `h]j )}(hjYh]hdrm_fb_helper.dirty_work}(hjYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_fb_helperuh1hhjXhKhhjXubhXJ to run right away. This worker then calls the dirty() function ensuring that it will always run in process context since the fb_*() function could be running in atomic context. If drm_fb_helper_deferred_io() is used as the deferred_io callback it will also schedule dirty_work with the damage collected from the mmap page writes.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhKhhjbXhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_fb_helper_surface_size (C struct)c.drm_fb_helper_surface_sizehNtauh1j hjbXhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhNubj )}(hhh](j )}(hdrm_fb_helper_surface_sizeh]j )}(h!struct drm_fb_helper_surface_sizeh](j )}(hj h]hstruct}(hjAYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=Yhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKubj )}(h h]h }(hjOYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=YhhhjNYhKubj )}(hdrm_fb_helper_surface_sizeh]j )}(hj;Yh]hdrm_fb_helper_surface_size}(hjaYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]Yubah}(h]h ](j j eh"]h$]h&]j j uh1j hj=YhhhjNYhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj9YhhhjNYhKubah}(h]j3Yah ](j j eh"]h$]h&]j j )j huh1j hjNYhKhj6Yhhubj )}(hhh]h)}(h-describes fbdev size and scanout surface sizeh]h-describes fbdev size and scanout surface size}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK)hjYhhubah}(h]h ]h"]h$]h&]uh1j hj6YhhhjNYhKubeh}(h]h ](j structeh"]h$]h&]j" j j# jYj$ jYj% j& j' uh1j hhhjbXhj5YhNubj) )}(hX**Definition**:: struct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; }; **Members** ``fb_width`` fbdev width ``fb_height`` fbdev height ``surface_width`` scanout buffer width ``surface_height`` scanout buffer height ``surface_bpp`` scanout buffer bpp ``surface_depth`` scanout buffer depthh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubh:}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK-hjYubjN )}(hstruct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; };h]hstruct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; };}hjYsbah}(h]h ]h"]h$]h&]j j uh1jM h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK/hjYubh)}(h **Members**h]j3 )}(hjYh]hMembers}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK8hjYubjw )}(hhh](j| )}(h``fb_width`` fbdev width h](j )}(h ``fb_width``h]j )}(hjYh]hfb_width}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK+hjYubj )}(hhh]h)}(h fbdev widthh]h fbdev width}(hj ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhK+hjZubah}(h]h ]h"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]uh1j{ hjZhK+hjYubj| )}(h``fb_height`` fbdev height h](j )}(h ``fb_height``h]j )}(hj)Zh]h fb_height}(hj+ZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'Zubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK,hj#Zubj )}(hhh]h)}(h fbdev heighth]h fbdev height}(hjBZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>ZhK,hj?Zubah}(h]h ]h"]h$]h&]uh1j hj#Zubeh}(h]h ]h"]h$]h&]uh1j{ hj>ZhK,hjYubj| )}(h'``surface_width`` scanout buffer width h](j )}(h``surface_width``h]j )}(hjbZh]h surface_width}(hjdZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`Zubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK-hj\Zubj )}(hhh]h)}(hscanout buffer widthh]hscanout buffer width}(hj{ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwZhK-hjxZubah}(h]h ]h"]h$]h&]uh1j hj\Zubeh}(h]h ]h"]h$]h&]uh1j{ hjwZhK-hjYubj| )}(h)``surface_height`` scanout buffer height h](j )}(h``surface_height``h]j )}(hjZh]hsurface_height}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK.hjZubj )}(hhh]h)}(hscanout buffer heighth]hscanout buffer height}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhK.hjZubah}(h]h ]h"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjZhK.hjYubj| )}(h#``surface_bpp`` scanout buffer bpp h](j )}(h``surface_bpp``h]j )}(hjZh]h surface_bpp}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK/hjZubj )}(hhh]h)}(hscanout buffer bpph]hscanout buffer bpp}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhK/hjZubah}(h]h ]h"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjZhK/hjYubj| )}(h&``surface_depth`` scanout buffer depthh](j )}(h``surface_depth``h]j )}(hj [h]h surface_depth}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj [ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK/hj[ubj )}(hhh]h)}(hscanout buffer depthh]hscanout buffer depth}(hj&[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK0hj#[ubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hj"[hK/hjYubeh}(h]h ]h"]h$]h&]uh1jv hjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhj5YhNubh)}(h**Description**h]j3 )}(hjP[h]h Description}(hjR[hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjN[ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK3hjbXhhubh)}(hXNote that the scanout surface width/height may be larger than the fbdev width/height. In case of multiple displays, the scanout surface is sized according to the largest width/height (so it is large enough for all CRTCs to scanout). But the fbdev width/height is sized to the minimum width/ height of all the displays. This ensures that fbcon fits on the smallest of the attached displays. fb_width/fb_height is used by drm_fb_helper_fill_info() to fill out the :c:type:`fb_info.var ` structure.h](hXNote that the scanout surface width/height may be larger than the fbdev width/height. In case of multiple displays, the scanout surface is sized according to the largest width/height (so it is large enough for all CRTCs to scanout). But the fbdev width/height is sized to the minimum width/ height of all the displays. This ensures that fbcon fits on the smallest of the attached displays. fb_width/fb_height is used by drm_fb_helper_fill_info() to fill out the }(hjf[hhhNhNubh)}(h:c:type:`fb_info.var `h]j )}(hjp[h]h fb_info.var}(hjr[hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjn[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j fb_infouh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK0hjf[ubh structure.}(hjf[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj[hK0hjbXhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_fb_helper_funcs (C struct)c.drm_fb_helper_funcshNtauh1j hjbXhhhj5YhNubj )}(hhh](j )}(hdrm_fb_helper_funcsh]j )}(hstruct drm_fb_helper_funcsh](j )}(hj h]hstruct}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK;ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhhj[hK;ubj )}(hdrm_fb_helper_funcsh]j )}(hj[h]hdrm_fb_helper_funcs}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhj[hK;ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[hhhj[hK;ubah}(h]j[ah ](j j eh"]h$]h&]j j )j huh1j hj[hK;hj[hhubj )}(hhh]h)}(h0driver callbacks for the fbdev emulation libraryh]h0driver callbacks for the fbdev emulation library}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKChj[hhubah}(h]h ]h"]h$]h&]uh1j hj[hhhj[hK;ubeh}(h]h ](j structeh"]h$]h&]j" j j# j \j$ j \j% j& j' uh1j hhhjbXhj5YhNubj) )}(hX**Definition**:: struct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); }; **Members** ``fb_dirty`` Driver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written. This callback is optional. Returns: 0 on success, or an error code otherwise. ``fb_restore`` Driver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback. ``fb_set_suspend`` Driver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\ubh:}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKGhj\ubjN )}(hstruct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); };h]hstruct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); };}hj0\sbah}(h]h ]h"]h$]h&]j j uh1jM h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKIhj\ubh)}(h **Members**h]j3 )}(hjA\h]hMembers}(hjC\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?\ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKOhj\ubjw )}(hhh](j| )}(h``fb_dirty`` Driver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written. This callback is optional. Returns: 0 on success, or an error code otherwise. h](j )}(h ``fb_dirty``h]j )}(hj`\h]hfb_dirty}(hjb\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^\ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKQhjZ\ubj )}(hhh](h)}(hDriver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written.h]hDriver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written.}(hjy\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKJhjv\ubh)}(hThis callback is optional.h]hThis callback is optional.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKNhjv\ubh)}(h2Returns: 0 on success, or an error code otherwise.h]h2Returns: 0 on success, or an error code otherwise.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKPhjv\ubeh}(h]h ]h"]h$]h&]uh1j hjZ\ubeh}(h]h ]h"]h$]h&]uh1j{ hju\hKQhjW\ubj| )}(h``fb_restore`` Driver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback. h](j )}(h``fb_restore``h]j )}(hj\h]h fb_restore}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK^hj\ubj )}(hhh](h)}(hDriver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode.h]hDriver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKXhj\ubh)}(h&Only for i915. Do not use in new code.h]h&Only for i915. Do not use in new code.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK\hj\ubh)}(h,TODO: Fix i915 to not require this callback.h]h,TODO: Fix i915 to not require this callback.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hK^hj\ubeh}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hj\hK^hjW\ubj| )}(hX]``fb_set_suspend`` Driver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback.h](j )}(h``fb_set_suspend``h]j )}(hj]h]hfb_set_suspend}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ]ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKkhj ]ubj )}(hhh](h)}(hDriver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly.h]hDriver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly.}(hj(]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKehj%]ubh)}(h&Only for i915. Do not use in new code.h]h&Only for i915. Do not use in new code.}(hj7]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKjhj%]ubh)}(h,TODO: Fix i915 to not require this callback.h]h,TODO: Fix i915 to not require this callback.}(hjF]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKlhj%]ubeh}(h]h ]h"]h$]h&]uh1j hj ]ubeh}(h]h ]h"]h$]h&]uh1j{ hj$]hKkhjW\ubeh}(h]h ]h"]h$]h&]uh1jv hj\ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhj5YhNubh)}(h**Description**h]j3 )}(hjp]h]h Description}(hjr]hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjn]ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKohjbXhhubh)}(h^h]hMembers}(hj@^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<^ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj ^ubjw )}(hhh](j| )}(h;``client`` DRM client used by the generic fbdev emulation. h](j )}(h ``client``h]j )}(hj]^h]hclient}(hj_^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[^ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjW^ubj )}(hhh]h)}(h/DRM client used by the generic fbdev emulation.h]h/DRM client used by the generic fbdev emulation.}(hjv^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr^hKhjs^ubah}(h]h ]h"]h$]h&]uh1j hjW^ubeh}(h]h ]h"]h$]h&]uh1j{ hjr^hKhjT^ubj| )}(h<``buffer`` Framebuffer used by the generic fbdev emulation. h](j )}(h ``buffer``h]j )}(hj^h]hbuffer}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj^ubj )}(hhh]h)}(h0Framebuffer used by the generic fbdev emulation.h]h0Framebuffer used by the generic fbdev emulation.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hKhj^ubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj^hKhjT^ubj| )}(h"``fb`` Scanout framebuffer object h](j )}(h``fb``h]j )}(hj^h]hfb}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKuhj^ubj )}(hhh]h)}(hScanout framebuffer objecth]hScanout framebuffer object}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hKuhj^ubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj^hKuhjT^ubj| )}(h``dev`` DRM device h](j )}(h``dev``h]j )}(hj_h]hdev}(hj _hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKvhj_ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj!_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hKvhj_ubah}(h]h ]h"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]uh1j{ hj_hKvhjT^ubj| )}(h)``funcs`` driver callbacks for fb helper h](j )}(h ``funcs``h]j )}(hjA_h]hfuncs}(hjC_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?_ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKwhj;_ubj )}(hhh]h)}(hdriver callbacks for fb helperh]hdriver callbacks for fb helper}(hjZ_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjV_hKwhjW_ubah}(h]h ]h"]h$]h&]uh1j hj;_ubeh}(h]h ]h"]h$]h&]uh1j{ hjV_hKwhjT^ubj| )}(h+``info`` emulated fbdev device info struct h](j )}(h``info``h]j )}(hjz_h]hinfo}(hj|_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjx_ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKxhjt_ubj )}(hhh]h)}(h!emulated fbdev device info structh]h!emulated fbdev device info struct}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hKxhj_ubah}(h]h ]h"]h$]h&]uh1j hjt_ubeh}(h]h ]h"]h$]h&]uh1j{ hj_hKxhjT^ubj| )}(h-``pseudo_palette`` fake palette of 16 colors h](j )}(h``pseudo_palette``h]j )}(hj_h]hpseudo_palette}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKyhj_ubj )}(hhh]h)}(hfake palette of 16 colorsh]hfake palette of 16 colors}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hKyhj_ubah}(h]h ]h"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]uh1j{ hj_hKyhjT^ubj| )}(h_``damage_clip`` clip rectangle used with deferred_io to accumulate damage to the screen buffer h](j )}(h``damage_clip``h]j )}(hj_h]h damage_clip}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK{hj_ubj )}(hhh]h)}(hNclip rectangle used with deferred_io to accumulate damage to the screen bufferh]hNclip rectangle used with deferred_io to accumulate damage to the screen buffer}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKzhj`ubah}(h]h ]h"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hK{hjT^ubj| )}(h4``damage_lock`` spinlock protecting **damage_clip** h](j )}(h``damage_lock``h]j )}(hj&`h]h damage_lock}(hj(`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$`ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK|hj `ubj )}(hhh]h)}(h#spinlock protecting **damage_clip**h](hspinlock protecting }(hj?`hhhNhNubj3 )}(h**damage_clip**h]h damage_clip}(hjG`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?`ubeh}(h]h ]h"]h$]h&]uh1hhj;`hK|hj<`ubah}(h]h ]h"]h$]h&]uh1j hj `ubeh}(h]h ]h"]h$]h&]uh1j{ hj;`hK|hjT^ubj| )}(h5``damage_work`` worker used to flush the framebuffer h](j )}(h``damage_work``h]j )}(hjm`h]h damage_work}(hjo`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjk`ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK}hjg`ubj )}(hhh]h)}(h$worker used to flush the framebufferh]h$worker used to flush the framebuffer}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hK}hj`ubah}(h]h ]h"]h$]h&]uh1j hjg`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hK}hjT^ubj| )}(hO``resume_work`` worker used during resume if the console lock is already taken h](j )}(h``resume_work``h]j )}(hj`h]h resume_work}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK~hj`ubj )}(hhh]h)}(h>worker used during resume if the console lock is already takenh]h>worker used during resume if the console lock is already taken}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hK~hj`ubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hK~hjT^ubj| )}(hX6``lock`` Top-level FBDEV helper lock. This protects all internal data structures and lists, such as **connector_info** and **crtc_info**. FIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible. h](j )}(h``lock``h]j )}(hj`h]hlock}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj`ubj )}(hhh](h)}(hTop-level FBDEV helper lock. This protects all internal data structures and lists, such as **connector_info** and **crtc_info**.h](h[Top-level FBDEV helper lock. This protects all internal data structures and lists, such as }(hj`hhhNhNubj3 )}(h**connector_info**h]hconnector_info}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubh and }(hj`hhhNhNubj3 )}(h **crtc_info**h]h crtc_info}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubh.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj`ubh)}(hFIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible.h]hFIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible.}(hj+ahhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj`ubeh}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hKhjT^ubj| )}(h``delayed_hotplug`` A hotplug was received while fbdev wasn't in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again. h](j )}(h``delayed_hotplug``h]j )}(hjLah]hdelayed_hotplug}(hjNahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJaubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjFaubj )}(hhh]h)}(hA hotplug was received while fbdev wasn't in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again.h]hA hotplug was received while fbdev wasn’t in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again.}(hjeahhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjbaubah}(h]h ]h"]h$]h&]uh1j hjFaubeh}(h]h ]h"]h$]h&]uh1j{ hjaahKhjT^ubj| )}(hX(``deferred_setup`` If no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually. Protected by **lock**. h](j )}(h``deferred_setup``h]j )}(hjah]hdeferred_setup}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjaubj )}(hhh](h)}(hIf no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually.h]hIf no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjaubh)}(hProtected by **lock**.h](h Protected by }(hjahhhNhNubj3 )}(h**lock**h]hlock}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubh.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahKhjaubeh}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hjahKhjT^ubj| )}(h``preferred_bpp`` Temporary storage for the driver's preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on. See also: **deferred_setup** h](j )}(h``preferred_bpp``h]j )}(hjah]h preferred_bpp}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjaubj )}(hhh](h)}(hTemporary storage for the driver's preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on.h]hTemporary storage for the driver’s preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjaubh)}(hSee also: **deferred_setup**h](h See also: }(hjbhhhNhNubj3 )}(h**deferred_setup**h]hdeferred_setup}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbubeh}(h]h ]h"]h$]h&]uh1hhjahKhjaubeh}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hjahKhjT^ubj| )}(h``fbdefio`` Temporary storage for the driver's FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.h](j )}(h ``fbdefio``h]j )}(hj6bh]hfbdefio}(hj8bhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4bubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj0bubj )}(hhh]h)}(hTemporary storage for the driver's FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.h]hTemporary storage for the driver’s FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.}(hjObhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjLbubah}(h]h ]h"]h$]h&]uh1j hj0bubeh}(h]h ]h"]h$]h&]uh1j{ hjKbhKhjT^ubeh}(h]h ]h"]h$]h&]uh1jv hj ^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhj5YhNubh)}(h**Description**h]j3 )}(hjybh]h Description}(hj{bhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwbubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjbXhhubh)}(hXThis is the main structure used by the fbdev helpers. Drivers supporting fbdev emulation should embedded this into their overall driver structure. Drivers must also fill out a :c:type:`struct drm_fb_helper_funcs ` with a few operations.h](hThis is the main structure used by the fbdev helpers. Drivers supporting fbdev emulation should embedded this into their overall driver structure. Drivers must also fill out a }(hjbhhhNhNubh)}(h::c:type:`struct drm_fb_helper_funcs `h]j )}(hjbh]hstruct drm_fb_helper_funcs}(hjbhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_fb_helper_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhK~hjbubh with a few operations.}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjbhK~hjbXhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #DRM_FB_HELPER_DEFAULT_OPS (C macro)c.DRM_FB_HELPER_DEFAULT_OPShNtauh1j hjbXhhhj5YhNubj )}(hhh](j )}(hDRM_FB_HELPER_DEFAULT_OPSh]j )}(hDRM_FB_HELPER_DEFAULT_OPSh]j )}(hDRM_FB_HELPER_DEFAULT_OPSh]j )}(hjbh]hDRM_FB_HELPER_DEFAULT_OPS}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ](j j eh"]h$]h&]j j uh1j hjbhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjbhhhjbhKubah}(h]jbah ](j j eh"]h$]h&]j j )j huh1j hjbhKhjbhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjbhhhjbhKubeh}(h]h ](j macroeh"]h$]h&]j" j j# j cj$ j cj% j& j' uh1j hhhjbXhj5YhNubh)}(h``DRM_FB_HELPER_DEFAULT_OPS``h]j )}(hjch]hDRM_FB_HELPER_DEFAULT_OPS}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhjbXhhubj^E)}(h helper define for drm drivers **Description** Helper define to register default implementations of drm_fb_helper functions. To be used in struct fb_ops of drm drivers. h](j^E)}(hhelper define for drm drivers h]h)}(hhelper define for drm driversh]hhelper define for drm drivers}(hj.chhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:115: ./include/drm/drm_fb_helper.hhKhj*cubah}(h]h ]h"]h$]h&]uh1j]Ehj` callback. It ensures that the user isn't greeted with a black screen when the userspace compositor releases the display device. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hjdh]h Parameters}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjdubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjdubjw )}(hhh](j| )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hjdh]hstruct drm_fb_helper *fb_helper}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjdubj )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhKhjdubah}(h]h ]h"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]uh1j{ hjdhKhjdubj| )}(h)``bool force`` ignore present DRM master h](j )}(h``bool force``h]j )}(hjdh]h bool force}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjdubj )}(hhh]h)}(hignore present DRM masterh]hignore present DRM master}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ehKhj eubah}(h]h ]h"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]uh1j{ hj ehKhjdubeh}(h]h ]h"]h$]h&]uh1jv hjdubh)}(h**Description**h]j3 )}(hj2eh]h Description}(hj4ehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0eubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjdubh)}(hThis helper should be called from fbdev emulation's :c:type:`drm_client_funcs.restore ` callback. It ensures that the user isn't greeted with a black screen when the userspace compositor releases the display device.h](h6This helper should be called from fbdev emulation’s }(hjHehhhNhNubh)}(h5:c:type:`drm_client_funcs.restore `h]j )}(hjReh]hdrm_client_funcs.restore}(hjTehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjPeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_client_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjHeubh callback. It ensures that the user isn’t greeted with a black screen when the userspace compositor releases the display device.}(hjHehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjoehKhjdubh)}(h **Return**h]j3 )}(hj|eh]hReturn}(hj~ehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzeubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjdubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_fb_helper_blank (C function)c.drm_fb_helper_blankhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(h9int drm_fb_helper_blank (int blank, struct fb_info *info)h]j )}(h8int drm_fb_helper_blank(int blank, struct fb_info *info)h](j)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjehKubj )}(hdrm_fb_helper_blankh]j )}(hdrm_fb_helper_blankh]hdrm_fb_helper_blank}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjehKubj)}(h!(int blank, struct fb_info *info)h](j)}(h int blankh](j)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj )}(h h]h }(hj fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(hblankh]hblank}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubj)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hj3fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/fubj )}(h h]h }(hj@fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/fubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjQfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjSfmodnameN classnameNj j )}j ]j%)}jjesbc.drm_fb_helper_blankasbuh1hhj/fubj )}(h h]h }(hjqfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/fubj9)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj/fubj )}(hinfoh]hinfo}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/fubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubeh}(h]h ]h"]h$]h&]j j uh1jhjehhhjehKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjehhhjehKubah}(h]jeah ](j j eh"]h$]h&]j j )j huh1j hjehKhjehhubj )}(hhh]h)}(h5implementation for :c:type:`fb_ops.fb_blank `h](himplementation for }(hjfhhhNhNubh)}(h":c:type:`fb_ops.fb_blank `h]j )}(hjfh]hfb_ops.fb_blank}(hjfhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jmfc.drm_fb_helper_blankasbj fb_opsuh1hhjchKhjfubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjfhhubah}(h]h ]h"]h$]h&]uh1j hjehhhjehKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jfj$ jfj% j& j' uh1j hhhjbXhNhNubj) )}(hq**Parameters** ``int blank`` desired blanking state ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j3 )}(hjfh]h Parameters}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjfubjw )}(hhh](j| )}(h%``int blank`` desired blanking state h](j )}(h ``int blank``h]j )}(hjgh]h int blank}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjgubj )}(hhh]h)}(hdesired blanking stateh]hdesired blanking state}(hj4ghhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0ghKhj1gubah}(h]h ]h"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]uh1j{ hj0ghKhjgubj| )}(h7``struct fb_info *info`` fbdev registered by the helperh](j )}(h``struct fb_info *info``h]j )}(hjTgh]hstruct fb_info *info}(hjVghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRgubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjNgubj )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjmghhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chKhjjgubah}(h]h ]h"]h$]h&]uh1j hjNgubeh}(h]h ]h"]h$]h&]uh1j{ hjighKhjgubeh}(h]h ]h"]h$]h&]uh1jv hjfubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_fb_helper_prepare (C function)c.drm_fb_helper_preparehNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hvoid drm_fb_helper_prepare (struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h]j )}(hvoid drm_fb_helper_prepare(struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjghhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMqubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjghhhjghMqubj )}(hdrm_fb_helper_prepareh]j )}(hdrm_fb_helper_prepareh]hdrm_fb_helper_prepare}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubah}(h]h ](j j eh"]h$]h&]j j uh1j hjghhhjghMqubj)}(h{(struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj hhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj hmodnameN classnameNj j )}j ]j%)}jjgsbc.drm_fb_helper_prepareasbuh1hhjgubj )}(h h]h }(hj)hhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj9)}(hjOh]h*}(hj7hhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjgubj )}(hdevh]hdev}(hjDhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(hstruct drm_fb_helper *helperh](j )}(hj h]hstruct}(hj]hhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhubj )}(h h]h }(hjjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hj{hhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}hmodnameN classnameNj j )}j ]j%hc.drm_fb_helper_prepareasbuh1hhjYhubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhubj9)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjYhubj )}(hhelperh]hhelper}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(hunsigned int preferred_bpph](j)}(hunsignedh]hunsigned}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj)}(hinth]hint}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(h preferred_bpph]h preferred_bpp}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(h'const struct drm_fb_helper_funcs *funcsh](j )}(hjch]hconst}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hj+ihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(hj h]hstruct}(hj9ihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjFihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(hdrm_fb_helper_funcsh]hdrm_fb_helper_funcs}(hjWihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYimodnameN classnameNj j )}j ]j%hc.drm_fb_helper_prepareasbuh1hhjiubj )}(h h]h }(hjuihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj9)}(hjOh]h*}(hjihhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjiubj )}(hfuncsh]hfuncs}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubeh}(h]h ]h"]h$]h&]j j uh1jhjghhhjghMqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjghhhjghMqubah}(h]jgah ](j j eh"]h$]h&]j j )j huh1j hjghMqhjghhubj )}(hhh]h)}(hsetup a drm_fb_helper structureh]hsetup a drm_fb_helper structure}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMqhjihhubah}(h]h ]h"]h$]h&]uh1j hjghhhjghMqubeh}(h]h ](j functioneh"]h$]h&]j" j j# jij$ jij% j& j' uh1j hhhjbXhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_fb_helper *helper`` driver-allocated fbdev helper structure to set up ``unsigned int preferred_bpp`` Preferred bits per pixel for the device. ``const struct drm_fb_helper_funcs *funcs`` pointer to structure of functions associate with this helper **Description** Sets up the bare minimum to make the framebuffer helper usable. This is useful to implement race-free initialization of the polling helpers.h](h)}(h**Parameters**h]j3 )}(hjih]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMuhjiubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjih]hstruct drm_device *dev}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMrhjiubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMrhjjubah}(h]h ]h"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMrhjiubj| )}(hS``struct drm_fb_helper *helper`` driver-allocated fbdev helper structure to set up h](j )}(h ``struct drm_fb_helper *helper``h]j )}(hj4jh]hstruct drm_fb_helper *helper}(hj6jhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2jubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMshj.jubj )}(hhh]h)}(h1driver-allocated fbdev helper structure to set uph]h1driver-allocated fbdev helper structure to set up}(hjMjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIjhMshjJjubah}(h]h ]h"]h$]h&]uh1j hj.jubeh}(h]h ]h"]h$]h&]uh1j{ hjIjhMshjiubj| )}(hH``unsigned int preferred_bpp`` Preferred bits per pixel for the device. h](j )}(h``unsigned int preferred_bpp``h]j )}(hjmjh]hunsigned int preferred_bpp}(hjojhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMthjgjubj )}(hhh]h)}(h(Preferred bits per pixel for the device.h]h(Preferred bits per pixel for the device.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMthjjubah}(h]h ]h"]h$]h&]uh1j hjgjubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMthjiubj| )}(hi``const struct drm_fb_helper_funcs *funcs`` pointer to structure of functions associate with this helper h](j )}(h+``const struct drm_fb_helper_funcs *funcs``h]j )}(hjjh]h'const struct drm_fb_helper_funcs *funcs}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMuhjjubj )}(hhh]h)}(hvoid drm_fb_helper_unprepare (struct drm_fb_helper *fb_helper)h]j )}(h=void drm_fb_helper_unprepare(struct drm_fb_helper *fb_helper)h](j)}(hvoidh]hvoid}(hj&khhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"khhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hj5khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"khhhj4khMubj )}(hdrm_fb_helper_unprepareh]j )}(hdrm_fb_helper_unprepareh]hdrm_fb_helper_unprepare}(hjGkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCkubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"khhhj4khMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjckhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_kubj )}(h h]h }(hjpkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_kubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~kubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]j%)}jjIksbc.drm_fb_helper_unprepareasbuh1hhj_kubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_kubj9)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_kubj )}(h fb_helperh]h fb_helper}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_kubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[kubah}(h]h ]h"]h$]h&]j j uh1jhj"khhhj4khMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjkhhhj4khMubah}(h]jkah ](j j eh"]h$]h&]j j )j huh1j hj4khMhjkhhubj )}(hhh]h)}(h"clean up a drm_fb_helper structureh]h"clean up a drm_fb_helper structure}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjkhhubah}(h]h ]h"]h$]h&]uh1j hjkhhhj4khMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jkj$ jkj% j& j' uh1j hhhjbXhNhNubj) )}(h**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to set up **Description** Cleans up the framebuffer helper. Inverse of drm_fb_helper_prepare().h](h)}(h**Parameters**h]j3 )}(hjlh]h Parameters}(hj lhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjlubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjlubjw )}(hhh]j| )}(hV``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to set up h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hj'lh]hstruct drm_fb_helper *fb_helper}(hj)lhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%lubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj!lubj )}(hhh]h)}(h1driver-allocated fbdev helper structure to set uph]h1driver-allocated fbdev helper structure to set up}(hj@lhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`h](h initialize a }(hjmhhhNhNubh)}(h.:c:type:`struct drm_fb_helper `h]j )}(hjmh]hstruct drm_fb_helper}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jmc.drm_fb_helper_initasbj drm_fb_helperuh1hhjchKhjmubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjmhhubah}(h]h ]h"]h$]h&]uh1j hjlhhhjlhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jnj$ jnj% j& j' uh1j hhhjbXhNhNubj) )}(hXO**Parameters** ``struct drm_device *dev`` drm device ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to initialize **Description** This allocates the structures for the fbdev helper with the given limits. Note that this won't yet touch the hardware (through the driver interfaces) nor register the fbdev. This is only done in drm_fb_helper_initial_config() to allow driver writes more control over the exact init sequence. Drivers must call drm_fb_helper_prepare() before calling this function. **Return** Zero if everything went ok, nonzero otherwise.h](h)}(h**Parameters**h]j3 )}(hjnh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubjw )}(hhh](j| )}(h&``struct drm_device *dev`` drm device h](j )}(h``struct drm_device *dev``h]j )}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:nubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj6nubj )}(hhh]h)}(h drm deviceh]h drm device}(hjUnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQnhMhjRnubah}(h]h ]h"]h$]h&]uh1j hj6nubeh}(h]h ]h"]h$]h&]uh1j{ hjQnhMhj3nubj| )}(hZ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to initialize h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hjunh]hstruct drm_fb_helper *fb_helper}(hjwnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsnubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjonubj )}(hhh]h)}(h5driver-allocated fbdev helper structure to initializeh]h5driver-allocated fbdev helper structure to initialize}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjnubah}(h]h ]h"]h$]h&]uh1j hjonubeh}(h]h ]h"]h$]h&]uh1j{ hjnhMhj3nubeh}(h]h ]h"]h$]h&]uh1jv hjnubh)}(h**Description**h]j3 )}(hjnh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubh)}(hX#This allocates the structures for the fbdev helper with the given limits. Note that this won't yet touch the hardware (through the driver interfaces) nor register the fbdev. This is only done in drm_fb_helper_initial_config() to allow driver writes more control over the exact init sequence.h]hX%This allocates the structures for the fbdev helper with the given limits. Note that this won’t yet touch the hardware (through the driver interfaces) nor register the fbdev. This is only done in drm_fb_helper_initial_config() to allow driver writes more control over the exact init sequence.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubh)}(hGDrivers must call drm_fb_helper_prepare() before calling this function.h]hGDrivers must call drm_fb_helper_prepare() before calling this function.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubh)}(h **Return**h]j3 )}(hjnh]hReturn}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubh)}(h.Zero if everything went ok, nonzero otherwise.h]h.Zero if everything went ok, nonzero otherwise.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_fb_helper_unregister_info (C function)c.drm_fb_helper_unregister_infohNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hDvoid drm_fb_helper_unregister_info (struct drm_fb_helper *fb_helper)h]j )}(hCvoid drm_fb_helper_unregister_info(struct drm_fb_helper *fb_helper)h](j)}(hvoidh]hvoid}(hj+ohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ohhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hj:ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ohhhj9ohMubj )}(hdrm_fb_helper_unregister_infoh]j )}(hdrm_fb_helper_unregister_infoh]hdrm_fb_helper_unregister_info}(hjLohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHoubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'ohhhj9ohMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjhohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdoubj )}(h h]h }(hjuohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdoubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjomodnameN classnameNj j )}j ]j%)}jjNosbc.drm_fb_helper_unregister_infoasbuh1hhjdoubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdoubj9)}(hjOh]h*}(hjohhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjdoubj )}(h fb_helperh]h fb_helper}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`oubah}(h]h ]h"]h$]h&]j j uh1jhj'ohhhj9ohMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#ohhhj9ohMubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j hj9ohMhj ohhubj )}(hhh]h)}(h%unregister fb_info framebuffer deviceh]h%unregister fb_info framebuffer device}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjohhubah}(h]h ]h"]h$]h&]uh1j hj ohhhj9ohMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jpj$ jpj% j& j' uh1j hhhjbXhNhNubj) )}(hX1**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, must not be NULL **Description** A wrapper around unregister_framebuffer, to release the fb_info framebuffer device. This must be called before releasing all resources for **fb_helper** by calling drm_fb_helper_fini().h](h)}(h**Parameters**h]j3 )}(hj ph]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj pubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjpubjw )}(hhh]j| )}(hT``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, must not be NULL h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hj,ph]hstruct drm_fb_helper *fb_helper}(hj.phhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*pubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj&pubj )}(hhh]h)}(h/driver-allocated fbdev helper, must not be NULLh]h/driver-allocated fbdev helper, must not be NULL}(hjEphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAphMhjBpubah}(h]h ]h"]h$]h&]uh1j hj&pubeh}(h]h ]h"]h$]h&]uh1j{ hjAphMhj#pubah}(h]h ]h"]h$]h&]uh1jv hjpubh)}(h**Description**h]j3 )}(hjgph]h Description}(hjiphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjepubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjpubh)}(hA wrapper around unregister_framebuffer, to release the fb_info framebuffer device. This must be called before releasing all resources for **fb_helper** by calling drm_fb_helper_fini().h](hA wrapper around unregister_framebuffer, to release the fb_info framebuffer device. This must be called before releasing all resources for }(hj}phhhNhNubj3 )}(h **fb_helper**h]h fb_helper}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}pubh! by calling drm_fb_helper_fini().}(hj}phhhNhNubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_fb_helper_fini (C function)c.drm_fb_helper_finihNtauh1j hjbXhhhNhNubj )}(hhh](j )}(h9void drm_fb_helper_fini (struct drm_fb_helper *fb_helper)h]j )}(h8void drm_fb_helper_fini(struct drm_fb_helper *fb_helper)h](j)}(hvoidh]hvoid}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjphhhjphMubj )}(hdrm_fb_helper_finih]j )}(hdrm_fb_helper_finih]hdrm_fb_helper_fini}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ](j j eh"]h$]h&]j j uh1j hjphhhjphMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]j%)}jjpsbc.drm_fb_helper_finiasbuh1hhjpubj )}(h h]h }(hj9qhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj9)}(hjOh]h*}(hjGqhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjpubj )}(h fb_helperh]h fb_helper}(hjTqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjpubah}(h]h ]h"]h$]h&]j j uh1jhjphhhjphMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjphhhjphMubah}(h]jpah ](j j eh"]h$]h&]j j )j huh1j hjphMhjphhubj )}(hhh]h)}(h:finialize a :c:type:`struct drm_fb_helper `h](h finialize a }(hj~qhhhNhNubh)}(h.:c:type:`struct drm_fb_helper `h]j )}(hjqh]hstruct drm_fb_helper}(hjqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j5qc.drm_fb_helper_finiasbj drm_fb_helperuh1hhjchKhj~qubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj{qhhubah}(h]h ]h"]h$]h&]uh1j hjphhhjphMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jqj$ jqj% j& j' uh1j hhhjbXhNhNubj) )}(h**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL **Description** This cleans up all remaining resources associated with **fb_helper**.h](h)}(h**Parameters**h]j3 )}(hjqh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjqubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjqubjw )}(hhh]j| )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hjqh]hstruct drm_fb_helper *fb_helper}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjqubj )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjqubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMhjqubah}(h]h ]h"]h$]h&]uh1jv hjqubh)}(h**Description**h]j3 )}(hjrh]h Description}(hj rhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjqubh)}(hEThis cleans up all remaining resources associated with **fb_helper**.h](h7This cleans up all remaining resources associated with }(hj4rhhhNhNubj3 )}(h **fb_helper**h]h fb_helper}(hj` callback function for flushing the fbdev mmap writes.h](h)}(h**Parameters**h]j3 )}(hjsh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjsubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMlhjsubjw )}(hhh](j| )}(h0``struct fb_info *info`` fb_info struct pointer h](j )}(h``struct fb_info *info``h]j )}(hjsh]hstruct fb_info *info}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMihjsubj )}(hhh]h)}(hfb_info struct pointerh]hfb_info struct pointer}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMihjsubah}(h]h ]h"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]uh1j{ hjshMihjsubj| )}(hY``struct list_head *pagereflist`` list of mmap framebuffer pages that have to be flushed h](j )}(h!``struct list_head *pagereflist``h]j )}(hjth]hstruct list_head *pagereflist}(hj!thhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMjhjtubj )}(hhh]h)}(h6list of mmap framebuffer pages that have to be flushedh]h6list of mmap framebuffer pages that have to be flushed}(hj8thhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4thMjhj5tubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hj4thMjhjsubeh}(h]h ]h"]h$]h&]uh1jv hjsubh)}(h**Description**h]j3 )}(hjZth]h Description}(hj\thhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXtubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMlhjsubh)}(hThis function is used as the :c:type:`fb_deferred_io.deferred_io ` callback function for flushing the fbdev mmap writes.h](hThis function is used as the }(hjpthhhNhNubh)}(h5:c:type:`fb_deferred_io.deferred_io `h]j )}(hjzth]hfb_deferred_io.deferred_io}(hj|thhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjxtubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j fb_deferred_iouh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMkhjptubh6 callback function for flushing the fbdev mmap writes.}(hjpthhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjthMkhjsubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_fb_helper_set_suspend (C function)c.drm_fb_helper_set_suspendhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hNvoid drm_fb_helper_set_suspend (struct drm_fb_helper *fb_helper, bool suspend)h]j )}(hMvoid drm_fb_helper_set_suspend(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hvoidh]hvoid}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhjthMubj )}(hdrm_fb_helper_set_suspendh]j )}(hdrm_fb_helper_set_suspendh]hdrm_fb_helper_set_suspend}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ](j j eh"]h$]h&]j j uh1j hjthhhjthMubj)}(h/(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj )}(h h]h }(hj uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]j%)}jjtsbc.drm_fb_helper_set_suspendasbuh1hhjtubj )}(h h]h }(hj=uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubj9)}(hjOh]h*}(hjKuhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjtubj )}(h fb_helperh]h fb_helper}(hjXuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjtubj)}(h bool suspendh](j)}(hjIh]hbool}(hjquhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmuubj )}(h h]h }(hj~uhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmuubj )}(hsuspendh]hsuspend}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjtubeh}(h]h ]h"]h$]h&]j j uh1jhjthhhjthMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjthhhjthMubah}(h]jtah ](j j eh"]h$]h&]j j )j huh1j hjthMhjthhubj )}(hhh]h)}(hwrapper around fb_set_suspendh]hwrapper around fb_set_suspend}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjuhhubah}(h]h ]h"]h$]h&]uh1j hjthhhjthMubeh}(h]h ](j functioneh"]h$]h&]j" j j# juj$ juj% j& j' uh1j hhhjbXhNhNubj) )}(hX3**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL ``bool suspend`` whether to suspend or resume **Description** A wrapper around fb_set_suspend implemented by fbdev core. Use drm_fb_helper_set_suspend_unlocked() if you don't need to take the lock yourselfh](h)}(h**Parameters**h]j3 )}(hjuh]h Parameters}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjuubjw )}(hhh](j| )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hjuh]hstruct drm_fb_helper *fb_helper}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjuubj )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj vhMhj vubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hj vhMhjuubj| )}(h.``bool suspend`` whether to suspend or resume h](j )}(h``bool suspend``h]j )}(hj0vh]h bool suspend}(hj2vhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.vubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj*vubj )}(hhh]h)}(hwhether to suspend or resumeh]hwhether to suspend or resume}(hjIvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEvhMhjFvubah}(h]h ]h"]h$]h&]uh1j hj*vubeh}(h]h ]h"]h$]h&]uh1j{ hjEvhMhjuubeh}(h]h ]h"]h$]h&]uh1jv hjuubh)}(h**Description**h]j3 )}(hjkvh]h Description}(hjmvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjivubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjuubh)}(hA wrapper around fb_set_suspend implemented by fbdev core. Use drm_fb_helper_set_suspend_unlocked() if you don't need to take the lock yourselfh]hA wrapper around fb_set_suspend implemented by fbdev core. Use drm_fb_helper_set_suspend_unlocked() if you don’t need to take the lock yourself}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjuubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_fb_helper_set_suspend_unlocked (C function)$c.drm_fb_helper_set_suspend_unlockedhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hWvoid drm_fb_helper_set_suspend_unlocked (struct drm_fb_helper *fb_helper, bool suspend)h]j )}(hVvoid drm_fb_helper_set_suspend_unlocked(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hvoidh]hvoid}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjvhMubj )}(h"drm_fb_helper_set_suspend_unlockedh]j )}(h"drm_fb_helper_set_suspend_unlockedh]h"drm_fb_helper_set_suspend_unlocked}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhjvhMubj)}(h/(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hj whhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj wmodnameN classnameNj j )}j ]j%)}jjvsb$c.drm_fb_helper_set_suspend_unlockedasbuh1hhjvubj )}(h h]h }(hj+whhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj9)}(hjOh]h*}(hj9whhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjvubj )}(h fb_helperh]h fb_helper}(hjFwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubj)}(h bool suspendh](j)}(hjIh]hbool}(hj_whhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[wubj )}(h h]h }(hjlwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[wubj )}(hsuspendh]hsuspend}(hjzwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[wubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubeh}(h]h ]h"]h$]h&]j j uh1jhjvhhhjvhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjvhhhjvhMubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j hjvhMhjvhhubj )}(hhh]h)}(h>wrapper around fb_set_suspend that also takes the console lockh]h>wrapper around fb_set_suspend that also takes the console lock}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjwhhubah}(h]h ]h"]h$]h&]uh1j hjvhhhjvhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jwj$ jwj% j& j' uh1j hhhjbXhNhNubj) )}(hX**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL ``bool suspend`` whether to suspend or resume **Description** A wrapper around fb_set_suspend() that takes the console lock. If the lock isn't available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity. This function can be called multiple times with the same state since :c:type:`fb_info.state ` is checked to see if fbdev is running or not before locking. Use drm_fb_helper_set_suspend() if you need to take the lock yourself.h](h)}(h**Parameters**h]j3 )}(hjwh]h Parameters}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjwubjw )}(hhh](j| )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hjwh]hstruct drm_fb_helper *fb_helper}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjwubj )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjwubah}(h]h ]h"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]uh1j{ hjwhMhjwubj| )}(h.``bool suspend`` whether to suspend or resume h](j )}(h``bool suspend``h]j )}(hjxh]h bool suspend}(hj xhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjxubj )}(hhh]h)}(hwhether to suspend or resumeh]hwhether to suspend or resume}(hj7xhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3xhMhj4xubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hj3xhMhjwubeh}(h]h ]h"]h$]h&]uh1jv hjwubh)}(h**Description**h]j3 )}(hjYxh]h Description}(hj[xhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWxubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjwubh)}(hA wrapper around fb_set_suspend() that takes the console lock. If the lock isn't available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity.h]hA wrapper around fb_set_suspend() that takes the console lock. If the lock isn’t available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity.}(hjoxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjwubh)}(hThis function can be called multiple times with the same state since :c:type:`fb_info.state ` is checked to see if fbdev is running or not before locking.h](hEThis function can be called multiple times with the same state since }(hj~xhhhNhNubh)}(h!:c:type:`fb_info.state `h]j )}(hjxh]h fb_info.state}(hjxhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j fb_infouh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj~xubh= is checked to see if fbdev is running or not before locking.}(hj~xhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhMhjwubh)}(hFUse drm_fb_helper_set_suspend() if you need to take the lock yourself.h]hFUse drm_fb_helper_set_suspend() if you need to take the lock yourself.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjwubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_fb_helper_setcmap (C function)c.drm_fb_helper_setcmaphNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hFint drm_fb_helper_setcmap (struct fb_cmap *cmap, struct fb_info *info)h]j )}(hEint drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info)h](j)}(hinth]hint}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhhjxhMubj )}(hdrm_fb_helper_setcmaph]j )}(hdrm_fb_helper_setcmaph]hdrm_fb_helper_setcmap}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxhhhjxhMubj)}(h,(struct fb_cmap *cmap, struct fb_info *info)h](j)}(hstruct fb_cmap *cmaph](j )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hj)yhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubh)}(hhh]j )}(hfb_cmaph]hfb_cmap}(hj:yhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7yubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`h](himplementation for }(hjzhhhNhNubh)}(h$:c:type:`fb_ops.fb_setcmap `h]j )}(hjzh]hfb_ops.fb_setcmap}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jVyc.drm_fb_helper_setcmapasbj fb_opsuh1hhjchKhjzubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj zhhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjxhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jKzj$ jKzj% j& j' uh1j hhhjbXhNhNubj) )}(hq**Parameters** ``struct fb_cmap *cmap`` cmap to set ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j3 )}(hjUzh]h Parameters}(hjWzhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjSzubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjOzubjw )}(hhh](j| )}(h%``struct fb_cmap *cmap`` cmap to set h](j )}(h``struct fb_cmap *cmap``h]j )}(hjtzh]hstruct fb_cmap *cmap}(hjvzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrzubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjnzubj )}(hhh]h)}(h cmap to seth]h cmap to set}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1j hjnzubeh}(h]h ]h"]h$]h&]uh1j{ hjzhMhjkzubj| )}(h7``struct fb_info *info`` fbdev registered by the helperh](j )}(h``struct fb_info *info``h]j )}(hjzh]hstruct fb_info *info}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjzubj )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjzubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjzhMhjkzubeh}(h]h ]h"]h$]h&]uh1jv hjOzubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_fb_helper_ioctl (C function)c.drm_fb_helper_ioctlhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hSint drm_fb_helper_ioctl (struct fb_info *info, unsigned int cmd, unsigned long arg)h]j )}(hRint drm_fb_helper_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)h](j)}(hinth]hint}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{hhhj{hMubj )}(hdrm_fb_helper_ioctlh]j )}(hdrm_fb_helper_ioctlh]hdrm_fb_helper_ioctl}(hj({hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj${ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj{hhhj{hMubj)}(h;(struct fb_info *info, unsigned int cmd, unsigned long arg)h](j)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjD{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@{ubj )}(h h]h }(hjQ{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@{ubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjb{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_{ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjd{modnameN classnameNj j )}j ]j%)}jj*{sbc.drm_fb_helper_ioctlasbuh1hhj@{ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@{ubj9)}(hjOh]h*}(hj{hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@{ubj )}(hinfoh]hinfo}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<{ubj)}(hunsigned int cmdh](j)}(hunsignedh]hunsigned}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj)}(hinth]hint}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(hcmdh]hcmd}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<{ubj)}(hunsigned long argh](j)}(hunsignedh]hunsigned}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj)}(hlongh]hlong}(hj#|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hj1|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(hargh]harg}(hj?|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<{ubeh}(h]h ]h"]h$]h&]j j uh1jhj{hhhj{hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjzhhhj{hMubah}(h]jzah ](j j eh"]h$]h&]j j )j huh1j hj{hMhjzhhubj )}(hhh]h)}(hlegacy ioctl implementationh]hlegacy ioctl implementation}(hji|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjf|hhubah}(h]h ]h"]h$]h&]uh1j hjzhhhj{hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j|j$ j|j% j& j' uh1j hhhjbXhNhNubj) )}(hX**Parameters** ``struct fb_info *info`` fbdev registered by the helper ``unsigned int cmd`` ioctl command ``unsigned long arg`` ioctl argument **Description** A helper to implement the standard fbdev ioctl. Only FBIO_WAITFORVSYNC is implemented for now.h](h)}(h**Parameters**h]j3 )}(hj|h]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj|ubjw )}(hhh](j| )}(h8``struct fb_info *info`` fbdev registered by the helper h](j )}(h``struct fb_info *info``h]j )}(hj|h]hstruct fb_info *info}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj|ubj )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj|ubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hj|hMhj|ubj| )}(h#``unsigned int cmd`` ioctl command h](j )}(h``unsigned int cmd``h]j )}(hj|h]hunsigned int cmd}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj|ubj )}(hhh]h)}(h ioctl commandh]h ioctl command}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj|ubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hj|hMhj|ubj| )}(h%``unsigned long arg`` ioctl argument h](j )}(h``unsigned long arg``h]j )}(hj}h]hunsigned long arg}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj}ubj )}(hhh]h)}(hioctl argumenth]hioctl argument}(hj5}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1}hMhj2}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj1}hMhj|ubeh}(h]h ]h"]h$]h&]uh1jv hj|ubh)}(h**Description**h]j3 )}(hjW}h]h Description}(hjY}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjU}ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj|ubh)}(h^A helper to implement the standard fbdev ioctl. Only FBIO_WAITFORVSYNC is implemented for now.h]h^A helper to implement the standard fbdev ioctl. Only FBIO_WAITFORVSYNC is implemented for now.}(hjm}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_fb_helper_check_var (C function)c.drm_fb_helper_check_varhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hQint drm_fb_helper_check_var (struct fb_var_screeninfo *var, struct fb_info *info)h]j )}(hPint drm_fb_helper_check_var(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hinth]hint}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMeubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}hhhj}hMeubj )}(hdrm_fb_helper_check_varh]j )}(hdrm_fb_helper_check_varh]hdrm_fb_helper_check_var}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj}hhhj}hMeubj)}(h5(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hstruct fb_var_screeninfo *varh](j )}(hj h]hstruct}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubh)}(hhh]j )}(hfb_var_screeninfoh]hfb_var_screeninfo}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]j%)}jj}sbc.drm_fb_helper_check_varasbuh1hhj}ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj9)}(hjOh]h*}(hj%~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj}ubj )}(hvarh]hvar}(hj2~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubj)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjK~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG~ubj )}(h h]h }(hjX~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG~ubh)}(hhh]j )}(hfb_infoh]hfb_info}(hji~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjk~modnameN classnameNj j )}j ]j~c.drm_fb_helper_check_varasbuh1hhjG~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG~ubj9)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjG~ubj )}(hinfoh]hinfo}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubeh}(h]h ]h"]h$]h&]j j uh1jhj}hhhj}hMeubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj}hhhj}hMeubah}(h]j}ah ](j j eh"]h$]h&]j j )j huh1j hj}hMehj}hhubj )}(hhh]h)}(h9implementation for :c:type:`fb_ops.fb_check_var `h](himplementation for }(hj~hhhNhNubh)}(h&:c:type:`fb_ops.fb_check_var `h]j )}(hj~h]hfb_ops.fb_check_var}(hj~hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j~c.drm_fb_helper_check_varasbj fb_opsuh1hhjchKhj~ubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMehj~hhubah}(h]h ]h"]h$]h&]uh1j hj}hhhj}hMeubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjbXhNhNubj) )}(h**Parameters** ``struct fb_var_screeninfo *var`` screeninfo to check ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMihj ubjw )}(hhh](j| )}(h6``struct fb_var_screeninfo *var`` screeninfo to check h](j )}(h!``struct fb_var_screeninfo *var``h]j )}(hj1h]hstruct fb_var_screeninfo *var}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMfhj+ubj )}(hhh]h)}(hscreeninfo to checkh]hscreeninfo to check}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMfhjGubah}(h]h ]h"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]uh1j{ hjFhMfhj(ubj| )}(h7``struct fb_info *info`` fbdev registered by the helperh](j )}(h``struct fb_info *info``h]j )}(hjjh]hstruct fb_info *info}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhhjdubj )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMghjubah}(h]h ]h"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhhj(ubeh}(h]h ]h"]h$]h&]uh1jv hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_fb_helper_set_par (C function)c.drm_fb_helper_set_parhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(h0int drm_fb_helper_set_par (struct fb_info *info)h]j )}(h/int drm_fb_helper_set_par(struct fb_info *info)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_helper_set_parh]j )}(hdrm_fb_helper_set_parh]hdrm_fb_helper_set_par}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct fb_info *info)h]j)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_helper_set_parasbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hinfoh]hinfo}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h7implementation for :c:type:`fb_ops.fb_set_par `h](himplementation for }(hjhhhNhNubh)}(h$:c:type:`fb_ops.fb_set_par `h]j )}(hjh]hfb_ops.fb_set_par}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j;c.drm_fb_helper_set_parasbj fb_opsuh1hhjchKhjubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjbXhNhNubj) )}(h**Parameters** ``struct fb_info *info`` fbdev registered by the helper **Description** This will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.h](h)}(h**Parameters**h]j3 )}(hjʀh]h Parameters}(hj̀hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjȀubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjĀubjw )}(hhh]j| )}(h8``struct fb_info *info`` fbdev registered by the helper h](j )}(h``struct fb_info *info``h]j )}(hjh]hstruct fb_info *info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubj )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjĀubh)}(h**Description**h]j3 )}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjĀubh)}(hThis will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.h]hThis will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjĀubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_fb_helper_pan_display (C function)c.drm_fb_helper_pan_displayhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hSint drm_fb_helper_pan_display (struct fb_var_screeninfo *var, struct fb_info *info)h]j )}(hRint drm_fb_helper_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hinth]hint}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM*ubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjwhM*ubj )}(hdrm_fb_helper_pan_displayh]j )}(hdrm_fb_helper_pan_displayh]hdrm_fb_helper_pan_display}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjwhM*ubj)}(h5(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hstruct fb_var_screeninfo *varh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hfb_var_screeninfoh]hfb_var_screeninfo}(hjāhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjƁmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_helper_pan_displayasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hvarh]hvar}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hfb_infoh]hfb_info}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]jc.drm_fb_helper_pan_displayasbuh1hhjubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjbhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hinfoh]hinfo}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjehhhjwhM*ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjwhM*ubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j hjwhM*hj^hhubj )}(hhh]h)}(h;implementation for :c:type:`fb_ops.fb_pan_display `h](himplementation for }(hjhhhNhNubh)}(h(:c:type:`fb_ops.fb_pan_display `h]j )}(hjh]hfb_ops.fb_pan_display}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_fb_helper_pan_displayasbj fb_opsuh1hhjchKhjubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM*hjhhubah}(h]h ]h"]h$]h&]uh1j hj^hhhjwhM*ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jՂj$ jՂj% j& j' uh1j hhhjbXhNhNubj) )}(h**Parameters** ``struct fb_var_screeninfo *var`` updated screen information ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j3 )}(hj߂h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj݂ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM.hjقubjw )}(hhh](j| )}(h=``struct fb_var_screeninfo *var`` updated screen information h](j )}(h!``struct fb_var_screeninfo *var``h]j )}(hjh]hstruct fb_var_screeninfo *var}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM+hjubj )}(hhh]h)}(hupdated screen informationh]hupdated screen information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM+hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM+hjubj| )}(h7``struct fb_info *info`` fbdev registered by the helperh](j )}(h``struct fb_info *info``h]j )}(hj7h]hstruct fb_info *info}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM-hj1ubj )}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM,hjMubah}(h]h ]h"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]uh1j{ hjLhM-hjubeh}(h]h ]h"]h$]h&]uh1jv hjقubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_fb_helper_fill_info (C function)c.drm_fb_helper_fill_infohNtauh1j hjbXhhhNhNubj )}(hhh](j )}(h~void drm_fb_helper_fill_info (struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h]j )}(h}void drm_fb_helper_fill_info(struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMCubj )}(hdrm_fb_helper_fill_infoh]j )}(hdrm_fb_helper_fill_infoh]hdrm_fb_helper_fill_info}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMCubj)}(ha(struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h](j)}(hstruct fb_info *infoh](j )}(hj h]hstruct}(hj΃hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʃubj )}(h h]h }(hjۃhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʃubh)}(hhh]j )}(hfb_infoh]hfb_info}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_helper_fill_infoasbuh1hhjʃubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʃubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjʃubj )}(hinfoh]hinfo}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʃubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjƃubj)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]jc.drm_fb_helper_fill_infoasbuh1hhj<ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj<ubj )}(h fb_helperh]h fb_helper}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjƃubj)}(h(struct drm_fb_helper_surface_size *sizesh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_fb_helper_surface_sizeh]hdrm_fb_helper_surface_size}(hj΄hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˄ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjЄmodnameN classnameNj j )}j ]jc.drm_fb_helper_fill_infoasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsizesh]hsizes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjƃubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMCubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMCubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMChjhhubj )}(hhh]h)}(hinitializes fbdev informationh]hinitializes fbdev information}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMChj.hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMCubeh}(h]h ](j functioneh"]h$]h&]j" j j# jIj$ jIj% j& j' uh1j hhhjbXhNhNubj) )}(hXc**Parameters** ``struct fb_info *info`` fbdev instance to set up ``struct drm_fb_helper *fb_helper`` fb helper instance to use as template ``struct drm_fb_helper_surface_size *sizes`` describes fbdev size and scanout surface size **Description** Sets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in :c:type:`drm_fb_helper.fb `. Drivers should call this (or their equivalent setup code) from their :c:type:`drm_driver.fbdev_probe ` callback after having allocated the fbdev backing storage framebuffer.h](h)}(h**Parameters**h]j3 )}(hjSh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMGhjMubjw )}(hhh](j| )}(h2``struct fb_info *info`` fbdev instance to set up h](j )}(h``struct fb_info *info``h]j )}(hjrh]hstruct fb_info *info}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMDhjlubj )}(hhh]h)}(hfbdev instance to set uph]hfbdev instance to set up}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMDhjubah}(h]h ]h"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]uh1j{ hjhMDhjiubj| )}(hJ``struct drm_fb_helper *fb_helper`` fb helper instance to use as template h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hjh]hstruct drm_fb_helper *fb_helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMEhjubj )}(hhh]h)}(h%fb helper instance to use as templateh]h%fb helper instance to use as template}(hjąhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMEhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMEhjiubj| )}(h[``struct drm_fb_helper_surface_size *sizes`` describes fbdev size and scanout surface size h](j )}(h,``struct drm_fb_helper_surface_size *sizes``h]j )}(hjh]h(struct drm_fb_helper_surface_size *sizes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMFhjޅubj )}(hhh]h)}(h-describes fbdev size and scanout surface sizeh]h-describes fbdev size and scanout surface size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1j hjޅubeh}(h]h ]h"]h$]h&]uh1j{ hjhMFhjiubeh}(h]h ]h"]h$]h&]uh1jv hjMubh)}(h**Description**h]j3 )}(hjh]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMHhjMubh)}(hSets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in :c:type:`drm_fb_helper.fb `.h](h|Sets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in }(hj5hhhNhNubh)}(h*:c:type:`drm_fb_helper.fb `h]j )}(hj?h]hdrm_fb_helper.fb}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_fb_helperuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMGhj5ubh.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hMGhjMubh)}(hDrivers should call this (or their equivalent setup code) from their :c:type:`drm_driver.fbdev_probe ` callback after having allocated the fbdev backing storage framebuffer.h](hEDrivers should call this (or their equivalent setup code) from their }(hjghhhNhNubh)}(h-:c:type:`drm_driver.fbdev_probe `h]j )}(hjqh]hdrm_driver.fbdev_probe}(hjshhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_driveruh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMJhjgubhG callback after having allocated the fbdev backing storage framebuffer.}(hjghhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMJhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_fb_helper_initial_config (C function)c.drm_fb_helper_initial_confighNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hBint drm_fb_helper_initial_config (struct drm_fb_helper *fb_helper)h]j )}(hAint drm_fb_helper_initial_config(struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjȆhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjdžhMubj )}(hdrm_fb_helper_initial_configh]j )}(hdrm_fb_helper_initial_configh]hdrm_fb_helper_initial_config}(hjچhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjֆubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjdžhMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj܆sbc.drm_fb_helper_initial_configasbuh1hhjubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h fb_helperh]h fb_helper}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjdžhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjdžhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjdžhMhjhhubj )}(hhh]h)}(h,setup a sane initial connector configurationh]h,setup a sane initial connector configuration}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjvhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjdžhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjbXhNhNubj) )}(hXV**Parameters** ``struct drm_fb_helper *fb_helper`` fb_helper device struct **Description** Scans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store. Note that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces. This function will call down into the :c:type:`drm_driver.fbdev_probe ` callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure. HANG DEBUGGING: When you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up. Standard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option. The other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option. **Return** Zero if everything went ok, nonzero otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubjw )}(hhh]j| )}(h<``struct drm_fb_helper *fb_helper`` fb_helper device struct h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hjh]hstruct drm_fb_helper *fb_helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubj )}(hhh]h)}(hfb_helper device structh]hfb_helper device struct}(hjӇhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjχhMhjЇubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjχhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hScans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store.h]hScans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(huNote that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces.h]huNote that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hX>This function will call down into the :c:type:`drm_driver.fbdev_probe ` callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure.h](h&This function will call down into the }(hj)hhhNhNubh)}(h-:c:type:`drm_driver.fbdev_probe `h]j )}(hj3h]hdrm_driver.fbdev_probe}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_driveruh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhj)ubh callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhMhjubh)}(hHANG DEBUGGING:h]hHANG DEBUGGING:}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hXNWhen you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up.h]hXNWhen you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hStandard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option.h]hStandard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hThe other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option.h]hThe other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(h.Zero if everything went ok, nonzero otherwise.h]h.Zero if everything went ok, nonzero otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_helper_hotplug_event (C function)c.drm_fb_helper_hotplug_eventhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hAint drm_fb_helper_hotplug_event (struct drm_fb_helper *fb_helper)h]j )}(h@int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hjވhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjڈhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڈhhhjhMubj )}(hdrm_fb_helper_hotplug_eventh]j )}(hdrm_fb_helper_hotplug_eventh]hdrm_fb_helper_hotplug_event}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjڈhhhjhMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_helper_hotplug_eventasbuh1hhjubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjghhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h fb_helperh]h fb_helper}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjڈhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjֈhhhjhMubah}(h]jшah ](j j eh"]h$]h&]j j )j huh1j hjhMhjӈhhubj )}(hhh]h)}(hOrespond to a hotplug notification by probing all the outputs attached to the fbh]hOrespond to a hotplug notification by probing all the outputs attached to the fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjӈhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjbXhNhNubj) )}(hX**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL **Description** Scan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration. Called at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver's hotplug interrupt). Note that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events. **Return** 0 on success and a non-zero error code otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hj‰hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubjw )}(hhh]j| )}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](j )}(h#``struct drm_fb_helper *fb_helper``h]j )}(hj߉h]hstruct drm_fb_helper *fb_helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj݉ubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjىubj )}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjىubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj։ubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hScan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration.h]hScan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hCalled at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver's hotplug interrupt).h]hCalled at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver’s hotplug interrupt).}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hNote that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events.h]hNote that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM"hjubh)}(h **Return**h]j3 )}(hj_h]hReturn}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM'hjubh)}(h10 on success and a non-zero error code otherwise.h]h10 on success and a non-zero error code otherwise.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chM(hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_fb_helper_gem_is_fb (C function)c.drm_fb_helper_gem_is_fbhNtauh1j hjbXhhhNhNubj )}(hhh](j )}(hfbool drm_fb_helper_gem_is_fb (const struct drm_fb_helper *fb_helper, const struct drm_gem_object *obj)h]j )}(hebool drm_fb_helper_gem_is_fb(const struct drm_fb_helper *fb_helper, const struct drm_gem_object *obj)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMIubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMIubj )}(hdrm_fb_helper_gem_is_fbh]j )}(hdrm_fb_helper_gem_is_fbh]hdrm_fb_helper_gem_is_fb}(hjĊhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMIubj)}(hI(const struct drm_fb_helper *fb_helper, const struct drm_gem_object *obj)h](j)}(h%const struct drm_fb_helper *fb_helperh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܊ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܊ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܊ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܊ubh)}(hhh]j )}(h drm_fb_helperh]h drm_fb_helper}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjƊsbc.drm_fb_helper_gem_is_fbasbuh1hhj܊ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܊ubj9)}(hjOh]h*}(hjGhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj܊ubj )}(h fb_helperh]h fb_helper}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj܊ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj؊ubj)}(h const struct drm_gem_object *objh](j )}(hjch]hconst}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(hdrm_gem_objecth]hdrm_gem_object}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j5c.drm_fb_helper_gem_is_fbasbuh1hhjiubj )}(h h]h }(hjċhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj9)}(hjOh]h*}(hjҋhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjiubj )}(hobjh]hobj}(hjߋhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj؊ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMIubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMIubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMIhjhhubj )}(hhh]h)}(h"Tests if GEM object is framebufferh]h"Tests if GEM object is framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMIhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMIubeh}(h]h ](j functioneh"]h$]h&]j" j j# j!j$ j!j% j& j' uh1j hhhjbXhNhNubj) )}(hX**Parameters** ``const struct drm_fb_helper *fb_helper`` fb_helper instance, can be NULL ``const struct drm_gem_object *obj`` The GEM object to test, can be NULL **Description** Call drm_fb_helper_gem_is_fb to test is a DRM device's fbdev emulation uses the specified GEM object for its framebuffer. The result is always false if either poiner is NULL. **Return** True if fbdev emulation uses the provided GEM object, or false otherwise.h](h)}(h**Parameters**h]j3 )}(hj+h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMMhj%ubjw )}(hhh](j| )}(hJ``const struct drm_fb_helper *fb_helper`` fb_helper instance, can be NULL h](j )}(h)``const struct drm_fb_helper *fb_helper``h]j )}(hjJh]h%const struct drm_fb_helper *fb_helper}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMJhjDubj )}(hhh]h)}(hfb_helper instance, can be NULLh]hfb_helper instance, can be NULL}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMJhj`ubah}(h]h ]h"]h$]h&]uh1j hjDubeh}(h]h ]h"]h$]h&]uh1j{ hj_hMJhjAubj| )}(hI``const struct drm_gem_object *obj`` The GEM object to test, can be NULL h](j )}(h$``const struct drm_gem_object *obj``h]j )}(hjh]h const struct drm_gem_object *obj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMKhj}ubj )}(hhh]h)}(h#The GEM object to test, can be NULLh]h#The GEM object to test, can be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMKhjubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMKhjAubeh}(h]h ]h"]h$]h&]uh1jv hj%ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMMhj%ubh)}(hCall drm_fb_helper_gem_is_fb to test is a DRM device's fbdev emulation uses the specified GEM object for its framebuffer. The result is always false if either poiner is NULL.h]hCall drm_fb_helper_gem_is_fb to test is a DRM device’s fbdev emulation uses the specified GEM object for its framebuffer. The result is always false if either poiner is NULL.}(hjԌhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMLhj%ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMPhj%ubh)}(hITrue if fbdev emulation uses the provided GEM object, or false otherwise.h]hITrue if fbdev emulation uses the provided GEM object, or false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:118: ./drivers/gpu/drm/drm_fb_helper.chMQhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjbXhhhNhNubeh}(h]jah ]h"] fbdev helper functions referenceah$]h&]uh1hhhhhhhhKnubh)}(hhh](h)}(h!format Helper Functions Referenceh]h!format Helper Functions Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKzubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_format_conv_state_init (C function)c.drm_format_conv_state_inithNtauh1j hjhhhNhNubj )}(hhh](j )}(hEvoid drm_format_conv_state_init (struct drm_format_conv_state *state)h]j )}(hDvoid drm_format_conv_state_init(struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhjPhKubj )}(hdrm_format_conv_state_inith]j )}(hdrm_format_conv_state_inith]hdrm_format_conv_state_init}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>hhhjPhKubj)}(h%(struct drm_format_conv_state *state)h]j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjesbc.drm_format_conv_state_initasbuh1hhj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj9)}(hjOh]h*}(hjˍhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj{ubj )}(hstateh]hstate}(hj؍hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjwubah}(h]h ]h"]h$]h&]j j uh1jhj>hhhjPhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:hhhjPhKubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j hjPhKhj7hhubj )}(hhh]h)}(h"Initialize format-conversion stateh]h"Initialize format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hj7hhhjPhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``struct drm_format_conv_state *state`` The state to initialize **Description** Clears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.h](h)}(h**Parameters**h]j3 )}(hj$h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjubjw )}(hhh]j| )}(h@``struct drm_format_conv_state *state`` The state to initialize h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjCh]h#struct drm_format_conv_state *state}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhj=ubj )}(hhh]h)}(hThe state to initializeh]hThe state to initialize}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhKhjYubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hjXhKhj:ubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj~h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjubh)}(hjClears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.h]hjClears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_format_conv_state_copy (C function)c.drm_format_conv_state_copyhNtauh1j hjhhhNhNubj )}(hhh](j )}(htvoid drm_format_conv_state_copy (struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h]j )}(hsvoid drm_format_conv_state_copy(struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h](j)}(hvoidh]hvoid}(hjÎhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK*ubj )}(h h]h }(hjҎhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjюhK*ubj )}(hdrm_format_conv_state_copyh]j )}(hdrm_format_conv_state_copyh]hdrm_format_conv_state_copy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjюhK*ubj)}(hT(struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h](j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjsbc.drm_format_conv_state_copyasbuh1hhjubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h-const struct drm_format_conv_state *old_stateh](j )}(hjch]hconst}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j:c.drm_format_conv_state_copyasbuh1hhjnubj )}(h h]h }(hjɏhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj9)}(hjOh]h*}(hj׏hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjnubj )}(h old_stateh]h old_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjюhK*ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjюhK*ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjюhK*hjhhubj )}(hhh]h)}(hCopy format-conversion stateh]hCopy format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK*hj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjюhK*ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j&j$ j&j% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``struct drm_format_conv_state *state`` Destination state ``const struct drm_format_conv_state *old_state`` Source state **Description** Copies format-conversion state from **old_state** to **state**; except for temporary storage.h](h)}(h**Parameters**h]j3 )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK.hj*ubjw )}(hhh](j| )}(h:``struct drm_format_conv_state *state`` Destination state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjOh]h#struct drm_format_conv_state *state}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK+hjIubj )}(hhh]h)}(hDestination stateh]hDestination state}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhK+hjeubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hjdhK+hjFubj| )}(h?``const struct drm_format_conv_state *old_state`` Source state h](j )}(h1``const struct drm_format_conv_state *old_state``h]j )}(hjh]h-const struct drm_format_conv_state *old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK,hjubj )}(hhh]h)}(h Source stateh]h Source state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK,hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhK,hjFubeh}(h]h ]h"]h$]h&]uh1jv hj*ubh)}(h**Description**h]j3 )}(hjÐh]h Description}(hjŐhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK.hj*ubh)}(h]Copies format-conversion state from **old_state** to **state**; except for temporary storage.h](h$Copies format-conversion state from }(hjِhhhNhNubj3 )}(h **old_state**h]h old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjِubh to }(hjِhhhNhNubj3 )}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjِubh; except for temporary storage.}(hjِhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK-hj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_format_conv_state_reserve (C function)c.drm_format_conv_state_reservehNtauh1j hjhhhNhNubj )}(hhh](j )}(hhvoid * drm_format_conv_state_reserve (struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h]j )}(hfvoid *drm_format_conv_state_reserve(struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h](j)}(hvoidh]hvoid}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK?ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhj:hK?ubj9)}(hjOh]h*}(hjIhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj(hhhj:hK?ubj )}(hdrm_format_conv_state_reserveh]j )}(hdrm_format_conv_state_reserveh]hdrm_format_conv_state_reserve}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhj:hK?ubj)}(hC(struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h](j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj\sbc.drm_format_conv_state_reserveasbuh1hhjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj9)}(hjOh]h*}(hj‘hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjrubj )}(hstateh]hstate}(hjϑhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubj)}(hsize_t new_sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_format_conv_state_reserveasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hnew_sizeh]hnew_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubj)}(h gfp_t flagsh](h)}(hhh]j )}(hgfp_th]hgfp_t}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]jc.drm_format_conv_state_reserveasbuh1hhj,ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(hflagsh]hflags}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhj:hK?ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj$hhhj:hK?ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj:hK?hj!hhubj )}(hhh]h)}(h'Allocates storage for format conversionh]h'Allocates storage for format conversion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK?hjhhubah}(h]h ]h"]h$]h&]uh1j hj!hhhj:hK?ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_format_conv_state *state`` The format-conversion state ``size_t new_size`` The minimum allocation size ``gfp_t flags`` Flags for kmalloc() **Description** Allocates at least **new_size** bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It's best to collect all memory requirements of a format conversion and call this function once to allocate the range. **Return** A pointer to the allocated memory range, or NULL otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKChjubjw )}(hhh](j| )}(hD``struct drm_format_conv_state *state`` The format-conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjʒh]h#struct drm_format_conv_state *state}(hj̒hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjȒubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK@hjĒubj )}(hhh]h)}(hThe format-conversion stateh]hThe format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjߒhK@hjubah}(h]h ]h"]h$]h&]uh1j hjĒubeh}(h]h ]h"]h$]h&]uh1j{ hjߒhK@hjubj| )}(h0``size_t new_size`` The minimum allocation size h](j )}(h``size_t new_size``h]j )}(hjh]hsize_t new_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKAhjubj )}(hhh]h)}(hThe minimum allocation sizeh]hThe minimum allocation size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKAhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKAhjubj| )}(h$``gfp_t flags`` Flags for kmalloc() h](j )}(h``gfp_t flags``h]j )}(hj<h]h gfp_t flags}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKBhj6ubj )}(hhh]h)}(hFlags for kmalloc()h]hFlags for kmalloc()}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhKBhjRubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hjQhKBhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjwh]h Description}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKDhjubh)}(hXAllocates at least **new_size** bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It's best to collect all memory requirements of a format conversion and call this function once to allocate the range.h](hAllocates at least }(hjhhhNhNubj3 )}(h **new_size**h]hnew_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It’s best to collect all memory requirements of a format conversion and call this function once to allocate the range.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKChjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKHhjubh)}(h;A pointer to the allocated memory range, or NULL otherwise.h]h;A pointer to the allocated memory range, or NULL otherwise.}(hjƓhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKIhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_format_conv_state_release (C function)c.drm_format_conv_state_releasehNtauh1j hjhhhNhNubj )}(hhh](j )}(hHvoid drm_format_conv_state_release (struct drm_format_conv_state *state)h]j )}(hGvoid drm_format_conv_state_release(struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKcubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKcubj )}(hdrm_format_conv_state_releaseh]j )}(hdrm_format_conv_state_releaseh]hdrm_format_conv_state_release}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKcubj)}(h%(struct drm_format_conv_state *state)h]j)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRmodnameN classnameNj j )}j ]j%)}jjsbc.drm_format_conv_state_releaseasbuh1hhj.ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj9)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj.ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj*ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKcubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKcubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKchjhhubj )}(hhh]h)}(h%Releases an format-conversion storageh]h%Releases an format-conversion storage}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKchjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKcubeh}(h]h ](j functioneh"]h$]h&]j" j j# j͔j$ j͔j% j& j' uh1j hhhjhNhNubj) )}(hX1**Parameters** ``struct drm_format_conv_state *state`` The format-conversion state **Description** Releases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.h](h)}(h**Parameters**h]j3 )}(hjהh]h Parameters}(hjٔhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjՔubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKghjєubjw )}(hhh]j| )}(hD``struct drm_format_conv_state *state`` The format-conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKdhjubj )}(hhh]h)}(hThe format-conversion stateh]hThe format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKdhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hKdhjubah}(h]h ]h"]h$]h&]uh1jv hjєubh)}(h**Description**h]j3 )}(hj1h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKfhjєubh)}(hReleases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.h]hReleases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chKehjєubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_fb_clip_offset (C function)c.drm_fb_clip_offsethNtauh1j hjhhhNhNubj )}(hhh](j )}(hwunsigned int drm_fb_clip_offset (unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h]j )}(hvunsigned int drm_fb_clip_offset(unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h](j)}(hunsignedh]hunsigned}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chK{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrhhhjhK{ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrhhhjhK{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrhhhjhK{ubj )}(hdrm_fb_clip_offseth]j )}(hdrm_fb_clip_offseth]hdrm_fb_clip_offset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjrhhhjhK{ubj)}(hW(unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h](j)}(hunsigned int pitchh](j)}(hunsignedh]hunsigned}(hjϕhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˕ubj )}(h h]h }(hjݕhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˕ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˕ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˕ubj )}(hpitchh]hpitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˕ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjǕubj)}(h$const struct drm_format_info *formath](j )}(hjch]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_clip_offsetasbuh1hhjubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hformath]hformat}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjǕubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjȖhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjՖhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]juc.drm_fb_clip_offsetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjǕubeh}(h]h ]h"]h$]h&]j j uh1jhjrhhhjhK{ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnhhhjhK{ubah}(h]jiah ](j j eh"]h$]h&]j j )j huh1j hjhK{hjkhhubj )}(hhh]h)}(hhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubh2 (i.e. the destination is at the top-left corner).}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjrubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_fb_swab (C function) c.drm_fb_swabhNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_swab (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, bool cached, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_swab(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, bool cached, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjshhhjhMubj )}(h drm_fb_swabh]j )}(h drm_fb_swabh]h drm_fb_swab}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjshhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, bool cached, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjҝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjϝubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjԝmodnameN classnameNj j )}j ]j%)}jjsb c.drm_fb_swabasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hunsignedh]hunsigned}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj)}(hinth]hint}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj9)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjǞhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj؞hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj՞ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjڞmodnameN classnameNj j )}j ]j c.drm_fb_swabasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(hj h]hstruct}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjemodnameN classnameNj j )}j ]j c.drm_fb_swabasbuh1hhj&ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj&ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjŸhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjПhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjݟhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_fb_swabasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool cachedh](j)}(hjIh]hbool}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(hcachedh]hcached}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_fb_swabasbuh1hhjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjpubj )}(hstateh]hstate}(hjˠhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjshhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjohhhjhMubah}(h]jjah ](j j eh"]h$]h&]j j )j huh1j hjhMhjlhhubj )}(hhh]h)}(hSwap bytes into clip bufferh]hSwap bytes into clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjlhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct iosys_map *dst`` Array of destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``bool cached`` Source buffer is mapped cached (eg. not write-combined) ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and swaps per-pixel bytes during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. If **cached** is false a temporary buffer is used to cache one pixel line at a time to speed up slow uncached reads. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjw )}(hhh](j| )}(h7``struct iosys_map *dst`` Array of destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hj6h]hstruct iosys_map *dst}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj0ubj )}(hhh]h)}(hArray of destination buffersh]hArray of destination buffers}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMhjLubah}(h]h ]h"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]uh1j{ hjKhMhj-ubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjoh]hconst unsigned int *dst_pitch}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjiubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj-ubj| )}(h8``const struct iosys_map *src`` Array of source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hArray of source buffersh]hArray of source buffers}(hjԡhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjСhMhjѡubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjСhMhj-ubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhj-ubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hj-h]hconst struct drm_rect *clip}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj'ubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjCubah}(h]h ]h"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]uh1j{ hjBhMhj-ubj| )}(hH``bool cached`` Source buffer is mapped cached (eg. not write-combined) h](j )}(h``bool cached``h]j )}(hjfh]h bool cached}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj`ubj )}(hhh]h)}(h7Source buffer is mapped cached (eg. not write-combined)h]h7Source buffer is mapped cached (eg. not write-combined)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj|ubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj{hMhj-ubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj-ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjڢh]h Description}(hjܢhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjآubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function copies parts of a framebuffer to display memory and swaps per-pixel bytes during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. If **cached** is false a temporary buffer is used to cache one pixel line at a time to speed up slow uncached reads.h](hThis function copies parts of a framebuffer to display memory and swaps per-pixel bytes during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhi’s format. Each entry stores the value for the format’s respective color plane at the same index. If }(hjhhhNhNubj3 )}(h **cached**h]hcached}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhg is false a temporary buffer is used to cache one pixel line at a time to speed up slow uncached reads.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjYhhhNhNubj3 )}(h**dst**h]hdst}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubh2 (i.e. the destination is at the top-left corner).}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_fb_xrgb8888_to_rgb332 (C function)c.drm_fb_xrgb8888_to_rgb332hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_rgb332 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_rgb332(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_fb_xrgb8888_to_rgb332h]j )}(hdrm_fb_xrgb8888_to_rgb332h]hdrm_fb_xrgb8888_to_rgb332}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjףhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӣubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӣubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_rgb332asbuh1hhjӣubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӣubj9)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjӣubj )}(hdsth]hdst}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӣubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjϣubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj)}(hunsignedh]hunsigned}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjEubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjϣubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hj¤hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjϤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjݤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb332asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj'hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjϣubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb332asbuh1hhjIubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjIubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjϣubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjإhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԥubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԥubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԥubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԥubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb332asbuh1hhjԥubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԥubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjԥubj )}(hcliph]hclip}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԥubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjϣubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgb332asbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjϣubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h&Convert XRGB8888 to RGB332 clip bufferh]h&Convert XRGB8888 to RGB332 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hXj**Parameters** ``struct iosys_map *dst`` Array of RGB332 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB332 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjw )}(hhh](j| )}(h>``struct iosys_map *dst`` Array of RGB332 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hj%h]hstruct iosys_map *dst}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hjubj )}(hhh]h)}(h#Array of RGB332 destination buffersh]h#Array of RGB332 destination buffers}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hM hj;ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj:hM hjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hj^h]hconst unsigned int *dst_pitch}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjXubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjwhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwubh9; can be NULL if scanlines are stored next to each other.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjtubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjshMhjubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjçhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjݧubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjݧubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMhj2ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj1hMhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjUh]h#struct drm_format_conv_state *state}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjOubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjkubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjҨhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hVDrivers can use this function for RGB332 devices that don't support XRGB8888 natively.h]hXDrivers can use this function for RGB332 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_fb_xrgb8888_to_rgb565 (C function)c.drm_fb_xrgb8888_to_rgb565hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_rgb565 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_rgb565(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM3ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhj[hM3ubj )}(hdrm_fb_xrgb8888_to_rgb565h]j )}(hdrm_fb_xrgb8888_to_rgb565h]hdrm_fb_xrgb8888_to_rgb565}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjIhhhj[hM3ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjpsbc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj )}(h h]h }(hjȩhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj֩hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjOhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jĩc.drm_fb_xrgb8888_to_rgb565asbuh1hhjqubj )}(h h]h }(hj̪hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj9)}(hjOh]h*}(hjڪhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjqubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]jĩc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjīhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjƫmodnameN classnameNj j )}j ]jĩc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj6modnameN classnameNj j )}j ]jĩc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjIhhhj[hM3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjEhhhj[hM3ubah}(h]j@ah ](j j eh"]h$]h&]j j )j huh1j hj[hM3hjBhhubj )}(hhh]h)}(h&Convert XRGB8888 to RGB565 clip bufferh]h&Convert XRGB8888 to RGB565 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM3hjhhubah}(h]h ]h"]h$]h&]uh1j hjBhhhj[hM3ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hXi**Parameters** ``struct iosys_map *dst`` Array of RGB565 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB565 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM7hjubjw )}(hhh](j| )}(h>``struct iosys_map *dst`` Array of RGB565 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjجh]hstruct iosys_map *dst}(hjڬhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj֬ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM4hjҬubj )}(hhh]h)}(h#Array of RGB565 destination buffersh]h#Array of RGB565 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1j hjҬubeh}(h]h ]h"]h$]h&]uh1j{ hjhM4hjϬubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM6hj ubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj*hhhNhNubj3 )}(h**dst**h]hdst}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*ubh9; can be NULL if scanlines are stored next to each other.}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM5hj'ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hM6hjϬubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hj]h]hconst struct iosys_map *src}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM7hjWubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhM7hjsubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjrhM7hjϬubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM8hjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM8hjϬubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjϭh]hconst struct drm_rect *clip}(hjѭhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjͭubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM9hjɭubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1j hjɭubeh}(h]h ]h"]h$]h&]uh1j{ hjhM9hjϬubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM:hjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM:hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM:hjϬubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjCh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjAubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM<hjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjYhhhNhNubj3 )}(h**dst**h]hdst}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubh, }(hjYhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubh and }(hjYhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjYhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM;hjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMAhjubh)}(hVDrivers can use this function for RGB565 devices that don't support XRGB8888 natively.h]hXDrivers can use this function for RGB565 devices that don’t support XRGB8888 natively.}(hjѮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMDhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_xrgb8888_to_rgb565be (C function)c.drm_fb_xrgb8888_to_rgb565behNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_rgb565be (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_rgb565be(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM[ubj )}(hdrm_fb_xrgb8888_to_rgb565beh]j )}(hdrm_fb_xrgb8888_to_rgb565beh]hdrm_fb_xrgb8888_to_rgb565be}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM[ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j%)}jj#sbc.drm_fb_xrgb8888_to_rgb565beasbuh1hhj9ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj9ubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjʯhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjدhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(hj h]hstruct}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]jwc.drm_fb_xrgb8888_to_rgb565beasbuh1hhj$ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj$ubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjΰhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj۰hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jwc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(hj h]hstruct}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjymodnameN classnameNj j )}j ]jwc.drm_fb_xrgb8888_to_rgb565beasbuh1hhj:ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj:ubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjɱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjűubj )}(h h]h }(hjֱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjűubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jwc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjűubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjűubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjűubj )}(hstateh]hstate}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjűubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM[ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM[ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM[hjhhubj )}(hhh]h)}(hh]hstruct iosys_map *dst}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj8ubj )}(hhh]h)}(h%Array of XRGB1555 destination buffersh]h%Array of XRGB1555 destination buffers}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjTubah}(h]h ]h"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hjShMhj5ubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjwh]hconst unsigned int *dst_pitch}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjqubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj5ubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hjøh]hconst struct iosys_map *src}(hjŸhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjܸhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjظhMhjٸubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjظhMhj5ubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj5ubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hj5h]hconst struct drm_rect *clip}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj/ubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjKubah}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hjJhMhj5ubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjnh]h#struct drm_format_conv_state *state}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj5ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjǹhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjٹhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXDrivers can use this function for XRGB1555 devices that don't support XRGB8888 natively.h]hZDrivers can use this function for XRGB1555 devices that don’t support XRGB8888 natively.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_xrgb8888_to_argb1555 (C function)c.drm_fb_xrgb8888_to_argb1555hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_argb1555 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_argb1555(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbhhhjthMubj )}(hdrm_fb_xrgb8888_to_argb1555h]j )}(hdrm_fb_xrgb8888_to_argb1555h]hdrm_fb_xrgb8888_to_argb1555}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjbhhhjthMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjúmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_argb1555asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjǻhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĻubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjɻmodnameN classnameNj j )}j ]jݺc.drm_fb_xrgb8888_to_argb1555asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]jݺc.drm_fb_xrgb8888_to_argb1555asbuh1hhjubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj̼hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjݼhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڼubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj߼modnameN classnameNj j )}j ]jݺc.drm_fb_xrgb8888_to_argb1555asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]jݺc.drm_fb_xrgb8888_to_argb1555asbuh1hhj+ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj9)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj+ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjbhhhjthMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^hhhjthMubah}(h]jYah ](j j eh"]h$]h&]j j )j huh1j hjthMhj[hhubj )}(hhh]h)}(h(Convert XRGB8888 to ARGB1555 clip bufferh]h(Convert XRGB8888 to ARGB1555 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj[hhhjthMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jȽj$ jȽj% j& j' uh1j hhhjhNhNubj) )}(hXx**Parameters** ``struct iosys_map *dst`` Array of ARGB1555 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB1555 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j3 )}(hjҽh]h Parameters}(hjԽhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjнubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj̽ubjw )}(hhh](j| )}(h@``struct iosys_map *dst`` Array of ARGB1555 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h%Array of ARGB1555 destination buffersh]h%Array of ARGB1555 destination buffers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hj*h]hconst unsigned int *dst_pitch}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj$ubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjChhhNhNubj3 )}(h**dst**h]hdst}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjCubh9; can be NULL if scanlines are stored next to each other.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj@ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hMhjubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hjvh]hconst struct iosys_map *src}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjpubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjȾhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjľhMhjžubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjľhMhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hj!h]h#struct drm_format_conv_state *state}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMhjubeh}(h]h ]h"]h$]h&]uh1jv hj̽ubh)}(h**Description**h]j3 )}(hj\h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj̽ubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjrhhhNhNubj3 )}(h**dst**h]hdst}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubh, }(hjrhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubh and }(hjrhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjrhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj̽ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjɿhhhNhNubj3 )}(h**dst**h]hdst}(hjѿhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjɿubh2 (i.e. the destination is at the top-left corner).}(hjɿhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj̽ubh)}(hDrivers can use this function for ARGB1555 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ARGB1555 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj̽ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_xrgb8888_to_rgba5551 (C function)c.drm_fb_xrgb8888_to_rgba5551hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_rgba5551 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state) h]j )}(hvoid drm_fb_xrgb8888_to_rgba5551(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj'hMubj )}(hdrm_fb_xrgb8888_to_rgba5551h]j )}(hdrm_fb_xrgb8888_to_rgba5551h]hdrm_fb_xrgb8888_to_rgba5551}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj'hMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjvmodnameN classnameNj j )}j ]j%)}jj<sbc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjRubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjRubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhj=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj=ubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(hj h]hstruct}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjSubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjNubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj'hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj'hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj'hMhjhhubj )}(hhh]h)}(h(Convert XRGB8888 to RGBA5551 clip bufferh]h(Convert XRGB8888 to RGBA5551 clip buffer}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj`hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj'hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j{j$ j{j% j& j' uh1j hhhjhNhNubj) )}(hXx**Parameters** ``struct iosys_map *dst`` Array of RGBA5551 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGBA5551 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjw )}(hhh](j| )}(h@``struct iosys_map *dst`` Array of RGBA5551 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h%Array of RGBA5551 destination buffersh]h%Array of RGBA5551 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hj)h]hconst struct iosys_map *src}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj#ubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj?ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjbh]h const struct drm_framebuffer *fb}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj\ubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjxubah}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hjwhMhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hj%hhhNhNubj3 )}(h**dst**h]hdst}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubh, }(hj%hhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubh and }(hj%hhhNhNubj3 )}(h**src**h]hsrc}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj%hhhNhNubj3 )}(h**fb**h]hfb}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hj|hhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubh2 (i.e. the destination is at the top-left corner).}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hDrivers can use this function for RGBA5551 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for RGBA5551 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_fb_xrgb8888_to_rgb888 (C function)c.drm_fb_xrgb8888_to_rgb888hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_rgb888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_rgb888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_rgb888h]j )}(hdrm_fb_xrgb8888_to_rgb888h]hdrm_fb_xrgb8888_to_rgb888}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj )}(h h]h }(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjwubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]jCc.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjYhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jCc.drm_fb_xrgb8888_to_rgb888asbuh1hhj{ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj{ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjEmodnameN classnameNj j )}j ]jCc.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjohhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jCc.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h&Convert XRGB8888 to RGB888 clip bufferh]h&Convert XRGB8888 to RGB888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j.j$ j.j% j& j' uh1j hhhjhNhNubj) )}(hXj**Parameters** ``struct iosys_map *dst`` Array of RGB888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB888 devices that don't natively support XRGB8888.h](h)}(h**Parameters**h]j3 )}(hj8h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj2ubjw )}(hhh](j| )}(h>``struct iosys_map *dst`` Array of RGB888 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjWh]hstruct iosys_map *dst}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjQubj )}(hhh]h)}(h#Array of RGB888 destination buffersh]h#Array of RGB888 destination buffers}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMhjmubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjlhMhjNubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjNubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjNubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj*hMhjNubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjNh]hconst struct drm_rect *clip}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjHubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjdubah}(h]h ]h"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]uh1j{ hjchMhjNubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjNubeh}(h]h ]h"]h$]h&]uh1jv hj2ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj2ubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj2ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hj/hhhNhNubj3 )}(h**dst**h]hdst}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubh2 (i.e. the destination is at the top-left corner).}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj2ubh)}(hVDrivers can use this function for RGB888 devices that don't natively support XRGB8888.h]hXDrivers can use this function for RGB888 devices that don’t natively support XRGB8888.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_fb_xrgb8888_to_bgr888 (C function)c.drm_fb_xrgb8888_to_bgr888hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_bgr888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_bgr888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM"ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{hhhjhM"ubj )}(hdrm_fb_xrgb8888_to_bgr888h]j )}(hdrm_fb_xrgb8888_to_bgr888h]hdrm_fb_xrgb8888_to_bgr888}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj{hhhjhM"ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hunsignedh]hunsigned}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhj.ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj.ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjhmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjDubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjDubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj{hhhjhM"ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjwhhhjhM"ubah}(h]jrah ](j j eh"]h$]h&]j j )j huh1j hjhM"hjthhubj )}(hhh]h)}(h&Convert XRGB8888 to BGR888 clip bufferh]h&Convert XRGB8888 to BGR888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM"hjhhubah}(h]h ]h"]h$]h&]uh1j hjthhhjhM"ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hXj**Parameters** ``struct iosys_map *dst`` Array of BGR888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for BGR888 devices that don't natively support XRGB8888.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM&hjubjw )}(hhh](j| )}(h>``struct iosys_map *dst`` Array of BGR888 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hj h]hstruct iosys_map *dst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM#hjubj )}(hhh]h)}(h#Array of BGR888 destination buffersh]h#Array of BGR888 destination buffers}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM#hj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM#hjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjCh]hconst unsigned int *dst_pitch}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM%hj=ubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj\hhhNhNubj3 )}(h**dst**h]hdst}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\ubh9; can be NULL if scanlines are stored next to each other.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM$hjYubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hjXhM%hjubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM&hjubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM&hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM&hjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM'hjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM'hjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM(hjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM(hjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hj:h]h#struct drm_format_conv_state *state}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM)hj4ubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM)hjPubah}(h]h ]h"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]uh1j{ hjOhM)hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjsubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM+hjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM*hjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM0hjubh)}(hVDrivers can use this function for BGR888 devices that don't natively support XRGB8888.h]hXDrivers can use this function for BGR888 devices that don’t natively support XRGB8888.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM3hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_xrgb8888_to_argb8888 (C function)c.drm_fb_xrgb8888_to_argb8888hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_argb8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_argb8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMJubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhj@hMJubj )}(hdrm_fb_xrgb8888_to_argb8888h]j )}(hdrm_fb_xrgb8888_to_argb8888h]hdrm_fb_xrgb8888_to_argb8888}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhj@hMJubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjUsbc.drm_fb_xrgb8888_to_argb8888asbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjkubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj4hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hj h]hstruct}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjVubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjVubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjlubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjlubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubeh}(h]h ]h"]h$]h&]j j uh1jhj.hhhj@hMJubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj*hhhj@hMJubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j hj@hMJhj'hhubj )}(hhh]h)}(h(Convert XRGB8888 to ARGB8888 clip bufferh]h(Convert XRGB8888 to ARGB8888 clip buffer}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMJhjyhhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj@hMJubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hXx**Parameters** ``struct iosys_map *dst`` Array of ARGB8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMNhjubjw )}(hhh](j| )}(h@``struct iosys_map *dst`` Array of ARGB8888 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMKhjubj )}(hhh]h)}(h%Array of ARGB8888 destination buffersh]h%Array of ARGB8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMKhjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMMhjubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMLhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMMhjubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hjBh]hconst struct iosys_map *src}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMNhj<ubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMNhjXubah}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hjWhMNhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hj{h]h const struct drm_framebuffer *fb}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.c/hMOhjuubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMOhjubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjhMOhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMPhjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMPhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMPhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMQhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMQhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj(h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMShjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hj>hhhNhNubj3 )}(h**dst**h]hdst}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubh, }(hj>hhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubh and }(hj>hhhNhNubj3 )}(h**src**h]hsrc}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj>hhhNhNubj3 )}(h**fb**h]hfb}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMRhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMXhjubh)}(hDrivers can use this function for ARGB8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ARGB8888 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM[hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_xrgb8888_to_abgr8888 (C function)c.drm_fb_xrgb8888_to_abgr8888hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_abgr8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_abgr8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMrubj )}(hdrm_fb_xrgb8888_to_abgr8888h]j )}(hdrm_fb_xrgb8888_to_abgr8888h]hdrm_fb_xrgb8888_to_abgr8888}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMrubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjnhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j\c.drm_fb_xrgb8888_to_abgr8888asbuh1hhj ubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjrhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j\c.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j\c.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j\c.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMrubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMrubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMrhjhhubj )}(hhh]h)}(h(Convert XRGB8888 to ABGR8888 clip bufferh]h(Convert XRGB8888 to ABGR8888 clip buffer}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrhj,hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMrubeh}(h]h ](j functioneh"]h$]h&]j" j j# jGj$ jGj% j& j' uh1j hhhjhNhNubj) )}(hXx**Parameters** ``struct iosys_map *dst`` Array of ABGR8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ABGR8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j3 )}(hjQh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMvhjKubjw )}(hhh](j| )}(h@``struct iosys_map *dst`` Array of ABGR8888 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjph]hstruct iosys_map *dst}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMshjjubj )}(hhh]h)}(h%Array of ABGR8888 destination buffersh]h%Array of ABGR8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMshjubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMshjgubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMuhjubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMthjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMuhjgubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMvhjubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMvhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMvhjgubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hj.h]h const struct drm_framebuffer *fb}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMwhj(ubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMwhjDubah}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hjChMwhjgubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjgh]hconst struct drm_rect *clip}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMxhjaubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMxhj}ubah}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hj|hMxhjgubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMyhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMyhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMyhjgubeh}(h]h ]h"]h$]h&]uh1jv hjKubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM{hjKubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMzhjKubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjHhhhNhNubj3 )}(h**dst**h]hdst}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubh2 (i.e. the destination is at the top-left corner).}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjKubh)}(hDrivers can use this function for ABGR8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ABGR8888 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjKubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_xrgb8888_to_xbgr8888 (C function)c.drm_fb_xrgb8888_to_xbgr8888hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_xbgr8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_xbgr8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_xbgr8888h]j )}(hdrm_fb_xrgb8888_to_xbgr8888h]hdrm_fb_xrgb8888_to_xbgr8888}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj!hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj)}(hunsignedh]hunsigned}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjCubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjGubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj;hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj]ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h(Convert XRGB8888 to XBGR8888 clip bufferh]h(Convert XRGB8888 to XBGR8888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hX=**Parameters** ``struct iosys_map *dst`` Array of XBGR8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for XBGR8888 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjw )}(hhh](j| )}(h@``struct iosys_map *dst`` Array of XBGR8888 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hj#h]hstruct iosys_map *dst}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h%Array of XBGR8888 destination buffersh]h%Array of XBGR8888 destination buffers}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj9ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj8hMhjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hj\h]hconst unsigned int *dst_pitch}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjVubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjuhhhNhNubj3 )}(h**dst**h]hdst}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubh9; can be NULL if scanlines are stored next to each other.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMhjubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj0ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj/hMhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjSh]h#struct drm_format_conv_state *state}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjMubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjhhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXDrivers can use this function for XBGR8888 devices that don't support XRGB8888 natively.h]hZDrivers can use this function for XBGR8888 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_xrgb8888_to_bgrx8888 (C function)c.drm_fb_xrgb8888_to_bgrx8888hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_bgrx8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_bgrx8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGhhhjYhMubj )}(hdrm_fb_xrgb8888_to_bgrx8888h]j )}(hdrm_fb_xrgb8888_to_bgrx8888h]hdrm_fb_xrgb8888_to_bgrx8888}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhjYhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjnsbc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjoubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjchhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj^hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjGhhhjYhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjChhhjYhMubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j hjYhMhj@hhubj )}(hhh]h)}(h(Convert XRGB8888 to BGRX8888 clip bufferh]h(Convert XRGB8888 to BGRX8888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj@hhhjYhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hX=**Parameters** ``struct iosys_map *dst`` Array of BGRX8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for BGRX8888 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjw )}(hhh](j| )}(h@``struct iosys_map *dst`` Array of BGRX8888 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h%Array of BGRX8888 destination buffersh]h%Array of BGRX8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj(hhhNhNubj3 )}(h**dst**h]hdst}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(ubh9; can be NULL if scanlines are stored next to each other.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMhjubj| )}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hj[h]hconst struct iosys_map *src}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjUubj )}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjqubah}(h]h ]h"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]uh1j{ hjphMhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjAh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjWhhhNhNubj3 )}(h**dst**h]hdst}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubh, }(hjWhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubh and }(hjWhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjWhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXDrivers can use this function for BGRX8888 devices that don't support XRGB8888 natively.h]hZDrivers can use this function for BGRX8888 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_fb_xrgb8888_to_xrgb2101010 (C function) c.drm_fb_xrgb8888_to_xrgb2101010hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_xrgb2101010 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_xrgb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_fb_xrgb8888_to_xrgb2101010h]j )}(hdrm_fb_xrgb8888_to_xrgb2101010h]hdrm_fb_xrgb8888_to_xrgb2101010}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]j%)}jj!sb c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhj7ubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj7ubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(hj h]hstruct}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]ju c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhj"ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"ubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]ju c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]ju c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhj8ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]ju c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj hMhjhhubj )}(hhh]h)}(h+Convert XRGB8888 to XRGB2101010 clip bufferh]h+Convert XRGB8888 to XRGB2101010 clip buffer}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjEhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j`j$ j`j% j& j' uh1j hhhjhNhNubj) )}(hXt**Parameters** ``struct iosys_map *dst`` Array of XRGB2101010 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for XRGB2101010 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j3 )}(hjjh]h Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjhubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjdubjw )}(hhh](j| )}(hC``struct iosys_map *dst`` Array of XRGB2101010 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h(Array of XRGB2101010 destination buffersh]h(Array of XRGB2101010 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj$ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj#hMhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjGh]h const struct drm_framebuffer *fb}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjAubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj]ubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hj\hMhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjzubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjdubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjdubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hj hhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh, }(hj hhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh and }(hj hhhNhNubj3 )}(h**src**h]hsrc}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj hhhNhNubj3 )}(h**fb**h]hfb}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjdubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjahhhNhNubj3 )}(h**dst**h]hdst}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubh2 (i.e. the destination is at the top-left corner).}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjdubh)}(h[Drivers can use this function for XRGB2101010 devices that don't support XRGB8888 natively.h]h]Drivers can use this function for XRGB2101010 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_fb_xrgb8888_to_argb2101010 (C function) c.drm_fb_xrgb8888_to_argb2101010hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_argb2101010 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_argb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_argb2101010h]j )}(hdrm_fb_xrgb8888_to_argb2101010h]hdrm_fb_xrgb8888_to_argb2101010}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj)}(hunsignedh]hunsigned}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj\ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j( c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j( c.drm_fb_xrgb8888_to_argb2101010asbuh1hhj`ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj`ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j( c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjThhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j( c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjvubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h+Convert XRGB8888 to ARGB2101010 clip bufferh]h+Convert XRGB8888 to ARGB2101010 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hXD**Parameters** ``struct iosys_map *dst`` Array of ARGB2101010 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB2101010 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjw )}(hhh](j| )}(hC``struct iosys_map *dst`` Array of ARGB2101010 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hj<h]hstruct iosys_map *dst}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj6ubj )}(hhh]h)}(h(Array of ARGB2101010 destination buffersh]h(Array of ARGB2101010 destination buffers}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMhjRubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hjQhMhj3ubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjuh]hconst unsigned int *dst_pitch}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjoubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj3ubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj3ubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj3ubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hj3h]hconst struct drm_rect *clip}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj-ubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjIubah}(h]h ]h"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]uh1j{ hjHhMhj3ubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjlh]h#struct drm_format_conv_state *state}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM hjfubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hj3ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM"hjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM!hjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM'hjubh)}(h[Drivers can use this function for ARGB2101010 devices that don't support XRGB8888 natively.h]h]Drivers can use this function for ARGB2101010 devices that don’t support XRGB8888 natively.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM*hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_fb_xrgb8888_to_gray8 (C function)c.drm_fb_xrgb8888_to_gray8hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_gray8 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_gray8(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMBubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhjrhMBubj )}(hdrm_fb_xrgb8888_to_gray8h]j )}(hdrm_fb_xrgb8888_to_gray8h]hdrm_fb_xrgb8888_to_gray8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhhjrhMBubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray8asbuh1hhj)ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjOh]h*}(hjwhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj`hhhjrhMBubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj\hhhjrhMBubah}(h]jWah ](j j eh"]h$]h&]j j )j huh1j hjrhMBhjYhhubj )}(hhh]h)}(hConvert XRGB8888 to grayscaleh]hConvert XRGB8888 to grayscale}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMBhjhhubah}(h]h ]h"]h$]h&]uh1j hjYhhhjrhMBubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct iosys_map *dst`` Array of 8-bit grayscale destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). DRM doesn't have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don't support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMFhjubjw )}(hhh](j| )}(hG``struct iosys_map *dst`` Array of 8-bit grayscale destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMChjubj )}(hhh]h)}(h,Array of 8-bit grayscale destination buffersh]h,Array of 8-bit grayscale destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMChjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hj(h]hconst unsigned int *dst_pitch}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMEhj"ubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjAhhhNhNubj3 )}(h**dst**h]hdst}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjAubh9; can be NULL if scanlines are stored next to each other.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMDhj>ubah}(h]h ]h"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]uh1j{ hj=hMEhjubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjth]hconst struct iosys_map *src}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMFhjnubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1j{ hjhMFhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMGhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMGhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMHhjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMHhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMHhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMIhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMIhj5ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj4hMIhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjZh]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMKhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjphhhNhNubj3 )}(h**dst**h]hdst}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubh, }(hjphhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubh and }(hjphhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjphhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMJhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMPhjubh)}(hXDRM doesn't have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don't support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.h]hXDRM doesn’t have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don’t support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMShjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_fb_argb8888_to_argb4444 (C function)c.drm_fb_argb8888_to_argb4444hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_argb8888_to_argb4444 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_argb8888_to_argb4444(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMnubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj%hMnubj )}(hdrm_fb_argb8888_to_argb4444h]j )}(hdrm_fb_argb8888_to_argb4444h]hdrm_fb_argb8888_to_argb4444}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj%hMnubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]j%)}jj:sbc.drm_fb_argb8888_to_argb4444asbuh1hhjPubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjPubj )}(hdsth]hdst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h dst_pitchh]h dst_pitch}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhj;ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhjQubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjQubj )}(hcliph]hclip}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_argb8888_to_argb4444asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj%hMnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj%hMnubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj%hMnhj hhubj )}(hhh]h)}(h(Convert ARGB8888 to ARGB4444 clip bufferh]h(Convert ARGB8888 to ARGB4444 clip buffer}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMnhj^hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj%hMnubeh}(h]h ](j functioneh"]h$]h&]j" j j# jyj$ jyj% j& j' uh1j hhhjhNhNubj) )}(hX=**Parameters** ``struct iosys_map *dst`` Array of ARGB4444 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of ARGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB4444 devices that don't support ARGB8888 natively.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrhj}ubjw )}(hhh](j| )}(h@``struct iosys_map *dst`` Array of ARGB4444 destination buffers h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMohjubj )}(hhh]h)}(h%Array of ARGB4444 destination buffersh]h%Array of ARGB4444 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMohjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMohjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMqhjubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMphjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMqhjubj| )}(h@``const struct iosys_map *src`` Array of ARGB8888 source buffer h](j )}(h``const struct iosys_map *src``h]j )}(hj'h]hconst struct iosys_map *src}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMrhj!ubj )}(hhh]h)}(hArray of ARGB8888 source bufferh]hArray of ARGB8888 source buffer}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMrhj=ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMrhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hj`h]h const struct drm_framebuffer *fb}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMshjZubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMshjvubah}(h]h ]h"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMshjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMthjubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMthjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMthjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMuhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMuhjubeh}(h]h ]h"]h$]h&]uh1jv hj}ubh)}(h**Description**h]j3 )}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMwhj}ubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hj#hhhNhNubj3 )}(h**dst**h]hdst}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubh, }(hj#hhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubh and }(hj#hhhNhNubj3 )}(h**src**h]hsrc}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj#hhhNhNubj3 )}(h**fb**h]hfb}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMvhj}ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjzhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubh2 (i.e. the destination is at the top-left corner).}(hjzhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM|hj}ubh)}(hXDrivers can use this function for ARGB4444 devices that don't support ARGB8888 natively.h]hZDrivers can use this function for ARGB4444 devices that don’t support ARGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_fb_xrgb8888_to_mono (C function)c.drm_fb_xrgb8888_to_monohNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_mono (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_mono(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_monoh]j )}(hdrm_fb_xrgb8888_to_monoh]hdrm_fb_xrgb8888_to_mono}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjShhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjuubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]jAc.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jAc.drm_fb_xrgb8888_to_monoasbuh1hhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjyubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjCmodnameN classnameNj j )}j ]jAc.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jAc.drm_fb_xrgb8888_to_monoasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hConvert XRGB8888 to monochromeh]hConvert XRGB8888 to monochrome}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j,j$ j,j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct iosys_map *dst`` Array of monochrome destination buffers (0=black, 1=white) ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle. DRM doesn't have native monochrome support. Drivers can use this function for monochrome devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. This function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.h](h)}(h**Parameters**h]j3 )}(hj6h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj0ubjw )}(hhh](j| )}(hU``struct iosys_map *dst`` Array of monochrome destination buffers (0=black, 1=white) h](j )}(h``struct iosys_map *dst``h]j )}(hjUh]hstruct iosys_map *dst}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjOubj )}(hhh]h)}(h:Array of monochrome destination buffers (0=black, 1=white)h]h:Array of monochrome destination buffers (0=black, 1=white)}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjkubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMhjLubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjLubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjLubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj)ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hMhjLubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hjLh]hconst struct drm_rect *clip}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjFubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjbubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1j{ hjahMhjLubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjLubeh}(h]h ]h"]h$]h&]uh1jv hj0ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj0ubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj3 )}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, }(hjhhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj3 )}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj0ubh)}(hXThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.h](h)This function does not apply clipping on }(hj-hhhNhNubj3 )}(h**dst**h]hdst}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-ubhX (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj0ubh)}(hXDRM doesn't have native monochrome support. Drivers can use this function for monochrome devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h]hX DRM doesn’t have native monochrome support. Drivers can use this function for monochrome devices that don’t support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj0ubh)}(hThis function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.h]hThis function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_fb_xrgb8888_to_gray2 (C function)c.drm_fb_xrgb8888_to_gray2hNtauh1j hjhhhNhNubj )}(hhh](j )}(hvoid drm_fb_xrgb8888_to_gray2 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j )}(hvoid drm_fb_xrgb8888_to_gray2(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_fb_xrgb8888_to_gray2h]j )}(hdrm_fb_xrgb8888_to_gray2h]hdrm_fb_xrgb8888_to_gray2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsth]hdst}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst unsigned int *dst_pitchh](j )}(hjch]hconst}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj)}(hunsignedh]hunsigned}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj)}(hinth]hint}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj7ubj )}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct iosys_map *srch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hsrch]hsrc}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const struct drm_framebuffer *fbh](j )}(hjch]hconst}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhj;ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_rect *cliph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcliph]hclip}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_format_conv_state *stateh](j )}(hj h]hstruct}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjQubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjQubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hConvert XRGB8888 to gray2h]hConvert XRGB8888 to gray2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hXu**Parameters** ``struct iosys_map *dst`` Array of gray2 destination buffer ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle. DRM doesn't have native gray2 support. Drivers can use this function for gray2 devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubjw )}(hhh](j| )}(h<``struct iosys_map *dst`` Array of gray2 destination buffer h](j )}(h``struct iosys_map *dst``h]j )}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h!Array of gray2 destination bufferh]h!Array of gray2 destination buffer}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj-ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj,hMhjubj| )}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](j )}(h!``const unsigned int *dst_pitch``h]j )}(hjPh]hconst unsigned int *dst_pitch}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjJubj )}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjihhhNhNubj3 )}(h**dst**h]hdst}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubh9; can be NULL if scanlines are stored next to each other.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjfubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hjehMhjubj| )}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](j )}(h``const struct iosys_map *src``h]j )}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](j )}(h$``const struct drm_framebuffer *fb``h]j )}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubj )}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](j )}(h``const struct drm_rect *clip``h]j )}(hj h]hconst struct drm_rect *clip}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhj ubj )}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj# hMhj$ ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj# hMhjubj| )}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](j )}(h'``struct drm_format_conv_state *state``h]j )}(hjG h]h#struct drm_format_conv_state *state}(hjI hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjE ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjA ubj )}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\ hMhj] ubah}(h]h ]h"]h$]h&]uh1j hjA ubeh}(h]h ]h"]h$]h&]uh1j{ hj\ hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hj hhhNhNubj3 )}(h**dst**h]hdst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh, }(hj hhhNhNubj3 )}(h **dst_pitch**h]h dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh and }(hj hhhNhNubj3 )}(h**src**h]hsrc}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj hhhNhNubj3 )}(h**fb**h]hfb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.h](h)This function does not apply clipping on }(hj hhhNhNubj3 )}(h**dst**h]hdst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubhX (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hDRM doesn't have native gray2 support. Drivers can use this function for gray2 devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h]hXDRM doesn’t have native gray2 support. Drivers can use this function for gray2 devices that don’t support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:124: ./drivers/gpu/drm/drm_format_helper.chM$hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubeh}(h]jah ]h"]!format helper functions referenceah$]h&]uh1hhhhhhhhKzubh)}(hhh](h)}(h*Framebuffer DMA Helper Functions Referenceh]h*Framebuffer DMA Helper Functions Reference}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj- hhhhhKubh)}(hDProvides helper functions for creating a DMA-contiguous framebuffer.h]hDProvides helper functions for creating a DMA-contiguous framebuffer.}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:130: ./drivers/gpu/drm/drm_fb_dma_helper.chKhj- hhubh)}(hX+Depending on the platform, the buffers may be physically non-contiguous and mapped through an IOMMU or a similar mechanism, or allocated from physically-contiguous memory (using, for instance, CMA or a pool of memory reserved at early boot). This is handled behind the scenes by the DMA mapping API.h]hX+Depending on the platform, the buffers may be physically non-contiguous and mapped through an IOMMU or a similar mechanism, or allocated from physically-contiguous memory (using, for instance, CMA or a pool of memory reserved at early boot). This is handled behind the scenes by the DMA mapping API.}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:130: ./drivers/gpu/drm/drm_fb_dma_helper.chKhj- hhubh)}(hdrm_gem_fb_create() is used in the :c:type:`drm_mode_config_funcs.fb_create ` callback function to create a DMA-contiguous framebuffer.h](h#drm_gem_fb_create() is used in the }(hj\ hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]j )}(hjf h]hdrm_mode_config_funcs.fb_create}(hjh hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjd ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:130: ./drivers/gpu/drm/drm_fb_dma_helper.chK"hj\ ubh: callback function to create a DMA-contiguous framebuffer.}(hj\ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hK"hj- hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_fb_dma_get_gem_obj (C function)c.drm_fb_dma_get_gem_objhNtauh1j hj- hhhNhNubj )}(hhh](j )}(hcstruct drm_gem_dma_object * drm_fb_dma_get_gem_obj (struct drm_framebuffer *fb, unsigned int plane)h]j )}(hastruct drm_gem_dma_object *drm_fb_dma_get_gem_obj(struct drm_framebuffer *fb, unsigned int plane)h](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK)ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hK)ubh)}(hhh]j )}(hdrm_gem_dma_objecth]hdrm_gem_dma_object}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jdrm_fb_dma_get_gem_objsbc.drm_fb_dma_get_gem_objasbuh1hhj hhhj hK)ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hK)ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj hhhj hK)ubj )}(hdrm_fb_dma_get_gem_objh]j )}(hj h]hdrm_fb_dma_get_gem_obj}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hK)ubj)}(h0(struct drm_framebuffer *fb, unsigned int plane)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj! hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj. hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj? hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj< ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjA modnameN classnameNj j )}j ]j c.drm_fb_dma_get_gem_objasbuh1hhj ubj )}(h h]h }(hj] hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjk hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hfbh]hfb}(hjx hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hplaneh]hplane}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hK)ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hK)ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj hK)hj hhubj )}(hhh]h)}(h"Get DMA GEM object for framebufferh]h"Get DMA GEM object for framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK)hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hK)ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj- hNhNubj) )}(h**Parameters** ``struct drm_framebuffer *fb`` The framebuffer ``unsigned int plane`` Which plane **Description** Return the DMA GEM object for given framebuffer. This function will usually be called from the CRTC callback functions.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK-hj ubjw )}(hhh](j| )}(h/``struct drm_framebuffer *fb`` The framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hj4 h]hstruct drm_framebuffer *fb}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2 ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK*hj. ubj )}(hhh]h)}(hThe framebufferh]hThe framebuffer}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI hK*hjJ ubah}(h]h ]h"]h$]h&]uh1j hj. ubeh}(h]h ]h"]h$]h&]uh1j{ hjI hK*hj+ ubj| )}(h#``unsigned int plane`` Which plane h](j )}(h``unsigned int plane``h]j )}(hjm h]hunsigned int plane}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjk ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK+hjg ubj )}(hhh]h)}(h Which planeh]h Which plane}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK+hj ubah}(h]h ]h"]h$]h&]uh1j hjg ubeh}(h]h ]h"]h$]h&]uh1j{ hj hK+hj+ ubeh}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK-hj ubh)}(h0Return the DMA GEM object for given framebuffer.h]h0Return the DMA GEM object for given framebuffer.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK,hj ubh)}(hFThis function will usually be called from the CRTC callback functions.h]hFThis function will usually be called from the CRTC callback functions.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK.hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj- hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_fb_dma_get_gem_addr (C function)c.drm_fb_dma_get_gem_addrhNtauh1j hj- hhhNhNubj )}(hhh](j )}(hrdma_addr_t drm_fb_dma_get_gem_addr (struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h]j )}(hqdma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h](h)}(hhh]j )}(h dma_addr_th]h dma_addr_t}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jdrm_fb_dma_get_gem_addrsbc.drm_fb_dma_get_gem_addrasbuh1hhj hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK?ubj )}(h h]h }(hj! hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hK?ubj )}(hdrm_fb_dma_get_gem_addrh]j )}(hj h]hdrm_fb_dma_get_gem_addr}(hj3 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hK?ubj)}(hO(struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjN hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ ubj )}(h h]h }(hj[ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjl hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjn modnameN classnameNj j )}j ]j c.drm_fb_dma_get_gem_addrasbuh1hhjJ ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJ ubj )}(hfbh]hfb}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjF ubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j c.drm_fb_dma_get_gem_addrasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjF ubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj)}(hinth]hint}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(hplaneh]hplane}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjF ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hK?ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hK?ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj hK?hj hhubj )}(hhh]h)}(hGet DMA (bus) address for framebuffer, for pixel formats where values are grouped in blocks this will get you the beginning of the blockh]hGet DMA (bus) address for framebuffer, for pixel formats where values are grouped in blocks this will get you the beginning of the block}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chK?hjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hK?ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj- hNhNubj) )}(hX2**Parameters** ``struct drm_framebuffer *fb`` The framebuffer ``struct drm_plane_state *state`` Which state of drm plane ``unsigned int plane`` Which plane Return the DMA GEM address for given framebuffer. **Description** This function will usually be called from the PLANE callback functions.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKChjubjw )}(hhh](j| )}(h/``struct drm_framebuffer *fb`` The framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKBhjubj )}(hhh]h)}(hThe framebufferh]hThe framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKBhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKBhjubj| )}(h;``struct drm_plane_state *state`` Which state of drm plane h](j )}(h!``struct drm_plane_state *state``h]j )}(hj h]hstruct drm_plane_state *state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKChjubj )}(hhh]h)}(hWhich state of drm planeh]hWhich state of drm plane}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKChj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKChjubj| )}(hU``unsigned int plane`` Which plane Return the DMA GEM address for given framebuffer. h](j )}(h``unsigned int plane``h]j )}(hjCh]hunsigned int plane}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKEhj=ubj )}(hhh]h)}(h=Which plane Return the DMA GEM address for given framebuffer.h]h=Which plane Return the DMA GEM address for given framebuffer.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKDhjYubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hjXhKEhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKGhjubh)}(hGThis function will usually be called from the PLANE callback functions.h]hGThis function will usually be called from the PLANE callback functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKFhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj- hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_fb_dma_sync_non_coherent (C function)c.drm_fb_dma_sync_non_coherenthNtauh1j hj- hhhNhNubj )}(hhh](j )}(h|void drm_fb_dma_sync_non_coherent (struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h]j )}(h{void drm_fb_dma_sync_non_coherent(struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKpubj )}(hdrm_fb_dma_sync_non_coherenth]j )}(hdrm_fb_dma_sync_non_coherenth]hdrm_fb_dma_sync_non_coherent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKpubj)}(hZ(struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h](j)}(hstruct drm_device *drmh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_dma_sync_non_coherentasbuh1hhjubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjMhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdrmh]hdrm}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!struct drm_plane_state *old_stateh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j;c.drm_fb_dma_sync_non_coherentasbuh1hhjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjoubj )}(h old_stateh]h old_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_plane_state *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j;c.drm_fb_dma_sync_non_coherentasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKpubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKpubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKphjhhubj )}(hhh]h)}(h.Sync GEM object to non-coherent backing memoryh]h.Sync GEM object to non-coherent backing memory}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKphjahhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKpubeh}(h]h ](j functioneh"]h$]h&]j" j j# j|j$ j|j% j& j' uh1j hhhj- hNhNubj) )}(hX**Parameters** ``struct drm_device *drm`` DRM device ``struct drm_plane_state *old_state`` Old plane state ``struct drm_plane_state *state`` New plane state **Description** This function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane's .atomic_update ensures that all the data in the backing memory have been written to RAM.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKthjubjw )}(hhh](j| )}(h&``struct drm_device *drm`` DRM device h](j )}(h``struct drm_device *drm``h]j )}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKrhjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKrhjubj| )}(h6``struct drm_plane_state *old_state`` Old plane state h](j )}(h%``struct drm_plane_state *old_state``h]j )}(hjh]h!struct drm_plane_state *old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKshjubj )}(hhh]h)}(hOld plane stateh]hOld plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKshjubj| )}(h2``struct drm_plane_state *state`` New plane state h](j )}(h!``struct drm_plane_state *state``h]j )}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKthjubj )}(hhh]h)}(hNew plane stateh]hNew plane state}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKthj-ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj,hKthjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjRh]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjPubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKvhjubh)}(hThis function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane's .atomic_update ensures that all the data in the backing memory have been written to RAM.h]hThis function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane’s .atomic_update ensures that all the data in the backing memory have been written to RAM.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKuhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj- hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_fb_dma_get_scanout_buffer (C function)c.drm_fb_dma_get_scanout_bufferhNtauh1j hj- hhhNhNubj )}(hhh](j )}(hZint drm_fb_dma_get_scanout_buffer (struct drm_plane *plane, struct drm_scanout_buffer *sb)h]j )}(hYint drm_fb_dma_get_scanout_buffer(struct drm_plane *plane, struct drm_scanout_buffer *sb)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_fb_dma_get_scanout_bufferh]j )}(hdrm_fb_dma_get_scanout_bufferh]hdrm_fb_dma_get_scanout_buffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h8(struct drm_plane *plane, struct drm_scanout_buffer *sb)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_fb_dma_get_scanout_bufferasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hplaneh]hplane}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_scanout_buffer *sbh](j )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(hdrm_scanout_bufferh]hdrm_scanout_buffer}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]jc.drm_fb_dma_get_scanout_bufferasbuh1hhjBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjBubj )}(hsbh]hsb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(h)Provide a scanout buffer in case of panich]h)Provide a scanout buffer in case of panic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj- hNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` DRM primary plane ``struct drm_scanout_buffer *sb`` scanout buffer for the panic handler **Return** 0 or negative error code **Description** Generic get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won't call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won't get displayed.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubjw )}(hhh](j| )}(h.``struct drm_plane *plane`` DRM primary plane h](j )}(h``struct drm_plane *plane``h]j )}(hjh]hstruct drm_plane *plane}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubj )}(hhh]h)}(hDRM primary planeh]hDRM primary plane}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(hG``struct drm_scanout_buffer *sb`` scanout buffer for the panic handler h](j )}(h!``struct drm_scanout_buffer *sb``h]j )}(hjAh]hstruct drm_scanout_buffer *sb}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhj;ubj )}(hhh]h)}(h$scanout buffer for the panic handlerh]h$scanout buffer for the panic handler}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhKhjWubah}(h]h ]h"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]uh1j{ hjVhKhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hj|h]hReturn}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(h0 or negative error codeh]h0 or negative error code}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(hGeneric get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won't call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won't get displayed.h]hGeneric get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won’t call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won’t get displayed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:133: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj- hhhNhNubeh}(h]jah ]h"]*framebuffer dma helper functions referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h Framebuffer GEM Helper Referenceh]h Framebuffer GEM Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hj7uh1hhjhhhhhKubh)}(hThis library provides helpers for drivers that don't subclass :c:type:`drm_framebuffer` and use :c:type:`drm_gem_object` for their backing storage.h](h@This library provides helpers for drivers that don’t subclass }(hjhhhNhNubh)}(h:c:type:`drm_framebuffer`h]j )}(hjh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:139: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK!hjubh and use }(hjhhhNhNubh)}(h:c:type:`drm_gem_object`h]j )}(hjh]hdrm_gem_object}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_gem_objectuh1hhjhK!hjubh for their backing storage.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK!hjhhubh)}(hDrivers without additional needs to validate framebuffers can simply use drm_gem_fb_create() and everything is wired up automatically. Other drivers can use all parts independently.h]hDrivers without additional needs to validate framebuffers can simply use drm_gem_fb_create() and everything is wired up automatically. Other drivers can use all parts independently.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:139: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK$hjhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_gem_fb_get_obj (C function)c.drm_gem_fb_get_objhNtauh1j hjhhhNhNubj )}(hhh](j )}(h[struct drm_gem_object * drm_gem_fb_get_obj (struct drm_framebuffer *fb, unsigned int plane)h]j )}(hYstruct drm_gem_object *drm_gem_fb_get_obj(struct drm_framebuffer *fb, unsigned int plane)h](j )}(hj h]hstruct}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK,ubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhjqhK,ubh)}(hhh]j )}(hdrm_gem_objecth]hdrm_gem_object}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_gem_fb_get_objsbc.drm_gem_fb_get_objasbuh1hhj`hhhjqhK,ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhjqhK,ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj`hhhjqhK,ubj )}(hdrm_gem_fb_get_objh]j )}(hjh]hdrm_gem_fb_get_obj}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhhjqhK,ubj)}(h0(struct drm_framebuffer *fb, unsigned int plane)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_gem_fb_get_objasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj)}(hinth]hint}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj`hhhjqhK,ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj\hhhjqhK,ubah}(h]jWah ](j j eh"]h$]h&]j j )j huh1j hjqhK,hjYhhubj )}(hhh]h)}(h&Get GEM object backing the framebufferh]h&Get GEM object backing the framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK,hjhhubah}(h]h ]h"]h$]h&]uh1j hjYhhhjqhK,ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hXN**Parameters** ``struct drm_framebuffer *fb`` Framebuffer ``unsigned int plane`` Plane index **Description** No additional reference is taken beyond the one that the :c:type:`drm_frambuffer` already holds. **Return** Pointer to :c:type:`drm_gem_object` for the given framebuffer and plane index or NULL if it does not exist.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK0hjubjw )}(hhh](j| )}(h+``struct drm_framebuffer *fb`` Framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK-hjubj )}(hhh]h)}(h Framebufferh]h Framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK-hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhK-hjubj| )}(h#``unsigned int plane`` Plane index h](j )}(h``unsigned int plane``h]j )}(hj*h]hunsigned int plane}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK.hj$ubj )}(hhh]h)}(h Plane indexh]h Plane index}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hK.hj@ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hK.hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjeh]h Description}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK0hjubh)}(h`No additional reference is taken beyond the one that the :c:type:`drm_frambuffer` already holds.h](h9No additional reference is taken beyond the one that the }(hj{hhhNhNubh)}(h:c:type:`drm_frambuffer`h]j )}(hjh]hdrm_frambuffer}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_frambufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK/hj{ubh already holds.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK/hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK2hjubh)}(hkPointer to :c:type:`drm_gem_object` for the given framebuffer and plane index or NULL if it does not exist.h](h Pointer to }(hjhhhNhNubh)}(h:c:type:`drm_gem_object`h]j )}(hjh]hdrm_gem_object}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_gem_objectuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK3hjubhH for the given framebuffer and plane index or NULL if it does not exist.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK3hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_gem_fb_destroy (C function)c.drm_gem_fb_destroyhNtauh1j hjhhhNhNubj )}(hhh](j )}(h4void drm_gem_fb_destroy (struct drm_framebuffer *fb)h]j )}(h3void drm_gem_fb_destroy(struct drm_framebuffer *fb)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK]ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj%hK]ubj )}(hdrm_gem_fb_destroyh]j )}(hdrm_gem_fb_destroyh]hdrm_gem_fb_destroy}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj%hK]ubj)}(h(struct drm_framebuffer *fb)h]j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]j%)}jj:sbc.drm_gem_fb_destroyasbuh1hhjPubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjPubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj%hK]ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj%hK]ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj%hK]hj hhubj )}(hhh]h)}(hFree GEM backed framebufferh]hFree GEM backed framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK]hjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj%hK]ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hX **Parameters** ``struct drm_framebuffer *fb`` Framebuffer **Description** Frees a GEM backed framebuffer with its backing buffer(s) and the structure itself. Drivers can use this as their :c:type:`drm_framebuffer_funcs->destroy ` callback.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKahjubjw )}(hhh]j| )}(h+``struct drm_framebuffer *fb`` Framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK^hjubj )}(hhh]h)}(h Framebufferh]h Framebuffer}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hK^hj.ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj-hK^hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjSh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK`hjubh)}(hFrees a GEM backed framebuffer with its backing buffer(s) and the structure itself. Drivers can use this as their :c:type:`drm_framebuffer_funcs->destroy ` callback.h](hrFrees a GEM backed framebuffer with its backing buffer(s) and the structure itself. Drivers can use this as their }(hjihhhNhNubh)}(h@:c:type:`drm_framebuffer_funcs->destroy `h]j )}(hjsh]hdrm_framebuffer_funcs->destroy}(hjuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK_hjiubh callback.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK_hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_gem_fb_create_handle (C function)c.drm_gem_fb_create_handlehNtauh1j hjhhhNhNubj )}(hhh](j )}(hfint drm_gem_fb_create_handle (struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h]j )}(heint drm_gem_fb_create_handle(struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKqubj )}(hdrm_gem_fb_create_handleh]j )}(hdrm_gem_fb_create_handleh]hdrm_gem_fb_create_handle}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKqubj)}(hI(struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_gem_fb_create_handleasbuh1hhjubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfbh]hfb}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j2c.drm_gem_fb_create_handleasbuh1hhjfubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjfubj )}(hfileh]hfile}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int *handleh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hhandleh]hhandle}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKqubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKqhjhhubj )}(hhh]h)}(h(Create handle for GEM backed framebufferh]h(Create handle for GEM backed framebuffer}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKqhjFhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKqubeh}(h]h ](j functioneh"]h$]h&]j" j j# jaj$ jaj% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_framebuffer *fb`` Framebuffer ``struct drm_file *file`` DRM file to register the handle for ``unsigned int *handle`` Pointer to return the created handle **Description** This function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their :c:type:`drm_framebuffer_funcs->create_handle ` callback. The GETFB IOCTL calls into this callback. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjkh]h Parameters}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKuhjeubjw )}(hhh](j| )}(h+``struct drm_framebuffer *fb`` Framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKrhjubj )}(hhh]h)}(h Framebufferh]h Framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKrhjubj| )}(h>``struct drm_file *file`` DRM file to register the handle for h](j )}(h``struct drm_file *file``h]j )}(hjh]hstruct drm_file *file}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKshjubj )}(hhh]h)}(h#DRM file to register the handle forh]h#DRM file to register the handle for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKshjubj| )}(h>``unsigned int *handle`` Pointer to return the created handle h](j )}(h``unsigned int *handle``h]j )}(hjh]hunsigned int *handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKthjubj )}(hhh]h)}(h$Pointer to return the created handleh]h$Pointer to return the created handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKthjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKthjubeh}(h]h ]h"]h$]h&]uh1jv hjeubh)}(h**Description**h]j3 )}(hj7h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKvhjeubh)}(hThis function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their :c:type:`drm_framebuffer_funcs->create_handle ` callback. The GETFB IOCTL calls into this callback.h](hiThis function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their }(hjMhhhNhNubh)}(hF:c:type:`drm_framebuffer_funcs->create_handle `h]j )}(hjWh]h$drm_framebuffer_funcs->create_handle}(hjYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKuhjMubh4 callback. The GETFB IOCTL calls into this callback.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjthKuhjeubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKyhjeubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKzhjeubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_gem_fb_init_with_funcs (C function)c.drm_gem_fb_init_with_funcshNtauh1j hjhhhNhNubj )}(hhh](j )}(hint drm_gem_fb_init_with_funcs (struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h]j )}(hint drm_gem_fb_init_with_funcs(struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_gem_fb_init_with_funcsh]j )}(hdrm_gem_fb_init_with_funcsh]hdrm_gem_fb_init_with_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j%)}jjsbc.drm_gem_fb_init_with_funcsasbuh1hhjubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjOhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j=c.drm_gem_fb_init_with_funcsasbuh1hhjqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjqubj )}(hfbh]hfb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j=c.drm_gem_fb_init_with_funcsasbuh1hhjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfileh]hfile}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h"const struct drm_format_info *infoh](j )}(hjch]hconst}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j=c.drm_gem_fb_init_with_funcsasbuh1hhjQubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjQubj )}(hinfoh]hinfo}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j=c.drm_gem_fb_init_with_funcsasbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmode_cmdh]hmode_cmd}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h)const struct drm_framebuffer_funcs *funcsh](j )}(hjch]hconst}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(hdrm_framebuffer_funcsh]hdrm_framebuffer_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j=c.drm_gem_fb_init_with_funcsasbuh1hhjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjgubj )}(hfuncsh]hfuncs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(hHelper function for implementing :c:type:`drm_mode_config_funcs.fb_create ` callback in cases when the driver allocates a subclass of struct drm_framebufferh](h!Helper function for implementing }(hj hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]j )}(hj h]hdrm_mode_config_funcs.fb_create}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j=c.drm_gem_fb_init_with_funcsasbj drm_mode_config_funcsuh1hhjqhK,hj ubhQ callback in cases when the driver allocates a subclass of struct drm_framebuffer}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jG j$ jG j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_framebuffer *fb`` framebuffer object ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object **Description** This function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting. **Return** Zero or a negative error code.h](h)}(h**Parameters**h]j3 )}(hjQ h]h Parameters}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjO ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjK ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjp h]hstruct drm_device *dev}(hjr hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjn ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjj ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j hjj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKhjg ubj| )}(h2``struct drm_framebuffer *fb`` framebuffer object h](j )}(h``struct drm_framebuffer *fb``h]j )}(hj h]hstruct drm_framebuffer *fb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj ubj )}(hhh]h)}(hframebuffer objecth]hframebuffer object}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKhjg ubj| )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j )}(h``struct drm_file *file``h]j )}(hj h]hstruct drm_file *file}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj ubj )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKhjg ubj| )}(h@``const struct drm_format_info *info`` pixel format information h](j )}(h&``const struct drm_format_info *info``h]j )}(hj!h]h"const struct drm_format_info *info}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj!ubj )}(hhh]h)}(hpixel format informationh]hpixel format information}(hj4!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0!hKhj1!ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj0!hKhjg ubj| )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]j )}(hjT!h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hjV!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjR!ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjN!ubj )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hjm!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhji!hKhjj!ubah}(h]h ]h"]h$]h&]uh1j hjN!ubeh}(h]h ]h"]h$]h&]uh1j{ hji!hKhjg ubj| )}(h_``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object h](j )}(h-``const struct drm_framebuffer_funcs *funcs``h]j )}(hj!h]h)const struct drm_framebuffer_funcs *funcs}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj!ubj )}(hhh]h)}(h0vtable to be used for the new framebuffer objecth]h0vtable to be used for the new framebuffer object}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj!ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj!hKhjg ubeh}(h]h ]h"]h$]h&]uh1jv hjK ubh)}(h**Description**h]j3 )}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjK ubh)}(hXThis function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting.h](h!This function can be used to set }(hj!hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]j )}(hj!h]hdrm_framebuffer_funcs}(hj!hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj!ubhk for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don’t need to change }(hj!hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]j )}(hj "h]hdrm_framebuffer_funcs}(hj"hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj "ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhj"hKhj!ubh. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"hKhjK ubh)}(h **Return**h]j3 )}(hj5"h]hReturn}(hj7"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3"ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjK ubh)}(hZero or a negative error code.h]hZero or a negative error code.}(hjK"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjK ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_gem_fb_create_with_funcs (C function)c.drm_gem_fb_create_with_funcshNtauh1j hjhhhNhNubj )}(hhh](j )}(hstruct drm_framebuffer * drm_gem_fb_create_with_funcs (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h]j )}(hstruct drm_framebuffer *drm_gem_fb_create_with_funcs(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j )}(hj h]hstruct}(hjz"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv"hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv"hhhj"hKubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]j%)}jdrm_gem_fb_create_with_funcssbc.drm_gem_fb_create_with_funcsasbuh1hhjv"hhhj"hKubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv"hhhj"hKubj9)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjv"hhhj"hKubj )}(hdrm_gem_fb_create_with_funcsh]j )}(hj"h]hdrm_gem_fb_create_with_funcs}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjv"hhhj"hKubj)}(h(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j"c.drm_gem_fb_create_with_funcsasbuh1hhj"ubj )}(h h]h }(hj0#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj9)}(hjOh]h*}(hj>#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"ubj )}(hdevh]hdev}(hjK#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hjd#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`#ubj )}(h h]h }(hjq#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`#ubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j"c.drm_gem_fb_create_with_funcsasbuh1hhj`#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`#ubj9)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj`#ubj )}(hfileh]hfile}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(h"const struct drm_format_info *infoh](j )}(hjch]hconst}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hj h]hstruct}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hj $hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj $ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j"c.drm_gem_fb_create_with_funcsasbuh1hhj#ubj )}(h h]h }(hj+$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj9)}(hjOh]h*}(hj9$hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj#ubj )}(hinfoh]hinfo}(hjF$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjch]hconst}(hj_$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[$ubj )}(h h]h }(hjl$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[$ubj )}(hj h]hstruct}(hjz$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[$ubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j"c.drm_gem_fb_create_with_funcsasbuh1hhj[$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[$ubj9)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj[$ubj )}(hmode_cmdh]hmode_cmd}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(h)const struct drm_framebuffer_funcs *funcsh](j )}(hjch]hconst}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubh)}(hhh]j )}(hdrm_framebuffer_funcsh]hdrm_framebuffer_funcs}(hj#%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%%modnameN classnameNj j )}j ]j"c.drm_gem_fb_create_with_funcsasbuh1hhj$ubj )}(h h]h }(hjA%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubj9)}(hjOh]h*}(hjO%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj$ubj )}(hfuncsh]hfuncs}(hj\%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubeh}(h]h ]h"]h$]h&]j j uh1jhjv"hhhj"hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjr"hhhj"hKubah}(h]jm"ah ](j j eh"]h$]h&]j j )j huh1j hj"hKhjo"hhubj )}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hj%hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]j )}(hj%h]hdrm_mode_config_funcs.fb_create}(hj%hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j"c.drm_gem_fb_create_with_funcsasbj drm_mode_config_funcsuh1hhjqhK,hj%ubh callback}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj%hhubah}(h]h ]h"]h$]h&]uh1j hjo"hhhj"hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j%j$ j%j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object **Description** This function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j3 )}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj%ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj%h]hstruct drm_device *dev}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj%ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKhj&ubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hKhj%ubj| )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j )}(h``struct drm_file *file``h]j )}(hj(&h]hstruct drm_file *file}(hj*&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&&ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj"&ubj )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hjA&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=&hKhj>&ubah}(h]h ]h"]h$]h&]uh1j hj"&ubeh}(h]h ]h"]h$]h&]uh1j{ hj=&hKhj%ubj| )}(h@``const struct drm_format_info *info`` pixel format information h](j )}(h&``const struct drm_format_info *info``h]j )}(hja&h]h"const struct drm_format_info *info}(hjc&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_&ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj[&ubj )}(hhh]h)}(hpixel format informationh]hpixel format information}(hjz&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjv&hKhjw&ubah}(h]h ]h"]h$]h&]uh1j hj[&ubeh}(h]h ]h"]h$]h&]uh1j{ hjv&hKhj%ubj| )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]j )}(hj&h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj&ubj )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKhj&ubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hKhj%ubj| )}(h_``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object h](j )}(h-``const struct drm_framebuffer_funcs *funcs``h]j )}(hj&h]h)const struct drm_framebuffer_funcs *funcs}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj&ubj )}(hhh]h)}(h0vtable to be used for the new framebuffer objecth]h0vtable to be used for the new framebuffer object}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKhj&ubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hKhj%ubeh}(h]h ]h"]h$]h&]uh1jv hj%ubh)}(h**Description**h]j3 )}(hj'h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj 'ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj%ubh)}(hThis function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation.h](h!This function can be used to set }(hj$'hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]j )}(hj.'h]hdrm_framebuffer_funcs}(hj0'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj,'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj$'ubhk for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don’t need to change }(hj$'hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]j )}(hjR'h]hdrm_framebuffer_funcs}(hjT'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjP'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebuffer_funcsuh1hhjK'hKhj$'ubh+. The function does buffer size validation.}(hj$'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjK'hKhj%ubh)}(h **Return**h]j3 )}(hj{'h]hReturn}(hj}'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjy'ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj%ubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hj'hhhNhNubh)}(h:c:type:`drm_framebuffer`h]j )}(hj'h]hdrm_framebuffer}(hj'hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj'ubh+ on success or an error pointer on failure.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hKhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_gem_fb_create (C function)c.drm_gem_fb_createhNtauh1j hjhhhNhNubj )}(hhh](j )}(hstruct drm_framebuffer * drm_gem_fb_create (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h]j )}(hstruct drm_framebuffer *drm_gem_fb_create(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j )}(hj h]hstruct}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhj'hMubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j%)}jdrm_gem_fb_createsbc.drm_gem_fb_createasbuh1hhj'hhhj'hMubj )}(h h]h }(hj#(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'hhhj'hMubj9)}(hjOh]h*}(hj1(hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj'hhhj'hMubj )}(hdrm_gem_fb_createh]j )}(hj (h]hdrm_gem_fb_create}(hjB(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>(ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'hhhj'hMubj)}(h|(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj](hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY(ubj )}(h h]h }(hjj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY(ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj{(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjx(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}(modnameN classnameNj j )}j ]j(c.drm_gem_fb_createasbuh1hhjY(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY(ubj9)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjY(ubj )}(hdevh]hdev}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjU(ubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(modnameN classnameNj j )}j ]j(c.drm_gem_fb_createasbuh1hhj(ubj )}(h h]h }(hj )hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj9)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj(ubj )}(hfileh]hfile}(hj$)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjU(ubj)}(h"const struct drm_format_info *infoh](j )}(hjch]hconst}(hj=)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9)ubj )}(h h]h }(hjJ)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9)ubj )}(hj h]hstruct}(hjX)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9)ubj )}(h h]h }(hje)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9)ubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjv)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjx)modnameN classnameNj j )}j ]j(c.drm_gem_fb_createasbuh1hhj9)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9)ubj9)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj9)ubj )}(hinfoh]hinfo}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjU(ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjch]hconst}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j(c.drm_gem_fb_createasbuh1hhj)ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjOh]h*}(hj-*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj )}(hmode_cmdh]hmode_cmd}(hj:*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjU(ubeh}(h]h ]h"]h$]h&]j j uh1jhj'hhhj'hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj'hhhj'hMubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j hj'hMhj'hhubj )}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hjd*hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]j )}(hjn*h]hdrm_mode_config_funcs.fb_create}(hjp*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjl*ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j(c.drm_gem_fb_createasbj drm_mode_config_funcsuh1hhjqhK,hjd*ubh callback}(hjd*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhja*hhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj'hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j*j$ j*j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request **Description** This function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. If your hardware has special alignment or pitch requirements these should be checked before calling this function. The function does buffer size validation. Use drm_gem_fb_create_with_dirty() if you need framebuffer flushing. Drivers can use this as their :c:type:`drm_mode_config_funcs.fb_create ` callback. The ADDFB2 IOCTL calls into this callback. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j3 )}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hj*ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj*h]hstruct drm_device *dev}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj*ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hj*hMhj*ubj| )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j )}(h``struct drm_file *file``h]j )}(hj+h]hstruct drm_file *file}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj+ubj )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]uh1j{ hj+hMhj*ubj| )}(h@``const struct drm_format_info *info`` pixel format information h](j )}(h&``const struct drm_format_info *info``h]j )}(hj?+h]h"const struct drm_format_info *info}(hjA+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=+ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hj9+ubj )}(hhh]h)}(hpixel format informationh]hpixel format information}(hjX+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT+hM hjU+ubah}(h]h ]h"]h$]h&]uh1j hj9+ubeh}(h]h ]h"]h$]h&]uh1j{ hjT+hM hj*ubj| )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]j )}(hjx+h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hjz+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjv+ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hjr+ubj )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hM hj+ubah}(h]h ]h"]h$]h&]uh1j hjr+ubeh}(h]h ]h"]h$]h&]uh1j{ hj+hM hj*ubeh}(h]h ]h"]h$]h&]uh1jv hj*ubh)}(h**Description**h]j3 )}(hj+h]h Description}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hj*ubh)}(hThis function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer.h](h` callback. The ADDFB2 IOCTL calls into this callback.h](hDrivers can use this as their }(hj ,hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]j )}(hj,h]hdrm_mode_config_funcs.fb_create}(hj,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj ,ubh5 callback. The ADDFB2 IOCTL calls into this callback.}(hj ,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1,hMhj*ubh)}(h **Return**h]j3 )}(hj>,h]hReturn}(hj@,hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<,ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj*ubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hjT,hhhNhNubh)}(h:c:type:`drm_framebuffer`h]j )}(hj^,h]hdrm_framebuffer}(hj`,hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj\,ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjT,ubh+ on success or an error pointer on failure.}(hjT,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{,hMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_gem_fb_create_with_dirty (C function)c.drm_gem_fb_create_with_dirtyhNtauh1j hjhhhNhNubj )}(hhh](j )}(hstruct drm_framebuffer * drm_gem_fb_create_with_dirty (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h]j )}(hstruct drm_framebuffer *drm_gem_fb_create_with_dirty(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj,hM,ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j%)}jdrm_gem_fb_create_with_dirtysbc.drm_gem_fb_create_with_dirtyasbuh1hhj,hhhj,hM,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj,hM,ubj9)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj,hhhj,hM,ubj )}(hdrm_gem_fb_create_with_dirtyh]j )}(hj,h]hdrm_gem_fb_create_with_dirty}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj,hM,ubj)}(h|(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj -hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hj--hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj>-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@-modnameN classnameNj j )}j ]j,c.drm_gem_fb_create_with_dirtyasbuh1hhj-ubj )}(h h]h }(hj\-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj9)}(hjOh]h*}(hjj-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj-ubj )}(hdevh]hdev}(hjw-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubj)}(hstruct drm_file *fileh](j )}(hj h]hstruct}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubh)}(hhh]j )}(hdrm_fileh]hdrm_file}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]j,c.drm_gem_fb_create_with_dirtyasbuh1hhj-ubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj9)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj-ubj )}(hfileh]hfile}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubj)}(h"const struct drm_format_info *infoh](j )}(hjch]hconst}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hj .hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(hj h]hstruct}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj )}(h h]h }(hj(.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hj9.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;.modnameN classnameNj j )}j ]j,c.drm_gem_fb_create_with_dirtyasbuh1hhj-ubj )}(h h]h }(hjW.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubj9)}(hjOh]h*}(hje.hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj-ubj )}(hinfoh]hinfo}(hjr.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjch]hconst}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(hj h]hstruct}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j,c.drm_gem_fb_create_with_dirtyasbuh1hhj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj9)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj.ubj )}(hmode_cmdh]hmode_cmd}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj-ubeh}(h]h ]h"]h$]h&]j j uh1jhj,hhhj,hM,ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj,hhhj,hM,ubah}(h]j,ah ](j j eh"]h$]h&]j j )j huh1j hj,hM,hj,hhubj )}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hj'/hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]j )}(hj1/h]hdrm_mode_config_funcs.fb_create}(hj3/hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj//ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j,c.drm_gem_fb_create_with_dirtyasbj drm_mode_config_funcsuh1hhjqhK,hj'/ubh callback}(hj'/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM,hj$/hhubah}(h]h ]h"]h$]h&]uh1j hj,hhhj,hM,ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jg/j$ jg/j% j& j' uh1j hhhjhNhNubj) )}(hXU**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request **Description** This function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. drm_atomic_helper_dirtyfb() is used for the dirty callback giving framebuffer flushing through the atomic machinery. Use drm_gem_fb_create() if you don't need the dirty callback. The function does buffer size validation. Drivers should also call drm_plane_enable_fb_damage_clips() on all planes to enable userspace to use damage clips also with the ATOMIC IOCTL. Drivers can use this as their :c:type:`drm_mode_config_funcs.fb_create ` callback. The ADDFB2 IOCTL calls into this callback. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j3 )}(hjq/h]h Parameters}(hjs/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjo/ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM0hjk/ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj/h]hstruct drm_device *dev}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM.hj/ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM.hj/ubah}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hj/hM.hj/ubj| )}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](j )}(h``struct drm_file *file``h]j )}(hj/h]hstruct drm_file *file}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM/hj/ubj )}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM/hj/ubah}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hj/hM/hj/ubj| )}(h@``const struct drm_format_info *info`` pixel format information h](j )}(h&``const struct drm_format_info *info``h]j )}(hj0h]h"const struct drm_format_info *info}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM0hj/ubj )}(hhh]h)}(hpixel format informationh]hpixel format information}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM0hj0ubah}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hj0hM0hj/ubj| )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]j )}(hj;0h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj=0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj90ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM1hj50ubj )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hjT0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjP0hM1hjQ0ubah}(h]h ]h"]h$]h&]uh1j hj50ubeh}(h]h ]h"]h$]h&]uh1j{ hjP0hM1hj/ubeh}(h]h ]h"]h$]h&]uh1jv hjk/ubh)}(h**Description**h]j3 )}(hjv0h]h Description}(hjx0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjt0ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM3hjk/ubh)}(hXThis function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. drm_atomic_helper_dirtyfb() is used for the dirty callback giving framebuffer flushing through the atomic machinery. Use drm_gem_fb_create() if you don't need the dirty callback. The function does buffer size validation.h](h` callback. The ADDFB2 IOCTL calls into this callback.h](hDrivers can use this as their }(hj0hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]j )}(hj0h]hdrm_mode_config_funcs.fb_create}(hj0hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM<hj0ubh5 callback. The ADDFB2 IOCTL calls into this callback.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj0hM<hjk/ubh)}(h **Return**h]j3 )}(hj1h]hReturn}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM?hjk/ubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hj1hhhNhNubh)}(h:c:type:`drm_framebuffer`h]j )}(hj!1h]hdrm_framebuffer}(hj#1hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM@hj1ubh+ on success or an error pointer on failure.}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>1hM@hjk/ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_gem_fb_vmap (C function)c.drm_gem_fb_vmaphNtauh1j hjhhhNhNubj )}(hhh](j )}(h_int drm_gem_fb_vmap (struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h]j )}(h^int drm_gem_fb_vmap(struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h](j)}(hinth]hint}(hji1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje1hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNubj )}(h h]h }(hjx1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hje1hhhjw1hMNubj )}(hdrm_gem_fb_vmaph]j )}(hdrm_gem_fb_vmaph]hdrm_gem_fb_vmap}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ](j j eh"]h$]h&]j j uh1j hje1hhhjw1hMNubj)}(hK(struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j%)}jj1sbc.drm_gem_fb_vmapasbuh1hhj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj1ubj )}(hfbh]hfb}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(hstruct iosys_map *maph](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj%2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj62hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj32ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj82modnameN classnameNj j )}j ]j1c.drm_gem_fb_vmapasbuh1hhj2ubj )}(h h]h }(hjT2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj9)}(hjOh]h*}(hjb2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj2ubj )}(hmaph]hmap}(hjo2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(hstruct iosys_map *datah](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2modnameN classnameNj j )}j ]j1c.drm_gem_fb_vmapasbuh1hhj2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj9)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj2ubj )}(hdatah]hdata}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhje1hhhjw1hMNubeh}(h]h ]h"]h$]h&]j j j uh1j j j hja1hhhjw1hMNubah}(h]j\1ah ](j j eh"]h$]h&]j j )j huh1j hjw1hMNhj^1hhubj )}(hhh]h)}(h2maps all framebuffer BOs into kernel address spaceh]h2maps all framebuffer BOs into kernel address space}(hj 3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNhj3hhubah}(h]h ]h"]h$]h&]uh1j hj^1hhhjw1hMNubeh}(h]h ](j functioneh"]h$]h&]j" j j# j!3j$ j!3j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``struct iosys_map *map`` returns the mapping's address for each BO ``struct iosys_map *data`` returns the data address for each BO, can be NULL **Description** This function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically. Callers that want to access a BO's stored data should pass **data**. The argument returns the addresses of the data stored in each BO. This is different from **map** if the framebuffer's offsets field is non-zero. Both, **map** and **data**, must each refer to arrays with at least fb->format->num_planes elements. See drm_gem_fb_vunmap() for unmapping. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hj+3h]h Parameters}(hj-3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)3ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMRhj%3ubjw )}(hhh](j| )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjJ3h]hstruct drm_framebuffer *fb}(hjL3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjH3ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMOhjD3ubj )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hjc3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_3hMOhj`3ubah}(h]h ]h"]h$]h&]uh1j hjD3ubeh}(h]h ]h"]h$]h&]uh1j{ hj_3hMOhjA3ubj| )}(hD``struct iosys_map *map`` returns the mapping's address for each BO h](j )}(h``struct iosys_map *map``h]j )}(hj3h]hstruct iosys_map *map}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMPhj}3ubj )}(hhh]h)}(h)returns the mapping's address for each BOh]h+returns the mapping’s address for each BO}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMPhj3ubah}(h]h ]h"]h$]h&]uh1j hj}3ubeh}(h]h ]h"]h$]h&]uh1j{ hj3hMPhjA3ubj| )}(hM``struct iosys_map *data`` returns the data address for each BO, can be NULL h](j )}(h``struct iosys_map *data``h]j )}(hj3h]hstruct iosys_map *data}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMQhj3ubj )}(hhh]h)}(h1returns the data address for each BO, can be NULLh]h1returns the data address for each BO, can be NULL}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMQhj3ubah}(h]h ]h"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]uh1j{ hj3hMQhjA3ubeh}(h]h ]h"]h$]h&]uh1jv hj%3ubh)}(h**Description**h]j3 )}(hj3h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMShj%3ubh)}(hThis function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically.h]hThis function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically.}(hj 4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMRhj%3ubh)}(hCallers that want to access a BO's stored data should pass **data**. The argument returns the addresses of the data stored in each BO. This is different from **map** if the framebuffer's offsets field is non-zero.h](h=Callers that want to access a BO’s stored data should pass }(hj4hhhNhNubj3 )}(h**data**h]hdata}(hj$4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubh[. The argument returns the addresses of the data stored in each BO. This is different from }(hj4hhhNhNubj3 )}(h**map**h]hmap}(hj64hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubh2 if the framebuffer’s offsets field is non-zero.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMWhj%3ubh)}(hdBoth, **map** and **data**, must each refer to arrays with at least fb->format->num_planes elements.h](hBoth, }(hjO4hhhNhNubj3 )}(h**map**h]hmap}(hjW4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjO4ubh and }(hjO4hhhNhNubj3 )}(h**data**h]hdata}(hji4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjO4ubhJ, must each refer to arrays with at least fb->format->num_planes elements.}(hjO4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM[hj%3ubh)}(h&See drm_gem_fb_vunmap() for unmapping.h]h&See drm_gem_fb_vunmap() for unmapping.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM^hj%3ubh)}(h **Return**h]j3 )}(hj4h]hReturn}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM`hj%3ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMahj%3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_gem_fb_vunmap (C function)c.drm_gem_fb_vunmaphNtauh1j hjhhhNhNubj )}(hhh](j )}(hJvoid drm_gem_fb_vunmap (struct drm_framebuffer *fb, struct iosys_map *map)h]j )}(hIvoid drm_gem_fb_vunmap(struct drm_framebuffer *fb, struct iosys_map *map)h](j)}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4hhhj4hMubj )}(hdrm_gem_fb_vunmaph]j )}(hdrm_gem_fb_vunmaph]hdrm_gem_fb_vunmap}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj4hhhj4hMubj)}(h3(struct drm_framebuffer *fb, struct iosys_map *map)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hj"5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj35hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj05ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj55modnameN classnameNj j )}j ]j%)}jj4sbc.drm_gem_fb_vunmapasbuh1hhj5ubj )}(h h]h }(hjS5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj9)}(hjOh]h*}(hja5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj5ubj )}(hfbh]hfb}(hjn5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj 5ubj)}(hstruct iosys_map *maph](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]jO5c.drm_gem_fb_vunmapasbuh1hhj5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj9)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj5ubj )}(hmaph]hmap}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj 5ubeh}(h]h ]h"]h$]h&]j j uh1jhj4hhhj4hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj4hhhj4hMubah}(h]j4ah ](j j eh"]h$]h&]j j )j huh1j hj4hMhj4hhubj )}(hhh]h)}(h0unmaps framebuffer BOs from kernel address spaceh]h0unmaps framebuffer BOs from kernel address space}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj6hhubah}(h]h ]h"]h$]h&]uh1j hj4hhhj4hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j 6j$ j 6j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``struct iosys_map *map`` mapping addresses as returned by drm_gem_fb_vmap() **Description** This function unmaps all buffer objects of the given framebuffer. See drm_gem_fb_vmap() for more information.h](h)}(h**Parameters**h]j3 )}(hj*6h]h Parameters}(hj,6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(6ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj$6ubjw )}(hhh](j| )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjI6h]hstruct drm_framebuffer *fb}(hjK6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjG6ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjC6ubj )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hjb6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^6hMhj_6ubah}(h]h ]h"]h$]h&]uh1j hjC6ubeh}(h]h ]h"]h$]h&]uh1j{ hj^6hMhj@6ubj| )}(hM``struct iosys_map *map`` mapping addresses as returned by drm_gem_fb_vmap() h](j )}(h``struct iosys_map *map``h]j )}(hj6h]hstruct iosys_map *map}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj|6ubj )}(hhh]h)}(h2mapping addresses as returned by drm_gem_fb_vmap()h]h2mapping addresses as returned by drm_gem_fb_vmap()}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1j hj|6ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMhj@6ubeh}(h]h ]h"]h$]h&]uh1jv hj$6ubh)}(h**Description**h]j3 )}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj$6ubh)}(hAThis function unmaps all buffer objects of the given framebuffer.h]hAThis function unmaps all buffer objects of the given framebuffer.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj$6ubh)}(h+See drm_gem_fb_vmap() for more information.h]h+See drm_gem_fb_vmap() for more information.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj$6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_gem_fb_begin_cpu_access (C function)c.drm_gem_fb_begin_cpu_accesshNtauh1j hjhhhNhNubj )}(hhh](j )}(hYint drm_gem_fb_begin_cpu_access (struct drm_framebuffer *fb, enum dma_data_direction dir)h]j )}(hXint drm_gem_fb_begin_cpu_access(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hinth]hint}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj 7hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hj 7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 7hhhj7hMubj )}(hdrm_gem_fb_begin_cpu_accessh]j )}(hdrm_gem_fb_begin_cpu_accessh]hdrm_gem_fb_begin_cpu_access}(hj27hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj 7hhhj7hMubj)}(h9(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hjN7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ7ubj )}(h h]h }(hj[7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ7ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hjl7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjn7modnameN classnameNj j )}j ]j%)}jj47sbc.drm_gem_fb_begin_cpu_accessasbuh1hhjJ7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ7ubj9)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJ7ubj )}(hfbh]hfb}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjF7ubj)}(henum dma_data_direction dirh](j )}(henumh]henum}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubh)}(hhh]j )}(hdma_data_directionh]hdma_data_direction}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j7c.drm_gem_fb_begin_cpu_accessasbuh1hhj7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj )}(hdirh]hdir}(hj 8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjF7ubeh}(h]h ]h"]h$]h&]j j uh1jhj 7hhhj7hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj 7hhhj7hMubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j hj7hMhj7hhubj )}(hhh]h)}(h*prepares GEM buffer objects for CPU accessh]h*prepares GEM buffer objects for CPU access}(hj58hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj28hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhj7hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jM8j$ jM8j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``enum dma_data_direction dir`` access mode **Description** Prepares a framebuffer's GEM buffer objects for CPU access. This function must be called before accessing the BO data within the kernel. For imported BOs, the function calls dma_buf_begin_cpu_access(). See drm_gem_fb_end_cpu_access() for signalling the end of CPU access. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hjW8h]h Parameters}(hjY8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjU8ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjQ8ubjw )}(hhh](j| )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjv8h]hstruct drm_framebuffer *fb}(hjx8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjt8ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjp8ubj )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1j hjp8ubeh}(h]h ]h"]h$]h&]uh1j{ hj8hMhjm8ubj| )}(h,``enum dma_data_direction dir`` access mode h](j )}(h``enum dma_data_direction dir``h]j )}(hj8h]henum dma_data_direction dir}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj8ubj )}(hhh]h)}(h access modeh]h access mode}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hj8hMhjm8ubeh}(h]h ]h"]h$]h&]uh1jv hjQ8ubh)}(h**Description**h]j3 )}(hj8h]h Description}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj8ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjQ8ubh)}(hPrepares a framebuffer's GEM buffer objects for CPU access. This function must be called before accessing the BO data within the kernel. For imported BOs, the function calls dma_buf_begin_cpu_access().h]hPrepares a framebuffer’s GEM buffer objects for CPU access. This function must be called before accessing the BO data within the kernel. For imported BOs, the function calls dma_buf_begin_cpu_access().}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjQ8ubh)}(hESee drm_gem_fb_end_cpu_access() for signalling the end of CPU access.h]hESee drm_gem_fb_end_cpu_access() for signalling the end of CPU access.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjQ8ubh)}(h **Return**h]j3 )}(hj 9h]hReturn}(hj"9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjQ8ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj69hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjQ8ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_gem_fb_end_cpu_access (C function)c.drm_gem_fb_end_cpu_accesshNtauh1j hjhhhNhNubj )}(hhh](j )}(hXvoid drm_gem_fb_end_cpu_access (struct drm_framebuffer *fb, enum dma_data_direction dir)h]j )}(hWvoid drm_gem_fb_end_cpu_access(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hvoidh]hvoid}(hje9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja9hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj )}(h h]h }(hjt9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hja9hhhjs9hMubj )}(hdrm_gem_fb_end_cpu_accessh]j )}(hdrm_gem_fb_end_cpu_accessh]hdrm_gem_fb_end_cpu_access}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ](j j eh"]h$]h&]j j uh1j hja9hhhjs9hMubj)}(h9(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]j%)}jj9sbc.drm_gem_fb_end_cpu_accessasbuh1hhj9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj9)}(hjOh]h*}(hj9hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj9ubj )}(hfbh]hfb}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubj)}(henum dma_data_direction dirh](j )}(hj7h]henum}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hj!:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(hdma_data_directionh]hdma_data_direction}(hj2:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4:modnameN classnameNj j )}j ]j9c.drm_gem_fb_end_cpu_accessasbuh1hhj:ubj )}(h h]h }(hjP:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(hdirh]hdir}(hj^:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubeh}(h]h ]h"]h$]h&]j j uh1jhja9hhhjs9hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj]9hhhjs9hMubah}(h]jX9ah ](j j eh"]h$]h&]j j )j huh1j hjs9hMhjZ9hhubj )}(hhh]h)}(h/signals end of CPU access to GEM buffer objectsh]h/signals end of CPU access to GEM buffer objects}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj:hhubah}(h]h ]h"]h$]h&]uh1j hjZ9hhhjs9hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j:j$ j:j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``enum dma_data_direction dir`` access mode **Description** Signals the end of CPU access to the given framebuffer's GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access(). See also drm_gem_fb_begin_cpu_access().h](h)}(h**Parameters**h]j3 )}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj:ubjw )}(hhh](j| )}(h/``struct drm_framebuffer *fb`` the framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hj:h]hstruct drm_framebuffer *fb}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj:ubj )}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj:ubah}(h]h ]h"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]uh1j{ hj:hMhj:ubj| )}(h,``enum dma_data_direction dir`` access mode h](j )}(h``enum dma_data_direction dir``h]j )}(hj;h]henum dma_data_direction dir}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj:ubj )}(hhh]h)}(h access modeh]h access mode}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hMhj:ubeh}(h]h ]h"]h$]h&]uh1jv hj:ubh)}(h**Description**h]j3 )}(hj=;h]h Description}(hj?;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;;ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj:ubh)}(hSignals the end of CPU access to the given framebuffer's GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access().h]hSignals the end of CPU access to the given framebuffer’s GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access().}(hjS;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj:ubh)}(h'See also drm_gem_fb_begin_cpu_access().h]h'See also drm_gem_fb_begin_cpu_access().}(hjb;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_gem_fb_afbc_init (C function)c.drm_gem_fb_afbc_inithNtauh1j hjhhhNhNubj )}(hhh](j )}(hint drm_gem_fb_afbc_init (struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h]j )}(hint drm_gem_fb_afbc_init(struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h](j)}(hinth]hint}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMEubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhj;hMEubj )}(hdrm_gem_fb_afbc_inith]j )}(hdrm_gem_fb_afbc_inith]hdrm_gem_fb_afbc_init}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;hhhj;hMEubj)}(h(struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j%)}jj;sbc.drm_gem_fb_afbc_initasbuh1hhj;ubj )}(h h]h }(hj <hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hdevh]hdev}(hj'<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubj)}(h"const struct drm_format_info *infoh](j )}(hjch]hconst}(hj@<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<<ubj )}(h h]h }(hjM<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<<ubj )}(hj h]hstruct}(hj[<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<<ubj )}(h h]h }(hjh<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<<ubh)}(hhh]j )}(hdrm_format_infoh]hdrm_format_info}(hjy<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{<modnameN classnameNj j )}j ]j<c.drm_gem_fb_afbc_initasbuh1hhj<<ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<<ubj9)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj<<ubj )}(hinfoh]hinfo}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j )}(hjch]hconst}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(hj h]hstruct}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubh)}(hhh]j )}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=modnameN classnameNj j )}j ]j<c.drm_gem_fb_afbc_initasbuh1hhj<ubj )}(h h]h }(hj"=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj9)}(hjOh]h*}(hj0=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj<ubj )}(hmode_cmdh]hmode_cmd}(hj==hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubj)}(h$struct drm_afbc_framebuffer *afbc_fbh](j )}(hj h]hstruct}(hjV=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR=ubj )}(h h]h }(hjc=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR=ubh)}(hhh]j )}(hdrm_afbc_framebufferh]hdrm_afbc_framebuffer}(hjt=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjv=modnameN classnameNj j )}j ]j<c.drm_gem_fb_afbc_initasbuh1hhjR=ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR=ubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjR=ubj )}(hafbc_fbh]hafbc_fb}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjR=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubeh}(h]h ]h"]h$]h&]j j uh1jhj;hhhj;hMEubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj;hhhj;hMEubah}(h]j;ah ](j j eh"]h$]h&]j j )j huh1j hj;hMEhj;hhubj )}(hhh]h)}(huHelper function for drivers using afbc to fill and validate all the afbc-specific struct drm_afbc_framebuffer membersh]huHelper function for drivers using afbc to fill and validate all the afbc-specific struct drm_afbc_framebuffer members}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMEhj=hhubah}(h]h ]h"]h$]h&]uh1j hj;hhhj;hMEubeh}(h]h ](j functioneh"]h$]h&]j" j j# j=j$ j=j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` DRM device ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``struct drm_afbc_framebuffer *afbc_fb`` afbc framebuffer **Description** This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller's responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful. **Return** Zero on success or a negative error value on failure.h](h)}(h**Parameters**h]j3 )}(hj=h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMIhj=ubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hj>h]hstruct drm_device *dev}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMIhj>ubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj1>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj->hMIhj.>ubah}(h]h ]h"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]uh1j{ hj->hMIhj>ubj| )}(h@``const struct drm_format_info *info`` pixel format information h](j )}(h&``const struct drm_format_info *info``h]j )}(hjQ>h]h"const struct drm_format_info *info}(hjS>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjO>ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMKhjK>ubj )}(hhh]h)}(hpixel format informationh]hpixel format information}(hjj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjf>hMKhjg>ubah}(h]h ]h"]h$]h&]uh1j hjK>ubeh}(h]h ]h"]h$]h&]uh1j{ hjf>hMKhj>ubj| )}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](j )}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]j )}(hj>h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMLhj>ubj )}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMLhj>ubah}(h]h ]h"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMLhj>ubj| )}(h:``struct drm_afbc_framebuffer *afbc_fb`` afbc framebuffer h](j )}(h(``struct drm_afbc_framebuffer *afbc_fb``h]j )}(hj>h]h$struct drm_afbc_framebuffer *afbc_fb}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMMhj>ubj )}(hhh]h)}(hafbc framebufferh]hafbc framebuffer}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMMhj>ubah}(h]h ]h"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMMhj>ubeh}(h]h ]h"]h$]h&]uh1jv hj=ubh)}(h**Description**h]j3 )}(hj>h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMOhj=ubh)}(hX1This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller's responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful.h]hX3This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller’s responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNhj=ubh)}(h **Return**h]j3 )}(hj%?h]hReturn}(hj'?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#?ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMThj=ubh)}(h5Zero on success or a negative error value on failure.h]h5Zero on success or a negative error value on failure.}(hj;?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:142: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMUhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubjB)}(h.. _drm_bridges:h]h}(h]h ]h"]h$]h&]hʌ drm-bridgesuh1jBhKhjhhhhubeh}(h]j=ah ]h"] framebuffer gem helper referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hBridgesh]hBridges}(hjf?hhhNhNubah}(h]h ]h"]h$]h&]hjYuh1hhjc?hhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hjw?hhhNhNubah}(h]h ]h"]h$]h&]hjxuh1hhjt?hhhhhKubh)}(h:c:type:`struct drm_bridge ` represents a device that hangs on to an encoder. These are handy when a regular :c:type:`drm_encoder` entity isn't enough to represent the entire encoder chain.h](h)}(h(:c:type:`struct drm_bridge `h]j )}(hj?h]hstruct drm_bridge}(hj?hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK,hj?ubhQ represents a device that hangs on to an encoder. These are handy when a regular }(hj?hhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hj?h]h drm_encoder}(hj?hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hhj?hK,hj?ubh= entity isn’t enough to represent the entire encoder chain.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hK,hjt?hhubh)}(hA bridge is always attached to a single :c:type:`drm_encoder` at a time, but can be either connected to it directly, or through a chain of bridges::h](h(A bridge is always attached to a single }(hj?hhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hj?h]h drm_encoder}(hj?hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK0hj?ubhV at a time, but can be either connected to it directly, or through a chain of bridges:}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hK0hjt?hhubjN )}(h1[ CRTC ---> ] Encoder ---> Bridge A ---> Bridge Bh]h1[ CRTC ---> ] Encoder ---> Bridge A ---> Bridge B}hj@sbah}(h]h ]h"]h$]h&]j j uh1jM ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK3hjt?hhubh)}(hXHere, the output of the encoder feeds to bridge A, and that furthers feeds to bridge B. Bridge chains can be arbitrarily long, and shall be fully linear: Chaining multiple bridges to the output of a bridge, or the same bridge to the output of different bridges, is not supported.h]hXHere, the output of the encoder feeds to bridge A, and that furthers feeds to bridge B. Bridge chains can be arbitrarily long, and shall be fully linear: Chaining multiple bridges to the output of a bridge, or the same bridge to the output of different bridges, is not supported.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK5hjt?hhubh)}(hX :c:type:`drm_bridge`, like :c:type:`drm_panel`, aren't :c:type:`drm_mode_object` entities like planes, CRTCs, encoders or connectors and hence are not visible to userspace. They just provide additional hooks to get the desired output at the end of the encoder chain.h](h)}(h:c:type:`drm_bridge`h]j )}(hj,@h]h drm_bridge}(hj.@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj*@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:153: ./drivers/gpu/drm/drm_bridge.chK:hj&@ubh, like }(hj&@hhhNhNubh)}(h:c:type:`drm_panel`h]j )}(hjP@h]h drm_panel}(hjR@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjN@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_paneluh1hhjI@hK:hj&@ubh , aren’t }(hj&@hhhNhNubh)}(h:c:type:`drm_mode_object`h]j )}(hjs@h]hdrm_mode_object}(hju@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjq@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_objectuh1hhjI@hK:hj&@ubh entities like planes, CRTCs, encoders or connectors and hence are not visible to userspace. They just provide additional hooks to get the desired output at the end of the encoder chain.}(hj&@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjI@hK:hjt?hhubeh}(h]j~ah ]h"]h$]jCah&]uh1hhjc?hhhhhKjCKubh)}(hhh](h)}(hDisplay Driver Integrationh]hDisplay Driver Integration}(hj@hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj@hhhhhKubh)}(hXDisplay drivers are responsible for linking encoders with the first bridge in the chains. This is done by acquiring the appropriate bridge with devm_drm_of_get_bridge(). Once acquired, the bridge shall be attached to the encoder with a call to drm_bridge_attach().h]hXDisplay drivers are responsible for linking encoders with the first bridge in the chains. This is done by acquiring the appropriate bridge with devm_drm_of_get_bridge(). Once acquired, the bridge shall be attached to the encoder with a call to drm_bridge_attach().}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKChj@hhubh)}(hBridges are responsible for linking themselves with the next bridge in the chain, if any. This is done the same way as for encoders, with the call to drm_bridge_attach() occurring in the :c:type:`drm_bridge_funcs.attach ` operation.h](hBridges are responsible for linking themselves with the next bridge in the chain, if any. This is done the same way as for encoders, with the call to drm_bridge_attach() occurring in the }(hj@hhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]j )}(hj@h]hdrm_bridge_funcs.attach}(hj@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKHhj@ubh operation.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@hKHhj@hhubh)}(hX>Once these links are created, the bridges can participate along with encoder functions to perform mode validation and fixup (through drm_bridge_chain_mode_valid() and drm_atomic_bridge_chain_check()), mode setting (through drm_bridge_chain_mode_set()), enable (through drm_atomic_bridge_chain_pre_enable() and drm_atomic_bridge_chain_enable()) and disable (through drm_atomic_bridge_chain_disable() and drm_atomic_bridge_chain_post_disable()). Those functions call the corresponding operations provided in :c:type:`drm_bridge_funcs` in sequence for all bridges in the chain.h](hXOnce these links are created, the bridges can participate along with encoder functions to perform mode validation and fixup (through drm_bridge_chain_mode_valid() and drm_atomic_bridge_chain_check()), mode setting (through drm_bridge_chain_mode_set()), enable (through drm_atomic_bridge_chain_pre_enable() and drm_atomic_bridge_chain_enable()) and disable (through drm_atomic_bridge_chain_disable() and drm_atomic_bridge_chain_post_disable()). Those functions call the corresponding operations provided in }(hj@hhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]j )}(hj@h]hdrm_bridge_funcs}(hj@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKLhj@ubh* in sequence for all bridges in the chain.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhKLhj@hhubh)}(hXFor display drivers that use the atomic helpers drm_atomic_helper_check_modeset(), drm_atomic_helper_commit_modeset_enables() and drm_atomic_helper_commit_modeset_disables() (either directly in hand-rolled commit check and commit tail handlers, or through the higher-level drm_atomic_helper_check() and drm_atomic_helper_commit_tail() or drm_atomic_helper_commit_tail_rpm() helpers), this is done transparently and requires no intervention from the driver. For other drivers, the relevant DRM bridge chain functions shall be called manually.h]hXFor display drivers that use the atomic helpers drm_atomic_helper_check_modeset(), drm_atomic_helper_commit_modeset_enables() and drm_atomic_helper_commit_modeset_disables() (either directly in hand-rolled commit check and commit tail handlers, or through the higher-level drm_atomic_helper_check() and drm_atomic_helper_commit_tail() or drm_atomic_helper_commit_tail_rpm() helpers), this is done transparently and requires no intervention from the driver. For other drivers, the relevant DRM bridge chain functions shall be called manually.}(hj$AhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chKVhj@hhubh)}(hXlBridges also participate in implementing the :c:type:`drm_connector` at the end of the bridge chain. Display drivers may use the drm_bridge_connector_init() helper to create the :c:type:`drm_connector`, or implement it manually on top of the connector-related operations exposed by the bridge (see the overview documentation of bridge operations for more details).h](h-Bridges also participate in implementing the }(hj3AhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hj=Ah]h drm_connector}(hj?AhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj;Aubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:159: ./drivers/gpu/drm/drm_bridge.chK`hj3Aubhn at the end of the bridge chain. Display drivers may use the drm_bridge_connector_init() helper to create the }(hj3AhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjaAh]h drm_connector}(hjcAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj_Aubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjZAhK`hj3Aubh, or implement it manually on top of the connector-related operations exposed by the bridge (see the overview documentation of bridge operations for more details).}(hj3AhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZAhK`hj@hhubeh}(h]jah ]h"]display driver integrationah$]h&]uh1hhjc?hhhhhKubh)}(hhh](h)}(h"Special Care with MIPI-DSI bridgesh]h"Special Care with MIPI-DSI bridges}(hjAhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjAhhhhhKubh)}(hThe interaction between the bridges and other frameworks involved in the probing of the upstream driver and the bridge driver can be challenging. Indeed, there's multiple cases that needs to be considered:h]hThe interaction between the bridges and other frameworks involved in the probing of the upstream driver and the bridge driver can be challenging. Indeed, there’s multiple cases that needs to be considered:}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKjhjAhhubh)}(hhh](h)}(hXThe upstream driver doesn't use the component framework and isn't a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn't probed. h]h)}(hXThe upstream driver doesn't use the component framework and isn't a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn't probed.h]hX The upstream driver doesn’t use the component framework and isn’t a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn’t probed.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKohjAubah}(h]h ]h"]h$]h&]uh1hhjAubh)}(hXThe upstream driver doesn't use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it's assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the :c:type:`mipi_dsi_host_ops.attach ` and :c:type:`mipi_dsi_host_ops.detach ` operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its :c:type:`mipi_dsi_host_ops.attach ` hook. h]h)}(hXThe upstream driver doesn't use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it's assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the :c:type:`mipi_dsi_host_ops.attach ` and :c:type:`mipi_dsi_host_ops.detach ` operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its :c:type:`mipi_dsi_host_ops.attach ` hook.h](hXThe upstream driver doesn’t use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it’s assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the }(hjAhhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.attach `h]j )}(hjAh]hmipi_dsi_host_ops.attach}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKthjAubh and }(hjAhhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.detach `h]j )}(hjAh]hmipi_dsi_host_ops.detach}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hhjAhKthjAubh| operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its }(hjAhhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.attach `h]j )}(hj Bh]hmipi_dsi_host_ops.attach}(hj"BhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hhjAhKthjAubh hook.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhKthjAubah}(h]h ]h"]h$]h&]uh1hhjAubh)}(hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks. h]h)}(hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks.h]hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks.}(hjQBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjMBubah}(h]h ]h"]h$]h&]uh1hhjAubh)}(hXXThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there's no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe. h]h)}(hXWThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there's no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe.h]hXYThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there’s no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe.}(hjjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjfBubah}(h]h ]h"]h$]h&]uh1hhjAubeh}(h]h ]h"]h$]h&]jNj<uh1hhjAhKohjAhhubh)}(hThe ideal pattern to cover the last item (and all the others in the MIPI-DSI host driver case) is to split the operations like this:h]hThe ideal pattern to cover the last item (and all the others in the MIPI-DSI host driver case) is to split the operations like this:}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjAhhubh)}(hhh](h)}(hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver's bind can be called. h]h)}(hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver's bind can be called.h]hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver’s bind can be called.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjBubah}(h]h ]h"]h$]h&]uh1hhjBubh)}(hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional. h]h)}(hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional.h]hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjBubah}(h]h ]h"]h$]h&]uh1hhjBubh)}(hIn its :c:type:`struct mipi_dsi_host_ops `.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it. h]h)}(hIn its :c:type:`struct mipi_dsi_host_ops `.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it.h](hIn its }(hjBhhhNhNubh)}(h6:c:type:`struct mipi_dsi_host_ops `h]j )}(hjBh]hstruct mipi_dsi_host_ops}(hjBhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dsi_host_opsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjBubh.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhKhjBubah}(h]h ]h"]h$]h&]uh1hhjBubeh}(h]h ]h"]h$]h&]jNj<uh1hhjBhKhjAhhubh)}(hAt this point, we're now certain that both the upstream driver and the bridge driver are functional and we can't have a deadlock-like situation when probing.h]hAt this point, we’re now certain that both the upstream driver and the bridge driver are functional and we can’t have a deadlock-like situation when probing.}(hj ChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:165: ./drivers/gpu/drm/drm_bridge.chKhjAhhubeh}(h]jah ]h"]"special care with mipi-dsi bridgesah$]h&]uh1hhjc?hhhhhKubh)}(hhh](h)}(hBridge Operationsh]hBridge Operations}(hj$ChhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj!ChhhhhKubh)}(hX&Bridge drivers expose operations through the :c:type:`drm_bridge_funcs` structure. The DRM internals (atomic and CRTC helpers) use the helpers defined in drm_bridge.c to call bridge operations. Those operations are divided in three big categories to support different parts of the bridge usage.h](h-Bridge drivers expose operations through the }(hj2ChhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]j )}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj:Cubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj2Cubh structure. The DRM internals (atomic and CRTC helpers) use the helpers defined in drm_bridge.c to call bridge operations. Those operations are divided in three big categories to support different parts of the bridge usage.}(hj2ChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYChMhj!Chhubh)}(hhh](h)}(hXfThe encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the :c:type:`drm_encoder_helper_funcs` operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically. The enable and disable operations are split in :c:type:`drm_bridge_funcs.atomic_pre_enable `, :c:type:`drm_bridge_funcs.atomic_enable `, :c:type:`drm_bridge_funcs.atomic_disable ` and :c:type:`drm_bridge_funcs.atomic_post_disable ` to provide finer-grained control. Bridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic\_), in which case they shall also implement the atomic state bookkeeping operations (:c:type:`drm_bridge_funcs.atomic_duplicate_state `, :c:type:`drm_bridge_funcs.atomic_destroy_state ` and :c:type:`drm_bridge_funcs.reset `). Mixing atomic and non-atomic versions of the operations is not supported. h](h)}(hX>The encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the :c:type:`drm_encoder_helper_funcs` operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically.h](hpThe encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the }(hjkChhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]j )}(hjuCh]hdrm_encoder_helper_funcs}(hjwChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjsCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjkCubh operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically.}(hjkChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChMhjgCubh)}(hXQThe enable and disable operations are split in :c:type:`drm_bridge_funcs.atomic_pre_enable `, :c:type:`drm_bridge_funcs.atomic_enable `, :c:type:`drm_bridge_funcs.atomic_disable ` and :c:type:`drm_bridge_funcs.atomic_post_disable ` to provide finer-grained control.h](h/The enable and disable operations are split in }(hjChhhNhNubh)}(h?:c:type:`drm_bridge_funcs.atomic_pre_enable `h]j )}(hjCh]h"drm_bridge_funcs.atomic_pre_enable}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjCubh, }(hjChhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]j )}(hjCh]hdrm_bridge_funcs.atomic_enable}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjChMhjCubh, }(hjChhhNhNubh)}(h<:c:type:`drm_bridge_funcs.atomic_disable `h]j )}(hjCh]hdrm_bridge_funcs.atomic_disable}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjChMhjCubh and }(hjChhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_post_disable `h]j )}(hjDh]h$drm_bridge_funcs.atomic_post_disable}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjChMhjCubh" to provide finer-grained control.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChMhjgCubh)}(hXBridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic\_), in which case they shall also implement the atomic state bookkeeping operations (:c:type:`drm_bridge_funcs.atomic_duplicate_state `, :c:type:`drm_bridge_funcs.atomic_destroy_state ` and :c:type:`drm_bridge_funcs.reset `). Mixing atomic and non-atomic versions of the operations is not supported.h](hBridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic_), in which case they shall also implement the atomic state bookkeeping operations (}(hj8DhhhNhNubh)}(hD:c:type:`drm_bridge_funcs.atomic_duplicate_state `h]j )}(hjBDh]h'drm_bridge_funcs.atomic_duplicate_state}(hjDDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj@Dubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhj8Dubh, }(hj8DhhhNhNubh)}(hB:c:type:`drm_bridge_funcs.atomic_destroy_state `h]j )}(hjfDh]h%drm_bridge_funcs.atomic_destroy_state}(hjhDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjdDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj_DhMhj8Dubh and }(hj8DhhhNhNubh)}(h3:c:type:`drm_bridge_funcs.reset `h]j )}(hjDh]hdrm_bridge_funcs.reset}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj_DhMhj8DubhL). Mixing atomic and non-atomic versions of the operations is not supported.}(hj8DhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_DhMhjgCubeh}(h]h ]h"]h$]h&]uh1hhjdCubh)}(hXThe bus format negotiation operations :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` and :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers. h]h)}(hXThe bus format negotiation operations :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` and :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers.h](h&The bus format negotiation operations }(hjDhhhNhNubh)}(hH:c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts `h]j )}(hjDh]h+drm_bridge_funcs.atomic_get_output_bus_fmts}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjDubh and }(hjDhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]j )}(hjDh]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjDhMhjDubhX allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhMhjDubah}(h]h ]h"]h$]h&]uh1hhjdCubh)}(hX The connector-related operations support implementing a :c:type:`drm_connector` based on a chain of bridges. DRM bridges traditionally create a :c:type:`drm_connector` for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the :c:type:`drm_connector` to be handled by a single bridge, which doesn't always match the hardware architecture. To simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of :c:type:`drm_connector` and instead expose :c:type:`drm_bridge_funcs` operations to support an externally-implemented :c:type:`drm_connector`. Those operations are :c:type:`drm_bridge_funcs.detect `, :c:type:`drm_bridge_funcs.get_modes `, :c:type:`drm_bridge_funcs.get_edid `, :c:type:`drm_bridge_funcs.hpd_notify `, :c:type:`drm_bridge_funcs.hpd_enable ` and :c:type:`drm_bridge_funcs.hpd_disable `. When implemented, display drivers shall create a :c:type:`drm_connector` instance for each chain of bridges, and implement those connector instances based on the bridge connector operations. Bridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the :c:type:`drm_bridge_funcs.get_edid ` shall be implemented. This however doesn't mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the :c:type:`drm_bridge.ops ` flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the :c:type:`drm_bridge.ops ` flags for all supported operations. A flag shall only be set if the corresponding :c:type:`drm_bridge_funcs` operation is implemented, but an implemented operation doesn't necessarily imply that the corresponding flag will be set. Display drivers shall use the :c:type:`drm_bridge.ops ` flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const :c:type:`drm_bridge_funcs` instance in bridge drivers, improving security by storing function pointers in read-only memory. In order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their :c:type:`drm_bridge_funcs.attach ` handler when the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model. h](h)}(hXThe connector-related operations support implementing a :c:type:`drm_connector` based on a chain of bridges. DRM bridges traditionally create a :c:type:`drm_connector` for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the :c:type:`drm_connector` to be handled by a single bridge, which doesn't always match the hardware architecture.h](h8The connector-related operations support implementing a }(hjEhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hj#Eh]h drm_connector}(hj%EhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj!Eubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjEubhA based on a chain of bridges. DRM bridges traditionally create a }(hjEhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjGEh]h drm_connector}(hjIEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjEEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj@EhMhjEubh for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the }(hjEhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjjEh]h drm_connector}(hjlEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjhEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhj@EhMhjEubhZ to be handled by a single bridge, which doesn’t always match the hardware architecture.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@EhMhjEubh)}(hXJTo simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of :c:type:`drm_connector` and instead expose :c:type:`drm_bridge_funcs` operations to support an externally-implemented :c:type:`drm_connector`. Those operations are :c:type:`drm_bridge_funcs.detect `, :c:type:`drm_bridge_funcs.get_modes `, :c:type:`drm_bridge_funcs.get_edid `, :c:type:`drm_bridge_funcs.hpd_notify `, :c:type:`drm_bridge_funcs.hpd_enable ` and :c:type:`drm_bridge_funcs.hpd_disable `. When implemented, display drivers shall create a :c:type:`drm_connector` instance for each chain of bridges, and implement those connector instances based on the bridge connector operations.h](hTo simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of }(hjEhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjEh]h drm_connector}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjEubh and instead expose }(hjEhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]j )}(hjEh]hdrm_bridge_funcs}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjEhMhjEubh1 operations to support an externally-implemented }(hjEhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjEh]h drm_connector}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjEhMhjEubh. Those operations are }(hjEhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.detect `h]j )}(hjFh]hdrm_bridge_funcs.detect}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjEhMhjEubh, }(hjEhhhNhNubh)}(h7:c:type:`drm_bridge_funcs.get_modes `h]j )}(hj(Fh]hdrm_bridge_funcs.get_modes}(hj*FhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj&Fubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjEhMhjEubh, }(hjEhhhNhNubh)}(h6:c:type:`drm_bridge_funcs.get_edid `h]j )}(hjKFh]hdrm_bridge_funcs.get_edid}(hjMFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjIFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjEhMhjEubh, }hjEsbh)}(h8:c:type:`drm_bridge_funcs.hpd_notify `h]j )}(hjnFh]hdrm_bridge_funcs.hpd_notify}(hjpFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjlFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjEhMhjEubh, }hjEsbh)}(h8:c:type:`drm_bridge_funcs.hpd_enable `h]j )}(hjFh]hdrm_bridge_funcs.hpd_enable}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjEhMhjEubh and }(hjEhhhNhNubh)}(h9:c:type:`drm_bridge_funcs.hpd_disable `h]j )}(hjFh]hdrm_bridge_funcs.hpd_disable}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjEhMhjEubh3. When implemented, display drivers shall create a }(hjEhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjFh]h drm_connector}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjEhMhjEubhv instance for each chain of bridges, and implement those connector instances based on the bridge connector operations.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhMhjEubh)}(hXBridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the :c:type:`drm_bridge_funcs.get_edid ` shall be implemented. This however doesn't mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the :c:type:`drm_bridge.ops ` flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the :c:type:`drm_bridge.ops ` flags for all supported operations. A flag shall only be set if the corresponding :c:type:`drm_bridge_funcs` operation is implemented, but an implemented operation doesn't necessarily imply that the corresponding flag will be set. Display drivers shall use the :c:type:`drm_bridge.ops ` flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const :c:type:`drm_bridge_funcs` instance in bridge drivers, improving security by storing function pointers in read-only memory.h](hBridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the }(hjFhhhNhNubh)}(h6:c:type:`drm_bridge_funcs.get_edid `h]j )}(hjGh]hdrm_bridge_funcs.get_edid}(hj GhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjFubhX shall be implemented. This however doesn’t mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the }(hjFhhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]j )}(hj,Gh]hdrm_bridge.ops}(hj.GhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj*Gubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhj%GhMhjFubh flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the }(hjFhhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]j )}(hjOGh]hdrm_bridge.ops}(hjQGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjMGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhj%GhMhjFubhS flags for all supported operations. A flag shall only be set if the corresponding }(hjFhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]j )}(hjrGh]hdrm_bridge_funcs}(hjtGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjpGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj%GhMhjFubh operation is implemented, but an implemented operation doesn’t necessarily imply that the corresponding flag will be set. Display drivers shall use the }(hjFhhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]j )}(hjGh]hdrm_bridge.ops}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhj%GhMhjFubhz flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const }(hjFhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]j )}(hjGh]hdrm_bridge_funcs}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj%GhMhjFubha instance in bridge drivers, improving security by storing function pointers in read-only memory.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj%GhMhjEubh)}(hXIn order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their :c:type:`drm_bridge_funcs.attach ` handler when the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model.h](hXoIn order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the }(hjGhhhNhNubj )}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubhX  flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their }(hjGhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]j )}(hjGh]hdrm_bridge_funcs.attach}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:171: ./drivers/gpu/drm/drm_bridge.chMhjGubh handler when the }(hjGhhhNhNubj )}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubh flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhMhjEubeh}(h]h ]h"]h$]h&]uh1hhjdCubeh}(h]h ]h"]h$]h&]jNj<uh1hhjChMhj!Chhubeh}(h]jah ]h"]bridge operationsah$]h&]uh1hhjc?hhhhhKubh)}(hhh](h)}(hBridge Chain Format Selectionh]hBridge Chain Format Selection}(hjKHhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjHHhhhhhKubh)}(hX~A bridge chain, from display output processor to connector, may contain bridges capable of converting between bus formats on their inputs, and output formats on their outputs. For example, a bridge may be able to convert from RGB to YCbCr 4:4:4, and pass through YCbCr 4:2:0 as-is, but not convert from RGB to YCbCr 4:2:0. This means not all input formats map to all output formats.h]hX~A bridge chain, from display output processor to connector, may contain bridges capable of converting between bus formats on their inputs, and output formats on their outputs. For example, a bridge may be able to convert from RGB to YCbCr 4:4:4, and pass through YCbCr 4:2:0 as-is, but not convert from RGB to YCbCr 4:2:0. This means not all input formats map to all output formats.}(hjYHhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/drm_bridge.chKhjHHhhubh)}(hXJFurther adding to this, a desired output color format, as specified with the "color format" DRM property, might not correspond 1:1 to what the display driver should set at its output. The bridge chain it feeds into may only be able to reach the desired output format, if a conversion from a different starting format is performed.h]hXNFurther adding to this, a desired output color format, as specified with the “color format” DRM property, might not correspond 1:1 to what the display driver should set at its output. The bridge chain it feeds into may only be able to reach the desired output format, if a conversion from a different starting format is performed.}(hjhHhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/drm_bridge.chKhjHHhhubh)}(hTo deal with this complexity, the recursive bridge chain bus format selection logic starts with the last bridge in the chain, usually the connector, and then recursively walks the chain of bridges backwards to the first bridge, trying to find a path.h]hTo deal with this complexity, the recursive bridge chain bus format selection logic starts with the last bridge in the chain, usually the connector, and then recursively walks the chain of bridges backwards to the first bridge, trying to find a path.}(hjwHhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/drm_bridge.chKhjHHhhubh)}(hXFor a display driver to work in such a scenario, it should read the first bridge's bridge state to figure out which bus format the chain resolved to. If the first bridge's input format resolved to ``MEDIA_BUS_FMT_FIXED``, then its output format should be used.$h](hFor a display driver to work in such a scenario, it should read the first bridge’s bridge state to figure out which bus format the chain resolved to. If the first bridge’s input format resolved to }(hjHhhhNhNubj )}(h``MEDIA_BUS_FMT_FIXED``h]hMEDIA_BUS_FMT_FIXED}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubh(, then its output format should be used.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/drm_bridge.chKhjHHhhubh)}(hXSpecial handling is done for HDMI as it relates to format selection. Instead of directly using the "color format" DRM property for bridge chains that end in HDMI bridges, the bridge chain format selection logic will trust the logic that set the HDMI output format. For the common HDMI state helper functionality, this means that ``DRM_CONNECTOR_COLOR_FORMAT_AUTO`` will allow fallbacks to YCBCr 4:2:0 if the bandwidth requirements would otherwise be too high but the mode and connector allow it.h](hXMSpecial handling is done for HDMI as it relates to format selection. Instead of directly using the “color format” DRM property for bridge chains that end in HDMI bridges, the bridge chain format selection logic will trust the logic that set the HDMI output format. For the common HDMI state helper functionality, this means that }(hjHhhhNhNubj )}(h#``DRM_CONNECTOR_COLOR_FORMAT_AUTO``h]hDRM_CONNECTOR_COLOR_FORMAT_AUTO}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubh will allow fallbacks to YCBCr 4:2:0 if the bandwidth requirements would otherwise be too high but the mode and connector allow it.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/drm_bridge.chKhjHHhhubh)}(hFor bridge chains that do not end in an HDMI bridge, ``DRM_CONNECTOR_COLOR_FORMAT_AUTO`` will be satisfied with the first output format on the last bridge for which it can find a path back to the first bridge.h](h5For bridge chains that do not end in an HDMI bridge, }(hjHhhhNhNubj )}(h#``DRM_CONNECTOR_COLOR_FORMAT_AUTO``h]hDRM_CONNECTOR_COLOR_FORMAT_AUTO}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubhy will be satisfied with the first output format on the last bridge for which it can find a path back to the first bridge.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:177: ./drivers/gpu/drm/drm_bridge.chKhjHHhhubeh}(h]jah ]h"]bridge chain format selectionah$]h&]uh1hhjc?hhhhhKubh)}(hhh](h)}(hBridge Connector Helperh]hBridge Connector Helper}(hjHhhhNhNubah}(h]h ]h"]h$]h&]hj"uh1hhjHhhhhhKubh)}(hXDThe DRM bridge connector helper object provides a DRM connector implementation that wraps a chain of :c:type:`struct drm_bridge `. The connector operations are fully implemented based on the operations of the bridges in the chain, and don't require any intervention from the display controller driver at runtime.h](heThe DRM bridge connector helper object provides a DRM connector implementation that wraps a chain of }(hjIhhhNhNubh)}(h(:c:type:`struct drm_bridge `h]j )}(hj Ih]hstruct drm_bridge}(hj IhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj Iubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:183: ./drivers/gpu/drm/display/drm_bridge_connector.chKhjIubh. The connector operations are fully implemented based on the operations of the bridges in the chain, and don’t require any intervention from the display controller driver at runtime.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(IhKhjHhhubh)}(hXHTo use the helper, display controller drivers create a bridge connector with a call to drm_bridge_connector_init(). This associates the newly created connector with the chain of bridges passed to the function and registers it with the DRM device. At that point the connector becomes fully usable, no further operation is needed.h]hXHTo use the helper, display controller drivers create a bridge connector with a call to drm_bridge_connector_init(). This associates the newly created connector with the chain of bridges passed to the function and registers it with the DRM device. At that point the connector becomes fully usable, no further operation is needed.}(hj3IhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:183: ./drivers/gpu/drm/display/drm_bridge_connector.chK$hjHhhubh)}(hXThe DRM bridge connector operations are implemented based on the operations provided by the bridges in the chain. Each connector operation is delegated to the bridge closest to the connector (at the end of the chain) that provides the relevant functionality.h]hXThe DRM bridge connector operations are implemented based on the operations provided by the bridges in the chain. Each connector operation is delegated to the bridge closest to the connector (at the end of the chain) that provides the relevant functionality.}(hjBIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:183: ./drivers/gpu/drm/display/drm_bridge_connector.chK*hjHhhubh)}(hX:To make use of this helper, all bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach flag (none of the bridges shall create a DRM connector directly).h](hZTo make use of this helper, all bridges in the chain shall report bridge operation flags (}(hjQIhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj[Ih]hdrm_bridge->ops}(hj]IhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjYIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:183: ./drivers/gpu/drm/display/drm_bridge_connector.chK/hjQIubh) and bridge output type (}(hjQIhhhNhNubh)}(h':c:type:`drm_bridge->type `h]j )}(hjIh]hdrm_bridge->type}(hjIhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj}Iubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjxIhK/hjQIubhy), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach flag (none of the bridges shall create a DRM connector directly).}(hjQIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxIhK/hjHhhubeh}(h]j(ah ]h"]bridge connector helperah$]h&]uh1hhjc?hhhhhKubh)}(hhh](h)}(hBridge Helper Referenceh]hBridge Helper Reference}(hjIhhhNhNubah}(h]h ]h"]h$]h&]hjDuh1hhjIhhhhhKubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_attach_flags (C enum)c.drm_bridge_attach_flagshNtauh1j hjIhhhNhNubj )}(hhh](j )}(hdrm_bridge_attach_flagsh]j )}(henum drm_bridge_attach_flagsh](j )}(hj7h]henum}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjIhKubj )}(hdrm_bridge_attach_flagsh]j )}(hjIh]hdrm_bridge_attach_flags}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ](j j eh"]h$]h&]j j uh1j hjIhhhjIhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjIhhhjIhKubah}(h]jIah ](j j eh"]h$]h&]j j )j huh1j hjIhKhjIhhubj )}(hhh]h)}(h>Flags for :c:type:`drm_bridge_funcs.attach `h](h Flags for }(hjJhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]j )}(hj#Jh]hdrm_bridge_funcs.attach}(hj%JhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj!Jubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j%)}jjIsbc.drm_bridge_attach_flagsasbj drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjJubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhK3hjJhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjIhKubeh}(h]h ](j enumeh"]h$]h&]j" j j# jXJj$ jXJj% j& j' uh1j hhhjIhNhNubj) )}(hx**Constants** ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` When this flag is set the bridge shall not create a drm_connector.h](h)}(h **Constants**h]j3 )}(hjbJh]h Constants}(hjdJhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`Jubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhK7hj\Jubjw )}(hhh]j| )}(he``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` When this flag is set the bridge shall not create a drm_connector.h](j )}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]j )}(hjJh]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhK:hj{Jubj )}(hhh]h)}(hBWhen this flag is set the bridge shall not create a drm_connector.h]hBWhen this flag is set the bridge shall not create a drm_connector.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhK:hjJubah}(h]h ]h"]h$]h&]uh1j hj{Jubeh}(h]h ]h"]h$]h&]uh1j{ hjJhK:hjxJubah}(h]h ]h"]h$]h&]uh1jv hj\Jubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_funcs (C struct)c.drm_bridge_funcshNtauh1j hjIhhhNhNubj )}(hhh](j )}(hdrm_bridge_funcsh]j )}(hstruct drm_bridge_funcsh](j )}(hj h]hstruct}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhK@ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJhhhjJhK@ubj )}(hdrm_bridge_funcsh]j )}(hjJh]hdrm_bridge_funcs}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ](j j eh"]h$]h&]j j uh1j hjJhhhjJhK@ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhjJhK@ubah}(h]jJah ](j j eh"]h$]h&]j j )j huh1j hjJhK@hjJhhubj )}(hhh]h)}(hdrm_bridge control functionsh]hdrm_bridge control functions}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhK>hjKhhubah}(h]h ]h"]h$]h&]uh1j hjJhhhjJhK@ubeh}(h]h ](j structeh"]h$]h&]j" j j# j4Kj$ j4Kj% j& j' uh1j hhhjIhNhNubj) )}(hXj**Definition**:: struct drm_bridge_funcs { int (*attach)(struct drm_bridge *bridge, struct drm_encoder *encoder, enum drm_bridge_attach_flags flags); void (*destroy)(struct drm_bridge *bridge); void (*detach)(struct drm_bridge *bridge); enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); void (*atomic_pre_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_enable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_atomic_commit *state); struct drm_bridge_state *(*atomic_duplicate_state)(struct drm_bridge *bridge); void (*atomic_destroy_state)(struct drm_bridge *bridge, struct drm_bridge_state *state); u32 *(*atomic_get_output_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts); u32 *(*atomic_get_input_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts); int (*atomic_check)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); struct drm_bridge_state *(*atomic_create_state)(struct drm_bridge *bridge); enum drm_connector_status (*detect)(struct drm_bridge *bridge, struct drm_connector *connector); int (*get_modes)(struct drm_bridge *bridge, struct drm_connector *connector); const struct drm_edid *(*edid_read)(struct drm_bridge *bridge, struct drm_connector *connector); void (*hpd_notify)(struct drm_bridge *bridge, struct drm_connector *connector, enum drm_connector_status status); void (*hpd_enable)(struct drm_bridge *bridge); void (*hpd_disable)(struct drm_bridge *bridge); enum drm_mode_status (*hdmi_tmds_char_rate_valid)(const struct drm_bridge *bridge, const struct drm_display_mode *mode, unsigned long long tmds_rate); int (*hdmi_clear_avi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_avi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdmi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdmi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdr_drm_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdr_drm_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_spd_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_spd_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_audio_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_audio_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*hdmi_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); int (*hdmi_cec_init)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_cec_enable)(struct drm_bridge *bridge, bool enable); int (*hdmi_cec_log_addr)(struct drm_bridge *bridge, u8 logical_addr); int (*hdmi_cec_transmit)(struct drm_bridge *bridge, u8 attempts, u32 signal_free_time, struct cec_msg *msg); int (*dp_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*dp_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); void (*debugfs_init)(struct drm_bridge *bridge, struct dentry *root); }; **Members** ``attach`` This callback is invoked whenever our bridge is being attached to a :c:type:`drm_encoder`. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*). The **attach** callback is optional. RETURNS: Zero on success, error code on failure. ``destroy`` This callback is invoked when the bridge is about to be deallocated. The **destroy** callback is optional. ``detach`` This callback is invoked whenever our bridge is being detached from a :c:type:`drm_encoder`. The **detach** callback is optional. ``mode_valid`` This callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). The **mode_valid** callback is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration. The mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``mode_set`` This callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called. The adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges. For atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `. NOTE: This is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation. ``atomic_pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **atomic_pre_enable** callback is optional. ``atomic_enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **atomic_enable** callback is optional. ``atomic_disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **atomic_disable** callback is optional. ``atomic_post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **atomic_post_disable** callback is optional. ``atomic_duplicate_state`` Duplicate the current bridge state object (which is guaranteed to be non-NULL). The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook. RETURNS: A valid drm_bridge_state object or NULL if the allocation fails. ``atomic_destroy_state`` Destroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `. The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook. ``atomic_get_output_bus_fmts`` Return the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). This method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise. ``atomic_get_input_bus_fmts`` Return the supported bus formats on the input end of a bridge for a specific output bus format. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0. This method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format. Bridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...) Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately. ``atomic_check`` This method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly. :c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge). This method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. If drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain. RETURNS: zero if the check passed, a negative error code otherwise. ``atomic_create_state`` Allocate a pristine, initialized, state for the bridge object and return it. This callback must have no side effects: in particular, the returned state must not be assigned to the object's state pointer and it must not affect the hardware state. RETURNS: A new, pristine, bridge state instance or an error pointer on failure. ``detect`` Check if anything is attached to the bridge output. This callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `. RETURNS: drm_connector_status indicating the bridge output status. ``get_modes`` Fill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add(). The **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage. RETURNS: The number of modes added by calling drm_mode_probed_add(). ``edid_read`` Read the EDID data of the connected display. The **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented. The caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage. RETURNS: An edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free(). ``hpd_notify`` Notify the bridge of hot plug detection. This callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges. ``hpd_enable`` Enable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. ``hpd_disable`` Disable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. ``hdmi_tmds_char_rate_valid`` Check whether a particular TMDS character rate is supported by the driver. This callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. Returns: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. ``hdmi_clear_avi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_avi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_hdmi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_hdmi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_hdr_drm_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_hdr_drm_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_spd_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_spd_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_audio_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_audio_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. ``hdmi_audio_startup`` Called when ASoC starts an audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_prepare`` Configures HDMI-encoder for audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_shutdown`` Shut down the audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_mute_stream`` Mute/unmute HDMI audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_init`` Initialize CEC part of the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_enable`` Enable or disable the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_log_addr`` Set the logical address of the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_transmit`` Transmit the message using the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_startup`` Called when ASoC starts a DisplayPort audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_prepare`` Configures DisplayPort audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_shutdown`` Shut down the DisplayPort audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_mute_stream`` Mute/unmute DisplayPort audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``debugfs_init`` Allows bridges to create bridge-specific debugfs files.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj@KhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj` for more details. This is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration. The mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](j )}(h``mode_fixup``h]j )}(hjMh]h mode_fixup}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjMubj )}(hhh](h)}(hXThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final }(hjMhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjMh]h drm_connector}(hjMhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjMubh or the next }(hjMhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjMh]h drm_bridge}(hjMhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjMhKhjMubh. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also }(hjMhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]j )}(hjNh]hdrm_crtc_state.adjusted_mode}(hjNhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjMhKhjMubh for more details.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjMhKhjMubh)}(hThis is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration.h]hThis is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration.}(hjCNhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjMubh)}(hThe mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided.h](h%The mode_fixup callback is optional. }(hjRNhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]j )}(hj\Nh]hdrm_bridge_funcs.mode_fixup()}(hj^NhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjZNubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjRNubh is not called when }(hjRNhhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]j )}(hjNh]hdrm_bridge_funcs.atomic_check()}(hjNhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj~Nubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjyNhKhjRNubh8 is implemented, so only one of them should be provided.}(hjRNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjyNhKhjMubh)}(hNOTE:h]hNOTE:}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjMubh)}(hX>This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter.h](hX,This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in }(hjNhhhNhNubj3 )}(h **state**h]hstate}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjNubh parameter.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjMubh)}(hXNAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjNhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]j )}(hjNh]hdrm_connector.modes}(hjNhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjNubhc. To ensure that modes are filtered consistently put any bridge constraints and limits checks into }(hjNhhhNhNubj3 )}(h**mode_valid**h]h mode_valid}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjNubh.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNhKhjMubh)}(hRETURNS:h]hRETURNS:}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjMubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hj*OhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjMubeh}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjMhKhjKubj| )}(hX2``mode_set`` This callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called. The adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges. For atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `. NOTE: This is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation. h](j )}(h ``mode_set``h]j )}(hjKOh]hmode_set}(hjMOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIOubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjEOubj )}(hhh](h)}(hXThis callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called.h](hNThis callback should set the given mode on the bridge. It is called after the }(hjdOhhhNhNubj3 )}(h **mode_set**h]hmode_set}(hjlOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjdOubh callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be }(hjdOhhhNhNubh)}(hF:c:type:`drm_encoder_helper_funcs.mode_set `h]j )}(hjOh]h!drm_encoder_helper_funcs.mode_set}(hjOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj~Oubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjdOubhY. The display pipe (i.e. clocks and timing signals) is off when this function is called.}(hjdOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjOhKhjaOubh)}(hXThe adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges.h]hXThe adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjaOubh)}(hsFor atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `.h](h;For atomic drivers the adjusted_mode is the mode stored in }(hjOhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]j )}(hjOh]hdrm_crtc_state.adjusted_mode}(hjOhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjOubh.}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjOhKhjaOubh)}(hNOTE:h]hNOTE:}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjaOubh)}(hThis is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation.h](hHThis is deprecated, do not use! New drivers shall set their mode in the }(hjOhhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]j )}(hjPh]hdrm_bridge_funcs.atomic_enable}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjOubh operation.}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhKhjaOubeh}(h]h ]h"]h$]h&]uh1j hjEOubeh}(h]h ]h"]h$]h&]uh1j{ hj`OhKhjKubj| )}(hX``atomic_pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **atomic_pre_enable** callback is optional. h](j )}(h``atomic_pre_enable``h]j )}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:Pubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhj6Pubj )}(hhh](h)}(hXThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook.h](hThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjUPhhhNhNubj3 )}(h**atomic_pre_enable**h]hatomic_pre_enable}(hj]PhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUPubh or }(hjUPhhhNhNubj3 )}(h**pre_enable**h]h pre_enable}(hjoPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUPubh) function. If the preceding element is a }(hjUPhhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hjPh]h drm_encoder}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjUPubh, it’s called right before the encoder’s }(hjUPhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]j )}(hjPh]h&drm_encoder_helper_funcs.atomic_enable}(hjPhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjPhKhjUPubh hook.}(hjUPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhKhjRPubh)}(hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.h]hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjRPubh)}(h/The **atomic_pre_enable** callback is optional.h](hThe }(hjPhhhNhNubj3 )}(h**atomic_pre_enable**h]hatomic_pre_enable}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjPubh callback is optional.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQPhKhjRPubeh}(h]h ]h"]h$]h&]uh1j hj6Pubeh}(h]h ]h"]h$]h&]uh1j{ hjQPhKhjKubj| )}(hX``atomic_enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **atomic_enable** callback is optional. h](j )}(h``atomic_enable``h]j )}(hjQh]h atomic_enable}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Qubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhj Qubj )}(hhh](h)}(hXThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook.h](hThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hj(QhhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hj0QhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(Qubh or }(hj(QhhhNhNubj3 )}(h **enable**h]henable}(hjBQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(Qubh) function. If the preceding element is a }(hj(QhhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hjVQh]h drm_encoder}(hjXQhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjTQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhj(Qubh+ it’s called right after the encoder’s }(hj(QhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]j )}(hjzQh]h&drm_encoder_helper_funcs.atomic_enable}(hj|QhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjxQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjsQhKhj(Qubh hook.}(hj(QhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjsQhKhj%Qubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhj%Qubh)}(h+The **atomic_enable** callback is optional.h](hThe }(hjQhhhNhNubj3 )}(h**atomic_enable**h]h atomic_enable}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubh callback is optional.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj$QhKhj%Qubeh}(h]h ]h"]h$]h&]uh1j hj Qubeh}(h]h ]h"]h$]h&]uh1j{ hj$QhKhjKubj| )}(hXa``atomic_disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **atomic_disable** callback is optional. h](j )}(h``atomic_disable``h]j )}(hjQh]hatomic_disable}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjQubj )}(hhh](h)}(hXThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook.h](hThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjQhhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubh or }(hjQhhhNhNubj3 )}(h **disable**h]hdisable}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubh& vfunc. If the preceding element is a }(hjQhhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hj)Rh]h drm_encoder}(hj+RhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj'Rubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjQubh it’s called right before the }(hjQhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]j )}(hjMRh]h'drm_encoder_helper_funcs.atomic_disable}(hjORhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjKRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjFRhKhjQubh hook.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFRhKhjQubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.}(hjtRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhKhjQubh)}(h,The **atomic_disable** callback is optional.h](hThe }(hjRhhhNhNubj3 )}(h**atomic_disable**h]hatomic_disable}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubh callback is optional.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhMhjQubeh}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjQhMhjKubj| )}(hX``atomic_post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **atomic_post_disable** callback is optional. h](j )}(h``atomic_post_disable``h]j )}(hjRh]hatomic_post_disable}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjRubj )}(hhh](h)}(hXThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook.h](hThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjRhhhNhNubj3 )}(h**atomic_post_disable**h]hatomic_post_disable}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubh or }(hjRhhhNhNubj3 )}(h**post_disable**h]h post_disable}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubh) function. If the preceding element is a }(hjRhhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hjRh]h drm_encoder}(hjRhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjRubh+ it’s called right after the encoder’s }(hjRhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]j )}(hj Sh]h'drm_encoder_helper_funcs.atomic_disable}(hj"ShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjShM hjRubh hook.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShM hjRubh)}(hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.h]hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.}(hjGShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjRubh)}(h1The **atomic_post_disable** callback is optional.h](hThe }(hjVShhhNhNubj3 )}(h**atomic_post_disable**h]hatomic_post_disable}(hj^ShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVSubh callback is optional.}(hjVShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhMhjRubeh}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjRhMhjKubj| )}(hX``atomic_duplicate_state`` Duplicate the current bridge state object (which is guaranteed to be non-NULL). The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook. RETURNS: A valid drm_bridge_state object or NULL if the allocation fails. h](j )}(h``atomic_duplicate_state``h]j )}(hjSh]hatomic_duplicate_state}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM'hjSubj )}(hhh](h)}(hODuplicate the current bridge state object (which is guaranteed to be non-NULL).h]hODuplicate the current bridge state object (which is guaranteed to be non-NULL).}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjSubh)}(hX(The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook.h](hThe atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don’t subclass }(hjShhhNhNubh)}(h:c:type:`drm_bridge_state`h]j )}(hjSh]hdrm_bridge_state}(hjShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjSubhf, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShM hjSubh)}(hIRETURNS: A valid drm_bridge_state object or NULL if the allocation fails.h]hIRETURNS: A valid drm_bridge_state object or NULL if the allocation fails.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM&hjSubeh}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjShM'hjKubj| )}(hX``atomic_destroy_state`` Destroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `. The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook. h](j )}(h``atomic_destroy_state``h]j )}(hjTh]hatomic_destroy_state}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM5hjSubj )}(hhh](h)}(hDestroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `.h](h6Destroy a bridge state object previously allocated by }(hjThhhNhNubh)}(hH:c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `h]j )}(hj&Th]h)drm_bridge_funcs.atomic_duplicate_state()}(hj(ThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj$Tubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM.hjTubh.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjCThM.hjTubh)}(hX$The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook.h](hThe atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don’t subclass }(hjNThhhNhNubh)}(h:c:type:`drm_bridge_state`h]j )}(hjXTh]hdrm_bridge_state}(hjZThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjVTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM1hjNTubhd, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook.}(hjNThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjuThM1hjTubeh}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjThM5hjKubj| )}(hXi``atomic_get_output_bus_fmts`` Return the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). This method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise. h](j )}(h``atomic_get_output_bus_fmts``h]j )}(hjTh]hatomic_get_output_bus_fmts}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMKhjTubj )}(hhh](h)}(hXReturn the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works).h]hXReturn the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works).}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM=hjTubh)}(hXThis method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise.h](hThis method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in }(hjThhhNhNubh)}(h:c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `h]j )}(hjTh]hdrm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info}(hjThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMEhjTubh.bus_formats[0] if }(hjThhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]j )}(hjTh]hdrm_connector.display_info}(hjThhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjThMEhjTubh:.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjThMEhjTubeh}(h]h ]h"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]uh1j{ hjThMKhjKubj| )}(hXL``atomic_get_input_bus_fmts`` Return the supported bus formats on the input end of a bridge for a specific output bus format. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0. This method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format. Bridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...) Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately. h](j )}(h``atomic_get_input_bus_fmts``h]j )}(hj!Uh]hatomic_get_input_bus_fmts}(hj#UhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMshjUubj )}(hhh](h)}(h_Return the supported bus formats on the input end of a bridge for a specific output bus format.h]h_Return the supported bus formats on the input end of a bridge for a specific output bus format.}(hj:UhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMVhj7Uubh)}(hXThe returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0.h]hXThe returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0.}(hjIUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMYhj7Uubh)}(hXThis method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format.h]hXThis method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format.}(hjXUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMahj7Uubh)}(hXVBridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...)h](hXBridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, }(hjgUhhhNhNubh)}(h:c:type:`drm_display_mode`h]j )}(hjqUh]hdrm_display_mode}(hjsUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjoUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_modeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMihjgUubh, }(hjgUhhhNhNubh)}(h:c:type:`drm_display_info`h]j )}(hjUh]hdrm_display_info}(hjUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_infouh1hhjUhMihjgUubh, ...)}(hjgUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhMihj7Uubh)}(hX0Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately.h]hX0Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMohj7Uubeh}(h]h ]h"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]uh1j{ hj6UhMshjKubj| )}(hXg``atomic_check`` This method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly. :c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge). This method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. If drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain. RETURNS: zero if the check passed, a negative error code otherwise. h](j )}(h``atomic_check``h]j )}(hjUh]h atomic_check}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjUubj )}(hhh](h)}(hThis method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly.h]hThis method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjUubh)}(h:c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge).h](h)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]j )}(hj Vh]hdrm_bridge_funcs.atomic_check()}(hj VhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj Vubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjVubhG hooks are called in reverse order (from the last to the first bridge).}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(VhMhjUubh)}(hThis method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided.h](hThis method is optional. }(hj3VhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]j )}(hj=Vh]hdrm_bridge_funcs.mode_fixup()}(hj?VhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj;Vubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj3Vubh is not called when }(hj3VhhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]j )}(hjaVh]hdrm_bridge_funcs.atomic_check()}(hjcVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj_Vubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjZVhMhj3Vubh8 is implemented, so only one of them should be provided.}(hj3VhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZVhMhjUubh)}(hXIf drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain.h](hIf drivers need to tweak }(hjVhhhNhNubh)}(h;:c:type:`drm_bridge_state.input_bus_cfg `h]j )}(hjVh]hdrm_bridge_state.input_bus_cfg}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjVubh .flags or }(hjVhhhNhNubh)}(h<:c:type:`drm_bridge_state.output_bus_cfg `h]j )}(hjVh]hdrm_bridge_state.output_bus_cfg}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hhjVhMhjVubh9.flags it should happen in this function. By default the }(hjVhhhNhNubh)}(h<:c:type:`drm_bridge_state.output_bus_cfg `h]j )}(hjVh]hdrm_bridge_state.output_bus_cfg}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hhjVhMhjVubh'.flags field is set to the next bridge }(hjVhhhNhNubh)}(h;:c:type:`drm_bridge_state.input_bus_cfg `h]j )}(hjVh]hdrm_bridge_state.input_bus_cfg}(hjVhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_stateuh1hhjVhMhjVubh.flags value or }(hjVhhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]j )}(hjWh]hdrm_connector.display_info}(hj!WhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjVhMhjVubh:.bus_flags if the bridge is the last element in the chain.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVhMhjUubh)}(hCRETURNS: zero if the check passed, a negative error code otherwise.h]hCRETURNS: zero if the check passed, a negative error code otherwise.}(hjFWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjUubeh}(h]h ]h"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]uh1j{ hjUhMhjKubj| )}(hX```atomic_create_state`` Allocate a pristine, initialized, state for the bridge object and return it. This callback must have no side effects: in particular, the returned state must not be assigned to the object's state pointer and it must not affect the hardware state. RETURNS: A new, pristine, bridge state instance or an error pointer on failure. h](j )}(h``atomic_create_state``h]j )}(hjgWh]hatomic_create_state}(hjiWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeWubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjaWubj )}(hhh](h)}(hAllocate a pristine, initialized, state for the bridge object and return it. This callback must have no side effects: in particular, the returned state must not be assigned to the object's state pointer and it must not affect the hardware state.h]hAllocate a pristine, initialized, state for the bridge object and return it. This callback must have no side effects: in particular, the returned state must not be assigned to the object’s state pointer and it must not affect the hardware state.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj}Wubh)}(hRETURNS:h]hRETURNS:}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj}Wubh)}(hFA new, pristine, bridge state instance or an error pointer on failure.h]hFA new, pristine, bridge state instance or an error pointer on failure.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj}Wubeh}(h]h ]h"]h$]h&]uh1j hjaWubeh}(h]h ]h"]h$]h&]uh1j{ hj|WhMhjKubj| )}(hX``detect`` Check if anything is attached to the bridge output. This callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `. RETURNS: drm_connector_status indicating the bridge output status. h](j )}(h ``detect``h]j )}(hjWh]hdetect}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjWubj )}(hhh](h)}(h3Check if anything is attached to the bridge output.h]h3Check if anything is attached to the bridge output.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjWubh)}(hThis callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their }(hjWhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjWh]hdrm_bridge->ops}(hjWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjWubh.}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhMhjWubh)}(hRETURNS:h]hRETURNS:}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjWubh)}(h9drm_connector_status indicating the bridge output status.h]h9drm_connector_status indicating the bridge output status.}(hj(XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMhjWubeh}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjWhMhjKubj| )}(hX``get_modes`` Fill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add(). The **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage. RETURNS: The number of modes added by calling drm_mode_probed_add(). h](j )}(h ``get_modes``h]j )}(hjHXh]h get_modes}(hjJXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFXubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjBXubj )}(hhh](h)}(hhFill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add().h](h5Fill all modes currently valid for the sink into the }(hjaXhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjkXh]h drm_connector}(hjmXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjiXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjaXubh with drm_mode_probed_add().}(hjaXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhMhj^Xubh)}(hXThe **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead.h](hThe }(hjXhhhNhNubj3 )}(h **get_modes**h]h get_modes}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXubh callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave }(hjXhhhNhNubj3 )}(h **get_modes**h]h get_modes}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXubh! unimplemented and implement the }(hjXhhhNhNubh)}(h8:c:type:`drm_bridge_funcs->edid_read `h]j )}(hjXh]hdrm_bridge_funcs->edid_read}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjXubh callback instead.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhMhj^Xubh)}(hThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `.h](heThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their }(hjXhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjXh]hdrm_bridge->ops}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjXubh.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMhj^Xubh)}(hThe connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage.h]hThe connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj^Xubh)}(hRETURNS:h]hRETURNS:}(hj*YhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj^Xubh)}(h;The number of modes added by calling drm_mode_probed_add().h]h;The number of modes added by calling drm_mode_probed_add().}(hj9YhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]XhMhj^Xubeh}(h]h ]h"]h$]h&]uh1j hjBXubeh}(h]h ]h"]h$]h&]uh1j{ hj]XhMhjKubj| )}(hX``edid_read`` Read the EDID data of the connected display. The **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented. The caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage. RETURNS: An edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free(). h](j )}(h ``edid_read``h]j )}(hjYYh]h edid_read}(hj[YhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWYubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjSYubj )}(hhh](h)}(h,Read the EDID data of the connected display.h]h,Read the EDID data of the connected display.}(hjrYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoYubh)}(hThe **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented.h](hThe }(hjYhhhNhNubj3 )}(h **edid_read**h]h edid_read}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubh callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the }(hjYhhhNhNubj3 )}(h **get_modes**h]h get_modes}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubh callback unimplemented.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoYubh)}(hThe caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output.h]hThe caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoYubh)}(hThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `.h](hdThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their }(hjYhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjYh]hdrm_bridge->ops}(hjYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjYubh.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMhjoYubh)}(hThe connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage.h]hThe connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoYubh)}(hRETURNS:h]hRETURNS:}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoYubh)}(hAn edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free().h]hAn edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free().}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoYubeh}(h]h ]h"]h$]h&]uh1j hjSYubeh}(h]h ]h"]h$]h&]uh1j{ hjnYhMhjKubj| )}(hX``hpd_notify`` Notify the bridge of hot plug detection. This callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges. h](j )}(h``hpd_notify``h]j )}(hj4Zh]h hpd_notify}(hj6ZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2Zubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj.Zubj )}(hhh](h)}(h(Notify the bridge of hot plug detection.h]h(Notify the bridge of hot plug detection.}(hjMZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjJZubh)}(hThis callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges.h]hThis callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges.}(hj\ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjJZubeh}(h]h ]h"]h$]h&]uh1j hj.Zubeh}(h]h ]h"]h$]h&]uh1j{ hjIZhMhjKubj| )}(hX``hpd_enable`` Enable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hpd_enable``h]j )}(hj}Zh]h hpd_enable}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{Zubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjwZubj )}(hhh](h)}(hEnable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**.h](hEnable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with }(hjZhhhNhNubj3 )}(h**hpd_disable**h]h hpd_disable}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubh.}(hjZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjZubh)}(hXThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the }(hjZhhhNhNubj3 )}(h**hpd_disable**h]h hpd_disable}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubh6 callback and set the DRM_BRIDGE_OP_HPD flag in their }(hjZhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjZh]hdrm_bridge->ops}(hjZhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjZubh.}(hjZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZhM hjZubeh}(h]h ]h"]h$]h&]uh1j hjwZubeh}(h]h ]h"]h$]h&]uh1j{ hjZhM hjKubj| )}(hX``hpd_disable`` Disable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hpd_disable``h]j )}(hj [h]h hpd_disable}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj [ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj[ubj )}(hhh](h)}(hDisable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs.h]hDisable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs.}(hj&[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj#[ubh)}(hXThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the }(hj5[hhhNhNubj3 )}(h**hpd_enable**h]h hpd_enable}(hj=[hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5[ubh6 callback and set the DRM_BRIDGE_OP_HPD flag in their }(hj5[hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjQ[h]hdrm_bridge->ops}(hjS[hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjO[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj5[ubh.}(hj5[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjn[hMhj#[ubeh}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hj"[hMhjKubj| )}(hX``hdmi_tmds_char_rate_valid`` Check whether a particular TMDS character rate is supported by the driver. This callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. Returns: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. h](j )}(h``hdmi_tmds_char_rate_valid``h]j )}(hj[h]hhdmi_tmds_char_rate_valid}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM,hj[ubj )}(hhh](h)}(hJCheck whether a particular TMDS character rate is supported by the driver.h]hJCheck whether a particular TMDS character rate is supported by the driver.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM!hj[ubh)}(hThis callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their }(hj[hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj[h]hdrm_bridge->ops}(hj[hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM$hj[ubh.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj[hM$hj[ubh)}(hReturns:h]hReturns:}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM)hj[ubh)}(hEither :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `.h](hEither }(hj[hhhNhNubh)}(h3:c:type:`drm_mode_status.MODE_OK `h]j )}(hj[h]hdrm_mode_status.MODE_OK}(hj\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM+hj[ubh" or one of the failure reasons in }(hj[hhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]j )}(hj"\h]henum drm_mode_status}(hj$\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj \ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_statusuh1hhj\hM+hj[ubh.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hM+hj[ubeh}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hj[hM,hjKubj| )}(h``hdmi_clear_avi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_clear_avi_infoframe``h]j )}(hj[\h]hhdmi_clear_avi_infoframe}(hj]\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjY\ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM9hjU\ubj )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjt\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM6hjq\ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hj\hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj\h]hdrm_bridge->ops}(hj\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM8hj\ubh.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hM8hjq\ubeh}(h]h ]h"]h$]h&]uh1j hjU\ubeh}(h]h ]h"]h$]h&]uh1j{ hjp\hM9hjKubj| )}(h``hdmi_write_avi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_write_avi_infoframe``h]j )}(hj\h]hhdmi_write_avi_infoframe}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMChj\ubj )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM@hj\ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hj\hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj\h]hdrm_bridge->ops}(hj\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMBhj\ubh.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj]hMBhj\ubeh}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hj\hMChjKubj| )}(h``hdmi_clear_hdmi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_clear_hdmi_infoframe``h]j )}(hj3]h]hhdmi_clear_hdmi_infoframe}(hj5]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1]ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMNhj-]ubj )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjL]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMKhjI]ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hj[]hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hje]h]hdrm_bridge->ops}(hjg]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjc]ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMMhj[]ubh.}(hj[]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj]hMMhjI]ubeh}(h]h ]h"]h$]h&]uh1j hj-]ubeh}(h]h ]h"]h$]h&]uh1j{ hjH]hMNhjKubj| )}(h``hdmi_write_hdmi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_write_hdmi_infoframe``h]j )}(hj]h]hhdmi_write_hdmi_infoframe}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMXhj]ubj )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMUhj]ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hj]hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj]h]hdrm_bridge->ops}(hj]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMWhj]ubh.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj]hMWhj]ubeh}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hj]hMXhjKubj| )}(hX ``hdmi_clear_hdr_drm_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j )}(h ``hdmi_clear_hdr_drm_infoframe``h]j )}(hj ^h]hhdmi_clear_hdr_drm_infoframe}(hj ^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ^ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMdhj^ubj )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hj$^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM`hj!^ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their }(hj3^hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj=^h]hdrm_bridge->ops}(hj?^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj;^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMbhj3^ubh.}(hj3^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZ^hMbhj!^ubeh}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj ^hMdhjKubj| )}(h``hdmi_write_hdr_drm_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j )}(h ``hdmi_write_hdr_drm_infoframe``h]j )}(hjw^h]hhdmi_write_hdr_drm_infoframe}(hjy^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hju^ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMohjq^ubj )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMkhj^ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their }(hj^hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj^h]hdrm_bridge->ops}(hj^hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMmhj^ubh.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMmhj^ubeh}(h]h ]h"]h$]h&]uh1j hjq^ubeh}(h]h ]h"]h$]h&]uh1j{ hj^hMohjKubj| )}(hX``hdmi_clear_spd_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_clear_spd_infoframe``h]j )}(hj^h]hhdmi_clear_spd_infoframe}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM{hj^ubj )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMwhj^ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](h|This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their }(hj _hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj_h]hdrm_bridge->ops}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMyhj _ubh.}(hj _hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2_hMyhj^ubeh}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj^hM{hjKubj| )}(h``hdmi_write_spd_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_write_spd_infoframe``h]j )}(hjO_h]hhdmi_write_spd_infoframe}(hjQ_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjM_ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjI_ubj )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjh_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhje_ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](h|This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their }(hjw_hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj_h]hdrm_bridge->ops}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjw_ubh.}(hjw_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_hMhje_ubeh}(h]h ]h"]h$]h&]uh1j hjI_ubeh}(h]h ]h"]h$]h&]uh1j{ hjd_hMhjKubj| )}(h``hdmi_clear_audio_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_clear_audio_infoframe``h]j )}(hj_h]hhdmi_clear_audio_infoframe}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj_ubj )}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj_ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `.h](htThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their }(hj_hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj_h]hdrm_bridge->ops}(hj_hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj_ubh.}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj `hMhj_ubeh}(h]h ]h"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]uh1j{ hj_hMhjKubj| )}(h``hdmi_write_audio_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. h](j )}(h``hdmi_write_audio_infoframe``h]j )}(hj'`h]hhdmi_write_audio_infoframe}(hj)`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%`ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj!`ubj )}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hj@`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj=`ubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `.h](htThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their }(hjO`hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjY`h]hdrm_bridge->ops}(hj[`hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjW`ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjO`ubh.}(hjO`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjv`hMhj=`ubeh}(h]h ]h"]h$]h&]uh1j hj!`ubeh}(h]h ]h"]h$]h&]uh1j{ hj<`hMhjKubj| )}(hX``hdmi_audio_startup`` Called when ASoC starts an audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_audio_startup``h]j )}(hj`h]hhdmi_audio_startup}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj`ubj )}(hhh](h)}(h.Called when ASoC starts an audio stream setup.h]h.Called when ASoC starts an audio stream setup.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj`ubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj`hhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubh flag in their }(hj`hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj`h]hdrm_bridge->ops}(hj`hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj`ubh.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`hMhj`ubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj`ubeh}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hMhjKubj| )}(hXG``hdmi_audio_prepare`` Configures HDMI-encoder for audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_audio_prepare``h]j )}(hj ah]hhdmi_audio_prepare}(hj"ahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjaubj )}(hhh](h)}(hVConfigures HDMI-encoder for audio stream. Can be called multiple times for each setup.h]hVConfigures HDMI-encoder for audio stream. Can be called multiple times for each setup.}(hj9ahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj6aubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjHahhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjPahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHaubh flag in their }(hjHahhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjdah]hdrm_bridge->ops}(hjfahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjbaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjHaubh.}(hjHahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahMhj6aubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj6aubeh}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hj5ahMhjKubj| )}(hX ``hdmi_audio_shutdown`` Shut down the audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_audio_shutdown``h]j )}(hjah]hhdmi_audio_shutdown}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjaubj )}(hhh](h)}(hShut down the audio stream.h]hShut down the audio stream.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjaubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjahhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubh flag in their }(hjahhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjah]hdrm_bridge->ops}(hjahhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjaubh.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjbhMhjaubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjaubeh}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hjahMhjKubj| )}(hX``hdmi_audio_mute_stream`` Mute/unmute HDMI audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_audio_mute_stream``h]j )}(hj:bh]hhdmi_audio_mute_stream}(hjops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjbbhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbbubh flag in their }(hjbbhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj~bh]hdrm_bridge->ops}(hjbhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj|bubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjbbubh.}(hjbbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjbhMhjPbubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjPbubeh}(h]h ]h"]h$]h&]uh1j hj4bubeh}(h]h ]h"]h$]h&]uh1j{ hjObhMhjKubj| )}(hX``hdmi_cec_init`` Initialize CEC part of the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_cec_init``h]j )}(hjbh]h hdmi_cec_init}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjbubj )}(hhh](h)}(h"Initialize CEC part of the bridge.h]h"Initialize CEC part of the bridge.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjbubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjbhhhNhNubj3 )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbubh flag in their }(hjbhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj ch]hdrm_bridge->ops}(hj chhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj cubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjbubh.}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(chMhjbubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj3chhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjbubeh}(h]h ]h"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]uh1j{ hjbhMhjKubj| )}(hX$``hdmi_cec_enable`` Enable or disable the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_cec_enable``h]j )}(hjTch]hhdmi_cec_enable}(hjVchhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRcubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjNcubj )}(hhh](h)}(h4Enable or disable the CEC adapter inside the bridge.h]h4Enable or disable the CEC adapter inside the bridge.}(hjmchhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjjcubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj|chhhNhNubj3 )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|cubh flag in their }(hj|chhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjch]hdrm_bridge->ops}(hjchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj|cubh.}(hj|chhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchMhjjcubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjjcubeh}(h]h ]h"]h$]h&]uh1j hjNcubeh}(h]h ]h"]h$]h&]uh1j{ hjichMhjKubj| )}(hX/``hdmi_cec_log_addr`` Set the logical address of the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_cec_log_addr``h]j )}(hjch]hhdmi_cec_log_addr}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjcubj )}(hhh](h)}(h=Set the logical address of the CEC adapter inside the bridge.h]h=Set the logical address of the CEC adapter inside the bridge.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjcubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj dhhhNhNubj3 )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj dubh flag in their }(hj dhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj%dh]hdrm_bridge->ops}(hj'dhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj#dubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj dubh.}(hj dhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBdhMhjcubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjMdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjcubeh}(h]h ]h"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]uh1j{ hjchMhjKubj| )}(hX/``hdmi_cec_transmit`` Transmit the message using the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``hdmi_cec_transmit``h]j )}(hjndh]hhdmi_cec_transmit}(hjpdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjldubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjhdubj )}(hhh](h)}(h=Transmit the message using the CEC adapter inside the bridge.h]h=Transmit the message using the CEC adapter inside the bridge.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjdubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjdhhhNhNubj3 )}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjdubh flag in their }(hjdhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjdh]hdrm_bridge->ops}(hjdhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjdubh.}(hjdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjdhM hjdubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjdubeh}(h]h ]h"]h$]h&]uh1j hjhdubeh}(h]h ]h"]h$]h&]uh1j{ hjdhMhjKubj| )}(hX"``dp_audio_startup`` Called when ASoC starts a DisplayPort audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``dp_audio_startup``h]j )}(hjdh]hdp_audio_startup}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjdubj )}(hhh](h)}(h9Called when ASoC starts a DisplayPort audio stream setup.h]h9Called when ASoC starts a DisplayPort audio stream setup.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjeubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj#ehhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj+ehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#eubh flag in their }(hj#ehhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hj?eh]hdrm_bridge->ops}(hjAehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj=eubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj#eubh.}(hj#ehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\ehMhjeubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjgehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjeubeh}(h]h ]h"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]uh1j{ hjehMhjKubj| )}(hX>``dp_audio_prepare`` Configures DisplayPort audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``dp_audio_prepare``h]j )}(hjeh]hdp_audio_prepare}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM-hjeubj )}(hhh](h)}(hQConfigures DisplayPort audio stream. Can be called multiple times for each setup.h]hQConfigures DisplayPort audio stream. Can be called multiple times for each setup.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM&hjeubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjehhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjeubh flag in their }(hjehhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjeh]hdrm_bridge->ops}(hjehhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM)hjeubh.}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjehM)hjeubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM,hjeubeh}(h]h ]h"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]uh1j{ hjehM-hjKubj| )}(hX``dp_audio_shutdown`` Shut down the DisplayPort audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``dp_audio_shutdown``h]j )}(hjfh]hdp_audio_shutdown}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM<hjfubj )}(hhh](h)}(h'Shut down the DisplayPort audio stream.h]h'Shut down the DisplayPort audio stream.}(hj.fhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM6hj+fubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hj=fhhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjEfhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=fubh flag in their }(hj=fhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjYfh]hdrm_bridge->ops}(hj[fhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjWfubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM8hj=fubh.}(hj=fhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjvfhM8hj+fubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM;hj+fubeh}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hj*fhM<hjKubj| )}(hX``dp_audio_mute_stream`` Mute/unmute DisplayPort audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](j )}(h``dp_audio_mute_stream``h]j )}(hjfh]hdp_audio_mute_stream}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMJhjfubj )}(hhh](h)}(h%Mute/unmute DisplayPort audio stream.h]h%Mute/unmute DisplayPort audio stream.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMDhjfubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjfhhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubh flag in their }(hjfhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjfh]hdrm_bridge->ops}(hjfhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMFhjfubh.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjghMFhjfubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMIhjfubeh}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hjfhMJhjKubj| )}(hH``debugfs_init`` Allows bridges to create bridge-specific debugfs files.h](j )}(h``debugfs_init``h]j )}(hj/gh]h debugfs_init}(hj1ghhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-gubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMRhj)gubj )}(hhh]h)}(h7Allows bridges to create bridge-specific debugfs files.h]h7Allows bridges to create bridge-specific debugfs files.}(hjHghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMShjEgubah}(h]h ]h"]h$]h&]uh1j hj)gubeh}(h]h ]h"]h$]h&]uh1j{ hjDghMRhjKubeh}(h]h ]h"]h$]h&]uh1jv hj8Kubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_timings (C struct)c.drm_bridge_timingshNtauh1j hjIhhhNhNubj )}(hhh](j )}(hdrm_bridge_timingsh]j )}(hstruct drm_bridge_timingsh](j )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjghhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMYubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjghhhjghMYubj )}(hdrm_bridge_timingsh]j )}(hjgh]hdrm_bridge_timings}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubah}(h]h ](j j eh"]h$]h&]j j uh1j hjghhhjghMYubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjghhhjghMYubah}(h]j|gah ](j j eh"]h$]h&]j j )j huh1j hjghMYhj~ghhubj )}(hhh]h)}(h!timing information for the bridgeh]h!timing information for the bridge}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMZhjghhubah}(h]h ]h"]h$]h&]uh1j hj~ghhhjghMYubeh}(h]h ](j structeh"]h$]h&]j" j j# jgj$ jgj% j& j' uh1j hhhjIhNhNubj) )}(hX2**Definition**:: struct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; }; **Members** ``input_bus_flags`` Tells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `. ``setup_time_ps`` Defines the time in picoseconds the input data lines must be stable before the clock edge. ``hold_time_ps`` Defines the time in picoseconds taken for the bridge to sample the input signal after the clock edge. ``dual_link`` True if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjgubh:}(hjghhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM^hjgubjN )}(hxstruct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; };h]hxstruct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; };}hjhsbah}(h]h ]h"]h$]h&]j j uh1jM h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM`hjgubh)}(h **Members**h]j3 )}(hjhh]hMembers}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjhubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMghjgubjw )}(hhh](j| )}(h``input_bus_flags`` Tells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `. h](j )}(h``input_bus_flags``h]j )}(hj8hh]hinput_bus_flags}(hj:hhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6hubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMahj2hubj )}(hhh]h)}(hTells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `.h](hyTells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also }(hjQhhhhNhNubh)}(h8:c:type:`drm_display_info->bus_flags `h]j )}(hj[hh]hdrm_display_info->bus_flags}(hj]hhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjYhubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_display_infouh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM_hjQhubh.}(hjQhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhhM_hjNhubah}(h]h ]h"]h$]h&]uh1j hj2hubeh}(h]h ]h"]h$]h&]uh1j{ hjMhhMahj/hubj| )}(hm``setup_time_ps`` Defines the time in picoseconds the input data lines must be stable before the clock edge. h](j )}(h``setup_time_ps``h]j )}(hjhh]h setup_time_ps}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhhjhubj )}(hhh]h)}(hZDefines the time in picoseconds the input data lines must be stable before the clock edge.h]hZDefines the time in picoseconds the input data lines must be stable before the clock edge.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMghjhubah}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjhhMhhj/hubj| )}(hw``hold_time_ps`` Defines the time in picoseconds taken for the bridge to sample the input signal after the clock edge. h](j )}(h``hold_time_ps``h]j )}(hjhh]h hold_time_ps}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMohjhubj )}(hhh]h)}(heDefines the time in picoseconds taken for the bridge to sample the input signal after the clock edge.h]heDefines the time in picoseconds taken for the bridge to sample the input signal after the clock edge.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMnhjhubah}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjhhMohj/hubj| )}(h``dual_link`` True if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h](j )}(h ``dual_link``h]j )}(hj ih]h dual_link}(hj ihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMvhjiubj )}(hhh]h)}(hTrue if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h]hTrue if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.}(hj"ihhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMuhjiubah}(h]h ]h"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]uh1j{ hjihMvhj/hubeh}(h]h ]h"]h$]h&]uh1jv hjgubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_ops (C enum)c.drm_bridge_opshNtauh1j hjIhhhNhNubj )}(hhh](j )}(hdrm_bridge_opsh]j )}(henum drm_bridge_opsh](j )}(hj7h]henum}(hjcihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ihhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM}ubj )}(h h]h }(hjqihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ihhhjpihM}ubj )}(hdrm_bridge_opsh]j )}(hj]ih]hdrm_bridge_ops}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_ihhhjpihM}ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[ihhhjpihM}ubah}(h]jViah ](j j eh"]h$]h&]j j )j huh1j hjpihM}hjXihhubj )}(hhh]h)}(h-Bitmask of operations supported by the bridgeh]h-Bitmask of operations supported by the bridge}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM~hjihhubah}(h]h ]h"]h$]h&]uh1j hjXihhhjpihM}ubeh}(h]h ](j enumeh"]h$]h&]j" j j# jij$ jij% j& j' uh1j hhhjIhNhNubj) )}(hX**Constants** ``DRM_BRIDGE_OP_DETECT`` The bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback. ``DRM_BRIDGE_OP_EDID`` The bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback. ``DRM_BRIDGE_OP_HPD`` The bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically. ``DRM_BRIDGE_OP_MODES`` The bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback. ``DRM_BRIDGE_OP_HDMI`` The bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. ``DRM_BRIDGE_OP_HDMI_AUDIO`` The bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag. ``DRM_BRIDGE_OP_DP_AUDIO`` The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag. ``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER`` The bridge requires CEC notifier to be present. ``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER`` The bridge requires CEC adapter to be present. ``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks. ``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](h)}(h **Constants**h]j3 )}(hjih]h Constants}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjiubjw )}(hhh](j| )}(h``DRM_BRIDGE_OP_DETECT`` The bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback. h](j )}(h``DRM_BRIDGE_OP_DETECT``h]j )}(hjih]hDRM_BRIDGE_OP_DETECT}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjiubj )}(hhh]h)}(hThe bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback.h](hgThe bridge can detect displays connected to its output. Bridges that set this flag shall implement the }(hjihhhNhNubh)}(h5:c:type:`drm_bridge_funcs->detect `h]j )}(hj jh]hdrm_bridge_funcs->detect}(hj jhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjiubh callback.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&jhMhjiubah}(h]h ]h"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]uh1j{ hjihMhjiubj| )}(h``DRM_BRIDGE_OP_EDID`` The bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback. h](j )}(h``DRM_BRIDGE_OP_EDID``h]j )}(hjCjh]hDRM_BRIDGE_OP_EDID}(hjEjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAjubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj=jubj )}(hhh]h)}(hThe bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback.h](hxThe bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the }(hj\jhhhNhNubh)}(h8:c:type:`drm_bridge_funcs->edid_read `h]j )}(hjfjh]hdrm_bridge_funcs->edid_read}(hjhjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjdjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj\jubh callback.}(hj\jhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjhMhjYjubah}(h]h ]h"]h$]h&]uh1j hj=jubeh}(h]h ]h"]h$]h&]uh1j{ hjXjhMhjiubj| )}(hXX``DRM_BRIDGE_OP_HPD`` The bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically. h](j )}(h``DRM_BRIDGE_OP_HPD``h]j )}(hjjh]hDRM_BRIDGE_OP_HPD}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjjubj )}(hhh]h)}(hXAThe bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically.h](hxThe bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the }(hjjhhhNhNubh)}(h9:c:type:`drm_bridge_funcs->hpd_enable `h]j )}(hjjh]hdrm_bridge_funcs->hpd_enable}(hjjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjjubh and }(hjjhhhNhNubh)}(h::c:type:`drm_bridge_funcs->hpd_disable `h]j )}(hjjh]hdrm_bridge_funcs->hpd_disable}(hjjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjjhMhjjubhQ callbacks if they support enabling and disabling hot-plug detection dynamically.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjhMhjjubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMhjiubj| )}(hX.``DRM_BRIDGE_OP_MODES`` The bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback. h](j )}(h``DRM_BRIDGE_OP_MODES``h]j )}(hj kh]hDRM_BRIDGE_OP_MODES}(hj"khhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubj )}(hhh]h)}(hXThe bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback.h](hThe bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by }(hj9khhhNhNubj3 )}(h**DRM_BRIDGE_OP_EDID**h]hDRM_BRIDGE_OP_EDID}(hjAkhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9kubh1. Bridges that set this flag shall implement the }(hj9khhhNhNubh)}(h8:c:type:`drm_bridge_funcs->get_modes `h]j )}(hjUkh]hdrm_bridge_funcs->get_modes}(hjWkhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjSkubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj9kubh callback.}(hj9khhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjrkhMhj6kubah}(h]h ]h"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]uh1j{ hj5khMhjiubj| )}(hXh``DRM_BRIDGE_OP_HDMI`` The bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. h](j )}(h``DRM_BRIDGE_OP_HDMI``h]j )}(hjkh]hDRM_BRIDGE_OP_HDMI}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubj )}(hhh](h)}(hXThe bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks.h](hThe bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the }(hjkhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->clear_avi_infoframe `h]j )}(hjkh]h%drm_bridge_funcs->clear_avi_infoframe}(hjkhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubh, }(hjkhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->write_avi_infoframe `h]j )}(hjkh]h%drm_bridge_funcs->write_avi_infoframe}(hjkhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjkhMhjkubh, }hjksbh)}(hC:c:type:`drm_bridge_funcs->clear_hdmi_infoframe `h]j )}(hjkh]h&drm_bridge_funcs->clear_hdmi_infoframe}(hjkhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjkhMhjkubh and }(hjkhhhNhNubh)}(hC:c:type:`drm_bridge_funcs->write_hdmi_infoframe `h]j )}(hjlh]h&drm_bridge_funcs->write_hdmi_infoframe}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjkhMhjkubh callbacks.}(hjkhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjkhMhjkubh)}(hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers.h]hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers.}(hjClhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubeh}(h]h ]h"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]uh1j{ hjkhMhjiubj| )}(hX ``DRM_BRIDGE_OP_HDMI_AUDIO`` The bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag. h](j )}(h``DRM_BRIDGE_OP_HDMI_AUDIO``h]j )}(hjdlh]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjflhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjblubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj^lubj )}(hhh](h)}(hXThe bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks.h](hYThe bridge provides HDMI audio operations. Bridges that set this flag must implement the }(hj}lhhhNhNubh)}(hA:c:type:`drm_bridge_funcs->hdmi_audio_prepare `h]j )}(hjlh]h$drm_bridge_funcs->hdmi_audio_prepare}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj}lubh and }(hj}lhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->hdmi_audio_shutdown `h]j )}(hjlh]h%drm_bridge_funcs->hdmi_audio_shutdown}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjlhMhj}lubh% callbacks. If the bridge implements }(hj}lhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}lubh, it also must implement }(hj}lhhhNhNubh)}(hI:c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe `h]j )}(hjlh]h,drm_bridge_funcs->hdmi_write_audio_infoframe}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjlhMhj}lubh and }hj}lsbh)}(hJ:c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe `h]j )}(hjmh]h-drm_bridge_funcs->hdmi_cleaer_audio_infoframe}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjlhMhj}lubh callbacks.}(hj}lhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjlhMhjzlubh)}(hXNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag.h](hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets }(hj*mhhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj2mhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*mubh* if there is a bridge that sets this flag.}(hj*mhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjzlubeh}(h]h ]h"]h$]h&]uh1j hj^lubeh}(h]h ]h"]h$]h&]uh1j{ hjylhMhjiubj| )}(hX$``DRM_BRIDGE_OP_DP_AUDIO`` The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag. h](j )}(h``DRM_BRIDGE_OP_DP_AUDIO``h]j )}(hj]mh]hDRM_BRIDGE_OP_DP_AUDIO}(hj_mhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[mubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjWmubj )}(hhh](h)}(hThe bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks.h](h`The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the }(hjvmhhhNhNubh)}(h?:c:type:`drm_bridge_funcs->dp_audio_prepare `h]j )}(hjmh]h"drm_bridge_funcs->dp_audio_prepare}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj~mubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjvmubh and }(hjvmhhhNhNubh)}(h@:c:type:`drm_bridge_funcs->dp_audio_shutdown `h]j )}(hjmh]h#drm_bridge_funcs->dp_audio_shutdown}(hjmhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjmhMhjvmubh callbacks.}(hjvmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjmhMhjsmubh)}(hXNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag.h](hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets }(hjmhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjmubh* if there is a bridge that sets this flag.}(hjmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjsmubeh}(h]h ]h"]h$]h&]uh1j hjWmubeh}(h]h ]h"]h$]h&]uh1j{ hjrmhMhjiubj| )}(hT``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER`` The bridge requires CEC notifier to be present. h](j )}(h#``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER``h]j )}(hjmh]hDRM_BRIDGE_OP_HDMI_CEC_NOTIFIER}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjmubj )}(hhh]h)}(h/The bridge requires CEC notifier to be present.h]h/The bridge requires CEC notifier to be present.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjnubah}(h]h ]h"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]uh1j{ hjnhMhjiubj| )}(hR``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER`` The bridge requires CEC adapter to be present. h](j )}(h"``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER``h]j )}(hj8nh]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj:nhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6nubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj2nubj )}(hhh]h)}(h.The bridge requires CEC adapter to be present.h]h.The bridge requires CEC adapter to be present.}(hjQnhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjNnubah}(h]h ]h"]h$]h&]uh1j hj2nubeh}(h]h ]h"]h$]h&]uh1j{ hjMnhMhjiubj| )}(h``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks. h](j )}(h(``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME``h]j )}(hjrnh]h$DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME}(hjtnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpnubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjlnubj )}(hhh]h)}(hThe bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks.h](hThe bridge supports }(hjnhhhNhNubh)}(hK:c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe `h]j )}(hjnh]h.drm_bridge_funcs->hdmi_write_hdr_drm_infoframe}(hjnhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjnubh and }(hjnhhhNhNubh)}(hK:c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe `h]j )}(hjnh]h.drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe}(hjnhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjnhMhjnubh callbacks.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjnhMhjnubah}(h]h ]h"]h$]h&]uh1j hjlnubeh}(h]h ]h"]h$]h&]uh1j{ hjnhMhjiubj| )}(h``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](j )}(h$``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME``h]j )}(hjnh]h DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjnubj )}(hhh]h)}(hThe bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](hThe bridge supports }(hj ohhhNhNubh)}(hG:c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe `h]j )}(hjoh]h*drm_bridge_funcs->hdmi_write_spd_infoframe}(hjohhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj oubh and }(hj ohhhNhNubh)}(hG:c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe `h]j )}(hj9oh]h*drm_bridge_funcs->hdmi_clear_spd_infoframe}(hj;ohhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj7oubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj2ohMhj oubh callbacks.}(hj ohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2ohMhjoubah}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1j{ hjohMhjiubeh}(h]h ]h"]h$]h&]uh1jv hjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge (C struct) c.drm_bridgehNtauh1j hjIhhhNhNubj )}(hhh](j )}(h drm_bridgeh]j )}(hstruct drm_bridgeh](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhjohMubj )}(h drm_bridgeh]j )}(hjoh]h drm_bridge}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjohhhjohMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjohhhjohMubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j hjohMhjohhubj )}(hhh]h)}(h$central DRM bridge control structureh]h$central DRM bridge control structure}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjohhubah}(h]h ]h"]h$]h&]uh1j hjohhhjohMubeh}(h]h ](j structeh"]h$]h&]j" j j# joj$ joj% j& j' uh1j hhhjIhNhNubj) )}(hX^**Definition**:: struct drm_bridge { struct drm_private_obj base; struct drm_device *dev; struct drm_encoder *encoder; struct list_head chain_node; struct device_node *of_node; struct list_head list; const struct drm_bridge_timings *timings; const struct drm_bridge_funcs *funcs; void *container; struct kref refcount; bool unplugged; void *driver_private; enum drm_bridge_ops ops; int type; bool interlace_allowed; bool ycbcr_420_allowed; bool pre_enable_prev_first; bool support_hdcp; struct i2c_adapter *ddc; const char *vendor; const char *product; unsigned int supported_formats; unsigned int max_bpc; struct device *hdmi_cec_dev; struct device *hdmi_audio_dev; int hdmi_audio_max_i2s_playback_channels; u64 hdmi_audio_i2s_formats; unsigned int hdmi_audio_spdif_playback : 1; int hdmi_audio_dai_port; const char *hdmi_cec_adapter_name; u8 hdmi_cec_available_las; struct mutex hpd_mutex; struct mutex hpd_state_mutex; void (*hpd_cb)(void *data, enum drm_connector_status status); void *hpd_data; struct drm_bridge *next_bridge; }; **Members** ``base`` inherit from :c:type:`drm_private_object` ``dev`` DRM device this bridge belongs to ``encoder`` encoder to which this bridge is connected ``chain_node`` used to form a bridge chain ``of_node`` device node pointer to the bridge ``list`` to keep track of all added bridges ``timings`` the timing specification for the bridge, if any (may be NULL) ``funcs`` control functions ``container`` Pointer to the private driver struct embedding this **struct** drm_bridge. ``refcount`` reference count of users referencing this bridge. ``unplugged`` Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug(). ``driver_private`` pointer to the bridge driver's internal context ``ops`` bitmask of operations supported by the bridge ``type`` Type of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display. ``interlace_allowed`` Indicate that the bridge can handle interlaced modes. ``ycbcr_420_allowed`` Indicate that the bridge can handle YCbCr 420 output. ``pre_enable_prev_first`` The bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral. ``support_hdcp`` Indicate that the bridge supports HDCP. ``ddc`` Associated I2C adapter for DDC access, if any. ``vendor`` Vendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. ``product`` Name of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. ``supported_formats`` Bitmask of **drm_output_color_format** listing supported output formats. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. ``max_bpc`` Maximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. ``hdmi_cec_dev`` device to be used as a containing device for CEC functions. ``hdmi_audio_dev`` device to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set. ``hdmi_audio_max_i2s_playback_channels`` maximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. ``hdmi_audio_i2s_formats`` supported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. ``hdmi_audio_spdif_playback`` set if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. ``hdmi_audio_dai_port`` sound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used. ``hdmi_cec_adapter_name`` the name of the adapter to register ``hdmi_cec_available_las`` number of logical addresses, CEC_MAX_LOG_ADDRS if unset ``hpd_mutex`` Protects the **hpd_cb** and **hpd_data** fields. ``hpd_state_mutex`` Protects the HPD en/disablement state for the bridge. ``hpd_cb`` Hot plug detection callback, registered with drm_bridge_hpd_enable(). ``hpd_data`` Private data passed to the Hot plug detection callback **hpd_cb**. ``next_bridge`` Pointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjoubh:}(hjohhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoubjN )}(hXstruct drm_bridge { struct drm_private_obj base; struct drm_device *dev; struct drm_encoder *encoder; struct list_head chain_node; struct device_node *of_node; struct list_head list; const struct drm_bridge_timings *timings; const struct drm_bridge_funcs *funcs; void *container; struct kref refcount; bool unplugged; void *driver_private; enum drm_bridge_ops ops; int type; bool interlace_allowed; bool ycbcr_420_allowed; bool pre_enable_prev_first; bool support_hdcp; struct i2c_adapter *ddc; const char *vendor; const char *product; unsigned int supported_formats; unsigned int max_bpc; struct device *hdmi_cec_dev; struct device *hdmi_audio_dev; int hdmi_audio_max_i2s_playback_channels; u64 hdmi_audio_i2s_formats; unsigned int hdmi_audio_spdif_playback : 1; int hdmi_audio_dai_port; const char *hdmi_cec_adapter_name; u8 hdmi_cec_available_las; struct mutex hpd_mutex; struct mutex hpd_state_mutex; void (*hpd_cb)(void *data, enum drm_connector_status status); void *hpd_data; struct drm_bridge *next_bridge; };h]hXstruct drm_bridge { struct drm_private_obj base; struct drm_device *dev; struct drm_encoder *encoder; struct list_head chain_node; struct device_node *of_node; struct list_head list; const struct drm_bridge_timings *timings; const struct drm_bridge_funcs *funcs; void *container; struct kref refcount; bool unplugged; void *driver_private; enum drm_bridge_ops ops; int type; bool interlace_allowed; bool ycbcr_420_allowed; bool pre_enable_prev_first; bool support_hdcp; struct i2c_adapter *ddc; const char *vendor; const char *product; unsigned int supported_formats; unsigned int max_bpc; struct device *hdmi_cec_dev; struct device *hdmi_audio_dev; int hdmi_audio_max_i2s_playback_channels; u64 hdmi_audio_i2s_formats; unsigned int hdmi_audio_spdif_playback : 1; int hdmi_audio_dai_port; const char *hdmi_cec_adapter_name; u8 hdmi_cec_available_las; struct mutex hpd_mutex; struct mutex hpd_state_mutex; void (*hpd_cb)(void *data, enum drm_connector_status status); void *hpd_data; struct drm_bridge *next_bridge; };}hjpsbah}(h]h ]h"]h$]h&]j j uh1jM h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjoubh)}(h **Members**h]j3 )}(hj"ph]hMembers}(hj$phhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj pubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjoubjw )}(hhh](j| )}(h3``base`` inherit from :c:type:`drm_private_object` h](j )}(h``base``h]j )}(hjAph]hbase}(hjCphhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?pubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj;pubj )}(hhh]h)}(h)inherit from :c:type:`drm_private_object`h](h inherit from }(hjZphhhNhNubh)}(h:c:type:`drm_private_object`h]j )}(hjdph]hdrm_private_object}(hjfphhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjbpubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_private_objectuh1hhjVphMhjZpubeh}(h]h ]h"]h$]h&]uh1hhjVphMhjWpubah}(h]h ]h"]h$]h&]uh1j hj;pubeh}(h]h ]h"]h$]h&]uh1j{ hjVphMhj8pubj| )}(h*``dev`` DRM device this bridge belongs to h](j )}(h``dev``h]j )}(hjph]hdev}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjpubj )}(hhh]h)}(h!DRM device this bridge belongs toh]h!DRM device this bridge belongs to}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjphMhj8pubj| )}(h6``encoder`` encoder to which this bridge is connected h](j )}(h ``encoder``h]j )}(hjph]hencoder}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjpubj )}(hhh]h)}(h)encoder to which this bridge is connectedh]h)encoder to which this bridge is connected}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjphMhj8pubj| )}(h+``chain_node`` used to form a bridge chain h](j )}(h``chain_node``h]j )}(hj qh]h chain_node}(hj qhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj qubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjqubj )}(hhh]h)}(hused to form a bridge chainh]hused to form a bridge chain}(hj$qhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj qhMhj!qubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hj qhMhj8pubj| )}(h.``of_node`` device node pointer to the bridge h](j )}(h ``of_node``h]j )}(hjDqh]hof_node}(hjFqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBqubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj>qubj )}(hhh]h)}(h!device node pointer to the bridgeh]h!device node pointer to the bridge}(hj]qhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYqhMhjZqubah}(h]h ]h"]h$]h&]uh1j hj>qubeh}(h]h ]h"]h$]h&]uh1j{ hjYqhMhj8pubj| )}(h,``list`` to keep track of all added bridges h](j )}(h``list``h]j )}(hj}qh]hlist}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{qubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjwqubj )}(hhh]h)}(h"to keep track of all added bridgesh]h"to keep track of all added bridges}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjqubah}(h]h ]h"]h$]h&]uh1j hjwqubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMhj8pubj| )}(hJ``timings`` the timing specification for the bridge, if any (may be NULL) h](j )}(h ``timings``h]j )}(hjqh]htimings}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjqubj )}(hhh]h)}(h=the timing specification for the bridge, if any (may be NULL)h]h=the timing specification for the bridge, if any (may be NULL)}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjqubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMhj8pubj| )}(h``funcs`` control functions h](j )}(h ``funcs``h]j )}(hjqh]hfuncs}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjqubj )}(hhh]h)}(hcontrol functionsh]hcontrol functions}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMhjrubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjrhMhj8pubj| )}(hY``container`` Pointer to the private driver struct embedding this **struct** drm_bridge. h](j )}(h ``container``h]j )}(hj(rh]h container}(hj*rhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&rubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj"rubj )}(hhh]h)}(hJPointer to the private driver struct embedding this **struct** drm_bridge.h](h4Pointer to the private driver struct embedding this }(hjArhhhNhNubj3 )}(h **struct**h]hstruct}(hjIrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjArubh drm_bridge.}(hjArhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj>rubah}(h]h ]h"]h$]h&]uh1j hj"rubeh}(h]h ]h"]h$]h&]uh1j{ hj=rhMhj8pubj| )}(h?``refcount`` reference count of users referencing this bridge. h](j )}(h ``refcount``h]j )}(hjtrh]hrefcount}(hjvrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrrubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjnrubj )}(hhh]h)}(h1reference count of users referencing this bridge.h]h1reference count of users referencing this bridge.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMhjrubah}(h]h ]h"]h$]h&]uh1j hjnrubeh}(h]h ]h"]h$]h&]uh1j{ hjrhMhj8pubj| )}(hm``unplugged`` Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug(). h](j )}(h ``unplugged``h]j )}(hjrh]h unplugged}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjrubj )}(hhh]h)}(h^Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug().h]h^Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug().}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjrubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjrhMhj8pubj| )}(hC``driver_private`` pointer to the bridge driver's internal context h](j )}(h``driver_private``h]j )}(hjrh]hdriver_private}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM hjrubj )}(hhh]h)}(h/pointer to the bridge driver's internal contexth]h1pointer to the bridge driver’s internal context}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhM hjrubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjrhM hj8pubj| )}(h6``ops`` bitmask of operations supported by the bridge h](j )}(h``ops``h]j )}(hj sh]hops}(hj"shhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjsubj )}(hhh]h)}(h-bitmask of operations supported by the bridgeh]h-bitmask of operations supported by the bridge}(hj9shhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5shMhj6subah}(h]h ]h"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]uh1j{ hj5shMhj8pubj| )}(h``type`` Type of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display. h](j )}(h``type``h]j )}(hjYsh]htype}(hj[shhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWsubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjSsubj )}(hhh]h)}(hType of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display.h]hType of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display.}(hjrshhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjosubah}(h]h ]h"]h$]h&]uh1j hjSsubeh}(h]h ]h"]h$]h&]uh1j{ hjnshMhj8pubj| )}(hL``interlace_allowed`` Indicate that the bridge can handle interlaced modes. h](j )}(h``interlace_allowed``h]j )}(hjsh]hinterlace_allowed}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjsubj )}(hhh]h)}(h5Indicate that the bridge can handle interlaced modes.h]h5Indicate that the bridge can handle interlaced modes.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjsubah}(h]h ]h"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]uh1j{ hjshMhj8pubj| )}(hL``ycbcr_420_allowed`` Indicate that the bridge can handle YCbCr 420 output. h](j )}(h``ycbcr_420_allowed``h]j )}(hjsh]hycbcr_420_allowed}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjsubj )}(hhh]h)}(h5Indicate that the bridge can handle YCbCr 420 output.h]h5Indicate that the bridge can handle YCbCr 420 output.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjsubah}(h]h ]h"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]uh1j{ hjshMhj8pubj| )}(hX``pre_enable_prev_first`` The bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral. h](j )}(h``pre_enable_prev_first``h]j )}(hjth]hpre_enable_prev_first}(hj thhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM%hjtubj )}(hhh]h)}(hThe bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral.h](h)The bridge requires that the prev bridge }(hj thhhNhNubj3 )}(h**pre_enable**h]h pre_enable}(hj(thhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj tubh function is called before its }(hj thhhNhNubj3 )}(h**pre_enable**h]h pre_enable}(hj:thhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj tubh, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral.}(hj thhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM!hjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthM%hj8pubj| )}(h9``support_hdcp`` Indicate that the bridge supports HDCP. h](j )}(h``support_hdcp``h]j )}(hjeth]h support_hdcp}(hjgthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjctubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM)hj_tubj )}(hhh]h)}(h'Indicate that the bridge supports HDCP.h]h'Indicate that the bridge supports HDCP.}(hj~thhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzthM)hj{tubah}(h]h ]h"]h$]h&]uh1j hj_tubeh}(h]h ]h"]h$]h&]uh1j{ hjzthM)hj8pubj| )}(h7``ddc`` Associated I2C adapter for DDC access, if any. h](j )}(h``ddc``h]j )}(hjth]hddc}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM-hjtubj )}(hhh]h)}(h.Associated I2C adapter for DDC access, if any.h]h.Associated I2C adapter for DDC access, if any.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthM-hjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthM-hj8pubj| )}(h``vendor`` Vendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. h](j )}(h ``vendor``h]j )}(hjth]hvendor}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM3hjtubj )}(hhh]h)}(huVendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set.h](hWVendor of the product to be used for the SPD InfoFrame generation. This is required if }(hjthhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjtubh is set.}(hjthhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM2hjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthM3hj8pubj| )}(h``product`` Name of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. h](j )}(h ``product``h]j )}(hj#uh]hproduct}(hj%uhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!uubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM9hjuubj )}(hhh]h)}(hsName of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set.h](hUName of the product to be used for the SPD InfoFrame generation. This is required if }(hjhjuubah}(h]h ]h"]h$]h&]uh1j hjiuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhM@hj8pubj| )}(h``max_bpc`` Maximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. h](j )}(h ``max_bpc``h]j )}(hjuh]hmax_bpc}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMGhjuubj )}(hhh]h)}(hMaximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set.h](hjMaximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if }(hjuhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubh is set.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMEhjuubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMGhj8pubj| )}(hM``hdmi_cec_dev`` device to be used as a containing device for CEC functions. h](j )}(h``hdmi_cec_dev``h]j )}(hjvh]h hdmi_cec_dev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMMhjvubj )}(hhh]h)}(h;device to be used as a containing device for CEC functions.h]h;device to be used as a containing device for CEC functions.}(hj2vhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMLhj/vubah}(h]h ]h"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]uh1j{ hj.vhMMhj8pubj| )}(h``hdmi_audio_dev`` device to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set. h](j )}(h``hdmi_audio_dev``h]j )}(hjSvh]hhdmi_audio_dev}(hjUvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQvubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMShjMvubj )}(hhh]h)}(hdevice to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set.h](h>device to be used as a parent for the HDMI Codec if either of }(hjlvhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjtvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjlvubh or }(hjlvhhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjlvubh is set.}(hjlvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMRhjivubah}(h]h ]h"]h$]h&]uh1j hjMvubeh}(h]h ]h"]h$]h&]uh1j{ hjhvhMShj8pubj| )}(h``hdmi_audio_max_i2s_playback_channels`` maximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](j )}(h(``hdmi_audio_max_i2s_playback_channels``h]j )}(hjvh]h$hdmi_audio_max_i2s_playback_channels}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMZhjvubj )}(hhh]h)}(hkmaximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](h0maximum number of playback I2S channels for the }(hjvhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjvubh or }(hjvhhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjvubh.}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMXhjvubah}(h]h ]h"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]uh1j{ hjvhMZhj8pubj| )}(h``hdmi_audio_i2s_formats`` supported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](j )}(h``hdmi_audio_i2s_formats``h]j )}(hjwh]hhdmi_audio_i2s_formats}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj wubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMbhj wubj )}(hhh]h)}(hsupported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](hsupported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting }(hj(whhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj0whhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(wubh or }(hj(whhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjBwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(wubh.}(hj(whhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM_hj%wubah}(h]h ]h"]h$]h&]uh1j hj wubeh}(h]h ]h"]h$]h&]uh1j{ hj$whMbhj8pubj| )}(h``hdmi_audio_spdif_playback`` set if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](j )}(h``hdmi_audio_spdif_playback``h]j )}(hjmwh]hhdmi_audio_spdif_playback}(hjowhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkwubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhhjgwubj )}(hhh]h)}(hkset if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](h0set if this bridge has S/PDIF playback port for }(hjwhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwubh or }(hjwhhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwubh.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMghjwubah}(h]h ]h"]h$]h&]uh1j hjgwubeh}(h]h ]h"]h$]h&]uh1j{ hjwhMhhj8pubj| )}(h``hdmi_audio_dai_port`` sound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used. h](j )}(h``hdmi_audio_dai_port``h]j )}(hjwh]hhdmi_audio_dai_port}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMohjwubj )}(hhh]h)}(hosound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used.h](hsound DAI port for either of }(hjwhhhNhNubj3 )}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwubh and }(hjwhhhNhNubj3 )}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwubh, -1 if it is not used.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMmhjwubah}(h]h ]h"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]uh1j{ hjwhMohj8pubj| )}(h>``hdmi_cec_adapter_name`` the name of the adapter to register h](j )}(h``hdmi_cec_adapter_name``h]j )}(hj)xh]hhdmi_cec_adapter_name}(hj+xhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'xubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMthj#xubj )}(hhh]h)}(h#the name of the adapter to registerh]h#the name of the adapter to register}(hjBxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>xhMthj?xubah}(h]h ]h"]h$]h&]uh1j hj#xubeh}(h]h ]h"]h$]h&]uh1j{ hj>xhMthj8pubj| )}(hS``hdmi_cec_available_las`` number of logical addresses, CEC_MAX_LOG_ADDRS if unset h](j )}(h``hdmi_cec_available_las``h]j )}(hjbxh]hhdmi_cec_available_las}(hjdxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`xubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMyhj\xubj )}(hhh]h)}(h7number of logical addresses, CEC_MAX_LOG_ADDRS if unseth]h7number of logical addresses, CEC_MAX_LOG_ADDRS if unset}(hj{xhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwxhMyhjxxubah}(h]h ]h"]h$]h&]uh1j hj\xubeh}(h]h ]h"]h$]h&]uh1j{ hjwxhMyhj8pubj| )}(h?``hpd_mutex`` Protects the **hpd_cb** and **hpd_data** fields. h](j )}(h ``hpd_mutex``h]j )}(hjxh]h hpd_mutex}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjxubj )}(hhh]h)}(h0Protects the **hpd_cb** and **hpd_data** fields.h](h Protects the }(hjxhhhNhNubj3 )}(h **hpd_cb**h]hhpd_cb}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjxubh and }(hjxhhhNhNubj3 )}(h **hpd_data**h]hhpd_data}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjxubh fields.}(hjxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhMhjxubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjxhMhj8pubj| )}(hJ``hpd_state_mutex`` Protects the HPD en/disablement state for the bridge. h](j )}(h``hpd_state_mutex``h]j )}(hjxh]hhpd_state_mutex}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjxubj )}(hhh]h)}(h5Protects the HPD en/disablement state for the bridge.h]h5Protects the HPD en/disablement state for the bridge.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj yhMhjyubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hj yhMhj8pubj| )}(hQ``hpd_cb`` Hot plug detection callback, registered with drm_bridge_hpd_enable(). h](j )}(h ``hpd_cb``h]j )}(hj1yh]hhpd_cb}(hj3yhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/yubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj+yubj )}(hhh]h)}(hEHot plug detection callback, registered with drm_bridge_hpd_enable().h]hEHot plug detection callback, registered with drm_bridge_hpd_enable().}(hjJyhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjGyubah}(h]h ]h"]h$]h&]uh1j hj+yubeh}(h]h ]h"]h$]h&]uh1j{ hjFyhMhj8pubj| )}(hP``hpd_data`` Private data passed to the Hot plug detection callback **hpd_cb**. h](j )}(h ``hpd_data``h]j )}(hjkyh]hhpd_data}(hjmyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiyubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjeyubj )}(hhh]h)}(hBPrivate data passed to the Hot plug detection callback **hpd_cb**.h](h7Private data passed to the Hot plug detection callback }(hjyhhhNhNubj3 )}(h **hpd_cb**h]hhpd_cb}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjyubh.}(hjyhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjyubah}(h]h ]h"]h$]h&]uh1j hjeyubeh}(h]h ]h"]h$]h&]uh1j{ hjyhMhj8pubj| )}(hX``next_bridge`` Pointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h](j )}(h``next_bridge``h]j )}(hjyh]h next_bridge}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjyubj )}(hhh]h)}(hXPointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h]hXPointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjyubah}(h]h ]h"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]uh1j{ hjyhMhj8pubeh}(h]h ]h"]h$]h&]uh1jv hjoubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j devm_drm_bridge_alloc (C macro)c.devm_drm_bridge_allochNtauh1j hjIhhhNhNubj )}(hhh](j )}(hdevm_drm_bridge_alloch]j )}(hdevm_drm_bridge_alloch]j )}(hdevm_drm_bridge_alloch]j )}(hj zh]hdevm_drm_bridge_alloc}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ](j j eh"]h$]h&]j j uh1j hj zhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hj zhhhj(zhMubah}(h]jzah ](j j eh"]h$]h&]j j )j huh1j hj(zhMhjzhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjzhhhj(zhMubeh}(h]h ](j macroeh"]h$]h&]j" j j# jAzj$ jAzj% j& j' uh1j hhhjIhNhNubh)}(h4``devm_drm_bridge_alloc (dev, type, member, funcs)``h]j )}(hjGzh]h0devm_drm_bridge_alloc (dev, type, member, funcs)}(hjIzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEzubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjIhhubj^E)}(h!Allocate and initialize a bridge h]h)}(h Allocate and initialize a bridgeh]h Allocate and initialize a bridge}(hjazhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj]zubah}(h]h ]h"]h$]h&]uh1j]EhjozhMhjIhhubj) )}(hX**Parameters** ``dev`` struct device of the bridge device ``type`` the type of the struct which contains struct :c:type:`drm_bridge` ``member`` the name of the :c:type:`drm_bridge` within **type** ``funcs`` callbacks for this bridge **Description** The reference count of the returned bridge is initialized to 1. This reference will be automatically dropped via devm (by calling drm_bridge_put()) when **dev** is removed. **Return** Pointer to new bridge, or ERR_PTR on failure.h](h)}(h**Parameters**h]j3 )}(hj|zh]h Parameters}(hj~zhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzzubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjvzubjw )}(hhh](j| )}(h+``dev`` struct device of the bridge device h](j )}(h``dev``h]j )}(hjzh]hdev}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjzubj )}(hhh]h)}(h"struct device of the bridge deviceh]h"struct device of the bridge device}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjzhMhjzubj| )}(hK``type`` the type of the struct which contains struct :c:type:`drm_bridge` h](j )}(h``type``h]j )}(hjzh]htype}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjzubj )}(hhh]h)}(hAthe type of the struct which contains struct :c:type:`drm_bridge`h](h-the type of the struct which contains struct }(hjzhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjzh]h drm_bridge}(hjzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjzhMhjzubeh}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjzhMhjzubj| )}(h@``member`` the name of the :c:type:`drm_bridge` within **type** h](j )}(h ``member``h]j )}(hj,{h]hmember}(hj.{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*{ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj&{ubj )}(hhh]h)}(h4the name of the :c:type:`drm_bridge` within **type**h](hthe name of the }(hjE{hhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjO{h]h drm_bridge}(hjQ{hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjM{ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjA{hMhjE{ubh within }(hjE{hhhNhNubj3 )}(h**type**h]htype}(hjp{hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjE{ubeh}(h]h ]h"]h$]h&]uh1hhjA{hMhjB{ubah}(h]h ]h"]h$]h&]uh1j hj&{ubeh}(h]h ]h"]h$]h&]uh1j{ hjA{hMhjzubj| )}(h$``funcs`` callbacks for this bridge h](j )}(h ``funcs``h]j )}(hj{h]hfuncs}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj{ubj )}(hhh]h)}(hcallbacks for this bridgeh]hcallbacks for this bridge}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj{ubah}(h]h ]h"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]uh1j{ hj{hMhjzubeh}(h]h ]h"]h$]h&]uh1jv hjvzubh)}(h**Description**h]j3 )}(hj{h]h Description}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj{ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjvzubh)}(hThe reference count of the returned bridge is initialized to 1. This reference will be automatically dropped via devm (by calling drm_bridge_put()) when **dev** is removed.h](hThe reference count of the returned bridge is initialized to 1. This reference will be automatically dropped via devm (by calling drm_bridge_put()) when }(hj{hhhNhNubj3 )}(h**dev**h]hdev}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj{ubh is removed.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjvzubh)}(h **Return**h]j3 )}(hj |h]hReturn}(hj |hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjvzubh)}(h-Pointer to new bridge, or ERR_PTR on failure.h]h-Pointer to new bridge, or ERR_PTR on failure.}(hj |hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjvzubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_bridge_get_current_state (C function)c.drm_bridge_get_current_statehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hRstruct drm_bridge_state * drm_bridge_get_current_state (struct drm_bridge *bridge)h]j )}(hPstruct drm_bridge_state *drm_bridge_get_current_state(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hjO|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK|hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMubj )}(h h]h }(hj]|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK|hhhj\|hMubh)}(hhh]j )}(hdrm_bridge_stateh]hdrm_bridge_state}(hjn|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjp|modnameN classnameNj j )}j ]j%)}jdrm_bridge_get_current_statesbc.drm_bridge_get_current_stateasbuh1hhjK|hhhj\|hMubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK|hhhj\|hMubj9)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjK|hhhj\|hMubj )}(hdrm_bridge_get_current_stateh]j )}(hj|h]hdrm_bridge_get_current_state}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjK|hhhj\|hMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j|c.drm_bridge_get_current_stateasbuh1hhj|ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj9)}(hjOh]h*}(hj}hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj|ubj )}(hbridgeh]hbridge}(hj }hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubah}(h]h ]h"]h$]h&]j j uh1jhjK|hhhj\|hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjG|hhhj\|hMubah}(h]jB|ah ](j j eh"]h$]h&]j j )j huh1j hj\|hMhjD|hhubj )}(hhh]h)}(hGet the current bridge stateh]hGet the current bridge state}(hjJ}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjG}hhubah}(h]h ]h"]h$]h&]uh1j hjD|hhhj\|hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jb}j$ jb}j% j& j' uh1j hhhjIhNhNubj) )}(h**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** This function must be called with the modeset lock held. The current bridge state, or NULL if there is none.h](h)}(h**Parameters**h]j3 )}(hjl}h]h Parameters}(hjn}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjj}ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjf}ubjw )}(hhh]j| )}(h,``struct drm_bridge *bridge`` bridge object h](j )}(h``struct drm_bridge *bridge``h]j )}(hj}h]hstruct drm_bridge *bridge}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj}ubj )}(hhh]h)}(h bridge objecth]h bridge object}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hMhj}ubah}(h]h ]h"]h$]h&]uh1jv hjf}ubh)}(h**Description**h]j3 )}(hj}h]h Description}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjf}ubh)}(h8This function must be called with the modeset lock held.h]h8This function must be called with the modeset lock held.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjf}ubh)}(h3The current bridge state, or NULL if there is none.h]h3The current bridge state, or NULL if there is none.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjf}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_bridge_get_next_bridge (C function)c.drm_bridge_get_next_bridgehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hJstruct drm_bridge * drm_bridge_get_next_bridge (struct drm_bridge *bridge)h]j )}(hHstruct drm_bridge *drm_bridge_get_next_bridge(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMubj )}(h h]h }(hj(~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhhj'~hMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj9~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;~modnameN classnameNj j )}j ]j%)}jdrm_bridge_get_next_bridgesbc.drm_bridge_get_next_bridgeasbuh1hhj~hhhj'~hMubj )}(h h]h }(hjZ~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhhj'~hMubj9)}(hjOh]h*}(hjh~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj~hhhj'~hMubj )}(hdrm_bridge_get_next_bridgeh]j )}(hjW~h]hdrm_bridge_get_next_bridge}(hjy~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj~hhhj'~hMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]jU~c.drm_bridge_get_next_bridgeasbuh1hhj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj9)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj~ubj )}(hbridgeh]hbridge}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubah}(h]h ]h"]h$]h&]j j uh1jhj~hhhj'~hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhj'~hMubah}(h]j ~ah ](j j eh"]h$]h&]j j )j huh1j hj'~hMhj~hhubj )}(hhh]h)}(h Get the next bridge in the chainh]h Get the next bridge in the chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hj~hhhj'~hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j-j$ j-j% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** The caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified. The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the next bridge in the chain after **bridge**, or NULL if **bridge** is the last.h](h)}(h**Parameters**h]j3 )}(hj7h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj1ubjw )}(hhh]j| )}(h,``struct drm_bridge *bridge`` bridge object h](j )}(h``struct drm_bridge *bridge``h]j )}(hjVh]hstruct drm_bridge *bridge}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjPubj )}(hhh]h)}(h bridge objecth]h bridge object}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjlubah}(h]h ]h"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]uh1j{ hjkhMhjMubah}(h]h ]h"]h$]h&]uh1jv hj1ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj1ubh)}(hThe caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified.h](h3The caller is responsible of having a reference to }(hjhhhNhNubj3 )}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhJ via drm_bridge_get() or equivalent. This function leaves the refcount of }(hjhhhNhNubj3 )}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh unmodified.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj1ubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj1ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj1ubh)}(hQthe next bridge in the chain after **bridge**, or NULL if **bridge** is the last.h](h#the next bridge in the chain after }(hjhhhNhNubj3 )}(h **bridge**h]hbridge}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh , or NULL if }(hjhhhNhNubj3 )}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh is the last.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_bridge_get_prev_bridge (C function)c.drm_bridge_get_prev_bridgehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hJstruct drm_bridge * drm_bridge_get_prev_bridge (struct drm_bridge *bridge)h]j )}(hHstruct drm_bridge *drm_bridge_get_prev_bridge(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjahMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjumodnameN classnameNj j )}j ]j%)}jdrm_bridge_get_prev_bridgesbc.drm_bridge_get_prev_bridgeasbuh1hhjPhhhjahMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjahMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjPhhhjahMubj )}(hdrm_bridge_get_prev_bridgeh]j )}(hjh]hdrm_bridge_get_prev_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjahMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hj΀hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʀubj )}(h h]h }(hjۀhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʀubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_get_prev_bridgeasbuh1hhjʀubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʀubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjʀubj )}(hbridgeh]hbridge}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʀubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjƀubah}(h]h ]h"]h$]h&]j j uh1jhjPhhhjahMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjahMubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j hjahMhjIhhubj )}(hhh]h)}(h$Get the previous bridge in the chainh]h$Get the previous bridge in the chain}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjLhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjahMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jgj$ jgj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** The caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified. The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the previous bridge in the chain, or NULL if **bridge** is the first.h](h)}(h**Parameters**h]j3 )}(hjqh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjoubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubjw )}(hhh]j| )}(h,``struct drm_bridge *bridge`` bridge object h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjubj )}(hhh]h)}(h bridge objecth]h bridge object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjkubh)}(h**Description**h]j3 )}(hjˁh]h Description}(hj́hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjɁubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubh)}(hThe caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified.h](h3The caller is responsible of having a reference to }(hjhhhNhNubj3 )}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhJ via drm_bridge_get() or equivalent. This function leaves the refcount of }(hjhhhNhNubj3 )}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh unmodified.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubh)}(h **Return**h]j3 )}(hj%h]hReturn}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubh)}(hEthe previous bridge in the chain, or NULL if **bridge** is the first.h](h-the previous bridge in the chain, or NULL if }(hj;hhhNhNubj3 )}(h **bridge**h]hbridge}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubh is the first.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_bridge_chain_get_first_bridge (C function)#c.drm_bridge_chain_get_first_bridgehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hSstruct drm_bridge * drm_bridge_chain_get_first_bridge (struct drm_encoder *encoder)h]j )}(hQstruct drm_bridge *drm_bridge_chain_get_first_bridge(struct drm_encoder *encoder)h](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM*ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhhjhM*ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j!drm_bridge_chain_get_first_bridgesb#c.drm_bridge_chain_get_first_bridgeasbuh1hhjxhhhjhM*ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxhhhjhM*ubj9)}(hjOh]h*}(hjʂhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjxhhhjhM*ubj )}(h!drm_bridge_chain_get_first_bridgeh]j )}(hjh]h!drm_bridge_chain_get_first_bridge}(hjۂhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjׂubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxhhhjhM*ubj)}(h(struct drm_encoder *encoder)h]j)}(hstruct drm_encoder *encoderh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_encoderh]h drm_encoder}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_bridge_chain_get_first_bridgeasbuh1hhjubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hencoderh]hencoder}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjxhhhjhM*ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjthhhjhM*ubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j hjhM*hjqhhubj )}(hhh]h)}(h!Get the first bridge in the chainh]h!Get the first bridge in the chain}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM*hjthhubah}(h]h ]h"]h$]h&]uh1j hjqhhhjhM*ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_encoder *encoder`` encoder object **Description** The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the first bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM.hjubjw )}(hhh]j| )}(h/``struct drm_encoder *encoder`` encoder object h](j )}(h``struct drm_encoder *encoder``h]j )}(hjh]hstruct drm_encoder *encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM+hjubj )}(hhh]h)}(hencoder objecth]hencoder object}(hjуhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj̓hM+hj΃ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj̓hM+hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM-hjubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM,hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM/hjubh)}(hSthe first bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h*the first bridge in the chain, or NULL if }(hj0hhhNhNubj3 )}(h **encoder**h]hencoder}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0ubh has no bridge attached to it.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM0hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_bridge_chain_get_last_bridge (C function)"c.drm_bridge_chain_get_last_bridgehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hRstruct drm_bridge * drm_bridge_chain_get_last_bridge (struct drm_encoder *encoder)h]j )}(hPstruct drm_bridge *drm_bridge_chain_get_last_bridge(struct drm_encoder *encoder)h](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM<ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmhhhj~hM<ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j drm_bridge_chain_get_last_bridgesb"c.drm_bridge_chain_get_last_bridgeasbuh1hhjmhhhj~hM<ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmhhhj~hM<ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjmhhhj~hM<ubj )}(h drm_bridge_chain_get_last_bridgeh]j )}(hjh]h drm_bridge_chain_get_last_bridge}(hjЄhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj̄ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjmhhhj~hM<ubj)}(h(struct drm_encoder *encoder)h]j)}(hstruct drm_encoder *encoderh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_encoderh]h drm_encoder}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j"c.drm_bridge_chain_get_last_bridgeasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hencoderh]hencoder}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjmhhhj~hM<ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjihhhj~hM<ubah}(h]jdah ](j j eh"]h$]h&]j j )j huh1j hj~hM<hjfhhubj )}(hhh]h)}(h Get the last bridge in the chainh]h Get the last bridge in the chain}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM<hjihhubah}(h]h ]h"]h$]h&]uh1j hjfhhhj~hM<ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_encoder *encoder`` encoder object **Description** The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the last bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM@hjubjw )}(hhh]j| )}(h/``struct drm_encoder *encoder`` encoder object h](j )}(h``struct drm_encoder *encoder``h]j )}(hjh]hstruct drm_encoder *encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM=hjubj )}(hhh]h)}(hencoder objecth]hencoder object}(hjƅhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj…hM=hjÅubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj…hM=hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM?hjubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhM>hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMAhjubh)}(hRthe last bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h)the last bridge in the chain, or NULL if }(hj%hhhNhNubj3 )}(h **encoder**h]hencoder}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubh has no bridge attached to it.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMBhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_for_each_bridge_in_chain (C macro)c.drm_for_each_bridge_in_chainhNtauh1j hjIhhhNhNubj )}(hhh](j )}(hdrm_for_each_bridge_in_chainh]j )}(hdrm_for_each_bridge_in_chainh]j )}(hdrm_for_each_bridge_in_chainh]j )}(hj`h]hdrm_for_each_bridge_in_chain}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ](j j eh"]h$]h&]j j uh1j hjbhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMmubah}(h]h ]h"]h$]h&]j j j uh1j j j hj^hhhj}hMmubah}(h]jYah ](j j eh"]h$]h&]j j )j huh1j hj}hMmhj[hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj[hhhj}hMmubeh}(h]h ](j macroeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubh)}(h2``drm_for_each_bridge_in_chain (encoder, bridge)``h]j )}(hjh]h.drm_for_each_bridge_in_chain (encoder, bridge)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMohjIhhubj^E)}(h0iterate over all bridges attached to an encoder h]h)}(h/iterate over all bridges attached to an encoderh]h/iterate over all bridges attached to an encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMmhjubah}(h]h ]h"]h$]h&]uh1j]EhjĆhMmhjIhhubj) )}(hX**Parameters** ``encoder`` the encoder to iterate bridges on ``bridge`` a bridge pointer updated to point to the current bridge at each iteration **Description** Iterate over all bridges present in the bridge chain attached to **encoder**. Automatically gets/puts the bridge reference while iterating and locks the encoder chain mutex to prevent chain modifications while iterating.h](h)}(h**Parameters**h]j3 )}(hjцh]h Parameters}(hjӆhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjφubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMqhjˆubjw )}(hhh](j| )}(h.``encoder`` the encoder to iterate bridges on h](j )}(h ``encoder``h]j )}(hjh]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMnhjubj )}(hhh]h)}(h!the encoder to iterate bridges onh]h!the encoder to iterate bridges on}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMnhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMnhjubj| )}(hU``bridge`` a bridge pointer updated to point to the current bridge at each iteration h](j )}(h ``bridge``h]j )}(hj)h]hbridge}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMphj#ubj )}(hhh]h)}(hIa bridge pointer updated to point to the current bridge at each iterationh]hIa bridge pointer updated to point to the current bridge at each iteration}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMohj?ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMphjubeh}(h]h ]h"]h$]h&]uh1jv hjˆubh)}(h**Description**h]j3 )}(hjeh]h Description}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMrhjˆubh)}(hMIterate over all bridges present in the bridge chain attached to **encoder**.h](hAIterate over all bridges present in the bridge chain attached to }(hj{hhhNhNubj3 )}(h **encoder**h]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj{ubh.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMqhjˆubh)}(hAutomatically gets/puts the bridge reference while iterating and locks the encoder chain mutex to prevent chain modifications while iterating.h]hAutomatically gets/puts the bridge reference while iterating and locks the encoder chain mutex to prevent chain modifications while iterating.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMshjˆubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_for_each_bridge_in_chain_from (C macro)#c.drm_for_each_bridge_in_chain_fromhNtauh1j hjIhhhNhNubj )}(hhh](j )}(h!drm_for_each_bridge_in_chain_fromh]j )}(h!drm_for_each_bridge_in_chain_fromh]j )}(h!drm_for_each_bridge_in_chain_fromh]j )}(hjŇh]h!drm_for_each_bridge_in_chain_from}(hjχhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjˇubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLJhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjÇhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j macroeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubh)}(h<``drm_for_each_bridge_in_chain_from (first_bridge, bridge)``h]j )}(hjh]h8drm_for_each_bridge_in_chain_from (first_bridge, bridge)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjIhhubj^E)}(h8iterate over all bridges starting from the given bridge h]h)}(h7iterate over all bridges starting from the given bridgeh]h7iterate over all bridges starting from the given bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjubah}(h]h ]h"]h$]h&]uh1j]Ehj)hMhjIhhubj) )}(hX**Parameters** ``first_bridge`` the bridge to start from ``bridge`` a bridge pointer updated to point to the current bridge at each iteration **Description** Iterate over all bridges in the encoder chain starting from **first_bridge**, included. Automatically gets/puts the bridge reference while iterating and locks the encoder chain mutex to prevent chain modifications while iterating.h](h)}(h**Parameters**h]j3 )}(hj6h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj0ubjw )}(hhh](j| )}(h*``first_bridge`` the bridge to start from h](j )}(h``first_bridge``h]j )}(hjUh]h first_bridge}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjOubj )}(hhh]h)}(hthe bridge to start fromh]hthe bridge to start from}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjkubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMhjLubj| )}(hU``bridge`` a bridge pointer updated to point to the current bridge at each iteration h](j )}(h ``bridge``h]j )}(hjh]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjubj )}(hhh]h)}(hIa bridge pointer updated to point to the current bridge at each iterationh]hIa bridge pointer updated to point to the current bridge at each iteration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjLubeh}(h]h ]h"]h$]h&]uh1jv hj0ubh)}(h**Description**h]j3 )}(hjʈh]h Description}(hj̈hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjȈubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:190: ./include/drm/drm_bridge.hhMhj0ubh)}(hWIterate over all bridges in the encoder chain starting from **first_bridge**, included.h](hhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj=hKubj )}(hdrm_bridge_enterh]j )}(hdrm_bridge_enterh]hdrm_bridge_enter}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj=hKubj)}(h%(struct drm_bridge *bridge, int *idx)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjRsbc.drm_bridge_enterasbuh1hhjhubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhubj )}(hbridgeh]hbridge}(hjʼnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjdubj)}(hint *idxh](j)}(hinth]hint}(hjމhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjډubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjډubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjډubj )}(hidxh]hidx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjډubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjdubeh}(h]h ]h"]h$]h&]j j uh1jhj,hhhj=hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj=hKubah}(h]j#ah ](j j eh"]h$]h&]j j )j huh1j hj=hKhj%hhubj )}(hhh]h)}(h!Enter DRM bridge critical sectionh]h!Enter DRM bridge critical section}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chKhj.hhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj=hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jIj$ jIj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` DRM bridge ``int *idx`` Pointer to index that will be passed to the matching drm_bridge_exit() **Description** This function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested. **Return** True if it is OK to enter the section, false otherwise.h](h)}(h**Parameters**h]j3 )}(hjSh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chKhjMubjw )}(hhh](j| )}(h)``struct drm_bridge *bridge`` DRM bridge h](j )}(h``struct drm_bridge *bridge``h]j )}(hjrh]hstruct drm_bridge *bridge}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chKhjlubj )}(hhh]h)}(h DRM bridgeh]h DRM bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjiubj| )}(hT``int *idx`` Pointer to index that will be passed to the matching drm_bridge_exit() h](j )}(h ``int *idx``h]j )}(hjh]hint *idx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chKhjubj )}(hhh]h)}(hFPointer to index that will be passed to the matching drm_bridge_exit()h]hFPointer to index that will be passed to the matching drm_bridge_exit()}(hjĊhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjiubeh}(h]h ]h"]h$]h&]uh1jv hjMubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chKhjMubh)}(hThis function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested.h]hThis function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chKhjMubh)}(h **Return**h]j3 )}(hj h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjMubh)}(h7True if it is OK to enter the section, false otherwise.h]h7True if it is OK to enter the section, false otherwise.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_exit (C function)c.drm_bridge_exithNtauh1j hjIhhhNhNubj )}(hhh](j )}(hvoid drm_bridge_exit (int idx)h]j )}(hvoid drm_bridge_exit(int idx)h](j)}(hvoidh]hvoid6}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNhhhj`hMubj )}(hdrm_bridge_exith]j )}(hdrm_bridge_exith]hdrm_bridge_exit}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ](j j eh"]h$]h&]j j uh1j hjNhhhj`hMubj)}(h (int idx)h]j)}(hint idxh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hidxh]hidx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjNhhhj`hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhj`hMubah}(h]jEah ](j j eh"]h$]h&]j j )j huh1j hj`hMhjGhhubj )}(hhh]h)}(h Exit DRM bridge critical sectionh]h Exit DRM bridge critical section}(hjՋhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjҋhhubah}(h]h ]h"]h$]h&]uh1j hjGhhhj`hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(h**Parameters** ``int idx`` index returned by drm_bridge_enter() **Description** This function marks the end of a section that should not be entered after the bridge has been unplugged.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh]j| )}(h1``int idx`` index returned by drm_bridge_enter() h](j )}(h ``int idx``h]j )}(hjh]hint idx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(h$index returned by drm_bridge_enter()h]h$index returned by drm_bridge_enter()}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj,ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj+hMhj ubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjQh]h Description}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hhThis function marks the end of a section that should not be entered after the bridge has been unplugged.h]hhThis function marks the end of a section that should not be entered after the bridge has been unplugged.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_unplug (C function)c.drm_bridge_unplughNtauh1j hjIhhhNhNubj )}(hhh](j )}(h2void drm_bridge_unplug (struct drm_bridge *bridge)h]j )}(h1void drm_bridge_unplug(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_bridge_unplugh]j )}(hdrm_bridge_unplugh]hdrm_bridge_unplug}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjӌhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjόubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjόubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_bridge_unplugasbuh1hhjόubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjόubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjόubj )}(hbridgeh]hbridge}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjόubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjˌubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h0declare a DRM bridge was unplugged and remove ith]h0declare a DRM bridge was unplugged and remove it}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjShhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jnj$ jnj% j& j' uh1j hhhjIhNhNubj) )}(hXK**Parameters** ``struct drm_bridge *bridge`` DRM bridge **Description** This tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner. Also unregisters the bridge.h](h)}(h**Parameters**h]j3 )}(hjxh]h Parameters}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjvubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM#hjrubjw )}(hhh]j| )}(h)``struct drm_bridge *bridge`` DRM bridge h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM hjubj )}(hhh]h)}(h DRM bridgeh]h DRM bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubah}(h]h ]h"]h$]h&]uh1jv hjrubh)}(h**Description**h]j3 )}(hjҍh]h Description}(hjԍhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjЍubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM"hjrubh)}(hThis tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner.h]hThis tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM!hjrubh)}(hAlso unregisters the bridge.h]hAlso unregisters the bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM&hjrubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_get (C function)c.drm_bridge_gethNtauh1j hjIhhhNhNubj )}(hhh](j )}(h>struct drm_bridge * drm_bridge_get (struct drm_bridge *bridge)h]j )}(hsbc.drm_bridge_putasbuh1hhjTubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjTubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjPubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj)hMVubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj)hMVubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj)hMVhjhhubj )}(hhh]h)}(hRelease a bridge referenceh]hRelease a bridge reference}(hjېhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMVhjؐhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj)hMVubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX@**Parameters** ``struct drm_bridge *bridge`` DRM bridge; if NULL or an ERR_PTR this function does nothing **Description** This function decrements the bridge's reference count and frees the object if the reference count drops to zero. See also drm_bridge_clear_and_put() if you also need to set the pointer to NULLh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMZhjubjw )}(hhh]j| )}(h[``struct drm_bridge *bridge`` DRM bridge; if NULL or an ERR_PTR this function does nothing h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMWhjubj )}(hhh]h)}(hhhhNhNubj )}(h``drm_bridge *some_bridge``h]hdrm_bridge *some_bridge}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubh , this code:}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMqhjubjN )}(h'drm_bridge_clear_and_put(&some_bridge);h]h'drm_bridge_clear_and_put(&some_bridge);}hj_sbah}(h]h ]h"]h$]h&]j j uh1jM ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMshjubh)}(h#is equivalent to the more complex::h]h"is equivalent to the more complex:}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMuhjubjN )}(hPstruct drm_bridge *temp = some_bridge; some_bridge = NULL; drm_bridge_put(temp);h]hPstruct drm_bridge *temp = some_bridge; some_bridge = NULL; drm_bridge_put(temp);}hj}sbah}(h]h ]h"]h$]h&]j j uh1jM ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMwhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_add (C function)c.drm_bridge_addhNtauh1j hjIhhhNhNubj )}(hhh](j )}(h/void drm_bridge_add (struct drm_bridge *bridge)h]j )}(h.void drm_bridge_add(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_bridge_addh]j )}(hdrm_bridge_addh]hdrm_bridge_add}(hj͓hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjɓubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjϓsbc.drm_bridge_addasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hregister a bridgeh]hregister a bridge}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjihhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure **Description** Add the given bridge to the global list of bridges, where they can be found by users via of_drm_find_and_get_bridge(). The bridge to be added must have been allocated by devm_drm_bridge_alloc().h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh]j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjƔhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj”hMhjÔubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj”hMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hvAdd the given bridge to the global list of bridges, where they can be found by users via of_drm_find_and_get_bridge().h]hvAdd the given bridge to the global list of bridges, where they can be found by users via of_drm_find_and_get_bridge().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hKThe bridge to be added must have been allocated by devm_drm_bridge_alloc().h]hKThe bridge to be added must have been allocated by devm_drm_bridge_alloc().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j devm_drm_bridge_add (C function)c.devm_drm_bridge_addhNtauh1j hjIhhhNhNubj )}(hhh](j )}(hGint devm_drm_bridge_add (struct device *dev, struct drm_bridge *bridge)h]j )}(hFint devm_drm_bridge_add(struct device *dev, struct drm_bridge *bridge)h](j)}(hinth]hint}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8hhhjJhMubj )}(hdevm_drm_bridge_addh]j )}(hdevm_drm_bridge_addh]hdevm_drm_bridge_add}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ](j j eh"]h$]h&]j j uh1j hj8hhhjJhMubj)}(h/(struct device *dev, struct drm_bridge *bridge)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj_sbc.devm_drm_bridge_addasbuh1hhjuubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubj9)}(hjOh]h*}(hjŕhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjuubj )}(hdevh]hdev}(hjҕhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubj)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.devm_drm_bridge_addasbuh1hhjubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubeh}(h]h ]h"]h$]h&]j j uh1jhj8hhhjJhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj4hhhjJhMubah}(h]j/ah ](j j eh"]h$]h&]j j )j huh1j hjJhMhj1hhubj )}(hhh]h)}(h(devm managed version of drm_bridge_add()h]h(devm managed version of drm_bridge_add()}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjihhubah}(h]h ]h"]h$]h&]uh1j hj1hhhjJhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hXC**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct drm_bridge *bridge`` bridge control structure **Description** This is the managed version of drm_bridge_add() which automatically calls drm_bridge_remove() when **dev** is unbound. **Return** 0 if no error or negative error code.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh](j| )}(h<``struct device *dev`` device to tie the bridge lifetime to h](j )}(h``struct device *dev``h]j )}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjƖhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj–hMhjÖubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj–hMhjubj| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hvThis is the managed version of drm_bridge_add() which automatically calls drm_bridge_remove() when **dev** is unbound.h](hcThis is the managed version of drm_bridge_add() which automatically calls drm_bridge_remove() when }(hj7hhhNhNubj3 )}(h**dev**h]hdev}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubh is unbound.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Return**h]j3 )}(hjZh]hReturn}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h%0 if no error or negative error code.h]h%0 if no error or negative error code.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_remove (C function)c.drm_bridge_removehNtauh1j hjIhhhNhNubj )}(hhh](j )}(h2void drm_bridge_remove (struct drm_bridge *bridge)h]j )}(h1void drm_bridge_remove(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_bridge_removeh]j )}(hdrm_bridge_removeh]hdrm_bridge_remove}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjܗhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjؗubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjؗubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj—sbc.drm_bridge_removeasbuh1hhjؗubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjؗubj9)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjؗubj )}(hbridgeh]hbridge}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjؗubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjԗubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hunregister a bridgeh]hunregister a bridge}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj\hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jwj$ jwj% j& j' uh1j hhhjIhNhNubj) )}(hXK**Parameters** ``struct drm_bridge *bridge`` bridge control structure **Description** Remove the given bridge from the global list of registered bridges, so it won't be found by users via of_drm_find_and_get_bridge(), and add it to the lingering bridge list, to keep track of it until its allocated memory is eventually freed.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj{ubjw )}(hhh]j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hj{ubh)}(h**Description**h]j3 )}(hjۘh]h Description}(hjݘhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj٘ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj{ubh)}(hRemove the given bridge from the global list of registered bridges, so it won't be found by users via of_drm_find_and_get_bridge(), and add it to the lingering bridge list, to keep track of it until its allocated memory is eventually freed.h]hRemove the given bridge from the global list of registered bridges, so it won’t be found by users via of_drm_find_and_get_bridge(), and add it to the lingering bridge list, to keep track of it until its allocated memory is eventually freed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_attach (C function)c.drm_bridge_attachhNtauh1j hjIhhhNhNubj )}(hhh](j )}(hint drm_bridge_attach (struct drm_encoder *encoder, struct drm_bridge *bridge, struct drm_bridge *previous, enum drm_bridge_attach_flags flags)h]j )}(hint drm_bridge_attach(struct drm_encoder *encoder, struct drm_bridge *bridge, struct drm_bridge *previous, enum drm_bridge_attach_flags flags)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM1ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj.hM1ubj )}(hdrm_bridge_attachh]j )}(hdrm_bridge_attachh]hdrm_bridge_attach}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj.hM1ubj)}(hy(struct drm_encoder *encoder, struct drm_bridge *bridge, struct drm_bridge *previous, enum drm_bridge_attach_flags flags)h](j)}(hstruct drm_encoder *encoderh](j )}(hj h]hstruct}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubh)}(hhh]j )}(h drm_encoderh]h drm_encoder}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]j%)}jjCsbc.drm_bridge_attachasbuh1hhjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjYubj )}(hencoderh]hencoder}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubj)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjϙhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˙ubj )}(h h]h }(hjܙhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˙ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_attachasbuh1hhj˙ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˙ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj˙ubj )}(hbridgeh]hbridge}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˙ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubj)}(hstruct drm_bridge *previoush](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]jc.drm_bridge_attachasbuh1hhj;ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hprevioush]hprevious}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubj)}(h"enum drm_bridge_attach_flags flagsh](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_bridge_attach_flagsh]hdrm_bridge_attach_flags}(hj͚hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʚubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjϚmodnameN classnameNj j )}j ]jc.drm_bridge_attachasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj.hM1ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj.hM1ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj.hM1hjhhubj )}(hhh]h)}(h'attach the bridge to an encoder's chainh]h)attach the bridge to an encoder’s chain}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM1hj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj.hM1ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j;j$ j;j% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_encoder *encoder`` DRM encoder ``struct drm_bridge *bridge`` bridge to attach ``struct drm_bridge *previous`` previous bridge in the chain (optional) ``enum drm_bridge_attach_flags flags`` DRM_BRIDGE_ATTACH_* flags **Description** Called by a kms driver to link the bridge to an encoder's chain. The previous argument specifies the previous bridge in the chain. If NULL, the bridge is linked directly at the encoder's output. Otherwise it is linked at the previous bridge's output. If non-NULL the previous bridge must be already attached by a call to this function. The bridge to be attached must have been previously added by drm_bridge_add(). Note that bridges attached to encoders are auto-detached during encoder cleanup in drm_encoder_cleanup(), so drm_bridge_attach() should generally *not* be balanced with a drm_bridge_detach() in driver code. **Return** Zero on success, error code on failureh](h)}(h**Parameters**h]j3 )}(hjEh]h Parameters}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjCubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM5hj?ubjw )}(hhh](j| )}(h,``struct drm_encoder *encoder`` DRM encoder h](j )}(h``struct drm_encoder *encoder``h]j )}(hjdh]hstruct drm_encoder *encoder}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM3hj^ubj )}(hhh]h)}(h DRM encoderh]h DRM encoder}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhM3hjzubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hjyhM3hj[ubj| )}(h/``struct drm_bridge *bridge`` bridge to attach h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM4hjubj )}(hhh]h)}(hbridge to attachh]hbridge to attach}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM4hj[ubj| )}(hH``struct drm_bridge *previous`` previous bridge in the chain (optional) h](j )}(h``struct drm_bridge *previous``h]j )}(hj֛h]hstruct drm_bridge *previous}(hj؛hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjԛubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM5hjЛubj )}(hhh]h)}(h'previous bridge in the chain (optional)h]h'previous bridge in the chain (optional)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5hjubah}(h]h ]h"]h$]h&]uh1j hjЛubeh}(h]h ]h"]h$]h&]uh1j{ hjhM5hj[ubj| )}(hA``enum drm_bridge_attach_flags flags`` DRM_BRIDGE_ATTACH_* flags h](j )}(h&``enum drm_bridge_attach_flags flags``h]j )}(hjh]h"enum drm_bridge_attach_flags flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM6hj ubj )}(hhh]h)}(hDRM_BRIDGE_ATTACH_* flagsh]hDRM_BRIDGE_ATTACH_* flags}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hM6hj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hM6hj[ubeh}(h]h ]h"]h$]h&]uh1jv hj?ubh)}(h**Description**h]j3 )}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM8hj?ubh)}(hCalled by a kms driver to link the bridge to an encoder's chain. The previous argument specifies the previous bridge in the chain. If NULL, the bridge is linked directly at the encoder's output. Otherwise it is linked at the previous bridge's output.h]hXCalled by a kms driver to link the bridge to an encoder’s chain. The previous argument specifies the previous bridge in the chain. If NULL, the bridge is linked directly at the encoder’s output. Otherwise it is linked at the previous bridge’s output.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM7hj?ubh)}(hTIf non-NULL the previous bridge must be already attached by a call to this function.h]hTIf non-NULL the previous bridge must be already attached by a call to this function.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM<hj?ubh)}(hNThe bridge to be attached must have been previously added by drm_bridge_add().h]hNThe bridge to be attached must have been previously added by drm_bridge_add().}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM?hj?ubh)}(hNote that bridges attached to encoders are auto-detached during encoder cleanup in drm_encoder_cleanup(), so drm_bridge_attach() should generally *not* be balanced with a drm_bridge_detach() in driver code.h](hNote that bridges attached to encoders are auto-detached during encoder cleanup in drm_encoder_cleanup(), so drm_bridge_attach() should generally }(hjhhhNhNubj0F)}(h*not*h]hnot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j/Fhjubh7 be balanced with a drm_bridge_detach() in driver code.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMBhj?ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMFhj?ubh)}(h&Zero on success, error code on failureh]h&Zero on success, error code on failure}(hjƜhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMGhj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_bridge_chain_mode_valid (C function)c.drm_bridge_chain_mode_validhNtauh1j hjIhhhNhNubj )}(hhh](j )}(henum drm_mode_status drm_bridge_chain_mode_valid (struct drm_bridge *first_bridge, const struct drm_display_info *info, const struct drm_display_mode *mode)h]j )}(henum drm_mode_status drm_bridge_chain_mode_valid(struct drm_bridge *first_bridge, const struct drm_display_info *info, const struct drm_display_mode *mode)h](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(hdrm_mode_statush]hdrm_mode_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_bridge_chain_mode_validsbc.drm_bridge_chain_mode_validasbuh1hhjhhhjhMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_bridge_chain_mode_validh]j )}(hj2h]hdrm_bridge_chain_mode_valid}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hk(struct drm_bridge *first_bridge, const struct drm_display_info *info, const struct drm_display_mode *mode)h](j)}(hstruct drm_bridge *first_bridgeh](j )}(hj h]hstruct}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0c.drm_bridge_chain_mode_validasbuh1hhj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj^ubj )}(h first_bridgeh]h first_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubj)}(h#const struct drm_display_info *infoh](j )}(hjch]hconst}(hjҝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΝubj )}(h h]h }(hjߝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΝubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΝubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΝubh)}(hhh]j )}(hdrm_display_infoh]hdrm_display_info}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j0c.drm_bridge_chain_mode_validasbuh1hhjΝubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΝubj9)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjΝubj )}(hinfoh]hinfo}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΝubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubj)}(h#const struct drm_display_mode *modeh](j )}(hjch]hconst}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(hj h]hstruct}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0c.drm_bridge_chain_mode_validasbuh1hhjYubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj9)}(hjOh]h*}(hjžhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjYubj )}(hmodeh]hmode}(hjϞhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h;validate the mode against all bridges in the encoder chain.h]h;validate the mode against all bridges in the encoder chain.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *first_bridge`` bridge control structure ``const struct drm_display_info *info`` display info against which the mode shall be validated ``const struct drm_display_mode *mode`` desired mode to be validated **Description** Calls :c:type:`drm_bridge_funcs.mode_valid ` for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code. **Note** the bridge passed should be the one closest to the encoder. **Return** MODE_OK on success, drm_mode_status Enum error code on failureh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh](j| )}(h=``struct drm_bridge *first_bridge`` bridge control structure h](j )}(h#``struct drm_bridge *first_bridge``h]j )}(hj:h]hstruct drm_bridge *first_bridge}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj4ubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMhjPubah}(h]h ]h"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]uh1j{ hjOhMhj1ubj| )}(h_``const struct drm_display_info *info`` display info against which the mode shall be validated h](j )}(h'``const struct drm_display_info *info``h]j )}(hjsh]h#const struct drm_display_info *info}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjmubj )}(hhh]h)}(h6display info against which the mode shall be validatedh]h6display info against which the mode shall be validated}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj1ubj| )}(hE``const struct drm_display_mode *mode`` desired mode to be validated h](j )}(h'``const struct drm_display_mode *mode``h]j )}(hjh]h#const struct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hdesired mode to be validatedh]hdesired mode to be validated}(hjşhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjŸubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj1ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hCalls :c:type:`drm_bridge_funcs.mode_valid ` for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code.h](hCalls }(hjhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]j )}(hjh]hdrm_bridge_funcs.mode_valid}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj$hMhjubh)}(h**Note**h]j3 )}(hj1h]hNote}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h;the bridge passed should be the one closest to the encoder.h]h;the bridge passed should be the one closest to the encoder.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Return**h]j3 )}(hjXh]hReturn}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM hjubh)}(h>MODE_OK on success, drm_mode_status Enum error code on failureh]h>MODE_OK on success, drm_mode_status Enum error code on failure}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_bridge_chain_mode_set (C function)c.drm_bridge_chain_mode_sethNtauh1j hjIhhhNhNubj )}(hhh](j )}(hvoid drm_bridge_chain_mode_set (struct drm_bridge *first_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h]j )}(hvoid drm_bridge_chain_mode_set(struct drm_bridge *first_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM$ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM$ubj )}(hdrm_bridge_chain_mode_seth]j )}(hdrm_bridge_chain_mode_seth]hdrm_bridge_chain_mode_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM$ubj)}(ht(struct drm_bridge *first_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h](j)}(hstruct drm_bridge *first_bridgeh](j )}(hj h]hstruct}(hjڠhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֠ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֠ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_bridge_chain_mode_setasbuh1hhj֠ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֠ubj9)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj֠ubj )}(h first_bridgeh]h first_bridge}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֠ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjҠubj)}(h#const struct drm_display_mode *modeh](j )}(hjch]hconst}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_chain_mode_setasbuh1hhjHubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjHubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjҠubj)}(h,const struct drm_display_mode *adjusted_modeh](j )}(hjch]hconst}(hjסhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӡubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӡubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӡubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӡubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_chain_mode_setasbuh1hhjӡubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӡubj9)}(hjOh]h*}(hj<hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjӡubj )}(h adjusted_modeh]h adjusted_mode}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӡubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjҠubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM$ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM$ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM$hjhhubj )}(hhh]h)}(h6set proposed mode for all bridges in the encoder chainh]h6set proposed mode for all bridges in the encoder chain}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM$hjphhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM$ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *first_bridge`` bridge control structure ``const struct drm_display_mode *mode`` desired mode to be set for the encoder chain ``const struct drm_display_mode *adjusted_mode`` updated mode that works for this encoder chain **Description** Calls :c:type:`drm_bridge_funcs.mode_set ` op for all the bridges in the encoder chain, starting from the first bridge to the last. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM(hjubjw )}(hhh](j| )}(h=``struct drm_bridge *first_bridge`` bridge control structure h](j )}(h#``struct drm_bridge *first_bridge``h]j )}(hjh]hstruct drm_bridge *first_bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM&hjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj͢hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjɢhM&hjʢubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjɢhM&hjubj| )}(hU``const struct drm_display_mode *mode`` desired mode to be set for the encoder chain h](j )}(h'``const struct drm_display_mode *mode``h]j )}(hjh]h#const struct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM'hjubj )}(hhh]h)}(h,desired mode to be set for the encoder chainh]h,desired mode to be set for the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM'hjubj| )}(h```const struct drm_display_mode *adjusted_mode`` updated mode that works for this encoder chain h](j )}(h0``const struct drm_display_mode *adjusted_mode``h]j )}(hj&h]h,const struct drm_display_mode *adjusted_mode}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM(hj ubj )}(hhh]h)}(h.updated mode that works for this encoder chainh]h.updated mode that works for this encoder chain}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hM(hj<ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hM(hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjah]h Description}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj_ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM*hjubh)}(hCalls :c:type:`drm_bridge_funcs.mode_set ` op for all the bridges in the encoder chain, starting from the first bridge to the last.h](hCalls }(hjwhhhNhNubh)}(h6:c:type:`drm_bridge_funcs.mode_set `h]j )}(hjh]hdrm_bridge_funcs.mode_set}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM)hjwubhY op for all the bridges in the encoder chain, starting from the first bridge to the last.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM)hjubh)}(h**Note**h]j3 )}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM,hjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM-hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_atomic_bridge_chain_disable (C function)!c.drm_atomic_bridge_chain_disablehNtauh1j hjIhhhNhNubj )}(hhh](j )}(havoid drm_atomic_bridge_chain_disable (struct drm_bridge *bridge, struct drm_atomic_commit *state)h]j )}(h`void drm_atomic_bridge_chain_disable(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM=ubj )}(hdrm_atomic_bridge_chain_disableh]j )}(hdrm_atomic_bridge_chain_disableh]hdrm_atomic_bridge_chain_disable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM=ubj)}(h<(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]j%)}jjsb!c.drm_atomic_bridge_chain_disableasbuh1hhj)ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jg!c.drm_atomic_bridge_chain_disableasbuh1hhjubj )}(h h]h }(hjۤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM=ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM=hjhhubj )}(hhh]h)}(h)disables all bridges in the encoder chainh]h)disables all bridges in the encoder chain}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM=hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM=ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j8j$ j8j% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_disable ` op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_disable ` **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j3 )}(hjBh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMAhj<ubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjah]hstruct drm_bridge *bridge}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM>hj[ubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhM>hjwubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hjvhM>hjXubj| )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM?hjubj )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM?hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM?hjXubeh}(h]h ]h"]h$]h&]uh1jv hj<ubh)}(h**Description**h]j3 )}(hjեh]h Description}(hjץhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjӥubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMAhj<ubh)}(hXCalls :c:type:`drm_bridge_funcs.atomic_disable ` op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_disable `h](hCalls }(hjhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.atomic_disable `h]j )}(hjh]hdrm_bridge_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM@hjubhz op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hjhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]j )}(hjh]h'drm_encoder_helper_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjhM@hjubeh}(h]h ]h"]h$]h&]uh1hhjhM@hj<ubh)}(h**Note**h]j3 )}(hj>h]hNote}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMDhj<ubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMEhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_atomic_bridge_chain_post_disable (C function)&c.drm_atomic_bridge_chain_post_disablehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hfvoid drm_atomic_bridge_chain_post_disable (struct drm_bridge *bridge, struct drm_atomic_commit *state)h]j )}(hevoid drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMeubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMeubj )}(h$drm_atomic_bridge_chain_post_disableh]j )}(h$drm_atomic_bridge_chain_post_disableh]h$drm_atomic_bridge_chain_post_disable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMeubj)}(h<(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjͦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjަhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۦubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb&c.drm_atomic_bridge_chain_post_disableasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRmodnameN classnameNj j )}j ]j&c.drm_atomic_bridge_chain_post_disableasbuh1hhj.ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj9)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj.ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMeubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{hhhjhMeubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j hjhMehjxhhubj )}(hhh]h)}(h:cleans up after disabling all bridges in the encoder chainh]h:cleans up after disabling all bridges in the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMehjhhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjhMeubeh}(h]h ](j functioneh"]h$]h&]j" j j# j˧j$ j˧j% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_post_disable ` op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_disable ` If a bridge sets **pre_enable_prev_first**, then the **post_disable** for that bridge will be called before the previous one to reverse the **pre_enable** calling direction. **Example** Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **post_disable** order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j3 )}(hjէh]h Parameters}(hjקhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjӧubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMihjϧubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMghjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMghj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMghjubj| )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj-h]hstruct drm_atomic_commit *state}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhhj'ubj )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhhjCubah}(h]h ]h"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]uh1j{ hjBhMhhjubeh}(h]h ]h"]h$]h&]uh1jv hjϧubh)}(h**Description**h]j3 )}(hjhh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMjhjϧubh)}(hXCalls :c:type:`drm_bridge_funcs.atomic_post_disable ` op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_disable `h](hCalls }(hj~hhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_post_disable `h]j )}(hjh]h$drm_bridge_funcs.atomic_post_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMihj~ubh| op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing }(hj~hhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]j )}(hjh]h'drm_encoder_helper_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjhMihj~ubeh}(h]h ]h"]h$]h&]uh1hhjhMihjϧubh)}(hIf a bridge sets **pre_enable_prev_first**, then the **post_disable** for that bridge will be called before the previous one to reverse the **pre_enable** calling direction.h](hIf a bridge sets }(hjϨhhhNhNubj3 )}(h**pre_enable_prev_first**h]hpre_enable_prev_first}(hjרhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjϨubh , then the }(hjϨhhhNhNubj3 )}(h**post_disable**h]h post_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjϨubhG for that bridge will be called before the previous one to reverse the }(hjϨhhhNhNubj3 )}(h**pre_enable**h]h pre_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjϨubh calling direction.}(hjϨhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMmhjϧubh)}(h **Example**h]j3 )}(hjh]hExample}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMqhjϧubh)}(h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge Eh]h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMrhjϧubh)}(hWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **post_disable** order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.h](hLWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting }(hj;hhhNhNubj3 )}(h**post_disable**h]h post_disable}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubhB order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMthjϧubh)}(h**Note**h]j3 )}(hj^h]hNote}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMxhjϧubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMyhjϧubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_atomic_bridge_chain_pre_enable (C function)$c.drm_atomic_bridge_chain_pre_enablehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hdvoid drm_atomic_bridge_chain_pre_enable (struct drm_bridge *bridge, struct drm_atomic_commit *state)h]j )}(hcvoid drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h"drm_atomic_bridge_chain_pre_enableh]j )}(h"drm_atomic_bridge_chain_pre_enableh]h"drm_atomic_bridge_chain_pre_enable}(hjĩhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h<(struct drm_bridge *bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܩubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܩubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjƩsb$c.drm_atomic_bridge_chain_pre_enableasbuh1hhjܩubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܩubj9)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjܩubj )}(hbridgeh]hbridge}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܩubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjةubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjrmodnameN classnameNj j )}j ]j$c.drm_atomic_bridge_chain_pre_enableasbuh1hhjNubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjNubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjةubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h6prepares for enabling all bridges in the encoder chainh]h6prepares for enabling all bridges in the encoder chain}(hjӪhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjЪhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hXb**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_pre_enable ` op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_enable ` If a bridge sets **pre_enable_prev_first**, then the pre_enable for the prev bridge will be called before pre_enable of this bridge. **Example** Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **pre_enable** order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj*ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj)hMhj ubj| )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjMh]hstruct drm_atomic_commit *state}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjGubj )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjcubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hjbhMhj ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hX Calls :c:type:`drm_bridge_funcs.atomic_pre_enable ` op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_enable `h](hCalls }(hjhhhNhNubh)}(h?:c:type:`drm_bridge_funcs.atomic_pre_enable `h]j )}(hjh]h"drm_bridge_funcs.atomic_pre_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubhz op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hjhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]j )}(hj̫h]h&drm_encoder_helper_funcs.atomic_enable}(hjΫhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjʫubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjūhMhjubeh}(h]h ]h"]h$]h&]uh1hhjūhMhjubh)}(hIf a bridge sets **pre_enable_prev_first**, then the pre_enable for the prev bridge will be called before pre_enable of this bridge.h](hIf a bridge sets }(hjhhhNhNubj3 )}(h**pre_enable_prev_first**h]hpre_enable_prev_first}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhZ, then the pre_enable for the prev bridge will be called before pre_enable of this bridge.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Example**h]j3 )}(hjh]hExample}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge Eh]h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **pre_enable** order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.h](hLWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting }(hj7hhhNhNubj3 )}(h**pre_enable**h]h pre_enable}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubhB order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h**Note**h]j3 )}(hjZh]hNote}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_atomic_bridge_chain_enable (C function) c.drm_atomic_bridge_chain_enablehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hfvoid drm_atomic_bridge_chain_enable (struct drm_bridge *first_bridge, struct drm_atomic_commit *state)h]j )}(hevoid drm_atomic_bridge_chain_enable(struct drm_bridge *first_bridge, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_atomic_bridge_chain_enableh]j )}(hdrm_atomic_bridge_chain_enableh]hdrm_atomic_bridge_chain_enable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hB(struct drm_bridge *first_bridge, struct drm_atomic_commit *state)h](j)}(hstruct drm_bridge *first_bridgeh](j )}(hj h]hstruct}(hjܬhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjجubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjجubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj¬sb c.drm_atomic_bridge_chain_enableasbuh1hhjجubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjجubj9)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjجubj )}(h first_bridgeh]h first_bridge}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjجubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjԬubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]j c.drm_atomic_bridge_chain_enableasbuh1hhjJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjԬubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h(enables all bridges in the encoder chainh]h(enables all bridges in the encoder chain}(hjϭhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj̭hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *first_bridge`` bridge control structure ``struct drm_atomic_commit *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_enable ` op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_enable ` **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh](j| )}(h=``struct drm_bridge *first_bridge`` bridge control structure h](j )}(h#``struct drm_bridge *first_bridge``h]j )}(hjh]hstruct drm_bridge *first_bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj ubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj&ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj%hMhjubj| )}(hA``struct drm_atomic_commit *state`` atomic state being committed h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjIh]hstruct drm_atomic_commit *state}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjCubj )}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj_ubah}(h]h ]h"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]uh1j{ hj^hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXCalls :c:type:`drm_bridge_funcs.atomic_enable ` op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_enable `h](hCalls }(hjhhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]j )}(hjh]hdrm_bridge_funcs.atomic_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh| op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing }(hjhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]j )}(hjȮh]h&drm_encoder_helper_funcs.atomic_enable}(hjʮhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjƮubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h**Note**h]j3 )}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_atomic_bridge_chain_check (C function)c.drm_atomic_bridge_chain_checkhNtauh1j hjIhhhNhNubj )}(hhh](j )}(hint drm_atomic_bridge_chain_check (struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h]j )}(hint drm_atomic_bridge_chain_check(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h](j)}(hinth]hint}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMjubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhj@hMjubj )}(hdrm_atomic_bridge_chain_checkh]j )}(hdrm_atomic_bridge_chain_checkh]hdrm_atomic_bridge_chain_check}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhj@hMjubj)}(hf(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjUsbc.drm_atomic_bridge_chain_checkasbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjkubj )}(hbridgeh]hbridge}(hjȯhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(h!struct drm_crtc_state *crtc_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݯubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݯubh)}(hhh]j )}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_atomic_bridge_chain_checkasbuh1hhjݯubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݯubj9)}(hjOh]h*}(hj+hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjݯubj )}(h crtc_stateh]h crtc_state}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݯubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(h&struct drm_connector_state *conn_stateh](j )}(hj h]hstruct}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]jc.drm_atomic_bridge_chain_checkasbuh1hhjMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjMubj )}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubeh}(h]h ]h"]h$]h&]j j uh1jhj.hhhj@hMjubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj*hhhj@hMjubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j hj@hMjhj'hhubj )}(hhh]h)}(h&Do an atomic check on the bridge chainh]h&Do an atomic check on the bridge chain}(hjҰhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMjhjϰhhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj@hMjubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_crtc_state *crtc_state`` new CRTC state ``struct drm_connector_state *conn_state`` new connector state **Description** First trigger a bus format negotiation before calling :c:type:`drm_bridge_funcs.atomic_check\(\) ` (falls back on :c:type:`drm_bridge_funcs.mode_fixup\(\) `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` **Return** 0 on success, a negative error code on failureh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMnhjubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMkhj ubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMkhj)ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hMkhj ubj| )}(h5``struct drm_crtc_state *crtc_state`` new CRTC state h](j )}(h%``struct drm_crtc_state *crtc_state``h]j )}(hjLh]h!struct drm_crtc_state *crtc_state}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMlhjFubj )}(hhh]h)}(hnew CRTC stateh]hnew CRTC state}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMlhjbubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1j{ hjahMlhj ubj| )}(h?``struct drm_connector_state *conn_state`` new connector state h](j )}(h*``struct drm_connector_state *conn_state``h]j )}(hjh]h&struct drm_connector_state *conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMmhjubj )}(hhh]h)}(hnew connector stateh]hnew connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMmhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMmhj ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hj±hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMohjubh)}(hXFirst trigger a bus format negotiation before calling :c:type:`drm_bridge_funcs.atomic_check\(\) ` (falls back on :c:type:`drm_bridge_funcs.mode_fixup\(\) `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h](h6First trigger a bus format negotiation before calling }(hjֱhhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]j )}(hjh]hdrm_bridge_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjޱubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMnhjֱubh (falls back on }(hjֱhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]j )}(hjh]hdrm_bridge_funcs.mode_fixup()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhjhMnhjֱubh{) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hjֱhhhNhNubh)}(hN:c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h]j )}(hj'h]h'drm_encoder_helper_funcs.atomic_check()}(hj)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhjhMnhjֱubeh}(h]h ]h"]h$]h&]uh1hhjhMnhjubh)}(h **Return**h]j3 )}(hjLh]hReturn}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMthjubh)}(h.0 on success, a negative error code on failureh]h.0 on success, a negative error code on failure}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMuhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_detect (C function)c.drm_bridge_detecthNtauh1j hjIhhhNhNubj )}(hhh](j )}(hhenum drm_connector_status drm_bridge_detect (struct drm_bridge *bridge, struct drm_connector *connector)h]j )}(hgenum drm_connector_status drm_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)h](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_bridge_detectsbc.drm_bridge_detectasbuh1hhjhhhjhMubj )}(h h]h }(hjѲhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_bridge_detecth]j )}(hjβh]hdrm_bridge_detect}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj߲ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j̲c.drm_bridge_detectasbuh1hhjubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j̲c.drm_bridge_detectasbuh1hhjjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjjubj )}(h connectorh]h connector}(hjųhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h2check if anything is attached to the bridge outputh]h2check if anything is attached to the bridge output}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` attached connector **Description** If the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call :c:type:`drm_bridge_funcs.detect ` for the bridge and return the connection status. Otherwise return connector_status_unknown. **Return** The detection status on success, or connector_status_unknown if the bridge doesn't support output detection.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj ubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hj0h]hstruct drm_bridge *bridge}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj*ubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMhjFubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hjEhMhj'ubj| )}(h7``struct drm_connector *connector`` attached connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjih]hstruct drm_connector *connector}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjcubj )}(hhh]h)}(hattached connectorh]hattached connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhjubah}(h]h ]h"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]uh1j{ hj~hMhj'ubeh}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj ubh)}(hIf the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call :c:type:`drm_bridge_funcs.detect ` for the bridge and return the connection status. Otherwise return connector_status_unknown.h](hgIf the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call }(hjhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.detect `h]j )}(hjĴh]hdrm_bridge_funcs.detect}(hjƴhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj´ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh\ for the bridge and return the connection status. Otherwise return connector_status_unknown.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj ubh)}(hlThe detection status on success, or connector_status_unknown if the bridge doesn't support output detection.h]hnThe detection status on success, or connector_status_unknown if the bridge doesn’t support output detection.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_bridge_get_modes (C function)c.drm_bridge_get_modeshNtauh1j hjIhhhNhNubj )}(hhh](j )}(hUint drm_bridge_get_modes (struct drm_bridge *bridge, struct drm_connector *connector)h]j )}(hTint drm_bridge_get_modes(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhjAhMubj )}(hdrm_bridge_get_modesh]j )}(hdrm_bridge_get_modesh]hdrm_bridge_get_modes}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/hhhjAhMubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjVsbc.drm_bridge_get_modesasbuh1hhjlubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjlubj )}(hbridgeh]hbridge}(hjɵhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޵ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޵ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_get_modesasbuh1hhj޵ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޵ubj9)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj޵ubj )}(h connectorh]h connector}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޵ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubeh}(h]h ]h"]h$]h&]j j uh1jhj/hhhjAhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+hhhjAhMubah}(h]j&ah ](j j eh"]h$]h&]j j )j huh1j hjAhMhj(hhubj )}(hhh]h)}(hBfill all modes currently valid for the sink into the **connector**h](h5fill all modes currently valid for the sink into the }(hjchhhNhNubj3 )}(h **connector**h]h connector}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj`hhubah}(h]h ]h"]h$]h&]uh1j hj(hhhjAhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` the connector to fill with modes **Description** If the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call :c:type:`drm_bridge_funcs.get_modes ` to fill the connector with all valid modes and return the number of modes added. Otherwise return 0. **Return** The number of modes added to the connector.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj˶hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjǶhMhjȶubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjǶhMhjubj| )}(hE``struct drm_connector *connector`` the connector to fill with modes h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(h the connector to fill with modesh]h the connector to fill with modes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj&h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXIf the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call :c:type:`drm_bridge_funcs.get_modes ` to fill the connector with all valid modes and return the number of modes added. Otherwise return 0.h](hlIf the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call }(hj<hhhNhNubh)}(h7:c:type:`drm_bridge_funcs.get_modes `h]j )}(hjFh]hdrm_bridge_funcs.get_modes}(hjHhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj<ubhe to fill the connector with all valid modes and return the number of modes added. Otherwise return 0.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchMhjubh)}(h **Return**h]j3 )}(hjph]hReturn}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h+The number of modes added to the connector.h]h+The number of modes added to the connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_bridge_edid_read (C function)c.drm_bridge_edid_readhNtauh1j hjIhhhNhNubj )}(hhh](j )}(hiconst struct drm_edid * drm_bridge_edid_read (struct drm_bridge *bridge, struct drm_connector *connector)h]j )}(hgconst struct drm_edid *drm_bridge_edid_read(struct drm_bridge *bridge, struct drm_connector *connector)h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hj÷hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj·hMubj )}(hj h]hstruct}(hjѷhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj·hMubj )}(h h]h }(hj޷hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj·hMubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_bridge_edid_readsbc.drm_bridge_edid_readasbuh1hhjhhhj·hMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj·hMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhj·hMubj )}(hdrm_bridge_edid_readh]j )}(hj h]hdrm_bridge_edid_read}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj·hMubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjjmodnameN classnameNj j )}j ]j c.drm_bridge_edid_readasbuh1hhjFubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjFubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjBubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjǸhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjظhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjոubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjڸmodnameN classnameNj j )}j ]j c.drm_bridge_edid_readasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjBubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj·hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj·hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj·hMhjhhubj )}(hhh]h)}(h+read the EDID data of the connected displayh]h+read the EDID data of the connected display}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj8hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj·hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jSj$ jSj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` the connector to read EDID for **Description** If the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call :c:type:`drm_bridge_funcs.edid_read ` to get the EDID and return it. Otherwise return NULL. **Return** The retrieved EDID on success, or NULL otherwise.h](h)}(h**Parameters**h]j3 )}(hj]h]h Parameters}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjWubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hj|h]hstruct drm_bridge *bridge}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjvubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjsubj| )}(hC``struct drm_connector *connector`` the connector to read EDID for h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hthe connector to read EDID forh]hthe connector to read EDID for}(hjιhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjʹhMhj˹ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjʹhMhjsubeh}(h]h ]h"]h$]h&]uh1jv hjWubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjWubh)}(hIf the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call :c:type:`drm_bridge_funcs.edid_read ` to get the EDID and return it. Otherwise return NULL.h](hjIf the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call }(hjhhhNhNubh)}(h7:c:type:`drm_bridge_funcs.edid_read `h]j )}(hjh]hdrm_bridge_funcs.edid_read}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh6 to get the EDID and return it. Otherwise return NULL.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMhjWubh)}(h **Return**h]j3 )}(hj:h]hReturn}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj8ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjWubh)}(h1The retrieved EDID on success, or NULL otherwise.h]h1The retrieved EDID on success, or NULL otherwise.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjWubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_bridge_hpd_enable (C function)c.drm_bridge_hpd_enablehNtauh1j hjIhhhNhNubj )}(hhh](j )}(h|void drm_bridge_hpd_enable (struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h]j )}(h{void drm_bridge_hpd_enable(struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{hhhjhMubj )}(hdrm_bridge_hpd_enableh]j )}(hdrm_bridge_hpd_enableh]hdrm_bridge_hpd_enable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj{hhhjhMubj)}(ha(struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjɺhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjںhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj׺ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjܺmodnameN classnameNj j )}j ]j%)}jjsbc.drm_bridge_hpd_enableasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h8void (*cb)(void *data, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj9)}(h(h]h(}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubj9)}(hjOh]h*}(hjXhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubj )}(hcbh]hcb}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj9)}(h)h]h)}(hjshhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubj9)}(hjLh]h(}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj9)}(h,h]h,}(hjŻhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubj )}(h h]h }(hjӻhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_hpd_enableasbuh1hhj*ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj )}(hstatush]hstatus}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubj9)}(hjuh]h)}(hj9hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *datah](j)}(hvoidh]hvoid}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj9)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjMubj )}(hdatah]hdata}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj{hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjwhhhjhMubah}(h]jrah ](j j eh"]h$]h&]j j )j huh1j hjhMhjthhubj )}(hhh]h)}(h(enable hot plug detection for the bridgeh]h(enable hot plug detection for the bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjthhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``void (*cb)(void *data, enum drm_connector_status status)`` hot-plug detection callback ``void *data`` data to be passed to the hot-plug detection callback **Description** Call :c:type:`drm_bridge_funcs.hpd_enable ` if implemented and register the given **cb** and **data** as hot plug notification callback. From now on the **cb** will be called with **data** when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable(). Hot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set. Only one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.h](h)}(h**Parameters**h]j3 )}(hjƼh]h Parameters}(hjȼhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjļubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj߼ubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hj߼ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjܼubj| )}(hY``void (*cb)(void *data, enum drm_connector_status status)`` hot-plug detection callback h](j )}(h<``void (*cb)(void *data, enum drm_connector_status status)``h]j )}(hjh]h8void (*cb)(void *data, enum drm_connector_status status)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubj )}(hhh]h)}(hhot-plug detection callbackh]hhot-plug detection callback}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMhj4ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj3hMhjܼubj| )}(hD``void *data`` data to be passed to the hot-plug detection callback h](j )}(h``void *data``h]j )}(hjWh]h void *data}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjQubj )}(hhh]h)}(h4data to be passed to the hot-plug detection callbackh]h4data to be passed to the hot-plug detection callback}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMhjmubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjlhMhjܼubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXOCall :c:type:`drm_bridge_funcs.hpd_enable ` if implemented and register the given **cb** and **data** as hot plug notification callback. From now on the **cb** will be called with **data** when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable().h](hCall }(hjhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.hpd_enable `h]j )}(hjh]hdrm_bridge_funcs.hpd_enable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh' if implemented and register the given }(hjhhhNhNubj3 )}(h**cb**h]hcb}(hjԽhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**data**h]hdata}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh4 as hot plug notification callback. From now on the }(hjhhhNhNubj3 )}(h**cb**h]hcb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh will be called with }(hjhhhNhNubj3 )}(h**data**h]hdata}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjϽhMhjubh)}(hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h]hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hOnly one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.h]hOnly one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_bridge_hpd_disable (C function)c.drm_bridge_hpd_disablehNtauh1j hjIhhhNhNubj )}(hhh](j )}(h7void drm_bridge_hpd_disable (struct drm_bridge *bridge)h]j )}(h6void drm_bridge_hpd_disable(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhjnhMubj )}(hdrm_bridge_hpd_disableh]j )}(hdrm_bridge_hpd_disableh]hdrm_bridge_hpd_disable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj\hhhjnhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_bridge_hpd_disableasbuh1hhjubj )}(h h]h }(hj۾hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj\hhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjXhhhjnhMubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j hjnhMhjUhhubj )}(hhh]h)}(h)disable hot plug detection for the bridgeh]h)disable hot plug detection for the bridge}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjUhhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j8j$ j8j% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure **Description** Call :c:type:`drm_bridge_funcs.hpd_disable ` if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs. Hot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h](h)}(h**Parameters**h]j3 )}(hjBh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM hj<ubjw )}(hhh]j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjah]hstruct drm_bridge *bridge}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj[ubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjwubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hjvhMhjXubah}(h]h ]h"]h$]h&]uh1jv hj<ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj<ubh)}(hXCall :c:type:`drm_bridge_funcs.hpd_disable ` if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs.h](hCall }(hjhhhNhNubh)}(h9:c:type:`drm_bridge_funcs.hpd_disable `h]j )}(hjh]hdrm_bridge_funcs.hpd_disable}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubh if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjٿhMhj<ubh)}(hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h]hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM#hj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_bridge_hpd_notify (C function)c.drm_bridge_hpd_notifyhNtauh1j hjIhhhNhNubj )}(hhh](j )}(hXvoid drm_bridge_hpd_notify (struct drm_bridge *bridge, enum drm_connector_status status)h]j )}(hWvoid drm_bridge_hpd_notify(struct drm_bridge *bridge, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM9ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj!hM9ubj )}(hdrm_bridge_hpd_notifyh]j )}(hdrm_bridge_hpd_notifyh]hdrm_bridge_hpd_notify}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj!hM9ubj)}(h=(struct drm_bridge *bridge, enum drm_connector_status status)h](j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]j%)}jj6sbc.drm_bridge_hpd_notifyasbuh1hhjLubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(h enum drm_connector_status statush](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_connector_statush]hdrm_connector_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_hpd_notifyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstatush]hstatus}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj!hM9ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj!hM9ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj!hM9hjhhubj )}(hhh]h)}(h notify hot plug detection eventsh]h notify hot plug detection events}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM9hj3hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj!hM9ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jNj$ jNj% j& j' uh1j hhhjIhNhNubj) )}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``enum drm_connector_status status`` output connection status **Description** Bridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable(). This function shall be called in a context that can sleep.h](h)}(h**Parameters**h]j3 )}(hjXh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM=hjRubjw )}(hhh](j| )}(h7``struct drm_bridge *bridge`` bridge control structure h](j )}(h``struct drm_bridge *bridge``h]j )}(hjwh]hstruct drm_bridge *bridge}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM:hjqubj )}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM:hjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhM:hjnubj| )}(h>``enum drm_connector_status status`` output connection status h](j )}(h$``enum drm_connector_status status``h]j )}(hjh]h enum drm_connector_status status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM;hjubj )}(hhh]h)}(houtput connection statush]houtput connection status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM;hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM;hjnubeh}(h]h ]h"]h$]h&]uh1jv hjRubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM=hjRubh)}(hBridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable().h]hBridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM<hjRubh)}(h:This function shall be called in a context that can sleep.h]h:This function shall be called in a context that can sleep.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM@hjRubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'of_drm_find_and_get_bridge (C function)c.of_drm_find_and_get_bridgehNtauh1j hjIhhhNhNubj )}(hhh](j )}(hGstruct drm_bridge * of_drm_find_and_get_bridge (struct device_node *np)h]j )}(hEstruct drm_bridge *of_drm_find_and_get_bridge(struct device_node *np)h](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMOubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhjLhMOubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`modnameN classnameNj j )}j ]j%)}jof_drm_find_and_get_bridgesbc.of_drm_find_and_get_bridgeasbuh1hhj;hhhjLhMOubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhjLhMOubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;hhhjLhMOubj )}(hof_drm_find_and_get_bridgeh]j )}(hj|h]hof_drm_find_and_get_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;hhhjLhMOubj)}(h(struct device_node *np)h]j)}(hstruct device_node *nph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jzc.of_drm_find_and_get_bridgeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hnph]hnp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj;hhhjLhMOubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhjLhMOubah}(h]j2ah ](j j eh"]h$]h&]j j )j huh1j hjLhMOhj4hhubj )}(hhh]h)}(hJfind the bridge corresponding to the device node in the global bridge listh]hJfind the bridge corresponding to the device node in the global bridge list}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMOhj7hhubah}(h]h ]h"]h$]h&]uh1j hj4hhhjLhMOubeh}(h]h ](j functioneh"]h$]h&]j" j j# jRj$ jRj% j& j' uh1j hhhjIhNhNubj) )}(h**Parameters** ``struct device_node *np`` device node **Description** The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** drm_bridge control struct on success, NULL on failureh](h)}(h**Parameters**h]j3 )}(hj\h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMShjVubjw )}(hhh]j| )}(h'``struct device_node *np`` device node h](j )}(h``struct device_node *np``h]j )}(hj{h]hstruct device_node *np}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMQhjuubj )}(hhh]h)}(h device nodeh]h device node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQhjubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjhMQhjrubah}(h]h ]h"]h$]h&]uh1jv hjVubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMShjVubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMRhjVubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMUhjVubh)}(h5drm_bridge control struct on success, NULL on failureh]h5drm_bridge control struct on success, NULL on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMVhjVubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j of_drm_find_bridge (C function)c.of_drm_find_bridgehNtauh1j hjIhhhNhNubj )}(hhh](j )}(h?struct drm_bridge * of_drm_find_bridge (struct device_node *np)h]j )}(h=struct drm_bridge *of_drm_find_bridge(struct device_node *np)h](j )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj/hMhubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjCmodnameN classnameNj j )}j ]j%)}jof_drm_find_bridgesbc.of_drm_find_bridgeasbuh1hhjhhhj/hMhubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj/hMhubj9)}(hjOh]h*}(hjphhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhj/hMhubj )}(hof_drm_find_bridgeh]j )}(hj_h]hof_drm_find_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj/hMhubj)}(h(struct device_node *np)h]j)}(hstruct device_node *nph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j]c.of_drm_find_bridgeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hnph]hnp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj/hMhubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj/hMhubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj/hMhhjhhubj )}(hhh]h)}(hJfind the bridge corresponding to the device node in the global bridge listh]hJfind the bridge corresponding to the device node in the global bridge list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj/hMhubeh}(h]h ](j functioneh"]h$]h&]j" j j# j5j$ j5j% j& j' uh1j hhhjIhNhNubj) )}(hX@**Parameters** ``struct device_node *np`` device node **Description** This function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting. The bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of: - get a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer - not call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced - again, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do **Return** drm_bridge control struct on success, NULL on failureh](h)}(h**Parameters**h]j3 )}(hj?h]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMlhj9ubjw )}(hhh]j| )}(h'``struct device_node *np`` device node h](j )}(h``struct device_node *np``h]j )}(hj^h]hstruct device_node *np}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMkhjXubj )}(hhh]h)}(h device nodeh]h device node}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMkhjtubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjshMkhjUubah}(h]h ]h"]h$]h&]uh1jv hj9ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMmhj9ubh)}(hdThis function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting.h]hdThis function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMlhj9ubh)}(hThe bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of:h]hThe bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMohj9ubh)}(hhh](h)}(hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer h]h)}(hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointerh]hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMshjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced h]h)}(hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introducedh]hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMwhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hSagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do h]h)}(hRagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to doh]hRagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMzhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNj<uh1hhjhMshj9ubh)}(h **Return**h]j3 )}(hj#h]hReturn}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM}hj9ubh)}(h5drm_bridge control struct on success, NULL on failureh]h5drm_bridge control struct on success, NULL on failure}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chM~hj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjIhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *of_drm_get_bridge_by_endpoint (C function)c.of_drm_get_bridge_by_endpointhNtauh1j hjIhhhNhNubj )}(hhh](j )}(hhstruct drm_bridge * of_drm_get_bridge_by_endpoint (const struct device_node *np, int port, int endpoint)h]j )}(hfstruct drm_bridge *of_drm_get_bridge_by_endpoint(const struct device_node *np, int port, int endpoint)h](j )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhhjuhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jof_drm_get_bridge_by_endpointsbc.of_drm_get_bridge_by_endpointasbuh1hhjdhhhjuhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhhjuhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjdhhhjuhMubj )}(hof_drm_get_bridge_by_endpointh]j )}(hjh]hof_drm_get_bridge_by_endpoint}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjdhhhjuhMubj)}(h6(const struct device_node *np, int port, int endpoint)h](j)}(hconst struct device_node *nph](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.of_drm_get_bridge_by_endpointasbuh1hhjubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjGhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hnph]hnp}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint porth](j)}(hinth]hint}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int endpointh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendpointh]hendpoint}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjdhhhjuhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj`hhhjuhMubah}(h]j[ah ](j j eh"]h$]h&]j j )j huh1j hjuhMhj]hhubj )}(hhh]h)}(h.return DRM bridge connected to a port/endpointh]h.return DRM bridge connected to a port/endpoint}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj]hhhjuhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjIhNhNubj) )}(hX0**Parameters** ``const struct device_node *np`` device tree node containing output ports ``int port`` port in the device tree node, or -1 for the first port found ``int endpoint`` endpoint in the device tree node, or -1 for the first endpoint found **Description** Given a DT node's port and endpoint number, find the connected node and return the associated drm_bridge device. The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. Returns a pointer to the connected drm_bridge, or a negative error on failureh](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhjubjw )}(hhh](j| )}(hJ``const struct device_node *np`` device tree node containing output ports h](j )}(h ``const struct device_node *np``h]j )}(hj)h]hconst struct device_node *np}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj#ubj )}(hhh]h)}(h(device tree node containing output portsh]h(device tree node containing output ports}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj?ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMhj ubj| )}(hJ``int port`` port in the device tree node, or -1 for the first port found h](j )}(h ``int port``h]j )}(hjbh]hint port}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:193: ./drivers/gpu/drm/drm_bridge.chMhj\ubj )}(hhh]h)}(hubj)}(hstruct drm_encoder *encoderh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_encoderh]h drm_encoder}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_bridge_connector_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hencoderh]hencoder}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM#ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM#ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM#hjhhubj )}(hhh]h)}(h-Initialise a connector for a chain of bridgesh]h-Initialise a connector for a chain of bridges}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM#hj4hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM#ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jOj$ jOj% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_device *drm`` the DRM device ``struct drm_encoder *encoder`` the encoder where the bridge chain starts **Description** Create a new :c:type:`drm_bridge_connector` for the **drm** device. The connector is allocated, initialised, registered with the **drm** device and attached to **encoder**. The connector is associated with a chain of bridges that starts at the **encoder**. All bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), and none of them may create a DRM connector directly. Returns a pointer to the new connector on success, or a negative error pointer otherwise.h](h)}(h**Parameters**h]j3 )}(hjYh]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM'hjSubjw )}(hhh](j| )}(h*``struct drm_device *drm`` the DRM device h](j )}(h``struct drm_device *drm``h]j )}(hjxh]hstruct drm_device *drm}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM$hjrubj )}(hhh]h)}(hthe DRM deviceh]hthe DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM$hjubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjhM$hjoubj| )}(hJ``struct drm_encoder *encoder`` the encoder where the bridge chain starts h](j )}(h``struct drm_encoder *encoder``h]j )}(hjh]hstruct drm_encoder *encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM%hjubj )}(hhh]h)}(h)the encoder where the bridge chain startsh]h)the encoder where the bridge chain starts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM%hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM%hjoubeh}(h]h ]h"]h$]h&]uh1jv hjSubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM'hjSubh)}(hCreate a new :c:type:`drm_bridge_connector` for the **drm** device. The connector is allocated, initialised, registered with the **drm** device and attached to **encoder**.h](h Create a new }(hjhhhNhNubh)}(h:c:type:`drm_bridge_connector`h]j )}(hj h]hdrm_bridge_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_connectoruh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM&hjubh for the }(hjhhhNhNubj3 )}(h**drm**h]hdrm}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhF device. The connector is allocated, initialised, registered with the }(hjhhhNhNubj3 )}(h**drm**h]hdrm}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh device and attached to }(hjhhhNhNubj3 )}(h **encoder**h]hencoder}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj)hM&hjSubh)}(hX1The connector is associated with a chain of bridges that starts at the **encoder**. All bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), and none of them may create a DRM connector directly.h](hGThe connector is associated with a chain of bridges that starts at the }(hjjhhhNhNubj3 )}(h **encoder**h]hencoder}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjubh@. All bridges in the chain shall report bridge operation flags (}(hjjhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]j )}(hjh]hdrm_bridge->ops}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM*hjjubh) and bridge output type (}(hjjhhhNhNubh)}(h':c:type:`drm_bridge->type `h]j )}(hjh]hdrm_bridge->type}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hhjhM*hjjubh8), and none of them may create a DRM connector directly.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM*hjSubh)}(hYReturns a pointer to the new connector on success, or a negative error pointer otherwise.h]hYReturns a pointer to the new connector on success, or a negative error pointer otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:206: ./drivers/gpu/drm/display/drm_bridge_connector.chM/hjSubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubeh}(h]jah ]h"]!bridge connector helper referenceah$]h&]uh1hhjc?hhhhhKubh)}(hhh](h)}(hPanel-Bridge Helper Referenceh]hPanel-Bridge Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjhhhhhKubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_is_panel (C function)c.drm_bridge_is_panelhNtauh1j hjhhhNhNubj )}(hhh](j )}(h:bool drm_bridge_is_panel (const struct drm_bridge *bridge)h]j )}(h9bool drm_bridge_is_panel(const struct drm_bridge *bridge)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj%hKubj )}(hdrm_bridge_is_panelh]j )}(hdrm_bridge_is_panelh]hdrm_bridge_is_panel}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj%hKubj)}(h!(const struct drm_bridge *bridge)h]j)}(hconst struct drm_bridge *bridgeh](j )}(hjch]hconst}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj:sbc.drm_bridge_is_panelasbuh1hhjPubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjPubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj%hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj%hKubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj%hKhj hhubj )}(hhh]h)}(h)Checks if a drm_bridge is a panel_bridge.h]h)Checks if a drm_bridge is a panel_bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj%hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``const struct drm_bridge *bridge`` The drm_bridge to be checked. **Description** Returns true if the bridge is a panel bridge, or false otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhjubjw )}(hhh]j| )}(hB``const struct drm_bridge *bridge`` The drm_bridge to be checked. h](j )}(h#``const struct drm_bridge *bridge``h]j )}(hj3h]hconst struct drm_bridge *bridge}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhj-ubj )}(hhh]h)}(hThe drm_bridge to be checked.h]hThe drm_bridge to be checked.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhKhjIubah}(h]h ]h"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]uh1j{ hjHhKhj*ubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjnh]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjlubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hAReturns true if the bridge is a panel bridge, or false otherwise.h]hAReturns true if the bridge is a panel bridge, or false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_panel_bridge_add (C function)c.drm_panel_bridge_addhNtauh1j hjhhhNhNubj )}(hhh](j )}(hBstruct drm_bridge * drm_panel_bridge_add (struct drm_panel *panel)h]j )}(h@struct drm_bridge *drm_panel_bridge_add(struct drm_panel *panel)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_panel_bridge_addsbc.drm_panel_bridge_addasbuh1hhjhhhjhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhKubj )}(hdrm_panel_bridge_addh]j )}(hjh]hdrm_panel_bridge_add}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]jc.drm_panel_bridge_addasbuh1hhj)ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjOh]h*}(hjwhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(h~Creates a :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](h Creates a }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_panel_bridge_addasbj drm_bridgeuh1hhj%hKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_connectoruh1hhj%hKhjubh0 that just calls the appropriate functions from }(hjhhhNhNubh)}(h:c:type:`drm_panel`h]j )}(hjh]h drm_panel}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_paneluh1hhj%hKhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j4j$ j4j% j& j' uh1j hhhjhNhNubj) )}(hX;**Parameters** ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** For drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they're now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it. The connector type is set to **panel->connector_type**, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL). See devm_drm_panel_bridge_add() for an automatically managed version of this function.h](h)}(h**Parameters**h]j3 )}(hj>h]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhj8ubjw )}(hhh]j| )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j )}(h``struct drm_panel *panel``h]j )}(hj]h]hstruct drm_panel *panel}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhjWubj )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhKhjsubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjrhKhjTubah}(h]h ]h"]h$]h&]uh1jv hj8ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhj8ubh)}(hXFor drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they're now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it.h]hXFor drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they’re now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhj8ubh)}(hThe connector type is set to **panel->connector_type**, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL).h](hThe connector type is set to }(hjhhhNhNubj3 )}(h**panel->connector_type**h]hpanel->connector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chKhj8ubh)}(hVSee devm_drm_panel_bridge_add() for an automatically managed version of this function.h]hVSee devm_drm_panel_bridge_add() for an automatically managed version of this function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_panel_bridge_add_typed (C function)c.drm_panel_bridge_add_typedhNtauh1j hjhhhNhNubj )}(hhh](j )}(h\struct drm_bridge * drm_panel_bridge_add_typed (struct drm_panel *panel, u32 connector_type)h]j )}(hZstruct drm_bridge *drm_panel_bridge_add_typed(struct drm_panel *panel, u32 connector_type)h](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j%)}jdrm_panel_bridge_add_typedsbc.drm_panel_bridge_add_typedasbuh1hhj hhhjhMubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMubj9)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj hhhjhMubj )}(hdrm_panel_bridge_add_typedh]j )}(hjJh]hdrm_panel_bridge_add_typed}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMubj)}(h-(struct drm_panel *panel, u32 connector_type)h](j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jHc.drm_panel_bridge_add_typedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 connector_typeh](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jHc.drm_panel_bridge_add_typedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hconnector_typeh]hconnector_type}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h[Creates a :c:type:`drm_bridge` and :c:type:`drm_connector` with an explicit connector type.h](h Creates a }(hjPhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjZh]h drm_bridge}(hj\hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jHc.drm_panel_bridge_add_typedasbj drm_bridgeuh1hhj%hKhjPubh and }(hjPhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jvj drm_connectoruh1hhj%hKhjPubh! with an explicit connector type.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjMhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. ``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) **Description** This is just like drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel. This function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubjw )}(hhh](j| )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hA``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) h](j )}(h``u32 connector_type``h]j )}(hjh]hu32 connector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h)The connector type (DRM_MODE_CONNECTOR_*)h]h)The connector type (DRM_MODE_CONNECTOR_*)}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj*hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjPh]h Description}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis is just like drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel.h](hKThis is just like drm_panel_bridge_add(), but forces the connector type to }(hjfhhhNhNubj3 )}(h**connector_type**h]hconnector_type}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubh' instead of infering it from the panel.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h]hThis function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don’t report a connector type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_panel_bridge_remove (C function)c.drm_panel_bridge_removehNtauh1j hjhhhNhNubj )}(hhh](j )}(h8void drm_panel_bridge_remove (struct drm_bridge *bridge)h]j )}(h7void drm_panel_bridge_remove(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM7ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM7ubj )}(hdrm_panel_bridge_removeh]j )}(hdrm_panel_bridge_removeh]hdrm_panel_bridge_remove}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM7ubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_panel_bridge_removeasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM7ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM7hjhhubj )}(hhh]h)}(hEUnregisters and frees a drm_bridge created by drm_panel_bridge_add().h]hEUnregisters and frees a drm_bridge created by drm_panel_bridge_add().}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM7hjshhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM7ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hK**Parameters** ``struct drm_bridge *bridge`` The drm_bridge being freed.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM;hjubjw )}(hhh]j| )}(h9``struct drm_bridge *bridge`` The drm_bridge being freed.h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM=hjubj )}(hhh]h)}(hThe drm_bridge being freed.h]hThe drm_bridge being freed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM:hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM=hjubah}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_panel_bridge_set_orientation (C function)"c.drm_panel_bridge_set_orientationhNtauh1j hjhhhNhNubj )}(hhh](j )}(haint drm_panel_bridge_set_orientation (struct drm_connector *connector, struct drm_bridge *bridge)h]j )}(h`int drm_panel_bridge_set_orientation(struct drm_connector *connector, struct drm_bridge *bridge)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMTubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhMTubj )}(h drm_panel_bridge_set_orientationh]j )}(h drm_panel_bridge_set_orientationh]h drm_panel_bridge_set_orientation}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhMTubj)}(h<(struct drm_connector *connector, struct drm_bridge *bridge)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]j%)}jj4sb"c.drm_panel_bridge_set_orientationasbuh1hhjJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubj)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_panel_bridge_set_orientationasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhMTubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhjhMTubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMThjhhubj )}(hhh]h)}(h^Set the connector's panel orientation from the bridge that can be transformed to panel bridge.h]h`Set the connector’s panel orientation from the bridge that can be transformed to panel bridge.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMThj>hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMTubeh}(h]h ](j functioneh"]h$]h&]j" j j# jYj$ jYj% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``struct drm_connector *connector`` The connector to be set panel orientation. ``struct drm_bridge *bridge`` The drm_bridge to be transformed to panel bridge. **Description** Returns 0 on success, negative errno on failure.h](h)}(h**Parameters**h]j3 )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMXhj]ubjw )}(hhh](j| )}(hO``struct drm_connector *connector`` The connector to be set panel orientation. h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMWhj|ubj )}(hhh]h)}(h*The connector to be set panel orientation.h]h*The connector to be set panel orientation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMWhjubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMWhjyubj| )}(hP``struct drm_bridge *bridge`` The drm_bridge to be transformed to panel bridge. h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMXhjubj )}(hhh]h)}(h1The drm_bridge to be transformed to panel bridge.h]h1The drm_bridge to be transformed to panel bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMXhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMXhjyubeh}(h]h ]h"]h$]h&]uh1jv hj]ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMZhj]ubh)}(h0Returns 0 on success, negative errno on failure.h]h0Returns 0 on success, negative errno on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMYhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &devm_drm_panel_bridge_add (C function)c.devm_drm_panel_bridge_addhNtauh1j hjhhhNhNubj )}(hhh](j )}(h[struct drm_bridge * devm_drm_panel_bridge_add (struct device *dev, struct drm_panel *panel)h]j )}(hYstruct drm_bridge *devm_drm_panel_bridge_add(struct device *dev, struct drm_panel *panel)h](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMxubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhjHhMxubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j%)}jdevm_drm_panel_bridge_addsbc.devm_drm_panel_bridge_addasbuh1hhj7hhhjHhMxubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhjHhMxubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj7hhhjHhMxubj )}(hdevm_drm_panel_bridge_addh]j )}(hjxh]hdevm_drm_panel_bridge_add}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhjHhMxubj)}(h-(struct device *dev, struct drm_panel *panel)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jvc.devm_drm_panel_bridge_addasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjEmodnameN classnameNj j )}j ]jvc.devm_drm_panel_bridge_addasbuh1hhj!ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj9)}(hjOh]h*}(hjohhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj!ubj )}(hpanelh]hpanel}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj7hhhjHhMxubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhjHhMxubah}(h]j.ah ](j j eh"]h$]h&]j j )j huh1j hjHhMxhj0hhubj )}(hhh]h)}(hCreates a managed :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](hCreates a managed }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jvc.devm_drm_panel_bridge_addasbj drm_bridgeuh1hhj%hKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_connectoruh1hhj%hKhjubh0 that just calls the appropriate functions from }(hjhhhNhNubh)}(h:c:type:`drm_panel`h]j )}(hjh]h drm_panel}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_paneluh1hhj%hKhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMxhjhhubah}(h]h ]h"]h$]h&]uh1j hj0hhhjHhMxubeh}(h]h ](j functioneh"]h$]h&]j" j j# j,j$ j,j% j& j' uh1j hhhjhNhNubj) )}(hX1**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** This is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is unbound.h](h)}(h**Parameters**h]j3 )}(hj6h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM|hj0ubjw )}(hhh](j| )}(h<``struct device *dev`` device to tie the bridge lifetime to h](j )}(h``struct device *dev``h]j )}(hjUh]hstruct device *dev}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMzhjOubj )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMzhjkubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMzhjLubj| )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM{hjubj )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM{hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM{hjLubeh}(h]h ]h"]h$]h&]uh1jv hj0ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM}hj0ubh)}(hThis is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is unbound.h](hoThis is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when }(hjhhhNhNubj3 )}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh is unbound.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chM|hj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,devm_drm_panel_bridge_add_typed (C function)!c.devm_drm_panel_bridge_add_typedhNtauh1j hjhhhNhNubj )}(hhh](j )}(hustruct drm_bridge * devm_drm_panel_bridge_add_typed (struct device *dev, struct drm_panel *panel, u32 connector_type)h]j )}(hsstruct drm_bridge *devm_drm_panel_bridge_add_typed(struct device *dev, struct drm_panel *panel, u32 connector_type)h](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj-hMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j%)}jdevm_drm_panel_bridge_add_typedsb!c.devm_drm_panel_bridge_add_typedasbuh1hhjhhhj-hMubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj-hMubj9)}(hjOh]h*}(hjnhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhj-hMubj )}(hdevm_drm_panel_bridge_add_typedh]j )}(hj]h]hdevm_drm_panel_bridge_add_typed}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj-hMubj)}(hA(struct device *dev, struct drm_panel *panel, u32 connector_type)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j[!c.devm_drm_panel_bridge_add_typedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j[!c.devm_drm_panel_bridge_add_typedasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjThhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 connector_typeh](h)}(hhh]j )}(hu32h]hu32}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j[!c.devm_drm_panel_bridge_add_typedasbuh1hhjvubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubj )}(hconnector_typeh]hconnector_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj-hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj-hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj-hMhjhhubj )}(hhh]h)}(hcCreates a managed :c:type:`drm_bridge` and :c:type:`drm_connector` with an explicit connector type.h](hCreates a managed }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]j[!c.devm_drm_panel_bridge_add_typedasbj drm_bridgeuh1hhj%hKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_connectoruh1hhj%hKhjubh! with an explicit connector type.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj-hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j6j$ j6j% j& j' uh1j hhhjhNhNubj) )}(hX3**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. ``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) **Description** This is just like devm_drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel. This function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h](h)}(h**Parameters**h]j3 )}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhj:ubjw )}(hhh](j| )}(h<``struct device *dev`` device to tie the bridge lifetime to h](j )}(h``struct device *dev``h]j )}(hj_h]hstruct device *dev}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjYubj )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]uh1j{ hjthMhjVubj| )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjVubj| )}(hA``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) h](j )}(h``u32 connector_type``h]j )}(hjh]hu32 connector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h)The connector type (DRM_MODE_CONNECTOR_*)h]h)The connector type (DRM_MODE_CONNECTOR_*)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjVubeh}(h]h ]h"]h$]h&]uh1jv hj:ubh)}(h**Description**h]j3 )}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhj:ubh)}(hThis is just like devm_drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel.h](hPThis is just like devm_drm_panel_bridge_add(), but forces the connector type to }(hj"hhhNhNubj3 )}(h**connector_type**h]hconnector_type}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubh' instead of infering it from the panel.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhj:ubh)}(hThis function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h]hThis function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don’t report a connector type.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drmm_panel_bridge_add (C function)c.drmm_panel_bridge_addhNtauh1j hjhhhNhNubj )}(hhh](j )}(h[struct drm_bridge * drmm_panel_bridge_add (struct drm_device *drm, struct drm_panel *panel)h]j )}(hYstruct drm_bridge *drmm_panel_bridge_add(struct drm_device *drm, struct drm_panel *panel)h](j )}(hj h]hstruct}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrmm_panel_bridge_addsbc.drmm_panel_bridge_addasbuh1hhjnhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjnhhhjhMubj )}(hdrmm_panel_bridge_addh]j )}(hjh]hdrmm_panel_bridge_add}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjhMubj)}(h1(struct drm_device *drm, struct drm_panel *panel)h](j)}(hstruct drm_device *drmh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drmm_panel_bridge_addasbuh1hhjubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdrmh]hdrm}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]jc.drmm_panel_bridge_addasbuh1hhjXubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjXubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjhMubah}(h]jeah ](j j eh"]h$]h&]j j )j huh1j hjhMhjghhubj )}(hhh]h)}(hCreates a DRM-managed :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](hCreates a DRM-managed }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drmm_panel_bridge_addasbj drm_bridgeuh1hhj%hKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_connectoruh1hhj%hKhjubh0 that just calls the appropriate functions from }(hjhhhNhNubh)}(h:c:type:`drm_panel`h]j )}(hj2h]h drm_panel}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj jj drm_paneluh1hhj%hKhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjghhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jcj$ jcj% j& j' uh1j hhhjhNhNubj) )}(hX@**Parameters** ``struct drm_device *drm`` DRM device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** This is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is cleaned up.h](h)}(h**Parameters**h]j3 )}(hjmh]h Parameters}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjkubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjgubjw )}(hhh](j| )}(hD``struct drm_device *drm`` DRM device to tie the bridge lifetime to h](j )}(h``struct drm_device *drm``h]j )}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h(DRM device to tie the bridge lifetime toh]h(DRM device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjgubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjgubh)}(hThis is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is cleaned up.h](hsThis is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when }(hjhhhNhNubj3 )}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh is cleaned up.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjgubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_panel_bridge_connector (C function)c.drm_panel_bridge_connectorhNtauh1j hjhhhNhNubj )}(hhh](j )}(hMstruct drm_connector * drm_panel_bridge_connector (struct drm_bridge *bridge)h]j )}(hKstruct drm_connector *drm_panel_bridge_connector(struct drm_bridge *bridge)h](j )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhjdhMubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjxmodnameN classnameNj j )}j ]j%)}jdrm_panel_bridge_connectorsbc.drm_panel_bridge_connectorasbuh1hhjShhhjdhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhjdhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjShhhjdhMubj )}(hdrm_panel_bridge_connectorh]j )}(hjh]hdrm_panel_bridge_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjShhhjdhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_panel_bridge_connectorasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hbridgeh]hbridge}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjShhhjdhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjOhhhjdhMubah}(h]jJah ](j j eh"]h$]h&]j j )j huh1j hjdhMhjLhhubj )}(hhh]h)}(h)return the connector for the panel bridgeh]h)return the connector for the panel bridge}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjOhhubah}(h]h ]h"]h$]h&]uh1j hjLhhhjdhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jjj$ jjj% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``struct drm_bridge *bridge`` The drm_bridge. **Description** drm_panel_bridge creates the connector. This function gives external access to the connector. **Return** Pointer to drm_connectorh](h)}(h**Parameters**h]j3 )}(hjth]h Parameters}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjnubjw )}(hhh]j| )}(h.``struct drm_bridge *bridge`` The drm_bridge. h](j )}(h``struct drm_bridge *bridge``h]j )}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(hThe drm_bridge.h]hThe drm_bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjnubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjnubh)}(h]drm_panel_bridge creates the connector. This function gives external access to the connector.h]h]drm_panel_bridge creates the connector. This function gives external access to the connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjnubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjnubh)}(hPointer to drm_connectorh]hPointer to drm_connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjnubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #devm_drm_of_get_bridge (C function)c.devm_drm_of_get_bridgehNtauh1j hjhhhNhNubj )}(hhh](j )}(hostruct drm_bridge * devm_drm_of_get_bridge (struct device *dev, struct device_node *np, u32 port, u32 endpoint)h]j )}(hmstruct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *np, u32 port, u32 endpoint)h](j )}(hj h]hstruct}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6hhhjGhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]j%)}jdevm_drm_of_get_bridgesbc.devm_drm_of_get_bridgeasbuh1hhj6hhhjGhMubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6hhhjGhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj6hhhjGhMubj )}(hdevm_drm_of_get_bridgeh]j )}(hjwh]hdevm_drm_of_get_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6hhhjGhMubj)}(hD(struct device *dev, struct device_node *np, u32 port, u32 endpoint)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]juc.devm_drm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct device_node *nph](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h device_nodeh]h device_node}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]juc.devm_drm_of_get_bridgeasbuh1hhj ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjnhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hnph]hnp}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu32 porth](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]juc.devm_drm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u32 endpointh](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]juc.devm_drm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendpointh]hendpoint}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj6hhhjGhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2hhhjGhMubah}(h]j-ah ](j j eh"]h$]h&]j j )j huh1j hjGhMhj/hhubj )}(hhh]h)}(hReturn next bridge in the chainh]hReturn next bridge in the chain}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhj2hhubah}(h]h ]h"]h$]h&]uh1j hj/hhhjGhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jMj$ jMj% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct device_node *np`` device tree node containing encoder output ports ``u32 port`` port in the device tree node ``u32 endpoint`` endpoint in the device tree node **Description** Given a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected. Returns a pointer to the bridge if successful, or an error pointer otherwise.h](h)}(h**Parameters**h]j3 )}(hjWh]h Parameters}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjQubjw )}(hhh](j| )}(h<``struct device *dev`` device to tie the bridge lifetime to h](j )}(h``struct device *dev``h]j )}(hjvh]hstruct device *dev}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjpubj )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjmubj| )}(hL``struct device_node *np`` device tree node containing encoder output ports h](j )}(h``struct device_node *np``h]j )}(hjh]hstruct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h0device tree node containing encoder output portsh]h0device tree node containing encoder output ports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjmubj| )}(h*``u32 port`` port in the device tree node h](j )}(h ``u32 port``h]j )}(hjh]hu32 port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(hport in the device tree nodeh]hport in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjmubj| )}(h2``u32 endpoint`` endpoint in the device tree node h](j )}(h``u32 endpoint``h]j )}(hj!h]h u32 endpoint}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h endpoint in the device tree nodeh]h endpoint in the device tree node}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMhjmubeh}(h]h ]h"]h$]h&]uh1jv hjQubh)}(h**Description**h]j3 )}(hj\h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjQubh)}(hGiven a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.h]hGiven a DT node’s port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjQubh)}(hMReturns a pointer to the bridge if successful, or an error pointer otherwise.h]hMReturns a pointer to the bridge if successful, or an error pointer otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjQubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drmm_of_get_bridge (C function)c.drmm_of_get_bridgehNtauh1j hjhhhNhNubj )}(hhh](j )}(hostruct drm_bridge * drmm_of_get_bridge (struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h]j )}(hmstruct drm_bridge *drmm_of_get_bridge(struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrmm_of_get_bridgesbc.drmm_of_get_bridgeasbuh1hhjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhMubj )}(hdrmm_of_get_bridgeh]j )}(hjh]hdrmm_of_get_bridge}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hH(struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h](j)}(hstruct drm_device *drmh](j )}(hj h]hstruct}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJmodnameN classnameNj j )}j ]jc.drmm_of_get_bridgeasbuh1hhj&ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj9)}(hjOh]h*}(hjthhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj&ubj )}(hdrmh]hdrm}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(hstruct device_node *nph](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drmm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hnph]hnp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(hu32 porth](h)}(hhh]j )}(hu32h]hu32}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drmm_of_get_bridgeasbuh1hhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hporth]hport}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubj)}(h u32 endpointh](h)}(hhh]j )}(hu32h]hu32}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]jc.drmm_of_get_bridgeasbuh1hhjNubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubj )}(hendpointh]hendpoint}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hReturn next bridge in the chainh]hReturn next bridge in the chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hX+**Parameters** ``struct drm_device *drm`` device to tie the bridge lifetime to ``struct device_node *np`` device tree node containing encoder output ports ``u32 port`` port in the device tree node ``u32 endpoint`` endpoint in the device tree node **Description** Given a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected. Returns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubjw )}(hhh](j| )}(h@``struct drm_device *drm`` device to tie the bridge lifetime to h](j )}(h``struct drm_device *drm``h]j )}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hL``struct device_node *np`` device tree node containing encoder output ports h](j )}(h``struct device_node *np``h]j )}(hj%h]hstruct device_node *np}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h0device tree node containing encoder output portsh]h0device tree node containing encoder output ports}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj;ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj:hMhjubj| )}(h*``u32 port`` port in the device tree node h](j )}(h ``u32 port``h]j )}(hj^h]hu32 port}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjXubj )}(hhh]h)}(hport in the device tree nodeh]hport in the device tree node}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjtubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjshMhjubj| )}(h2``u32 endpoint`` endpoint in the device tree node h](j )}(h``u32 endpoint``h]j )}(hjh]h u32 endpoint}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubj )}(hhh]h)}(h endpoint in the device tree nodeh]h endpoint in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hGiven a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.h]hGiven a DT node’s port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hZReturns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.h]hZReturns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:212: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubjB)}(h.. _drm_panel_helper:h]h}(h]h ]h"]h$]h&]hʌdrm-panel-helperuh1jBhKhjhhhhubeh}(h]jah ]h"]panel-bridge helper referenceah$]h&]uh1hhjc?hhhhhKubeh}(h](j_j[?eh ]h"](bridges drm_bridgeseh$]h&]uh1hhhhhhhhKj^X}j$jQ?sj`X}j[?jQ?subh)}(hhh](h)}(hPanel Helper Referenceh]hPanel Helper Reference}(hj,hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj)hhhhhKubh)}(hThe DRM panel helpers allow drivers to register panel objects with a central registry and provide functions to retrieve those panels in display drivers.h]hThe DRM panel helpers allow drivers to register panel objects with a central registry and provide functions to retrieve those panels in display drivers.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK'hj)hhubh)}(hFor easy integration into drivers using the :c:type:`drm_bridge` infrastructure please take look at drm_panel_bridge_add() and devm_drm_panel_bridge_add().h](h,For easy integration into drivers using the }(hjIhhhNhNubh)}(h:c:type:`drm_bridge`h]j )}(hjSh]h drm_bridge}(hjUhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridgeuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:220: ./drivers/gpu/drm/drm_panel.chK+hjIubh[ infrastructure please take look at drm_panel_bridge_add() and devm_drm_panel_bridge_add().}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjphK+hj)hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_funcs (C struct)c.drm_panel_funcshNtauh1j hj)hhhNhNubj )}(hhh](j )}(hdrm_panel_funcsh]j )}(hstruct drm_panel_funcsh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_panel_funcsh]j )}(hjh]hdrm_panel_funcs}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(h#perform operations on a given panelh]h#perform operations on a given panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK,hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j structeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj)hNhNubj) )}(hXl**Definition**:: struct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); }; **Members** ``prepare`` Turn on panel and perform set up. This function is optional. ``enable`` Enable panel (turn on back light, etc.). This function is optional. ``disable`` Disable panel (turn off back light, etc.). This function is optional. ``unprepare`` Turn off panel. This function is optional. ``get_modes`` Add modes to the connector that the panel is attached to and returns the number of modes added. This function is mandatory. ``get_orientation`` Return the panel orientation set by device tree or EDID. This function is optional. ``get_timings`` Copy display timings into the provided array and return the number of display timings available. This function is optional. ``debugfs_init`` Allows panels to create panels-specific debugfs files.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK0hjubjN )}(hXstruct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); };h]hXstruct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); };}hjsbah}(h]h ]h"]h$]h&]j j uh1jM h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK2hjubh)}(h **Members**h]j3 )}(hj$h]hMembers}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK=hjubjw )}(hhh](j| )}(hJ``prepare`` Turn on panel and perform set up. This function is optional. h](j )}(h ``prepare``h]j )}(hjCh]hprepare}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKNhj=ubj )}(hhh](h)}(h!Turn on panel and perform set up.h]h!Turn on panel and perform set up.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKLhjYubh)}(hThis function is optional.h]hThis function is optional.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhKNhjYubeh}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hjXhKNhj:ubj| )}(hP``enable`` Enable panel (turn on back light, etc.). This function is optional. h](j )}(h ``enable``h]j )}(hjh]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKWhjubj )}(hhh](h)}(h(Enable panel (turn on back light, etc.).h]h(Enable panel (turn on back light, etc.).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKUhjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKWhjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKWhj:ubj| )}(hS``disable`` Disable panel (turn off back light, etc.). This function is optional. h](j )}(h ``disable``h]j )}(hjh]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK`hjubj )}(hhh](h)}(h*Disable panel (turn off back light, etc.).h]h*Disable panel (turn off back light, etc.).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK^hjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK`hjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhK`hj:ubj| )}(h:``unprepare`` Turn off panel. This function is optional. h](j )}(h ``unprepare``h]j )}(hjh]h unprepare}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKihjubj )}(hhh](h)}(hTurn off panel.h]hTurn off panel.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKghj1ubh)}(hThis function is optional.h]hThis function is optional.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKihj1ubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj0hKihj:ubj| )}(h``get_modes`` Add modes to the connector that the panel is attached to and returns the number of modes added. This function is mandatory. h](j )}(h ``get_modes``h]j )}(hjch]h get_modes}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKshj]ubj )}(hhh](h)}(h_Add modes to the connector that the panel is attached to and returns the number of modes added.h]h_Add modes to the connector that the panel is attached to and returns the number of modes added.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKphjyubh)}(hThis function is mandatory.h]hThis function is mandatory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhKshjyubeh}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhKshj:ubj| )}(hi``get_orientation`` Return the panel orientation set by device tree or EDID. This function is optional. h](j )}(h``get_orientation``h]j )}(hjh]hget_orientation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK}hjubj )}(hhh](h)}(h8Return the panel orientation set by device tree or EDID.h]h8Return the panel orientation set by device tree or EDID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK{hjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK}hjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhK}hj:ubj| )}(h``get_timings`` Copy display timings into the provided array and return the number of display timings available. This function is optional. h](j )}(h``get_timings``h]j )}(hjh]h get_timings}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjubj )}(hhh](h)}(h`Copy display timings into the provided array and return the number of display timings available.h]h`Copy display timings into the provided array and return the number of display timings available.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhj ubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhj ubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhj:ubj| )}(hG``debugfs_init`` Allows panels to create panels-specific debugfs files.h](j )}(h``debugfs_init``h]j )}(hj;h]h debugfs_init}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhj5ubj )}(hhh]h)}(h6Allows panels to create panels-specific debugfs files.h]h6Allows panels to create panels-specific debugfs files.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjQubah}(h]h ]h"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]uh1j{ hjPhKhj:ubeh}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubh)}(h**Description**h]j3 )}(hj~h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhj)hhubh)}(hX9The .prepare() function is typically called before the display controller starts to transmit video data. Panel drivers can use this to turn the panel on and wait for it to become ready. If additional configuration is required (via a control bus such as I2C, SPI or DSI for example) this is a good time to do that.h]hX9The .prepare() function is typically called before the display controller starts to transmit video data. Panel drivers can use this to turn the panel on and wait for it to become ready. If additional configuration is required (via a control bus such as I2C, SPI or DSI for example) this is a good time to do that.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK-hj)hhubh)}(hXAfter the display controller has started transmitting video data, it's safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Some panels require a certain amount of time or frames before the image is displayed. This function is responsible for taking this into account before enabling the backlight to avoid visual glitches.h]hXAfter the display controller has started transmitting video data, it’s safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Some panels require a certain amount of time or frames before the image is displayed. This function is responsible for taking this into account before enabling the backlight to avoid visual glitches.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK3hj)hhubh)}(hXBefore stopping video transmission from the display controller it can be necessary to turn off the panel to avoid visual glitches. This is done in the .disable() function. Analogously to .enable() this typically involves turning off the backlight and waiting for some time to make sure no image is visible on the panel. It is then safe for the display controller to cease transmission of video data.h]hXBefore stopping video transmission from the display controller it can be necessary to turn off the panel to avoid visual glitches. This is done in the .disable() function. Analogously to .enable() this typically involves turning off the backlight and waiting for some time to make sure no image is visible on the panel. It is then safe for the display controller to cease transmission of video data.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhK:hj)hhubh)}(hTo save power when no video data is transmitted, a driver can power down the panel. This is the job of the .unprepare() function.h]hTo save power when no video data is transmitted, a driver can power down the panel. This is the job of the .unprepare() function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKAhj)hhubh)}(hBacklight can be handled automatically if configured using drm_panel_of_backlight() or drm_panel_dp_aux_backlight(). Then the driver does not need to implement the functionality to enable/disable backlight.h]hBacklight can be handled automatically if configured using drm_panel_of_backlight() or drm_panel_dp_aux_backlight(). Then the driver does not need to implement the functionality to enable/disable backlight.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKDhj)hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel (C struct) c.drm_panelhNtauh1j hj)hhhNhNubj )}(hhh](j )}(h drm_panelh]j )}(hstruct drm_panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKKubj )}(h drm_panelh]j )}(hjh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKKhjhhubj )}(hhh]h)}(hDRM panel objecth]hDRM panel object}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhj7hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKKubeh}(h]h ](j structeh"]h$]h&]j" j j# jRj$ jRj% j& j' uh1j hhhj)hNhNubj) )}(hXq**Definition**:: struct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; }; **Members** ``dev`` Parent device of the panel. ``backlight`` Backlight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it. ``funcs`` Operations that can be performed on the panel. ``connector_type`` Type of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type. ``list`` Panel entry in registry. ``followers`` A list of struct drm_panel_follower dependent on this panel. ``follower_lock`` Lock for followers list. ``prepare_prev_first`` The previous controller should be prepared first, before the prepare for the panel is called. This is largely required for DSI panels where the DSI host controller should be initialised to LP-11 before the panel is powered up. ``prepared`` If true then the panel has been prepared. ``enabled`` If true then the panel has been enabled. ``container`` Pointer to the private driver struct embedding this **struct** drm_panel. ``refcount`` reference count of users referencing this panel.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubh:}(hjZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjVubjN )}(hXbstruct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; };h]hXbstruct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; };}hjwsbah}(h]h ]h"]h$]h&]j j uh1jM h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjVubh)}(h **Members**h]j3 )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjVubjw )}(hhh](j| )}(h$``dev`` Parent device of the panel. h](j )}(h``dev``h]j )}(hjh]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjubj )}(hhh]h)}(hParent device of the panel.h]hParent device of the panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h``backlight`` Backlight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it. h](j )}(h ``backlight``h]j )}(hjh]h backlight}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjubj )}(hhh]h)}(hBacklight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it.h]hBacklight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h9``funcs`` Operations that can be performed on the panel. h](j )}(h ``funcs``h]j )}(hjh]hfuncs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjubj )}(hhh]h)}(h.Operations that can be performed on the panel.h]h.Operations that can be performed on the panel.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hKhj0ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj/hKhjubj| )}(h``connector_type`` Type of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type. h](j )}(h``connector_type``h]j )}(hjSh]hconnector_type}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjMubj )}(hhh]h)}(hType of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type.h]hType of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjiubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjhhKhjubj| )}(h"``list`` Panel entry in registry. h](j )}(h``list``h]j )}(hjh]hlist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjubj )}(hhh]h)}(hPanel entry in registry.h]hPanel entry in registry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(hK``followers`` A list of struct drm_panel_follower dependent on this panel. h](j )}(h ``followers``h]j )}(hjh]h followers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:223: ./include/drm/drm_panel.hhKhjubj )}(hhh]h)}(hh]h Description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKOhjubh)}(hAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc().h]hAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc().}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKNhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_remove (C function)c.drm_panel_removehNtauh1j hj)hhhNhNubj )}(hhh](j )}(h/void drm_panel_remove (struct drm_panel *panel)h]j )}(h.void drm_panel_remove(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chK]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhK]ubj )}(hdrm_panel_removeh]j )}(hdrm_panel_removeh]hdrm_panel_remove}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhK]ubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_panel_removeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhK]ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{hhhjhK]ubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j hjhK]hjxhhubj )}(hhh]h)}(h'remove a panel from the global registryh]h'remove a panel from the global registry}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chK]hj@hhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjhK]ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j[j$ j[j% j& j' uh1j hhhj)hNhNubj) )}(hs**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Removes a panel from the global registry.h](h)}(h**Parameters**h]j3 )}(hjeh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKahj_ubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chK^hj~ubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK^hjubah}(h]h ]h"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]uh1j{ hjhK^hj{ubah}(h]h ]h"]h$]h&]uh1jv hj_ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chK`hj_ubh)}(h)Removes a panel from the global registry.h]h)Removes a panel from the global registry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chK_hj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j devm_drm_panel_add (C function)c.devm_drm_panel_addhNtauh1j hj)hhhNhNubj )}(hhh](j )}(hDint devm_drm_panel_add (struct device *dev, struct drm_panel *panel)h]j )}(hCint devm_drm_panel_add(struct device *dev, struct drm_panel *panel)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKqubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKqubj )}(hdevm_drm_panel_addh]j )}(hdevm_drm_panel_addh]hdevm_drm_panel_add}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKqubj)}(h-(struct device *dev, struct drm_panel *panel)h](j)}(hstruct device *devh](j )}(hj h]hstruct}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubh)}(hhh]j )}(hdeviceh]hdevice}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j%)}jj'sbc.devm_drm_panel_addasbuh1hhj=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj=ubj )}(hdevh]hdev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubj)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j{c.devm_drm_panel_addasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKqubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKqhjhhubj )}(hhh]h)}(h/add a panel to the global registry using devresh]h/add a panel to the global registry using devres}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKqhj1hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKqubeh}(h]h ](j functioneh"]h$]h&]j" j j# jLj$ jLj% j& j' uh1j hhhj)hNhNubj) )}(hX**Parameters** ``struct device *dev`` device to which the panel is attached ``struct drm_panel *panel`` panel to add **Description** Add a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc(). Unlike drm_panel_add() with this function there is no need to call drm_panel_remove(), it will be called automatically.h](h)}(h**Parameters**h]j3 )}(hjVh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjTubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKuhjPubjw )}(hhh](j| )}(h=``struct device *dev`` device to which the panel is attached h](j )}(h``struct device *dev``h]j )}(hjuh]hstruct device *dev}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKrhjoubj )}(hhh]h)}(h%device to which the panel is attachedh]h%device to which the panel is attached}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhKrhjlubj| )}(h)``struct drm_panel *panel`` panel to add h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKshjubj )}(hhh]h)}(h panel to addh]h panel to add}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKshjlubeh}(h]h ]h"]h$]h&]uh1jv hjPubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKuhjPubh)}(hXAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc(). Unlike drm_panel_add() with this function there is no need to call drm_panel_remove(), it will be called automatically.h]hXAdd a panel to the global registry so that it can be looked up by display drivers. The panel to be added must have been allocated by devm_drm_panel_alloc(). Unlike drm_panel_add() with this function there is no need to call drm_panel_remove(), it will be called automatically.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKthjPubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_prepare (C function)c.drm_panel_preparehNtauh1j hj)hhhNhNubj )}(hhh](j )}(h0void drm_panel_prepare (struct drm_panel *panel)h]j )}(h/void drm_panel_prepare(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*hhhj<hKubj )}(hdrm_panel_prepareh]j )}(hdrm_panel_prepareh]hdrm_panel_prepare}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubah}(h]h ](j j eh"]h$]h&]j j uh1j hj*hhhj<hKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjQsbc.drm_panel_prepareasbuh1hhjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjgubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjcubah}(h]h ]h"]h$]h&]j j uh1jhj*hhhj<hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj&hhhj<hKubah}(h]j!ah ](j j eh"]h$]h&]j j )j huh1j hj<hKhj#hhubj )}(hhh]h)}(hpower on a panelh]hpower on a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hj#hhhj<hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj)hNhNubj) )}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will enable power and deassert any reset signals to the panel. After this has completed it is possible to communicate with any integrated circuitry via a command bus. This function cannot fail (as it is called from the pre_enable call chain). There will always be a call to drm_panel_disable() afterwards.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj ubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hj/h]hstruct drm_panel *panel}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj)ubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhKhjEubah}(h]h ]h"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]uh1j{ hjDhKhj&ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjjh]h Description}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjhubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj ubh)}(hXGCalling this function will enable power and deassert any reset signals to the panel. After this has completed it is possible to communicate with any integrated circuitry via a command bus. This function cannot fail (as it is called from the pre_enable call chain). There will always be a call to drm_panel_disable() afterwards.h]hXGCalling this function will enable power and deassert any reset signals to the panel. After this has completed it is possible to communicate with any integrated circuitry via a command bus. This function cannot fail (as it is called from the pre_enable call chain). There will always be a call to drm_panel_disable() afterwards.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_unprepare (C function)c.drm_panel_unpreparehNtauh1j hj)hhhNhNubj )}(hhh](j )}(h2void drm_panel_unprepare (struct drm_panel *panel)h]j )}(h1void drm_panel_unprepare(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_panel_unprepareh]j )}(hdrm_panel_unprepareh]hdrm_panel_unprepare}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjsbc.drm_panel_unprepareasbuh1hhjubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(hpower off a panelh]hpower off a panel}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhjlhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj)hNhNubj) )}(hXH**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will completely power off a panel (assert the panel's reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhjubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhjubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhjubh)}(hCalling this function will completely power off a panel (assert the panel's reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().h]hXCalling this function will completely power off a panel (assert the panel’s reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_enable (C function)c.drm_panel_enablehNtauh1j hj)hhhNhNubj )}(hhh](j )}(h/void drm_panel_enable (struct drm_panel *panel)h]j )}(h.void drm_panel_enable(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj>hKubj )}(hdrm_panel_enableh]j )}(hdrm_panel_enableh]hdrm_panel_enable}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj>hKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjSsbc.drm_panel_enableasbuh1hhjiubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjiubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjeubah}(h]h ]h"]h$]h&]j j uh1jhj,hhhj>hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(hhhj>hKubah}(h]j#ah ](j j eh"]h$]h&]j j )j huh1j hj>hKhj%hhubj )}(hhh]h)}(henable a panelh]henable a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj>hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj)hNhNubj) )}(hXy**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj ubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hj1h]hstruct drm_panel *panel}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj+ubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhKhjGubah}(h]h ]h"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]uh1j{ hjFhKhj(ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjlh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj ubh)}(hX/Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.h]hX/Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_disable (C function)c.drm_panel_disablehNtauh1j hj)hhhNhNubj )}(hhh](j )}(h0void drm_panel_disable (struct drm_panel *panel)h]j )}(h/void drm_panel_disable(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_panel_disableh]j )}(hdrm_panel_disableh]hdrm_panel_disable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_panel_disableasbuh1hhjubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hdisable a panelh]hdisable a panel}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjnhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj)hNhNubj) )}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This will typically turn off the panel's backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM"hjubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM!hjubh)}(hThis will typically turn off the panel's backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.h]hThis will typically turn off the panel’s backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_get_modes (C function)c.drm_panel_get_modeshNtauh1j hj)hhhNhNubj )}(hhh](j )}(hRint drm_panel_get_modes (struct drm_panel *panel, struct drm_connector *connector)h]j )}(hQint drm_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector)h](j)}(hinth]hint}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMYubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhj@hMYubj )}(hdrm_panel_get_modesh]j )}(hdrm_panel_get_modesh]hdrm_panel_get_modes}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhj@hMYubj)}(h:(struct drm_panel *panel, struct drm_connector *connector)h](j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjUsbc.drm_panel_get_modesasbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjkubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_panel_get_modesasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj+hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h connectorh]h connector}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubeh}(h]h ]h"]h$]h&]j j uh1jhj.hhhj@hMYubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj*hhhj@hMYubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j hj@hMYhj'hhubj )}(hhh]h)}(h,probe the available display modes of a panelh]h,probe the available display modes of a panel}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMYhj_hhubah}(h]h ]h"]h$]h&]uh1j hj'hhhj@hMYubeh}(h]h ](j functioneh"]h$]h&]j" j j# jzj$ jzj% j& j' uh1j hhhj)hNhNubj) )}(hXH**Parameters** ``struct drm_panel *panel`` DRM panel ``struct drm_connector *connector`` DRM connector **Description** The modes probed from the panel are automatically added to the connector that the panel is attached to. **Return** The number of modes available from the panel on success, or 0 on failure (no modes).h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM]hj~ubjw )}(hhh](j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMZhjubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMZhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMZhjubj| )}(h2``struct drm_connector *connector`` DRM connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM[hjubj )}(hhh]h)}(h DRM connectorh]h DRM connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM[hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM[hjubeh}(h]h ]h"]h$]h&]uh1jv hj~ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM]hj~ubh)}(hgThe modes probed from the panel are automatically added to the connector that the panel is attached to.h]hgThe modes probed from the panel are automatically added to the connector that the panel is attached to.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM\hj~ubh)}(h **Return**h]j3 )}(hj>h]hReturn}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM_hj~ubh)}(hTThe number of modes available from the panel on success, or 0 on failure (no modes).h]hTThe number of modes available from the panel on success, or 0 on failure (no modes).}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM`hj~ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_get (C function)c.drm_panel_gethNtauh1j hj)hhhNhNubj )}(hhh](j )}(h:struct drm_panel * drm_panel_get (struct drm_panel *panel)h]j )}(h8struct drm_panel *drm_panel_get(struct drm_panel *panel)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM}ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j drm_panel_getsbc.drm_panel_getasbuh1hhjhhhjhM}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM}ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhM}ubj )}(h drm_panel_geth]j )}(hjh]h drm_panel_get}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM}ubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_panel_getasbuh1hhjubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjGhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM}ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj{hhhjhM}ubah}(h]jvah ](j j eh"]h$]h&]j j )j huh1j hjhM}hjxhhubj )}(hhh]h)}(hAcquire a panel referenceh]hAcquire a panel reference}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM}hj{hhubah}(h]h ]h"]h$]h&]uh1j hjxhhhjhM}ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj)hNhNubj) )}(h**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This function increments the panel's refcount. **Return** Pointer to **panel**h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM~hjubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM~hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM~hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubh)}(h.This function increments the panel's refcount.h]h0This function increments the panel’s refcount.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubh)}(h **Return**h]j3 )}(hj!h]hReturn}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hPointer to **panel**h](h Pointer to }(hj7hhhNhNubj3 )}(h **panel**h]hpanel}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_put (C function)c.drm_panel_puthNtauh1j hj)hhhNhNubj )}(hhh](j )}(h,void drm_panel_put (struct drm_panel *panel)h]j )}(h+void drm_panel_put(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjphhhjhMubj )}(h drm_panel_puth]j )}(h drm_panel_puth]h drm_panel_put}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjphhhjhMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_panel_putasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjphhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjlhhhjhMubah}(h]jgah ](j j eh"]h$]h&]j j )j huh1j hjhMhjihhubj )}(hhh]h)}(hRelease a panel referenceh]hRelease a panel reference}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj1hhubah}(h]h ]h"]h$]h&]uh1j hjihhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jLj$ jLj% j& j' uh1j hhhj)hNhNubj) )}(h**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This function decrements the panel's reference count and frees the object if the reference count drops to zero.h](h)}(h**Parameters**h]j3 )}(hjVh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjTubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjPubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hjuh]hstruct drm_panel *panel}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjoubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjlubah}(h]h ]h"]h$]h&]uh1jv hjPubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjPubh)}(hoThis function decrements the panel's reference count and frees the object if the reference count drops to zero.h]hqThis function decrements the panel’s reference count and frees the object if the reference count drops to zero.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjPubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j of_drm_find_panel (C function)c.of_drm_find_panelhNtauh1j hj)hhhNhNubj )}(hhh](j )}(hCstruct drm_panel * of_drm_find_panel (const struct device_node *np)h]j )}(hAstruct drm_panel *of_drm_find_panel(const struct device_node *np)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jof_drm_find_panelsbc.of_drm_find_panelasbuh1hhjhhhjhMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj9)}(hjOh]h*}(hjChhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhMubj )}(hof_drm_find_panelh]j )}(hj2h]hof_drm_find_panel}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(const struct device_node *np)h]j)}(hconst struct device_node *nph](j )}(hjch]hconst}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0c.of_drm_find_panelasbuh1hhjkubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjkubj )}(hnph]hnp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjgubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h1look up and reference a panel by device tree nodeh]h1look up and reference a panel by device tree node}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j#j$ j#j% j& j' uh1j hhhj)hNhNubj) )}(hX**Parameters** ``const struct device_node *np`` device tree node of the panel **Description** Searches the set of registered panels for one that matches the given device tree node. If a matching panel is found, the panel's reference count is incremented before returning a pointer to it. The caller must call drm_panel_put() when it no longer needs the panel pointer. Possible error codes returned by this function: - EPROBE_DEFER: the panel device has not been probed yet, and the caller should retry later - ENODEV: the device is not available (status != "okay" or "ok") **Return** A reference-counted pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.h](h)}(h**Parameters**h]j3 )}(hj-h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj'ubjw )}(hhh]j| )}(h?``const struct device_node *np`` device tree node of the panel h](j )}(h ``const struct device_node *np``h]j )}(hjLh]hconst struct device_node *np}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjFubj )}(hhh]h)}(hdevice tree node of the panelh]hdevice tree node of the panel}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjbubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1j{ hjahMhjCubah}(h]h ]h"]h$]h&]uh1jv hj'ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj'ubh)}(hXSearches the set of registered panels for one that matches the given device tree node. If a matching panel is found, the panel's reference count is incremented before returning a pointer to it. The caller must call drm_panel_put() when it no longer needs the panel pointer.h]hXSearches the set of registered panels for one that matches the given device tree node. If a matching panel is found, the panel’s reference count is incremented before returning a pointer to it. The caller must call drm_panel_put() when it no longer needs the panel pointer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj'ubh)}(h/Possible error codes returned by this function:h]h/Possible error codes returned by this function:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj'ubh)}(hhh](h)}(hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry laterh]h)}(hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry laterh]hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry later}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h?ENODEV: the device is not available (status != "okay" or "ok") h]h)}(h>ENODEV: the device is not available (status != "okay" or "ok")h]hFENODEV: the device is not available (status != “okay” or “ok”)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNj<uh1hhjhMhj'ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj'ubh)}(hA reference-counted pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.h]hA reference-counted pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_is_panel_follower (C function)c.drm_is_panel_followerhNtauh1j hj)hhhNhNubj )}(hhh](j )}(h/bool drm_is_panel_follower (struct device *dev)h]j )}(h.bool drm_is_panel_follower(struct device *dev)h](j)}(hjIh]hbool}(hj= hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9 hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM%ubj )}(h h]h }(hjK hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9 hhhjJ hM%ubj )}(hdrm_is_panel_followerh]j )}(hdrm_is_panel_followerh]hdrm_is_panel_follower}(hj] hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj9 hhhjJ hM%ubj)}(h(struct device *dev)h]j)}(hstruct device *devh](j )}(hj h]hstruct}(hjy hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju ubh)}(hhh]j )}(hdeviceh]hdevice}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jj_ sbc.drm_is_panel_followerasbuh1hhju ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hju ubj )}(hdevh]hdev}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjq ubah}(h]h ]h"]h$]h&]j j uh1jhj9 hhhjJ hM%ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5 hhhjJ hM%ubah}(h]j0 ah ](j j eh"]h$]h&]j j )j huh1j hjJ hM%hj2 hhubj )}(hhh]h)}(h'Check if the device is a panel followerh]h'Check if the device is a panel follower}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM%hj hhubah}(h]h ]h"]h$]h&]uh1j hj2 hhhjJ hM%ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj)hNhNubj) )}(hXa**Parameters** ``struct device *dev`` The 'struct device' to check **Description** This checks to see if a device needs to be power sequenced together with a panel using the panel follower API. The "panel" property of the follower points to the panel to be followed. **Return** true if we should be power sequenced with a panel; false otherwise.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM)hj ubjw )}(hhh]j| )}(h4``struct device *dev`` The 'struct device' to check h](j )}(h``struct device *dev``h]j )}(hj= h]hstruct device *dev}(hj? hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj; ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM&hj7 ubj )}(hhh]h)}(hThe 'struct device' to checkh]h The ‘struct device’ to check}(hjV hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjR hM&hjS ubah}(h]h ]h"]h$]h&]uh1j hj7 ubeh}(h]h ]h"]h$]h&]uh1j{ hjR hM&hj4 ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjx h]h Description}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjv ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM(hj ubh)}(hnThis checks to see if a device needs to be power sequenced together with a panel using the panel follower API.h]hnThis checks to see if a device needs to be power sequenced together with a panel using the panel follower API.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM'hj ubh)}(hHThe "panel" property of the follower points to the panel to be followed.h]hLThe “panel” property of the follower points to the panel to be followed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM*hj ubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM,hj ubh)}(hCtrue if we should be power sequenced with a panel; false otherwise.h]hCtrue if we should be power sequenced with a panel; false otherwise.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM-hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_panel_add_follower (C function)c.drm_panel_add_followerhNtauh1j hj)hhhNhNubj )}(hhh](j )}(h]int drm_panel_add_follower (struct device *follower_dev, struct drm_panel_follower *follower)h]j )}(h\int drm_panel_add_follower(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM;ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hM;ubj )}(hdrm_panel_add_followerh]j )}(hdrm_panel_add_followerh]hdrm_panel_add_follower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hM;ubj)}(hB(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hstruct device *follower_devh](j )}(hj h]hstruct}(hj0 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj, ubj )}(h h]h }(hj= hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj, ubh)}(hhh]j )}(hdeviceh]hdevice}(hjN hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjP modnameN classnameNj j )}j ]j%)}jj sbc.drm_panel_add_followerasbuh1hhj, ubj )}(h h]h }(hjn hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj, ubj9)}(hjOh]h*}(hj| hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj, ubj )}(h follower_devh]h follower_dev}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj, ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj( ubj)}(h#struct drm_panel_follower *followerh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_panel_followerh]hdrm_panel_follower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jj c.drm_panel_add_followerasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hfollowerh]hfollower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj( ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hM;ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hM;ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj hM;hj hhubj )}(hhh]h)}(h)Register something to follow panel state.h]h)Register something to follow panel state.}(hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM;hj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hM;ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j; j$ j; j% j& j' uh1j hhhj)hNhNubj) )}(hX**Parameters** ``struct device *follower_dev`` The 'struct device' for the follower. ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** A panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It's primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel. If a follower is added to a panel that's already been prepared/enabled, the follower's prepared/enabled callback is called right away. The "panel" property of the follower points to the panel to be followed. **Return** 0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.h](h)}(h**Parameters**h]j3 )}(hjE h]h Parameters}(hjG hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjC ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM?hj? ubjw )}(hhh](j| )}(hF``struct device *follower_dev`` The 'struct device' for the follower. h](j )}(h``struct device *follower_dev``h]j )}(hjd h]hstruct device *follower_dev}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjb ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM<hj^ ubj )}(hhh]h)}(h%The 'struct device' for the follower.h]h)The ‘struct device’ for the follower.}(hj} hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjy hM<hjz ubah}(h]h ]h"]h$]h&]uh1j hj^ ubeh}(h]h ]h"]h$]h&]uh1j{ hjy hM<hj[ ubj| )}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](j )}(h'``struct drm_panel_follower *follower``h]j )}(hj h]h#struct drm_panel_follower *follower}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM=hj ubj )}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM=hj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hM=hj[ ubeh}(h]h ]h"]h$]h&]uh1jv hj? ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM?hj? ubh)}(hXA panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It's primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel.h]hX!A panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It’s primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chM>hj? ubh)}(hIf a follower is added to a panel that's already been prepared/enabled, the follower's prepared/enabled callback is called right away.h]hIf a follower is added to a panel that’s already been prepared/enabled, the follower’s prepared/enabled callback is called right away.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMChj? ubh)}(hHThe "panel" property of the follower points to the panel to be followed.h]hLThe “panel” property of the follower points to the panel to be followed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMFhj? ubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMHhj? ubh)}(h0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.h]h0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMIhj? ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_panel_remove_follower (C function)c.drm_panel_remove_followerhNtauh1j hj)hhhNhNubj )}(hhh](j )}(hDvoid drm_panel_remove_follower (struct drm_panel_follower *follower)h]j )}(hCvoid drm_panel_remove_follower(struct drm_panel_follower *follower)h](j)}(hvoidh]hvoid}(hjb hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMqubj )}(h h]h }(hjq hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ hhhjp hMqubj )}(hdrm_panel_remove_followerh]j )}(hdrm_panel_remove_followerh]hdrm_panel_remove_follower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^ hhhjp hMqubj)}(h%(struct drm_panel_follower *follower)h]j)}(h#struct drm_panel_follower *followerh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_panel_followerh]hdrm_panel_follower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jj sbc.drm_panel_remove_followerasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hfollowerh]hfollower}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhj^ hhhjp hMqubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZ hhhjp hMqubah}(h]jU ah ](j j eh"]h$]h&]j j )j huh1j hjp hMqhjW hhubj )}(hhh]h)}(h!Reverse drm_panel_add_follower().h]h!Reverse drm_panel_add_follower().}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMqhjhhubah}(h]h ]h"]h$]h&]uh1j hjW hhhjp hMqubeh}(h]h ](j functioneh"]h$]h&]j" j j# j:j$ j:j% j& j' uh1j hhhj)hNhNubj) )}(hX@**Parameters** ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** Undo drm_panel_add_follower(). This includes calling the follower's unpreparing/disabling function if we're removed from a panel that's currently prepared/enabled. **Return** 0 or an error code.h](h)}(h**Parameters**h]j3 )}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjBubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMuhj>ubjw )}(hhh]j| )}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](j )}(h'``struct drm_panel_follower *follower``h]j )}(hjch]h#struct drm_panel_follower *follower}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMrhj]ubj )}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMrhjyubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhMrhjZubah}(h]h ]h"]h$]h&]uh1jv hj>ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMthj>ubh)}(hUndo drm_panel_add_follower(). This includes calling the follower's unpreparing/disabling function if we're removed from a panel that's currently prepared/enabled.h]hUndo drm_panel_add_follower(). This includes calling the follower’s unpreparing/disabling function if we’re removed from a panel that’s currently prepared/enabled.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMshj>ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMwhj>ubh)}(h0 or an error code.h]h0 or an error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMxhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (devm_drm_panel_add_follower (C function)c.devm_drm_panel_add_followerhNtauh1j hj)hhhNhNubj )}(hhh](j )}(hbint devm_drm_panel_add_follower (struct device *follower_dev, struct drm_panel_follower *follower)h]j )}(haint devm_drm_panel_add_follower(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdevm_drm_panel_add_followerh]j )}(hdevm_drm_panel_add_followerh]hdevm_drm_panel_add_follower}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hB(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hstruct device *follower_devh](j )}(hj h]hstruct}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubh)}(hhh]j )}(hdeviceh]hdevice}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]j%)}jj-sbc.devm_drm_panel_add_followerasbuh1hhjCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjCubj )}(h follower_devh]h follower_dev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubj)}(h#struct drm_panel_follower *followerh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_panel_followerh]hdrm_panel_follower}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.devm_drm_panel_add_followerasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hfollowerh]hfollower}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h(devm version of drm_panel_add_follower()h]h(devm version of drm_panel_add_follower()}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj7hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jRj$ jRj% j& j' uh1j hhhj)hNhNubj) )}(hX1**Parameters** ``struct device *follower_dev`` The 'struct device' for the follower. ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** Handles calling drm_panel_remove_follower() using devm on the follower_dev. **Return** 0 or an error code.h](h)}(h**Parameters**h]j3 )}(hj\h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjVubjw )}(hhh](j| )}(hF``struct device *follower_dev`` The 'struct device' for the follower. h](j )}(h``struct device *follower_dev``h]j )}(hj{h]hstruct device *follower_dev}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjuubj )}(hhh]h)}(h%The 'struct device' for the follower.h]h)The ‘struct device’ for the follower.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjrubj| )}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](j )}(h'``struct drm_panel_follower *follower``h]j )}(hjh]h#struct drm_panel_follower *follower}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubj )}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjrubeh}(h]h ]h"]h$]h&]uh1jv hjVubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjVubh)}(hKHandles calling drm_panel_remove_follower() using devm on the follower_dev.h]hKHandles calling drm_panel_remove_follower() using devm on the follower_dev.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjVubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjVubh)}(h0 or an error code.h]h0 or an error code.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjVubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_panel_of_backlight (C function)c.drm_panel_of_backlighthNtauh1j hj)hhhNhNubj )}(hhh](j )}(h4int drm_panel_of_backlight (struct drm_panel *panel)h]j )}(h3int drm_panel_of_backlight(struct drm_panel *panel)h](j)}(hinth]hint}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhhjihMubj )}(hdrm_panel_of_backlighth]j )}(hdrm_panel_of_backlighth]hdrm_panel_of_backlight}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ](j j eh"]h$]h&]j j uh1j hjWhhhjihMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj~sbc.drm_panel_of_backlightasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjWhhhjihMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjihMubah}(h]jNah ](j j eh"]h$]h&]j j )j huh1j hjihMhjPhhubj )}(hhh]h)}(h'use backlight device node for backlighth]h'use backlight device node for backlight}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjPhhhjihMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j3j$ j3j% j& j' uh1j hhhj)hNhNubj) )}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Use this function to enable backlight handling if your panel uses device tree and has a backlight phandle. When the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) ` When the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `. A typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj=h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj7ubjw )}(hhh]j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hj\h]hstruct drm_panel *panel}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjVubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMhjSubah}(h]h ]h"]h$]h&]uh1jv hj7ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj7ubh)}(hjUse this function to enable backlight handling if your panel uses device tree and has a backlight phandle.h]hjUse this function to enable backlight handling if your panel uses device tree and has a backlight phandle.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj7ubh)}(hWhen the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) `h](hOWhen the panel is enabled backlight will be enabled after a successful call to }(hjhhhNhNubh)}(h6:c:type:`drm_panel_funcs.enable\(\) `h]j )}(hjh]hdrm_panel_funcs.enable()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhj7ubh)}(hWhen the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `.h](hIWhen the panel is disabled backlight will be disabled before the call to }(hjhhhNhNubh)}(h7:c:type:`drm_panel_funcs.disable\(\) `h]j )}(hjh]hdrm_panel_funcs.disable()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj7ubh)}(hA typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.h]hA typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj7ubh)}(h **Return**h]j3 )}(hj-h]hReturn}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj7ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:226: ./drivers/gpu/drm/drm_panel.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_get_panel_orientation_quirk (C function)!c.drm_get_panel_orientation_quirkhNtauh1j hj)hhhNhNubj )}(hhh](j )}(h;int drm_get_panel_orientation_quirk (int width, int height)h]j )}(h:int drm_get_panel_orientation_quirk(int width, int height)h](j)}(hinth]hint}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjhMubj )}(hdrm_get_panel_orientation_quirkh]j )}(hdrm_get_panel_orientation_quirkh]hdrm_get_panel_orientation_quirk}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjhMubj)}(h(int width, int height)h](j)}(h int widthh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hwidthh]hwidth}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int heighth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hheighth]hheight}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjhMubah}(h]jeah ](j j eh"]h$]h&]j j )j huh1j hjhMhjghhubj )}(hhh]h)}(h"Check for panel orientation quirksh]h"Check for panel orientation quirks}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhj'hhubah}(h]h ]h"]h$]h&]uh1j hjghhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jBj$ jBj% j& j' uh1j hhhj)hNhNubj) )}(hX **Parameters** ``int width`` width in pixels of the panel ``int height`` height in pixels of the panel **Description** This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry. Note this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module. **Return** A DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.h](h)}(h**Parameters**h]j3 )}(hjLh]h Parameters}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM hjFubjw )}(hhh](j| )}(h+``int width`` width in pixels of the panel h](j )}(h ``int width``h]j )}(hjkh]h int width}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjeubj )}(hhh]h)}(hwidth in pixels of the panelh]hwidth in pixels of the panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjbubj| )}(h-``int height`` height in pixels of the panel h](j )}(h``int height``h]j )}(hjh]h int height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjubj )}(hhh]h)}(hheight in pixels of the panelh]hheight in pixels of the panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjbubeh}(h]h ]h"]h$]h&]uh1jv hjFubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM hjFubh)}(hX?This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry.h]hX?This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjFubh)}(hNote this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module.h]hNote this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM%hjFubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM)hjFubh)}(hA DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.h]hA DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:229: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM*hjFubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_get_panel_backlight_quirk (C function)c.drm_get_panel_backlight_quirkhNtauh1j hj)hhhNhNubj )}(hhh](j )}(hdconst struct drm_panel_backlight_quirk * drm_get_panel_backlight_quirk (const struct drm_edid *edid)h]j )}(hbconst struct drm_panel_backlight_quirk *drm_get_panel_backlight_quirk(const struct drm_edid *edid)h](j )}(hjch]hconst}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjghKubj )}(hj h]hstruct}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjghKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjghKubh)}(hhh]j )}(hdrm_panel_backlight_quirkh]hdrm_panel_backlight_quirk}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_get_panel_backlight_quirksbc.drm_get_panel_backlight_quirkasbuh1hhjVhhhjghKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjghKubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjVhhhjghKubj )}(hdrm_get_panel_backlight_quirkh]j )}(hjh]hdrm_get_panel_backlight_quirk}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjVhhhjghKubj)}(h(const struct drm_edid *edid)h]j)}(hconst struct drm_edid *edidh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]jc.drm_get_panel_backlight_quirkasbuh1hhjubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjThhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hedidh]hedid}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjVhhhjghKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjRhhhjghKubah}(h]jMah ](j j eh"]h$]h&]j j )j huh1j hjghKhjOhhubj )}(hhh]h)}(h Get backlight quirks for a panelh]h Get backlight quirks for a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hjOhhhjghKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj)hNhNubj) )}(hX**Parameters** ``const struct drm_edid *edid`` EDID of the panel to check **Description** This function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources. **Return** a drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubjw )}(hhh]j| )}(h;``const struct drm_edid *edid`` EDID of the panel to check h](j )}(h``const struct drm_edid *edid``h]j )}(hjh]hconst struct drm_edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubj )}(hhh]h)}(hEDID of the panel to checkh]hEDID of the panel to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubh)}(hThis function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources.h]hThis function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubh)}(h **Return**h]j3 )}(hj.h]hReturn}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj,ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubh)}(hTa drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.h]hTa drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:232: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj)hhhNhNubeh}(h](jjeh ]h"](panel helper referencedrm_panel_helpereh$]h&]uh1hhhhhhhhKj^X}j_j sj`X}jj subh)}(hhh](h)}(h#Panel Self Refresh Helper Referenceh]h#Panel Self Refresh Helper Reference}(hjghhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjdhhhhhKubh)}(hXThis helper library provides an easy way for drivers to leverage the atomic framework to implement panel self refresh (SR) support. Drivers are responsible for initializing and cleaning up the SR helpers on load/unload (see :c:type:`drm_self_refresh_helper_init`/:c:type:`drm_self_refresh_helper_cleanup`). The connector is responsible for setting :c:type:`drm_connector_state.self_refresh_aware ` to true at runtime if it is SR-aware (meaning it knows how to initiate self refresh on the panel).h](hThis helper library provides an easy way for drivers to leverage the atomic framework to implement panel self refresh (SR) support. Drivers are responsible for initializing and cleaning up the SR helpers on load/unload (see }(hjuhhhNhNubh)}(h&:c:type:`drm_self_refresh_helper_init`h]j )}(hjh]hdrm_self_refresh_helper_init}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_self_refresh_helper_inituh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:238: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjuubh/}(hjuhhhNhNubh)}(h):c:type:`drm_self_refresh_helper_cleanup`h]j )}(hjh]hdrm_self_refresh_helper_cleanup}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_self_refresh_helper_cleanupuh1hhjhKhjuubh,). The connector is responsible for setting }(hjuhhhNhNubh)}(hF:c:type:`drm_connector_state.self_refresh_aware `h]j )}(hjh]h&drm_connector_state.self_refresh_aware}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhjhKhjuubhc to true at runtime if it is SR-aware (meaning it knows how to initiate self refresh on the panel).}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjdhhubh)}(hXOnce a crtc has enabled SR using :c:type:`drm_self_refresh_helper_init`, the helpers will monitor activity and call back into the driver to enable/disable SR as appropriate. The best way to think about this is that it's a DPMS on/off request with :c:type:`drm_crtc_state.self_refresh_active ` set in crtc state that tells you to disable/enable SR on the panel instead of power-cycling it.h](h!Once a crtc has enabled SR using }(hjhhhNhNubh)}(h&:c:type:`drm_self_refresh_helper_init`h]j )}(hjh]hdrm_self_refresh_helper_init}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_self_refresh_helper_inituh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:238: ./drivers/gpu/drm/drm_self_refresh_helper.chK!hjubh, the helpers will monitor activity and call back into the driver to enable/disable SR as appropriate. The best way to think about this is that it’s a DPMS on/off request with }(hjhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]j )}(hjh]h"drm_crtc_state.self_refresh_active}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhjhK!hjubh` set in crtc state that tells you to disable/enable SR on the panel instead of power-cycling it.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK!hjdhhubh)}(hX9During SR, drivers may choose to fully disable their crtc/encoder/bridge hardware (in which case no driver changes are necessary), or they can inspect :c:type:`drm_crtc_state.self_refresh_active ` if they want to enter low power mode without full disable (in case full disable/enable is too slow).h](hDuring SR, drivers may choose to fully disable their crtc/encoder/bridge hardware (in which case no driver changes are necessary), or they can inspect }(hjBhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]j )}(hjLh]h"drm_crtc_state.self_refresh_active}(hjNhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:238: ./drivers/gpu/drm/drm_self_refresh_helper.chK'hjBubhe if they want to enter low power mode without full disable (in case full disable/enable is too slow).}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjihK'hjdhhubh)}(hSR will be deactivated if there are any atomic updates affecting the pipe that is in SR mode. If a crtc is driving multiple connectors, all connectors must be SR aware and all will enter/exit SR mode at the same time.h]hSR will be deactivated if there are any atomic updates affecting the pipe that is in SR mode. If a crtc is driving multiple connectors, all connectors must be SR aware and all will enter/exit SR mode at the same time.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:238: ./drivers/gpu/drm/drm_self_refresh_helper.chK,hjdhhubh)}(hIf the crtc and connector are SR aware, but the panel connected does not support it (or is otherwise unable to enter SR), the driver should fail atomic_check when :c:type:`drm_crtc_state.self_refresh_active ` is true.h](hIf the crtc and connector are SR aware, but the panel connected does not support it (or is otherwise unable to enter SR), the driver should fail atomic_check when }(hjhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]j )}(hjh]h"drm_crtc_state.self_refresh_active}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:238: ./drivers/gpu/drm/drm_self_refresh_helper.chK0hjubh is true.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK0hjdhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5drm_self_refresh_helper_update_avg_times (C function)*c.drm_self_refresh_helper_update_avg_timeshNtauh1j hjdhhhNhNubj )}(hhh](j )}(hvoid drm_self_refresh_helper_update_avg_times (struct drm_atomic_commit *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h]j )}(hvoid drm_self_refresh_helper_update_avg_times(struct drm_atomic_commit *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h(drm_self_refresh_helper_update_avg_timesh]j )}(h(drm_self_refresh_helper_update_avg_timesh]h(drm_self_refresh_helper_update_avg_times}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(hb(struct drm_atomic_commit *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j%)}jjsb*c.drm_self_refresh_helper_update_avg_timesasbuh1hhjubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int commit_time_msh](j)}(hunsignedh]hunsigned}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(hcommit_time_msh]hcommit_time_ms}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h"unsigned int new_self_refresh_maskh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hnew_self_refresh_maskh]hnew_self_refresh_mask}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(h!Updates a crtc's SR time averagesh]h#Updates a crtc’s SR time averages}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj-hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jHj$ jHj% j& j' uh1j hhhjdhNhNubj) )}(hXk**Parameters** ``struct drm_atomic_commit *state`` the state which has just been applied to hardware ``unsigned int commit_time_ms`` the amount of time in ms that this commit took to complete ``unsigned int new_self_refresh_mask`` bitmask of crtc's that have self_refresh_active in new state **Description** Called after :c:type:`drm_mode_config_funcs.atomic_commit_tail `, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.h](h)}(h**Parameters**h]j3 )}(hjRh]h Parameters}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjPubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjLubjw )}(hhh](j| )}(hV``struct drm_atomic_commit *state`` the state which has just been applied to hardware h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjqh]hstruct drm_atomic_commit *state}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjkubj )}(hhh]h)}(h1the state which has just been applied to hardwareh]h1the state which has just been applied to hardware}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjhubj| )}(h[``unsigned int commit_time_ms`` the amount of time in ms that this commit took to complete h](j )}(h``unsigned int commit_time_ms``h]j )}(hjh]hunsigned int commit_time_ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubj )}(hhh]h)}(h:the amount of time in ms that this commit took to completeh]h:the amount of time in ms that this commit took to complete}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjhubj| )}(hd``unsigned int new_self_refresh_mask`` bitmask of crtc's that have self_refresh_active in new state h](j )}(h&``unsigned int new_self_refresh_mask``h]j )}(hjh]h"unsigned int new_self_refresh_mask}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubj )}(hhh]h)}(hbitmask of crtc’s that have self_refresh_active in new state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjhubeh}(h]h ]h"]h$]h&]uh1jv hjLubh)}(h**Description**h]j3 )}(hjh]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjLubh)}(hX*Called after :c:type:`drm_mode_config_funcs.atomic_commit_tail `, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.h](h Called after }(hj5hhhNhNubh)}(hJ:c:type:`drm_mode_config_funcs.atomic_commit_tail `h]j )}(hj?h]h(drm_mode_config_funcs.atomic_commit_tail}(hjAhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj5ubh, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hKhjLubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjdhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0drm_self_refresh_helper_alter_state (C function)%c.drm_self_refresh_helper_alter_statehNtauh1j hjdhhhNhNubj )}(hhh](j )}(hJvoid drm_self_refresh_helper_alter_state (struct drm_atomic_commit *state)h]j )}(hIvoid drm_self_refresh_helper_alter_state(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(h#drm_self_refresh_helper_alter_stateh]j )}(h#drm_self_refresh_helper_alter_stateh]h#drm_self_refresh_helper_alter_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb%c.drm_self_refresh_helper_alter_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jzah ](j j eh"]h$]h&]j j )j huh1j hjhKhj|hhubj )}(hhh]h)}(h#Alters the atomic state for SR exith]h#Alters the atomic state for SR exit}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjDhhubah}(h]h ]h"]h$]h&]uh1j hj|hhhjhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j_j$ j_j% j& j' uh1j hhhjdhNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` the state currently being checked **Description** Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we're giving it another. However in order to keep self refresh entirely hidden from userspace, this is required. At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.h](h)}(h**Parameters**h]j3 )}(hjih]h Parameters}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjgubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjcubjw )}(hhh]j| )}(hF``struct drm_atomic_commit *state`` the state currently being checked h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubj )}(hhh]h)}(h!the state currently being checkedh]h!the state currently being checked}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubah}(h]h ]h"]h$]h&]uh1jv hjcubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjcubh)}(hX8Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we're giving it another. However in order to keep self refresh entirely hidden from userspace, this is required.h]hX:Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we’re giving it another. However in order to keep self refresh entirely hidden from userspace, this is required.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjcubh)}(h`At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.h]h`At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjcubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjdhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_self_refresh_helper_init (C function)c.drm_self_refresh_helper_inithNtauh1j hjdhhhNhNubj )}(hhh](j )}(h8int drm_self_refresh_helper_init (struct drm_crtc *crtc)h]j )}(h7int drm_self_refresh_helper_init(struct drm_crtc *crtc)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj%hKubj )}(hdrm_self_refresh_helper_inith]j )}(hdrm_self_refresh_helper_inith]hdrm_self_refresh_helper_init}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj%hKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjtmodnameN classnameNj j )}j ]j%)}jj:sbc.drm_self_refresh_helper_initasbuh1hhjPubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjPubj )}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj%hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj%hKubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj%hKhj hhubj )}(hhh]h)}(h+Initializes self refresh helpers for a crtch]h+Initializes self refresh helpers for a crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj%hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjdhNhNubj) )}(h**Parameters** ``struct drm_crtc *crtc`` the crtc which supports self refresh supported displays **Description** Returns zero if successful or -errno on failureh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubjw )}(hhh]j| )}(hR``struct drm_crtc *crtc`` the crtc which supports self refresh supported displays h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubj )}(hhh]h)}(h7the crtc which supports self refresh supported displaysh]h7the crtc which supports self refresh supported displays}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj.ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj-hKhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjSh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubh)}(h/Returns zero if successful or -errno on failureh]h/Returns zero if successful or -errno on failure}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:241: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjdhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_self_refresh_helper_cleanup (C function)!c.drm_self_refresh_helper_cleanuphNtauh1j hjdhhhNhNubj )}(hhh](j )}(hSRM should be presented in the name of "display_hdcp_srm.bin".h]hBSRM should be presented in the name of “display_hdcp_srm.bin”.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj3ubh)}(hXFormat of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdfh](hFormat of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification }(hj4hhhNhNubjn)}(h=https://www.digital-cp.com/sites/default/files/specificationsh]h=https://www.digital-cp.com/sites/default/files/specifications}(hj4hhhNhNubah}(h]h ]h"]h$]h&]refurij4uh1jmhj4ubho/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification }(hj4hhhNhNubjn)}(h=https://www.digital-cp.com/sites/default/files/specificationsh]h=https://www.digital-cp.com/sites/default/files/specifications}(hj4hhhNhNubah}(h]h ]h"]h$]h&]refurij4uh1jmhj4ubhA/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdf}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj3ubh)}(h **Return**h]j3 )}(hj4h]hReturn}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj3ubh)}(hECount of the revoked KSVs or -ve error number in case of the failure.h]hECount of the revoked KSVs or -ve error number in case of the failure.}(hj 5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj 2hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j =drm_connector_attach_content_protection_property (C function)2c.drm_connector_attach_content_protection_propertyhNtauh1j hj 2hhhNhNubj )}(hhh](j )}(hnint drm_connector_attach_content_protection_property (struct drm_connector *connector, bool hdcp_content_type)h]j )}(hmint drm_connector_attach_content_protection_property(struct drm_connector *connector, bool hdcp_content_type)h](j)}(hinth]hint}(hj<5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj85hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMFubj )}(h h]h }(hjK5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj85hhhjJ5hMFubj )}(h0drm_connector_attach_content_protection_propertyh]j )}(h0drm_connector_attach_content_protection_propertyh]h0drm_connector_attach_content_protection_property}(hj]5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY5ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj85hhhjJ5hMFubj)}(h9(struct drm_connector *connector, bool hdcp_content_type)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjy5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju5ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j%)}jj_5sb2c.drm_connector_attach_content_protection_propertyasbuh1hhju5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju5ubj9)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hju5ubj )}(h connectorh]h connector}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjq5ubj)}(hbool hdcp_content_typeh](j)}(hjIh]hbool}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(hhdcp_content_typeh]hhdcp_content_type}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjq5ubeh}(h]h ]h"]h$]h&]j j uh1jhj85hhhjJ5hMFubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj45hhhjJ5hMFubah}(h]j/5ah ](j j eh"]h$]h&]j j )j huh1j hjJ5hMFhj15hhubj )}(hhh]h)}(h"attach content protection propertyh]h"attach content protection property}(hj06hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMFhj-6hhubah}(h]h ]h"]h$]h&]uh1j hj15hhhjJ5hMFubeh}(h]h ](j functioneh"]h$]h&]j" j j# jH6j$ jH6j% j& j' uh1j hhhj 2hNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` connector to attach CP property on. ``bool hdcp_content_type`` is HDCP Content Type property needed for connector **Description** This is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP. When hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector. This property is used for sending the protected content's stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel. Content type will be used during the HDCP 2.2 authentication. Content type will be set to :c:type:`drm_connector_state.hdcp_content_type `. The content protection will be set to :c:type:`drm_connector_state.content_protection ` When kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector. **Return** Zero on success, negative errno on failure.h](h)}(h**Parameters**h]j3 )}(hjR6h]h Parameters}(hjT6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjP6ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMJhjL6ubjw )}(hhh](j| )}(hH``struct drm_connector *connector`` connector to attach CP property on. h](j )}(h#``struct drm_connector *connector``h]j )}(hjq6h]hstruct drm_connector *connector}(hjs6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjo6ubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMIhjk6ubj )}(hhh]h)}(h#connector to attach CP property on.h]h#connector to attach CP property on.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMIhj6ubah}(h]h ]h"]h$]h&]uh1j hjk6ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMIhjh6ubj| )}(hN``bool hdcp_content_type`` is HDCP Content Type property needed for connector h](j )}(h``bool hdcp_content_type``h]j )}(hj6h]hbool hdcp_content_type}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMJhj6ubj )}(hhh]h)}(h2is HDCP Content Type property needed for connectorh]h2is HDCP Content Type property needed for connector}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMJhj6ubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMJhjh6ubeh}(h]h ]h"]h$]h&]uh1jv hjL6ubh)}(h**Description**h]j3 )}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMLhjL6ubh)}(hThis is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP.h]hThis is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMKhjL6ubh)}(hWhen hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector.h]hWhen hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector.}(hj 7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMOhjL6ubh)}(hThis property is used for sending the protected content's stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel.h]hThis property is used for sending the protected content’s stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMRhjL6ubh)}(hContent type will be used during the HDCP 2.2 authentication. Content type will be set to :c:type:`drm_connector_state.hdcp_content_type `.h](hZContent type will be used during the HDCP 2.2 authentication. Content type will be set to }(hj(7hhhNhNubh)}(hE:c:type:`drm_connector_state.hdcp_content_type `h]j )}(hj27h]h%drm_connector_state.hdcp_content_type}(hj47hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj07ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMVhj(7ubh.}(hj(7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjO7hMVhjL6ubh)}(hlThe content protection will be set to :c:type:`drm_connector_state.content_protection `h](h&The content protection will be set to }(hjZ7hhhNhNubh)}(hF:c:type:`drm_connector_state.content_protection `h]j )}(hjd7h]h&drm_connector_state.content_protection}(hjf7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjb7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMYhjZ7ubeh}(h]h ]h"]h$]h&]uh1hhj7hMYhjL6ubh)}(hWhen kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector.h]hWhen kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chM[hjL6ubh)}(h **Return**h]j3 )}(hj7h]hReturn}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chM_hjL6ubh)}(h+Zero on success, negative errno on failure.h]h+Zero on success, negative errno on failure.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chM`hjL6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj 2hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_hdcp_update_content_protection (C function)$c.drm_hdcp_update_content_protectionhNtauh1j hj 2hhhNhNubj )}(hhh](j )}(hRvoid drm_hdcp_update_content_protection (struct drm_connector *connector, u64 val)h]j )}(hQvoid drm_hdcp_update_content_protection(struct drm_connector *connector, u64 val)h](j)}(hvoidh]hvoid}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhj7hMubj )}(h"drm_hdcp_update_content_protectionh]j )}(h"drm_hdcp_update_content_protectionh]h"drm_hdcp_update_content_protection}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhj7hMubj)}(h*(struct drm_connector *connector, u64 val)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj(8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj98hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj68ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;8modnameN classnameNj j )}j ]j%)}jj8sb$c.drm_hdcp_update_content_protectionasbuh1hhj8ubj )}(h h]h }(hjY8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hjg8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(h connectorh]h connector}(hjt8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubj)}(hu64 valh](h)}(hhh]j )}(hu64h]hu64}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]jU8$c.drm_hdcp_update_content_protectionasbuh1hhj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(hvalh]hval}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubeh}(h]h ]h"]h$]h&]j j uh1jhj7hhhj7hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhj7hMubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j hj7hMhj7hhubj )}(hhh]h)}(h3Updates the content protection state of a connectorh]h3Updates the content protection state of a connector}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj8hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhj7hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j8j$ j8j% j& j' uh1j hhhj 2hNhNubj) )}(hXz**Parameters** ``struct drm_connector *connector`` drm_connector on which content protection state needs an update ``u64 val`` New state of the content protection property **Description** This function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector's state and generate an uevent to notify the userspace.h](h)}(h**Parameters**h]j3 )}(hj9h]h Parameters}(hj 9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj9ubjw )}(hhh](j| )}(hd``struct drm_connector *connector`` drm_connector on which content protection state needs an update h](j )}(h#``struct drm_connector *connector``h]j )}(hj'9h]hstruct drm_connector *connector}(hj)9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%9ubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj!9ubj )}(hhh]h)}(h?drm_connector on which content protection state needs an updateh]h?drm_connector on which content protection state needs an update}(hj@9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<9hMhj=9ubah}(h]h ]h"]h$]h&]uh1j hj!9ubeh}(h]h ]h"]h$]h&]uh1j{ hj<9hMhj9ubj| )}(h9``u64 val`` New state of the content protection property h](j )}(h ``u64 val``h]j )}(hj`9h]hu64 val}(hjb9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^9ubah}(h]h ]h"]h$]h&]uh1j hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjZ9ubj )}(hhh]h)}(h,New state of the content protection propertyh]h,New state of the content protection property}(hjy9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhju9hMhjv9ubah}(h]h ]h"]h$]h&]uh1j hjZ9ubeh}(h]h ]h"]h$]h&]uh1j{ hju9hMhj9ubeh}(h]h ]h"]h$]h&]uh1jv hj9ubh)}(h**Description**h]j3 )}(hj9h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj9ubh)}(hXThis function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector's state and generate an uevent to notify the userspace.h]hXThis function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector’s state and generate an uevent to notify the userspace.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:262: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj 2hhhNhNubeh}(h]jah ]h"]hdcp helper functions referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h'Display Port Helper Functions Referenceh]h'Display Port Helper Functions Reference}(hj9hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj9hhhhhM ubh)}(hThese functions contain some common logic and helpers at various abstraction levels to deal with Display Port sink devices and related things like DP aux channel transfers, EDID reading over DP aux channels, decoding certain DPCD blocks, ...h]hThese functions contain some common logic and helpers at various abstraction levels to deal with Display Port sink devices and related things like DP aux channel transfers, EDID reading over DP aux channels, decoding certain DPCD blocks, ...}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./drivers/gpu/drm/display/drm_dp_helper.chKDhj9hhubh)}(hThe DisplayPort AUX channel is an abstraction to allow generic, driver- independent access to AUX functionality. Drivers can take advantage of this by filling in the fields of the drm_dp_aux structure.h]hThe DisplayPort AUX channel is an abstraction to allow generic, driver- independent access to AUX functionality. Drivers can take advantage of this by filling in the fields of the drm_dp_aux structure.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./drivers/gpu/drm/display/drm_dp_helper.chMChj9hhubh)}(hTransactions are described using a hardware-independent drm_dp_aux_msg structure, which is passed into a driver's .transfer() implementation. Both native and I2C-over-AUX transactions are supported.h]hTransactions are described using a hardware-independent drm_dp_aux_msg structure, which is passed into a driver’s .transfer() implementation. Both native and I2C-over-AUX transactions are supported.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:268: ./drivers/gpu/drm/display/drm_dp_helper.chMGhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j dp_sdp_header (C struct)c.dp_sdp_headerhNtauh1j hj9hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhNubj )}(hhh](j )}(h dp_sdp_headerh]j )}(hstruct dp_sdp_headerh](j )}(hj h]hstruct}(hj&:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj":hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhKubj )}(h h]h }(hj4:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj":hhhj3:hKubj )}(h dp_sdp_headerh]j )}(hj :h]h dp_sdp_header}(hjF:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB:ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj":hhhj3:hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:hhhj3:hKubah}(h]j:ah ](j j eh"]h$]h&]j j )j huh1j hj3:hKhj:hhubj )}(hhh]h)}(hDP secondary data packet headerh]hDP secondary data packet header}(hjh:hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhje:hhubah}(h]h ]h"]h$]h&]uh1j hj:hhhj3:hKubeh}(h]h ](j structeh"]h$]h&]j" j j# j:j$ j:j% j& j' uh1j hhhj9hj:hNubj) )}(hX0**Definition**:: struct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; }; **Members** ``HB0`` Secondary Data Packet ID ``HB1`` Secondary Data Packet Type ``HB2`` Secondary Data Packet Specific header, Byte 0 ``HB3`` Secondary Data packet Specific header, Byte 1h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubh:}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj:ubjN )}(hIstruct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; };h]hIstruct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; };}hj:sbah}(h]h ]h"]h$]h&]j j uh1jM ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj:ubh)}(h **Members**h]j3 )}(hj:h]hMembers}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj:ubjw )}(hhh](j| )}(h!``HB0`` Secondary Data Packet ID h](j )}(h``HB0``h]j )}(hj:h]hHB0}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj:ubj )}(hhh]h)}(hSecondary Data Packet IDh]hSecondary Data Packet ID}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj:ubah}(h]h ]h"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]uh1j{ hj:hMhj:ubj| )}(h#``HB1`` Secondary Data Packet Type h](j )}(h``HB1``h]j )}(hj;h]hHB1}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ;ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj;ubj )}(hhh]h)}(hSecondary Data Packet Typeh]hSecondary Data Packet Type}(hj';hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#;hMhj$;ubah}(h]h ]h"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]uh1j{ hj#;hMhj:ubj| )}(h6``HB2`` Secondary Data Packet Specific header, Byte 0 h](j )}(h``HB2``h]j )}(hjG;h]hHB2}(hjI;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjE;ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhjA;ubj )}(hhh]h)}(h-Secondary Data Packet Specific header, Byte 0h]h-Secondary Data Packet Specific header, Byte 0}(hj`;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\;hMhj];ubah}(h]h ]h"]h$]h&]uh1j hjA;ubeh}(h]h ]h"]h$]h&]uh1j{ hj\;hMhj:ubj| )}(h5``HB3`` Secondary Data packet Specific header, Byte 1h](j )}(h``HB3``h]j )}(hj;h]hHB3}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~;ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhjz;ubj )}(hhh]h)}(h-Secondary Data packet Specific header, Byte 1h]h-Secondary Data packet Specific header, Byte 1}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj;ubah}(h]h ]h"]h$]h&]uh1j hjz;ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hMhj:ubeh}(h]h ]h"]h$]h&]uh1jv hj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhj:hNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j dp_sdp (C struct)c.dp_sdphNtauh1j hj9hhhj:hNubj )}(hhh](j )}(hdp_sdph]j )}(h struct dp_sdph](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;hhhj;hMubj )}(hdp_sdph]j )}(hj;h]hdp_sdp}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;hhhj;hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj;hhhj;hMubah}(h]j;ah ](j j eh"]h$]h&]j j )j huh1j hj;hMhj;hhubj )}(hhh]h)}(hDP secondary data packeth]hDP secondary data packet}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj<hhubah}(h]h ]h"]h$]h&]uh1j hj;hhhj;hMubeh}(h]h ](j structeh"]h$]h&]j" j j# j4<j$ j4<j% j& j' uh1j hhhj9hj:hNubj) )}(hXz**Definition**:: struct dp_sdp { struct dp_sdp_header sdp_header; u8 db[32]; }; **Members** ``sdp_header`` DP secondary data packet header ``db`` DP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reservedh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj@<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<<ubh:}(hj<<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj8<ubjN )}(hFstruct dp_sdp { struct dp_sdp_header sdp_header; u8 db[32]; };h]hFstruct dp_sdp { struct dp_sdp_header sdp_header; u8 db[32]; };}hjY<sbah}(h]h ]h"]h$]h&]j j uh1jM ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj8<ubh)}(h **Members**h]j3 )}(hjj<h]hMembers}(hjl<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjh<ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj8<ubjw )}(hhh](j| )}(h/``sdp_header`` DP secondary data packet header h](j )}(h``sdp_header``h]j )}(hj<h]h sdp_header}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj<ubj )}(hhh]h)}(hDP secondary data packet headerh]hDP secondary data packet header}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj<ubah}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMhj<ubj| )}(hX``db`` DP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reservedh](j )}(h``db``h]j )}(hj<h]hdb}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj<ubj )}(hhh]h)}(hXDP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reservedh]hXDP secondaray data packet data blocks VSC SDP Payload for PSR db[0]: Stereo Interface db[1]: 0 - PSR State; 1 - Update RFB; 2 - CRC Valid db[2]: CRC value bits 7:0 of the R or Cr component db[3]: CRC value bits 15:8 of the R or Cr component db[4]: CRC value bits 7:0 of the G or Y component db[5]: CRC value bits 15:8 of the G or Y component db[6]: CRC value bits 7:0 of the B or Cb component db[7]: CRC value bits 15:8 of the B or Cb component db[8] - db[31]: Reserved VSC SDP Payload for Pixel Encoding/Colorimetry Format db[0] - db[15]: Reserved db[16]: Pixel Encoding and Colorimetry Formats db[17]: Dynamic Range and Component Bit Depth db[18]: Content Type db[19] - db[31]: Reserved}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj<ubah}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMhj<ubeh}(h]h ]h"]h$]h&]uh1jv hj8<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhj:hNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j dp_pixelformat (C enum)c.dp_pixelformathNtauh1j hj9hhhj:hNubj )}(hhh](j )}(hdp_pixelformath]j )}(henum dp_pixelformath](j )}(hj7h]henum}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMubj )}(h h]h }(hj*=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=hhhj)=hMubj )}(hdp_pixelformath]j )}(hj=h]hdp_pixelformat}(hj<=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj=hhhj)=hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj=hhhj)=hMubah}(h]j=ah ](j j eh"]h$]h&]j j )j huh1j hj)=hMhj=hhubj )}(hhh]h)}(hdrm DP Pixel encoding formatsh]hdrm DP Pixel encoding formats}(hj^=hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj[=hhubah}(h]h ]h"]h$]h&]uh1j hj=hhhj)=hMubeh}(h]h ](j enumeh"]h$]h&]j" j j# jv=j$ jv=j% j& j' uh1j hhhj9hj:hNubj) )}(hX**Constants** ``DP_PIXELFORMAT_RGB`` RGB pixel encoding format ``DP_PIXELFORMAT_YUV444`` YCbCr 4:4:4 pixel encoding format ``DP_PIXELFORMAT_YUV422`` YCbCr 4:2:2 pixel encoding format ``DP_PIXELFORMAT_YUV420`` YCbCr 4:2:0 pixel encoding format ``DP_PIXELFORMAT_Y_ONLY`` Y Only pixel encoding format ``DP_PIXELFORMAT_RAW`` RAW pixel encoding format ``DP_PIXELFORMAT_RESERVED`` Reserved pixel encoding formath](h)}(h **Constants**h]j3 )}(hj=h]h Constants}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~=ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhjz=ubjw )}(hhh](j| )}(h1``DP_PIXELFORMAT_RGB`` RGB pixel encoding format h](j )}(h``DP_PIXELFORMAT_RGB``h]j )}(hj=h]hDP_PIXELFORMAT_RGB}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj=ubj )}(hhh]h)}(hRGB pixel encoding formath]hRGB pixel encoding format}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hj=hMhj=ubj| )}(h<``DP_PIXELFORMAT_YUV444`` YCbCr 4:4:4 pixel encoding format h](j )}(h``DP_PIXELFORMAT_YUV444``h]j )}(hj=h]hDP_PIXELFORMAT_YUV444}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj=ubj )}(hhh]h)}(h!YCbCr 4:4:4 pixel encoding formath]h!YCbCr 4:4:4 pixel encoding format}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hj=hMhj=ubj| )}(h<``DP_PIXELFORMAT_YUV422`` YCbCr 4:2:2 pixel encoding format h](j )}(h``DP_PIXELFORMAT_YUV422``h]j )}(hj>h]hDP_PIXELFORMAT_YUV422}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM hj >ubj )}(hhh]h)}(h!YCbCr 4:2:2 pixel encoding formath]h!YCbCr 4:2:2 pixel encoding format}(hj*>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&>hM hj'>ubah}(h]h ]h"]h$]h&]uh1j hj >ubeh}(h]h ]h"]h$]h&]uh1j{ hj&>hM hj=ubj| )}(h<``DP_PIXELFORMAT_YUV420`` YCbCr 4:2:0 pixel encoding format h](j )}(h``DP_PIXELFORMAT_YUV420``h]j )}(hjJ>h]hDP_PIXELFORMAT_YUV420}(hjL>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjH>ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhjD>ubj )}(hhh]h)}(h!YCbCr 4:2:0 pixel encoding formath]h!YCbCr 4:2:0 pixel encoding format}(hjc>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_>hMhj`>ubah}(h]h ]h"]h$]h&]uh1j hjD>ubeh}(h]h ]h"]h$]h&]uh1j{ hj_>hMhj=ubj| )}(h7``DP_PIXELFORMAT_Y_ONLY`` Y Only pixel encoding format h](j )}(h``DP_PIXELFORMAT_Y_ONLY``h]j )}(hj>h]hDP_PIXELFORMAT_Y_ONLY}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj}>ubj )}(hhh]h)}(hY Only pixel encoding formath]hY Only pixel encoding format}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj>ubah}(h]h ]h"]h$]h&]uh1j hj}>ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMhj=ubj| )}(h1``DP_PIXELFORMAT_RAW`` RAW pixel encoding format h](j )}(h``DP_PIXELFORMAT_RAW``h]j )}(hj>h]hDP_PIXELFORMAT_RAW}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj>ubj )}(hhh]h)}(hRAW pixel encoding formath]hRAW pixel encoding format}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj>ubah}(h]h ]h"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMhj=ubj| )}(h:``DP_PIXELFORMAT_RESERVED`` Reserved pixel encoding formath](j )}(h``DP_PIXELFORMAT_RESERVED``h]j )}(hj>h]hDP_PIXELFORMAT_RESERVED}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj>ubj )}(hhh]h)}(hReserved pixel encoding formath]hReserved pixel encoding format}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj ?ubah}(h]h ]h"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]uh1j{ hj ?hMhj=ubeh}(h]h ]h"]h$]h&]uh1jv hjz=ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhj:hNubh)}(h**Description**h]j3 )}(hj8?h]h Description}(hj:?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6?ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj9hhubh)}(hThis enum is used to indicate DP VSC SDP Pixel encoding formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis enum is used to indicate DP VSC SDP Pixel encoding formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hjN?hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j dp_colorimetry (C enum)c.dp_colorimetryhNtauh1j hj9hhhj:hNubj )}(hhh](j )}(hdp_colorimetryh]j )}(henum dp_colorimetryh](j )}(hj7h]henum}(hjv?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr?hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr?hhhj?hMubj )}(hdp_colorimetryh]j )}(hjp?h]hdp_colorimetry}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjr?hhhj?hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjn?hhhj?hMubah}(h]ji?ah ](j j eh"]h$]h&]j j )j huh1j hj?hMhjk?hhubj )}(hhh]h)}(hdrm DP Colorimetry formatsh]hdrm DP Colorimetry formats}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj?hhubah}(h]h ]h"]h$]h&]uh1j hjk?hhhj?hMubeh}(h]h ](j enumeh"]h$]h&]j" j j# j?j$ j?j% j& j' uh1j hhhj9hj:hNubj) )}(hX **Constants** ``DP_COLORIMETRY_DEFAULT`` sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format ``DP_COLORIMETRY_RGB_WIDE_FIXED`` RGB wide gamut fixed point colorimetry format ``DP_COLORIMETRY_BT709_YCC`` ITU-R BT.709 colorimetry format ``DP_COLORIMETRY_RGB_WIDE_FLOAT`` RGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format ``DP_COLORIMETRY_XVYCC_601`` xvYCC601 colorimetry format ``DP_COLORIMETRY_OPRGB`` OpRGB colorimetry format ``DP_COLORIMETRY_XVYCC_709`` xvYCC709 colorimetry format ``DP_COLORIMETRY_DCI_P3_RGB`` DCI-P3 (SMPTE RP 431-2) colorimetry format ``DP_COLORIMETRY_SYCC_601`` sYCC601 colorimetry format ``DP_COLORIMETRY_RGB_CUSTOM`` RGB Custom Color Profile colorimetry format ``DP_COLORIMETRY_OPYCC_601`` opYCC601 colorimetry format ``DP_COLORIMETRY_BT2020_RGB`` ITU-R BT.2020 R' G' B' colorimetry format ``DP_COLORIMETRY_BT2020_CYCC`` ITU-R BT.2020 Y'c C'bc C'rc colorimetry format ``DP_COLORIMETRY_BT2020_YCC`` ITU-R BT.2020 Y' C'b C'r colorimetry formath](h)}(h **Constants**h]j3 )}(hj?h]h Constants}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj?ubjw )}(hhh](j| )}(hS``DP_COLORIMETRY_DEFAULT`` sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format h](j )}(h``DP_COLORIMETRY_DEFAULT``h]j )}(hj?h]hDP_COLORIMETRY_DEFAULT}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj?ubj )}(hhh]h)}(h7sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry formath]h7sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj@ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hMhj?ubj| )}(hP``DP_COLORIMETRY_RGB_WIDE_FIXED`` RGB wide gamut fixed point colorimetry format h](j )}(h!``DP_COLORIMETRY_RGB_WIDE_FIXED``h]j )}(hj3@h]hDP_COLORIMETRY_RGB_WIDE_FIXED}(hj5@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1@ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM"hj-@ubj )}(hhh]h)}(h-RGB wide gamut fixed point colorimetry formath]h-RGB wide gamut fixed point colorimetry format}(hjL@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjH@hM"hjI@ubah}(h]h ]h"]h$]h&]uh1j hj-@ubeh}(h]h ]h"]h$]h&]uh1j{ hjH@hM"hj?ubj| )}(h=``DP_COLORIMETRY_BT709_YCC`` ITU-R BT.709 colorimetry format h](j )}(h``DP_COLORIMETRY_BT709_YCC``h]j )}(hjl@h]hDP_COLORIMETRY_BT709_YCC}(hjn@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjj@ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM%hjf@ubj )}(hhh]h)}(hITU-R BT.709 colorimetry formath]hITU-R BT.709 colorimetry format}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hM%hj@ubah}(h]h ]h"]h$]h&]uh1j hjf@ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hM%hj?ubj| )}(hk``DP_COLORIMETRY_RGB_WIDE_FLOAT`` RGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format h](j )}(h!``DP_COLORIMETRY_RGB_WIDE_FLOAT``h]j )}(hj@h]hDP_COLORIMETRY_RGB_WIDE_FLOAT}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM)hj@ubj )}(hhh]h)}(hHRGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry formath]hHRGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM(hj@ubah}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hM)hj?ubj| )}(h9``DP_COLORIMETRY_XVYCC_601`` xvYCC601 colorimetry format h](j )}(h``DP_COLORIMETRY_XVYCC_601``h]j )}(hj@h]hDP_COLORIMETRY_XVYCC_601}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM,hj@ubj )}(hhh]h)}(hxvYCC601 colorimetry formath]hxvYCC601 colorimetry format}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hM,hj@ubah}(h]h ]h"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hM,hj?ubj| )}(h2``DP_COLORIMETRY_OPRGB`` OpRGB colorimetry format h](j )}(h``DP_COLORIMETRY_OPRGB``h]j )}(hjAh]hDP_COLORIMETRY_OPRGB}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM/hjAubj )}(hhh]h)}(hOpRGB colorimetry formath]hOpRGB colorimetry format}(hj1AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-AhM/hj.Aubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hj-AhM/hj?ubj| )}(h9``DP_COLORIMETRY_XVYCC_709`` xvYCC709 colorimetry format h](j )}(h``DP_COLORIMETRY_XVYCC_709``h]j )}(hjQAh]hDP_COLORIMETRY_XVYCC_709}(hjSAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOAubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM2hjKAubj )}(hhh]h)}(hxvYCC709 colorimetry formath]hxvYCC709 colorimetry format}(hjjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfAhM2hjgAubah}(h]h ]h"]h$]h&]uh1j hjKAubeh}(h]h ]h"]h$]h&]uh1j{ hjfAhM2hj?ubj| )}(hI``DP_COLORIMETRY_DCI_P3_RGB`` DCI-P3 (SMPTE RP 431-2) colorimetry format h](j )}(h``DP_COLORIMETRY_DCI_P3_RGB``h]j )}(hjAh]hDP_COLORIMETRY_DCI_P3_RGB}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM5hjAubj )}(hhh]h)}(h*DCI-P3 (SMPTE RP 431-2) colorimetry formath]h*DCI-P3 (SMPTE RP 431-2) colorimetry format}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhM5hjAubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hjAhM5hj?ubj| )}(h7``DP_COLORIMETRY_SYCC_601`` sYCC601 colorimetry format h](j )}(h``DP_COLORIMETRY_SYCC_601``h]j )}(hjAh]hDP_COLORIMETRY_SYCC_601}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM8hjAubj )}(hhh]h)}(hsYCC601 colorimetry formath]hsYCC601 colorimetry format}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhM8hjAubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hjAhM8hj?ubj| )}(hJ``DP_COLORIMETRY_RGB_CUSTOM`` RGB Custom Color Profile colorimetry format h](j )}(h``DP_COLORIMETRY_RGB_CUSTOM``h]j )}(hjAh]hDP_COLORIMETRY_RGB_CUSTOM}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM;hjAubj )}(hhh]h)}(h+RGB Custom Color Profile colorimetry formath]h+RGB Custom Color Profile colorimetry format}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhM;hjBubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hjBhM;hj?ubj| )}(h9``DP_COLORIMETRY_OPYCC_601`` opYCC601 colorimetry format h](j )}(h``DP_COLORIMETRY_OPYCC_601``h]j )}(hj5Bh]hDP_COLORIMETRY_OPYCC_601}(hj7BhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3Bubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM>hj/Bubj )}(hhh]h)}(hopYCC601 colorimetry formath]hopYCC601 colorimetry format}(hjNBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJBhM>hjKBubah}(h]h ]h"]h$]h&]uh1j hj/Bubeh}(h]h ]h"]h$]h&]uh1j{ hjJBhM>hj?ubj| )}(hH``DP_COLORIMETRY_BT2020_RGB`` ITU-R BT.2020 R' G' B' colorimetry format h](j )}(h``DP_COLORIMETRY_BT2020_RGB``h]j )}(hjnBh]hDP_COLORIMETRY_BT2020_RGB}(hjpBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlBubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMAhjhBubj )}(hhh]h)}(h)ITU-R BT.2020 R' G' B' colorimetry formath]h/ITU-R BT.2020 R’ G’ B’ colorimetry format}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMAhjBubah}(h]h ]h"]h$]h&]uh1j hjhBubeh}(h]h ]h"]h$]h&]uh1j{ hjBhMAhj?ubj| )}(hN``DP_COLORIMETRY_BT2020_CYCC`` ITU-R BT.2020 Y'c C'bc C'rc colorimetry format h](j )}(h``DP_COLORIMETRY_BT2020_CYCC``h]j )}(hjBh]hDP_COLORIMETRY_BT2020_CYCC}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMDhjBubj )}(hhh]h)}(h.ITU-R BT.2020 Y'c C'bc C'rc colorimetry formath]h4ITU-R BT.2020 Y’c C’bc C’rc colorimetry format}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMDhjBubah}(h]h ]h"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]uh1j{ hjBhMDhj?ubj| )}(hI``DP_COLORIMETRY_BT2020_YCC`` ITU-R BT.2020 Y' C'b C'r colorimetry formath](j )}(h``DP_COLORIMETRY_BT2020_YCC``h]j )}(hjBh]hDP_COLORIMETRY_BT2020_YCC}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMFhjBubj )}(hhh]h)}(h+ITU-R BT.2020 Y' C'b C'r colorimetry formath]h1ITU-R BT.2020 Y’ C’b C’r colorimetry format}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMGhjBubah}(h]h ]h"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]uh1j{ hjBhMFhj?ubeh}(h]h ]h"]h$]h&]uh1jv hj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhj:hNubh)}(h**Description**h]j3 )}(hj#Ch]h Description}(hj%ChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!Cubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMIhj9hhubh)}(hThis enum is used to indicate DP VSC SDP Colorimetry formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] and a name of enum member follows enum drm_colorimetry definition.h]hThis enum is used to indicate DP VSC SDP Colorimetry formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] and a name of enum member follows enum drm_colorimetry definition.}(hj9ChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j dp_dynamic_range (C enum)c.dp_dynamic_rangehNtauh1j hj9hhhj:hNubj )}(hhh](j )}(hdp_dynamic_rangeh]j )}(henum dp_dynamic_rangeh](j )}(hj7h]henum}(hjaChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]Chhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMubj )}(h h]h }(hjoChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ChhhjnChMubj )}(hdp_dynamic_rangeh]j )}(hj[Ch]hdp_dynamic_range}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}Cubah}(h]h ](j j eh"]h$]h&]j j uh1j hj]ChhhjnChMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjYChhhjnChMubah}(h]jTCah ](j j eh"]h$]h&]j j )j huh1j hjnChMhjVChhubj )}(hhh]h)}(hdrm DP Dynamic Rangeh]hdrm DP Dynamic Range}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM@hjChhubah}(h]h ]h"]h$]h&]uh1j hjVChhhjnChMubeh}(h]h ](j enumeh"]h$]h&]j" j j# jCj$ jCj% j& j' uh1j hhhj9hj:hNubj) )}(h[**Constants** ``DP_DYNAMIC_RANGE_VESA`` VESA range ``DP_DYNAMIC_RANGE_CTA`` CTA rangeh](h)}(h **Constants**h]j3 )}(hjCh]h Constants}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjCubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMDhjCubjw )}(hhh](j| )}(h%``DP_DYNAMIC_RANGE_VESA`` VESA range h](j )}(h``DP_DYNAMIC_RANGE_VESA``h]j )}(hjCh]hDP_DYNAMIC_RANGE_VESA}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMGhjCubj )}(hhh]h)}(h VESA rangeh]h VESA range}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMGhjCubah}(h]h ]h"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]uh1j{ hjChMGhjCubj| )}(h"``DP_DYNAMIC_RANGE_CTA`` CTA rangeh](j )}(h``DP_DYNAMIC_RANGE_CTA``h]j )}(hjDh]hDP_DYNAMIC_RANGE_CTA}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMIhjDubj )}(hhh]h)}(h CTA rangeh]h CTA range}(hj6DhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMJhj3Dubah}(h]h ]h"]h$]h&]uh1j hjDubeh}(h]h ]h"]h$]h&]uh1j{ hj2DhMIhjCubeh}(h]h ]h"]h$]h&]uh1jv hjCubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhj:hNubh)}(h**Description**h]j3 )}(hj`Dh]h Description}(hjbDhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^Dubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMLhj9hhubh)}(hThis enum is used to indicate DP VSC SDP Dynamic Range. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis enum is used to indicate DP VSC SDP Dynamic Range. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hjvDhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMAhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j dp_content_type (C enum)c.dp_content_typehNtauh1j hj9hhhj:hNubj )}(hhh](j )}(hdp_content_typeh]j )}(henum dp_content_typeh](j )}(hj7h]henum}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMHubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDhhhjDhMHubj )}(hdp_content_typeh]j )}(hjDh]hdp_content_type}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ](j j eh"]h$]h&]j j uh1j hjDhhhjDhMHubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjDhhhjDhMHubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j hjDhMHhjDhhubj )}(hhh]h)}(hdrm DP Content Typeh]hdrm DP Content Type}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMOhjDhhubah}(h]h ]h"]h$]h&]uh1j hjDhhhjDhMHubeh}(h]h ](j enumeh"]h$]h&]j" j j# jDj$ jDj% j& j' uh1j hhhj9hj:hNubj) )}(h**Constants** ``DP_CONTENT_TYPE_NOT_DEFINED`` Not defined type ``DP_CONTENT_TYPE_GRAPHICS`` Graphics type ``DP_CONTENT_TYPE_PHOTO`` Photo type ``DP_CONTENT_TYPE_VIDEO`` Video type ``DP_CONTENT_TYPE_GAME`` Game typeh](h)}(h **Constants**h]j3 )}(hjEh]h Constants}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjEubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMShjDubjw )}(hhh](j| )}(h1``DP_CONTENT_TYPE_NOT_DEFINED`` Not defined type h](j )}(h``DP_CONTENT_TYPE_NOT_DEFINED``h]j )}(hj!Eh]hDP_CONTENT_TYPE_NOT_DEFINED}(hj#EhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMVhjEubj )}(hhh]h)}(hNot defined typeh]hNot defined type}(hj:EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6EhMVhj7Eubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hj6EhMVhjEubj| )}(h+``DP_CONTENT_TYPE_GRAPHICS`` Graphics type h](j )}(h``DP_CONTENT_TYPE_GRAPHICS``h]j )}(hjZEh]hDP_CONTENT_TYPE_GRAPHICS}(hj\EhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXEubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMYhjTEubj )}(hhh]h)}(h Graphics typeh]h Graphics type}(hjsEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjoEhMYhjpEubah}(h]h ]h"]h$]h&]uh1j hjTEubeh}(h]h ]h"]h$]h&]uh1j{ hjoEhMYhjEubj| )}(h%``DP_CONTENT_TYPE_PHOTO`` Photo type h](j )}(h``DP_CONTENT_TYPE_PHOTO``h]j )}(hjEh]hDP_CONTENT_TYPE_PHOTO}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM\hjEubj )}(hhh]h)}(h Photo typeh]h Photo type}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM\hjEubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hjEhM\hjEubj| )}(h%``DP_CONTENT_TYPE_VIDEO`` Video type h](j )}(h``DP_CONTENT_TYPE_VIDEO``h]j )}(hjEh]hDP_CONTENT_TYPE_VIDEO}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhM_hjEubj )}(hhh]h)}(h Video typeh]h Video type}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM_hjEubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hjEhM_hjEubj| )}(h"``DP_CONTENT_TYPE_GAME`` Game typeh](j )}(h``DP_CONTENT_TYPE_GAME``h]j )}(hjFh]hDP_CONTENT_TYPE_GAME}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1j ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMahjEubj )}(hhh]h)}(h Game typeh]h Game type}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMbhjFubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hjFhMahjEubeh}(h]h ]h"]h$]h&]uh1jv hjDubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhj:hNubh)}(h**Description**h]j3 )}(hjHFh]h Description}(hjJFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFFubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMdhj9hhubh)}(hThis enum is used to indicate DP VSC SDP Content Types. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] CTA-861-G defines content types and expected processing by a sink deviceh]hThis enum is used to indicate DP VSC SDP Content Types. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] CTA-861-G defines content types and expected processing by a sink device}(hj^FhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:271: ./include/drm/display/drm_dp.hhMPhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_vsc_sdp (C struct)c.drm_dp_vsc_sdphNtauh1j hj9hhhNhNubj )}(hhh](j )}(hdrm_dp_vsc_sdph]j )}(hstruct drm_dp_vsc_sdph](j )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFhhhjFhKubj )}(hdrm_dp_vsc_sdph]j )}(hjFh]hdrm_dp_vsc_sdp}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ](j j eh"]h$]h&]j j uh1j hjFhhhjFhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~FhhhjFhKubah}(h]jyFah ](j j eh"]h$]h&]j j )j huh1j hjFhKhj{Fhhubj )}(hhh]h)}(hdrm DP VSC SDPh]hdrm DP VSC SDP}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKLhjFhhubah}(h]h ]h"]h$]h&]uh1j hj{FhhhjFhKubeh}(h]h ](j structeh"]h$]h&]j" j j# jFj$ jFj% j& j' uh1j hhhj9hNhNubj) )}(hX**Definition**:: struct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; }; **Members** ``sdp_type`` secondary-data packet type ``revision`` revision number ``length`` number of valid data bytes ``pixelformat`` pixel encoding format ``colorimetry`` colorimetry format ``bpc`` bit per color ``dynamic_range`` dynamic range information ``content_type`` CTA-861-G defines content types and expected processing by a sink deviceh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFubh:}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKPhjFubjN )}(hXstruct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; };h]hXstruct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; };}hjGsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKRhjFubh)}(h **Members**h]j3 )}(hjGh]hMembers}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhK]hjFubjw )}(hhh](j| )}(h(``sdp_type`` secondary-data packet type h](j )}(h ``sdp_type``h]j )}(hj5Gh]hsdp_type}(hj7GhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3Gubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKShj/Gubj )}(hhh]h)}(hsecondary-data packet typeh]hsecondary-data packet type}(hjNGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJGhKShjKGubah}(h]h ]h"]h$]h&]uh1j hj/Gubeh}(h]h ]h"]h$]h&]uh1j{ hjJGhKShj,Gubj| )}(h``revision`` revision number h](j )}(h ``revision``h]j )}(hjnGh]hrevision}(hjpGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlGubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKThjhGubj )}(hhh]h)}(hrevision numberh]hrevision number}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKThjGubah}(h]h ]h"]h$]h&]uh1j hjhGubeh}(h]h ]h"]h$]h&]uh1j{ hjGhKThj,Gubj| )}(h&``length`` number of valid data bytes h](j )}(h ``length``h]j )}(hjGh]hlength}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKUhjGubj )}(hhh]h)}(hnumber of valid data bytesh]hnumber of valid data bytes}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKUhjGubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hjGhKUhj,Gubj| )}(h&``pixelformat`` pixel encoding format h](j )}(h``pixelformat``h]j )}(hjGh]h pixelformat}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKVhjGubj )}(hhh]h)}(hpixel encoding formath]hpixel encoding format}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKVhjGubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hjGhKVhj,Gubj| )}(h#``colorimetry`` colorimetry format h](j )}(h``colorimetry``h]j )}(hjHh]h colorimetry}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKWhjHubj )}(hhh]h)}(hcolorimetry formath]hcolorimetry format}(hj2HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.HhKWhj/Hubah}(h]h ]h"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]uh1j{ hj.HhKWhj,Gubj| )}(h``bpc`` bit per color h](j )}(h``bpc``h]j )}(hjRHh]hbpc}(hjTHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPHubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKXhjLHubj )}(hhh]h)}(h bit per colorh]h bit per color}(hjkHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjgHhKXhjhHubah}(h]h ]h"]h$]h&]uh1j hjLHubeh}(h]h ]h"]h$]h&]uh1j{ hjgHhKXhj,Gubj| )}(h,``dynamic_range`` dynamic range information h](j )}(h``dynamic_range``h]j )}(hjHh]h dynamic_range}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKYhjHubj )}(hhh]h)}(hdynamic range informationh]hdynamic range information}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhKYhjHubah}(h]h ]h"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]uh1j{ hjHhKYhj,Gubj| )}(hY``content_type`` CTA-861-G defines content types and expected processing by a sink deviceh](j )}(h``content_type``h]j )}(hjHh]h content_type}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKYhjHubj )}(hhh]h)}(hHCTA-861-G defines content types and expected processing by a sink deviceh]hHCTA-861-G defines content types and expected processing by a sink device}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKZhjHubah}(h]h ]h"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]uh1j{ hjHhKYhj,Gubeh}(h]h ]h"]h$]h&]uh1jv hjFubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubh)}(h**Description**h]j3 )}(hjIh]h Description}(hj IhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhK]hj9hhubh)}(hThis structure represents a DP VSC SDP of drm It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis structure represents a DP VSC SDP of drm It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKMhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_as_sdp (C struct)c.drm_dp_as_sdphNtauh1j hj9hhhNhNubj )}(hhh](j )}(h drm_dp_as_sdph]j )}(hstruct drm_dp_as_sdph](j )}(hj h]hstruct}(hjEIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAIhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKTubj )}(h h]h }(hjSIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAIhhhjRIhKTubj )}(h drm_dp_as_sdph]j )}(hj?Ih]h drm_dp_as_sdp}(hjeIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaIubah}(h]h ](j j eh"]h$]h&]j j uh1j hjAIhhhjRIhKTubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj=IhhhjRIhKTubah}(h]j8Iah ](j j eh"]h$]h&]j j )j huh1j hjRIhKThj:Ihhubj )}(hhh]h)}(hdrm DP Adaptive Sync SDPh]hdrm DP Adaptive Sync SDP}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKghjIhhubah}(h]h ]h"]h$]h&]uh1j hj:IhhhjRIhKTubeh}(h]h ](j structeh"]h$]h&]j" j j# jIj$ jIj% j& j' uh1j hhhj9hNhNubj) )}(hX**Definition**:: struct drm_dp_as_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; int vtotal; int target_rr; int duration_incr_ms; int duration_decr_ms; bool target_rr_divider; enum operation_mode mode; int coasting_vtotal; }; **Members** ``sdp_type`` Secondary-data packet type ``revision`` Revision Number ``length`` Number of valid data bytes ``vtotal`` Minimum Vertical Vtotal ``target_rr`` Target Refresh ``duration_incr_ms`` Successive frame duration increase ``duration_decr_ms`` Successive frame duration decrease ``target_rr_divider`` Target refresh rate divider ``mode`` Adaptive Sync Operation Mode ``coasting_vtotal`` Coasting vtotalh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubh:}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKkhjIubjN )}(hXstruct drm_dp_as_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; int vtotal; int target_rr; int duration_incr_ms; int duration_decr_ms; bool target_rr_divider; enum operation_mode mode; int coasting_vtotal; };h]hXstruct drm_dp_as_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; int vtotal; int target_rr; int duration_incr_ms; int duration_decr_ms; bool target_rr_divider; enum operation_mode mode; int coasting_vtotal; };}hjIsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKmhjIubh)}(h **Members**h]j3 )}(hjIh]hMembers}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKzhjIubjw )}(hhh](j| )}(h(``sdp_type`` Secondary-data packet type h](j )}(h ``sdp_type``h]j )}(hjIh]hsdp_type}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKnhjIubj )}(hhh]h)}(hSecondary-data packet typeh]hSecondary-data packet type}(hj JhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj JhKnhj Jubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hj JhKnhjIubj| )}(h``revision`` Revision Number h](j )}(h ``revision``h]j )}(hj-Jh]hrevision}(hj/JhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+Jubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKohj'Jubj )}(hhh]h)}(hRevision Numberh]hRevision Number}(hjFJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBJhKohjCJubah}(h]h ]h"]h$]h&]uh1j hj'Jubeh}(h]h ]h"]h$]h&]uh1j{ hjBJhKohjIubj| )}(h&``length`` Number of valid data bytes h](j )}(h ``length``h]j )}(hjfJh]hlength}(hjhJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdJubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKphj`Jubj )}(hhh]h)}(hNumber of valid data bytesh]hNumber of valid data bytes}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{JhKphj|Jubah}(h]h ]h"]h$]h&]uh1j hj`Jubeh}(h]h ]h"]h$]h&]uh1j{ hj{JhKphjIubj| )}(h#``vtotal`` Minimum Vertical Vtotal h](j )}(h ``vtotal``h]j )}(hjJh]hvtotal}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKqhjJubj )}(hhh]h)}(hMinimum Vertical Vtotalh]hMinimum Vertical Vtotal}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKqhjJubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hjJhKqhjIubj| )}(h``target_rr`` Target Refresh h](j )}(h ``target_rr``h]j )}(hjJh]h target_rr}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKrhjJubj )}(hhh]h)}(hTarget Refreshh]hTarget Refresh}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKrhjJubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hjJhKrhjIubj| )}(h8``duration_incr_ms`` Successive frame duration increase h](j )}(h``duration_incr_ms``h]j )}(hjKh]hduration_incr_ms}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKshj Kubj )}(hhh]h)}(h"Successive frame duration increaseh]h"Successive frame duration increase}(hj*KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&KhKshj'Kubah}(h]h ]h"]h$]h&]uh1j hj Kubeh}(h]h ]h"]h$]h&]uh1j{ hj&KhKshjIubj| )}(h8``duration_decr_ms`` Successive frame duration decrease h](j )}(h``duration_decr_ms``h]j )}(hjJKh]hduration_decr_ms}(hjLKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjHKubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKthjDKubj )}(hhh]h)}(h"Successive frame duration decreaseh]h"Successive frame duration decrease}(hjcKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_KhKthj`Kubah}(h]h ]h"]h$]h&]uh1j hjDKubeh}(h]h ]h"]h$]h&]uh1j{ hj_KhKthjIubj| )}(h2``target_rr_divider`` Target refresh rate divider h](j )}(h``target_rr_divider``h]j )}(hjKh]htarget_rr_divider}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKuhj}Kubj )}(hhh]h)}(hTarget refresh rate dividerh]hTarget refresh rate divider}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhKuhjKubah}(h]h ]h"]h$]h&]uh1j hj}Kubeh}(h]h ]h"]h$]h&]uh1j{ hjKhKuhjIubj| )}(h&``mode`` Adaptive Sync Operation Mode h](j )}(h``mode``h]j )}(hjKh]hmode}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKvhjKubj )}(hhh]h)}(hAdaptive Sync Operation Modeh]hAdaptive Sync Operation Mode}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhKvhjKubah}(h]h ]h"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]uh1j{ hjKhKvhjIubj| )}(h#``coasting_vtotal`` Coasting vtotalh](j )}(h``coasting_vtotal``h]j )}(hjKh]hcoasting_vtotal}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKvhjKubj )}(hhh]h)}(hCoasting vtotalh]hCoasting vtotal}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKwhj Lubah}(h]h ]h"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]uh1j{ hj LhKvhjIubeh}(h]h ]h"]h$]h&]uh1jv hjIubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubh)}(h**Description**h]j3 )}(hj8Lh]h Description}(hj:LhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6Lubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKzhj9hhubh)}(hThis structure represents a DP AS SDP of drm It is based on DP 2.1 spec [Table 2-126: Adaptive-Sync SDP Header Bytes] and [Table 2-127: Adaptive-Sync SDP Payload for DB0 through DB8]h]hThis structure represents a DP AS SDP of drm It is based on DP 2.1 spec [Table 2-126: Adaptive-Sync SDP Header Bytes] and [Table 2-127: Adaptive-Sync SDP Payload for DB0 through DB8]}(hjNLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKhhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_dsc_sink_supports_format (C function)!c.drm_dp_dsc_sink_supports_formathNtauh1j hj9hhhNhNubj )}(hhh](j )}(hdbool drm_dp_dsc_sink_supports_format (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 output_format)h]j )}(hcbool drm_dp_dsc_sink_supports_format(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 output_format)h](j)}(hjIh]hbool}(hjvLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrLhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrLhhhjLhKubj )}(hdrm_dp_dsc_sink_supports_formath]j )}(hdrm_dp_dsc_sink_supports_formath]hdrm_dp_dsc_sink_supports_format}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ](j j eh"]h$]h&]j j uh1j hjrLhhhjLhKubj)}(h?(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 output_format)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hu8h]hu8}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLmodnameN classnameNj j )}j ]j%)}jjLsb!c.drm_dp_dsc_sink_supports_formatasbuh1hhjLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(hdsc_dpcdh]hdsc_dpcd}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj9)}(h[h]h[}(hj MhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]jL!c.drm_dp_dsc_sink_supports_formatasbuh1hhjLubj9)}(h]h]h]}(hj;MhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubj)}(hu8 output_formath](h)}(hhh]j )}(hu8h]hu8}(hjWMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYMmodnameN classnameNj j )}j ]jL!c.drm_dp_dsc_sink_supports_formatasbuh1hhjPMubj )}(h h]h }(hjuMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPMubj )}(h output_formath]h output_format}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjLubeh}(h]h ]h"]h$]h&]j j uh1jhjrLhhhjLhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnLhhhjLhKubah}(h]jiLah ](j j eh"]h$]h&]j j )j huh1j hjLhKhjkLhhubj )}(hhh]h)}(h3check if sink supports DSC with given output formath]h3check if sink supports DSC with given output format}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKhjMhhubah}(h]h ]h"]h$]h&]uh1j hjkLhhhjLhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jMj$ jMj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC-capability DPCDs of the sink ``u8 output_format`` output_format which is to be checked **Description** Returns true if the sink supports DSC with the given output_format, false otherwise.h](h)}(h**Parameters**h]j3 )}(hjMh]h Parameters}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKhjMubjw )}(hhh](j| )}(hQ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC-capability DPCDs of the sink h](j )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]j )}(hjMh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKhjMubj )}(hhh]h)}(h DSC-capability DPCDs of the sinkh]h DSC-capability DPCDs of the sink}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKhjNubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjNhKhjMubj| )}(h:``u8 output_format`` output_format which is to be checked h](j )}(h``u8 output_format``h]j )}(hj'Nh]hu8 output_format}(hj)NhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%Nubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhKhj!Nubj )}(hhh]h)}(h$output_format which is to be checkedh]h$output_format which is to be checked}(hj@NhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhj^Qubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_aux_msg (C struct)c.drm_dp_aux_msghNtauh1j hj9hhhNhNubj )}(hhh](j )}(hdrm_dp_aux_msgh]j )}(hstruct drm_dp_aux_msgh](j )}(hj h]hstruct}(hjJRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFRhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMCubj )}(h h]h }(hjXRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFRhhhjWRhMCubj )}(hdrm_dp_aux_msgh]j )}(hjDRh]hdrm_dp_aux_msg}(hjjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfRubah}(h]h ](j j eh"]h$]h&]j j uh1j hjFRhhhjWRhMCubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjBRhhhjWRhMCubah}(h]j=Rah ](j j eh"]h$]h&]j j )j huh1j hjWRhMChj?Rhhubj )}(hhh]h)}(h#DisplayPort AUX channel transactionh]h#DisplayPort AUX channel transaction}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMJhjRhhubah}(h]h ]h"]h$]h&]uh1j hj?RhhhjWRhMCubeh}(h]h ](j structeh"]h$]h&]j" j j# jRj$ jRj% j& j' uh1j hhhj9hNhNubj) )}(hX**Definition**:: struct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; }; **Members** ``address`` address of the (first) register to access ``request`` contains the type of transaction (see DP_AUX_* macros) ``reply`` upon completion, contains the reply type of the transaction ``buffer`` pointer to a transmission or reception buffer ``size`` size of **buffer**h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubh:}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMNhjRubjN )}(hustruct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; };h]hustruct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; };}hjRsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMPhjRubh)}(h **Members**h]j3 )}(hjRh]hMembers}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMXhjRubjw )}(hhh](j| )}(h6``address`` address of the (first) register to access h](j )}(h ``address``h]j )}(hjRh]haddress}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMLhjRubj )}(hhh]h)}(h)address of the (first) register to accessh]h)address of the (first) register to access}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMLhjSubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjShMLhjRubj| )}(hC``request`` contains the type of transaction (see DP_AUX_* macros) h](j )}(h ``request``h]j )}(hj2Sh]hrequest}(hj4ShhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0Subah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMMhj,Subj )}(hhh]h)}(h6contains the type of transaction (see DP_AUX_* macros)h]h6contains the type of transaction (see DP_AUX_* macros)}(hjKShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGShMMhjHSubah}(h]h ]h"]h$]h&]uh1j hj,Subeh}(h]h ]h"]h$]h&]uh1j{ hjGShMMhjRubj| )}(hF``reply`` upon completion, contains the reply type of the transaction h](j )}(h ``reply``h]j )}(hjkSh]hreply}(hjmShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiSubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMNhjeSubj )}(hhh]h)}(h;upon completion, contains the reply type of the transactionh]h;upon completion, contains the reply type of the transaction}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMNhjSubah}(h]h ]h"]h$]h&]uh1j hjeSubeh}(h]h ]h"]h$]h&]uh1j{ hjShMNhjRubj| )}(h9``buffer`` pointer to a transmission or reception buffer h](j )}(h ``buffer``h]j )}(hjSh]hbuffer}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMOhjSubj )}(hhh]h)}(h-pointer to a transmission or reception bufferh]h-pointer to a transmission or reception buffer}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMOhjSubah}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjShMOhjRubj| )}(h``size`` size of **buffer**h](j )}(h``size``h]j )}(hjSh]hsize}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMOhjSubj )}(hhh]h)}(hsize of **buffer**h](hsize of }(hjShhhNhNubj3 )}(h **buffer**h]hbuffer}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjSubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMPhjSubah}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjShMOhjRubeh}(h]h ]h"]h$]h&]uh1jv hjRubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_aux_cec (C struct)c.drm_dp_aux_cechNtauh1j hj9hhhNhNubj )}(hhh](j )}(hdrm_dp_aux_cech]j )}(hstruct drm_dp_aux_cech](j )}(hj h]hstruct}(hjEThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAThhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMVubj )}(h h]h }(hjSThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAThhhjRThMVubj )}(hdrm_dp_aux_cech]j )}(hj?Th]hdrm_dp_aux_cec}(hjeThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaTubah}(h]h ](j j eh"]h$]h&]j j uh1j hjAThhhjRThMVubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj=ThhhjRThMVubah}(h]j8Tah ](j j eh"]h$]h&]j j )j huh1j hjRThMVhj:Thhubj )}(hhh]h)}(h"DisplayPort CEC-Tunneling-over-AUXh]h"DisplayPort CEC-Tunneling-over-AUX}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM^hjThhubah}(h]h ]h"]h$]h&]uh1j hj:ThhhjRThMVubeh}(h]h ](j structeh"]h$]h&]j" j j# jTj$ jTj% j& j' uh1j hhhj9hNhNubj) )}(hX**Definition**:: struct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; }; **Members** ``lock`` mutex protecting this struct ``adap`` the CEC adapter for CEC-Tunneling-over-AUX support. ``connector`` the connector this CEC adapter is associated with ``unregister_work`` unregister the CEC adapterh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjTubh:}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMbhjTubjN )}(hstruct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; };h]hstruct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; };}hjTsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMdhjTubh)}(h **Members**h]j3 )}(hjTh]hMembers}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjTubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMkhjTubjw )}(hhh](j| )}(h&``lock`` mutex protecting this struct h](j )}(h``lock``h]j )}(hjTh]hlock}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM`hjTubj )}(hhh]h)}(hmutex protecting this structh]hmutex protecting this struct}(hj UhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj UhM`hj Uubah}(h]h ]h"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]uh1j{ hj UhM`hjTubj| )}(h=``adap`` the CEC adapter for CEC-Tunneling-over-AUX support. h](j )}(h``adap``h]j )}(hj-Uh]hadap}(hj/UhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+Uubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMahj'Uubj )}(hhh]h)}(h3the CEC adapter for CEC-Tunneling-over-AUX support.h]h3the CEC adapter for CEC-Tunneling-over-AUX support.}(hjFUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBUhMahjCUubah}(h]h ]h"]h$]h&]uh1j hj'Uubeh}(h]h ]h"]h$]h&]uh1j{ hjBUhMahjTubj| )}(h@``connector`` the connector this CEC adapter is associated with h](j )}(h ``connector``h]j )}(hjfUh]h connector}(hjhUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdUubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMbhj`Uubj )}(hhh]h)}(h1the connector this CEC adapter is associated withh]h1the connector this CEC adapter is associated with}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{UhMbhj|Uubah}(h]h ]h"]h$]h&]uh1j hj`Uubeh}(h]h ]h"]h$]h&]uh1j{ hj{UhMbhjTubj| )}(h.``unregister_work`` unregister the CEC adapterh](j )}(h``unregister_work``h]j )}(hjUh]hunregister_work}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMbhjUubj )}(hhh]h)}(hunregister the CEC adapterh]hunregister the CEC adapter}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMchjUubah}(h]h ]h"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]uh1j{ hjUhMbhjTubeh}(h]h ]h"]h$]h&]uh1jv hjTubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_aux (C struct) c.drm_dp_auxhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h drm_dp_auxh]j )}(hstruct drm_dp_auxh](j )}(hj h]hstruct}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMiubj )}(h h]h }(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUhhhjVhMiubj )}(h drm_dp_auxh]j )}(hjUh]h drm_dp_aux}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ](j j eh"]h$]h&]j j uh1j hjUhhhjVhMiubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjUhhhjVhMiubah}(h]jUah ](j j eh"]h$]h&]j j )j huh1j hjVhMihjUhhubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj;VhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMlhj8Vhhubah}(h]h ]h"]h$]h&]uh1j hjUhhhjVhMiubeh}(h]h ](j structeh"]h$]h&]j" j j# jSVj$ jSVj% j& j' uh1j hhhj9hNhNubj) )}(hXD**Definition**:: struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; }; **Members** ``name`` user-visible name of this AUX channel and the I2C-over-AUX adapter. It's also used to specify the name of the I2C adapter. If set to ``NULL``, dev_name() of **dev** will be used. ``ddc`` I2C adapter that can be used for I2C-over-AUX communication ``dev`` pointer to struct device that is the parent for this AUX channel. ``drm_dev`` pointer to the :c:type:`drm_device` that owns this AUX channel. Beware, this may be ``NULL`` before drm_dp_aux_register() has been called. It should be set to the :c:type:`drm_device` that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it's perfectly fine to set this field later so long as it's assigned before calling drm_dp_aux_register(). ``crtc`` backpointer to the crtc that is currently using this AUX channel ``hw_mutex`` internal mutex used for locking transfers. Note that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access. ``crc_work`` worker that captures CRCs for each frame ``crc_count`` counter of captured frame CRCs ``transfer`` transfers a message representing a single AUX transaction. This is a hardware-specific implementation of how transactions are executed that the drivers must provide. A pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure. Helpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure. The **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case. Also note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected: - If the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. - If we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. ``wait_hpd_asserted`` wait for HPD to be asserted This is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly. If a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated. This function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions. This function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log. The semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep. NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted. ``i2c_nack_count`` Counts I2C NACKs, used for DP validation. ``i2c_defer_count`` Counts I2C DEFERs, used for DP validation. ``cec`` struct containing fields used for CEC-Tunneling-over-AUX. ``is_remote`` Is this AUX CH actually using sideband messaging. ``powered_down`` If true then the remote endpoint is powered down. ``no_zero_sized`` If the hw can't use zero sized transfers (NVIDIA) ``dpcd_probe_disabled`` If probing before a DPCD access is disabled.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj_VhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[Vubh:}(hj[VhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMphjWVubjN )}(hX>struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; };h]hX>struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; };}hjxVsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMrhjWVubh)}(h **Members**h]j3 )}(hjVh]hMembers}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjWVubjw )}(hhh](j| )}(h``name`` user-visible name of this AUX channel and the I2C-over-AUX adapter. It's also used to specify the name of the I2C adapter. If set to ``NULL``, dev_name() of **dev** will be used. h](j )}(h``name``h]j )}(hjVh]hname}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjVubj )}(hhh](h)}(hCuser-visible name of this AUX channel and the I2C-over-AUX adapter.h]hCuser-visible name of this AUX channel and the I2C-over-AUX adapter.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM{hjVubh)}(hnIt's also used to specify the name of the I2C adapter. If set to ``NULL``, dev_name() of **dev** will be used.h](hCIt’s also used to specify the name of the I2C adapter. If set to }(hjVhhhNhNubj )}(h``NULL``h]hNULL}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubh, dev_name() of }(hjVhhhNhNubj3 )}(h**dev**h]hdev}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubh will be used.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM~hjVubeh}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjVhMhjVubj| )}(hD``ddc`` I2C adapter that can be used for I2C-over-AUX communication h](j )}(h``ddc``h]j )}(hjWh]hddc}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjWubj )}(hhh]h)}(h;I2C adapter that can be used for I2C-over-AUX communicationh]h;I2C adapter that can be used for I2C-over-AUX communication}(hj.WhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj+Wubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hj*WhMhjVubj| )}(hJ``dev`` pointer to struct device that is the parent for this AUX channel. h](j )}(h``dev``h]j )}(hjOWh]hdev}(hjQWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMWubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjIWubj )}(hhh]h)}(hApointer to struct device that is the parent for this AUX channel.h]hApointer to struct device that is the parent for this AUX channel.}(hjhWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjeWubah}(h]h ]h"]h$]h&]uh1j hjIWubeh}(h]h ]h"]h$]h&]uh1j{ hjdWhMhjVubj| )}(hX``drm_dev`` pointer to the :c:type:`drm_device` that owns this AUX channel. Beware, this may be ``NULL`` before drm_dp_aux_register() has been called. It should be set to the :c:type:`drm_device` that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it's perfectly fine to set this field later so long as it's assigned before calling drm_dp_aux_register(). h](j )}(h ``drm_dev``h]j )}(hjWh]hdrm_dev}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjWubj )}(hhh](h)}(hpointer to the :c:type:`drm_device` that owns this AUX channel. Beware, this may be ``NULL`` before drm_dp_aux_register() has been called.h](hpointer to the }(hjWhhhNhNubh)}(h:c:type:`drm_device`h]j )}(hjWh]h drm_device}(hjWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjWubh1 that owns this AUX channel. Beware, this may be }(hjWhhhNhNubj )}(h``NULL``h]hNULL}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubh. before drm_dp_aux_register() has been called.}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjWhMhjWubh)}(hX It should be set to the :c:type:`drm_device` that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it's perfectly fine to set this field later so long as it's assigned before calling drm_dp_aux_register().h](hIt should be set to the }(hjWhhhNhNubh)}(h:c:type:`drm_device`h]j )}(hjWh]h drm_device}(hjWhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjWubh that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it’s perfectly fine to set this field later so long as it’s assigned before calling drm_dp_aux_register().}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj XhMhjWubeh}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjWhMhjVubj| )}(hJ``crtc`` backpointer to the crtc that is currently using this AUX channel h](j )}(h``crtc``h]j )}(hj*Xh]hcrtc}(hj,XhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(Xubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj$Xubj )}(hhh]h)}(h@backpointer to the crtc that is currently using this AUX channelh]h@backpointer to the crtc that is currently using this AUX channel}(hjCXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj@Xubah}(h]h ]h"]h$]h&]uh1j hj$Xubeh}(h]h ]h"]h$]h&]uh1j{ hj?XhMhjVubj| )}(h``hw_mutex`` internal mutex used for locking transfers. Note that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access. h](j )}(h ``hw_mutex``h]j )}(hjdXh]hhw_mutex}(hjfXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbXubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj^Xubj )}(hhh](h)}(h*internal mutex used for locking transfers.h]h*internal mutex used for locking transfers.}(hj}XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjzXubh)}(hNote that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access.h]hNote that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjzXubeh}(h]h ]h"]h$]h&]uh1j hj^Xubeh}(h]h ]h"]h$]h&]uh1j{ hjyXhMhjVubj| )}(h6``crc_work`` worker that captures CRCs for each frame h](j )}(h ``crc_work``h]j )}(hjXh]hcrc_work}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjXubj )}(hhh]h)}(h(worker that captures CRCs for each frameh]h(worker that captures CRCs for each frame}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMhjXubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjXhMhjVubj| )}(h-``crc_count`` counter of captured frame CRCs h](j )}(h ``crc_count``h]j )}(hjXh]h crc_count}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjXubj )}(hhh]h)}(hcounter of captured frame CRCsh]hcounter of captured frame CRCs}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMhjXubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjXhMhjVubj| )}(hXJ``transfer`` transfers a message representing a single AUX transaction. This is a hardware-specific implementation of how transactions are executed that the drivers must provide. A pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure. Helpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure. The **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case. Also note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected: - If the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. - If we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. h](j )}(h ``transfer``h]j )}(hjYh]htransfer}(hj!YhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjYubj )}(hhh](h)}(h:transfers a message representing a single AUX transaction.h]h:transfers a message representing a single AUX transaction.}(hj8YhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj5Yubh)}(hjThis is a hardware-specific implementation of how transactions are executed that the drivers must provide.h]hjThis is a hardware-specific implementation of how transactions are executed that the drivers must provide.}(hjGYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj5Yubh)}(hA pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure.h](hA pointer to a }(hjVYhhhNhNubh)}(h:c:type:`drm_dp_aux_msg`h]j )}(hj`Yh]hdrm_dp_aux_msg}(hjbYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj^Yubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_aux_msguh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjVYubh structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure.}(hjVYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj}YhMhj5Yubh)}(hHelpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure.h](h?Helpers will propagate these errors, with the exception of the }(hjYhhhNhNubj )}(h ``-EBUSY``h]h-EBUSY}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubhR error, which causes a transaction to be retried. On a short, helpers will return }(hjYhhhNhNubj )}(h ``-EPROTO``h]h-EPROTO}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubh) to make it simpler to check for failure.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj5Yubh)}(hThe **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case.h](hThe }(hjYhhhNhNubj3 )}(h**transfer\(\)**h]h transfer()}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubh2 function must only modify the reply field of the }(hjYhhhNhNubh)}(h:c:type:`drm_dp_aux_msg`h]j )}(hjYh]hdrm_dp_aux_msg}(hjYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_aux_msguh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjYubhD structure. The retry logic and i2c helpers assume this is the case.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMhj5Yubh)}(hAlso note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected:h](h?Also note that this callback can be called no matter the state }(hjYhhhNhNubj3 )}(h**dev**h]hdev}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubhF is in and also no matter what state the panel is in. It’s expected:}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj5Yubh)}(hhh](h)}(hkIf the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. h]h)}(hjIf the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer.h](hIf the }(hj'ZhhhNhNubj3 )}(h**dev**h]hdev}(hj/ZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj'Zubh\ providing the AUX bus is currently unpowered then it will power itself up for the transfer.}(hj'ZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj#Zubah}(h]h ]h"]h$]h&]uh1hhj Zubh)}(hXIf we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. h]h)}(hXIf we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel.h]hX&If we’re on eDP (using a drm_panel) and the panel is not in a state where it can respond (it’s not powered or it’s in a low power state) then this function may return an error, but not crash. It’s up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel.}(hjRZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjNZubah}(h]h ]h"]h$]h&]uh1hhj Zubeh}(h]h ]h"]h$]h&]jNj<uh1hhjGZhMhj5Yubeh}(h]h ]h"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]uh1j{ hj4YhMhjVubj| )}(hXl``wait_hpd_asserted`` wait for HPD to be asserted This is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly. If a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated. This function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions. This function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log. The semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep. NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted. h](j )}(h``wait_hpd_asserted``h]j )}(hjZh]hwait_hpd_asserted}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}Zubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjyZubj )}(hhh](h)}(hwait for HPD to be assertedh]hwait for HPD to be asserted}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjZubh)}(hXThis is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly.h]hXThis is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we’re not using the AUX controller’s HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjZubh)}(hIf a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated.h]hIf a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller’s built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjZubh)}(hXThis function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions.h](hKThis function will efficiently wait for the HPD signal to be asserted. The }(hjZhhhNhNubhtitle_reference)}(h `wait_us`h]hwait_us}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jZhjZubhe parameter that is passed in says that we know that the HPD signal is expected to be asserted within }(hjZhhhNhNubjZ)}(h `wait_us`h]hwait_us}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jZhjZubh8 microseconds. This function could wait for longer than }(hjZhhhNhNubjZ)}(h `wait_us`h]hwait_us}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jZhjZubh if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions.}(hjZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjZubh)}(hThis function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log.h]hThis function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn’t asserted. This function should not print timeout errors to the log.}(hj [hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjZubh)}(hThe semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep.h](heThe semantics of this function are designed to match the readx_poll_timeout() function. That means a }(hj[hhhNhNubjZ)}(h `wait_us`h]hwait_us}(hj#[hhhNhNubah}(h]h ]h"]h$]h&]uh1jZhj[ubhP of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjZubh)}(hX@NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted.h]hXBNOTE: this function specifically reports the state of the HPD pin that’s associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted.}(hj<[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjZubeh}(h]h ]h"]h$]h&]uh1j hjyZubeh}(h]h ]h"]h$]h&]uh1j{ hjZhMhjVubj| )}(h=``i2c_nack_count`` Counts I2C NACKs, used for DP validation. h](j )}(h``i2c_nack_count``h]j )}(hj][h]hi2c_nack_count}(hj_[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[[ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjW[ubj )}(hhh]h)}(h)Counts I2C NACKs, used for DP validation.h]h)Counts I2C NACKs, used for DP validation.}(hjv[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr[hMhjs[ubah}(h]h ]h"]h$]h&]uh1j hjW[ubeh}(h]h ]h"]h$]h&]uh1j{ hjr[hMhjVubj| )}(h?``i2c_defer_count`` Counts I2C DEFERs, used for DP validation. h](j )}(h``i2c_defer_count``h]j )}(hj[h]hi2c_defer_count}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM hj[ubj )}(hhh]h)}(h*Counts I2C DEFERs, used for DP validation.h]h*Counts I2C DEFERs, used for DP validation.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hM hj[ubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hj[hM hjVubj| )}(hB``cec`` struct containing fields used for CEC-Tunneling-over-AUX. h](j )}(h``cec``h]j )}(hj[h]hcec}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj[ubj )}(hhh]h)}(h9struct containing fields used for CEC-Tunneling-over-AUX.h]h9struct containing fields used for CEC-Tunneling-over-AUX.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hj[hMhjVubj| )}(h@``is_remote`` Is this AUX CH actually using sideband messaging. h](j )}(h ``is_remote``h]j )}(hj\h]h is_remote}(hj \hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj\ubj )}(hhh]h)}(h1Is this AUX CH actually using sideband messaging.h]h1Is this AUX CH actually using sideband messaging.}(hj!\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj\ubah}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hj\hMhjVubj| )}(hC``powered_down`` If true then the remote endpoint is powered down. h](j )}(h``powered_down``h]j )}(hjA\h]h powered_down}(hjC\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?\ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj;\ubj )}(hhh]h)}(h1If true then the remote endpoint is powered down.h]h1If true then the remote endpoint is powered down.}(hjZ\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjV\hMhjW\ubah}(h]h ]h"]h$]h&]uh1j hj;\ubeh}(h]h ]h"]h$]h&]uh1j{ hjV\hMhjVubj| )}(hD``no_zero_sized`` If the hw can't use zero sized transfers (NVIDIA) h](j )}(h``no_zero_sized``h]j )}(hjz\h]h no_zero_sized}(hj|\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjx\ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjt\ubj )}(hhh]h)}(h1If the hw can't use zero sized transfers (NVIDIA)h]h3If the hw can’t use zero sized transfers (NVIDIA)}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj\ubah}(h]h ]h"]h$]h&]uh1j hjt\ubeh}(h]h ]h"]h$]h&]uh1j{ hj\hMhjVubj| )}(hD``dpcd_probe_disabled`` If probing before a DPCD access is disabled.h](j )}(h``dpcd_probe_disabled``h]j )}(hj\h]hdpcd_probe_disabled}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM"hj\ubj )}(hhh]h)}(h,If probing before a DPCD access is disabled.h]h,If probing before a DPCD access is disabled.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM#hj\ubah}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hj\hM"hjVubeh}(h]h ]h"]h$]h&]uh1jv hjWVubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubh)}(h**Description**h]j3 )}(hj\h]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM&hj9hhubh)}(hXRAn AUX channel can also be used to transport I2C messages to a sink. A typical application of that is to access an EDID that's present in the sink device. The **transfer\(\)** function can also be used to execute such transactions. The drm_dp_aux_register() function registers an I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers should call drm_dp_aux_unregister() to remove the I2C adapter. The I2C adapter uses long transfers by default; if a partial response is received, the adapter will drop down to the size given by the partial response for this transaction only.h](hAn AUX channel can also be used to transport I2C messages to a sink. A typical application of that is to access an EDID that’s present in the sink device. The }(hj ]hhhNhNubj3 )}(h**transfer\(\)**h]h transfer()}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ]ubhX function can also be used to execute such transactions. The drm_dp_aux_register() function registers an I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers should call drm_dp_aux_unregister() to remove the I2C adapter. The I2C adapter uses long transfers by default; if a partial response is received, the adapter will drop down to the size given by the partial response for this transaction only.}(hj ]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMmhj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_dpcd_readb (C function)c.drm_dp_dpcd_readbhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hSssize_t drm_dp_dpcd_readb (struct drm_dp_aux *aux, unsigned int offset, u8 *valuep)h]j )}(hRssize_t drm_dp_dpcd_readb(struct drm_dp_aux *aux, unsigned int offset, u8 *valuep)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjI]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjF]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjK]modnameN classnameNj j )}j ]j%)}jdrm_dp_dpcd_readbsbc.drm_dp_dpcd_readbasbuh1hhjB]hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM0ubj )}(h h]h }(hjk]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB]hhhjj]hM0ubj )}(hdrm_dp_dpcd_readbh]j )}(hjg]h]hdrm_dp_dpcd_readb}(hj}]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjB]hhhjj]hM0ubj)}(h9(struct drm_dp_aux *aux, unsigned int offset, u8 *valuep)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]je]c.drm_dp_dpcd_readbasbuh1hhj]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj9)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj]ubj )}(hauxh]haux}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj)}(hinth]hint}(hj$^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj )}(h h]h }(hj2^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(hoffseth]hoffset}(hj@^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubj)}(h u8 *valueph](h)}(hhh]j )}(hu8h]hu8}(hj\^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^^modnameN classnameNj j )}j ]je]c.drm_dp_dpcd_readbasbuh1hhjU^ubj )}(h h]h }(hjz^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjU^ubj9)}(hjOh]h*}(hj^hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjU^ubj )}(hvalueph]hvaluep}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjU^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj]ubeh}(h]h ]h"]h$]h&]j j uh1jhjB]hhhjj]hM0ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj>]hhhjj]hM0ubah}(h]j9]ah ](j j eh"]h$]h&]j j )j huh1j hjj]hM0hj;]hhubj )}(hhh]h)}(h read a single byte from the DPCDh]h read a single byte from the DPCD}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM0hj^hhubah}(h]h ]h"]h$]h&]uh1j hj;]hhhjj]hM0ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j^j$ j^j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned int offset`` address of the register to read ``u8 *valuep`` location where the value of the register will be stored **Description** Returns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.h](h)}(h**Parameters**h]j3 )}(hj^h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM4hj^ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj_h]hstruct drm_dp_aux *aux}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM1hj^ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hM1hj_ubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj_hM1hj^ubj| )}(h8``unsigned int offset`` address of the register to read h](j )}(h``unsigned int offset``h]j )}(hj9_h]hunsigned int offset}(hj;_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7_ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM2hj3_ubj )}(hhh]h)}(haddress of the register to readh]haddress of the register to read}(hjR_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjN_hM2hjO_ubah}(h]h ]h"]h$]h&]uh1j hj3_ubeh}(h]h ]h"]h$]h&]uh1j{ hjN_hM2hj^ubj| )}(hG``u8 *valuep`` location where the value of the register will be stored h](j )}(h``u8 *valuep``h]j )}(hjr_h]h u8 *valuep}(hjt_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjp_ubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM3hjl_ubj )}(hhh]h)}(h7location where the value of the register will be storedh]h7location where the value of the register will be stored}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hM3hj_ubah}(h]h ]h"]h$]h&]uh1j hjl_ubeh}(h]h ]h"]h$]h&]uh1j{ hj_hM3hj^ubeh}(h]h ]h"]h$]h&]uh1jv hj^ubh)}(h**Description**h]j3 )}(hj_h]h Description}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj_ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM5hj^ubh)}(hReturns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.h]hReturns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM4hj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_dp_dpcd_read_data (C function)c.drm_dp_dpcd_read_datahNtauh1j hj9hhhNhNubj )}(hhh](j )}(hbint drm_dp_dpcd_read_data (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(haint drm_dp_dpcd_read_data(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hinth]hint}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM@ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhj`hM@ubj )}(hdrm_dp_dpcd_read_datah]j )}(hdrm_dp_dpcd_read_datah]hdrm_dp_dpcd_read_data}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_hhhj`hM@ubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj/`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+`ubj )}(h h]h }(hj<`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+`ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjM`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJ`ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjO`modnameN classnameNj j )}j ]j%)}jj`sbc.drm_dp_dpcd_read_dataasbuh1hhj+`ubj )}(h h]h }(hjm`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+`ubj9)}(hjOh]h*}(hj{`hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj+`ubj )}(hauxh]haux}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'`ubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj)}(hinth]hint}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(hoffseth]hoffset}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'`ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj9)}(hjOh]h*}(hjahhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj`ubj )}(hbufferh]hbuffer}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'`ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj7ahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4aubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9amodnameN classnameNj j )}j ]ji`c.drm_dp_dpcd_read_dataasbuh1hhj0aubj )}(h h]h }(hjUahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0aubj )}(hsizeh]hsize}(hjcahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0aubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'`ubeh}(h]h ]h"]h$]h&]j j uh1jhj_hhhj`hM@ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj_hhhj`hM@ubah}(h]j_ah ](j j eh"]h$]h&]j j )j huh1j hj`hM@hj_hhubj )}(hhh]h)}(h$read a series of bytes from the DPCDh]h$read a series of bytes from the DPCD}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM@hjahhubah}(h]h ]h"]h$]h&]uh1j hj_hhhj`hM@ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jaj$ jaj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to read ``void *buffer`` buffer to store the register values ``size_t size`` number of bytes in **buffer** **Description** Returns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h](h)}(h**Parameters**h]j3 )}(hjah]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMDhjaubjw )}(hhh](j| )}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjah]hstruct drm_dp_aux *aux}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMAhjaubj )}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMAhjaubah}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hjahMAhjaubj| )}(h@``unsigned int offset`` address of the (first) register to read h](j )}(h``unsigned int offset``h]j )}(hjbh]hunsigned int offset}(hj bhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMBhjbubj )}(hhh]h)}(h'address of the (first) register to readh]h'address of the (first) register to read}(hj bhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMBhjbubah}(h]h ]h"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]uh1j{ hjbhMBhjaubj| )}(h5``void *buffer`` buffer to store the register values h](j )}(h``void *buffer``h]j )}(hj@bh]h void *buffer}(hjBbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>bubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMChj:bubj )}(hhh]h)}(h#buffer to store the register valuesh]h#buffer to store the register values}(hjYbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUbhMChjVbubah}(h]h ]h"]h$]h&]uh1j hj:bubeh}(h]h ]h"]h$]h&]uh1j{ hjUbhMChjaubj| )}(h.``size_t size`` number of bytes in **buffer** h](j )}(h``size_t size``h]j )}(hjybh]h size_t size}(hj{bhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwbubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMDhjsbubj )}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjbhhhNhNubj3 )}(h **buffer**h]hbuffer}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbubeh}(h]h ]h"]h$]h&]uh1hhjbhMDhjbubah}(h]h ]h"]h$]h&]uh1j hjsbubeh}(h]h ]h"]h$]h&]uh1j{ hjbhMDhjaubeh}(h]h ]h"]h$]h&]uh1jv hjaubh)}(h**Description**h]j3 )}(hjbh]h Description}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMFhjaubh)}(hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMEhjaubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_dpcd_write_data (C function)c.drm_dp_dpcd_write_datahNtauh1j hj9hhhNhNubj )}(hhh](j )}(hcint drm_dp_dpcd_write_data (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(hbint drm_dp_dpcd_write_data(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hinth]hint}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMnubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjchhhjchMnubj )}(hdrm_dp_dpcd_write_datah]j )}(hdrm_dp_dpcd_write_datah]hdrm_dp_dpcd_write_data}(hj(chhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$cubah}(h]h ](j j eh"]h$]h&]j j uh1j hjchhhjchMnubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjDchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@cubj )}(h h]h }(hjQchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@cubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjbchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_cubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdcmodnameN classnameNj j )}j ]j%)}jj*csbc.drm_dp_dpcd_write_dataasbuh1hhj@cubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@cubj9)}(hjOh]h*}(hjchhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@cubj )}(hauxh]haux}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@cubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubjN )}(hKstruct drm_dp_desc { struct drm_dp_dpcd_ident ident; u32 quirks; };h]hKstruct drm_dp_desc { struct drm_dp_dpcd_ident ident; u32 quirks; };}hj_nsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj>nubh)}(h **Members**h]j3 )}(hjpnh]hMembers}(hjrnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnnubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM$hj>nubjw )}(hhh](j| )}(hM``ident`` DP device identification from DPCD 0x400 (sink) or 0x500 (branch). h](j )}(h ``ident``h]j )}(hjnh]hident}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjnubj )}(hhh]h)}(hBDP device identification from DPCD 0x400 (sink) or 0x500 (branch).h]hBDP device identification from DPCD 0x400 (sink) or 0x500 (branch).}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjnubah}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1j{ hjnhMhjnubj| )}(hB``quirks`` Quirks; use drm_dp_has_quirk() to query for the quirks.h](j )}(h ``quirks``h]j )}(hjnh]hquirks}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjnubj )}(hhh]h)}(h7Quirks; use drm_dp_has_quirk() to query for the quirks.h]h7Quirks; use drm_dp_has_quirk() to query for the quirks.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjnubah}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1j{ hjnhMhjnubeh}(h]h ]h"]h$]h&]uh1jv hj>nubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_quirk (C enum)c.drm_dp_quirkhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h drm_dp_quirkh]j )}(henum drm_dp_quirkh](j )}(hj7h]henum}(hj"ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM"ubj )}(h h]h }(hj0ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhj/ohM"ubj )}(h drm_dp_quirkh]j )}(hjoh]h drm_dp_quirk}(hjBohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>oubah}(h]h ](j j eh"]h$]h&]j j uh1j hjohhhj/ohM"ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjohhhj/ohM"ubah}(h]joah ](j j eh"]h$]h&]j j )j huh1j hj/ohM"hjohhubj )}(hhh]h)}(h/Display Port sink/branch device specific quirksh]h/Display Port sink/branch device specific quirks}(hjdohhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM(hjaohhubah}(h]h ]h"]h$]h&]uh1j hjohhhj/ohM"ubeh}(h]h ](j enumeh"]h$]h&]j" j j# j|oj$ j|oj% j& j' uh1j hhhj9hNhNubj) )}(hX@**Constants** ``DP_DPCD_QUIRK_CONSTANT_N`` The device requires main link attributes Mvid and Nvid to be limited to 16 bits. So will give a constant value (0x8000) for compatability. ``DP_DPCD_QUIRK_NO_PSR`` The device does not support PSR even if reports that it supports or driver still need to implement proper handling for such device. ``DP_DPCD_QUIRK_NO_SINK_COUNT`` The device does not set SINK_COUNT to a non-zero value. The driver should ignore SINK_COUNT during detection. Note that drm_dp_read_sink_count_cap() automatically checks for this quirk. ``DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD`` The device supports MST DSC despite not supporting Virtual DPCD. The DSC caps can be read from the physical aux instead. ``DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS`` The device supports a link rate of 3.24 Gbps (multiplier 0xc) despite the DP_MAX_LINK_RATE register reporting a lower max multiplier. ``DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC`` The device applies HBLANK expansion for some modes, but this requires enabling DSC. ``DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT`` The device doesn't support DSC decompression at the maximum DSC pixel throughput and compressed bpp it indicates via its DPCD DSC capabilities. The compressed bpp must be limited above a device specific DSC pixel throughput.h](h)}(h **Constants**h]j3 )}(hjoh]h Constants}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjoubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM,hjoubjw )}(hhh](j| )}(h``DP_DPCD_QUIRK_CONSTANT_N`` The device requires main link attributes Mvid and Nvid to be limited to 16 bits. So will give a constant value (0x8000) for compatability. h](j )}(h``DP_DPCD_QUIRK_CONSTANT_N``h]j )}(hjoh]hDP_DPCD_QUIRK_CONSTANT_N}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM0hjoubj )}(hhh]h)}(hThe device requires main link attributes Mvid and Nvid to be limited to 16 bits. So will give a constant value (0x8000) for compatability.h]hThe device requires main link attributes Mvid and Nvid to be limited to 16 bits. So will give a constant value (0x8000) for compatability.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM/hjoubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjohM0hjoubj| )}(h``DP_DPCD_QUIRK_NO_PSR`` The device does not support PSR even if reports that it supports or driver still need to implement proper handling for such device. h](j )}(h``DP_DPCD_QUIRK_NO_PSR``h]j )}(hjoh]hDP_DPCD_QUIRK_NO_PSR}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM4hjoubj )}(hhh]h)}(hThe device does not support PSR even if reports that it supports or driver still need to implement proper handling for such device.h]hThe device does not support PSR even if reports that it supports or driver still need to implement proper handling for such device.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM3hjoubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjohM4hjoubj| )}(h``DP_DPCD_QUIRK_NO_SINK_COUNT`` The device does not set SINK_COUNT to a non-zero value. The driver should ignore SINK_COUNT during detection. Note that drm_dp_read_sink_count_cap() automatically checks for this quirk. h](j )}(h``DP_DPCD_QUIRK_NO_SINK_COUNT``h]j )}(hjph]hDP_DPCD_QUIRK_NO_SINK_COUNT}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM9hjpubj )}(hhh]h)}(hThe device does not set SINK_COUNT to a non-zero value. The driver should ignore SINK_COUNT during detection. Note that drm_dp_read_sink_count_cap() automatically checks for this quirk.h]hThe device does not set SINK_COUNT to a non-zero value. The driver should ignore SINK_COUNT during detection. Note that drm_dp_read_sink_count_cap() automatically checks for this quirk.}(hj2phhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM7hj/pubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hj.phM9hjoubj| )}(h``DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD`` The device supports MST DSC despite not supporting Virtual DPCD. The DSC caps can be read from the physical aux instead. h](j )}(h*``DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD``h]j )}(hjSph]h&DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD}(hjUphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQpubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM=hjMpubj )}(hhh]h)}(hxThe device supports MST DSC despite not supporting Virtual DPCD. The DSC caps can be read from the physical aux instead.h]hxThe device supports MST DSC despite not supporting Virtual DPCD. The DSC caps can be read from the physical aux instead.}(hjlphhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM<hjipubah}(h]h ]h"]h$]h&]uh1j hjMpubeh}(h]h ]h"]h$]h&]uh1j{ hjhphM=hjoubj| )}(h``DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS`` The device supports a link rate of 3.24 Gbps (multiplier 0xc) despite the DP_MAX_LINK_RATE register reporting a lower max multiplier. h](j )}(h0``DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS``h]j )}(hjph]h,DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMAhjpubj )}(hhh]h)}(hThe device supports a link rate of 3.24 Gbps (multiplier 0xc) despite the DP_MAX_LINK_RATE register reporting a lower max multiplier.h]hThe device supports a link rate of 3.24 Gbps (multiplier 0xc) despite the DP_MAX_LINK_RATE register reporting a lower max multiplier.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM@hjpubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjphMAhjoubj| )}(h``DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC`` The device applies HBLANK expansion for some modes, but this requires enabling DSC. h](j )}(h/``DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC``h]j )}(hjph]h+DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMEhjpubj )}(hhh]h)}(hSThe device applies HBLANK expansion for some modes, but this requires enabling DSC.h]hSThe device applies HBLANK expansion for some modes, but this requires enabling DSC.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMDhjpubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjphMEhjoubj| )}(hX ``DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT`` The device doesn't support DSC decompression at the maximum DSC pixel throughput and compressed bpp it indicates via its DPCD DSC capabilities. The compressed bpp must be limited above a device specific DSC pixel throughput.h](j )}(h*``DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT``h]j )}(hjqh]h&DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMJhjpubj )}(hhh]h)}(hThe device doesn't support DSC decompression at the maximum DSC pixel throughput and compressed bpp it indicates via its DPCD DSC capabilities. The compressed bpp must be limited above a device specific DSC pixel throughput.h]hThe device doesn’t support DSC decompression at the maximum DSC pixel throughput and compressed bpp it indicates via its DPCD DSC capabilities. The compressed bpp must be limited above a device specific DSC pixel throughput.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMHhjqubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMJhjoubeh}(h]h ]h"]h$]h&]uh1jv hjoubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubh)}(h**Description**h]j3 )}(hjDqh]h Description}(hjFqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjBqubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMMhj9hhubh)}(hDisplay Port sink and branch devices in the wild have a variety of bugs, try to collect them here. The quirks are shared, but it's up to the drivers to implement workarounds for them.h]hDisplay Port sink and branch devices in the wild have a variety of bugs, try to collect them here. The quirks are shared, but it’s up to the drivers to implement workarounds for them.}(hjZqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM)hj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_has_quirk (C function)c.drm_dp_has_quirkhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hObool drm_dp_has_quirk (const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)h]j )}(hNbool drm_dp_has_quirk(const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)h](j)}(hjIh]hbool}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~qhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMfubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~qhhhjqhMfubj )}(hdrm_dp_has_quirkh]j )}(hdrm_dp_has_quirkh]hdrm_dp_has_quirk}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hj~qhhhjqhMfubj)}(h9(const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)h](j)}(hconst struct drm_dp_desc *desch](j )}(hjch]hconst}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubh)}(hhh]j )}(h drm_dp_desch]h drm_dp_desc}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjqmodnameN classnameNj j )}j ]j%)}jjqsbc.drm_dp_has_quirkasbuh1hhjqubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubj9)}(hjOh]h*}(hj%rhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjqubj )}(hdesch]hdesc}(hj2rhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubj)}(henum drm_dp_quirk quirkh](j )}(hj7h]henum}(hjKrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGrubj )}(h h]h }(hjXrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGrubh)}(hhh]j )}(h drm_dp_quirkh]h drm_dp_quirk}(hjirhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkrmodnameN classnameNj j )}j ]jrc.drm_dp_has_quirkasbuh1hhjGrubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGrubj )}(hquirkh]hquirk}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjqubeh}(h]h ]h"]h$]h&]j j uh1jhj~qhhhjqhMfubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjzqhhhjqhMfubah}(h]juqah ](j j eh"]h$]h&]j j )j huh1j hjqhMfhjwqhhubj )}(hhh]h)}(h(does the DP device have a specific quirkh]h(does the DP device have a specific quirk}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMfhjrhhubah}(h]h ]h"]h$]h&]uh1j hjwqhhhjqhMfubeh}(h]h ](j functioneh"]h$]h&]j" j j# jrj$ jrj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const struct drm_dp_desc *desc`` Device descriptor filled by drm_dp_read_desc() ``enum drm_dp_quirk quirk`` Quirk to query for **Description** Return true if DP device identified by **desc** has **quirk**.h](h)}(h**Parameters**h]j3 )}(hjrh]h Parameters}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMjhjrubjw )}(hhh](j| )}(hR``const struct drm_dp_desc *desc`` Device descriptor filled by drm_dp_read_desc() h](j )}(h"``const struct drm_dp_desc *desc``h]j )}(hjsh]hconst struct drm_dp_desc *desc}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMghjrubj )}(hhh]h)}(h.Device descriptor filled by drm_dp_read_desc()h]h.Device descriptor filled by drm_dp_read_desc()}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMghjsubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjshMghjrubj| )}(h/``enum drm_dp_quirk quirk`` Quirk to query for h](j )}(h``enum drm_dp_quirk quirk``h]j )}(hj9sh]henum drm_dp_quirk quirk}(hj;shhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7subah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhhj3subj )}(hhh]h)}(hQuirk to query forh]hQuirk to query for}(hjRshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNshMhhjOsubah}(h]h ]h"]h$]h&]uh1j hj3subeh}(h]h ]h"]h$]h&]uh1j{ hjNshMhhjrubeh}(h]h ]h"]h$]h&]uh1jv hjrubh)}(h**Description**h]j3 )}(hjtsh]h Description}(hjvshhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrsubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMjhjrubh)}(h>Return true if DP device identified by **desc** has **quirk**.h](h'Return true if DP device identified by }(hjshhhNhNubj3 )}(h**desc**h]hdesc}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjsubh has }(hjshhhNhNubj3 )}(h **quirk**h]hquirk}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjsubh.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMihjrubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_edp_backlight_info (C struct)c.drm_edp_backlight_infohNtauh1j hj9hhhNhNubj )}(hhh](j )}(hdrm_edp_backlight_infoh]j )}(hstruct drm_edp_backlight_infoh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjshhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMnubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjshhhjshMnubj )}(hdrm_edp_backlight_infoh]j )}(hjsh]hdrm_edp_backlight_info}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsubah}(h]h ](j j eh"]h$]h&]j j uh1j hjshhhjshMnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjshhhjshMnubah}(h]jsah ](j j eh"]h$]h&]j j )j huh1j hjshMnhjshhubj )}(hhh]h)}(h Probed eDP backlight info structh]h Probed eDP backlight info struct}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMshjthhubah}(h]h ]h"]h$]h&]uh1j hjshhhjshMnubeh}(h]h ](j structeh"]h$]h&]j" j j# j7tj$ j7tj% j& j' uh1j hhhj9hNhNubj) )}(hX**Definition**:: struct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; }; **Members** ``pwmgen_bit_count`` The pwmgen bit count ``pwm_freq_pre_divider`` The PWM frequency pre-divider value being used for this backlight, if any ``max`` The maximum backlight level that may be set ``lsb_reg_used`` Do we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register? ``aux_enable`` Does the panel support the AUX enable cap? ``aux_set`` Does the panel support setting the brightness through AUX? ``luminance_set`` Does the panel support setting the brightness through AUX using luminance values?h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjCthhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?tubh:}(hj?thhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMwhj;tubjN )}(hstruct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; };h]hstruct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; };}hj\tsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMyhj;tubh)}(h **Members**h]j3 )}(hjmth]hMembers}(hjothhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjktubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj;tubjw )}(hhh](j| )}(h*``pwmgen_bit_count`` The pwmgen bit count h](j )}(h``pwmgen_bit_count``h]j )}(hjth]hpwmgen_bit_count}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMuhjtubj )}(hhh]h)}(hThe pwmgen bit counth]hThe pwmgen bit count}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMuhjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthMuhjtubj| )}(hc``pwm_freq_pre_divider`` The PWM frequency pre-divider value being used for this backlight, if any h](j )}(h``pwm_freq_pre_divider``h]j )}(hjth]hpwm_freq_pre_divider}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMvhjtubj )}(hhh]h)}(hIThe PWM frequency pre-divider value being used for this backlight, if anyh]hIThe PWM frequency pre-divider value being used for this backlight, if any}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMvhjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthMvhjtubj| )}(h4``max`` The maximum backlight level that may be set h](j )}(h``max``h]j )}(hjth]hmax}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMwhjtubj )}(hhh]h)}(h+The maximum backlight level that may be seth]h+The maximum backlight level that may be set}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMwhjuubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMwhjtubj| )}(hZ``lsb_reg_used`` Do we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register? h](j )}(h``lsb_reg_used``h]j )}(hj7uh]h lsb_reg_used}(hj9uhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5uubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMxhj1uubj )}(hhh]h)}(hHDo we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register?h]hHDo we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register?}(hjPuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLuhMxhjMuubah}(h]h ]h"]h$]h&]uh1j hj1uubeh}(h]h ]h"]h$]h&]uh1j{ hjLuhMxhjtubj| )}(h:``aux_enable`` Does the panel support the AUX enable cap? h](j )}(h``aux_enable``h]j )}(hjpuh]h aux_enable}(hjruhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnuubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMyhjjuubj )}(hhh]h)}(h*Does the panel support the AUX enable cap?h]h*Does the panel support the AUX enable cap?}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMyhjuubah}(h]h ]h"]h$]h&]uh1j hjjuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMyhjtubj| )}(hG``aux_set`` Does the panel support setting the brightness through AUX? h](j )}(h ``aux_set``h]j )}(hjuh]haux_set}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMzhjuubj )}(hhh]h)}(h:Does the panel support setting the brightness through AUX?h]h:Does the panel support setting the brightness through AUX?}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMzhjuubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMzhjtubj| )}(hc``luminance_set`` Does the panel support setting the brightness through AUX using luminance values?h](j )}(h``luminance_set``h]j )}(hjuh]h luminance_set}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMzhjuubj )}(hhh]h)}(hQDoes the panel support setting the brightness through AUX using luminance values?h]hQDoes the panel support setting the brightness through AUX using luminance values?}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM{hjuubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMzhjtubeh}(h]h ]h"]h$]h&]uh1jv hj;tubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubh)}(h**Description**h]j3 )}(hj%vh]h Description}(hj'vhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#vubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM~hj9hhubh)}(hvThis structure contains various data about an eDP backlight, which can be populated by using drm_edp_backlight_init().h]hvThis structure contains various data about an eDP backlight, which can be populated by using drm_edp_backlight_init().}(hj;vhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhM{hj9hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_dp_phy_test_params (C struct)c.drm_dp_phy_test_paramshNtauh1j hj9hhhNhNubj )}(hhh](j )}(hdrm_dp_phy_test_paramsh]j )}(hstruct drm_dp_phy_test_paramsh](j )}(hj h]hstruct}(hjcvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_vhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMubj )}(h h]h }(hjqvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_vhhhjpvhMubj )}(hdrm_dp_phy_test_paramsh]j )}(hj]vh]hdrm_dp_phy_test_params}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_vhhhjpvhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[vhhhjpvhMubah}(h]jVvah ](j j eh"]h$]h&]j j )j huh1j hjpvhMhjXvhhubj )}(hhh]h)}(hDP Phy Compliance parametersh]hDP Phy Compliance parameters}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjvhhubah}(h]h ]h"]h$]h&]uh1j hjXvhhhjpvhMubeh}(h]h ](j structeh"]h$]h&]j" j j# jvj$ jvj% j& j' uh1j hhhj9hNhNubj) )}(hX]**Definition**:: struct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; }; **Members** ``link_rate`` Requested Link rate from DPCD 0x219 ``num_lanes`` Number of lanes requested by sing through DPCD 0x220 ``phy_pattern`` DP Phy test pattern from DPCD 0x248 ``hbr2_reset`` DP HBR2_COMPLIANCE_SCRAMBLER_RESET from DCPD 0x24A and 0x24B ``custom80`` DP Test_80BIT_CUSTOM_PATTERN from DPCDs 0x250 through 0x259 ``enhanced_frame_cap`` flag for enhanced frame capability.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjvubh:}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjvubjN )}(hstruct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; };h]hstruct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; };}hjvsbah}(h]h ]h"]h$]h&]j j uh1jM hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjvubh)}(h **Members**h]j3 )}(hjvh]hMembers}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjvubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjvubjw )}(hhh](j| )}(h2``link_rate`` Requested Link rate from DPCD 0x219 h](j )}(h ``link_rate``h]j )}(hjwh]h link_rate}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj wubj )}(hhh]h)}(h#Requested Link rate from DPCD 0x219h]h#Requested Link rate from DPCD 0x219}(hj+whhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'whMhj(wubah}(h]h ]h"]h$]h&]uh1j hj wubeh}(h]h ]h"]h$]h&]uh1j{ hj'whMhj wubj| )}(hC``num_lanes`` Number of lanes requested by sing through DPCD 0x220 h](j )}(h ``num_lanes``h]j )}(hjKwh]h num_lanes}(hjMwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIwubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjEwubj )}(hhh]h)}(h4Number of lanes requested by sing through DPCD 0x220h]h4Number of lanes requested by sing through DPCD 0x220}(hjdwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`whMhjawubah}(h]h ]h"]h$]h&]uh1j hjEwubeh}(h]h ]h"]h$]h&]uh1j{ hj`whMhj wubj| )}(h4``phy_pattern`` DP Phy test pattern from DPCD 0x248 h](j )}(h``phy_pattern``h]j )}(hjwh]h phy_pattern}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhj~wubj )}(hhh]h)}(h#DP Phy test pattern from DPCD 0x248h]h#DP Phy test pattern from DPCD 0x248}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjwubah}(h]h ]h"]h$]h&]uh1j hj~wubeh}(h]h ]h"]h$]h&]uh1j{ hjwhMhj wubj| )}(hL``hbr2_reset`` DP HBR2_COMPLIANCE_SCRAMBLER_RESET from DCPD 0x24A and 0x24B h](j )}(h``hbr2_reset``h]j )}(hjwh]h hbr2_reset}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:274: ./include/drm/display/drm_dp_helper.hhMhjwubj )}(hhh]h)}(h", or "" on errors. The returned string is always non-NULL and valid. **Return** Name of the DP PHY.h](h)}(h**Parameters**h]j3 )}(hjyh]h Parameters}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjyubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyubjw )}(hhh]j| )}(h1``enum drm_dp_phy dp_phy`` The DP PHY identifier h](j )}(h``enum drm_dp_phy dp_phy``h]j )}(hjyh]henum drm_dp_phy dp_phy}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyubj )}(hhh]h)}(hThe DP PHY identifierh]hThe DP PHY identifier}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMhjyubah}(h]h ]h"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]uh1j{ hjyhMhjyubah}(h]h ]h"]h$]h&]uh1jv hjyubh)}(h**Description**h]j3 )}(hjyh]h Description}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjyubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyubh)}(hGiven the **dp_phy**, get a user friendly name of the DP PHY, either "DPRX" or "LTTPR ", or "" on errors. The returned string is always non-NULL and valid.h](h Given the }(hjyhhhNhNubj3 )}(h **dp_phy**h]hdp_phy}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjyubh, get a user friendly name of the DP PHY, either “DPRX” or “LTTPR ”, or “” on errors. The returned string is always non-NULL and valid.}(hjyhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyubh)}(h **Return**h]j3 )}(hjzh]hReturn}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyubh)}(hName of the DP PHY.h]hName of the DP PHY.}(hj/zhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjyubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_lttpr_wake_timeout_setup (C function)!c.drm_dp_lttpr_wake_timeout_setuphNtauh1j hj9hhhNhNubj )}(hhh](j )}(hTvoid drm_dp_lttpr_wake_timeout_setup (struct drm_dp_aux *aux, bool transparent_mode)h]j )}(hSvoid drm_dp_lttpr_wake_timeout_setup(struct drm_dp_aux *aux, bool transparent_mode)h](j)}(hvoidh]hvoid}(hj^zhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZzhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjmzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZzhhhjlzhMubj )}(hdrm_dp_lttpr_wake_timeout_setuph]j )}(hdrm_dp_lttpr_wake_timeout_setuph]hdrm_dp_lttpr_wake_timeout_setup}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{zubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZzhhhjlzhMubj)}(h/(struct drm_dp_aux *aux, bool transparent_mode)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j%)}jjzsb!c.drm_dp_lttpr_wake_timeout_setupasbuh1hhjzubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj9)}(hjOh]h*}(hjzhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjzubj )}(hauxh]haux}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubj)}(hbool transparent_modeh](j)}(hjIh]hbool}(hj {hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj {ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj {ubj )}(htransparent_modeh]htransparent_mode}(hj({hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj {ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjzubeh}(h]h ]h"]h$]h&]j j uh1jhjZzhhhjlzhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjVzhhhjlzhMubah}(h]jQzah ](j j eh"]h$]h&]j j )j huh1j hjlzhMhjSzhhubj )}(hhh]h)}(h'Grant extended time for sink to wake uph]h'Grant extended time for sink to wake up}(hjR{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjO{hhubah}(h]h ]h"]h$]h&]uh1j hjSzhhhjlzhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj{j$ jj{j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``bool transparent_mode`` This is true if lttpr is in transparent mode **Description** This function checks if the sink needs any extended wake time, if it does it grants this request. Post this setup the source device can keep trying the Aux transaction till the granted wake timeout. If this function is not called all Aux transactions are expected to take a default of 1ms before they throw an error.h](h)}(h**Parameters**h]j3 )}(hjt{h]h Parameters}(hjv{hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjr{ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjn{ubjw )}(hhh](j| )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj{h]hstruct drm_dp_aux *aux}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubj )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj{ubah}(h]h ]h"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]uh1j{ hj{hMhj{ubj| )}(hG``bool transparent_mode`` This is true if lttpr is in transparent mode h](j )}(h``bool transparent_mode``h]j )}(hj{h]hbool transparent_mode}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubj )}(hhh]h)}(h,This is true if lttpr is in transparent modeh]h,This is true if lttpr is in transparent mode}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj{ubah}(h]h ]h"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]uh1j{ hj{hMhj{ubeh}(h]h ]h"]h$]h&]uh1jv hjn{ubh)}(h**Description**h]j3 )}(hj|h]h Description}(hj |hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjn{ubh)}(hX<This function checks if the sink needs any extended wake time, if it does it grants this request. Post this setup the source device can keep trying the Aux transaction till the granted wake timeout. If this function is not called all Aux transactions are expected to take a default of 1ms before they throw an error.h]hX<This function checks if the sink needs any extended wake time, if it does it grants this request. Post this setup the source device can keep trying the Aux transaction till the granted wake timeout. If this function is not called all Aux transactions are expected to take a default of 1ms before they throw an error.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjn{ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_dpcd_probe (C function)c.drm_dp_dpcd_probehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hCint drm_dp_dpcd_probe (struct drm_dp_aux *aux, unsigned int offset)h]j )}(hBint drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset)h](j)}(hinth]hint}(hjL|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjH|hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj[|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjH|hhhjZ|hMubj )}(hdrm_dp_dpcd_probeh]j )}(hdrm_dp_dpcd_probeh]hdrm_dp_dpcd_probe}(hjm|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjH|hhhjZ|hMubj)}(h-(struct drm_dp_aux *aux, unsigned int offset)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj|modnameN classnameNj j )}j ]j%)}jjo|sbc.drm_dp_dpcd_probeasbuh1hhj|ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj9)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj|ubj )}(hauxh]haux}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hj }hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj)}(hinth]hint}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hj%}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(hoffseth]hoffset}(hj3}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubeh}(h]h ]h"]h$]h&]j j uh1jhjH|hhhjZ|hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjD|hhhjZ|hMubah}(h]j?|ah ](j j eh"]h$]h&]j j )j huh1j hjZ|hMhjA|hhubj )}(hhh]h)}(h4probe a given DPCD address with a 1-byte read accessh]h4probe a given DPCD address with a 1-byte read access}(hj]}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjZ}hhubah}(h]h ]h"]h$]h&]uh1j hjA|hhhjZ|hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# ju}j$ ju}j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST) ``unsigned int offset`` address of the register to probe **Description** Probe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value. Returns 0 if the read access suceeded, or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}}ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjy}ubjw )}(hhh](j| )}(h9``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST) h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj}h]hstruct drm_dp_aux *aux}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}ubj )}(hhh]h)}(hDisplayPort AUX channel (SST)h]hDisplayPort AUX channel (SST)}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hMhj}ubj| )}(h9``unsigned int offset`` address of the register to probe h](j )}(h``unsigned int offset``h]j )}(hj}h]hunsigned int offset}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}ubj )}(hhh]h)}(h address of the register to probeh]h address of the register to probe}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hMhj}ubeh}(h]h ]h"]h$]h&]uh1jv hjy}ubh)}(h**Description**h]j3 )}(hj~h]h Description}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjy}ubh)}(hProbe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value.h]hProbe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value.}(hj(~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjy}ubh)}(hKReturns 0 if the read access suceeded, or a negative error code on failure.h]hKReturns 0 if the read access suceeded, or a negative error code on failure.}(hj7~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjy}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_dpcd_set_powered (C function)c.drm_dp_dpcd_set_poweredhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hCvoid drm_dp_dpcd_set_powered (struct drm_dp_aux *aux, bool powered)h]j )}(hBvoid drm_dp_dpcd_set_powered(struct drm_dp_aux *aux, bool powered)h](j)}(hvoidh]hvoid}(hjf~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjb~hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hju~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjb~hhhjt~hMubj )}(hdrm_dp_dpcd_set_poweredh]j )}(hdrm_dp_dpcd_set_poweredh]hdrm_dp_dpcd_set_powered}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjb~hhhjt~hMubj)}(h&(struct drm_dp_aux *aux, bool powered)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~modnameN classnameNj j )}j ]j%)}jj~sbc.drm_dp_dpcd_set_poweredasbuh1hhj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj9)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj~ubj )}(hauxh]haux}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubj)}(h bool poweredh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hpoweredh]hpowered}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj~ubeh}(h]h ]h"]h$]h&]j j uh1jhjb~hhhjt~hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^~hhhjt~hMubah}(h]jY~ah ](j j eh"]h$]h&]j j )j huh1j hjt~hMhj[~hhubj )}(hhh]h)}(h$Set whether the DP device is poweredh]h$Set whether the DP device is powered}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjWhhubah}(h]h ]h"]h$]h&]uh1j hj[~hhhjt~hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jrj$ jrj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op. ``bool powered`` true if powered; false if not **Description** If the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out. If this function is never called then a device defaults to being powered.h](h)}(h**Parameters**h]j3 )}(hj|h]h Parameters}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjvubjw )}(hhh](j| )}(h``struct drm_dp_aux *aux`` DisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op. h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hdDisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op.h]hfDisplayPort AUX channel; for convenience it’s OK to pass NULL here and the function will be a no-op.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h/``bool powered`` true if powered; false if not h](j )}(h``bool powered``h]j )}(hjh]h bool powered}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(htrue if powered; false if noth]htrue if powered; false if not}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjvubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjvubh)}(hIf the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out.h]hIf the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjvubh)}(hIIf this function is never called then a device defaults to being powered.h]hIIf this function is never called then a device defaults to being powered.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_dp_dpcd_set_probe (C function)c.drm_dp_dpcd_set_probehNtauh1j hj9hhhNhNubj )}(hhh](j )}(h@void drm_dp_dpcd_set_probe (struct drm_dp_aux *aux, bool enable)h]j )}(h?void drm_dp_dpcd_set_probe(struct drm_dp_aux *aux, bool enable)h](j)}(hvoidh]hvoid}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`hhhjrhMubj )}(hdrm_dp_dpcd_set_probeh]j )}(hdrm_dp_dpcd_set_probeh]hdrm_dp_dpcd_set_probe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhhjrhMubj)}(h%(struct drm_dp_aux *aux, bool enable)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_dpcd_set_probeasbuh1hhjubj )}(h h]h }(hj߀hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool enableh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(henableh]henable}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj`hhhjrhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj\hhhjrhMubah}(h]jWah ](j j eh"]h$]h&]j j )j huh1j hjrhMhjYhhubj )}(hhh]h)}(h0Set whether a probing before DPCD access is doneh]h0Set whether a probing before DPCD access is done}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjUhhubah}(h]h ]h"]h$]h&]uh1j hjYhhhjrhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jpj$ jpj% j& j' uh1j hhhj9hNhNubj) )}(hv**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable`` Enable the probing if requiredh](h)}(h**Parameters**h]j3 )}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjxubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjtubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h.``bool enable`` Enable the probing if requiredh](j )}(h``bool enable``h]j )}(hjҁh]h bool enable}(hjԁhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjЁubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj́ubj )}(hhh]h)}(hEnable the probing if requiredh]hEnable the probing if required}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hj́ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjtubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_dpcd_read (C function)c.drm_dp_dpcd_readhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hassize_t drm_dp_dpcd_read (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(h`ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j%)}jdrm_dp_dpcd_readsbc.drm_dp_dpcd_readasbuh1hhj(hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(hhhjPhMubj )}(hdrm_dp_dpcd_readh]j )}(hjMh]hdrm_dp_dpcd_read}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj(hhhjPhMubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jKc.drm_dp_dpcd_readasbuh1hhjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj9)}(hjOh]h*}(hjȂhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjzubj )}(hauxh]haux}(hjՂhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hoffseth]hoffset}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hbufferh]hbuffer}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jKc.drm_dp_dpcd_readasbuh1hhj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjvubeh}(h]h ]h"]h$]h&]j j uh1jhj(hhhjPhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj$hhhjPhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjPhMhj!hhubj )}(hhh]h)}(h$read a series of bytes from the DPCDh]h$read a series of bytes from the DPCD}(hjڃhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj׃hhubah}(h]h ]h"]h$]h&]uh1j hj!hhhjPhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to read ``void *buffer`` buffer to store the register values ``size_t size`` number of bytes in **buffer** **Description** Returns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller. In most of the cases you want to use drm_dp_dpcd_read_data() instead.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjw )}(hhh](j| )}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj1ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj0hMhjubj| )}(h@``unsigned int offset`` address of the (first) register to read h](j )}(h``unsigned int offset``h]j )}(hjTh]hunsigned int offset}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjNubj )}(hhh]h)}(h'address of the (first) register to readh]h'address of the (first) register to read}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMhjjubah}(h]h ]h"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]uh1j{ hjihMhjubj| )}(h5``void *buffer`` buffer to store the register values h](j )}(h``void *buffer``h]j )}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h#buffer to store the register valuesh]h#buffer to store the register values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h.``size_t size`` number of bytes in **buffer** h](j )}(h``size_t size``h]j )}(hjƄh]h size_t size}(hjȄhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjĄubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hj߄hhhNhNubj3 )}(h **buffer**h]hbuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj߄ubeh}(h]h ]h"]h$]h&]uh1hhjۄhMhj܄ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjۄhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hEIn most of the cases you want to use drm_dp_dpcd_read_data() instead.h]hEIn most of the cases you want to use drm_dp_dpcd_read_data() instead.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_dpcd_write (C function)c.drm_dp_dpcd_writehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hbssize_t drm_dp_dpcd_write (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j )}(hassize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjhmodnameN classnameNj j )}j ]j%)}jdrm_dp_dpcd_writesbc.drm_dp_dpcd_writeasbuh1hhj_hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhjhMubj )}(hdrm_dp_dpcd_writeh]j )}(hjh]hdrm_dp_dpcd_write}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_hhhjhMubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj…hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjӅhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjЅubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjՅmodnameN classnameNj j )}j ]jc.drm_dp_dpcd_writeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj)}(hinth]hint}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(hoffseth]hoffset}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjrubj )}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_dpcd_writeasbuh1hhjubj )}(h h]h }(hjنhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj_hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[hhhjhMubah}(h]jVah ](j j eh"]h$]h&]j j )j huh1j hjhMhjXhhubj )}(hhh]h)}(h#write a series of bytes to the DPCDh]h#write a series of bytes to the DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjXhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j)j$ j)j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to write ``void *buffer`` buffer containing the values to write ``size_t size`` number of bytes in **buffer** **Description** Returns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller. In most of the cases you want to use drm_dp_dpcd_write_data() instead.h](h)}(h**Parameters**h]j3 )}(hj3h]h Parameters}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubjw )}(hhh](j| )}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjRh]hstruct drm_dp_aux *aux}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLubj )}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghMhjhubah}(h]h ]h"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]uh1j{ hjghMhjIubj| )}(hA``unsigned int offset`` address of the (first) register to write h](j )}(h``unsigned int offset``h]j )}(hjh]hunsigned int offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h(address of the (first) register to writeh]h(address of the (first) register to write}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjIubj| )}(h7``void *buffer`` buffer containing the values to write h](j )}(h``void *buffer``h]j )}(hjćh]h void *buffer}(hjƇhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj‡ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h%buffer containing the values to writeh]h%buffer containing the values to write}(hj݇hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjهhMhjڇubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjهhMhjIubj| )}(h.``size_t size`` number of bytes in **buffer** h](j )}(h``size_t size``h]j )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjhhhNhNubj3 )}(h **buffer**h]hbuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjIubeh}(h]h ]h"]h$]h&]uh1jv hj-ubh)}(h**Description**h]j3 )}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjDubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj-ubh)}(hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubh)}(hFIn most of the cases you want to use drm_dp_dpcd_write_data() instead.h]hFIn most of the cases you want to use drm_dp_dpcd_write_data() instead.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_dpcd_read_link_status (C function)c.drm_dp_dpcd_read_link_statushNtauh1j hj9hhhNhNubj )}(hhh](j )}(hYint drm_dp_dpcd_read_link_status (struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h]j )}(hXint drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM#ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM#ubj )}(hdrm_dp_dpcd_read_link_statush]j )}(hdrm_dp_dpcd_read_link_statush]hdrm_dp_dpcd_read_link_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM#ubj)}(h8(struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj׈hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӈubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӈubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_dpcd_read_link_statusasbuh1hhjӈubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӈubj9)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjӈubj )}(hauxh]haux}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӈubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjψubj)}(hu8 status[DP_LINK_STATUS_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjNmodnameN classnameNj j )}j ]jc.drm_dp_dpcd_read_link_statusasbuh1hhjEubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj )}(hstatush]hstatus}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjEubh)}(hhh]j )}(hDP_LINK_STATUS_SIZEh]hDP_LINK_STATUS_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_dpcd_read_link_statusasbuh1hhjEubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjEubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjψubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM#ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM#ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM#hjhhubj )}(hhh]h)}(h)read DPCD link status (bytes 0x202-0x207)h]h)read DPCD link status (bytes 0x202-0x207)}(hj݉hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM#hjډhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM#ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 status[DP_LINK_STATUS_SIZE]`` buffer to store the link status in (must be at least 6 bytes) **Description** Returns a negative error code on failure or 0 on success.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM$hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hM$hj4ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj3hM$hjubj| )}(ha``u8 status[DP_LINK_STATUS_SIZE]`` buffer to store the link status in (must be at least 6 bytes) h](j )}(h"``u8 status[DP_LINK_STATUS_SIZE]``h]j )}(hjWh]hu8 status[DP_LINK_STATUS_SIZE]}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM%hjQubj )}(hhh]h)}(h=buffer to store the link status in (must be at least 6 bytes)h]h=buffer to store the link status in (must be at least 6 bytes)}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhM%hjmubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjlhM%hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjubh)}(h9Returns a negative error code on failure or 0 on success.h]h9Returns a negative error code on failure or 0 on success.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM&hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_dpcd_read_phy_link_status (C function)"c.drm_dp_dpcd_read_phy_link_statushNtauh1j hj9hhhNhNubj )}(hhh](j )}(hzint drm_dp_dpcd_read_phy_link_status (struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h]j )}(hyint drm_dp_dpcd_read_phy_link_status(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h](j)}(hinth]hint}(hj׊hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӊhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM2ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjӊhhhjhM2ubj )}(h drm_dp_dpcd_read_phy_link_statush]j )}(h drm_dp_dpcd_read_phy_link_statush]h drm_dp_dpcd_read_phy_link_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjӊhhhjhM2ubj)}(hU(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j%)}jjsb"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj )}(h h]h }(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj`hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(henum drm_dp_phy dp_phyh](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_phyh]h drm_dp_phy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jN"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj )}(h h]h }(hj‹hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdp_phyh]hdp_phy}(hjЋhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h#u8 link_status[DP_LINK_STATUS_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jN"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h link_statush]h link_status}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hj&hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_LINK_STATUS_SIZEh]hDP_LINK_STATUS_SIZE}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]jN"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj9)}(hj=Mh]h]}(hjThhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjӊhhhjhM2ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjϊhhhjhM2ubah}(h]jʊah ](j j eh"]h$]h&]j j )j huh1j hjhM2hj̊hhubj )}(hhh]h)}(h,get the link status information for a DP PHYh]h,get the link status information for a DP PHY}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM2hjzhhubah}(h]h ]h"]h$]h&]uh1j hj̊hhhjhM2ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``enum drm_dp_phy dp_phy`` the DP PHY to get the link status for ``u8 link_status[DP_LINK_STATUS_SIZE]`` buffer to return the status in **Description** Fetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned **link_status** matches the DPCD register layout of the DPRX PHY link status. Returns 0 if the information was read successfully or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM6hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM3hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj׌hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjӌhM3hjԌubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjӌhM3hjubj| )}(hA``enum drm_dp_phy dp_phy`` the DP PHY to get the link status for h](j )}(h``enum drm_dp_phy dp_phy``h]j )}(hjh]henum drm_dp_phy dp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM4hjubj )}(hhh]h)}(h%the DP PHY to get the link status forh]h%the DP PHY to get the link status for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM4hj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hM4hjubj| )}(hG``u8 link_status[DP_LINK_STATUS_SIZE]`` buffer to return the status in h](j )}(h'``u8 link_status[DP_LINK_STATUS_SIZE]``h]j )}(hj0h]h#u8 link_status[DP_LINK_STATUS_SIZE]}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM5hj*ubj )}(hhh]h)}(hbuffer to return the status inh]hbuffer to return the status in}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM5hjFubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hjEhM5hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjkh]h Description}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM7hjubh)}(hFetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned **link_status** matches the DPCD register layout of the DPRX PHY link status.h](hbFetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned }(hjhhhNhNubj3 )}(h**link_status**h]h link_status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh> matches the DPCD register layout of the DPRX PHY link status.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM6hjubh)}(hWReturns 0 if the information was read successfully or a negative error code on failure.h]hWReturns 0 if the information was read successfully or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM:hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_dp_link_power_up (C function)c.drm_dp_link_power_uphNtauh1j hj9hhhNhNubj )}(hhh](j )}(hIint drm_dp_link_power_up (struct drm_dp_aux *aux, unsigned char revision)h]j )}(hHint drm_dp_link_power_up(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hinth]hint}(hjэhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj͍hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͍hhhjߍhM]ubj )}(hdrm_dp_link_power_uph]j )}(hdrm_dp_link_power_uph]hdrm_dp_link_power_up}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj͍hhhjߍhM]ubj)}(h0(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_link_power_upasbuh1hhj ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjZhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hauxh]haux}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned char revisionh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(hrevisionh]hrevision}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj͍hhhjߍhM]ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjɍhhhjߍhM]ubah}(h]jčah ](j j eh"]h$]h&]j j )j huh1j hjߍhM]hjƍhhubj )}(hhh]h)}(hpower up a DisplayPort linkh]hpower up a DisplayPort link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM]hjߎhhubah}(h]h ]h"]h$]h&]uh1j hjƍhhhjߍhM]ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned char revision`` DPCD revision supported on the link **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMahjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj#h]hstruct drm_dp_aux *aux}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM^hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM^hj9ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj8hM^hjubj| )}(h?``unsigned char revision`` DPCD revision supported on the link h](j )}(h``unsigned char revision``h]j )}(hj\h]hunsigned char revision}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_hjVubj )}(hhh]h)}(h#DPCD revision supported on the linkh]h#DPCD revision supported on the link}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhM_hjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhM_hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMahjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM`hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_link_power_down (C function)c.drm_dp_link_power_downhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hKint drm_dp_link_power_down (struct drm_dp_aux *aux, unsigned char revision)h]j )}(hJint drm_dp_link_power_down(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hinth]hint}(hj܏hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj؏hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj؏hhhjhMubj )}(hdrm_dp_link_power_downh]j )}(hdrm_dp_link_power_downh]hdrm_dp_link_power_down}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj؏hhhjhMubj)}(h0(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_link_power_downasbuh1hhjubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hunsigned char revisionh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hrevisionh]hrevision}(hjÐhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj؏hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjԏhhhjhMubah}(h]jϏah ](j j eh"]h$]h&]j j )j huh1j hjhMhjяhhubj )}(hhh]h)}(hpower down a DisplayPort linkh]hpower down a DisplayPort link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjяhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned char revision`` DPCD revision supported on the link **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj.h]hstruct drm_dp_aux *aux}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjDubah}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hjChMhj%ubj| )}(h?``unsigned char revision`` DPCD revision supported on the link h](j )}(h``unsigned char revision``h]j )}(hjgh]hunsigned char revision}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjaubj )}(hhh]h)}(h#DPCD revision supported on the linkh]h#DPCD revision supported on the link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj}ubah}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hj|hMhj%ubeh}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_dpcd_write_payload (C function)c.drm_dp_dpcd_write_payloadhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hiint drm_dp_dpcd_write_payload (struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h]j )}(hhint drm_dp_dpcd_write_payload(struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_dpcd_write_payloadh]j )}(hdrm_dp_dpcd_write_payloadh]hdrm_dp_dpcd_write_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hK(struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]j%)}jj sbc.drm_dp_dpcd_write_payloadasbuh1hhj ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjphhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hauxh]haux}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h int vcpidh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hvcpidh]hvcpid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 start_time_sloth](h)}(hhh]j )}(hu8h]hu8}(hjΒhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˒ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjВmodnameN classnameNj j )}j ]j^c.drm_dp_dpcd_write_payloadasbuh1hhjǒubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǒubj )}(hstart_time_sloth]hstart_time_slot}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǒubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 time_slot_counth](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j^c.drm_dp_dpcd_write_payloadasbuh1hhjubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(htime_slot_counth]htime_slot_count}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjߑhhhjhMubah}(h]jڑah ](j j eh"]h$]h&]j j )j huh1j hjhMhjܑhhubj )}(hhh]h)}(h2Write Virtual Channel information to payload tableh]h2Write Virtual Channel information to payload table}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjihhubah}(h]h ]h"]h$]h&]uh1j hjܑhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int vcpid`` Virtual Channel Payload ID ``u8 start_time_slot`` Starting time slot ``u8 time_slot_count`` Time slot count **Description** Write the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary. **Return** 0 on success, negative error otherwiseh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjƓhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj“hMhjÓubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj“hMhjubj| )}(h)``int vcpid`` Virtual Channel Payload ID h](j )}(h ``int vcpid``h]j )}(hjh]h int vcpid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hVirtual Channel Payload IDh]hVirtual Channel Payload ID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h*``u8 start_time_slot`` Starting time slot h](j )}(h``u8 start_time_slot``h]j )}(hjh]hu8 start_time_slot}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hStarting time sloth]hStarting time slot}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj5ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj4hMhjubj| )}(h'``u8 time_slot_count`` Time slot count h](j )}(h``u8 time_slot_count``h]j )}(hjXh]hu8 time_slot_count}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRubj )}(hhh]h)}(hTime slot counth]hTime slot count}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjnubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjmhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hqWrite the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary.h]hqWrite the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h&0 on success, negative error otherwiseh]h&0 on success, negative error otherwise}(hjДhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_dpcd_clear_payload (C function)c.drm_dp_dpcd_clear_payloadhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h6int drm_dp_dpcd_clear_payload (struct drm_dp_aux *aux)h]j )}(h5int drm_dp_dpcd_clear_payload(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMubj )}(hdrm_dp_dpcd_clear_payloadh]j )}(hdrm_dp_dpcd_clear_payloadh]hdrm_dp_dpcd_clear_payload}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j%)}jj"sbc.drm_dp_dpcd_clear_payloadasbuh1hhj8ubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj hMhjhhubj )}(hhh]h)}(h$Clear the entire VC Payload ID tableh]h$Clear the entire VC Payload ID table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jוj$ jוj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Clear the entire VC Payload ID table. **Return** 0 on success, negative error code on errors.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjߕubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjەubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjەubh)}(h**Description**h]j3 )}(hj;h]h Description}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjەubh)}(h%Clear the entire VC Payload ID table.h]h%Clear the entire VC Payload ID table.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjەubh)}(h **Return**h]j3 )}(hjbh]hReturn}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjەubh)}(h,0 on success, negative error code on errors.h]h,0 on success, negative error code on errors.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjەubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_dpcd_poll_act_handled (C function)c.drm_dp_dpcd_poll_act_handledhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hIint drm_dp_dpcd_poll_act_handled (struct drm_dp_aux *aux, int timeout_ms)h]j )}(hHint drm_dp_dpcd_poll_act_handled(struct drm_dp_aux *aux, int timeout_ms)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_dpcd_poll_act_handledh]j )}(hdrm_dp_dpcd_poll_act_handledh]hdrm_dp_dpcd_poll_act_handled}(hjȖhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjĖubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h((struct drm_dp_aux *aux, int timeout_ms)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjʖsbc.drm_dp_dpcd_poll_act_handledasbuh1hhjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj0hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjܖubj)}(hint timeout_msh](j)}(hinth]hint}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubj )}(h timeout_msh]h timeout_ms}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjܖubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hPoll for ACT handled statush]hPoll for ACT handled status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int timeout_ms`` Timeout in ms **Description** Try waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to **timeout_ms** milliseconds, defaulting to 3000 ms if 0. **Return** 0 if the ACT was handled in time, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjݗh]hstruct drm_dp_aux *aux}(hjߗhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjۗubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjחubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjחubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjԗubj| )}(h!``int timeout_ms`` Timeout in ms h](j )}(h``int timeout_ms``h]j )}(hjh]hint timeout_ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h Timeout in msh]h Timeout in ms}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj,ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj+hMhjԗubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjQh]h Description}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hTry waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to **timeout_ms** milliseconds, defaulting to 3000 ms if 0.h](hTry waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to }(hjghhhNhNubj3 )}(h**timeout_ms**h]h timeout_ms}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjgubh* milliseconds, defaulting to 3000 ms if 0.}(hjghhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hA0 if the ACT was handled in time, negative error code on failure.h]hA0 if the ACT was handled in time, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_downstream_is_type (C function)c.drm_dp_downstream_is_typehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hcbool drm_dp_downstream_is_type (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h]j )}(hbbool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h](j)}(hjIh]hbool}(hjϘhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˘hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM&ubj )}(h h]h }(hjݘhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˘hhhjܘhM&ubj )}(hdrm_dp_downstream_is_typeh]j )}(hdrm_dp_downstream_is_typeh]hdrm_dp_downstream_is_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj˘hhhjܘhM&ubj)}(hD(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_downstream_is_typeasbuh1hhjubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]jEc.drm_dp_downstream_is_typeasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjəhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjƙubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj˙modnameN classnameNj j )}j ]jEc.drm_dp_downstream_is_typeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubhdesc_sig_literal_number)}(h4h]h4}(hjhhhNhNubah}(h]h ]mah"]h$]h&]uh1jhjubj9)}(hj=Mh]h]}(hj!hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 typeh](h)}(hhh]j )}(hu8h]hu8}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]jEc.drm_dp_downstream_is_typeasbuh1hhj5ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(htypeh]htype}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj˘hhhjܘhM&ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjǘhhhjܘhM&ubah}(h]j˜ah ](j j eh"]h$]h&]j j )j huh1j hjܘhM&hjĘhhubj )}(hhh]h)}(h.is the downstream facing port of certain type?h]h.is the downstream facing port of certain type?}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM&hjhhubah}(h]h ]h"]h$]h&]uh1j hjĘhhhjܘhM&ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``u8 type`` port type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``. **Description** Caveat: Only works with DPCD 1.1+ port caps. **Return** whether the downstream facing port matches the type.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM*hjubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjӚh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj՚hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjњubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM'hj͚ubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1j hj͚ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM'hjʚubj| )}(h+``const u8 port_cap[4]`` port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hj h]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM(hjubj )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hM(hj"ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj!hM(hjʚubj| )}(h``u8 type`` port type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``. h](j )}(h ``u8 type``h]j )}(hjEh]hu8 type}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM,hj?ubj )}(hhh]h)}(hport type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``.h](h!port type to be checked. Can be: }(hj^hhhNhNubj )}(h``DP_DS_PORT_TYPE_DP``h]hDP_DS_PORT_TYPE_DP}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh, }(hj^hhhNhNubj )}(h``DP_DS_PORT_TYPE_VGA``h]hDP_DS_PORT_TYPE_VGA}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh, }hj^sbj )}(h``DP_DS_PORT_TYPE_DVI``h]hDP_DS_PORT_TYPE_DVI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh, }(hj^hhhNhNubj )}(h``DP_DS_PORT_TYPE_HDMI``h]hDP_DS_PORT_TYPE_HDMI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh, }hj^sbj )}(h``DP_DS_PORT_TYPE_NON_EDID``h]hDP_DS_PORT_TYPE_NON_EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh, }hj^sbj )}(h``DP_DS_PORT_TYPE_DP_DUALMODE``h]hDP_DS_PORT_TYPE_DP_DUALMODE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh or }(hj^hhhNhNubj )}(h``DP_DS_PORT_TYPE_WIRELESS``h]hDP_DS_PORT_TYPE_WIRELESS}(hjқhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubh.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM)hj[ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hjZhM,hjʚubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM.hjubh)}(h,Caveat: Only works with DPCD 1.1+ port caps.h]h,Caveat: Only works with DPCD 1.1+ port caps.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM-hjubh)}(h **Return**h]j3 )}(hj&h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM/hjubh)}(h4whether the downstream facing port matches the type.h]h4whether the downstream facing port matches the type.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM0hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_downstream_is_tmds (C function)c.drm_dp_downstream_is_tmdshNtauh1j hj9hhhNhNubj )}(hhh](j )}(h{bool drm_dp_downstream_is_tmds (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hzbool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hjIh]hbool}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjghhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM<ubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjghhhjxhM<ubj )}(hdrm_dp_downstream_is_tmdsh]j )}(hdrm_dp_downstream_is_tmdsh]hdrm_dp_downstream_is_tmds}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjghhhjxhM<ubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjŜhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjœubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjǜmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_downstream_is_tmdsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_downstream_is_tmdsasbuh1hhjubj9)}(hj=Mh]h]}(hj/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubh)}(hhh]j )}(hu8h]hu8}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]jc.drm_dp_downstream_is_tmdsasbuh1hhjCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjCubj)}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjCubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hjѝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͝ubj )}(h h]h }(hjޝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͝ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͝ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͝ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_dp_downstream_is_tmdsasbuh1hhj͝ubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͝ubj9)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj͝ubj )}(hdrm_edidh]hdrm_edid}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj͝ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjghhhjxhM<ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjchhhjxhM<ubah}(h]j^ah ](j j eh"]h$]h&]j j )j huh1j hjxhM<hj`hhubj )}(hhh]h)}(h#is the downstream facing port TMDS?h]h#is the downstream facing port TMDS?}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjjhhubah}(h]h ]h"]h$]h&]uh1j hj`hhhjxhM<ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** whether the downstream facing port is TMDS (HDMI/DVI).h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjǞhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjÞhM=hjĞubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjÞhM=hjubj| )}(h+``const u8 port_cap[4]`` port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubj )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM>hjubj| )}(h)``const struct drm_edid *drm_edid`` EDID h](j )}(h#``const struct drm_edid *drm_edid``h]j )}(hj h]hconst struct drm_edid *drm_edid}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjubj )}(hhh]h)}(hEDIDh]hEDID}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hM?hj6ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj5hM?hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hj[h]hReturn}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubh)}(h6whether the downstream facing port is TMDS (HDMI/DVI).h]h6whether the downstream facing port is TMDS (HDMI/DVI).}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_dp_send_real_edid_checksum (C function) c.drm_dp_send_real_edid_checksumhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hSbool drm_dp_send_real_edid_checksum (struct drm_dp_aux *aux, u8 real_edid_checksum)h]j )}(hRbool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux, u8 real_edid_checksum)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM_ubj )}(hdrm_dp_send_real_edid_checksumh]j )}(hdrm_dp_send_real_edid_checksumh]hdrm_dp_send_real_edid_checksum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM_ubj)}(h/(struct drm_dp_aux *aux, u8 real_edid_checksum)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjܟhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj؟ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj؟ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjŸsb c.drm_dp_send_real_edid_checksumasbuh1hhj؟ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj؟ubj9)}(hjOh]h*}(hj(hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj؟ubj )}(hauxh]haux}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj؟ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjԟubj)}(hu8 real_edid_checksumh](h)}(hhh]j )}(hu8h]hu8}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjSmodnameN classnameNj j )}j ]j c.drm_dp_send_real_edid_checksumasbuh1hhjJubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(hreal_edid_checksumh]hreal_edid_checksum}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjԟubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM_ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM_ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM_hjhhubj )}(hhh]h)}(h"send back real edid checksum valueh]h"send back real edid checksum value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM_ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 real_edid_checksum`` real edid checksum for the last block **Return** True on successh](h)}(h**Parameters**h]j3 )}(hjɠh]h Parameters}(hjˠhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjǠubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMchjàubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM`hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM`hjߠubj| )}(h@``u8 real_edid_checksum`` real edid checksum for the last block h](j )}(h``u8 real_edid_checksum``h]j )}(hj!h]hu8 real_edid_checksum}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMahjubj )}(hhh]h)}(h%real edid checksum for the last blockh]h%real edid checksum for the last block}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMahj7ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMahjߠubeh}(h]h ]h"]h$]h&]uh1jv hjàubh)}(h **Return**h]j3 )}(hj\h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMchjàubh)}(hTrue on successh]hTrue on success}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMchjàubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_dp_read_dpcd_caps (C function)c.drm_dp_read_dpcd_capshNtauh1j hj9hhhNhNubj )}(hhh](j )}(hQint drm_dp_read_dpcd_caps (struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j )}(hPint drm_dp_read_dpcd_caps(struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_read_dpcd_capsh]j )}(hdrm_dp_read_dpcd_capsh]hdrm_dp_read_dpcd_caps}(hj¡hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h7(struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjޡhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڡubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڡubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjġsbc.drm_dp_read_dpcd_capsasbuh1hhjڡubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڡubj9)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjڡubj )}(hauxh]haux}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjڡubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj֡ubj)}(hu8 dpcd[DP_RECEIVER_CAP_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]jc.drm_dp_read_dpcd_capsasbuh1hhjLubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_dpcd_capsasbuh1hhjLubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj֡ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h2read DPCD caps and extended DPCD caps if availableh]h2read DPCD caps and extended DPCD caps if available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 dpcd[DP_RECEIVER_CAP_SIZE]`` Buffer to store the resulting DPCD in **Description** Attempts to read the base DPCD caps for **aux**. Additionally, this function checks for and reads the extended DPRX caps (``DP_DP13_DPCD_REV``) if present. **Return** ``0`` if the DPCD was read successfully, negative error code otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj%h]hstruct drm_dp_aux *aux}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj;ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj:hMhjubj| )}(hH``u8 dpcd[DP_RECEIVER_CAP_SIZE]`` Buffer to store the resulting DPCD in h](j )}(h!``u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hj^h]hu8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjXubj )}(hhh]h)}(h%Buffer to store the resulting DPCD inh]h%Buffer to store the resulting DPCD in}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjtubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjshMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hAttempts to read the base DPCD caps for **aux**. Additionally, this function checks for and reads the extended DPRX caps (``DP_DP13_DPCD_REV``) if present.h](h(Attempts to read the base DPCD caps for }(hjhhhNhNubj3 )}(h**aux**h]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhK. Additionally, this function checks for and reads the extended DPRX caps (}(hjhhhNhNubj )}(h``DP_DP13_DPCD_REV``h]hDP_DP13_DPCD_REV}(hjɣhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh ) if present.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hG``0`` if the DPCD was read successfully, negative error code otherwise.h](j )}(h``0``h]h0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhB if the DPCD was read successfully, negative error code otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_read_downstream_info (C function)c.drm_dp_read_downstream_infohNtauh1j hj9hhhNhNubj )}(hhh](j )}(hint drm_dp_read_downstream_info (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h]j )}(hint drm_dp_read_downstream_info(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h](j)}(hinth]hint}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhjEhMubj )}(hdrm_dp_read_downstream_infoh]j )}(hdrm_dp_read_downstream_infoh]hdrm_dp_read_downstream_info}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhjEhMubj)}(hk(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjZsbc.drm_dp_read_downstream_infoasbuh1hhjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjpubj )}(hauxh]haux}(hjͤhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_downstream_infoasbuh1hhjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hj>hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjPmodnameN classnameNj j )}j ]jc.drm_dp_read_downstream_infoasbuh1hhjubj9)}(hj=Mh]h]}(hjlhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubj)}(h,u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_downstream_infoasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdownstream_portsh]hdownstream_ports}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_MAX_DOWNSTREAM_PORTSh]hDP_MAX_DOWNSTREAM_PORTS}(hjѥhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΥubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjӥmodnameN classnameNj j )}j ]jc.drm_dp_read_downstream_infoasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubeh}(h]h ]h"]h$]h&]j j uh1jhj3hhhjEhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj/hhhjEhMubah}(h]j*ah ](j j eh"]h$]h&]j j )j huh1j hjEhMhj,hhubj )}(hhh]h)}(h+read DPCD downstream port info if availableh]h+read DPCD downstream port info if available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj,hhhjEhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j0j$ j0j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the port's DPCD ``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]`` buffer to store the downstream port info in **Description** See also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc() **Return** 0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.h](h)}(h**Parameters**h]j3 )}(hj:h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj8ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjYh]hstruct drm_dp_aux *aux}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjSubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjoubah}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjnhMhjPubj| )}(hI``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the port's DPCD h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h A cached copy of the port's DPCDh]h"A cached copy of the port’s DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjPubj| )}(h]``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]`` buffer to store the downstream port info in h](j )}(h0``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]``h]j )}(hj˦h]h,u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]}(hjͦhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjɦubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjŦubj )}(hhh]h)}(h+buffer to store the downstream port info inh]h+buffer to store the downstream port info in}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjŦubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjPubeh}(h]h ]h"]h$]h&]uh1jv hj4ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubh)}(hCSee also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc()h]hCSee also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubh)}(h **Return**h]j3 )}(hj-h]hReturn}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubh)}(h0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.h]h0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_dp_downstream_max_dotclock (C function) c.drm_dp_downstream_max_dotclockhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h^int drm_dp_downstream_max_dotclock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(h]int drm_dp_downstream_max_dotclock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hinth]hint}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjhMubj )}(hdrm_dp_downstream_max_dotclockh]j )}(hdrm_dp_downstream_max_dotclockh]hdrm_dp_downstream_max_dotclock}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjͧhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʧubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjϧmodnameN classnameNj j )}j ]j%)}jjsb c.drm_dp_downstream_max_dotclockasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_dp_downstream_max_dotclockasbuh1hhjubj9)}(hj=Mh]h]}(hj7hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubh)}(hhh]j )}(hu8h]hu8}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjomodnameN classnameNj j )}j ]j c.drm_dp_downstream_max_dotclockasbuh1hhjKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjKubj)}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjKubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjnhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjhMubah}(h]jeah ](j j eh"]h$]h&]j j )j huh1j hjhMhjghhubj )}(hhh]h)}(h,extract downstream facing port max dot clockh]h,extract downstream facing port max dot clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjghhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Return** Downstream facing port max dot clock in kHz on success, or 0 if max clock not definedh](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hj+h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%ubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhjAubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hMhj"ubj| )}(h+``const u8 port_cap[4]`` port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjdh]hconst u8 port_cap[4]}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj^ubj )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMhjzubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hjyhMhj"ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjubh)}(hUDownstream facing port max dot clock in kHz on success, or 0 if max clock not definedh]hUDownstream facing port max dot clock in kHz on success, or 0 if max clock not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_downstream_max_tmds_clock (C function)"c.drm_dp_downstream_max_tmds_clockhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hint drm_dp_downstream_max_tmds_clock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hint drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM9ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM9ubj )}(h drm_dp_downstream_max_tmds_clockh]j )}(h drm_dp_downstream_max_tmds_clockh]h drm_dp_downstream_max_tmds_clock}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM9ubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j%)}jjsb"c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hj{hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j["c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjΪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjߪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjܪubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j["c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj)}(hjh]h4}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj9)}(hj=Mh]h]}(hj3hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j["c.drm_dp_downstream_max_tmds_clockasbuh1hhjGubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjGubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM9ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjܩhhhjhM9ubah}(h]jשah ](j j eh"]h$]h&]j j )j huh1j hjhM9hj٩hhubj )}(hhh]h)}(h-extract downstream facing port max TMDS clockh]h-extract downstream facing port max TMDS clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM9hjhhubah}(h]h ]h"]h$]h&]uh1j hj٩hhhjhM9ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX$**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** HDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not definedh](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hj(h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM:hj"ubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hM:hj>ubah}(h]h ]h"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]uh1j{ hj=hM:hjubj| )}(h+``const u8 port_cap[4]`` port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjah]hconst u8 port_cap[4]}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM;hj[ubj )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhM;hjwubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hjvhM;hjubj| )}(h)``const struct drm_edid *drm_edid`` EDID h](j )}(h#``const struct drm_edid *drm_edid``h]j )}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjubj )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM<hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM<hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjլh]hReturn}(hj׬hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjӬubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubh)}(hdHDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not definedh]hdHDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_downstream_min_tmds_clock (C function)"c.drm_dp_downstream_min_tmds_clockhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hint drm_dp_downstream_min_tmds_clock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hint drm_dp_downstream_min_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMzubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj(hMzubj )}(h drm_dp_downstream_min_tmds_clockh]j )}(h drm_dp_downstream_min_tmds_clockh]h drm_dp_downstream_min_tmds_clock}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj(hMzubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(hu8h]hu8}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j%)}jj=sb"c.drm_dp_downstream_min_tmds_clockasbuh1hhjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjSubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjímodnameN classnameNj j )}j ]j"c.drm_dp_downstream_min_tmds_clockasbuh1hhjSubj9)}(hj=Mh]h]}(hj߭hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_downstream_min_tmds_clockasbuh1hhjubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjOhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj)}(hjh]h4}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj9)}(hj=Mh]h]}(hjihhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j"c.drm_dp_downstream_min_tmds_clockasbuh1hhj}ubj )}(h h]h }(hjخhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj}ubj )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj(hMzubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj(hMzubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj(hMzhjhhubj )}(hhh]h)}(h-extract downstream facing port min TMDS clockh]h-extract downstream facing port min TMDS clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMzhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj(hMzubeh}(h]h ](j functioneh"]h$]h&]j" j j# j5j$ j5j% j& j' uh1j hhhj9hNhNubj) )}(hX$**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** HDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not definedh](h)}(h**Parameters**h]j3 )}(hj?h]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM~hj9ubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hj^h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM{hjXubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshM{hjtubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjshM{hjUubj| )}(h+``const u8 port_cap[4]`` port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM|hjubj )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM|hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM|hjUubj| )}(h)``const struct drm_edid *drm_edid`` EDID h](j )}(h#``const struct drm_edid *drm_edid``h]j )}(hjЯh]hconst struct drm_edid *drm_edid}(hjүhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjίubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM}hjʯubj )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM}hjubah}(h]h ]h"]h$]h&]uh1j hjʯubeh}(h]h ]h"]h$]h&]uh1j{ hjhM}hjUubeh}(h]h ]h"]h$]h&]uh1jv hj9ubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj9ubh)}(hdHDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not definedh]hdHDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not defined}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_downstream_max_bpc (C function)c.drm_dp_downstream_max_bpchNtauh1j hj9hhhNhNubj )}(hhh](j )}(hzint drm_dp_downstream_max_bpc (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j )}(hyint drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhj^hMubj )}(hdrm_dp_downstream_max_bpch]j )}(hdrm_dp_downstream_max_bpch]hdrm_dp_downstream_max_bpc}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLhhhj^hMubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjssbc.drm_dp_downstream_max_bpcasbuh1hhjubj )}(h h]h }(hj˰hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjٰhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jǰc.drm_dp_downstream_max_bpcasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(hu8h]hu8}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]jǰc.drm_dp_downstream_max_bpcasbuh1hhj)ubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(hport_caph]hport_cap}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj)}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjıhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjұhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj߱hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jǰc.drm_dp_downstream_max_bpcasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdrm_edidh]hdrm_edid}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjLhhhj^hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhj^hMubah}(h]jCah ](j j eh"]h$]h&]j j )j huh1j hj^hMhjEhhubj )}(hhh]h)}(h5extract downstream facing port max bits per componenth]h5extract downstream facing port max bits per component}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjPhhubah}(h]h ]h"]h$]h&]uh1j hjEhhhj^hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jkj$ jkj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** Max bpc on success or 0 if max bpc not definedh](h)}(h**Parameters**h]j3 )}(hjuh]h Parameters}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjsubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjoubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjͲh]hconst u8 port_cap[4]}(hjϲhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj˲ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjDzubj )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjDzubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h)``const struct drm_edid *drm_edid`` EDID h](j )}(h#``const struct drm_edid *drm_edid``h]j )}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjoubh)}(h **Return**h]j3 )}(hjAh]hReturn}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjoubh)}(h.Max bpc on success or 0 if max bpc not definedh]h.Max bpc on success or 0 if max bpc not defined}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjoubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_dp_downstream_420_passthrough (C function)#c.drm_dp_downstream_420_passthroughhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hbbool drm_dp_downstream_420_passthrough (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(habool drm_dp_downstream_420_passthrough(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h!drm_dp_downstream_420_passthroughh]j )}(h!drm_dp_downstream_420_passthroughh]h!drm_dp_downstream_420_passthrough}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hj³hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjϳhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݳubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb#c.drm_dp_downstream_420_passthroughasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j#c.drm_dp_downstream_420_passthroughasbuh1hhjubj9)}(hj=Mh]h]}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_dp_downstream_420_passthroughasbuh1hhj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj^ubj)}(hjh]h4}(hjǴhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj9)}(hj=Mh]h]}(hjԴhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhjhMubah}(h]jyah ](j j eh"]h$]h&]j j )j huh1j hjhMhj{hhubj )}(hhh]h)}(hDdetermine downstream facing port YCbCr 4:2:0 pass-through capabilityh]hDdetermine downstream facing port YCbCr 4:2:0 pass-through capability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj{hhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities **Return** whether the downstream facing port can pass through YCbCr 4:2:0h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hj>h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj8ubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjTubah}(h]h ]h"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hjShMhj5ubj| )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjwh]hconst u8 port_cap[4]}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjqubj )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj5ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h?whether the downstream facing port can pass through YCbCr 4:2:0h]h?whether the downstream facing port can pass through YCbCr 4:2:0}(hjȵhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_dp_downstream_444_to_420_conversion (C function))c.drm_dp_downstream_444_to_420_conversionhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hhbool drm_dp_downstream_444_to_420_conversion (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(hgbool drm_dp_downstream_444_to_420_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h'drm_dp_downstream_444_to_420_conversionh]j )}(h'drm_dp_downstream_444_to_420_conversionh]h'drm_dp_downstream_444_to_420_conversion}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(hu8h]hu8}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjSmodnameN classnameNj j )}j ]j%)}jjsb)c.drm_dp_downstream_444_to_420_conversionasbuh1hhj/ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj/ubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jm)c.drm_dp_downstream_444_to_420_conversionasbuh1hhj/ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+ubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjӶhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj϶ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj϶ubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jm)c.drm_dp_downstream_444_to_420_conversionasbuh1hhj϶ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj϶ubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj϶ubj9)}(hjMh]h[}(hj+hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj϶ubj)}(hjh]h4}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj϶ubj9)}(hj=Mh]h]}(hjEhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj϶ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hIdetermine downstream facing port YCbCr 4:4:4->4:2:0 conversion capabilityh]hIdetermine downstream facing port YCbCr 4:4:4->4:2:0 conversion capability}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjkhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities **Return** whether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjȷhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjķhMhjŷubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjķhMhjubj| )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hj#h]hReturn}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hCwhether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0h]hCwhether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 6drm_dp_downstream_rgb_to_ycbcr_conversion (C function)+c.drm_dp_downstream_rgb_to_ycbcr_conversionhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hxbool drm_dp_downstream_rgb_to_ycbcr_conversion (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h]j )}(hwbool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h](j)}(hjIh]hbool}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdhhhjuhMubj )}(h)drm_dp_downstream_rgb_to_ycbcr_conversionh]j )}(h)drm_dp_downstream_rgb_to_ycbcr_conversionh]h)drm_dp_downstream_rgb_to_ycbcr_conversion}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjdhhhjuhMubj)}(hI(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj¸hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjĸmodnameN classnameNj j )}j ]j%)}jjsb+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j޸+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjubj9)}(hj=Mh]h]}(hj,hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hu8h]hu8}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j޸+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubj)}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u8 color_spch](h)}(hhh]j )}(hu8h]hu8}(hjѹhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjιubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjӹmodnameN classnameNj j )}j ]j޸+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjʹubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʹubj )}(h color_spch]h color_spc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjʹubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjdhhhjuhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj`hhhjuhMubah}(h]j[ah ](j j eh"]h$]h&]j j )j huh1j hjuhMhj]hhubj )}(hhh]h)}(hAdetermine downstream facing port RGB->YCbCr conversion capabilityh]hAdetermine downstream facing port RGB->YCbCr conversion capability}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj$hhubah}(h]h ]h"]h$]h&]uh1j hj]hhhjuhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j?j$ j?j% j& j' uh1j hhhj9hNhNubj) )}(hX9**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities ``u8 color_spc`` Colorspace for which conversion cap is sought **Return** whether the downstream facing port can convert RGB->YCbCr for a given colorspace.h](h)}(h**Parameters**h]j3 )}(hjIh]h Parameters}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjCubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjhh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjbubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj~ubah}(h]h ]h"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]uh1j{ hj}hMhj_ubj| )}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj_ubj| )}(h?``u8 color_spc`` Colorspace for which conversion cap is sought h](j )}(h``u8 color_spc``h]j )}(hjںh]h u8 color_spc}(hjܺhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjغubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjԺubj )}(hhh]h)}(h-Colorspace for which conversion cap is soughth]h-Colorspace for which conversion cap is sought}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjԺubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj_ubeh}(h]h ]h"]h$]h&]uh1jv hjCubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjCubh)}(hQwhether the downstream facing port can convert RGB->YCbCr for a given colorspace.h]hQwhether the downstream facing port can convert RGB->YCbCr for a given colorspace.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjCubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_downstream_mode (C function)c.drm_dp_downstream_modehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hstruct drm_display_mode * drm_dp_downstream_mode (struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(hstruct drm_display_mode *drm_dp_downstream_mode(struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM:ubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjghM:ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{modnameN classnameNj j )}j ]j%)}jdrm_dp_downstream_modesbc.drm_dp_downstream_modeasbuh1hhjVhhhjghM:ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVhhhjghM:ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjVhhhjghM:ubj )}(hdrm_dp_downstream_modeh]j )}(hjh]hdrm_dp_downstream_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjVhhhjghM:ubj)}(hS(struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjԻhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjлubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjлubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_downstream_modeasbuh1hhjлubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjлubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjлubj )}(hdevh]hdev}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjлubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj̻ubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hu8h]hu8}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]jc.drm_dp_downstream_modeasbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_downstream_modeasbuh1hhj@ubj9)}(hj=Mh]h]}(hjʼhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj̻ubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޼ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޼ubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_downstream_modeasbuh1hhj޼ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޼ubj )}(hport_caph]hport_cap}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj޼ubj9)}(hjMh]h[}(hj:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj޼ubj)}(hjh]h4}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj޼ubj9)}(hj=Mh]h]}(hjThhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj޼ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj̻ubeh}(h]h ]h"]h$]h&]j j uh1jhjVhhhjghM:ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjRhhhjghM:ubah}(h]jMah ](j j eh"]h$]h&]j j )j huh1j hjghM:hjOhhubj )}(hhh]h)}(h(return a mode for downstream facing porth]h(return a mode for downstream facing port}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM:hjzhhubah}(h]h ]h"]h$]h&]uh1j hjOhhhjghM:ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hXF**Parameters** ``struct drm_device *dev`` DRM device ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Description** Provides a suitable mode for downstream facing ports without EDID. **Return** A new drm_display_mode on success or NULL on failureh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubjw )}(hhh](j| )}(h&``struct drm_device *dev`` DRM device h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM;hjubj )}(hhh]h)}(h DRM deviceh]h DRM device}(hj׽hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjӽhM;hjԽubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjӽhM;hjubj| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM<hj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hM<hjubj| )}(h+``const u8 port_cap[4]`` port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hj0h]hconst u8 port_cap[4]}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM=hj*ubj )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM=hjFubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hjEhM=hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjkh]h Description}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjubh)}(hBProvides a suitable mode for downstream facing ports without EDID.h]hBProvides a suitable mode for downstream facing ports without EDID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjubh)}(h4A new drm_display_mode on success or NULL on failureh]h4A new drm_display_mode on success or NULL on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_dp_downstream_id (C function)c.drm_dp_downstream_idhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h=int drm_dp_downstream_id (struct drm_dp_aux *aux, char id[6])h]j )}(hhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM*hjVubh)}(h **Return**h]j3 )}(hjOh]hReturn}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM,hjVubh)}(hb``True`` if the (e)DP connector has a valid sink count that should be probed, ``false`` otherwise.h](j )}(h``True``h]hTrue}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubhF if the (e)DP connector has a valid sink count that should be probed, }(hjehhhNhNubj )}(h ``false``h]hfalse}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubh otherwise.}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM-hjVubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_read_sink_count (C function)c.drm_dp_read_sink_counthNtauh1j hj9hhhNhNubj )}(hhh](j )}(h3int drm_dp_read_sink_count (struct drm_dp_aux *aux)h]j )}(h2int drm_dp_read_sink_count(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM=ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM=ubj )}(hdrm_dp_read_sink_counth]j )}(hdrm_dp_read_sink_counth]hdrm_dp_read_sink_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM=ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_read_sink_countasbuh1hhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM=ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM=hjhhubj )}(hhh]h)}(h(Retrieve the sink count for a given sinkh]h(Retrieve the sink count for a given sink}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjqhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM=ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use **Description** See also: drm_dp_read_sink_count_cap() **Return** The current sink count reported by **aux**, or a negative error code otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubjw )}(hhh]j| )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubj )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM>hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjubh)}(h&See also: drm_dp_read_sink_count_cap()h]h&See also: drm_dp_read_sink_count_cap()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubh)}(hOThe current sink count reported by **aux**, or a negative error code otherwise.h](h#The current sink count reported by }(hj-hhhNhNubj3 )}(h**aux**h]haux}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-ubh%, or a negative error code otherwise.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMBhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_remote_aux_init (C function)c.drm_dp_remote_aux_inithNtauh1j hj9hhhNhNubj )}(hhh](j )}(h4void drm_dp_remote_aux_init (struct drm_dp_aux *aux)h]j )}(h3void drm_dp_remote_aux_init(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjhhhj|hM ubj )}(hdrm_dp_remote_aux_inith]j )}(hdrm_dp_remote_aux_inith]hdrm_dp_remote_aux_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjjhhhj|hM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_remote_aux_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjjhhhj|hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjfhhhj|hM ubah}(h]jaah ](j j eh"]h$]h&]j j )j huh1j hj|hM hjchhubj )}(hhh]h)}(h)minimally initialise a remote aux channelh]h)minimally initialise a remote aux channel}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj+hhubah}(h]h ]h"]h$]h&]uh1j hjchhhj|hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jFj$ jFj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Used for remote aux channel in general. Merely initialize the crc work struct.h](h)}(h**Parameters**h]j3 )}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjJubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjoh]hstruct drm_dp_aux *aux}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjiubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjfubah}(h]h ]h"]h$]h&]uh1jv hjJubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjJubh)}(hNUsed for remote aux channel in general. Merely initialize the crc work struct.h]hNUsed for remote aux channel in general. Merely initialize the crc work struct.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_aux_init (C function)c.drm_dp_aux_inithNtauh1j hj9hhhNhNubj )}(hhh](j )}(h-void drm_dp_aux_init (struct drm_dp_aux *aux)h]j )}(h,void drm_dp_aux_init(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM% ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM% ubj )}(hdrm_dp_aux_inith]j )}(hdrm_dp_aux_inith]hdrm_dp_aux_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM% ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjLmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_aux_initasbuh1hhj(ubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubj9)}(hjOh]h*}(hjxhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj(ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj$ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM% ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM% ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM% hjhhubj )}(hhh]h)}(h#minimally initialise an aux channelh]h#minimally initialise an aux channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM% hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM% ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hXK**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** If you need to use the drm_dp_aux's i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a :c:type:`drm_connector`), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign :c:type:`drm_dp_aux.drm_dev ` as early as possible so that the :c:type:`drm_device` that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers. For devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM) hjubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM& hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM& hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM& hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj+h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM( hjubh)}(hXsIf you need to use the drm_dp_aux's i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a :c:type:`drm_connector`), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign :c:type:`drm_dp_aux.drm_dev ` as early as possible so that the :c:type:`drm_device` that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers.h](hIf you need to use the drm_dp_aux’s i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a }(hjAhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjKh]h drm_connector}(hjMhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM' hjAubh), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign }(hjAhhhNhNubh)}(h):c:type:`drm_dp_aux.drm_dev `h]j )}(hjoh]hdrm_dp_aux.drm_dev}(hjqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhjhhM' hjAubh" as early as possible so that the }(hjAhhhNhNubh)}(h:c:type:`drm_device`h]j )}(hjh]h drm_device}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjhhM' hjAubhb that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhhM' hjubh)}(hFor devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.h]hFor devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM0 hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_aux_register (C function)c.drm_dp_aux_registerhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h0int drm_dp_aux_register (struct drm_dp_aux *aux)h]j )}(h/int drm_dp_aux_register(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMD ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMD ubj )}(hdrm_dp_aux_registerh]j )}(hdrm_dp_aux_registerh]hdrm_dp_aux_register}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMD ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjEmodnameN classnameNj j )}j ]j%)}jj sbc.drm_dp_aux_registerasbuh1hhj!ubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj9)}(hjOh]h*}(hjqhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj!ubj )}(hauxh]haux}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMD ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMD ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMD hjhhubj )}(hhh]h)}(h#initialise and register aux channelh]h#initialise and register aux channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMD hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMD ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Automatically calls drm_dp_aux_init() if this hasn't been done yet. This should only be called once the parent of **aux**, :c:type:`drm_dp_aux.dev `, is initialized. For devices which are grandparents of their AUX channels, :c:type:`drm_dp_aux.dev ` will typically be the :c:type:`drm_connector` :c:type:`device` which corresponds to **aux**. For these devices, it's advised to call drm_dp_aux_register() in :c:type:`drm_connector_funcs.late_register `, and likewise to call drm_dp_aux_unregister() in :c:type:`drm_connector_funcs.early_unregister `. Functions which don't follow this will likely Oops when ``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV`` is enabled. For devices where the AUX channel is a device that exists independently of the :c:type:`drm_device` that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a :c:type:`drm_device` has been assigned to :c:type:`drm_dp_aux.drm_dev `, and likewise to call drm_dp_aux_unregister() once the :c:type:`drm_device` should no longer be associated with the AUX channel (e.g. on bridge detach). Drivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMH hjubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chME hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhME hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhME hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMG hjubh)}(hXAutomatically calls drm_dp_aux_init() if this hasn't been done yet. This should only be called once the parent of **aux**, :c:type:`drm_dp_aux.dev `, is initialized. For devices which are grandparents of their AUX channels, :c:type:`drm_dp_aux.dev ` will typically be the :c:type:`drm_connector` :c:type:`device` which corresponds to **aux**. For these devices, it's advised to call drm_dp_aux_register() in :c:type:`drm_connector_funcs.late_register `, and likewise to call drm_dp_aux_unregister() in :c:type:`drm_connector_funcs.early_unregister `. Functions which don't follow this will likely Oops when ``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV`` is enabled.h](htAutomatically calls drm_dp_aux_init() if this hasn’t been done yet. This should only be called once the parent of }(hj:hhhNhNubj3 )}(h**aux**h]haux}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubh, }(hj:hhhNhNubh)}(h%:c:type:`drm_dp_aux.dev `h]j )}(hjVh]hdrm_dp_aux.dev}(hjXhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMF hj:ubhL, is initialized. For devices which are grandparents of their AUX channels, }(hj:hhhNhNubh)}(h%:c:type:`drm_dp_aux.dev `h]j )}(hjzh]hdrm_dp_aux.dev}(hj|hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhjshMF hj:ubh will typically be the }(hj:hhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjshMF hj:ubh }(hj:hhhNhNubh)}(h:c:type:`device`h]j )}(hjh]hdevice}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j deviceuh1hhjshMF hj:ubh which corresponds to }(hj:hhhNhNubj3 )}(h**aux**h]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubhE. For these devices, it’s advised to call drm_dp_aux_register() in }(hj:hhhNhNubh)}(hA:c:type:`drm_connector_funcs.late_register `h]j )}(hjh]h!drm_connector_funcs.late_register}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhjshMF hj:ubh2, and likewise to call drm_dp_aux_unregister() in }(hj:hhhNhNubh)}(hD:c:type:`drm_connector_funcs.early_unregister `h]j )}(hjh]h$drm_connector_funcs.early_unregister}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhjshMF hj:ubh<. Functions which don’t follow this will likely Oops when }(hj:hhhNhNubj )}(h%``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV``h]h!CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubh is enabled.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjshMF hjubh)}(hXFor devices where the AUX channel is a device that exists independently of the :c:type:`drm_device` that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a :c:type:`drm_device` has been assigned to :c:type:`drm_dp_aux.drm_dev `, and likewise to call drm_dp_aux_unregister() once the :c:type:`drm_device` should no longer be associated with the AUX channel (e.g. on bridge detach).h](hOFor devices where the AUX channel is a device that exists independently of the }(hjQhhhNhNubh)}(h:c:type:`drm_device`h]j )}(hj[h]h drm_device}(hj]hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMP hjQubhh that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a }(hjQhhhNhNubh)}(h:c:type:`drm_device`h]j )}(hjh]h drm_device}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjxhMP hjQubh has been assigned to }(hjQhhhNhNubh)}(h):c:type:`drm_dp_aux.drm_dev `h]j )}(hjh]hdrm_dp_aux.drm_dev}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_auxuh1hhjxhMP hjQubh8, and likewise to call drm_dp_aux_unregister() once the }(hjQhhhNhNubh)}(h:c:type:`drm_device`h]j )}(hjh]h drm_device}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjxhMP hjQubhM should no longer be associated with the AUX channel (e.g. on bridge detach).}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhMP hjubh)}(hDrivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration.h]hDrivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMW hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM[ hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_dp_aux_unregister (C function)c.drm_dp_aux_unregisterhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h3void drm_dp_aux_unregister (struct drm_dp_aux *aux)h]j )}(h2void drm_dp_aux_unregister(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM| ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&hhhj8hM| ubj )}(hdrm_dp_aux_unregisterh]j )}(hdrm_dp_aux_unregisterh]hdrm_dp_aux_unregister}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&hhhj8hM| ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj )}(h h]h }(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjMsbc.drm_dp_aux_unregisterasbuh1hhjcubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjcubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubah}(h]h ]h"]h$]h&]j j uh1jhj&hhhj8hM| ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"hhhj8hM| ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj8hM| hjhhubj )}(hhh]h)}(hunregister an AUX adapterh]hunregister an AUX adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM| hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj8hM| ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hD**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channelh](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh]j| )}(h2``struct drm_dp_aux *aux`` DisplayPort AUX channelh](j )}(h``struct drm_dp_aux *aux``h]j )}(hj+h]hstruct drm_dp_aux *aux}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj%ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM} hjAubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hM hj"ubah}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_dp_psr_setup_time (C function)c.drm_dp_psr_setup_timehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hGint drm_dp_psr_setup_time (const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h]j )}(hFint drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_psr_setup_timeh]j )}(hdrm_dp_psr_setup_timeh]hdrm_dp_psr_setup_time}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h-(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h]j)}(h+const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_psr_setup_timeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hpsr_caph]hpsr_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hEDP_PSR_RECEIVER_CAP_SIZEh]hEDP_PSR_RECEIVER_CAP_SIZE}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]jc.drm_dp_psr_setup_timeasbuh1hhjubj9)}(hj=Mh]h]}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj}hhhjhM ubah}(h]jxah ](j j eh"]h$]h&]j j )j huh1j hjhM hjzhhubj )}(hhh]h)}(hPSR setup in time usech]hPSR setup in time usec}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjphhubah}(h]h ]h"]h$]h&]uh1j hjzhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]`` PSR capabilities from DPCD **Return** PSR setup time for the panel in microseconds, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh]j| )}(hK``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]`` PSR capabilities from DPCD h](j )}(h/``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]``h]j )}(hjh]h+const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hPSR capabilities from DPCDh]hPSR capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hNPSR setup time for the panel in microseconds, negative error code on failure.h]hNPSR setup time for the panel in microseconds, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_start_crc (C function)c.drm_dp_start_crchNtauh1j hj9hhhNhNubj )}(hhh](j )}(hDint drm_dp_start_crc (struct drm_dp_aux *aux, struct drm_crtc *crtc)h]j )}(hCint drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc)h](j)}(hinth]hint}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhjBhM ubj )}(hdrm_dp_start_crch]j )}(hdrm_dp_start_crch]hdrm_dp_start_crc}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ](j j eh"]h$]h&]j j uh1j hj0hhhjBhM ubj)}(h/(struct drm_dp_aux *aux, struct drm_crtc *crtc)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjWsbc.drm_dp_start_crcasbuh1hhjmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjmubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjiubj)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_start_crcasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hcrtch]hcrtc}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjiubeh}(h]h ]h"]h$]h&]j j uh1jhj0hhhjBhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj,hhhjBhM ubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j hjBhM hj)hhubj )}(hhh]h)}(hstart capture of frame CRCsh]hstart capture of frame CRCs}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjahhubah}(h]h ]h"]h$]h&]uh1j hj)hhhjBhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j|j$ j|j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_crtc *crtc`` CRTC displaying the frames whose CRCs are to be captured **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(hS``struct drm_crtc *crtc`` CRTC displaying the frames whose CRCs are to be captured h](j )}(h``struct drm_crtc *crtc``h]j )}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(h8CRTC displaying the frames whose CRCs are to be capturedh]h8CRTC displaying the frames whose CRCs are to be captured}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_stop_crc (C function)c.drm_dp_stop_crchNtauh1j hj9hhhNhNubj )}(hhh](j )}(h,int drm_dp_stop_crc (struct drm_dp_aux *aux)h]j )}(h+int drm_dp_stop_crc(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjlhM ubj )}(hdrm_dp_stop_crch]j )}(hdrm_dp_stop_crch]hdrm_dp_stop_crc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZhhhjlhM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_stop_crcasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjZhhhjlhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjVhhhjlhM ubah}(h]jQah ](j j eh"]h$]h&]j j )j huh1j hjlhM hjShhubj )}(hhh]h)}(hstop capture of frame CRCsh]hstop capture of frame CRCs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjShhhjlhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j6j$ j6j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj:ubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj_h]hstruct drm_dp_aux *aux}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjYubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthM hjuubah}(h]h ]h"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]uh1j{ hjthM hjVubah}(h]h ]h"]h$]h&]uh1jv hj:ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj:ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_read_desc (C function)c.drm_dp_read_deschNtauh1j hj9hhhNhNubj )}(hhh](j )}(hWint drm_dp_read_desc (struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h]j )}(hVint drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMA ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMA ubj )}(hdrm_dp_read_desch]j )}(hdrm_dp_read_desch]hdrm_dp_read_desc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMA ubj)}(hB(struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_read_descasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_desc *desch](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_desch]h drm_dp_desc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jVc.drm_dp_read_descasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdesch]hdesc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hbool is_branchh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h is_branchh]h is_branch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMA ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMA ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMA hjhhubj )}(hhh]h)}(h%read sink/branch descriptor from DPCDh]h%read sink/branch descriptor from DPCD}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMA hj@hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMA ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j[j$ j[j% j& j' uh1j hhhj9hNhNubj) )}(hXv**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_desc *desc`` Device descriptor to fill from DPCD ``bool is_branch`` true for branch devices, false for sink devices **Description** Read DPCD 0x400 (sink) or 0x500 (branch) into **desc**. Also debug log the identification. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjeh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chME hj_ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMB hj~ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMB hjubah}(h]h ]h"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMB hj{ubj| )}(hA``struct drm_dp_desc *desc`` Device descriptor to fill from DPCD h](j )}(h``struct drm_dp_desc *desc``h]j )}(hjh]hstruct drm_dp_desc *desc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMC hjubj )}(hhh]h)}(h#Device descriptor to fill from DPCDh]h#Device descriptor to fill from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMC hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMC hj{ubj| )}(hC``bool is_branch`` true for branch devices, false for sink devices h](j )}(h``bool is_branch``h]j )}(hjh]hbool is_branch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMD hjubj )}(hhh]h)}(h/true for branch devices, false for sink devicesh]h/true for branch devices, false for sink devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMD hj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMD hj{ubeh}(h]h ]h"]h$]h&]uh1jv hj_ubh)}(h**Description**h]j3 )}(hj1h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMF hj_ubh)}(hZRead DPCD 0x400 (sink) or 0x500 (branch) into **desc**. Also debug log the identification.h](h.Read DPCD 0x400 (sink) or 0x500 (branch) into }(hjGhhhNhNubj3 )}(h**desc**h]hdesc}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh$. Also debug log the identification.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chME hj_ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMH hj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_dump_lttpr_desc (C function)c.drm_dp_dump_lttpr_deschNtauh1j hj9hhhNhNubj )}(hhh](j )}(hKint drm_dp_dump_lttpr_desc (struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h]j )}(hJint drm_dp_dump_lttpr_desc(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_ ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM_ ubj )}(hdrm_dp_dump_lttpr_desch]j )}(hdrm_dp_dump_lttpr_desch]hdrm_dp_dump_lttpr_desc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM_ ubj)}(h0(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_dump_lttpr_descasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(henum drm_dp_phy dp_phyh](j )}(hj7h]henum}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(h drm_dp_phyh]h drm_dp_phy}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]jc.drm_dp_dump_lttpr_descasbuh1hhjBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(hdp_phyh]hdp_phy}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM_ ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM_ ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM_ hjhhubj )}(hhh]h)}(h2read and dump the DPCD descriptor for an LTTPR PHYh]h2read and dump the DPCD descriptor for an LTTPR PHY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM_ ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX)**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``enum drm_dp_phy dp_phy`` LTTPR PHY instance **Description** Read the DPCD LTTPR PHY descriptor for **dp_phy** and print a debug message with its details to dmesg. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM` hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM` hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM` hjubj| )}(h.``enum drm_dp_phy dp_phy`` LTTPR PHY instance h](j )}(h``enum drm_dp_phy dp_phy``h]j )}(hj4h]henum drm_dp_phy dp_phy}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMa hj.ubj )}(hhh]h)}(hLTTPR PHY instanceh]hLTTPR PHY instance}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMa hjJubah}(h]h ]h"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]uh1j{ hjIhMa hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjoh]h Description}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjmubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubh)}(hfRead the DPCD LTTPR PHY descriptor for **dp_phy** and print a debug message with its details to dmesg.h](h'Read the DPCD LTTPR PHY descriptor for }(hjhhhNhNubj3 )}(h **dp_phy**h]hdp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh5 and print a debug message with its details to dmesg.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMb hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMe hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dp_dsc_sink_bpp_incr (C function)c.drm_dp_dsc_sink_bpp_incrhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hIu8 drm_dp_dsc_sink_bpp_incr (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j )}(hHu8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dp_dsc_sink_bpp_incrsbc.drm_dp_dsc_sink_bpp_incrasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM{ ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM{ ubj )}(hdrm_dp_dsc_sink_bpp_incrh]j )}(hjh]hdrm_dp_dsc_sink_bpp_incr}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM{ ubj)}(h-(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hu8h]hu8}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjGmodnameN classnameNj j )}j ]jc.drm_dp_dsc_sink_bpp_incrasbuh1hhj#ubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hdsc_dpcdh]hdsc_dpcd}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj#ubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_dsc_sink_bpp_incrasbuh1hhj#ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM{ ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM{ ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM{ hjhhubj )}(hhh]h)}(hGet bits per pixel incrementh]hGet bits per pixel increment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM{ hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM{ ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD **Description** Returns the bpp precision supported by the DP sink.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh]j| )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]j )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM| hjubj )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM| hj-ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj,hM| hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjRh]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjPubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM~ hjubh)}(h3Returns the bpp precision supported by the DP sink.h]h3Returns the bpp precision supported by the DP sink.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM} hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_dp_dsc_slice_count_to_mask (C function) c.drm_dp_dsc_slice_count_to_maskhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h4u32 drm_dp_dsc_slice_count_to_mask (int slice_count)h]j )}(h3u32 drm_dp_dsc_slice_count_to_mask(int slice_count)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dp_dsc_slice_count_to_masksb c.drm_dp_dsc_slice_count_to_maskasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_dsc_slice_count_to_maskh]j )}(hjh]hdrm_dp_dsc_slice_count_to_mask}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h(int slice_count)h]j)}(hint slice_counth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h slice_counth]h slice_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h+Convert a slice count to a slice count maskh]h+Convert a slice count to a slice count mask}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj,hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jGj$ jGj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``int slice_count`` slice count **Description** Convert **slice_count** to a slice count mask. Returns the slice count mask.h](h)}(h**Parameters**h]j3 )}(hjQh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjKubjw )}(hhh]j| )}(h ``int slice_count`` slice count h](j )}(h``int slice_count``h]j )}(hjph]hint slice_count}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjjubj )}(hhh]h)}(h slice counth]h slice count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjgubah}(h]h ]h"]h$]h&]uh1jv hjKubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjKubh)}(h.Convert **slice_count** to a slice count mask.h](hConvert }(hjhhhNhNubj3 )}(h**slice_count**h]h slice_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh to a slice count mask.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjKubh)}(hReturns the slice count mask.h]hReturns the slice count mask.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjKubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_dsc_sink_slice_count_mask (C function)"c.drm_dp_dsc_sink_slice_count_maskhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h_u32 drm_dp_dsc_sink_slice_count_mask (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h]j )}(h^u32 drm_dp_dsc_sink_slice_count_mask(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j drm_dp_dsc_sink_slice_count_masksb"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj5hM ubj )}(h drm_dp_dsc_sink_slice_count_maskh]j )}(hj2h]h drm_dp_dsc_sink_slice_count_mask}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj5hM ubj)}(h:(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhj_ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(h bool is_edph](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(his_edph]his_edp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj5hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj5hM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj5hM hjhhubj )}(hhh]h)}(h+Get the mask of valid DSC sink slice countsh]h+Get the mask of valid DSC sink slice counts}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjChhubah}(h]h ]h"]h$]h&]uh1j hjhhhj5hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j^j$ j^j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` the sink's DSC DPCD capabilities ``bool is_edp`` ``true`` for an eDP sink **Description** Get the mask of supported slice counts from the sink's DSC DPCD register. **Return** Mask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn't support any slicesh](h)}(h**Parameters**h]j3 )}(hjhh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjbubjw )}(hhh](j| )}(hQ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` the sink's DSC DPCD capabilities h](j )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]j )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(h the sink's DSC DPCD capabilitiesh]h"the sink’s DSC DPCD capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hj~ubj| )}(h)``bool is_edp`` ``true`` for an eDP sink h](j )}(h``bool is_edp``h]j )}(hjh]h bool is_edp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(h``true`` for an eDP sinkh](j )}(h``true``h]htrue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh for an eDP sink}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hj~ubeh}(h]h ]h"]h$]h&]uh1jv hjbubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjbubh)}(hIGet the mask of supported slice counts from the sink's DSC DPCD register.h]hKGet the mask of supported slice counts from the sink’s DSC DPCD register.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjbubh)}(h **Return**h]j3 )}(hj0h]hReturn}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjbubh)}(hMask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn't support any slicesh]hMask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn’t support any slices}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjbubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_dsc_sink_max_slice_count (C function)!c.drm_dp_dsc_sink_max_slice_counthNtauh1j hj9hhhNhNubj )}(hhh](j )}(h]u8 drm_dp_dsc_sink_max_slice_count (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h]j )}(h\u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](h)}(hhh]j )}(hu8h]hu8}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j%)}jdrm_dp_dsc_sink_max_slice_countsb!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjqhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqhhhjhM ubj )}(hdrm_dp_dsc_sink_max_slice_counth]j )}(hjh]hdrm_dp_dsc_sink_max_slice_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjqhhhjhM ubj)}(h:(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]j!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjubj9)}(hj=Mh]h]}(hjMhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool is_edph](j)}(hjIh]hbool}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(his_edph]his_edp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjqhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjmhhhjhM ubah}(h]jhah ](j j eh"]h$]h&]j j )j huh1j hjhM hjjhhubj )}(hhh]h)}(h2Get the max slice count supported by the DSC sink.h]h2Get the max slice count supported by the DSC sink.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD ``bool is_edp`` true if its eDP, false for DP **Description** Read the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Maximum slice count supported by DSC sink or 0 its invalidh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh](j| )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]j )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(h.``bool is_edp`` true if its eDP, false for DP h](j )}(h``bool is_edp``h]j )}(hj$h]h bool is_edp}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(htrue if its eDP, false for DPh]htrue if its eDP, false for DP}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hM hj:ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj9hM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hXRead the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the }(hjuhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]j )}(hjh]hstruct drm_dsc_config}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjuubhO by the driver. Driver creates an infoframe using these parameters to populate }(hjuhhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]j )}(hjh]hstruct drm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_pps_infoframeuh1hhjhM hjuubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h:Maximum slice count supported by DSC sink or 0 its invalidh]h:Maximum slice count supported by DSC sink or 0 its invalid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_dp_dsc_sink_line_buf_depth (C function) c.drm_dp_dsc_sink_line_buf_depthhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hOu8 drm_dp_dsc_sink_line_buf_depth (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j )}(hNu8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dp_dsc_sink_line_buf_depthsb c.drm_dp_dsc_sink_line_buf_depthasbuh1hhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj5hM ubj )}(hdrm_dp_dsc_sink_line_buf_depthh]j )}(hj2h]hdrm_dp_dsc_sink_line_buf_depth}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj5hM ubj)}(h-(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0 c.drm_dp_dsc_sink_line_buf_depthasbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0 c.drm_dp_dsc_sink_line_buf_depthasbuh1hhj_ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj5hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj5hM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj5hM hjhhubj )}(hhh]h)}(h!Get the line buffer depth in bitsh]h!Get the line buffer depth in bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj5hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j*j$ j*j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD **Description** Read the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Line buffer depth supported by DSC panel or 0 its invalidh](h)}(h**Parameters**h]j3 )}(hj4h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj2ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubjw )}(hhh]j| )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]j )}(hjSh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjMubj )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhM hjiubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjhhM hjJubah}(h]h ]h"]h$]h&]uh1jv hj.ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubh)}(hXRead the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the }(hjhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]j )}(hjh]hstruct drm_dsc_config}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubhO by the driver. Driver creates an infoframe using these parameters to populate }(hjhhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]j )}(hjh]hstruct drm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_pps_infoframeuh1hhjhM hjubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hj.ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubh)}(h9Line buffer depth supported by DSC panel or 0 its invalidh]h9Line buffer depth supported by DSC panel or 0 its invalid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_dp_dsc_sink_supported_input_bpcs (C function)&c.drm_dp_dsc_sink_supported_input_bpcshNtauh1j hj9hhhNhNubj )}(hhh](j )}(heint drm_dp_dsc_sink_supported_input_bpcs (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h]j )}(hdint drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhjNhM ubj )}(h$drm_dp_dsc_sink_supported_input_bpcsh]j )}(h$drm_dp_dsc_sink_supported_input_bpcsh]h$drm_dp_dsc_sink_supported_input_bpcs}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj<hhhjNhM ubj)}(h<(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjcsb&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhjyubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj )}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjyubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhjyubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjyubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubj)}(h u8 dsc_bpc[3]h](h)}(hhh]j )}(hu8h]hu8}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]j&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhjubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdsc_bpch]hdsc_bpc}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjZhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj)}(h3h]h3}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj9)}(hj=Mh]h]}(hjuhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjuubeh}(h]h ]h"]h$]h&]j j uh1jhj<hhhjNhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj8hhhjNhM ubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j hjNhM hj5hhubj )}(hhh]h)}(hFGet all the input bits per component values supported by the DSC sink.h]hFGet all the input bits per component values supported by the DSC sink.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj5hhhjNhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD ``u8 dsc_bpc[3]`` An array to be filled by this helper with supported input bpcs. **Description** Read the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Number of input BPC values parsed from the DPCDh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh](j| )}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](j )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]j )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(hR``u8 dsc_bpc[3]`` An array to be filled by this helper with supported input bpcs. h](j )}(h``u8 dsc_bpc[3]``h]j )}(hjh]h u8 dsc_bpc[3]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(h?An array to be filled by this helper with supported input bpcs.h]h?An array to be filled by this helper with supported input bpcs.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj-hM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjTh]h Description}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hXRead the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the }(hjjhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]j )}(hjth]hstruct drm_dsc_config}(hjvhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjjubhO by the driver. Driver creates an infoframe using these parameters to populate }(hjjhhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]j )}(hjh]hstruct drm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_pps_infoframeuh1hhjhM hjjubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM& hjubh)}(h/Number of input BPC values parsed from the DPCDh]h/Number of input BPC values parsed from the DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM' hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_dp_dsc_sink_max_slice_throughput (C function)&c.drm_dp_dsc_sink_max_slice_throughputhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hint drm_dp_dsc_sink_max_slice_throughput (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h]j )}(h~int drm_dp_dsc_sink_max_slice_throughput(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMN ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMN ubj )}(h$drm_dp_dsc_sink_max_slice_throughputh]j )}(h$drm_dp_dsc_sink_max_slice_throughputh]h$drm_dp_dsc_sink_max_slice_throughput}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMN ubj)}(hV(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubh)}(hhh]j )}(hu8h]hu8}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjcmodnameN classnameNj j )}j ]j%)}jj)sb&c.drm_dp_dsc_sink_max_slice_throughputasbuh1hhj?ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubj )}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj?ubh)}(hhh]j )}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j}&c.drm_dp_dsc_sink_max_slice_throughputasbuh1hhj?ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj?ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubj)}(hint peak_pixel_rateh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hpeak_pixel_rateh]hpeak_pixel_rate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubj)}(hbool is_rgb_yuv444h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h is_rgb_yuv444h]h is_rgb_yuv444}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMN ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMN ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMN hjhhubj )}(hhh]h)}(h3Get a DSC sink's maximum pixel throughput per sliceh]h5Get a DSC sink’s maximum pixel throughput per slice}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMN hjZhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMN ubeh}(h]h ](j functioneh"]h$]h&]j" j j# juj$ juj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC sink's capabilities from DPCD ``int peak_pixel_rate`` Cumulative peak pixel rate in kHz ``bool is_rgb_yuv444`` The mode is either RGB or YUV444 **Description** Return the DSC sink device's maximum pixel throughput per slice, based on the device's **dsc_dpcd** capabilities, the **peak_pixel_rate** of the transferred stream(s) and whether the output format **is_rgb_yuv444** or yuv422/yuv420. Note that **peak_pixel_rate** is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile's slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count):: @peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_count **Return** The maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMR hjyubjw )}(hhh](j| )}(hR``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC sink's capabilities from DPCD h](j )}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]j )}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMO hjubj )}(hhh]h)}(h!DSC sink's capabilities from DPCDh]h#DSC sink’s capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMO hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMO hjubj| )}(h:``int peak_pixel_rate`` Cumulative peak pixel rate in kHz h](j )}(h``int peak_pixel_rate``h]j )}(hjh]hint peak_pixel_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMP hjubj )}(hhh]h)}(h!Cumulative peak pixel rate in kHzh]h!Cumulative peak pixel rate in kHz}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMP hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMP hjubj| )}(h8``bool is_rgb_yuv444`` The mode is either RGB or YUV444 h](j )}(h``bool is_rgb_yuv444``h]j )}(hjh]hbool is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMQ hj ubj )}(hhh]h)}(h The mode is either RGB or YUV444h]h The mode is either RGB or YUV444}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMQ hj&ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj%hMQ hjubeh}(h]h ]h"]h$]h&]uh1jv hjyubh)}(h**Description**h]j3 )}(hjKh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMS hjyubh)}(hReturn the DSC sink device's maximum pixel throughput per slice, based on the device's **dsc_dpcd** capabilities, the **peak_pixel_rate** of the transferred stream(s) and whether the output format **is_rgb_yuv444** or yuv422/yuv420.h](h[Return the DSC sink device’s maximum pixel throughput per slice, based on the device’s }(hjahhhNhNubj3 )}(h **dsc_dpcd**h]hdsc_dpcd}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubh capabilities, the }(hjahhhNhNubj3 )}(h**peak_pixel_rate**h]hpeak_pixel_rate}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubh< of the transferred stream(s) and whether the output format }(hjahhhNhNubj3 )}(h**is_rgb_yuv444**h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubh or yuv422/yuv420.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMR hjyubh)}(hNote that **peak_pixel_rate** is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile's slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count)::h](h Note that }(hjhhhNhNubj3 )}(h**peak_pixel_rate**h]hpeak_pixel_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile’s slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count):}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMV hjyubjN )}(h@peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_counth]h@peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_count}hjsbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM[ hjyubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hjyubh)}(hWThe maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.h]hWThe maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM` hjyubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 5drm_dp_dsc_branch_max_overall_throughput (C function)*c.drm_dp_dsc_branch_max_overall_throughputhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hsint drm_dp_dsc_branch_max_overall_throughput (const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h]j )}(hrint drm_dp_dsc_branch_max_overall_throughput(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj+hM ubj )}(h(drm_dp_dsc_branch_max_overall_throughputh]j )}(h(drm_dp_dsc_branch_max_overall_throughputh]h(drm_dp_dsc_branch_max_overall_throughput}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj+hM ubj)}(hF(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h](j)}(h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]h](j )}(hjch]hconst}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubh)}(hhh]j )}(hu8h]hu8}(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjzmodnameN classnameNj j )}j ]j%)}jj@sb*c.drm_dp_dsc_branch_max_overall_throughputasbuh1hhjVubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj )}(hdsc_branch_dpcdh]hdsc_branch_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjVubh)}(hhh]j )}(hDP_DSC_BRANCH_CAP_SIZEh]hDP_DSC_BRANCH_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j*c.drm_dp_dsc_branch_max_overall_throughputasbuh1hhjVubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjVubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjRubj)}(hbool is_rgb_yuv444h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h is_rgb_yuv444h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjRubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj+hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj+hM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj+hM hjhhubj )}(hhh]h)}(h0Branch device's max overall DSC pixel throughputh]h2Branch device’s max overall DSC pixel throughput}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj<hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj+hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jWj$ jWj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD ``bool is_rgb_yuv444`` The mode is either RGB or YUV444 **Description** Return the branch device's maximum overall DSC pixel throughput, based on the device's DPCD DSC branch capabilities, and whether the output format **is_rgb_yuv444** or yuv422/yuv420. **Return** - 0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device. - > 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h](h)}(h**Parameters**h]j3 )}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj_ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj[ubjw )}(hhh](j| )}(hW``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD h](j )}(h4``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]``h]j )}(hjh]h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjzubj )}(hhh]h)}(h!DSC branch capabilities from DPCDh]h!DSC branch capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjwubj| )}(h8``bool is_rgb_yuv444`` The mode is either RGB or YUV444 h](j )}(h``bool is_rgb_yuv444``h]j )}(hjh]hbool is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(h The mode is either RGB or YUV444h]h The mode is either RGB or YUV444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjwubeh}(h]h ]h"]h$]h&]uh1jv hj[ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj[ubh)}(hReturn the branch device's maximum overall DSC pixel throughput, based on the device's DPCD DSC branch capabilities, and whether the output format **is_rgb_yuv444** or yuv422/yuv420.h](hReturn the branch device’s maximum overall DSC pixel throughput, based on the device’s DPCD DSC branch capabilities, and whether the output format }(hj hhhNhNubj3 )}(h**is_rgb_yuv444**h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh or yuv422/yuv420.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj[ubh)}(h **Return**h]j3 )}(hj-h]hReturn}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj[ubh)}(hhh](h)}(hX 0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h]jw )}(hhh]j| )}(h0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h](j )}(hB0: The maximum overall throughput capability is not indicated byh]hB0: The maximum overall throughput capability is not indicated by}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjMubj )}(hhh]h)}(hthe device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h](hWthe device separately and it must be determined from the per-slice max throughput (see }(hjchhhNhNubj3 )}(h.**drm_dp_dsc_branch_slice_max_throughput\(\)**h]h*drm_dp_dsc_branch_slice_max_throughput()}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubh6) and the maximum slice count supported by the device.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj`ubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hj_hM hjJubah}(h]h ]h"]h$]h&]uh1jv hjFubah}(h]h ]h"]h$]h&]uh1hhjCubh)}(ha> 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h]jw )}(hhh]j| )}(h\> 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h](j )}(hE> 0: The maximum overall DSC pixel throughput supported by the branchh]hE> 0: The maximum overall DSC pixel throughput supported by the branch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hdevice in kPixels/sec.h]hdevice in kPixels/sec.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubah}(h]h ]h"]h$]h&]uh1jv hjubah}(h]h ]h"]h$]h&]uh1hhjCubeh}(h]h ]h"]h$]h&]jNj<uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_dsc_branch_max_line_width (C function)"c.drm_dp_dsc_branch_max_line_widthhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hWint drm_dp_dsc_branch_max_line_width (const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h]j )}(hVint drm_dp_dsc_branch_max_line_width(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h drm_dp_dsc_branch_max_line_widthh]j )}(h drm_dp_dsc_branch_max_line_widthh]h drm_dp_dsc_branch_max_line_width}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h2(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h]j)}(h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]h](j )}(hjch]hconst}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hu8h]hu8}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j%)}jj*sb"c.drm_dp_dsc_branch_max_line_widthasbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(hdsc_branch_dpcdh]hdsc_branch_dpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubh)}(hhh]j )}(hDP_DSC_BRANCH_CAP_SIZEh]hDP_DSC_BRANCH_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j~"c.drm_dp_dsc_branch_max_line_widthasbuh1hhj@ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h"Branch device's max DSC line widthh]h$Branch device’s max DSC line width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj9hNhNubj) )}(hXL**Parameters** ``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD **Description** Return the branch device's maximum overall DSC line width, based on the device's **dsc_branch_dpcd** capabilities. **Return** - 0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device. - ``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels). - >= 5120: The maximum line width in pixels.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh]j| )}(hW``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD h](j )}(h4``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]``h]j )}(hj6h]h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj0ubj )}(hhh]h)}(h!DSC branch capabilities from DPCDh]h!DSC branch capabilities from DPCD}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhM hjLubah}(h]h ]h"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]uh1j{ hjKhM hj-ubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjqh]h Description}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjoubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hrReturn the branch device's maximum overall DSC line width, based on the device's **dsc_branch_dpcd** capabilities.h](hUReturn the branch device’s maximum overall DSC line width, based on the device’s }(hjhhhNhNubj3 )}(h**dsc_branch_dpcd**h]hdsc_branch_dpcd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh capabilities.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hhh](h)}(h0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device.h]jw )}(hhh]j| )}(h0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device.h](j )}(h?0: The maximum line width is not indicated by the deviceh]h?0: The maximum line width is not indicated by the device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hjseparately and it must be determined from the maximum slice count and slice-width supported by the device.h]hjseparately and it must be determined from the maximum slice count and slice-width supported by the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubah}(h]h ]h"]h$]h&]uh1jv hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hZ``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels).h]jw )}(hhh]j| )}(hP``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels).h](j )}(h?``-EINVAL``: The device indicates an invalid maximum line widthh](j )}(h ``-EINVAL``h]h-EINVAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh4: The device indicates an invalid maximum line width}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj )}(hhh]h)}(h(< 5120 pixels).h]h(< 5120 pixels).}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj.ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj-hM hj ubah}(h]h ]h"]h$]h&]uh1jv hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h+>= 5120: The maximum line width in pixels.h]h)}(hjZh]h+>= 5120: The maximum line width in pixels.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjXubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNj<uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_dp_read_lttpr_common_caps (C function)c.drm_dp_read_lttpr_common_capshNtauh1j hj9hhhNhNubj )}(hhh](j )}(hint drm_dp_read_lttpr_common_caps (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(hint drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_read_lttpr_common_capsh]j )}(hdrm_dp_read_lttpr_common_capsh]hdrm_dp_read_lttpr_common_caps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h`(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_read_lttpr_common_capsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(hu8h]hu8}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjBubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjBubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h!u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hj!hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]jc.drm_dp_read_lttpr_common_capsasbuh1hhjubj9)}(hj=Mh]h]}(hjOhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h"read the LTTPR common capabilitiesh]h"read the LTTPR common capabilities}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjuhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hXT**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` buffer to return the capability info in **Description** Read capabilities common to all LTTPRs. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(hN``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` buffer to return the capability info in h](j )}(h%``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]j )}(hj+h]h!u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj%ubj )}(hhh]h)}(h'buffer to return the capability info inh]h'buffer to return the capability info in}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hM hjAubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjfh]h Description}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjdubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h'Read capabilities common to all LTTPRs.h]h'Read capabilities common to all LTTPRs.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_read_lttpr_phy_caps (C function)c.drm_dp_read_lttpr_phy_capshNtauh1j hj9hhhNhNubj )}(hhh](j )}(hint drm_dp_read_lttpr_phy_caps (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j )}(hint drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_read_lttpr_phy_capsh]j )}(hdrm_dp_read_lttpr_phy_capsh]hdrm_dp_read_lttpr_phy_caps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hu(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_read_lttpr_phy_capsasbuh1hhjubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjChhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j1c.drm_dp_read_lttpr_phy_capsasbuh1hhjeubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjeubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j1c.drm_dp_read_lttpr_phy_capsasbuh1hhjeubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjeubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(henum drm_dp_phy dp_phyh](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_phyh]h drm_dp_phy}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j1c.drm_dp_read_lttpr_phy_capsasbuh1hhjubj )}(h h]h }(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdp_phyh]hdp_phy}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 caps[DP_LTTPR_PHY_CAP_SIZE]h](h)}(hhh]j )}(hu8h]hu8}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjomodnameN classnameNj j )}j ]j1c.drm_dp_read_lttpr_phy_capsasbuh1hhjfubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjfubh)}(hhh]j )}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j1c.drm_dp_read_lttpr_phy_capsasbuh1hhjfubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h+read the capabilities for a given LTTPR PHYh]h+read the capabilities for a given LTTPR PHY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``enum drm_dp_phy dp_phy`` LTTPR PHY to read the capabilities for ``u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` buffer to return the capability info in **Description** Read the capabilities for the given LTTPR PHY. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj?h]hstruct drm_dp_aux *aux}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj9ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThM hjUubah}(h]h ]h"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]uh1j{ hjThM hj6ubj| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjxh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjrubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hj6ubj| )}(hB``enum drm_dp_phy dp_phy`` LTTPR PHY to read the capabilities for h](j )}(h``enum drm_dp_phy dp_phy``h]j )}(hjh]henum drm_dp_phy dp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(h<TPR PHY to read the capabilities forh]h<TPR PHY to read the capabilities for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hj6ubj| )}(hK``u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` buffer to return the capability info in h](j )}(h"``u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]j )}(hjh]hu8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(h'buffer to return the capability info inh]h'buffer to return the capability info in}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hj6ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj%h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h.Read the capabilities for the given LTTPR PHY.h]h.Read the capabilities for the given LTTPR PHY.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_lttpr_count (C function)c.drm_dp_lttpr_counthNtauh1j hj9hhhNhNubj )}(hhh](j )}(h@int drm_dp_lttpr_count (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(h?int drm_dp_lttpr_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjuhhhjhM ubj )}(hdrm_dp_lttpr_counth]j )}(hdrm_dp_lttpr_counth]hdrm_dp_lttpr_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjuhhhjhM ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_lttpr_countasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]jc.drm_dp_lttpr_countasbuh1hhjubj9)}(hj=Mh]h]}(hj>hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjuhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjqhhhjhM ubah}(h]jlah ](j j eh"]h$]h&]j j )j huh1j hjhM hjnhhubj )}(hhh]h)}(h!get the number of detected LTTPRsh]h!get the number of detected LTTPRs}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjdhhubah}(h]h ]h"]h$]h&]uh1j hjnhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hXp**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Get the number of detected LTTPRs from the LTTPR common capabilities info. **Return** -ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRsh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM# hjubjw )}(hhh]j| )}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](j )}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]j )}(hjh]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM" hjubh)}(hJGet the number of detected LTTPRs from the LTTPR common capabilities info.h]hJGet the number of detected LTTPRs from the LTTPR common capabilities info.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM! hjubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM# hjubh)}(h-ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRsh]h-ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRs}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM$ hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_lttpr_max_link_rate (C function)c.drm_dp_lttpr_max_link_ratehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hHint drm_dp_lttpr_max_link_rate (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(hGint drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM; ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKhhhj]hM; ubj )}(hdrm_dp_lttpr_max_link_rateh]j )}(hdrm_dp_lttpr_max_link_rateh]hdrm_dp_lttpr_max_link_rate}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubah}(h]h ](j j eh"]h$]h&]j j uh1j hjKhhhj]hM; ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjrsbc.drm_dp_lttpr_max_link_rateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_lttpr_max_link_rateasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjKhhhj]hM; ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjGhhhj]hM; ubah}(h]jBah ](j j eh"]h$]h&]j j )j huh1j hj]hM; hjDhhubj )}(hhh]h)}(h1get the maximum link rate supported by all LTTPRsh]h1get the maximum link rate supported by all LTTPRs}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM; hj:hhubah}(h]h ]h"]h$]h&]uh1j hjDhhhj]hM; ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jUj$ jUj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Returns the maximum link rate supported by all detected LTTPRs.h](h)}(h**Parameters**h]j3 )}(hj_h]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM? hjYubjw )}(hhh]j| )}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](j )}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]j )}(hj~h]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM< hjxubj )}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM< hjubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjhM< hjuubah}(h]h ]h"]h$]h&]uh1jv hjYubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM> hjYubh)}(h?Returns the maximum link rate supported by all detected LTTPRs.h]h?Returns the maximum link rate supported by all detected LTTPRs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM= hjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_dp_lttpr_set_transparent_mode (C function)#c.drm_dp_lttpr_set_transparent_modehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hKint drm_dp_lttpr_set_transparent_mode (struct drm_dp_aux *aux, bool enable)h]j )}(hJint drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMI ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMI ubj )}(h!drm_dp_lttpr_set_transparent_modeh]j )}(h!drm_dp_lttpr_set_transparent_modeh]h!drm_dp_lttpr_set_transparent_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMI ubj)}(h%(struct drm_dp_aux *aux, bool enable)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]j%)}jj!sb#c.drm_dp_lttpr_set_transparent_modeasbuh1hhj7ubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj7ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubj)}(h bool enableh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(henableh]henable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMI ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMI ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj hMI hjhhubj )}(hhh]h)}(h!set the LTTPR in transparent modeh]h!set the LTTPR in transparent mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMI hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMI ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable`` Enable or disable transparent mode **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMM hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj3h]hstruct drm_dp_aux *aux}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMJ hj-ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMJ hjIubah}(h]h ]h"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]uh1j{ hjHhMJ hj*ubj| )}(h3``bool enable`` Enable or disable transparent mode h](j )}(h``bool enable``h]j )}(hjlh]h bool enable}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMK hjfubj )}(hhh]h)}(h"Enable or disable transparent modeh]h"Enable or disable transparent mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMK hjubah}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hjhMK hj*ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMM hjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_lttpr_init (C function)c.drm_dp_lttpr_inithNtauh1j hj9hhhNhNubj )}(hhh](j )}(h?int drm_dp_lttpr_init (struct drm_dp_aux *aux, int lttpr_count)h]j )}(h>int drm_dp_lttpr_init(struct drm_dp_aux *aux, int lttpr_count)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM] ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM] ubj )}(hdrm_dp_lttpr_inith]j )}(hdrm_dp_lttpr_inith]hdrm_dp_lttpr_init}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM] ubj)}(h)(struct drm_dp_aux *aux, int lttpr_count)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_lttpr_initasbuh1hhj%ubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubj)}(hint lttpr_counth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h lttpr_counth]h lttpr_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM] ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM] ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM] hjhhubj )}(hhh]h)}(h5init LTTPR transparency mode according to DP standardh]h5init LTTPR transparency mode according to DP standard}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM] hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM] ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX#**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int lttpr_count`` Number of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMa hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj"h]hstruct drm_dp_aux *aux}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM^ hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hM^ hj8ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj7hM^ hjubj| )}(h``int lttpr_count`` Number of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count(). h](j )}(h``int lttpr_count``h]j )}(hj[h]hint lttpr_count}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMa hjUubj )}(hhh]h)}(hNumber of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count().h]hNumber of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count().}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hjqubah}(h]h ]h"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]uh1j{ hjphMa hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_lttpr_max_lane_count (C function)c.drm_dp_lttpr_max_lane_counthNtauh1j hj9hhhNhNubj )}(hhh](j )}(hIint drm_dp_lttpr_max_lane_count (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j )}(hHint drm_dp_lttpr_max_lane_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_lttpr_max_lane_counth]j )}(hdrm_dp_lttpr_max_lane_counth]hdrm_dp_lttpr_max_lane_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_lttpr_max_lane_countasbuh1hhjubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjshhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jSc.drm_dp_lttpr_max_lane_countasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h2get the maximum lane count supported by all LTTPRsh]h2get the maximum lane count supported by all LTTPRs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Returns the maximum lane count supported by all detected LTTPRs.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh]j| )}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](j )}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]j )}(hj h]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj!ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hM hjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjDubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h@Returns the maximum lane count supported by all detected LTTPRs.h]h@Returns the maximum lane count supported by all detected LTTPRs.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 9drm_dp_lttpr_voltage_swing_level_3_supported (C function).c.drm_dp_lttpr_voltage_swing_level_3_supportedhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hXbool drm_dp_lttpr_voltage_swing_level_3_supported (const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j )}(hWbool drm_dp_lttpr_voltage_swing_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(h,drm_dp_lttpr_voltage_swing_level_3_supportedh]j )}(h,drm_dp_lttpr_voltage_swing_level_3_supportedh]h,drm_dp_lttpr_voltage_swing_level_3_supported}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h&(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb.c.drm_dp_lttpr_voltage_swing_level_3_supportedasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcapsh]hcaps}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hj! hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hj1 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj. ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3 modnameN classnameNj j )}j ]j .c.drm_dp_lttpr_voltage_swing_level_3_supportedasbuh1hhjubj9)}(hj=Mh]h]}(hjO hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(hcheck for LTTPR vswing3 supporth]hcheck for LTTPR vswing3 support}(hjx hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hju hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities **Description** Returns true if the **caps** for an LTTPR TX PHY indicate support for voltage swing level 3.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubjw )}(hhh]j| )}(h@``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities h](j )}(h(``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]j )}(hj h]h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj )}(hhh]h)}(hLTTPR PHY capabilitiesh]hLTTPR PHY capabilities}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hM hj ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubh)}(h\Returns true if the **caps** for an LTTPR TX PHY indicate support for voltage swing level 3.h](hReturns true if the }(hj hhhNhNubj3 )}(h**caps**h]hcaps}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh@ for an LTTPR TX PHY indicate support for voltage swing level 3.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 8drm_dp_lttpr_pre_emphasis_level_3_supported (C function)-c.drm_dp_lttpr_pre_emphasis_level_3_supportedhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hWbool drm_dp_lttpr_pre_emphasis_level_3_supported (const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j )}(hVbool drm_dp_lttpr_pre_emphasis_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hjIh]hbool}(hjK hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjY hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG hhhjX hM ubj )}(h+drm_dp_lttpr_pre_emphasis_level_3_supportedh]j )}(h+drm_dp_lttpr_pre_emphasis_level_3_supportedh]h+drm_dp_lttpr_pre_emphasis_level_3_supported}(hjk hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjg ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjG hhhjX hM ubj)}(h&(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]h](j )}(hjch]hconst}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hu8h]hu8}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjm sb-c.drm_dp_lttpr_pre_emphasis_level_3_supportedasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hcapsh]hcaps}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjMh]h[}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubh)}(hhh]j )}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j -c.drm_dp_lttpr_pre_emphasis_level_3_supportedasbuh1hhj ubj9)}(hj=Mh]h]}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjG hhhjX hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjC hhhjX hM ubah}(h]j> ah ](j j eh"]h$]h&]j j )j huh1j hjX hM hj@ hhubj )}(hhh]h)}(h check for LTTPR preemph3 supporth]h check for LTTPR preemph3 support}(hj8 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj5 hhubah}(h]h ]h"]h$]h&]uh1j hj@ hhhjX hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jP j$ jP j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities **Description** Returns true if the **caps** for an LTTPR TX PHY indicate support for pre-emphasis level 3.h](h)}(h**Parameters**h]j3 )}(hjZ h]h Parameters}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjX ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjT ubjw )}(hhh]j| )}(h@``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities h](j )}(h(``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]j )}(hjy h]h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjw ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjs ubj )}(hhh]h)}(hLTTPR PHY capabilitiesh]hLTTPR PHY capabilities}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j hjs ubeh}(h]h ]h"]h$]h&]uh1j{ hj hM hjp ubah}(h]h ]h"]h$]h&]uh1jv hjT ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjT ubh)}(h[Returns true if the **caps** for an LTTPR TX PHY indicate support for pre-emphasis level 3.h](hReturns true if the }(hj hhhNhNubj3 )}(h**caps**h]hcaps}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh? for an LTTPR TX PHY indicate support for pre-emphasis level 3.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjT ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_get_phy_test_pattern (C function)c.drm_dp_get_phy_test_patternhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h]int drm_dp_get_phy_test_pattern (struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h]j )}(h\int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj hM ubj )}(hdrm_dp_get_phy_test_patternh]j )}(hdrm_dp_get_phy_test_patternh]hdrm_dp_get_phy_test_pattern}(hj, hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj( ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj hM ubj)}(h=(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjH hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjD ubj )}(h h]h }(hjU hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjD ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjf hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjh modnameN classnameNj j )}j ]j%)}jj. sbc.drm_dp_get_phy_test_patternasbuh1hhjD ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjD ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjD ubj )}(hauxh]haux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjD ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ ubj)}(h#struct drm_dp_phy_test_params *datah](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_phy_test_paramsh]hdrm_dp_phy_test_params}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j c.drm_dp_get_phy_test_patternasbuh1hhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hdatah]hdata}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ ubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhj hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj hM ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj hM hj hhubj )}(hhh]h)}(h(get the requested pattern from the sink.h]h(get the requested pattern from the sink.}(hj; hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj8 hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jS j$ jS j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj] h]h Parameters}(hj_ hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[ ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjW ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj| h]hstruct drm_dp_aux *aux}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjv ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j hjv ubeh}(h]h ]h"]h$]h&]uh1j{ hj hM hjs ubj| )}(hK``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. h](j )}(h'``struct drm_dp_phy_test_params *data``h]j )}(hj h]h#struct drm_dp_phy_test_params *data}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj )}(hhh]h)}(h"DP phy compliance test parameters.h]h"DP phy compliance test parameters.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hM hjs ubeh}(h]h ]h"]h$]h&]uh1jv hjW ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjW ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjW ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_set_phy_test_pattern (C function)c.drm_dp_set_phy_test_patternhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hhint drm_dp_set_phy_test_pattern (struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data, u8 dp_rev)h]j )}(hgint drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data, u8 dp_rev)h](j)}(hinth]hint}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1hhhjChM ubj )}(hdrm_dp_set_phy_test_patternh]j )}(hdrm_dp_set_phy_test_patternh]hdrm_dp_set_phy_test_pattern}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ](j j eh"]h$]h&]j j uh1j hj1hhhjChM ubj)}(hH(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data, u8 dp_rev)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjXsbc.drm_dp_set_phy_test_patternasbuh1hhjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjnubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubj)}(h#struct drm_dp_phy_test_params *datah](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_phy_test_paramsh]hdrm_dp_phy_test_params}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_set_phy_test_patternasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj.hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdatah]hdata}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubj)}(h u8 dp_revh](h)}(hhh]j )}(hu8h]hu8}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]jc.drm_dp_set_phy_test_patternasbuh1hhjPubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubj )}(hdp_revh]hdp_rev}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubeh}(h]h ]h"]h$]h&]j j uh1jhj1hhhjChM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj-hhhjChM ubah}(h]j(ah ](j j eh"]h$]h&]j j )j huh1j hjChM hj*hhubj )}(hhh]h)}(hset the pattern to the sink.h]hset the pattern to the sink.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj*hhhjCh M ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. ``u8 dp_rev`` DP revision to use for compliance testing **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(hK``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. h](j )}(h'``struct drm_dp_phy_test_params *data``h]j )}(hj'h]h#struct drm_dp_phy_test_params *data}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj!ubj )}(hhh]h)}(h"DP phy compliance test parameters.h]h"DP phy compliance test parameters.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hM hj=ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hM hjubj| )}(h8``u8 dp_rev`` DP revision to use for compliance testing h](j )}(h ``u8 dp_rev``h]j )}(hj`h]h u8 dp_rev}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjZubj )}(hhh]h)}(h)DP revision to use for compliance testingh]h)DP revision to use for compliance testing}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhM hjvubah}(h]h ]h"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjuhM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_as_sdp_supported (C function)c.drm_dp_as_sdp_supportedhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hZbool drm_dp_as_sdp_supported (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j )}(hYbool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj )}(hdrm_dp_as_sdp_supportedh]j )}(hdrm_dp_as_sdp_supportedh]hdrm_dp_as_sdp_supported}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(h=(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_as_sdp_supportedasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jVc.drm_dp_as_sdp_supportedasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jVc.drm_dp_as_sdp_supportedasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(h'check if adaptive sync sdp is supportedh]h'check if adaptive sync sdp is supported}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj:hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jUj$ jUj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data **Description** Returns true if adaptive sync sdp is supported, else returns falseh](h)}(h**Parameters**h]j3 )}(hj_h]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjYubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj~h]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjxubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjuubj| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjuubeh}(h]h ]h"]h$]h&]uh1jv hjYubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjYubh)}(hBReturns true if adaptive sync sdp is supported, else returns falseh]hBReturns true if adaptive sync sdp is supported, else returns false}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dp_vsc_sdp_supported (C function)c.drm_dp_vsc_sdp_supportedhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h[bool drm_dp_vsc_sdp_supported (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j )}(hZbool drm_dp_vsc_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hjIh]hbool}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhjDhM ubj )}(hdrm_dp_vsc_sdp_supportedh]j )}(hdrm_dp_vsc_sdp_supportedh]hdrm_dp_vsc_sdp_supported}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhjDhM ubj)}(h=(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjYsbc.drm_dp_vsc_sdp_supportedasbuh1hhjoubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjoubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_vsc_sdp_supportedasbuh1hhjubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]jc.drm_dp_vsc_sdp_supportedasbuh1hhjubj9)}(hj=Mh]h]}(hjkhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjkubeh}(h]h ]h"]h$]h&]j j uh1jhj3hhhjDhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj/hhhjDhM ubah}(h]j*ah ](j j eh"]h$]h&]j j )j huh1j hjDhM hj,hhubj )}(hhh]h)}(hcheck if vsc sdp is supportedh]hcheck if vsc sdp is supported}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj,hhhjDhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data **Description** Returns true if vsc sdp is supported, else returns falseh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjubj| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hM hj$ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj#hM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjIh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h8Returns true if vsc sdp is supported, else returns falseh]h8Returns true if vsc sdp is supported, else returns false}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_vsc_sdp_pack (C function)c.drm_dp_vsc_sdp_packhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hRssize_t drm_dp_vsc_sdp_pack (const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h]j )}(hQssize_t drm_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dp_vsc_sdp_packsbc.drm_dp_vsc_sdp_packasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_vsc_sdp_packh]j )}(hjh]hdrm_dp_vsc_sdp_pack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h6(const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h](j)}(h const struct drm_dp_vsc_sdp *vsch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_vsc_sdph]hdrm_dp_vsc_sdp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_vsc_sdp_packasbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjEhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hvsch]hvsc}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct dp_sdp *sdph](j )}(hj h]hstruct}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubh)}(hhh]j )}(hdp_sdph]hdp_sdp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_vsc_sdp_packasbuh1hhjgubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjgubj )}(hsdph]hsdp}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h(pack a given vsc sdp into generic dp_sdph]h(pack a given vsc sdp into generic dp_sdp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hXE**Parameters** ``const struct drm_dp_vsc_sdp *vsc`` vsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification ``struct dp_sdp *sdp`` valid handle to the generic dp_sdp which will be packed **Description** Returns length of sdp on success and error code on failureh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubjw )}(hhh](j| )}(h``const struct drm_dp_vsc_sdp *vsc`` vsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification h](j )}(h$``const struct drm_dp_vsc_sdp *vsc``h]j )}(hj-h]h const struct drm_dp_vsc_sdp *vsc}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj'ubj )}(hhh]h)}(hmvsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specificationh]hmvsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjCubah}(h]h ]h"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]uh1j{ hjBhMhj$ubj| )}(hO``struct dp_sdp *sdp`` valid handle to the generic dp_sdp which will be packed h](j )}(h``struct dp_sdp *sdp``h]j )}(hjgh]hstruct dp_sdp *sdp}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjaubj )}(hhh]h)}(h7valid handle to the generic dp_sdp which will be packedh]h7valid handle to the generic dp_sdp which will be packed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj}ubah}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hj|hMhj$ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h:Returns length of sdp on success and error code on failureh]h:Returns length of sdp on success and error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_get_pcon_max_frl_bw (C function)c.drm_dp_get_pcon_max_frl_bwhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hZint drm_dp_get_pcon_max_frl_bw (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j )}(hYint drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM\ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM\ubj )}(hdrm_dp_get_pcon_max_frl_bwh]j )}(hdrm_dp_get_pcon_max_frl_bwh]hdrm_dp_get_pcon_max_frl_bw}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM\ubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hu8h]hu8}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]j%)}jj sbc.drm_dp_get_pcon_max_frl_bwasbuh1hhj ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hdpcdh]hdpcd}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjMh]h[}(hj~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j^c.drm_dp_get_pcon_max_frl_bwasbuh1hhj ubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst u8 port_cap[4]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j^c.drm_dp_get_pcon_max_frl_bwasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj)}(hjh]h4}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj9)}(hj=Mh]h]}(hj6hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM\ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM\ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM\hjhhubj )}(hhh]h)}(hmaximum frl supported by PCONh]hmaximum frl supported by PCON}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM\hj\hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM\ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jwj$ jwj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Description** Returns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM`hj{ubjw )}(hhh](j| )}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM]hjubj )}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM]hjubj| )}(h+``const u8 port_cap[4]`` port capabilities h](j )}(h``const u8 port_cap[4]``h]j )}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM^hjubj )}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM^hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM^hjubeh}(h]h ]h"]h$]h&]uh1jv hj{ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM`hj{ubh)}(hTReturns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.h]hTReturns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_hj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_pcon_frl_prepare (C function)c.drm_dp_pcon_frl_preparehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hOint drm_dp_pcon_frl_prepare (struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h]j )}(hNint drm_dp_pcon_frl_prepare(struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h](j)}(hinth]hint}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUhhhjghMubj )}(hdrm_dp_pcon_frl_prepareh]j )}(hdrm_dp_pcon_frl_prepareh]hdrm_dp_pcon_frl_prepare}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ](j j eh"]h$]h&]j j uh1j hjUhhhjghMubj)}(h3(struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj|sbc.drm_dp_pcon_frl_prepareasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hbool enable_frl_ready_hpdh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(henable_frl_ready_hpdh]henable_frl_ready_hpd}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjUhhhjghMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjQhhhjghMubah}(h]jLah ](j j eh"]h$]h&]j j )j huh1j hjghMhjNhhubj )}(hhh]h)}(hPrepare PCON for FRL.h]hPrepare PCON for FRL.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJhhubah}(h]h ]h"]h$]h&]uh1j hjNhhhjghMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jej$ jej% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable_frl_ready_hpd`` Configure DP_PCON_ENABLE_HPD_READY. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hjoh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjmubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjiubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hB``bool enable_frl_ready_hpd`` Configure DP_PCON_ENABLE_HPD_READY. h](j )}(h``bool enable_frl_ready_hpd``h]j )}(hjh]hbool enable_frl_ready_hpd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(h#Configure DP_PCON_ENABLE_HPD_READY.h]h#Configure DP_PCON_ENABLE_HPD_READY.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjiubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjiubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dp_pcon_is_frl_ready (C function)c.drm_dp_pcon_is_frl_readyhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h6bool drm_dp_pcon_is_frl_ready (struct drm_dp_aux *aux)h]j )}(h5bool drm_dp_pcon_is_frl_ready(struct drm_dp_aux *aux)h](j)}(hjIh]hbool}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjChhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjChhhjThMubj )}(hdrm_dp_pcon_is_frl_readyh]j )}(hdrm_dp_pcon_is_frl_readyh]hdrm_dp_pcon_is_frl_ready}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ](j j eh"]h$]h&]j j uh1j hjChhhjThMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjisbc.drm_dp_pcon_is_frl_readyasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubah}(h]h ]h"]h$]h&]j j uh1jhjChhhjThMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj?hhhjThMubah}(h]j:ah ](j j eh"]h$]h&]j j )j huh1j hjThMhj<hhubj )}(hhh]h)}(hIs PCON ready for FRLh]hIs PCON ready for FRL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj<hhhjThMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns true if success, else returns false.h](h)}(h**Parameters**h]j3 )}(hj(h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj"ubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjGh]hstruct drm_dp_aux *aux}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjAubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj]ubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hj\hMhj>ubah}(h]h ]h"]h$]h&]uh1jv hj"ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj"ubh)}(h,Returns true if success, else returns false.h]h,Returns true if success, else returns false.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_pcon_frl_configure_1 (C function)c.drm_dp_pcon_frl_configure_1hNtauh1j hj9hhhNhNubj )}(hhh](j )}(hWint drm_dp_pcon_frl_configure_1 (struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h]j )}(hVint drm_dp_pcon_frl_configure_1(struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_pcon_frl_configure_1h]j )}(hdrm_dp_pcon_frl_configure_1h]hdrm_dp_pcon_frl_configure_1}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h7(struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_pcon_frl_configure_1asbuh1hhjubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjPhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint max_frl_gbpsh](j)}(hinth]hint}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj )}(h max_frl_gbpsh]h max_frl_gbps}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u8 frl_modeh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j>c.drm_dp_pcon_frl_configure_1asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hfrl_modeh]hfrl_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h!Set HDMI LINK Configuration-Step1h]h!Set HDMI LINK Configuration-Step1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int max_frl_gbps`` maximum frl bw to be configured between PCON and HDMI sink ``u8 frl_mode`` FRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hj&h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjEh]hstruct drm_dp_aux *aux}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj?ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hjZhMhj<ubj| )}(hP``int max_frl_gbps`` maximum frl bw to be configured between PCON and HDMI sink h](j )}(h``int max_frl_gbps``h]j )}(hj~h]hint max_frl_gbps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjxubj )}(hhh]h)}(h:maximum frl bw to be configured between PCON and HDMI sinkh]h:maximum frl bw to be configured between PCON and HDMI sink}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj<ubj| )}(h``u8 frl_mode`` FRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training. h](j )}(h``u8 frl_mode``h]j )}(hjh]h u8 frl_mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj )}(hhh]h)}(hFRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training.h]hFRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj<ubeh}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_pcon_frl_configure_2 (C function)c.drm_dp_pcon_frl_configure_2hNtauh1j hj9hhhNhNubj )}(hhh](j )}(hWint drm_dp_pcon_frl_configure_2 (struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h]j )}(hVint drm_dp_pcon_frl_configure_2(struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h](j)}(hinth]hint}(hj8 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4 hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjG hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4 hhhjF hMubj )}(hdrm_dp_pcon_frl_configure_2h]j )}(hdrm_dp_pcon_frl_configure_2h]hdrm_dp_pcon_frl_configure_2}(hjY hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjU ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj4 hhhjF hMubj)}(h7(struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hju hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jj[ sbc.drm_dp_pcon_frl_configure_2asbuh1hhjq ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjq ubj )}(hauxh]haux}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjm ubj)}(hint max_frl_maskh](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h max_frl_maskh]h max_frl_mask}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjm ubj)}(h u8 frl_typeh](h)}(hhh]j )}(hu8h]hu8}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!!modnameN classnameNj j )}j ]j c.drm_dp_pcon_frl_configure_2asbuh1hhj!ubj )}(h h]h }(hj=!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(hfrl_typeh]hfrl_type}(hjK!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjm ubeh}(h]h ]h"]h$]h&]j j uh1jhj4 hhhjF hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj0 hhhjF hMubah}(h]j+ ah ](j j eh"]h$]h&]j j )j huh1j hjF hMhj- hhubj )}(hhh]h)}(h"Set HDMI Link configuration Step-2h]h"Set HDMI Link configuration Step-2}(hju!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjr!hhubah}(h]h ]h"]h$]h&]uh1j hj- hhhjF hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j!j$ j!j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int max_frl_mask`` Max FRL BW to be tried by the PCON with HDMI Sink ``u8 frl_type`` FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hj!h]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj!ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj!h]hstruct drm_dp_aux *aux}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj!ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj!ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj!hMhj!ubj| )}(hG``int max_frl_mask`` Max FRL BW to be tried by the PCON with HDMI Sink h](j )}(h``int max_frl_mask``h]j )}(hj!h]hint max_frl_mask}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj!ubj )}(hhh]h)}(h1Max FRL BW to be tried by the PCON with HDMI Sinkh]h1Max FRL BW to be tried by the PCON with HDMI Sink}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMhj"ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj"hMhj!ubj| )}(hX``u8 frl_type`` FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON. h](j )}(h``u8 frl_type``h]j )}(hj("h]h u8 frl_type}(hj*"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&"ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj""ubj )}(hhh]h)}(hX FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON.h]hX FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON.}(hjA"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj>"ubah}(h]h ]h"]h$]h&]uh1j hj""ubeh}(h]h ]h"]h$]h&]uh1j{ hj="hMhj!ubeh}(h]h ]h"]h$]h&]uh1jv hj!ubh)}(h**Description**h]j3 )}(hjd"h]h Description}(hjf"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjb"ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj!ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hjz"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_pcon_reset_frl_config (C function)c.drm_dp_pcon_reset_frl_confighNtauh1j hj9hhhNhNubj )}(hhh](j )}(h9int drm_dp_pcon_reset_frl_config (struct drm_dp_aux *aux)h]j )}(h8int drm_dp_pcon_reset_frl_config(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj"hMubj )}(hdrm_dp_pcon_reset_frl_configh]j )}(hdrm_dp_pcon_reset_frl_configh]hdrm_dp_pcon_reset_frl_config}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhj"hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj#modnameN classnameNj j )}j ]j%)}jj"sbc.drm_dp_pcon_reset_frl_configasbuh1hhj"ubj )}(h h]h }(hj$#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj9)}(hjOh]h*}(hj2#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"ubj )}(hauxh]haux}(hj?#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj"ubah}(h]h ]h"]h$]h&]j j uh1jhj"hhhj"hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"hhhj"hMubah}(h]j"ah ](j j eh"]h$]h&]j j )j huh1j hj"hMhj"hhubj )}(hhh]h)}(hRe-Set HDMI Link configuration.h]hRe-Set HDMI Link configuration.}(hji#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjf#hhubah}(h]h ]h"]h$]h&]uh1j hj"hhhj"hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j#j$ j#j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hj#h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj#ubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj#h]hstruct drm_dp_aux *aux}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj#ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj#ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj#hMhj#ubah}(h]h ]h"]h$]h&]uh1jv hj#ubh)}(h**Description**h]j3 )}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj#ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_pcon_frl_enable (C function)c.drm_dp_pcon_frl_enablehNtauh1j hj9hhhNhNubj )}(hhh](j )}(h3int drm_dp_pcon_frl_enable (struct drm_dp_aux *aux)h]j )}(h2int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj*$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&$hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj9$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&$hhhj8$hMubj )}(hdrm_dp_pcon_frl_enableh]j )}(hdrm_dp_pcon_frl_enableh]hdrm_dp_pcon_frl_enable}(hjK$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&$hhhj8$hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjg$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc$ubj )}(h h]h }(hjt$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc$ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j%)}jjM$sbc.drm_dp_pcon_frl_enableasbuh1hhjc$ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc$ubj9)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjc$ubj )}(hauxh]haux}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc$ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_$ubah}(h]h ]h"]h$]h&]j j uh1jhj&$hhhj8$hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"$hhhj8$hMubah}(h]j$ah ](j j eh"]h$]h&]j j )j huh1j hj8$hMhj$hhubj )}(hhh]h)}(hEnable HDMI link through FRLh]hEnable HDMI link through FRL}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj$hhubah}(h]h ]h"]h$]h&]uh1j hj$hhhj8$hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j%j$ j%j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hj %h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj %ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%ubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj+%h]hstruct drm_dp_aux *aux}(hj-%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)%ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%%ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjD%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@%hMhjA%ubah}(h]h ]h"]h$]h&]uh1j hj%%ubeh}(h]h ]h"]h$]h&]uh1j{ hj@%hMhj"%ubah}(h]h ]h"]h$]h&]uh1jv hj%ubh)}(h**Description**h]j3 )}(hjf%h]h Description}(hjh%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjd%ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj|%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_pcon_hdmi_link_active (C function)c.drm_dp_pcon_hdmi_link_activehNtauh1j hj9hhhNhNubj )}(hhh](j )}(h:bool drm_dp_pcon_hdmi_link_active (struct drm_dp_aux *aux)h]j )}(h9bool drm_dp_pcon_hdmi_link_active(struct drm_dp_aux *aux)h](j)}(hjIh]hbool}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM3ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%hhhj%hM3ubj )}(hdrm_dp_pcon_hdmi_link_activeh]j )}(hdrm_dp_pcon_hdmi_link_activeh]hdrm_dp_pcon_hdmi_link_active}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj%hhhj%hM3ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j%)}jj%sbc.drm_dp_pcon_hdmi_link_activeasbuh1hhj%ubj )}(h h]h }(hj%&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hj3&hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hauxh]haux}(hj@&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj%ubah}(h]h ]h"]h$]h&]j j uh1jhj%hhhj%hM3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj%hhhj%hM3ubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j hj%hM3hj%hhubj )}(hhh]h)}(h-check if the PCON HDMI LINK status is active.h]h-check if the PCON HDMI LINK status is active.}(hjj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM3hjg&hhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj%hM3ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j&j$ j&j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns true if link is active else returns false.h](h)}(h**Parameters**h]j3 )}(hj&h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM7hj&ubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj&h]hstruct drm_dp_aux *aux}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM4hj&ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hM4hj&ubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hM4hj&ubah}(h]h ]h"]h$]h&]uh1jv hj&ubh)}(h**Description**h]j3 )}(hj&h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM6hj&ubh)}(h2Returns true if link is active else returns false.h]h2Returns true if link is active else returns false.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM5hj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_pcon_hdmi_link_mode (C function)c.drm_dp_pcon_hdmi_link_modehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hMint drm_dp_pcon_hdmi_link_mode (struct drm_dp_aux *aux, u8 *frl_trained_mask)h]j )}(hLint drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, u8 *frl_trained_mask)h](j)}(hinth]hint}(hj+'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj''hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMFubj )}(h h]h }(hj:'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj''hhhj9'hMFubj )}(hdrm_dp_pcon_hdmi_link_modeh]j )}(hdrm_dp_pcon_hdmi_link_modeh]hdrm_dp_pcon_hdmi_link_mode}(hjL'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjH'ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj''hhhj9'hMFubj)}(h.(struct drm_dp_aux *aux, u8 *frl_trained_mask)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjh'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd'ubj )}(h h]h }(hju'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd'ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j%)}jjN'sbc.drm_dp_pcon_hdmi_link_modeasbuh1hhjd'ubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd'ubj9)}(hjOh]h*}(hj'hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjd'ubj )}(hauxh]haux}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjd'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`'ubj)}(hu8 *frl_trained_maskh](h)}(hhh]j )}(hu8h]hu8}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj'modnameN classnameNj j )}j ]j'c.drm_dp_pcon_hdmi_link_modeasbuh1hhj'ubj )}(h h]h }(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj9)}(hjOh]h*}(hj (hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj'ubj )}(hfrl_trained_maskh]hfrl_trained_mask}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj`'ubeh}(h]h ]h"]h$]h&]j j uh1jhj''hhhj9'hMFubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#'hhhj9'hMFubah}(h]j'ah ](j j eh"]h$]h&]j j )j huh1j hj9'hMFhj 'hhubj )}(hhh]h)}(hget the PCON HDMI LINK MODEh]hget the PCON HDMI LINK MODE}(hj@(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMFhj=(hhubah}(h]h ]h"]h$]h&]uh1j hj 'hhhj9'hMFubeh}(h]h ](j functioneh"]h$]h&]j" j j# jX(j$ jX(j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 *frl_trained_mask`` pointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set. **Description** Returns the link mode : TMDS or FRL on success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hjb(h]h Parameters}(hjd(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`(ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMJhj\(ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj(h]hstruct drm_dp_aux *aux}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMGhj{(ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMGhj(ubah}(h]h ]h"]h$]h&]uh1j hj{(ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hMGhjx(ubj| )}(h``u8 *frl_trained_mask`` pointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set. h](j )}(h``u8 *frl_trained_mask``h]j )}(hj(h]hu8 *frl_trained_mask}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMKhj(ubj )}(hhh]h)}(hpointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set.h]hpointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMHhj(ubah}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hMKhjx(ubeh}(h]h ]h"]h$]h&]uh1jv hj\(ubh)}(h**Description**h]j3 )}(hj(h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMMhj\(ubh)}(hQReturns the link mode : TMDS or FRL on success, else returns negative error code.h]hQReturns the link mode : TMDS or FRL on success, else returns negative error code.}(hj )hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMLhj\(ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_dp_pcon_hdmi_frl_link_error_count (C function)'c.drm_dp_pcon_hdmi_frl_link_error_counthNtauh1j hj9hhhNhNubj )}(hhh](j )}(hdvoid drm_dp_pcon_hdmi_frl_link_error_count (struct drm_dp_aux *aux, struct drm_connector *connector)h]j )}(hcvoid drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj;)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7)hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMdubj )}(h h]h }(hjJ)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7)hhhjI)hMdubj )}(h%drm_dp_pcon_hdmi_frl_link_error_counth]j )}(h%drm_dp_pcon_hdmi_frl_link_error_counth]h%drm_dp_pcon_hdmi_frl_link_error_count}(hj\)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjX)ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7)hhhjI)hMdubj)}(h9(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjx)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt)ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]j%)}jj^)sb'c.drm_dp_pcon_hdmi_frl_link_error_countasbuh1hhjt)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt)ubj9)}(hjOh]h*}(hj)hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjt)ubj )}(hauxh]haux}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjp)ubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj *modnameN classnameNj j )}j ]j)'c.drm_dp_pcon_hdmi_frl_link_error_countasbuh1hhj)ubj )}(h h]h }(hj&*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjOh]h*}(hj4*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj )}(h connectorh]h connector}(hjA*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjp)ubeh}(h]h ]h"]h$]h&]j j uh1jhj7)hhhjI)hMdubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3)hhhjI)hMdubah}(h]j.)ah ](j j eh"]h$]h&]j j )j huh1j hjI)hMdhj0)hhubj )}(hhh]h)}(hMprint the error count per lane during link failure between PCON and HDMI sinkh]hMprint the error count per lane during link failure between PCON and HDMI sink}(hjk*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMdhjh*hhubah}(h]h ]h"]h$]h&]uh1j hj0)hhhjI)hMdubeh}(h]h ](j functioneh"]h$]h&]j" j j# j*j$ j*j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_connector *connector`` DRM connector code.h](h)}(h**Parameters**h]j3 )}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj*ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhhj*ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj*h]hstruct drm_dp_aux *aux}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMfhj*ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMfhj*ubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hj*hMfhj*ubj| )}(h7``struct drm_connector *connector`` DRM connector code.h](j )}(h#``struct drm_connector *connector``h]j )}(hj*h]hstruct drm_connector *connector}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMghj*ubj )}(hhh]h)}(hDRM connector code.h]hDRM connector code.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMghj*ubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hj*hMghj*ubeh}(h]h ]h"]h$]h&]uh1jv hj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_pcon_pps_default (C function)c.drm_dp_pcon_pps_defaulthNtauh1j hj9hhhNhNubj )}(hhh](j )}(h4int drm_dp_pcon_pps_default (struct drm_dp_aux *aux)h]j )}(h3int drm_dp_pcon_pps_default(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj>+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:+hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj )}(h h]h }(hjM+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:+hhhjL+hM ubj )}(hdrm_dp_pcon_pps_defaulth]j )}(hdrm_dp_pcon_pps_defaulth]hdrm_dp_pcon_pps_default}(hj_+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[+ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj:+hhhjL+hM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj{+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw+ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw+ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj+modnameN classnameNj j )}j ]j%)}jja+sbc.drm_dp_pcon_pps_defaultasbuh1hhjw+ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw+ubj9)}(hjOh]h*}(hj+hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjw+ubj )}(hauxh]haux}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjs+ubah}(h]h ]h"]h$]h&]j j uh1jhj:+hhhjL+hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj6+hhhjL+hM ubah}(h]j1+ah ](j j eh"]h$]h&]j j )j huh1j hjL+hM hj3+hhubj )}(hhh]h)}(hOLet PCON fill the default pps parameters for DSC1.2 between PCON & HDMI2.1 sinkh]hOLet PCON fill the default pps parameters for DSC1.2 between PCON & HDMI2.1 sink}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj+hhubah}(h]h ]h"]h$]h&]uh1j hj3+hhhjL+hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j,j$ j,j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 on success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hj ,h]h Parameters}(hj",hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj,ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj,ubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj?,h]hstruct drm_dp_aux *aux}(hjA,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=,ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj9,ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjX,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjT,hM hjU,ubah}(h]h ]h"]h$]h&]uh1j hj9,ubeh}(h]h ]h"]h$]h&]uh1j{ hjT,hM hj6,ubah}(h]h ]h"]h$]h&]uh1jv hj,ubh)}(h**Description**h]j3 )}(hjz,h]h Description}(hj|,hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjx,ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj,ubh)}(h7Returns 0 on success, else returns negative error code.h]h7Returns 0 on success, else returns negative error code.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM hj,ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_pcon_pps_override_buf (C function)c.drm_dp_pcon_pps_override_bufhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hJint drm_dp_pcon_pps_override_buf (struct drm_dp_aux *aux, u8 pps_buf[128])h]j )}(hIint drm_dp_pcon_pps_override_buf(struct drm_dp_aux *aux, u8 pps_buf[128])h](j)}(hinth]hint}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj,hMubj )}(hdrm_dp_pcon_pps_override_bufh]j )}(hdrm_dp_pcon_pps_override_bufh]hdrm_dp_pcon_pps_override_buf}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj,hMubj)}(h)(struct drm_dp_aux *aux, u8 pps_buf[128])h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj -hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]j%)}jj,sbc.drm_dp_pcon_pps_override_bufasbuh1hhj,ubj )}(h h]h }(hj:-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj9)}(hjOh]h*}(hjH-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj,ubj )}(hauxh]haux}(hjU-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubj)}(hu8 pps_buf[128]h](h)}(hhh]j )}(hu8h]hu8}(hjq-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjn-ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjs-modnameN classnameNj j )}j ]j6-c.drm_dp_pcon_pps_override_bufasbuh1hhjj-ubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjj-ubj )}(hpps_bufh]hpps_buf}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjj-ubj9)}(hjMh]h[}(hj-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjj-ubj)}(h128h]h128}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjj-ubj9)}(hj=Mh]h]}(hj-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjj-ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj,ubeh}(h]h ]h"]h$]h&]j j uh1jhj,hhhj,hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj,hhhj,hMubah}(h]j,ah ](j j eh"]h$]h&]j j )j huh1j hj,hMhj,hhubj )}(hhh]h)}(h3Configure PPS encoder override buffer for HDMI sinkh]h3Configure PPS encoder override buffer for HDMI sink}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-hhubah}(h]h ]h"]h$]h&]uh1j hj,hhhj,hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j.j$ j.j% j& j' uh1j hhhj9hNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 pps_buf[128]`` 128 bytes to be written into PPS buffer for HDMI sink by PCON. **Description** Returns 0 on success, else returns negative error code.h](h)}(h**Parameters**h]j3 )}(hj.h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj .ubjw )}(hhh](j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj0.h]hstruct drm_dp_aux *aux}(hj2.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj..ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj*.ubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjI.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjE.hMhjF.ubah}(h]h ]h"]h$]h&]uh1j hj*.ubeh}(h]h ]h"]h$]h&]uh1j{ hjE.hMhj'.ubj| )}(hS``u8 pps_buf[128]`` 128 bytes to be written into PPS buffer for HDMI sink by PCON. h](j )}(h``u8 pps_buf[128]``h]j )}(hji.h]hu8 pps_buf[128]}(hjk.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjg.ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjc.ubj )}(hhh]h)}(h>128 bytes to be written into PPS buffer for HDMI sink by PCON.h]h>128 bytes to be written into PPS buffer for HDMI sink by PCON.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~.hMhj.ubah}(h]h ]h"]h$]h&]uh1j hjc.ubeh}(h]h ]h"]h$]h&]uh1j{ hj~.hMhj'.ubeh}(h]h ]h"]h$]h&]uh1jv hj .ubh)}(h**Description**h]j3 )}(hj.h]h Description}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj .ubh)}(h7Returns 0 on success, else returns negative error code.h]h7Returns 0 on success, else returns negative error code.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj .ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_edp_backlight_set_level (C function)c.drm_edp_backlight_set_levelhNtauh1j hj9hhhNhNubj )}(hhh](j )}(hlint drm_edp_backlight_set_level (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, u32 level)h]j )}(hkint drm_edp_backlight_set_level(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, u32 level)h](j)}(hinth]hint}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM^ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.hhhj.hM^ubj )}(hdrm_edp_backlight_set_levelh]j )}(hdrm_edp_backlight_set_levelh]hdrm_edp_backlight_set_level}(hj /hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj.hhhj.hM^ubj)}(hL(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, u32 level)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj&/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"/ubj )}(h h]h }(hj3/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"/ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjD/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjF/modnameN classnameNj j )}j ]j%)}jj /sbc.drm_edp_backlight_set_levelasbuh1hhj"/ubj )}(h h]h }(hjd/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"/ubj9)}(hjOh]h*}(hjr/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"/ubj )}(hauxh]haux}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubj)}(h'const struct drm_edp_backlight_info *blh](j )}(hjch]hconst}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/modnameN classnameNj j )}j ]j`/c.drm_edp_backlight_set_levelasbuh1hhj/ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubj9)}(hjOh]h*}(hj/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj/ubj )}(hblh]hbl}(hj 0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubj)}(h u32 levelh](h)}(hhh]j )}(hu32h]hu32}(hj&0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(0modnameN classnameNj j )}j ]j`/c.drm_edp_backlight_set_levelasbuh1hhj0ubj )}(h h]h }(hjD0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubj )}(hlevelh]hlevel}(hjR0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj/ubeh}(h]h ]h"]h$]h&]j j uh1jhj.hhhj.hM^ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj.hhhj.hM^ubah}(h]j.ah ](j j eh"]h$]h&]j j )j huh1j hj.hM^hj.hhubj )}(hhh]h)}(h/Set the backlight level of an eDP panel via AUXh]h/Set the backlight level of an eDP panel via AUX}(hj|0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM^hjy0hhubah}(h]h ]h"]h$]h&]uh1j hj.hhhj.hM^ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j0j$ j0j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() ``u32 level`` The brightness level to set **Description** Sets the brightness level of an eDP panel's backlight. Note that the panel's backlight must already have been enabled by the driver by calling drm_edp_backlight_enable(). **Return** ``0`` on success, negative error code on failureh](h)}(h**Parameters**h]j3 )}(hj0h]h Parameters}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMbhj0ubjw )}(hhh](j| )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj0h]hstruct drm_dp_aux *aux}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM_hj0ubj )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM_hj0ubah}(h]h ]h"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]uh1j{ hj0hM_hj0ubj| )}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](j )}(h+``const struct drm_edp_backlight_info *bl``h]j )}(hj0h]h'const struct drm_edp_backlight_info *bl}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM`hj0ubj )}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 1hM`hj 1ubah}(h]h ]h"]h$]h&]uh1j hj0ubeh}(h]h ]h"]h$]h&]uh1j{ hj 1hM`hj0ubj| )}(h*``u32 level`` The brightness level to set h](j )}(h ``u32 level``h]j )}(hj/1h]h u32 level}(hj11hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-1ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMahj)1ubj )}(hhh]h)}(hThe brightness level to seth]hThe brightness level to set}(hjH1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjD1hMahjE1ubah}(h]h ]h"]h$]h&]uh1j hj)1ubeh}(h]h ]h"]h$]h&]uh1j{ hjD1hMahj0ubeh}(h]h ]h"]h$]h&]uh1jv hj0ubh)}(h**Description**h]j3 )}(hjj1h]h Description}(hjl1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjh1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMchj0ubh)}(hSets the brightness level of an eDP panel's backlight. Note that the panel's backlight must already have been enabled by the driver by calling drm_edp_backlight_enable().h]hSets the brightness level of an eDP panel’s backlight. Note that the panel’s backlight must already have been enabled by the driver by calling drm_edp_backlight_enable().}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMbhj0ubh)}(h **Return**h]j3 )}(hj1h]hReturn}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMehj0ubh)}(h0``0`` on success, negative error code on failureh](j )}(h``0``h]h0}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubh+ on success, negative error code on failure}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMfhj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_edp_backlight_enable (C function)c.drm_edp_backlight_enablehNtauh1j hj9hhhNhNubj )}(hhh](j )}(hoint drm_edp_backlight_enable (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h]j )}(hnint drm_edp_backlight_enable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h](j)}(hinth]hint}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1hhhj1hMubj )}(hdrm_edp_backlight_enableh]j )}(hdrm_edp_backlight_enableh]hdrm_edp_backlight_enable}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj1hhhj1hMubj)}(hR(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj!2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj.2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj?2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjA2modnameN classnameNj j )}j ]j%)}jj2sbc.drm_edp_backlight_enableasbuh1hhj2ubj )}(h h]h }(hj_2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj9)}(hjOh]h*}(hjm2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj2ubj )}(hauxh]haux}(hjz2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubj)}(h'const struct drm_edp_backlight_info *blh](j )}(hjch]hconst}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj2modnameN classnameNj j )}j ]j[2c.drm_edp_backlight_enableasbuh1hhj2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj9)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj2ubj )}(hblh]hbl}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubj)}(hconst u32 levelh](j )}(hjch]hconst}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj+3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(hu32h]hu32}(hj<3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj93ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>3modnameN classnameNj j )}j ]j[2c.drm_edp_backlight_enableasbuh1hhj3ubj )}(h h]h }(hjZ3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(hlevelh]hlevel}(hjh3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj2ubeh}(h]h ]h"]h$]h&]j j uh1jhj1hhhj1hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj1hhhj1hMubah}(h]j1ah ](j j eh"]h$]h&]j j )j huh1j hj1hMhj1hhubj )}(hhh]h)}(h*Enable an eDP panel's backlight using DPCDh]h,Enable an eDP panel’s backlight using DPCD}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3hhubah}(h]h ]h"]h$]h&]uh1j hj1hhhj1hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j3j$ j3j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() ``const u32 level`` The initial backlight level to set via AUX, if there is one **Description** This function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc. Note that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO. **Return** ``0`` on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj3h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubjw )}(hhh](j| )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj3h]hstruct drm_dp_aux *aux}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubj )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMhj3ubah}(h]h ]h"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]uh1j{ hj3hMhj3ubj| )}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](j )}(h+``const struct drm_edp_backlight_info *bl``h]j )}(hj 4h]h'const struct drm_edp_backlight_info *bl}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj 4ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubj )}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj%4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!4hMhj"4ubah}(h]h ]h"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]uh1j{ hj!4hMhj3ubj| )}(hP``const u32 level`` The initial backlight level to set via AUX, if there is one h](j )}(h``const u32 level``h]j )}(hjE4h]hconst u32 level}(hjG4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjC4ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj?4ubj )}(hhh]h)}(h;The initial backlight level to set via AUX, if there is oneh]h;The initial backlight level to set via AUX, if there is one}(hj^4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZ4hMhj[4ubah}(h]h ]h"]h$]h&]uh1j hj?4ubeh}(h]h ]h"]h$]h&]uh1j{ hjZ4hMhj3ubeh}(h]h ]h"]h$]h&]uh1jv hj3ubh)}(h**Description**h]j3 )}(hj4h]h Description}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~4ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubh)}(hThis function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc.h]hThis function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubh)}(hXNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO.h](hNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, }(hj4hhhNhNubh)}(hD:c:type:`drm_edp_backlight_info.aux_enable `h]j )}(hj4h]h!drm_edp_backlight_info.aux_enable}(hj4hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubh will be set to }(hj4hhhNhNubj )}(h ``false``h]hfalse}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubhv, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hMhj3ubh)}(h **Return**h]j3 )}(hj4h]hReturn}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubh)}(h1``0`` on success, negative error code on failure.h](j )}(h``0``h]h0}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubh, on success, negative error code on failure.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_edp_backlight_disable (C function)c.drm_edp_backlight_disablehNtauh1j hj9hhhNhNubj )}(hhh](j )}(h_int drm_edp_backlight_disable (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h]j )}(h^int drm_edp_backlight_disable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h](j)}(hinth]hint}(hj>5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:5hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjM5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:5hhhjL5hMubj )}(hdrm_edp_backlight_disableh]j )}(hdrm_edp_backlight_disableh]hdrm_edp_backlight_disable}(hj_5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[5ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj:5hhhjL5hMubj)}(hA(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj{5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw5ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j%)}jja5sbc.drm_edp_backlight_disableasbuh1hhjw5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw5ubj9)}(hjOh]h*}(hj5hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjw5ubj )}(hauxh]haux}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjw5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjs5ubj)}(h'const struct drm_edp_backlight_info *blh](j )}(hjch]hconst}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(hj h]hstruct}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj&6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(6modnameN classnameNj j )}j ]j5c.drm_edp_backlight_disableasbuh1hhj5ubj )}(h h]h }(hjD6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj9)}(hjOh]h*}(hjR6hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj5ubj )}(hblh]hbl}(hj_6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjs5ubeh}(h]h ]h"]h$]h&]j j uh1jhj:5hhhjL5hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj65hhhjL5hMubah}(h]j15ah ](j j eh"]h$]h&]j j )j huh1j hjL5hMhj35hhubj )}(hhh]h)}(h1Disable an eDP backlight using DPCD, if supportedh]h1Disable an eDP backlight using DPCD, if supported}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6hhubah}(h]h ]h"]h$]h&]uh1j hj35hhhjL5hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j6j$ j6j% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() **Description** This function handles disabling DPCD backlight controls on a panel over AUX. Note that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO. **Return** ``0`` on success or no-op, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj6h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6ubjw )}(hhh](j| )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj6h]hstruct drm_dp_aux *aux}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6ubj )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMhj6ubj| )}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](j )}(h+``const struct drm_edp_backlight_info *bl``h]j )}(hj7h]h'const struct drm_edp_backlight_info *bl}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6ubj )}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj7ubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hj7hMhj6ubeh}(h]h ]h"]h$]h&]uh1jv hj6ubh)}(h**Description**h]j3 )}(hj>7h]h Description}(hj@7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<7ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6ubh)}(hLThis function handles disabling DPCD backlight controls on a panel over AUX.h]hLThis function handles disabling DPCD backlight controls on a panel over AUX.}(hjT7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6ubh)}(hXNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO.h](hNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, }(hjc7hhhNhNubh)}(hD:c:type:`drm_edp_backlight_info.aux_enable `h]j )}(hjm7h]h!drm_edp_backlight_info.aux_enable}(hjo7hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjk7ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjc7ubh will be set to }(hjc7hhhNhNubj )}(h ``false``h]hfalse}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjc7ubhw, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO.}(hjc7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hMhj6ubh)}(h **Return**h]j3 )}(hj7h]hReturn}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6ubh)}(h:``0`` on success or no-op, negative error code on failure.h](j )}(h``0``h]h0}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubh5 on success or no-op, negative error code on failure.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_edp_backlight_init (C function)c.drm_edp_backlight_inithNtauh1j hj9hhhNhNubj )}(hhh](j )}(hint drm_edp_backlight_init (struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h]j )}(hint drm_edp_backlight_init(struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h](j)}(hinth]hint}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hj 8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhj 8hMubj )}(hdrm_edp_backlight_inith]j )}(hdrm_edp_backlight_inith]hdrm_edp_backlight_init}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhj 8hMubj)}(h(struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj98hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj58ubj )}(h h]h }(hjF8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj58ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjW8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjY8modnameN classnameNj j )}j ]j%)}jj8sbc.drm_edp_backlight_initasbuh1hhj58ubj )}(h h]h }(hjw8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj58ubj9)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj58ubj )}(hauxh]haux}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj58ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj18ubj)}(h!struct drm_edp_backlight_info *blh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]js8c.drm_edp_backlight_initasbuh1hhj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(hblh]hbl}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj18ubj)}(hu32 max_luminanceh](h)}(hhh]j )}(hu32h]hu32}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj 9modnameN classnameNj j )}j ]js8c.drm_edp_backlight_initasbuh1hhj9ubj )}(h h]h }(hj<9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h max_luminanceh]h max_luminance}(hjJ9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj18ubj)}(hu16 driver_pwm_freq_hzh](h)}(hhh]j )}(hu16h]hu16}(hjf9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjc9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjh9modnameN classnameNj j )}j ]js8c.drm_edp_backlight_initasbuh1hhj_9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_9ubj )}(hdriver_pwm_freq_hzh]hdriver_pwm_freq_hz}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_9ubeh}(h]h ]h"]h$]h&]noemph j j uh1jhj18ubj)}(h+const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]h](j )}(hjch]hconst}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubh)}(hhh]j )}(hu8h]hu8}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]js8c.drm_edp_backlight_initasbuh1hhj9ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(hedp_dpcdh]hedp_dpcd}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj9)}(hjMh]h[}(hj:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj9ubh)}(hhh]j )}(hEDP_DISPLAY_CTL_CAP_SIZEh]hEDP_DISPLAY_CTL_CAP_SIZE}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]js8c.drm_edp_backlight_initasbuh1hhj9ubj9)}(hj=Mh]h]}(hj1:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj18ubj)}(hu32 *current_levelh](h)}(hhh]j )}(hu32h]hu32}(hjL:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjN:modnameN classnameNj j )}j ]js8c.drm_edp_backlight_initasbuh1hhjE:ubj )}(h h]h }(hjj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjE:ubj9)}(hjOh]h*}(hjx:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjE:ubj )}(h current_levelh]h current_level}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjE:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj18ubj)}(hu8 *current_modeh](h)}(hhh]j )}(hu8h]hu8}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:modnameN classnameNj j )}j ]js8c.drm_edp_backlight_initasbuh1hhj:ubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj9)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj:ubj )}(h current_modeh]h current_mode}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj18ubj)}(hbool need_luminanceh](j)}(hjIh]hbool}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(hneed_luminanceh]hneed_luminance}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj18ubeh}(h]h ]h"]h$]h&]j j uh1jhj7hhhj 8hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7hhhj 8hMubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j hj 8hMhj7hhubj )}(hhh]h)}(hMProbe a display panel's TCON using the standard VESA eDP backlight interface.h]hOProbe a display panel’s TCON using the standard VESA eDP backlight interface.}(hj8;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj5;hhubah}(h]h ]h"]h$]h&]uh1j hj7hhhj 8hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jP;j$ jP;j% j& j' uh1j hhhj9hNhNubj) )}(hXN**Parameters** ``struct drm_dp_aux *aux`` The DP aux device to use for probing ``struct drm_edp_backlight_info *bl`` The :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlight ``u32 max_luminance`` max luminance when need luminance is set as true ``u16 driver_pwm_freq_hz`` Optional PWM frequency from the driver in hz ``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]`` A cached copy of the eDP DPCD ``u32 *current_level`` Where to store the probed brightness level, if any ``u8 *current_mode`` Where to store the currently set backlight control mode ``bool need_luminance`` Tells us if a we want to manipulate backlight using luminance values **Description** Initializes a :c:type:`drm_edp_backlight_info` struct by probing **aux** for it's backlight capabilities, along with also probing the current and maximum supported brightness levels. If **driver_pwm_freq_hz** is non-zero, this will be used as the backlight frequency. Otherwise, the default frequency from the panel is used. **Return** ``0`` on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjZ;h]h Parameters}(hj\;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjX;ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjT;ubjw )}(hhh](j| )}(h@``struct drm_dp_aux *aux`` The DP aux device to use for probing h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjy;h]hstruct drm_dp_aux *aux}(hj{;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjw;ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjs;ubj )}(hhh]h)}(h$The DP aux device to use for probingh]h$The DP aux device to use for probing}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1j hjs;ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hMhjp;ubj| )}(h``struct drm_edp_backlight_info *bl`` The :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlight h](j )}(h%``struct drm_edp_backlight_info *bl``h]j )}(hj;h]h!struct drm_edp_backlight_info *bl}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj;ubj )}(hhh]h)}(hYThe :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlighth](hThe }(hj;hhhNhNubh)}(h :c:type:`drm_edp_backlight_info`h]j )}(hj;h]hdrm_edp_backlight_info}(hj;hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhj;hMhj;ubh5 struct to fill out with information on the backlight}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hMhjp;ubj| )}(hG``u32 max_luminance`` max luminance when need luminance is set as true h](j )}(h``u32 max_luminance``h]j )}(hj<h]hu32 max_luminance}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj <ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj<ubj )}(hhh]h)}(h0max luminance when need luminance is set as trueh]h0max luminance when need luminance is set as true}(hj'<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#<hMhj$<ubah}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj#<hMhjp;ubj| )}(hH``u16 driver_pwm_freq_hz`` Optional PWM frequency from the driver in hz h](j )}(h``u16 driver_pwm_freq_hz``h]j )}(hjG<h]hu16 driver_pwm_freq_hz}(hjI<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjE<ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjA<ubj )}(hhh]h)}(h,Optional PWM frequency from the driver in hzh]h,Optional PWM frequency from the driver in hz}(hj`<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\<hMhj]<ubah}(h]h ]h"]h$]h&]uh1j hjA<ubeh}(h]h ]h"]h$]h&]uh1j{ hj\<hMhjp;ubj| )}(hN``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]`` A cached copy of the eDP DPCD h](j )}(h/``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]``h]j )}(hj<h]h+const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~<ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjz<ubj )}(hhh]h)}(hA cached copy of the eDP DPCDh]hA cached copy of the eDP DPCD}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj<ubah}(h]h ]h"]h$]h&]uh1j hjz<ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMhjp;ubj| )}(hJ``u32 *current_level`` Where to store the probed brightness level, if any h](j )}(h``u32 *current_level``h]j )}(hj<h]hu32 *current_level}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj<ubj )}(hhh]h)}(h2Where to store the probed brightness level, if anyh]h2Where to store the probed brightness level, if any}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMhj<ubah}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMhjp;ubj| )}(hM``u8 *current_mode`` Where to store the currently set backlight control mode h](j )}(h``u8 *current_mode``h]j )}(hj<h]hu8 *current_mode}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj<ubj )}(hhh]h)}(h7Where to store the currently set backlight control modeh]h7Where to store the currently set backlight control mode}(hj =hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]uh1j{ hj=hMhjp;ubj| )}(h]``bool need_luminance`` Tells us if a we want to manipulate backlight using luminance values h](j )}(h``bool need_luminance``h]j )}(hj+=h]hbool need_luminance}(hj-=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)=ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%=ubj )}(hhh]h)}(hDTells us if a we want to manipulate backlight using luminance valuesh]hDTells us if a we want to manipulate backlight using luminance values}(hjD=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@=hMhjA=ubah}(h]h ]h"]h$]h&]uh1j hj%=ubeh}(h]h ]h"]h$]h&]uh1j{ hj@=hMhjp;ubeh}(h]h ]h"]h$]h&]uh1jv hjT;ubh)}(h**Description**h]j3 )}(hjf=h]h Description}(hjh=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjd=ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjT;ubh)}(hInitializes a :c:type:`drm_edp_backlight_info` struct by probing **aux** for it's backlight capabilities, along with also probing the current and maximum supported brightness levels.h](hInitializes a }(hj|=hhhNhNubh)}(h :c:type:`drm_edp_backlight_info`h]j )}(hj=h]hdrm_edp_backlight_info}(hj=hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj|=ubh struct by probing }(hj|=hhhNhNubj3 )}(h**aux**h]haux}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|=ubhp for it’s backlight capabilities, along with also probing the current and maximum supported brightness levels.}(hj|=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj=hMhjT;ubh)}(hIf **driver_pwm_freq_hz** is non-zero, this will be used as the backlight frequency. Otherwise, the default frequency from the panel is used.h](hIf }(hj=hhhNhNubj3 )}(h**driver_pwm_freq_hz**h]hdriver_pwm_freq_hz}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubht is non-zero, this will be used as the backlight frequency. Otherwise, the default frequency from the panel is used.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjT;ubh)}(h **Return**h]j3 )}(hj=h]hReturn}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjT;ubh)}(h1``0`` on success, negative error code on failure.h](j )}(h``0``h]h0}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubh, on success, negative error code on failure.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjT;ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_panel_dp_aux_backlight (C function)c.drm_panel_dp_aux_backlighthNtauh1j hj9hhhNhNubj )}(hhh](j )}(hPint drm_panel_dp_aux_backlight (struct drm_panel *panel, struct drm_dp_aux *aux)h]j )}(hOint drm_panel_dp_aux_backlight(struct drm_panel *panel, struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj6>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2>hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM3ubj )}(h h]h }(hjE>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2>hhhjD>hM3ubj )}(hdrm_panel_dp_aux_backlighth]j )}(hdrm_panel_dp_aux_backlighth]hdrm_panel_dp_aux_backlight}(hjW>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj2>hhhjD>hM3ubj)}(h1(struct drm_panel *panel, struct drm_dp_aux *aux)h](j)}(hstruct drm_panel *panelh](j )}(hj h]hstruct}(hjs>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjo>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjo>ubh)}(hhh]j )}(h drm_panelh]h drm_panel}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]j%)}jjY>sbc.drm_panel_dp_aux_backlightasbuh1hhjo>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjo>ubj9)}(hjOh]h*}(hj>hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjo>ubj )}(hpanelh]hpanel}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjo>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjk>ubj)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj?modnameN classnameNj j )}j ]j>c.drm_panel_dp_aux_backlightasbuh1hhj>ubj )}(h h]h }(hj!?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj9)}(hjOh]h*}(hj/?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj>ubj )}(hauxh]haux}(hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjk>ubeh}(h]h ]h"]h$]h&]j j uh1jhj2>hhhjD>hM3ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj.>hhhjD>hM3ubah}(h]j)>ah ](j j eh"]h$]h&]j j )j huh1j hjD>hM3hj+>hhubj )}(hhh]h)}(hcreate and use DP AUX backlighth]hcreate and use DP AUX backlight}(hjf?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM3hjc?hhubah}(h]h ]h"]h$]h&]uh1j hj+>hhhjD>hM3ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j~?j$ j~?j% j& j' uh1j hhhj9hNhNubj) )}(hX_**Parameters** ``struct drm_panel *panel`` DRM panel ``struct drm_dp_aux *aux`` The DP AUX channel to use **Description** Use this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA's standard backlight control interface. When the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) ` When the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `. A typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM7hj?ubjw )}(hhh](j| )}(h&``struct drm_panel *panel`` DRM panel h](j )}(h``struct drm_panel *panel``h]j )}(hj?h]hstruct drm_panel *panel}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM4hj?ubj )}(hhh]h)}(h DRM panelh]h DRM panel}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hM4hj?ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hM4hj?ubj| )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj?h]hstruct drm_dp_aux *aux}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM5hj?ubj )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hM5hj?ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hM5hj?ubeh}(h]h ]h"]h$]h&]uh1jv hj?ubh)}(h**Description**h]j3 )}(hj@h]h Description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM7hj?ubh)}(hUse this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA's standard backlight control interface.h]hUse this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA’s standard backlight control interface.}(hj1@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM6hj?ubh)}(hWhen the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) `h](hOWhen the panel is enabled backlight will be enabled after a successful call to }(hj@@hhhNhNubh)}(h6:c:type:`drm_panel_funcs.enable\(\) `h]j )}(hjJ@h]hdrm_panel_funcs.enable()}(hjL@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjH@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM:hj@@ubeh}(h]h ]h"]h$]h&]uh1hhjg@hM:hj?ubh)}(hWhen the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `.h](hIWhen the panel is disabled backlight will be disabled before the call to }(hjn@hhhNhNubh)}(h7:c:type:`drm_panel_funcs.disable\(\) `h]j )}(hjx@h]hdrm_panel_funcs.disable()}(hjz@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjv@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_panel_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjn@ubh.}(hjn@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@hM=hj?ubh)}(hA typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.h]hA typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM@hj?ubh)}(h **Return**h]j3 )}(hj@h]hReturn}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMEhj?ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMFhj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_link_symbol_cycles (C function)c.drm_dp_link_symbol_cycleshNtauh1j hj9hhhNhNubj )}(hhh](j )}(hzint drm_dp_link_symbol_cycles (int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h]j )}(hyint drm_dp_link_symbol_cycles(int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhjAhMubj )}(hdrm_dp_link_symbol_cyclesh]j )}(hdrm_dp_link_symbol_cyclesh]hdrm_dp_link_symbol_cycles}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@hhhjAhMubj)}(h\(int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h](j)}(hint lane_counth](j)}(hinth]hint}(hj3AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/Aubj )}(h h]h }(hjAAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Aubj )}(h lane_counth]h lane_count}(hjOAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Aubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+Aubj)}(h int pixelsh](j)}(hinth]hint}(hjhAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdAubj )}(h h]h }(hjvAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdAubj )}(hpixelsh]hpixels}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+Aubj)}(hint dsc_slice_counth](j)}(hinth]hint}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(hdsc_slice_counth]hdsc_slice_count}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+Aubj)}(h int bpp_x16h](j)}(hinth]hint}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(hbpp_x16h]hbpp_x16}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+Aubj)}(hint symbol_sizeh](j)}(hinth]hint}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h symbol_sizeh]h symbol_size}(hj#BhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+Aubj)}(h bool is_msth](j)}(hjIh]hbool}(hjpixel count of the active period in one scanline of the streamh]h>pixel count of the active period in one scanline of the stream}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjFubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1j{ hjFhMhjNFubj| )}(hD``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC h](j )}(h``int dsc_slice_count``h]j )}(hjFh]hint dsc_slice_count}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjFubj )}(hhh]h)}(h+number of slices for DSC or '0' for non-DSCh]h/number of slices for DSC or ‘0’ for non-DSC}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjFubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1j{ hjFhMhjNFubj| )}(h8``int bpp_x16`` bits per pixel in .4 binary fixed point h](j )}(h``int bpp_x16``h]j )}(hjGh]h int bpp_x16}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjFubj )}(hhh]h)}(h'bits per pixel in .4 binary fixed pointh]h'bits per pixel in .4 binary fixed point}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjGubah}(h]h ]h"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]uh1j{ hjGhMhjNFubj| )}(h0``unsigned long flags`` DRM_DP_OVERHEAD_x flags h](j )}(h``unsigned long flags``h]j )}(hj;Gh]hunsigned long flags}(hj=GhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9Gubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj5Gubj )}(hhh]h)}(hDRM_DP_OVERHEAD_x flagsh]hDRM_DP_OVERHEAD_x flags}(hjTGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPGhMhjQGubah}(h]h ]h"]h$]h&]uh1j hj5Gubeh}(h]h ]h"]h$]h&]uh1j{ hjPGhMhjNFubeh}(h]h ]h"]h$]h&]uh1jv hj2Fubh)}(h**Description**h]j3 )}(hjvGh]h Description}(hjxGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjtGubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2Fubh)}(hXOCalculate the BW allocation overhead of a DP link stream, depending on the link's - **lane_count** - SST/MST mode (**flags** / ``DRM_DP_OVERHEAD_MST``) - symbol size (**flags** / ``DRM_DP_OVERHEAD_UHBR``) - FEC mode (**flags** / ``DRM_DP_OVERHEAD_FEC``) - SSC/REF_CLK mode (**flags** / ``DRM_DP_OVERHEAD_SSC_REF_CLK``) as well as the stream's - **hactive** timing - **bpp_x16** color depth - compression mode (**dsc_slice_count** != 0) Note that this overhead doesn't account for the 8b/10b, 128b/132b channel coding efficiency, for that see **drm_dp_link_bw_channel_coding_efficiency\(\)**.h](hVCalculate the BW allocation overhead of a DP link stream, depending on the link’s - }(hjGhhhNhNubj3 )}(h**lane_count**h]h lane_count}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh - SST/MST mode (}(hjGhhhNhNubj3 )}(h **flags**h]hflags}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh / }(hjGhhhNhNubj )}(h``DRM_DP_OVERHEAD_MST``h]hDRM_DP_OVERHEAD_MST}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubh) - symbol size (}(hjGhhhNhNubj3 )}(h **flags**h]hflags}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh / }hjGsbj )}(h``DRM_DP_OVERHEAD_UHBR``h]hDRM_DP_OVERHEAD_UHBR}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubh) - FEC mode (}(hjGhhhNhNubj3 )}(h **flags**h]hflags}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh / }hjGsbj )}(h``DRM_DP_OVERHEAD_FEC``h]hDRM_DP_OVERHEAD_FEC}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubh) - SSC/REF_CLK mode (}(hjGhhhNhNubj3 )}(h **flags**h]hflags}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh / }hjGsbj )}(h``DRM_DP_OVERHEAD_SSC_REF_CLK``h]hDRM_DP_OVERHEAD_SSC_REF_CLK}(hj$HhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubh) as well as the stream’s - }(hjGhhhNhNubj3 )}(h **hactive**h]hhactive}(hj6HhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh timing - }(hjGhhhNhNubj3 )}(h **bpp_x16**h]hbpp_x16}(hjHHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh! color depth - compression mode (}(hjGhhhNhNubj3 )}(h**dsc_slice_count**h]hdsc_slice_count}(hjZHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubhs != 0) Note that this overhead doesn’t account for the 8b/10b, 128b/132b channel coding efficiency, for that see }(hjGhhhNhNubj3 )}(h0**drm_dp_link_bw_channel_coding_efficiency\(\)**h]h,drm_dp_link_bw_channel_coding_efficiency()}(hjlHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubh.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2Fubh)}(h7Returns the overhead as 100% + overhead% in 1ppm units.h]h7Returns the overhead as 100% + overhead% in 1ppm units.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2Fubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0drm_dp_bw_channel_coding_efficiency (C function)%c.drm_dp_bw_channel_coding_efficiencyhNtauh1j hj9hhhNhNubj )}(hhh](j )}(h6int drm_dp_bw_channel_coding_efficiency (bool is_uhbr)h]j )}(h5int drm_dp_bw_channel_coding_efficiency(bool is_uhbr)h](j)}(hinth]hint}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHhhhjHhMubj )}(h#drm_dp_bw_channel_coding_efficiencyh]j )}(h#drm_dp_bw_channel_coding_efficiencyh]h#drm_dp_bw_channel_coding_efficiency}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ](j j eh"]h$]h&]j j uh1j hjHhhhjHhMubj)}(h(bool is_uhbr)h]j)}(h bool is_uhbrh](j)}(hjIh]hbool}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(his_uhbrh]his_uhbr}(hj IhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubah}(h]h ]h"]h$]h&]j j uh1jhjHhhhjHhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjHhhhjHhMubah}(h]jHah ](j j eh"]h$]h&]j j )j huh1j hjHhMhjHhhubj )}(hhh]h)}(h)Get a DP link's channel coding efficiencyh]h+Get a DP link’s channel coding efficiency}(hj6IhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3Ihhubah}(h]h ]h"]h$]h&]uh1j hjHhhhjHhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jNIj$ jNIj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``bool is_uhbr`` Whether the link has a 128b/132b channel coding **Description** Return the channel coding efficiency of the given DP link type, which is either 8b/10b or 128b/132b (aka UHBR). The corresponding overhead includes the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead(). Returns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.h](h)}(h**Parameters**h]j3 )}(hjXIh]h Parameters}(hjZIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVIubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRIubjw )}(hhh]j| )}(hA``bool is_uhbr`` Whether the link has a 128b/132b channel coding h](j )}(h``bool is_uhbr``h]j )}(hjwIh]h bool is_uhbr}(hjyIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuIubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjqIubj )}(hhh]h)}(h/Whether the link has a 128b/132b channel codingh]h/Whether the link has a 128b/132b channel coding}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMhjIubah}(h]h ]h"]h$]h&]uh1j hjqIubeh}(h]h ]h"]h$]h&]uh1j{ hjIhMhjnIubah}(h]h ]h"]h$]h&]uh1jv hjRIubh)}(h**Description**h]j3 )}(hjIh]h Description}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRIubh)}(hXReturn the channel coding efficiency of the given DP link type, which is either 8b/10b or 128b/132b (aka UHBR). The corresponding overhead includes the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead().h]hXReturn the channel coding efficiency of the given DP link type, which is either 8b/10b or 128b/132b (aka UHBR). The corresponding overhead includes the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead().}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRIubh)}(hHReturns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.h]hHReturns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRIubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_max_dprx_data_rate (C function)c.drm_dp_max_dprx_data_ratehNtauh1j hj9hhhNhNubj )}(hhh](j )}(h@int drm_dp_max_dprx_data_rate (int max_link_rate, int max_lanes)h]j )}(h?int drm_dp_max_dprx_data_rate(int max_link_rate, int max_lanes)h](j)}(hinth]hint}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJhhhjJhMubj )}(hdrm_dp_max_dprx_data_rateh]j )}(hdrm_dp_max_dprx_data_rateh]hdrm_dp_max_dprx_data_rate}(hj'JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#Jubah}(h]h ](j j eh"]h$]h&]j j uh1j hjJhhhjJhMubj)}(h"(int max_link_rate, int max_lanes)h](j)}(hint max_link_rateh](j)}(hinth]hint}(hjCJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?Jubj )}(h h]h }(hjQJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?Jubj )}(h max_link_rateh]h max_link_rate}(hj_JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?Jubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;Jubj)}(h int max_lanesh](j)}(hinth]hint}(hjxJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtJubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtJubj )}(h max_lanesh]h max_lanes}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;Jubeh}(h]h ]h"]h$]h&]j j uh1jhjJhhhjJhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjIhhhjJhMubah}(h]jIah ](j j eh"]h$]h&]j j )j huh1j hjJhMhjIhhubj )}(hhh]h)}(h)Get the max data bandwidth of a DPRX sinkh]h)Get the max data bandwidth of a DPRX sink}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjJhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jJj$ jJj% j& j' uh1j hhhj9hNhNubj) )}(hX**Parameters** ``int max_link_rate`` max DPRX link rate in 10kbps units ``int max_lanes`` max DPRX lane count **Description** Given a link rate and lanes, get the data bandwidth. Data bandwidth is the actual payload rate, which depends on the data bandwidth efficiency and the link rate. Note that protocol layers above the DPRX link level considered here can further limit the maximum data rate. Such layers are the MST topology (with limits on the link between the source and first branch device as well as on the whole MST path until the DPRX link) and (Thunderbolt) DP tunnels - which in turn can encapsulate an MST link with its own limit - with each SST or MST encapsulated tunnel sharing the BW of a tunnel group. Returns the maximum data rate in kBps units.h](h)}(h**Parameters**h]j3 )}(hjJh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJubjw )}(hhh](j| )}(h9``int max_link_rate`` max DPRX link rate in 10kbps units h](j )}(h``int max_link_rate``h]j )}(hjJh]hint max_link_rate}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJubj )}(hhh]h)}(h"max DPRX link rate in 10kbps unitsh]h"max DPRX link rate in 10kbps units}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMhjKubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hjKhMhjJubj| )}(h&``int max_lanes`` max DPRX lane count h](j )}(h``int max_lanes``h]j )}(hj8Kh]h int max_lanes}(hj:KhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6Kubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2Kubj )}(hhh]h)}(hmax DPRX lane counth]hmax DPRX lane count}(hjQKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMKhMhjNKubah}(h]h ]h"]h$]h&]uh1j hj2Kubeh}(h]h ]h"]h$]h&]uh1j{ hjMKhMhjJubeh}(h]h ]h"]h$]h&]uh1jv hjJubh)}(h**Description**h]j3 )}(hjsKh]h Description}(hjuKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjqKubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJubh)}(h4Given a link rate and lanes, get the data bandwidth.h]h4Given a link rate and lanes, get the data bandwidth.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJubh)}(hlData bandwidth is the actual payload rate, which depends on the data bandwidth efficiency and the link rate.h]hlData bandwidth is the actual payload rate, which depends on the data bandwidth efficiency and the link rate.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJubh)}(hXNote that protocol layers above the DPRX link level considered here can further limit the maximum data rate. Such layers are the MST topology (with limits on the link between the source and first branch device as well as on the whole MST path until the DPRX link) and (Thunderbolt) DP tunnels - which in turn can encapsulate an MST link with its own limit - with each SST or MST encapsulated tunnel sharing the BW of a tunnel group.h]hXNote that protocol layers above the DPRX link level considered here can further limit the maximum data rate. Such layers are the MST topology (with limits on the link between the source and first branch device as well as on the whole MST path until the DPRX link) and (Thunderbolt) DP tunnels - which in turn can encapsulate an MST link with its own limit - with each SST or MST encapsulated tunnel sharing the BW of a tunnel group.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjJubh)}(h,Returns the maximum data rate in kBps units.h]h,Returns the maximum data rate in kBps units.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:277: ./drivers/gpu/drm/display/drm_dp_helper.chM(hjJubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj9hhhNhNubeh}(h]jah ]h"]'display port helper functions referenceah$]h&]uh1hhhhhhhhM ubh)}(hhh](h)}(h+Display Port CEC Helper Functions Referenceh]h+Display Port CEC Helper Functions Reference}(hjKhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjKhhhhhMubh)}(hkThese functions take care of supporting the CEC-Tunneling-over-AUX feature of DisplayPort-to-HDMI adapters.h]hkThese functions take care of supporting the CEC-Tunneling-over-AUX feature of DisplayPort-to-HDMI adapters.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:283: ./drivers/gpu/drm/display/drm_dp_cec.chK8hjKhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_cec_irq (C function)c.drm_dp_cec_irqhNtauh1j hjKhhhNhNubj )}(hhh](j )}(h,void drm_dp_cec_irq (struct drm_dp_aux *aux)h]j )}(h+void drm_dp_cec_irq(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hj LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:286: ./drivers/gpu/drm/display/drm_dp_cec.chKubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhjLhKubj )}(hdrm_dp_cec_irqh]j )}(hdrm_dp_cec_irqh]hdrm_dp_cec_irq}(hj-LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)Lubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLhhhjLhKubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjILhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjELubj )}(h h]h }(hjVLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjELubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjgLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjiLmodnameN classnameNj j )}j ]j%)}jj/Lsbc.drm_dp_cec_irqasbuh1hhjELubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjELubj9)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjELubj )}(hauxh]haux}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjELubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjALubah}(h]h ]h"]h$]h&]j j uh1jhjLhhhjLhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjLhKubah}(h]jKah ](j j eh"]h$]h&]j j )j huh1j hjLhKhjLhhubj )}(hhh]h)}(hhandle CEC interrupt, if anyh]hhandle CEC interrupt, if any}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:286: ./drivers/gpu/drm/display/drm_dp_cec.chKhjLhhubah}(h]h ]h"]h$]h&]uh1j hjLhhhjLhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jLj$ jLj% j& j' uh1j hhhjKhNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Should be called when handling an IRQ_HPD request. If CEC-tunneling-over-AUX is present, then it will check for a CEC_IRQ and handle it accordingly.h](h)}(h**Parameters**h]j3 )}(hjLh]h Parameters}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjLubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:286: ./drivers/gpu/drm/display/drm_dp_cec.chKhjLubjw )}(hhh]j| )}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel #h](j )}(h``struct drm_dp_aux *aux``h]j )}(hj Mh]hstruct drm_dp_aux *aux}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Mubah}(h]h ]h"]h$]h&]uh1j hi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:286: ./drivers/gpu/drm/display/drm_dp_cec.chKhjMubj )}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj&MhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"MhKhj#Mubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hj"MhKhjMubah}(h]h ]h"]h$]h&]uh1jv hjLubh)}(h**Description**h]j3 )}(hjHMh]h Description}(hjJMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFMubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:286: ./drivers/gpu/drm/display/drm_dp_cec.chKhjLubh)}(hShould be called when handling an IRQ_HPD request. If CEC-tunneling-over-AUX is present, then it will check for a CEC_IRQ and handle it accordingly.h]hShould be called when handling an IRQ_HPD request. If CEC-tunneling-over-AUX is present, then it will check for a CEC_IRQ and handle it accordingly.}(hj^MhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:286: ./drivers/gpu/drm/display/drm_dp_cec.chKhjLubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjKhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_dp_cec_register_connector (C function)c.drm_dp_cec_register_connectorhNtauh1j hjKhhhNhNubj )}(hhh](j )}(h\void drm_dp_cec_register_connector (struct drm_dp_aux *aux, struct drm_connector *connector)h]j )}(h[void drm_dp_cec_register_connector(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:286: ./drivers/gpu/drm/display/drm_dp_cec.chMubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMhhhjMhMubj )}(hdrm_dp_cec_register_connectorh]j )}(hdrm_dp_cec_register_connectorh]hdrm_dp_cec_register_connector}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ](j j eh"]h$]h&]j j uh1j hjMhhhjMhMubj)}(h9(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj )}(h h]h }(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjMmodnameN classnameNj j )}j ]j%)}jjMsbc.drm_dp_cec_register_connectorasbuh1hhjMubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj9)}(hjOh]h*}(hjNhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjMubj )}(hauxh]haux}(hj#NhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjMubj)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjuh1hhjQhhhhhM"ubh)}(h@Helper functions to deal with DP dual mode (aka. DP++) adaptors.h]h@Helper functions to deal with DP dual mode (aka. DP++) adaptors.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK#hjQhhubh)}(hPType 1: Adaptor registers (if any) and the sink DDC bus may be accessed via I2C.h]hPType 1: Adaptor registers (if any) and the sink DDC bus may be accessed via I2C.}(hj QhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK%hjQhhubh)}(hType 2: Adaptor registers and sink DDC bus can be accessed either via I2C or I2C-over-AUX. Source devices may choose to implement either of these access methods.h]hType 2: Adaptor registers and sink DDC bus can be accessed either via I2C or I2C-over-AUX. Source devices may choose to implement either of these access methods.}(hj/QhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:292: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK(hjQhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_lspcon_mode (C enum)c.drm_lspcon_modehNtauh1j hjQhhhNhNubj )}(hhh](j )}(hdrm_lspcon_modeh]j )}(henum drm_lspcon_modeh](j )}(hj7h]henum}(hjWQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSQhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:295: ./include/drm/display/drm_dp_dual_mode_helper.hhKubj )}(h h]h }(hjeQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSQhhhjdQhKubj )}(hdrm_lspcon_modeh]j )}(hjQQh]hdrm_lspcon_mode}(hjwQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsQubah}(h]h ](j j eh"]h$]h&]j j uh1j hjSQhhhjdQhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjOQhhhjdQhKubah}(h]jJQah ](j j eh"]h$]h&]j j )j huh1j hjdQhKhjLQhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjLQhhhjdQhKubeh}(h]h ](j enumeh"]h$]h&]j" j j# jQj$ jQj% j& j' uh1j hhhjQhNhNubj) )}(hX **Constants** ``DRM_LSPCON_MODE_INVALID`` No LSPCON. ``DRM_LSPCON_MODE_LS`` Level shifter mode of LSPCON which drives DP++ to HDMI 1.4 conversion. ``DRM_LSPCON_MODE_PCON`` Protocol converter mode of LSPCON which drives DP++ to HDMI 2.0 active conversion.h](h)}(h **Constants**h]j3 )}(hjQh]h Constants}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:295: ./include/drm/display/drm_dp_dual_mode_helper.hhKNhjQubjw )}(hhh](j| )}(h'``DRM_LSPCON_MODE_INVALID`` No LSPCON. h](j )}(h``DRM_LSPCON_MODE_INVALID``h]j )}(hjQh]hDRM_LSPCON_MODE_INVALID}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:295: ./include/drm/display/drm_dp_dual_mode_helper.hhKQhjQubj )}(hhh]h)}(h No LSPCON.h]h No LSPCON.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhKQhjQubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjQhKQhjQubj| )}(h^``DRM_LSPCON_MODE_LS`` Level shifter mode of LSPCON which drives DP++ to HDMI 1.4 conversion. h](j )}(h``DRM_LSPCON_MODE_LS``h]j )}(hjRh]hDRM_LSPCON_MODE_LS}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:295: ./include/drm/display/drm_dp_dual_mode_helper.hhKUhjQubj )}(hhh]h)}(hFLevel shifter mode of LSPCON which drives DP++ to HDMI 1.4 conversion.h]hFLevel shifter mode of LSPCON which drives DP++ to HDMI 1.4 conversion.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:295: ./include/drm/display/drm_dp_dual_mode_helper.hhKThjRubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjRhKUhjQubj| )}(hk``DRM_LSPCON_MODE_PCON`` Protocol converter mode of LSPCON which drives DP++ to HDMI 2.0 active conversion.h](j )}(h``DRM_LSPCON_MODE_PCON``h]j )}(hj>Rh]hDRM_LSPCON_MODE_PCON}(hj@RhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj``DRM_DP_DUAL_MODE_LSPCON`` Level shifter / protocol converterh](j )}(h``DRM_DP_DUAL_MODE_LSPCON``h]j )}(hjpTh]hDRM_DP_DUAL_MODE_LSPCON}(hjrThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnTubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:295: ./include/drm/display/drm_dp_dual_mode_helper.hhKphjjTubj )}(hhh]h)}(h"Level shifter / protocol converterh]h"Level shifter / protocol converter}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:295: ./include/drm/display/drm_dp_dual_mode_helper.hhKqhjTubah}(h]h ]h"]h$]h&]uh1j hjjTubeh}(h]h ]h"]h$]h&]uh1j{ hjThKphjSubeh}(h]h ]h"]h$]h&]uh1jv hjRubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_dp_dual_mode_read (C function)c.drm_dp_dual_mode_readhNtauh1j hjQhhhNhNubj )}(hhh](j )}(hassize_t drm_dp_dual_mode_read (struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h]j )}(h`ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjTmodnameN classnameNj j )}j ]j%)}jdrm_dp_dual_mode_readsbc.drm_dp_dual_mode_readasbuh1hhjThhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK3ubj )}(h h]h }(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjThhhjThK3ubj )}(hdrm_dp_dual_mode_readh]j )}(hjTh]hdrm_dp_dual_mode_read}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hjThhhjThK3ubj)}(hC(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](j)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(h h]h }(hj)UhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hj:UhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7Uubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAttempt to identify the type of the DP dual mode adaptor used.h]h>Attempt to identify the type of the DP dual mode adaptor used.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj2]ubh)}(hNote that when the answer is **DRM_DP_DUAL_MODE_UNKNOWN** it's not certain whether we're dealing with a native HDMI port or a type 1 DVI dual mode adaptor. The driver will have to use some other hardware/driver specific mechanism to make that distinction.h](hNote that when the answer is }(hj^hhhNhNubj3 )}(h**DRM_DP_DUAL_MODE_UNKNOWN**h]hDRM_DP_DUAL_MODE_UNKNOWN}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubh it’s not certain whether we’re dealing with a native HDMI port or a type 1 DVI dual mode adaptor. The driver will have to use some other hardware/driver specific mechanism to make that distinction.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj2]ubh)}(h **Return**h]j3 )}(hj2^h]hReturn}(hj4^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0^ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj2]ubh)}(h)The type of the DP dual mode adaptor usedh]h)The type of the DP dual mode adaptor used}(hjH^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj2]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_dual_mode_max_tmds_clock (C function)!c.drm_dp_dual_mode_max_tmds_clockhNtauh1j hjQhhhNhNubj )}(hhh](j )}(hint drm_dp_dual_mode_max_tmds_clock (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h]j )}(hint drm_dp_dual_mode_max_tmds_clock(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h](j)}(hinth]hint}(hjw^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjs^hhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs^hhhj^hMubj )}(hdrm_dp_dual_mode_max_tmds_clockh]j )}(hdrm_dp_dual_mode_max_tmds_clockh]hdrm_dp_dual_mode_max_tmds_clock}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjs^hhhj^hMubj)}(h\(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h](j)}(hconst struct drm_device *devh](j )}(hjch]hconst}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(hj h]hstruct}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j%)}jj^sb!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhj^ubj )}(h h]h }(hj _hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj^ubj )}(hdevh]hdev}(hj(_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj^ubj)}(henum drm_dp_dual_mode_type typeh](j )}(hj7h]henum}(hjA_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubj )}(h h]h }(hjN_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubh)}(hhh]j )}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hj__hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetja_modnameN classnameNj j )}j ]j _!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhj=_ubj )}(h h]h }(hj}_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubj )}(htypeh]htype}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj^ubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]j _!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubj )}(hadapterh]hadapter}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj^ubeh}(h]h ]h"]h$]h&]j j uh1jhjs^hhhj^hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjo^hhhj^hMubah}(h]jj^ah ](j j eh"]h$]h&]j j )j huh1j hj^hMhjl^hhubj )}(hhh]h)}(h'Max TMDS clock for DP dual mode adaptorh]h'Max TMDS clock for DP dual mode adaptor}(hj%`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj"`hhubah}(h]h ]h"]h$]h&]uh1j hjl^hhhj^hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j=`j$ j=`j% j& j' uh1j hhhjQhNhNubj) )}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus **Description** Determine the max TMDS clock the adaptor supports based on the type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK register (on type2 adaptors). As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume a 165 MHz limit based on the specification. **Return** Maximum supported TMDS clock rate for the DP dual mode adaptor in kHz.h](h)}(h**Parameters**h]j3 )}(hjG`h]h Parameters}(hjI`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjE`ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hjA`ubjw )}(hhh](j| )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j )}(h ``const struct drm_device *dev``h]j )}(hjf`h]hconst struct drm_device *dev}(hjh`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjd`ubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj``ubj )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]j )}(hj`h]h drm_device}(hj`hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhj{`hMhj`ubh to use}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{`hMhj|`ubah}(h]h ]h"]h$]h&]uh1j hj``ubeh}(h]h ]h"]h$]h&]uh1j{ hj{`hMhj]`ubj| )}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j )}(h#``enum drm_dp_dual_mode_type type``h]j )}(hj`h]henum drm_dp_dual_mode_type type}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj`ubj )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMhj`ubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hMhj]`ubj| )}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](j )}(h``struct i2c_adapter *adapter``h]j )}(hj`h]hstruct i2c_adapter *adapter}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hj`ubj )}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ahM hj aubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj ahM hj]`ubeh}(h]h ]h"]h$]h&]uh1jv hjA`ubh)}(h**Description**h]j3 )}(hj2ah]h Description}(hj4ahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0aubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hjA`ubh)}(hXiDetermine the max TMDS clock the adaptor supports based on the type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK register (on type2 adaptors). As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume a 165 MHz limit based on the specification.h]hXkDetermine the max TMDS clock the adaptor supports based on the type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK register (on type2 adaptors). As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don’t read the register on those, instead we simply assume a 165 MHz limit based on the specification.}(hjHahhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hjA`ubh)}(h **Return**h]j3 )}(hjYah]hReturn}(hj[ahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWaubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjA`ubh)}(hFMaximum supported TMDS clock rate for the DP dual mode adaptor in kHz.h]hFMaximum supported TMDS clock rate for the DP dual mode adaptor in kHz.}(hjoahhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjA`ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_dual_mode_get_tmds_output (C function)"c.drm_dp_dual_mode_get_tmds_outputhNtauh1j hjQhhhNhNubj )}(hhh](j )}(hint drm_dp_dual_mode_get_tmds_output (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool *enabled)h]j )}(hint drm_dp_dual_mode_get_tmds_output(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool *enabled)h](j)}(hinth]hint}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjahhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM2ubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjahhhjahM2ubj )}(h drm_dp_dual_mode_get_tmds_outputh]j )}(h drm_dp_dual_mode_get_tmds_outputh]h drm_dp_dual_mode_get_tmds_output}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ](j j eh"]h$]h&]j j uh1j hjahhhjahM2ubj)}(hk(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool *enabled)h](j)}(hconst struct drm_device *devh](j )}(hjch]hconst}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbmodnameN classnameNj j )}j ]j%)}jjasb"c.drm_dp_dual_mode_get_tmds_outputasbuh1hhjaubj )}(h h]h }(hj4bhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj9)}(hjOh]h*}(hjBbhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjaubj )}(hdevh]hdev}(hjObhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubj)}(henum drm_dp_dual_mode_type typeh](j )}(hj7h]henum}(hjhbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdbubj )}(h h]h }(hjubhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdbubh)}(hhh]j )}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbmodnameN classnameNj j )}j ]j0b"c.drm_dp_dual_mode_get_tmds_outputasbuh1hhjdbubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdbubj )}(htypeh]htype}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbmodnameN classnameNj j )}j ]j0b"c.drm_dp_dual_mode_get_tmds_outputasbuh1hhjbubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj9)}(hjOh]h*}(hjchhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjbubj )}(hadapterh]hadapter}(hj"chhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubj)}(h bool *enabledh](j)}(hjIh]hbool}(hj;chhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7cubj )}(h h]h }(hjHchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7cubj9)}(hjOh]h*}(hjVchhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj7cubj )}(henabledh]henabled}(hjcchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7cubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubeh}(h]h ]h"]h$]h&]j j uh1jhjahhhjahM2ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjahM2ubah}(h]jaah ](j j eh"]h$]h&]j j )j huh1j hjahM2hjahhubj )}(hhh]h)}(hDGet the state of the TMDS output buffers in the DP dual mode adaptorh]hDGet the state of the TMDS output buffers in the DP dual mode adaptor}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM2hjchhubah}(h]h ]h"]h$]h&]uh1j hjahhhjahM2ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jcj$ jcj% j& j' uh1j hhhjQhNhNubj) )}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus ``bool *enabled`` current state of the TMDS output buffers **Description** Get the state of the TMDS output buffers in the adaptor. For type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN register. As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume that the buffers are always enabled. **Return** 0 on success, negative error code on failureh](h)}(h**Parameters**h]j3 )}(hjch]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM6hjcubjw )}(hhh](j| )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j )}(h ``const struct drm_device *dev``h]j )}(hjch]hconst struct drm_device *dev}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM3hjcubj )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]j )}(hjch]h drm_device}(hjchhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjchM3hjcubh to use}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchM3hjcubah}(h]h ]h"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]uh1j{ hjchM3hjcubj| )}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j )}(h#``enum drm_dp_dual_mode_type type``h]j )}(hj&dh]henum drm_dp_dual_mode_type type}(hj(dhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$dubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM4hj dubj )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hj?dhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;dhM4hjhjcubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM?hjcubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_dual_mode_set_tmds_output (C function)"c.drm_dp_dual_mode_set_tmds_outputhNtauh1j hjQhhhNhNubj )}(hhh](j )}(hint drm_dp_dual_mode_set_tmds_output (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h]j )}(hint drm_dp_dual_mode_set_tmds_output(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h](j)}(hinth]hint}(hj?ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ehhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM\ubj )}(h h]h }(hjNehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ehhhjMehM\ubj )}(h drm_dp_dual_mode_set_tmds_outputh]j )}(h drm_dp_dual_mode_set_tmds_outputh]h drm_dp_dual_mode_set_tmds_output}(hj`ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\eubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;ehhhjMehM\ubj)}(hi(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h](j)}(hconst struct drm_device *devh](j )}(hjch]hconst}(hj|ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxeubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxeubj )}(hj h]hstruct}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxeubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxeubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjemodnameN classnameNj j )}j ]j%)}jjbesb"c.drm_dp_dual_mode_set_tmds_outputasbuh1hhjxeubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxeubj9)}(hjOh]h*}(hjehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjxeubj )}(hdevh]hdev}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxeubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjteubj)}(henum drm_dp_dual_mode_type typeh](j )}(hj7h]henum}(hj fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hj'fhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$fubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)fmodnameN classnameNj j )}j ]je"c.drm_dp_dual_mode_set_tmds_outputasbuh1hhjfubj )}(h h]h }(hjEfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(htypeh]htype}(hjSfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjteubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjlfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhfubj )}(h h]h }(hjyfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhfubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]je"c.drm_dp_dual_mode_set_tmds_outputasbuh1hhjhfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhfubj9)}(hjOh]h*}(hjfhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhfubj )}(hadapterh]hadapter}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjteubj)}(h bool enableh](j)}(hjIh]hbool}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(henableh]henable}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjteubeh}(h]h ]h"]h$]h&]j j uh1jhj;ehhhjMehM\ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj7ehhhjMehM\ubah}(h]j2eah ](j j eh"]h$]h&]j j )j huh1j hjMehM\hj4ehhubj )}(hhh]h)}(h>Enable/disable TMDS output buffers in the DP dual mode adaptorh]h>Enable/disable TMDS output buffers in the DP dual mode adaptor}(hj!ghhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM\hjghhubah}(h]h ]h"]h$]h&]uh1j hj4ehhhjMehM\ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j9gj$ j9gj% j& j' uh1j hhhjQhNhNubj) )}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus ``bool enable`` enable (as opposed to disable) the TMDS output buffers **Description** Set the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes. **Return** 0 on success, negative error code on failureh](h)}(h**Parameters**h]j3 )}(hjCgh]h Parameters}(hjEghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjAgubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM`hj=gubjw )}(hhh](j| )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j )}(h ``const struct drm_device *dev``h]j )}(hjbgh]hconst struct drm_device *dev}(hjdghhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`gubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM]hj\gubj )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]j )}(hjgh]h drm_device}(hjghhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjwghM]hj{gubh to use}(hj{ghhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjwghM]hjxgubah}(h]h ]h"]h$]h&]uh1j hj\gubeh}(h]h ]h"]h$]h&]uh1j{ hjwghM]hjYgubj| )}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j )}(h#``enum drm_dp_dual_mode_type type``h]j )}(hjgh]henum drm_dp_dual_mode_type type}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM^hjgubj )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghM^hjgubah}(h]h ]h"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]uh1j{ hjghM^hjYgubj| )}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](j )}(h``struct i2c_adapter *adapter``h]j )}(hjgh]hstruct i2c_adapter *adapter}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM_hjgubj )}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hj hhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhM_hj hubah}(h]h ]h"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]uh1j{ hjhhM_hjYgubj| )}(hG``bool enable`` enable (as opposed to disable) the TMDS output buffers h](j )}(h``bool enable``h]j )}(hj,hh]h bool enable}(hj.hhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*hubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM`hj&hubj )}(hhh]h)}(h6enable (as opposed to disable) the TMDS output buffersh]h6enable (as opposed to disable) the TMDS output buffers}(hjEhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhhM`hjBhubah}(h]h ]h"]h$]h&]uh1j hj&hubeh}(h]h ]h"]h$]h&]uh1j{ hjAhhM`hjYgubeh}(h]h ]h"]h$]h&]uh1jv hj=gubh)}(h**Description**h]j3 )}(hjghh]h Description}(hjihhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjehubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMbhj=gubh)}(hSet the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes.h]hSet the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes.}(hj}hhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMahj=gubh)}(h **Return**h]j3 )}(hjhh]hReturn}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjhubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMehj=gubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMfhj=gubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_dp_get_dual_mode_type_name (C function) c.drm_dp_get_dual_mode_type_namehNtauh1j hjQhhhNhNubj )}(hhh](j )}(hMconst char * drm_dp_get_dual_mode_type_name (enum drm_dp_dual_mode_type type)h]j )}(hKconst char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type)h](j )}(hjch]hconst}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjhhMubj)}(hcharh]hchar}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhjhhMubj )}(h h]h }(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhhjhhMubj9)}(hjOh]h*}(hj ihhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhhjhhMubj )}(hdrm_dp_get_dual_mode_type_nameh]j )}(hdrm_dp_get_dual_mode_type_nameh]hdrm_dp_get_dual_mode_type_name}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhhjhhMubj)}(h!(enum drm_dp_dual_mode_type type)h]j)}(henum drm_dp_dual_mode_type typeh](j )}(hj7h]henum}(hj8ihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4iubj )}(h h]h }(hjEihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4iubh)}(hhh]j )}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hjVihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjXimodnameN classnameNj j )}j ]j%)}jjisb c.drm_dp_get_dual_mode_type_nameasbuh1hhj4iubj )}(h h]h }(hjvihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4iubj )}(htypeh]htype}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4iubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj0iubah}(h]h ]h"]h$]h&]j j uh1jhjhhhhjhhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhhjhhMubah}(h]jhah ](j j eh"]h$]h&]j j )j huh1j hjhhMhjhhhubj )}(hhh]h)}(h9Get the name of the DP dual mode adaptor type as a stringh]h9Get the name of the DP dual mode adaptor type as a string}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjihhubah}(h]h ]h"]h$]h&]uh1j hjhhhhjhhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jij$ jij% j& j' uh1j hhhjQhNhNubj) )}(h**Parameters** ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type **Return** String representation of the DP dual mode adaptor typeh](h)}(h**Parameters**h]j3 )}(hjih]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjiubjw )}(hhh]j| )}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](j )}(h#``enum drm_dp_dual_mode_type type``h]j )}(hjih]henum drm_dp_dual_mode_type type}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjiubj )}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjjubah}(h]h ]h"]h$]h&]uh1j hjiubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMhjiubah}(h]h ]h"]h$]h&]uh1jv hjiubh)}(h **Return**h]j3 )}(hj*jh]hReturn}(hj,jhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj(jubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjiubh)}(h6String representation of the DP dual mode adaptor typeh]h6String representation of the DP dual mode adaptor type}(hj@jhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_lspcon_get_mode (C function)c.drm_lspcon_get_modehNtauh1j hjQhhhNhNubj )}(hhh](j )}(hoint drm_lspcon_get_mode (const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h]j )}(hnint drm_lspcon_get_mode(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h](j)}(hinth]hint}(hjojhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkjhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj )}(h h]h }(hj~jhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkjhhhj}jhMubj )}(hdrm_lspcon_get_modeh]j )}(hdrm_lspcon_get_modeh]hdrm_lspcon_get_mode}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjkjhhhj}jhMubj)}(hW(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h](j)}(hconst struct drm_device *devh](j )}(hjch]hconst}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(hj h]hstruct}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjjmodnameN classnameNj j )}j ]j%)}jjjsbc.drm_lspcon_get_modeasbuh1hhjjubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubj9)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjjubj )}(hdevh]hdev}(hj khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hj9khhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5kubj )}(h h]h }(hjFkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5kubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjWkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYkmodnameN classnameNj j )}j ]jkc.drm_lspcon_get_modeasbuh1hhj5kubj )}(h h]h }(hjukhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5kubj9)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj5kubj )}(hadapterh]hadapter}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5kubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubj)}(henum drm_lspcon_mode *modeh](j )}(hj7h]henum}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubh)}(hhh]j )}(hdrm_lspcon_modeh]hdrm_lspcon_mode}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkmodnameN classnameNj j )}j ]jkc.drm_lspcon_get_modeasbuh1hhjkubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubj9)}(hjOh]h*}(hjkhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjkubj )}(hmodeh]hmode}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubeh}(h]h ]h"]h$]h&]j j uh1jhjkjhhhj}jhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjgjhhhj}jhMubah}(h]jbjah ](j j eh"]h$]h&]j j )j huh1j hj}jhMhjdjhhubj )}(hhh]h)}(hEGet LSPCON's current mode of operation by reading offset (0x80, 0x41)h]hGGet LSPCON’s current mode of operation by reading offset (0x80, 0x41)}(hj*lhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj'lhhubah}(h]h ]h"]h$]h&]uh1j hjdjhhhj}jhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jBlj$ jBlj% j& j' uh1j hhhjQhNhNubj) )}(hX6**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``struct i2c_adapter *adapter`` I2C-over-aux adapter ``enum drm_lspcon_mode *mode`` current lspcon mode of operation output variable **Return** 0 on success, sets the current_mode value to appropriate mode -error on failureh](h)}(h**Parameters**h]j3 )}(hjLlh]h Parameters}(hjNlhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJlubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjFlubjw )}(hhh](j| )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j )}(h ``const struct drm_device *dev``h]j )}(hjklh]hconst struct drm_device *dev}(hjmlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjilubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjelubj )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]j )}(hjlh]h drm_device}(hjlhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjlhMhjlubh to use}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjlhMhjlubah}(h]h ]h"]h$]h&]uh1j hjelubeh}(h]h ]h"]h$]h&]uh1j{ hjlhMhjblubj| )}(h5``struct i2c_adapter *adapter`` I2C-over-aux adapter h](j )}(h``struct i2c_adapter *adapter``h]j )}(hjlh]hstruct i2c_adapter *adapter}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjlubj )}(hhh]h)}(hI2C-over-aux adapterh]hI2C-over-aux adapter}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMhjlubah}(h]h ]h"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]uh1j{ hjlhMhjblubj| )}(hP``enum drm_lspcon_mode *mode`` current lspcon mode of operation output variable h](j )}(h``enum drm_lspcon_mode *mode``h]j )}(hjlh]henum drm_lspcon_mode *mode}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjlubj )}(hhh]h)}(h0current lspcon mode of operation output variableh]h0current lspcon mode of operation output variable}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjmubah}(h]h ]h"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]uh1j{ hjmhMhjblubeh}(h]h ]h"]h$]h&]uh1jv hjFlubh)}(h **Return**h]j3 )}(hj7mh]hReturn}(hj9mhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5mubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjFlubh)}(hO0 on success, sets the current_mode value to appropriate mode -error on failureh]hO0 on success, sets the current_mode value to appropriate mode -error on failure}(hjMmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjFlubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_lspcon_set_mode (C function)c.drm_lspcon_set_modehNtauh1j hjQhhhNhNubj )}(hhh](j )}(h|int drm_lspcon_set_mode (const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h]j )}(h{int drm_lspcon_set_mode(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h](j)}(hinth]hint}(hj|mhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxmhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxmhhhjmhMubj )}(hdrm_lspcon_set_modeh]j )}(hdrm_lspcon_set_modeh]hdrm_lspcon_set_mode}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ](j j eh"]h$]h&]j j uh1j hjxmhhhjmhMubj)}(hd(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h](j)}(hconst struct drm_device *devh](j )}(hjch]hconst}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(hj h]hstruct}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]j%)}jjmsbc.drm_lspcon_set_modeasbuh1hhjmubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj9)}(hjOh]h*}(hj nhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjmubj )}(hdevh]hdev}(hj-nhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjmubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hjFnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBnubj )}(h h]h }(hjSnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBnubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjdnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjanubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfnmodnameN classnameNj j )}j ]jnc.drm_lspcon_set_modeasbuh1hhjBnubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBnubj9)}(hjOh]h*}(hjnhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjBnubj )}(hadapterh]hadapter}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjmubj)}(henum drm_lspcon_mode modeh](j )}(hj7h]henum}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(hdrm_lspcon_modeh]hdrm_lspcon_mode}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]jnc.drm_lspcon_set_modeasbuh1hhjnubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(hmodeh]hmode}(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjmubj)}(h int time_outh](j)}(hinth]hint}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj )}(h h]h }(hj'ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubj )}(htime_outh]htime_out}(hj5ohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjmubeh}(h]h ]h"]h$]h&]j j uh1jhjxmhhhjmhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjtmhhhjmhMubah}(h]jomah ](j j eh"]h$]h&]j j )j huh1j hjmhMhjqmhhubj )}(hhh]h)}(h@Change LSPCON's mode of operation by writing offset (0x80, 0x40)h]hBChange LSPCON’s mode of operation by writing offset (0x80, 0x40)}(hj_ohhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj\ohhubah}(h]h ]h"]h$]h&]uh1j hjqmhhhjmhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jwoj$ jwoj% j& j' uh1j hhhjQhNhNubj) )}(hX-**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``struct i2c_adapter *adapter`` I2C-over-aux adapter ``enum drm_lspcon_mode mode`` required mode of operation ``int time_out`` LSPCON mode change settle timeout **Return** 0 on success, -error on failure/timeouth](h)}(h**Parameters**h]j3 )}(hjoh]h Parameters}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjoubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj{oubjw )}(hhh](j| )}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](j )}(h ``const struct drm_device *dev``h]j )}(hjoh]hconst struct drm_device *dev}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjoubj )}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]j )}(hjoh]h drm_device}(hjohhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_deviceuh1hhjohMhjoubh to use}(hjohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjohMhjoubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjohMhjoubj| )}(h5``struct i2c_adapter *adapter`` I2C-over-aux adapter h](j )}(h``struct i2c_adapter *adapter``h]j )}(hjoh]hstruct i2c_adapter *adapter}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjoubj )}(hhh]h)}(hI2C-over-aux adapterh]hI2C-over-aux adapter}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhj phMhjpubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hj phMhjoubj| )}(h9``enum drm_lspcon_mode mode`` required mode of operation h](j )}(h``enum drm_lspcon_mode mode``h]j )}(hj1ph]henum drm_lspcon_mode mode}(hj3phhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/pubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj+pubj )}(hhh]h)}(hrequired mode of operationh]hrequired mode of operation}(hjJphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFphMhjGpubah}(h]h ]h"]h$]h&]uh1j hj+pubeh}(h]h ]h"]h$]h&]uh1j{ hjFphMhjoubj| )}(h3``int time_out`` LSPCON mode change settle timeout h](j )}(h``int time_out``h]j )}(hjjph]h int time_out}(hjlphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhpubah}(h]h ]h"]h$]h&]uh1j hv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjdpubj )}(hhh]h)}(h!LSPCON mode change settle timeouth]h!LSPCON mode change settle timeout}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1j hjdpubeh}(h]h ]h"]h$]h&]uh1j{ hjphMhjoubeh}(h]h ]h"]h$]h&]uh1jv hj{oubh)}(h **Return**h]j3 )}(hjph]hReturn}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj{oubh)}(h'0 on success, -error on failure/timeouth]h'0 on success, -error on failure/timeout}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:298: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj{oubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjQhhhNhNubeh}(h]jDah ]h"]9display port dual mode adaptor helper functions referenceah$]h&]uh1hhhhhhhhM"ubh)}(hhh](h)}(hDisplay Port MST Helpersh]hDisplay Port MST Helpers}(hjphhhNhNubah}(h]h ]h"]h$]h&]hj`uh1hhjphhhhhM.ubh)}(hhh](h)}(hOverviewh]hOverview}(hjphhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjphhhhhM1ubh)}(hThese functions contain parts of the DisplayPort 1.2a MultiStream Transport protocol. The helpers contain a topology manager and bandwidth manager. The helpers encapsulate the sending and received of sideband msgs.h]hThese functions contain parts of the DisplayPort 1.2a MultiStream Transport protocol. The helpers contain a topology manager and bandwidth manager. The helpers encapsulate the sending and received of sideband msgs.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:307: ./drivers/gpu/drm/display/drm_dp_mst_topology.chK6hjphhubh)}(hhh](h)}(hTopology refcount overviewh]hTopology refcount overview}(hj qhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj qhNhNubh)}(hXThe refcounting schemes for :c:type:`struct drm_dp_mst_branch ` and :c:type:`struct drm_dp_mst_port ` are somewhat unusual. Both ports and branch devices have two different kinds of refcounts: topology refcounts, and malloc refcounts.h](hThe refcounting schemes for }(hjqhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hj$qh]hstruct drm_dp_mst_branch}(hj&qhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj"qubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMVhjqubh and }(hjqhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hjHqh]hstruct drm_dp_mst_port}(hjJqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjFqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjAqhMVhjqubh are somewhat unusual. Both ports and branch devices have two different kinds of refcounts: topology refcounts, and malloc refcounts.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAqhMVhj qubh)}(hXQTopology refcounts are not exposed to drivers, and are handled internally by the DP MST helpers. The helpers use them in order to prevent the in-memory topology state from being changed in the middle of critical operations like changing the internal state of payload allocations. This means each branch and port will be considered to be connected to the rest of the topology until its topology refcount reaches zero. Additionally, for ports this means that their associated :c:type:`struct drm_connector ` will stay registered with userspace until the port's refcount reaches 0.h](hXTopology refcounts are not exposed to drivers, and are handled internally by the DP MST helpers. The helpers use them in order to prevent the in-memory topology state from being changed in the middle of critical operations like changing the internal state of payload allocations. This means each branch and port will be considered to be connected to the rest of the topology until its topology refcount reaches zero. Additionally, for ports this means that their associated }(hjoqhhhNhNubh)}(h.:c:type:`struct drm_connector `h]j )}(hjyqh]hstruct drm_connector}(hj{qhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjwqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMZhjoqubhK will stay registered with userspace until the port’s refcount reaches 0.}(hjoqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhMZhj qubeh}(h]jah ]h"]topology refcount overviewah$]h&]uh1hhjphhhNhNubh)}(hhh](h)}(hMalloc refcount overviewh]hMalloc refcount overview}(hjqhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjqhNhNubh)}(hX?Malloc references are used to keep a :c:type:`struct drm_dp_mst_port ` or :c:type:`struct drm_dp_mst_branch ` allocated even after all of its topology references have been dropped, so that the driver or MST helpers can safely access each branch's last known state before it was disconnected from the topology. When the malloc refcount of a port or branch reaches 0, the memory allocation containing the :c:type:`struct drm_dp_mst_branch ` or :c:type:`struct drm_dp_mst_port ` respectively will be freed.h](h%Malloc references are used to keep a }(hjqhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hjqh]hstruct drm_dp_mst_port}(hjqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMfhjqubh or }(hjqhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hjqh]hstruct drm_dp_mst_branch}(hjqhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjqhMfhjqubhX( allocated even after all of its topology references have been dropped, so that the driver or MST helpers can safely access each branch’s last known state before it was disconnected from the topology. When the malloc refcount of a port or branch reaches 0, the memory allocation containing the }(hjqhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hj rh]hstruct drm_dp_mst_branch}(hj rhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjqhMfhjqubh or }hjqsbh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hj-rh]hstruct drm_dp_mst_port}(hj/rhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj+rubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjqhMfhjqubh respectively will be freed.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhMfhjqubh)}(hXFor :c:type:`struct drm_dp_mst_branch `, malloc refcounts are not currently exposed to drivers. As of writing this documentation, there are no drivers that have a usecase for accessing :c:type:`struct drm_dp_mst_branch ` outside of the MST helpers. Exposing this API to drivers in a race-free manner would take more tweaking of the refcounting scheme, however patches are welcome provided there is a legitimate driver usecase for this.h](hFor }(hjTrhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hj^rh]hstruct drm_dp_mst_branch}(hj`rhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj\rubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMnhjTrubh, malloc refcounts are not currently exposed to drivers. As of writing this documentation, there are no drivers that have a usecase for accessing }(hjTrhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hjrh]hstruct drm_dp_mst_branch}(hjrhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhj{rhMnhjTrubh outside of the MST helpers. Exposing this API to drivers in a race-free manner would take more tweaking of the refcounting scheme, however patches are welcome provided there is a legitimate driver usecase for this.}(hjTrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{rhMnhjqubeh}(h]jah ]h"]malloc refcount overviewah$]h&]uh1hhjphhhNhNubh)}(hhh](h)}(h$Refcount relationships in a topologyh]h$Refcount relationships in a topology}(hjrhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjrhNhNubh)}(hjLet's take a look at why the relationship between topology and malloc refcounts is designed the way it is.h]hlLet’s take a look at why the relationship between topology and malloc refcounts is designed the way it is.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjrubkfigure kernel_figure)}(hhh]hfigure)}(hhh](himage)}(hX.. kernel-figure:: dp-mst/topology-figure-1.dot An example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure. h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-1.dot candidates}jOjrsuh1jrhjrhhhKubhcaption)}(hXAn example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure.h]hXAn example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM}hjrubeh}(h]id5ah ]h"]h$]h&]uh1jrhjrubah}(h]h ]h"]h$]h&]uh1jrhjrubh)}(hAs you can see in the above figure, every branch increments the topology refcount of its children, and increments the malloc refcount of its parent. Additionally, every payload increments the malloc refcount of its assigned port by 1.h]hAs you can see in the above figure, every branch increments the topology refcount of its children, and increments the malloc refcount of its parent. Additionally, every payload increments the malloc refcount of its assigned port by 1.}(hj shhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjrubh)}(hSo, what would happen if MSTB #3 from the above figure was unplugged from the system, but the driver hadn't yet removed payload #2 from port #3? The topology would start to look like the figure below.h]hSo, what would happen if MSTB #3 from the above figure was unplugged from the system, but the driver hadn’t yet removed payload #2 from port #3? The topology would start to look like the figure below.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjrubjr)}(hhh]jr)}(hhh](jr)}(h.. kernel-figure:: dp-mst/topology-figure-2.dot Ports and branch devices which have been released from memory are colored grey, and references which have been removed are colored red. h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-2.dotjr}jOj8ssuh1jrhj*shhhKubjr)}(hPorts and branch devices which have been released from memory are colored grey, and references which have been removed are colored red.h]hPorts and branch devices which have been released from memory are colored grey, and references which have been removed are colored red.}(hj:shhhNhNubah}(h]h ]h"]h$]h&]uh1jrhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj*subeh}(h]id6ah ]h"]h$]h&]uh1jrhj'subah}(h]h ]h"]h$]h&]uh1jrhjrubh)}(hXWhenever a port or branch device's topology refcount reaches zero, it will decrement the topology refcounts of all its children, the malloc refcount of its parent, and finally its own malloc refcount. For MSTB #4 and port #4, this means they both have been disconnected from the topology and freed from memory. But, because payload #2 is still holding a reference to port #3, port #3 is removed from the topology but its :c:type:`struct drm_dp_mst_port ` is still accessible from memory. This also means port #3 has not yet decremented the malloc refcount of MSTB #3, so its :c:type:`struct drm_dp_mst_branch ` will also stay allocated in memory until port #3's malloc refcount reaches 0.h](hXWhenever a port or branch device’s topology refcount reaches zero, it will decrement the topology refcounts of all its children, the malloc refcount of its parent, and finally its own malloc refcount. For MSTB #4 and port #4, this means they both have been disconnected from the topology and freed from memory. But, because payload #2 is still holding a reference to port #3, port #3 is removed from the topology but its }(hjVshhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hj`sh]hstruct drm_dp_mst_port}(hjbshhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj^subah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjVsubhy is still accessible from memory. This also means port #3 has not yet decremented the malloc refcount of MSTB #3, so its }(hjVshhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hjsh]hstruct drm_dp_mst_branch}(hjshhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhj}shMhjVsubhP will also stay allocated in memory until port #3’s malloc refcount reaches 0.}(hjVshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj}shMhjrubh)}(hThis relationship is necessary because in order to release payload #2, we need to be able to figure out the last relative of port #3 that's still connected to the topology. In this case, we would travel up the topology as shown below.h]hThis relationship is necessary because in order to release payload #2, we need to be able to figure out the last relative of port #3 that’s still connected to the topology. In this case, we would travel up the topology as shown below.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjrubjr)}(hhh]jr)}(hhh]jr)}(h0.. kernel-figure:: dp-mst/topology-figure-3.dot h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-3.dotjr}jOjssuh1jrhjshhhKubah}(h]h ]h"]h$]h&]uh1jrhjsubah}(h]h ]h"]h$]h&]uh1jrhjrubh)}(h[And finally, remove payload #2 by communicating with port #2 through sideband transactions.h]h[And finally, remove payload #2 by communicating with port #2 through sideband transactions.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:310: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjrubeh}(h]jah ]h"]$refcount relationships in a topologyah$]h&]uh1hhjphhhNhNubeh}(h]jah ]h"]h$]overviewah&]uh1hhjphhhhhM1jCKubh)}(hhh](h)}(hFunctions Referenceh]hFunctions Reference}(hjshhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjshhhhhM:ubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_mst_port (C struct)c.drm_dp_mst_porthNtauh1j hjshhhNhNubj )}(hhh](j )}(hdrm_dp_mst_porth]j )}(hstruct drm_dp_mst_porth](j )}(hj h]hstruct}(hj thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKubj )}(h h]h }(hj.thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjthhhj-thKubj )}(hdrm_dp_mst_porth]j )}(hjth]hdrm_dp_mst_port}(hj@thhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`.lock. ``mcs`` message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``ddps`` DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``pdt`` Peer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``ldps`` Legacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``dpcd_rev`` DPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``num_sdp_streams`` Number of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``num_sdp_stream_sinks`` Number of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``full_pbn`` Max possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``next`` link to next port on this branch device ``mstb`` the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `. ``aux`` i2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``passthrough_aux`` parent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible. ``parent`` branch device parent of this port ``connector`` DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``mgr`` topology manager this port lives under. ``cached_edid`` for DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately. ``fec_capable`` bool indicating if FEC can be supported up to that point in the MST topology.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjtubh:}(hjthhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhK@hj~tubjN )}(hXstruct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; };h]hXstruct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; };}hjtsbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKBhj~tubh)}(h **Members**h]j3 )}(hjth]hMembers}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjtubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhK]hj~tubjw )}(hhh](j| )}(hw``topology_kref`` refcount for this port's lifetime in the topology, only the DP MST helpers should need to touch this h](j )}(h``topology_kref``h]j )}(hjth]h topology_kref}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKahjtubj )}(hhh]h)}(hdrefcount for this port's lifetime in the topology, only the DP MST helpers should need to touch thish]hfrefcount for this port’s lifetime in the topology, only the DP MST helpers should need to touch this}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhK`hjtubah}(h]h ]h"]h$]h&]uh1j hjtubeh}(h]h ]h"]h$]h&]uh1j{ hjthKahjtubj| )}(h``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc(). h](j )}(h``malloc_kref``h]j )}(hj uh]h malloc_kref}(hj uhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhhjuubj )}(hhh]h)}(hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc().h]hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc().}(hj"uhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKfhjuubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhKhhjtubj| )}(hv``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. h](j )}(h``topology_ref_history``h]j )}(hjCuh]htopology_ref_history}(hjEuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAuubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKohj=uubj )}(hhh]h)}(h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.h]h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.}(hj\uhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKnhjYuubah}(h]h ]h"]h$]h&]uh1j hj=uubeh}(h]h ]h"]h$]h&]uh1j{ hjXuhKohjtubj| )}(h``port_num`` port number h](j )}(h ``port_num``h]j )}(hj}uh]hport_num}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{uubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhK>hjwuubj )}(hhh]h)}(h port numberh]h port number}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhK>hjuubah}(h]h ]h"]h$]h&]uh1j hjwuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhK>hjtubj| )}(h}``input`` if this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h ``input``h]j )}(hjuh]hinput}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhK@hjuubj )}(hhh]h)}(hrif this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h,if this port is an input port. Protected by }(hjuhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjuh]hdrm_dp_mst_topology_mgr.base}(hjuhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhK?hjuubh.lock.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjuhK?hjuubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjuhK@hjtubj| )}(h``mcs`` message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h``mcs``h]j )}(hjvh]hmcs}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKBhj vubj )}(hhh]h)}(h|message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6message capability status - DP 1.2 spec. Protected by }(hj,vhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hj6vh]hdrm_dp_mst_topology_mgr.base}(hj8vhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj4vubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKAhj,vubh.lock.}(hj,vhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSvhKAhj)vubah}(h]h ]h"]h$]h&]uh1j hj vubeh}(h]h ]h"]h$]h&]uh1j{ hj(vhKBhjtubj| )}(h``ddps`` DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h``ddps``h]j )}(hjpvh]hddps}(hjrvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnvubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKDhjjvubj )}(hhh]h)}(h|DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6DisplayPort Device Plug Status - DP 1.2. Protected by }(hjvhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjvh]hdrm_dp_mst_topology_mgr.base}(hjvhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKChjvubh.lock.}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjvhKChjvubah}(h]h ]h"]h$]h&]uh1j hjjvubeh}(h]h ]h"]h$]h&]uh1j{ hjvhKDhjtubj| )}(hn``pdt`` Peer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h``pdt``h]j )}(hjvh]hpdt}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKFhjvubj )}(hhh]h)}(hePeer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](hPeer Device Type. Protected by }(hjvhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjvh]hdrm_dp_mst_topology_mgr.base}(hjvhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKEhjvubh.lock.}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj whKEhjvubah}(h]h ]h"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]uh1j{ hjvhKFhjtubj| )}(hx``ldps`` Legacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h``ldps``h]j )}(hj*wh]hldps}(hj,whhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(wubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKHhj$wubj )}(hhh]h)}(hnLegacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h(Legacy Device Plug Status. Protected by }(hjCwhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjMwh]hdrm_dp_mst_topology_mgr.base}(hjOwhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjKwubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKGhjCwubh.lock.}(hjCwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjwhKGhj@wubah}(h]h ]h"]h$]h&]uh1j hj$wubeh}(h]h ]h"]h$]h&]uh1j{ hj?whKHhjtubj| )}(h``dpcd_rev`` DPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h ``dpcd_rev``h]j )}(hjwh]hdpcd_rev}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKJhjwubj )}(hhh]h)}(hyDPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h3DPCD revision of device on this port. Protected by }(hjwhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjwh]hdrm_dp_mst_topology_mgr.base}(hjwhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKIhjwubh.lock.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjwhKIhjwubah}(h]h ]h"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]uh1j{ hjwhKJhjtubj| )}(h``num_sdp_streams`` Number of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h``num_sdp_streams``h]j )}(hjwh]hnum_sdp_streams}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKLhjwubj )}(hhh]h)}(hsNumber of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h-Number of simultaneous streams. Protected by }(hjwhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjxh]hdrm_dp_mst_topology_mgr.base}(hj xhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKKhjwubh.lock.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj$xhKKhjwubah}(h]h ]h"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]uh1j{ hjwhKLhjtubj| )}(h``num_sdp_stream_sinks`` Number of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h``num_sdp_stream_sinks``h]j )}(hjAxh]hnum_sdp_stream_sinks}(hjCxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?xubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKNhj;xubj )}(hhh]h)}(hkNumber of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h%Number of stream sinks. Protected by }(hjZxhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjdxh]hdrm_dp_mst_topology_mgr.base}(hjfxhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjbxubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKMhjZxubh.lock.}(hjZxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhKMhjWxubah}(h]h ]h"]h$]h&]uh1j hj;xubeh}(h]h ]h"]h$]h&]uh1j{ hjVxhKNhjtubj| )}(h``full_pbn`` Max possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h ``full_pbn``h]j )}(hjxh]hfull_pbn}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKPhjxubj )}(hhh]h)}(hyMax possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h3Max possible bandwidth for this port. Protected by }(hjxhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hjxh]hdrm_dp_mst_topology_mgr.base}(hjxhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKOhjxubh.lock.}(hjxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhKOhjxubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjxhKPhjtubj| )}(h1``next`` link to next port on this branch device h](j )}(h``next``h]j )}(hjxh]hnext}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKQhjxubj )}(hhh]h)}(h'link to next port on this branch deviceh]h'link to next port on this branch device}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhKQhjyubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjyhKQhjtubj| )}(hXg``mstb`` the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `. h](j )}(h``mstb``h]j )}(hj4yh]hmstb}(hj6yhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2yubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj.yubj )}(hhh]h)}(hX]the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `.h](hnthe branch device connected to this port, if there is one. This should be considered protected for reading by }(hjMyhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]j )}(hjWyh]hdrm_dp_mst_topology_mgr.lock}(hjYyhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjUyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjMyubh$. There are two exceptions to this: }(hjMyhhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.up_req_work `h]j )}(hj{yh]h#drm_dp_mst_topology_mgr.up_req_work}(hj}yhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjyyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjtyhKhjMyubh and }(hjMyhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.work `h]j )}(hjyh]hdrm_dp_mst_topology_mgr.work}(hjyhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjtyhKhjMyubh, which do not grab }(hjMyhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]j )}(hjyh]hdrm_dp_mst_topology_mgr.lock}(hjyhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjtyhKhjMyubhd during reads but are the only updaters of this list and are protected from writing concurrently by }(hjMyhhhNhNubh)}(hF:c:type:`drm_dp_mst_topology_mgr.probe_lock `h]j )}(hjyh]h"drm_dp_mst_topology_mgr.probe_lock}(hjyhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjtyhKhjMyubh.}(hjMyhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjtyhKhjJyubah}(h]h ]h"]h$]h&]uh1j hj.yubeh}(h]h ]h"]h$]h&]uh1j{ hjIyhKhjtubj| )}(h``aux`` i2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h``aux``h]j )}(hjzh]haux}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKShjzubj )}(hhh]h)}(hi2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](hIi2c aux transport to talk to device connected to this port, protected by }(hj6zhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hj@zh]hdrm_dp_mst_topology_mgr.base}(hjBzhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj>zubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKRhj6zubh.lock.}(hj6zhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj]zhKRhj3zubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hj2zhKShjtubj| )}(h|``passthrough_aux`` parent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible. h](j )}(h``passthrough_aux``h]j )}(hjzzh]hpassthrough_aux}(hj|zhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjxzubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKUhjtzubj )}(hhh]h)}(hgparent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible.h]hgparent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKThjzubah}(h]h ]h"]h$]h&]uh1j hjtzubeh}(h]h ]h"]h$]h&]uh1j{ hjzhKUhjtubj| )}(h-``parent`` branch device parent of this port h](j )}(h ``parent``h]j )}(hjzh]hparent}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKVhjzubj )}(hhh]h)}(h!branch device parent of this porth]h!branch device parent of this port}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhKVhjzubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjzhKVhjtubj| )}(h``connector`` DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](j )}(h ``connector``h]j )}(hjzh]h connector}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKXhjzubj )}(hhh]h)}(h|DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6DRM connector this port is connected to. Protected by }(hj{hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]j )}(hj{h]hdrm_dp_mst_topology_mgr.base}(hj{hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKWhj{ubh.lock.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-{hKWhj{ubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hj{hKXhjtubj| )}(h0``mgr`` topology manager this port lives under. h](j )}(h``mgr``h]j )}(hjJ{h]hmgr}(hjL{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjH{ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKYhjD{ubj )}(hhh]h)}(h'topology manager this port lives under.h]h'topology manager this port lives under.}(hjc{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_{hKYhj`{ubah}(h]h ]h"]h$]h&]uh1j hjD{ubeh}(h]h ]h"]h$]h&]uh1j{ hj_{hKYhjtubj| )}(hz``cached_edid`` for DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately. h](j )}(h``cached_edid``h]j )}(hj{h]h cached_edid}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj}{ubj )}(hhh]h)}(hifor DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately.h]hifor DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj{ubah}(h]h ]h"]h$]h&]uh1j hj}{ubeh}(h]h ]h"]h$]h&]uh1j{ hj{hKhjtubj| )}(h]``fec_capable`` bool indicating if FEC can be supported up to that point in the MST topology.h](j )}(h``fec_capable``h]j )}(hj{h]h fec_capable}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj{ubj )}(hhh]h)}(hMbool indicating if FEC can be supported up to that point in the MST topology.h]hMbool indicating if FEC can be supported up to that point in the MST topology.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hKhj{ubah}(h]h ]h"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]uh1j{ hj{hKhjtubeh}(h]h ]h"]h$]h&]uh1jv hj~tubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubh)}(h**Description**h]j3 )}(hj{h]h Description}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj{ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjshhubh)}(hYThis structure represents an MST port endpoint on a device somewhere in the MST topology.h]hYThis structure represents an MST port endpoint on a device somewhere in the MST topology.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKYhjshhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_mst_branch (C struct)c.drm_dp_mst_branchhNtauh1j hjshhhNhNubj )}(hhh](j )}(hdrm_dp_mst_branchh]j )}(hstruct drm_dp_mst_branchh](j )}(hj h]hstruct}(hj=|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9|hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhK_ubj )}(h h]h }(hjK|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9|hhhjJ|hK_ubj )}(hdrm_dp_mst_branchh]j )}(hj7|h]hdrm_dp_mst_branch}(hj]|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjY|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj9|hhhjJ|hK_ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5|hhhjJ|hK_ubah}(h]j0|ah ](j j eh"]h$]h&]j j )j huh1j hjJ|hK_hj2|hhubj )}(hhh]h)}(hMST branch device.h]hMST branch device.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj||hhubah}(h]h ]h"]h$]h&]uh1j hj2|hhhjJ|hK_ubeh}(h]h ](j structeh"]h$]h&]j" j j# j|j$ j|j% j& j' uh1j hhhjshNhNubj) )}(hX) **Definition**:: struct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; }; **Members** ``topology_kref`` refcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch this ``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc(). ``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. ``destroy_next`` linked-list entry used by drm_dp_delayed_destroy_work() ``rad`` Relative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second. ``lct`` Link count total to talk to this branch device. ``num_ports`` number of ports on the branch. ``ports`` the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock** ``port_parent`` pointer to the port parent, NULL if toplevel. ``mgr`` topology manager for this branch device. ``link_address_sent`` if a link address message has been sent to this device yet. ``guid`` guid for DP 1.2 branch device. port under this branch can be identified by port #.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubh:}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj|ubjN )}(hXstruct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; };h]hXstruct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; };}hj|sbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj|ubh)}(h **Members**h]j3 )}(hj|h]hMembers}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj|ubjw )}(hhh](j| )}(h``topology_kref`` refcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch this h](j )}(h``topology_kref``h]j )}(hj|h]h topology_kref}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj|ubj )}(hhh]h)}(hmrefcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch thish]horefcount for this branch device’s lifetime in the topology, only the DP MST helpers should need to touch this}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj}ubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hKhj|ubj| )}(h``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc(). h](j )}(h``malloc_kref``h]j )}(hj&}h]h malloc_kref}(hj(}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$}ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj }ubj )}(hhh]h)}(hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc().h]hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc().}(hj?}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj<}ubah}(h]h ]h"]h$]h&]uh1j hj }ubeh}(h]h ]h"]h$]h&]uh1j{ hj;}hKhj|ubj| )}(hv``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. h](j )}(h``topology_ref_history``h]j )}(hj`}h]htopology_ref_history}(hjb}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^}ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjZ}ubj )}(hhh]h)}(h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.h]h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.}(hjy}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjv}ubah}(h]h ]h"]h$]h&]uh1j hjZ}ubeh}(h]h ]h"]h$]h&]uh1j{ hju}hKhj|ubj| )}(hI``destroy_next`` linked-list entry used by drm_dp_delayed_destroy_work() h](j )}(h``destroy_next``h]j )}(hj}h]h destroy_next}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj}ubj )}(hhh]h)}(h7linked-list entry used by drm_dp_delayed_destroy_work()h]h7linked-list entry used by drm_dp_delayed_destroy_work()}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hKhj|ubj| )}(hXN``rad`` Relative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second. h](j )}(h``rad``h]j )}(hj}h]hrad}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj}ubj )}(hhh]h)}(hXERelative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second.h](h(Relative Address of the MST branch. For }(hj}hhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.mst_primary `h]j )}(hj}h]h#drm_dp_mst_topology_mgr.mst_primary}(hj}hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj}ubh, it’s rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second.}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj~hKhj}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hKhj|ubj| )}(h8``lct`` Link count total to talk to this branch device. h](j )}(h``lct``h]j )}(hj1~h]hlct}(hj3~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/~ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj+~ubj )}(hhh]h)}(h/Link count total to talk to this branch device.h]h/Link count total to talk to this branch device.}(hjJ~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjF~hKhjG~ubah}(h]h ]h"]h$]h&]uh1j hj+~ubeh}(h]h ]h"]h$]h&]uh1j{ hjF~hKhj|ubj| )}(h-``num_ports`` number of ports on the branch. h](j )}(h ``num_ports``h]j )}(hjj~h]h num_ports}(hjl~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjh~ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjd~ubj )}(hhh]h)}(hnumber of ports on the branch.h]hnumber of ports on the branch.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hKhj~ubah}(h]h ]h"]h$]h&]uh1j hjd~ubeh}(h]h ]h"]h$]h&]uh1j{ hj~hKhj|ubj| )}(hX?``ports`` the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock** h](j )}(h ``ports``h]j )}(hj~h]hports}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj~ubj )}(hhh]h)}(hX4the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock**h](h\the list of ports on this branch device. This should be considered protected for reading by }(hj~hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]j )}(hj~h]hdrm_dp_mst_topology_mgr.lock}(hj~hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhj~ubh$. There are two exceptions to this: }(hj~hhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.up_req_work `h]j )}(hj~h]h#drm_dp_mst_topology_mgr.up_req_work}(hj~hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj~hKhj~ubh and }(hj~hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.work `h]j )}(hj h]hdrm_dp_mst_topology_mgr.work}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj~hKhj~ubh, which do not grab }(hj~hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]j )}(hj0h]hdrm_dp_mst_topology_mgr.lock}(hj2hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj~hKhj~ubhn during reads but are the only updaters of this list and are protected from updating the list concurrently by }(hj~hhhNhNubj3 )}(h&**drm_dp_mst_topology_mgr.probe_lock**h]h"drm_dp_mst_topology_mgr.probe_lock}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~ubeh}(h]h ]h"]h$]h&]uh1hhj~hKhj~ubah}(h]h ]h"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]uh1j{ hj~hKhj|ubj| )}(h>``port_parent`` pointer to the port parent, NULL if toplevel. h](j )}(h``port_parent``h]j )}(hjwh]h port_parent}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjqubj )}(hhh]h)}(h-pointer to the port parent, NULL if toplevel.h]h-pointer to the port parent, NULL if toplevel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhj|ubj| )}(h1``mgr`` topology manager for this branch device. h](j )}(h``mgr``h]j )}(hjh]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjubj )}(hhh]h)}(h(topology manager for this branch device.h]h(topology manager for this branch device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhj|ubj| )}(hR``link_address_sent`` if a link address message has been sent to this device yet. h](j )}(h``link_address_sent``h]j )}(hjh]hlink_address_sent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjubj )}(hhh]h)}(h;if a link address message has been sent to this device yet.h]h;if a link address message has been sent to this device yet.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhj|ubj| )}(h[``guid`` guid for DP 1.2 branch device. port under this branch can be identified by port #.h](j )}(h``guid``h]j )}(hj"h]hguid}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjubj )}(hhh]h)}(hRguid for DP 1.2 branch device. port under this branch can be identified by port #.h]hRguid for DP 1.2 branch device. port under this branch can be identified by port #.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hKhj8ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj7hKhj|ubeh}(h]h ]h"]h$]h&]uh1jv hj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubh)}(h**Description**h]j3 )}(hjdh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjshhubh)}(hThis structure represents an MST branch device, there is one primary branch device at the root, along with any other branches connected to downstream port of parent branches.h]hThis structure represents an MST branch device, there is one primary branch device at the root, along with any other branches connected to downstream port of parent branches.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKhjshhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_mst_atomic_payload (C struct)c.drm_dp_mst_atomic_payloadhNtauh1j hjshhhNhNubj )}(hhh](j )}(hdrm_dp_mst_atomic_payloadh]j )}(h struct drm_dp_mst_atomic_payloadh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhKubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKubj )}(hdrm_dp_mst_atomic_payloadh]j )}(hjh]hdrm_dp_mst_atomic_payload}(hj€hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h)}(h&Atomic state struct for an MST payloadh]h&Atomic state struct for an MST payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j structeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX **Definition**:: struct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; }; **Members** ``port`` The MST port assigned to this payload ``vc_start_slot`` The time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations. Since this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either: * Read this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called. * Acquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. If neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads. ``vcpi`` The Virtual Channel Payload Identifier ``time_slots`` The number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx ``pbn`` The payload bandwidth for this payload ``delete`` Whether or not we intend to delete this payload during this atomic commit ``dsc_enabled`` Whether or not this payload has DSC enabled ``payload_allocation_status`` The allocation status of this payload ``next`` The list node for this payloadh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubjN )}(hXstruct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; };h]hXstruct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; };}hj!sbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(h **Members**h]j3 )}(hj2h]hMembers}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM$hjubjw )}(hhh](j| )}(h/``port`` The MST port assigned to this payload h](j )}(h``port``h]j )}(hjQh]hport}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjKubj )}(hhh]h)}(h%The MST port assigned to this payloadh]h%The MST port assigned to this payload}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjgubah}(h]h ]h"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]uh1j{ hjfhMhjHubj| )}(hX``vc_start_slot`` The time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations. Since this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either: * Read this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called. * Acquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. If neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads. h](j )}(h``vc_start_slot``h]j )}(hjh]h vc_start_slot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM2hjubj )}(hhh](h)}(hXThe time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations.h]hXThe time slot that this payload starts on. Because payload start slots can’t be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn’t usually matter, as the start slot should never be relevant for atomic state computations.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hXSSince this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either:h]hXSSince this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM"hjubh)}(hhh](h)}(hXgRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.h]h)}(hXgRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.h]hXiRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won’t be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.}(hjȁhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM'hjāubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hXAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. h]h)}(hXAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `.h](hAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the }(hjhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]j )}(hjh]hdrm_crtc_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM,hjubh structs in }(hjhhhNhNubh)}(hK:c:type:`drm_dp_mst_topology_state.commit_deps `h]j )}(hjh]h%drm_dp_mst_topology_state.commit_deps}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhjhM,hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM,hj݁ubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNjOuh1hhjցhM'hjubh)}(hIf neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads.h]hIf neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM0hjubeh}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM2hjHubj| )}(h0``vcpi`` The Virtual Channel Payload Identifier h](j )}(h``vcpi``h]j )}(hjch]hvcpi}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM6hj]ubj )}(hhh]h)}(h&The Virtual Channel Payload Identifierh]h&The Virtual Channel Payload Identifier}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhM6hjyubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhM6hjHubj| )}(hy``time_slots`` The number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx h](j )}(h``time_slots``h]j )}(hjh]h time_slots}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM:hjubj )}(hhh]h)}(hiThe number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rxh]hiThe number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM9hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM:hjHubj| )}(h/``pbn`` The payload bandwidth for this payload h](j )}(h``pbn``h]j )}(hjւh]hpbn}(hj؂hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjԂubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM>hjЂubj )}(hhh]h)}(h&The payload bandwidth for this payloadh]h&The payload bandwidth for this payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1j hjЂubeh}(h]h ]h"]h$]h&]uh1j{ hjhM>hjHubj| )}(hU``delete`` Whether or not we intend to delete this payload during this atomic commit h](j )}(h ``delete``h]j )}(hjh]hdelete}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMAhj ubj )}(hhh]h)}(hIWhether or not we intend to delete this payload during this atomic commith]hIWhether or not we intend to delete this payload during this atomic commit}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMAhj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMAhjHubj| )}(h<``dsc_enabled`` Whether or not this payload has DSC enabled h](j )}(h``dsc_enabled``h]j )}(hjHh]h dsc_enabled}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMChjBubj )}(hhh]h)}(h+Whether or not this payload has DSC enabledh]h+Whether or not this payload has DSC enabled}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMChj^ubah}(h]h ]h"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]uh1j{ hj]hMChjHubj| )}(hD``payload_allocation_status`` The allocation status of this payload h](j )}(h``payload_allocation_status``h]j )}(hjh]hpayload_allocation_status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMFhj{ubj )}(hhh]h)}(h%The allocation status of this payloadh]h%The allocation status of this payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMFhjHubj| )}(h'``next`` The list node for this payloadh](j )}(h``next``h]j )}(hjh]hnext}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMHhjubj )}(hhh]h)}(hThe list node for this payloadh]hThe list node for this payload}(hjӃhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMIhjЃubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjσhMHhjHubeh}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMLhjshhubh)}(hThe primary atomic state structure for a given MST payload. Stores information like current bandwidth allocation, intended action for this payload, etc.h]hThe primary atomic state structure for a given MST payload. Stores information like current bandwidth allocation, intended action for this payload, etc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjshhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_mst_topology_state (C struct)c.drm_dp_mst_topology_statehNtauh1j hjshhhNhNubj )}(hhh](j )}(hdrm_dp_mst_topology_stateh]j )}(h struct drm_dp_mst_topology_stateh](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7hhhjHhMubj )}(hdrm_dp_mst_topology_stateh]j )}(hj5h]hdrm_dp_mst_topology_state}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ](j j eh"]h$]h&]j j uh1j hj7hhhjHhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhjHhMubah}(h]j.ah ](j j eh"]h$]h&]j j )j huh1j hjHhMhj0hhubj )}(hhh]h)}(h%DisplayPort MST topology atomic stateh]h%DisplayPort MST topology atomic state}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMMhjzhhubah}(h]h ]h"]h$]h&]uh1j hj0hhhjHhMubeh}(h]h ](j structeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Definition**:: struct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; }; **Members** ``base`` Base private state for atomic ``mgr`` The topology manager ``pending_crtc_mask`` A bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed. ``commit_deps`` A list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called. ``num_commit_deps`` The number of CRTC commits in **commit_deps** ``payload_mask`` A bitmask of allocated VCPIs, used for VCPI assignments ``payloads`` The list of payloads being created/destroyed in this state ``total_avail_slots`` The total number of slots this topology can handle (63 or 64) ``start_slot`` The first usable time slot in this topology (1 or 0) ``pbn_div`` The current PBN divisor for this topology. The driver is expected to fill this out itself.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMQhjubjN )}(hXLstruct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; };h]hXLstruct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; };}hjsbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMShjubh)}(h **Members**h]j3 )}(hj˄h]hMembers}(hj̈́hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjɄubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM`hjubjw )}(hhh](j| )}(h'``base`` Base private state for atomic h](j )}(h``base``h]j )}(hjh]hbase}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMShjubj )}(hhh]h)}(hBase private state for atomich]hBase private state for atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMShjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMShjubj| )}(h``mgr`` The topology manager h](j )}(h``mgr``h]j )}(hj#h]hmgr}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMVhjubj )}(hhh]h)}(hThe topology managerh]hThe topology manager}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMVhj9ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj8hMVhjubj| )}(h``pending_crtc_mask`` A bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed. h](j )}(h``pending_crtc_mask``h]j )}(hj\h]hpending_crtc_mask}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM[hjVubj )}(hhh]h)}(huA bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed.h]huA bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMZhjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhM[hjubj| )}(h``commit_deps`` A list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called. h](j )}(h``commit_deps``h]j )}(hjh]h commit_deps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM`hjubj )}(hhh]h)}(hA list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called.h]hA list of all CRTC commits affecting this topology, this field isn’t populated until drm_dp_mst_atomic_wait_for_dependencies() is called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM_hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM`hjubj| )}(hB``num_commit_deps`` The number of CRTC commits in **commit_deps** h](j )}(h``num_commit_deps``h]j )}(hjЅh]hnum_commit_deps}(hj҅hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj΅ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMchjʅubj )}(hhh]h)}(h-The number of CRTC commits in **commit_deps**h](hThe number of CRTC commits in }(hjhhhNhNubj3 )}(h**commit_deps**h]h commit_deps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubeh}(h]h ]h"]h$]h&]uh1hhjhMchjubah}(h]h ]h"]h$]h&]uh1j hjʅubeh}(h]h ]h"]h$]h&]uh1j{ hjhMchjubj| )}(hI``payload_mask`` A bitmask of allocated VCPIs, used for VCPI assignments h](j )}(h``payload_mask``h]j )}(hjh]h payload_mask}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMfhjubj )}(hhh]h)}(h7A bitmask of allocated VCPIs, used for VCPI assignmentsh]h7A bitmask of allocated VCPIs, used for VCPI assignments}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMfhj-ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj,hMfhjubj| )}(hH``payloads`` The list of payloads being created/destroyed in this state h](j )}(h ``payloads``h]j )}(hjPh]hpayloads}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhhjJubj )}(hhh]h)}(h:The list of payloads being created/destroyed in this stateh]h:The list of payloads being created/destroyed in this state}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhhjfubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hjehMhhjubj| )}(hT``total_avail_slots`` The total number of slots this topology can handle (63 or 64) h](j )}(h``total_avail_slots``h]j )}(hjh]htotal_avail_slots}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMkhjubj )}(hhh]h)}(h=The total number of slots this topology can handle (63 or 64)h]h=The total number of slots this topology can handle (63 or 64)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMkhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMkhjubj| )}(hD``start_slot`` The first usable time slot in this topology (1 or 0) h](j )}(h``start_slot``h]j )}(hj†h]h start_slot}(hjĆhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMmhjubj )}(hhh]h)}(h4The first usable time slot in this topology (1 or 0)h]h4The first usable time slot in this topology (1 or 0)}(hjۆhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj׆hMmhj؆ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj׆hMmhjubj| )}(hf``pbn_div`` The current PBN divisor for this topology. The driver is expected to fill this out itself.h](j )}(h ``pbn_div``h]j )}(hjh]hpbn_div}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMqhjubj )}(hhh]h)}(hZThe current PBN divisor for this topology. The driver is expected to fill this out itself.h]hZThe current PBN divisor for this topology. The driver is expected to fill this out itself.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMqhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMqhjubeh}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubh)}(h**Description**h]j3 )}(hj=h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMuhjshhubh)}(hOThis struct represents the atomic state of the toplevel DisplayPort MST managerh]hOThis struct represents the atomic state of the toplevel DisplayPort MST manager}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMNhjshhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_dp_mst_topology_mgr (C struct)c.drm_dp_mst_topology_mgrhNtauh1j hjshhhNhNubj )}(hhh](j )}(hdrm_dp_mst_topology_mgrh]j )}(hstruct drm_dp_mst_topology_mgrh](j )}(hj h]hstruct}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhjhMSubj )}(hdrm_dp_mst_topology_mgrh]j )}(hjuh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjwhhhjhMSubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjshhhjhMSubah}(h]jnah ](j j eh"]h$]h&]j j )j huh1j hjhMShjphhubj )}(hhh]h)}(hDisplayPort MST managerh]hDisplayPort MST manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMyhjhhubah}(h]h ]h"]h$]h&]uh1j hjphhhjhMSubeh}(h]h ](j structeh"]h$]h&]j" j j# jՇj$ jՇj% j& j' uh1j hhhjshNhNubj) )}(hX**Definition**:: struct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; }; **Members** ``base`` Base private object for atomic ``dev`` device pointer for adding i2c devices etc. ``cbs`` callbacks for connector addition and destruction. ``max_dpcd_transaction_bytes`` maximum number of bytes to read/write in one go. ``aux`` AUX channel for the DP MST connector this topolgy mgr is controlling. ``max_payloads`` maximum number of payloads the GPU can generate. ``conn_base_id`` DRM connector ID this mgr is connected to. Only used to build the MST connector path value. ``up_req_recv`` Message receiver state for up requests. ``down_rep_recv`` Message receiver state for replies to down requests. ``lock`` protects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**. ``probe_lock`` Prevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology. ``mst_state`` If this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected. ``payload_id_table_cleared`` Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**. ``reset_rx_state`` The down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**. ``payload_count`` The number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. ``next_start_slot`` The starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. ``mst_primary`` Pointer to the primary/first branch device. ``dpcd`` Cache of DPCD for primary port. ``sink_count`` Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0. ``funcs`` Atomic helper callbacks ``qlock`` protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state ` ``tx_msg_downq`` List of pending down requests ``tx_waitq`` Wait to queue stall for the tx worker. ``work`` Probe work. ``tx_work`` Sideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches. ``destroy_port_list`` List of to be destroyed connectors. ``destroy_branch_device_list`` List of to be destroyed branch devices. ``delayed_destroy_lock`` Protects **destroy_port_list** and **destroy_branch_device_list**. ``delayed_destroy_wq`` Workqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it. ``delayed_destroy_work`` Work item to destroy MST port and branch devices, needed to avoid locking inversion. ``up_req_list`` List of pending up requests from the topology that need to be processed, in chronological order. ``up_req_lock`` Protects **up_req_list** ``up_req_work`` Work item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions. ``topology_ref_history_lock`` protects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj݇ubh:}(hj݇hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM}hjهubjN )}(hXstruct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; };h]hXstruct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; };}hjsbah}(h]h ]h"]h$]h&]j j uh1jM hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjهubh)}(h **Members**h]j3 )}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjهubjw )}(hhh](j| )}(h(``base`` Base private object for atomic h](j )}(h``base``h]j )}(hj*h]hbase}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj$ubj )}(hhh]h)}(hBase private object for atomich]hBase private object for atomic}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj@ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hMhj!ubj| )}(h3``dev`` device pointer for adding i2c devices etc. h](j )}(h``dev``h]j )}(hjch]hdev}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj]ubj )}(hhh]h)}(h*device pointer for adding i2c devices etc.h]h*device pointer for adding i2c devices etc.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhMhj!ubj| )}(h:``cbs`` callbacks for connector addition and destruction. h](j )}(h``cbs``h]j )}(hjh]hcbs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h1callbacks for connector addition and destruction.h]h1callbacks for connector addition and destruction.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(hP``max_dpcd_transaction_bytes`` maximum number of bytes to read/write in one go. h](j )}(h``max_dpcd_transaction_bytes``h]j )}(hjՈh]hmax_dpcd_transaction_bytes}(hj׈hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjӈubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjψubj )}(hhh]h)}(h0maximum number of bytes to read/write in one go.h]h0maximum number of bytes to read/write in one go.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjψubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(hN``aux`` AUX channel for the DP MST connector this topolgy mgr is controlling. h](j )}(h``aux``h]j )}(hjh]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj ubj )}(hhh]h)}(hEAUX channel for the DP MST connector this topolgy mgr is controlling.h]hEAUX channel for the DP MST connector this topolgy mgr is controlling.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMhj!ubj| )}(hB``max_payloads`` maximum number of payloads the GPU can generate. h](j )}(h``max_payloads``h]j )}(hjIh]h max_payloads}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjCubj )}(hhh]h)}(h0maximum number of payloads the GPU can generate.h]h0maximum number of payloads the GPU can generate.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj_ubah}(h]h ]h"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]uh1j{ hj^hMhj!ubj| )}(hm``conn_base_id`` DRM connector ID this mgr is connected to. Only used to build the MST connector path value. h](j )}(h``conn_base_id``h]j )}(hjh]h conn_base_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj|ubj )}(hhh]h)}(h[DRM connector ID this mgr is connected to. Only used to build the MST connector path value.h]h[DRM connector ID this mgr is connected to. Only used to build the MST connector path value.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h8``up_req_recv`` Message receiver state for up requests. h](j )}(h``up_req_recv``h]j )}(hjh]h up_req_recv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h'Message receiver state for up requests.h]h'Message receiver state for up requests.}(hjՉhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjщhMhj҉ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjщhMhj!ubj| )}(hG``down_rep_recv`` Message receiver state for replies to down requests. h](j )}(h``down_rep_recv``h]j )}(hjh]h down_rep_recv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h4Message receiver state for replies to down requests.h]h4Message receiver state for replies to down requests.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhj!ubj| )}(h^``lock`` protects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**. h](j )}(h``lock``h]j )}(hj/h]hlock}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj)ubj )}(hhh]h)}(hTprotects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**.h](h protects }(hjHhhhNhNubj3 )}(h **mst_state**h]h mst_state}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubh, }(hjHhhhNhNubj3 )}(h**mst_primary**h]h mst_primary}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubh, }hjHsbj3 )}(h**dpcd**h]hdpcd}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubh, and }(hjHhhhNhNubj3 )}(h**payload_id_table_cleared**h]hpayload_id_table_cleared}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubh.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjEubah}(h]h ]h"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]uh1j{ hjDhMhj!ubj| )}(h``probe_lock`` Prevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology. h](j )}(h``probe_lock``h]j )}(hjh]h probe_lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hPrevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology.h](h Prevents }(hjʊhhhNhNubj3 )}(h**work**h]hwork}(hjҊhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjʊubh and }(hjʊhhhNhNubj3 )}(h**up_req_work**h]h up_req_work}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjʊubh, the only writers of }(hjʊhhhNhNubh)}(h0:c:type:`drm_dp_mst_port.mstb `h]j )}(hjh]hdrm_dp_mst_port.mstb}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjʊubh and }hjʊsbh)}(h5:c:type:`drm_dp_mst_branch.ports `h]j )}(hjh]hdrm_dp_mst_branch.ports}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjʊubh-, from racing while they update the topology.}(hjʊhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjNJubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjƊhMhj!ubj| )}(ht``mst_state`` If this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected. h](j )}(h ``mst_state``h]j )}(hjUh]h mst_state}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjOubj )}(hhh]h)}(heIf this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected.h]heIf this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjkubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjjhMhj!ubj| )}(h{``payload_id_table_cleared`` Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**. h](j )}(h``payload_id_table_cleared``h]j )}(hjh]hpayload_id_table_cleared}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h]Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**.h](h8Whether or not we’ve cleared the payload ID table for }(hjhhhNhNubj3 )}(h**mst_primary**h]h mst_primary}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh. Protected by }(hjhhhNhNubj3 )}(h**lock**h]hlock}(hj‹hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h``reset_rx_state`` The down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**. h](j )}(h``reset_rx_state``h]j )}(hjh]hreset_rx_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hThe down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**.h](hThe down request’s reply and up request message receiver state must be reset, after the topology manager got removed. Protected by }(hjhhhNhNubj3 )}(h**lock**h]hlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h``payload_count`` The number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. h](j )}(h``payload_count``h]j )}(hj9h]h payload_count}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj3ubj )}(hhh]h)}(hThe number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.h]hThe number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjOubah}(h]h ]h"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]uh1j{ hjNhMhj!ubj| )}(h``next_start_slot`` The starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. h](j )}(h``next_start_slot``h]j )}(hjsh]hnext_start_slot}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjmubj )}(hhh]h)}(hThe starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.h]hThe starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h<``mst_primary`` Pointer to the primary/first branch device. h](j )}(h``mst_primary``h]j )}(hjh]h mst_primary}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h+Pointer to the primary/first branch device.h]h+Pointer to the primary/first branch device.}(hjƌhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjŒhMhjÌubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjŒhMhj!ubj| )}(h)``dpcd`` Cache of DPCD for primary port. h](j )}(h``dpcd``h]j )}(hjh]hdpcd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hCache of DPCD for primary port.h]hCache of DPCD for primary port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h?``sink_count`` Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0. h](j )}(h``sink_count``h]j )}(hjh]h sink_count}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h/Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.h]h/Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj5ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj4hMhj!ubj| )}(h"``funcs`` Atomic helper callbacks h](j )}(h ``funcs``h]j )}(hjXh]hfuncs}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjRubj )}(hhh]h)}(hAtomic helper callbacksh]hAtomic helper callbacks}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjnubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjmhMhj!ubj| )}(hh``qlock`` protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state ` h](j )}(h ``qlock``h]j )}(hjh]hqlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h]protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state `h](h protects }(hjhhhNhNubj3 )}(h**tx_msg_downq**h]h tx_msg_downq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubh)}(h?:c:type:`drm_dp_sideband_msg_tx.state `h]j )}(hjƍh]hdrm_dp_sideband_msg_tx.state}(hjȍhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjčubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_sideband_msg_txuh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h/``tx_msg_downq`` List of pending down requests h](j )}(h``tx_msg_downq``h]j )}(hjh]h tx_msg_downq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hList of pending down requestsh]hList of pending down requests}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h4``tx_waitq`` Wait to queue stall for the tx worker. h](j )}(h ``tx_waitq``h]j )}(hj4h]htx_waitq}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj.ubj )}(hhh]h)}(h&Wait to queue stall for the tx worker.h]h&Wait to queue stall for the tx worker.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]uh1j{ hjIhMhj!ubj| )}(h``work`` Probe work. h](j )}(h``work``h]j )}(hjmh]hwork}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjgubj )}(hhh]h)}(h Probe work.h]h Probe work.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjgubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h|``tx_work`` Sideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches. h](j )}(h ``tx_work``h]j )}(hjh]htx_work}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hoSideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches.h](h8Sideband transmit worker. This can nest within the main }(hjhhhNhNubj3 )}(h**work**h]hwork}(hjǎhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh worker for each transaction }(hjhhhNhNubj3 )}(h**work**h]hwork}(hjَhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh launches.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h:``destroy_port_list`` List of to be destroyed connectors. h](j )}(h``destroy_port_list``h]j )}(hjh]hdestroy_port_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h#List of to be destroyed connectors.h]h#List of to be destroyed connectors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(hG``destroy_branch_device_list`` List of to be destroyed branch devices. h](j )}(h``destroy_branch_device_list``h]j )}(hj=h]hdestroy_branch_device_list}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM hj7ubj )}(hhh]h)}(h'List of to be destroyed branch devices.h]h'List of to be destroyed branch devices.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM hjSubah}(h]h ]h"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]uh1j{ hjRhM hj!ubj| )}(h\``delayed_destroy_lock`` Protects **destroy_port_list** and **destroy_branch_device_list**. h](j )}(h``delayed_destroy_lock``h]j )}(hjwh]hdelayed_destroy_lock}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjqubj )}(hhh]h)}(hBProtects **destroy_port_list** and **destroy_branch_device_list**.h](h Protects }(hjhhhNhNubj3 )}(h**destroy_port_list**h]hdestroy_port_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh and }(hjhhhNhNubj3 )}(h**destroy_branch_device_list**h]hdestroy_branch_device_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(h``delayed_destroy_wq`` Workqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it. h](j )}(h``delayed_destroy_wq``h]j )}(hjՏh]hdelayed_destroy_wq}(hj׏hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjӏubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjϏubj )}(hhh]h)}(hwWorkqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it.h]hwWorkqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjϏubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj!ubj| )}(hn``delayed_destroy_work`` Work item to destroy MST port and branch devices, needed to avoid locking inversion. h](j )}(h``delayed_destroy_work``h]j )}(hjh]hdelayed_destroy_work}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj ubj )}(hhh]h)}(hTWork item to destroy MST port and branch devices, needed to avoid locking inversion.h]hTWork item to destroy MST port and branch devices, needed to avoid locking inversion.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMhj!ubj| )}(hq``up_req_list`` List of pending up requests from the topology that need to be processed, in chronological order. h](j )}(h``up_req_list``h]j )}(hjIh]h up_req_list}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM$hjCubj )}(hhh]h)}(h`List of pending up requests from the topology that need to be processed, in chronological order.h]h`List of pending up requests from the topology that need to be processed, in chronological order.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM#hj_ubah}(h]h ]h"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]uh1j{ hj^hM$hj!ubj| )}(h)``up_req_lock`` Protects **up_req_list** h](j )}(h``up_req_lock``h]j )}(hjh]h up_req_lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM(hj}ubj )}(hhh]h)}(hProtects **up_req_list**h](h Protects }(hjhhhNhNubj3 )}(h**up_req_list**h]h up_req_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubeh}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM(hj!ubj| )}(h``up_req_work`` Work item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions. h](j )}(h``up_req_work``h]j )}(hjʐh]h up_req_work}(hj̐hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjȐubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM.hjĐubj )}(hhh]h)}(hWork item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions.h]hWork item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM,hjubah}(h]h ]h"]h$]h&]uh1j hjĐubeh}(h]h ]h"]h$]h&]uh1j{ hjߐhM.hj!ubj| )}(h``topology_ref_history_lock`` protects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](j )}(h``topology_ref_history_lock``h]j )}(hjh]htopology_ref_history_lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM5hjubj )}(hhh]h)}(hprotects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](h protects }(hjhhhNhNubh)}(h@:c:type:`drm_dp_mst_port.topology_ref_history `h]j )}(hj'h]h$drm_dp_mst_port.topology_ref_history}(hj)hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM4hjubh and }(hjhhhNhNubh)}(hD:c:type:`drm_dp_mst_branch.topology_ref_history `h]j )}(hjKh]h&drm_dp_mst_branch.topology_ref_history}(hjMhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjDhM4hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhM4hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM5hj!ubeh}(h]h ]h"]h$]h&]uh1jv hjهubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM9hjshhubh)}(hThis struct represents the toplevel displayport MST topology manager. There should be one instance of this for every MST capable DP connector on the GPU.h]hThis struct represents the toplevel displayport MST topology manager. There should be one instance of this for every MST capable DP connector on the GPU.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMzhjshhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_mst_mode (C enum)c.drm_dp_mst_modehNtauh1j hjshhhNhNubj )}(hhh](j )}(hdrm_dp_mst_modeh]j )}(henum drm_dp_mst_modeh](j )}(hj7h]henum}(hjˑhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǑhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMubj )}(h h]h }(hjّhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǑhhhjؑhMubj )}(hdrm_dp_mst_modeh]j )}(hjőh]hdrm_dp_mst_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjǑhhhjؑhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjÑhhhjؑhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjؑhMhjhhubj )}(hhh]h)}(hsink's MST mode capabilityh]hsink’s MST mode capability}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMChj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjؑhMubeh}(h]h ](j enumeh"]h$]h&]j" j j# j%j$ j%j% j& j' uh1j hhhjshNhNubj) )}(hX,**Constants** ``DRM_DP_SST`` The sink does not support MST nor single stream sideband messaging. ``DRM_DP_MST`` Sink supports MST, more than one stream and single stream sideband messaging. ``DRM_DP_SST_SIDEBAND_MSG`` Sink supports only one stream and single stream sideband messaging.h](h)}(h **Constants**h]j3 )}(hj/h]h Constants}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMGhj)ubjw )}(hhh](j| )}(hS``DRM_DP_SST`` The sink does not support MST nor single stream sideband messaging. h](j )}(h``DRM_DP_SST``h]j )}(hjNh]h DRM_DP_SST}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMKhjHubj )}(hhh]h)}(hCThe sink does not support MST nor single stream sideband messaging.h]hCThe sink does not support MST nor single stream sideband messaging.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMJhjdubah}(h]h ]h"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]uh1j{ hjchMKhjEubj| )}(h]``DRM_DP_MST`` Sink supports MST, more than one stream and single stream sideband messaging. h](j )}(h``DRM_DP_MST``h]j )}(hjh]h DRM_DP_MST}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMOhjubj )}(hhh]h)}(hMSink supports MST, more than one stream and single stream sideband messaging.h]hMSink supports MST, more than one stream and single stream sideband messaging.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMNhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMOhjEubj| )}(h_``DRM_DP_SST_SIDEBAND_MSG`` Sink supports only one stream and single stream sideband messaging.h](j )}(h``DRM_DP_SST_SIDEBAND_MSG``h]j )}(hj’h]hDRM_DP_SST_SIDEBAND_MSG}(hjĒhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMRhjubj )}(hhh]h)}(hCSink supports only one stream and single stream sideband messaging.h]hCSink supports only one stream and single stream sideband messaging.}(hjےhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjגhMRhjؒubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjגhMRhjEubeh}(h]h ]h"]h$]h&]uh1jv hj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (__drm_dp_mst_state_iter_get (C function)c.__drm_dp_mst_state_iter_gethNtauh1j hjshhhNhNubj )}(hhh](j )}(hbool __drm_dp_mst_state_iter_get (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h]j )}(hbool __drm_dp_mst_state_iter_get(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj(hMubj )}(h__drm_dp_mst_state_iter_geth]j )}(h__drm_dp_mst_state_iter_geth]h__drm_dp_mst_state_iter_get}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj(hMubj)}(h(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjwmodnameN classnameNj j )}j ]j%)}jj=sbc.__drm_dp_mst_state_iter_getasbuh1hhjSubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjSubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(h$struct drm_dp_mst_topology_mgr **mgrh](j )}(hj h]hstruct}(hjɓhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjœubj )}(h h]h }(hj֓hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjœubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.__drm_dp_mst_state_iter_getasbuh1hhjœubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjœubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjœubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjœubj )}(hmgrh]hmgr}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjœubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(h,struct drm_dp_mst_topology_state **old_stateh](j )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]jc.__drm_dp_mst_state_iter_getasbuh1hhjBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjBubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjBubj )}(h old_stateh]h old_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(h,struct drm_dp_mst_topology_state **new_stateh](j )}(hj h]hstruct}(hjÔhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjДhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޔubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.__drm_dp_mst_state_iter_getasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h new_stateh]h new_state}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubj)}(hint ih](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj )}(h h]h }(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubj )}(hih]hi}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjOubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj(hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj(hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj(hMhjhhubj )}(hhh]h)}(h=private atomic state iterator function for macro-internal useh]h=private atomic state iterator function for macro-internal use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj(hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` :c:type:`struct drm_atomic_commit ` pointer ``struct drm_dp_mst_topology_mgr **mgr`` pointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``struct drm_dp_mst_topology_state **old_state`` optional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursor ``struct drm_dp_mst_topology_state **new_state`` optional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursor ``int i`` int iteration cursor, for macro-internal use **Description** Used by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't call this directly. **Return** True if the current :c:type:`struct drm_private_obj ` is a :c:type:`struct drm_dp_mst_topology_mgr `, false otherwise.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubjw )}(hhh](j| )}(hc``struct drm_atomic_commit *state`` :c:type:`struct drm_atomic_commit ` pointer h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjǕh]hstruct drm_atomic_commit *state}(hjɕhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjŕubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]j )}(hjh]hstruct drm_atomic_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhjܕhMhjubh pointer}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjܕhMhjݕubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjܕhMhjubj| )}(h``struct drm_dp_mst_topology_mgr **mgr`` pointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j )}(h(``struct drm_dp_mst_topology_mgr **mgr``h]j )}(hjh]h$struct drm_dp_mst_topology_mgr **mgr}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hbpointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](hpointer to the }(hj8hhhNhNubh)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]j )}(hjBh]hstruct drm_dp_mst_topology_mgr}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhj4hMhj8ubh iteration cursor}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hMhj5ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj4hMhjubj| )}(h``struct drm_dp_mst_topology_state **old_state`` optional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursor h](j )}(h0``struct drm_dp_mst_topology_state **old_state``h]j )}(hj{h]h,struct drm_dp_mst_topology_state **old_state}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjuubj )}(hhh]h)}(hsoptional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursorh](hoptional pointer to the old }(hjhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]j )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjuubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``struct drm_dp_mst_topology_state **new_state`` optional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursor h](j )}(h0``struct drm_dp_mst_topology_state **new_state``h]j )}(hjؖh]h,struct drm_dp_mst_topology_state **new_state}(hjږhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj֖ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjҖubj )}(hhh]h)}(hsoptional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursorh](hoptional pointer to the new }(hjhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]j )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjҖubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h7``int i`` int iteration cursor, for macro-internal use h](j )}(h ``int i``h]j )}(hj5h]hint i}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj/ubj )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjKubah}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hjJhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjph]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hUsed by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't call this directly.h]hUsed by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don’t call this directly.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hTrue if the current :c:type:`struct drm_private_obj ` is a :c:type:`struct drm_dp_mst_topology_mgr `, false otherwise.h](hTrue if the current }(hjhhhNhNubh)}(h2:c:type:`struct drm_private_obj `h]j )}(hjh]hstruct drm_private_obj}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh is a }(hjhhhNhNubh)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]j )}(hjۗh]hstruct drm_dp_mst_topology_mgr}(hjݗhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjٗubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjԗhMhjubh, false otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjԗhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *for_each_oldnew_mst_mgr_in_state (C macro)"c.for_each_oldnew_mst_mgr_in_statehNtauh1j hjshhhNhNubj )}(hhh](j )}(h for_each_oldnew_mst_mgr_in_stateh]j )}(h for_each_oldnew_mst_mgr_in_stateh]j )}(h for_each_oldnew_mst_mgr_in_stateh]j )}(hjh]h for_each_oldnew_mst_mgr_in_state}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj9hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj9hMhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhj9hMubeh}(h]h ](j macroeh"]h$]h&]j" j j# jRj$ jRj% j& j' uh1j hhhjshNhNubh)}(hN``for_each_oldnew_mst_mgr_in_state (__state, mgr, old_state, new_state, __i)``h]j )}(hjXh]hJfor_each_oldnew_mst_mgr_in_state (__state, mgr, old_state, new_state, __i)}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjshhubj^E)}(h>iterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjnubah}(h]h ]h"]h$]h&]uh1j]EhjhMhjshhubj) )}(hX**Parameters** ``__state`` :c:type:`struct drm_atomic_commit ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state ``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubjw )}(hhh](j| )}(hK``__state`` :c:type:`struct drm_atomic_commit ` pointer h](j )}(h ``__state``h]j )}(hjh]h__state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]j )}(hj˘h]hstruct drm_atomic_commit}(hj͘hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjɘubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhjhMhjŘubh pointer}(hjŘhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj˜ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j )}(h``mgr``h]j )}(hjh]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]j )}(hj#h]hstruct drm_dp_mst_topology_mgr}(hj%hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hx``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state h](j )}(h ``old_state``h]j )}(hj\h]h old_state}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjVubj )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]j )}(hj{h]h struct drm_dp_mst_topology_state}(hj}hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjyubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjuubh# iteration cursor for the old state}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMhjubj| )}(hx``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state h](j )}(h ``new_state``h]j )}(hjh]h new_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]j )}(hjԙh]h struct drm_dp_mst_topology_state}(hj֙hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjҙubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjΙubh# iteration cursor for the new state}(hjΙhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj˙ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjʙhMhjubj| )}(h5``__i`` int iteration cursor, for macro-internal use h](j )}(h``__i``h]j )}(hjh]h__i}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hMhj$ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj#hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjIh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM hjubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'for_each_old_mst_mgr_in_state (C macro)c.for_each_old_mst_mgr_in_statehNtauh1j hjshhhNhNubj )}(hhh](j )}(hfor_each_old_mst_mgr_in_stateh]j )}(hfor_each_old_mst_mgr_in_stateh]j )}(hfor_each_old_mst_mgr_in_stateh]j )}(hjh]hfor_each_old_mst_mgr_in_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j macroeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubh)}(h@``for_each_old_mst_mgr_in_state (__state, mgr, old_state, __i)``h]j )}(hjĚh]hiterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjޚhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjښubah}(h]h ]h"]h$]h&]uh1j]EhjhMhjshhubj) )}(hXC**Parameters** ``__state`` :c:type:`struct drm_atomic_commit ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubjw )}(hhh](j| )}(hK``__state`` :c:type:`struct drm_atomic_commit ` pointer h](j )}(h ``__state``h]j )}(hjh]h__state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]j )}(hj7h]hstruct drm_atomic_commit}(hj9hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhj-hMhj1ubh pointer}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMhj.ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj-hMhjubj| )}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j )}(h``mgr``h]j )}(hjph]hmgr}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjjubj )}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]j )}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hx``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state h](j )}(h ``old_state``h]j )}(hjțh]h old_state}(hjʛhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjƛubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhj›ubj )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]j )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh# iteration cursor for the old state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjޛubah}(h]h ]h"]h$]h&]uh1j hj›ubeh}(h]h ]h"]h$]h&]uh1j{ hjݛhMhjubj| )}(h5``__i`` int iteration cursor, for macro-internal use h](j )}(h``__i``h]j )}(hj!h]h__i}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubj )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj\h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'for_each_new_mst_mgr_in_state (C macro)c.for_each_new_mst_mgr_in_statehNtauh1j hjshhhNhNubj )}(hhh](j )}(hfor_each_new_mst_mgr_in_stateh]j )}(hfor_each_new_mst_mgr_in_stateh]j )}(hfor_each_new_mst_mgr_in_stateh]j )}(hjh]hfor_each_new_mst_mgr_in_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM#ubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM#ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM#hjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhM#ubeh}(h]h ](j macroeh"]h$]h&]j" j j# jќj$ jќj% j& j' uh1j hhhjshNhNubh)}(h@``for_each_new_mst_mgr_in_state (__state, mgr, new_state, __i)``h]j )}(hjלh]hiterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM#hjubah}(h]h ]h"]h$]h&]uh1j]EhjhM#hjshhubj) )}(hXr**Parameters** ``__state`` :c:type:`struct drm_atomic_commit ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM'hjubjw )}(hhh](j| )}(hK``__state`` :c:type:`struct drm_atomic_commit ` pointer h](j )}(h ``__state``h]j )}(hj+h]h__state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM%hj%ubj )}(hhh]h)}(h>:c:type:`struct drm_atomic_commit ` pointerh](h)}(h6:c:type:`struct drm_atomic_commit `h]j )}(hjJh]hstruct drm_atomic_commit}(hjLhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_atomic_commituh1hhj@hM%hjDubh pointer}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@hM%hjAubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hM%hj"ubj| )}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](j )}(h``mgr``h]j )}(hjh]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM&hj}ubj )}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]j )}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_mgruh1hhjhM&hjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM&hjubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM&hj"ubj| )}(hx``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state h](j )}(h ``new_state``h]j )}(hj۝h]h new_state}(hjݝhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjٝubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM(hj՝ubj )}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]j )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM'hjubh# iteration cursor for the new state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1j hj՝ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM(hj"ubj| )}(h5``__i`` int iteration cursor, for macro-internal use h](j )}(h``__i``h]j )}(hj4h]h__i}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1j hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM)hj.ubj )}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhM)hjJubah}(h]h ]h"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]uh1j{ hjIhM)hj"ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjoh]h Description}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjmubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM+hjubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:316: ./include/drm/display/drm_dp_mst_helper.hhM*hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_mst_get_port_malloc (C function)c.drm_dp_mst_get_port_mallochNtauh1j hjshhhNhNubj )}(hhh](j )}(h>void drm_dp_mst_get_port_malloc (struct drm_dp_mst_port *port)h]j )}(h=void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjÞhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjžhMubj )}(hdrm_dp_mst_get_port_malloch]j )}(hdrm_dp_mst_get_port_malloch]hdrm_dp_mst_get_port_malloc}(hj՞hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjўubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjžhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjמsbc.drm_dp_mst_get_port_mallocasbuh1hhjubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjžhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjžhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjžhMhjhhubj )}(hhh]h)}(h,Increment the malloc refcount of an MST porth]h,Increment the malloc refcount of an MST port}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjqhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjžhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount of **Description** Increments :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used. Because **port** could potentially be freed at any time by the DP MST helpers if :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, including during a call to this function, drivers that which to make use of :c:type:`struct drm_dp_mst_port ` should ensure that they grab at least one main malloc reference to their MST ports in :c:type:`drm_dp_mst_topology_cbs.add_connector `. This callback is called before there is any chance for :c:type:`drm_dp_mst_port.malloc_kref ` to reach 0. See also: drm_dp_mst_put_port_malloc()h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh]j| )}(h|``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount of h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hZThe :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount ofh](hThe }(hjΟhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hj؟h]hstruct drm_dp_mst_port}(hjڟhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj֟ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjʟhMhjΟubh$ to increment the malloc refcount of}(hjΟhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjʟhMhj˟ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjʟhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hIncrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used.h](h Increments }(hj)hhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]j )}(hj3h]hdrm_dp_mst_port.malloc_kref}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj)ubh. When }(hj)hhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]j )}(hjWh]hdrm_dp_mst_port.malloc_kref}(hjYhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjPhMhj)ubh& reaches 0, the memory allocation for }(hj)hhhNhNubj3 )}(h**port**h]hport}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)ubh will be released and }(hj)hhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj)ubh may no longer be used.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhMhjubh)}(hX.Because **port** could potentially be freed at any time by the DP MST helpers if :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, including during a call to this function, drivers that which to make use of :c:type:`struct drm_dp_mst_port ` should ensure that they grab at least one main malloc reference to their MST ports in :c:type:`drm_dp_mst_topology_cbs.add_connector `. This callback is called before there is any chance for :c:type:`drm_dp_mst_port.malloc_kref ` to reach 0.h](hBecause }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhA could potentially be freed at any time by the DP MST helpers if }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]j )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubhX reaches 0, including during a call to this function, drivers that which to make use of }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhj۠hMhjubhW should ensure that they grab at least one main malloc reference to their MST ports in }(hjhhhNhNubh)}(hI:c:type:`drm_dp_mst_topology_cbs.add_connector `h]j )}(hjh]h%drm_dp_mst_topology_cbs.add_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_cbsuh1hhj۠hMhjubh9. This callback is called before there is any chance for }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]j )}(hj(h]hdrm_dp_mst_port.malloc_kref}(hj*hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhj۠hMhjubh to reach 0.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj۠hMhjubh)}(h&See also: drm_dp_mst_put_port_malloc()h]h&See also: drm_dp_mst_put_port_malloc()}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_mst_put_port_malloc (C function)c.drm_dp_mst_put_port_mallochNtauh1j hjshhhNhNubj )}(hhh](j )}(h>void drm_dp_mst_put_port_malloc (struct drm_dp_mst_port *port)h]j )}(h=void drm_dp_mst_put_port_malloc(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzhhhjhMubj )}(hdrm_dp_mst_put_port_malloch]j )}(hdrm_dp_mst_put_port_malloch]hdrm_dp_mst_put_port_malloc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjzhhhjhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjȡhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj١hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj֡ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjۡmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_mst_put_port_mallocasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjzhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjvhhhjhMubah}(h]jqah ](j j eh"]h$]h&]j j )j huh1j hjhMhjshhubj )}(hhh]h)}(h,Decrement the malloc refcount of an MST porth]h,Decrement the malloc refcount of an MST port}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj;hhubah}(h]h ]h"]h$]h&]uh1j hjshhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jVj$ jVj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount of **Description** Decrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used. See also: drm_dp_mst_get_port_malloc()h](h)}(h**Parameters**h]j3 )}(hj`h]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjZubjw )}(hhh]j| )}(h|``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount of h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjyubj )}(hhh]h)}(hZThe :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount ofh](hThe }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMhjubh$ to decrement the malloc refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjvubah}(h]h ]h"]h$]h&]uh1jv hjZubh)}(h**Description**h]j3 )}(hjݢh]h Description}(hjߢhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjۢubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjZubh)}(hDecrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used.h](h Decrements }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]j )}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]j )}(hj!h]hdrm_dp_mst_port.malloc_kref}(hj#hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj3 )}(h**port**h]hport}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh will be released and }(hjhhhNhNubj3 )}(h**port**h]hport}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjZubh)}(h&See also: drm_dp_mst_get_port_malloc()h]h&See also: drm_dp_mst_get_port_malloc()}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjZubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_dp_mst_connector_late_register (C function)$c.drm_dp_mst_connector_late_registerhNtauh1j hjshhhNhNubj )}(hhh](j )}(hfint drm_dp_mst_connector_late_register (struct drm_connector *connector, struct drm_dp_mst_port *port)h]j )}(heint drm_dp_mst_connector_late_register(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h"drm_dp_mst_connector_late_registerh]j )}(h"drm_dp_mst_connector_late_registerh]h"drm_dp_mst_connector_late_register}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h?(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjأhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԣubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԣubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb$c.drm_dp_mst_connector_late_registerasbuh1hhjԣubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԣubj9)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjԣubj )}(h connectorh]h connector}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԣubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjУubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjjmodnameN classnameNj j )}j ]j$c.drm_dp_mst_connector_late_registerasbuh1hhjFubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjFubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjУubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hLate MST connector registrationh]hLate MST connector registration}(hjˤhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjȤhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hXv**Parameters** ``struct drm_connector *connector`` The MST connector ``struct drm_dp_mst_port *port`` The MST port for this connector **Description** Helper to register the remote aux device for this MST port. Drivers should call this from their mst connector's late_register hook to enable MST aux devices. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh](j| )}(h6``struct drm_connector *connector`` The MST connector h](j )}(h#``struct drm_connector *connector``h]j )}(hj h]hstruct drm_connector *connector$}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hThe MST connectorh]hThe MST connector}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj!hMhjubj| )}(hA``struct drm_dp_mst_port *port`` The MST port for this connector h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjEh]hstruct drm_dp_mst_port *port}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj?ubj )}(hhh]h)}(hThe MST port for this connectorh]hThe MST port for this connector}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hjZhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hHelper to register the remote aux device for this MST port. Drivers should call this from their mst connector's late_register hook to enable MST aux devices.h]hHelper to register the remote aux device for this MST port. Drivers should call this from their mst connector’s late_register hook to enable MST aux devices.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_dp_mst_connector_early_unregister (C function)'c.drm_dp_mst_connector_early_unregisterhNtauh1j hjshhhNhNubj )}(hhh](j )}(hjvoid drm_dp_mst_connector_early_unregister (struct drm_connector *connector, struct drm_dp_mst_port *port)h]j )}(hivoid drm_dp_mst_connector_early_unregister(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h%drm_dp_mst_connector_early_unregisterh]j )}(h%drm_dp_mst_connector_early_unregisterh]h%drm_dp_mst_connector_early_unregister}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h?(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j%)}jjsb'c.drm_dp_mst_connector_early_unregisterasbuh1hhj%ubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc'c.drm_dp_mst_connector_early_unregisterasbuh1hhjubj )}(h h]h }(hjצhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jߥah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h"Early MST connector unregistrationh]h"Early MST connector unregistration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j4j$ j4j% j& j' uh1j hhhjshNhNubj) )}(hXZ**Parameters** ``struct drm_connector *connector`` The MST connector ``struct drm_dp_mst_port *port`` The MST port for this connector **Description** Helper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector's early_unregister hook.h](h)}(h**Parameters**h]j3 )}(hj>h]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj8ubjw )}(hhh](j| )}(h6``struct drm_connector *connector`` The MST connector h](j )}(h#``struct drm_connector *connector``h]j )}(hj]h]hstruct drm_connector *connector}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjWubj )}(hhh]h)}(hThe MST connectorh]hThe MST connector}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMhjsubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjrhMhjTubj| )}(hA``struct drm_dp_mst_port *port`` The MST port for this connector h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hThe MST port for this connectorh]hThe MST port for this connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjTubeh}(h]h ]h"]h$]h&]uh1jv hj8ubh)}(h**Description**h]j3 )}(hjѧh]h Description}(hjӧhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjϧubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj8ubh)}(hHelper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector's early_unregister hook.h]hHelper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector’s early_unregister hook.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dp_add_payload_part1 (C function)c.drm_dp_add_payload_part1hNtauh1j hjshhhNhNubj )}(hhh](j )}(hint drm_dp_add_payload_part1 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h]j )}(hint drm_dp_add_payload_part1(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj$hM ubj )}(hdrm_dp_add_payload_part1h]j )}(hdrm_dp_add_payload_part1h]hdrm_dp_add_payload_part1}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj$hM ubj)}(h}(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjsmodnameN classnameNj j )}j ]j%)}jj9sbc.drm_dp_add_payload_part1asbuh1hhjOubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjOubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjKubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjŨhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjҨhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_add_payload_part1asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjKubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]jc.drm_dp_add_payload_part1asbuh1hhj1ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj1ubj )}(hpayloadh]hpayload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjKubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj$hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj$hM ubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj$hM hj hhubj )}(hhh]h)}(hExecute payload update part 1h]hExecute payload update part 1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hj hhhj$hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jΩj$ jΩj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``struct drm_dp_mst_atomic_payload *payload`` The payload to write **Description** Determines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets. **Return** 0 on success, error code on failure.h](h)}(h**Parameters**h]j3 )}(hjةh]h Parameters}(hjکhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj֩ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjҩubjw )}(hhh](j| )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubj )}(hhh]h)}(hManager to use.h]hManager to use.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hM hjubj| )}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](j )}(h/``struct drm_dp_mst_topology_state *mst_state``h]j )}(hj0h]h+struct drm_dp_mst_topology_state *mst_state}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hj*ubj )}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM hjFubah}(h]h ]h"]h$]h&]uh1j hj*ubeh}(h]h ]h"]h$]h&]uh1j{ hjEhM hjubj| )}(hC``struct drm_dp_mst_atomic_payload *payload`` The payload to write h](j )}(h-``struct drm_dp_mst_atomic_payload *payload``h]j )}(hjih]h)struct drm_dp_mst_atomic_payload *payload}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjcubj )}(hhh]h)}(hThe payload to writeh]hThe payload to write}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hM hjubah}(h]h ]h"]h$]h&]uh1j hjcubeh}(h]h ]h"]h$]h&]uh1j{ hj~hM hjubeh}(h]h ]h"]h$]h&]uh1jv hjҩubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjҩubh)}(hDetermines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets.h]hDetermines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjҩubh)}(h **Return**h]j3 )}(hj˪h]hReturn}(hjͪhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjɪubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjҩubh)}(h$0 on success, error code on failure.h]h$0 on success, error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjҩubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_remove_payload_part1 (C function)c.drm_dp_remove_payload_part1hNtauh1j hjshhhNhNubj )}(hhh](j )}(hvoid drm_dp_remove_payload_part1 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h]j )}(hvoid drm_dp_remove_payload_part1(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$ ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhjhM$ ubj )}(hdrm_dp_remove_payload_part1h]j )}(hdrm_dp_remove_payload_part1h]hdrm_dp_remove_payload_part1}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhjhM$ ubj)}(h}(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]j%)}jj3sbc.drm_dp_remove_payload_part1asbuh1hhjIubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjIubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj̫hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjݫhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjګubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj߫modnameN classnameNj j )}j ]jc.drm_dp_remove_payload_part1asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]jc.drm_dp_remove_payload_part1asbuh1hhj+ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj9)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj+ubj )}(hpayloadh]hpayload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjEubeh}(h]h ]h"]h$]h&]j j uh1jhj hhhjhM$ ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM$ ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM$ hjhhubj )}(hhh]h)}(h/Remove an MST payload along the virtual channelh]h/Remove an MST payload along the virtual channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$ hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM$ ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jȬj$ jȬj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``struct drm_dp_mst_atomic_payload *payload`` The payload to remove **Description** Removes a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.h](h)}(h**Parameters**h]j3 )}(hjҬh]h Parameters}(hjԬhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjЬubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM( hj̬ubjw )}(hhh](j| )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM% hjubj )}(hhh]h)}(hManager to use.h]hManager to use.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM% hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM% hjubj| )}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](j )}(h/``struct drm_dp_mst_topology_state *mst_state``h]j )}(hj*h]h+struct drm_dp_mst_topology_state *mst_state}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM& hj$ubj )}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hM& hj@ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hM& hjubj| )}(hD``struct drm_dp_mst_atomic_payload *payload`` The payload to remove h](j )}(h-``struct drm_dp_mst_atomic_payload *payload``h]j )}(hjch]h)struct drm_dp_mst_atomic_payload *payload}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM' hj]ubj )}(hhh]h)}(hThe payload to removeh]hThe payload to remove}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhM' hjyubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhM' hjubeh}(h]h ]h"]h$]h&]uh1jv hj̬ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM) hj̬ubh)}(hRemoves a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.h]hRemoves a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM( hj̬ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_remove_payload_part2 (C function)c.drm_dp_remove_payload_part2hNtauh1j hjshhhNhNubj )}(hhh](j )}(hvoid drm_dp_remove_payload_part2 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h]j )}(hvoid drm_dp_remove_payload_part2(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߭hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMC ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj߭hhhjhMC ubj )}(hdrm_dp_remove_payload_part2h]j )}(hdrm_dp_remove_payload_part2h]hdrm_dp_remove_payload_part2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj߭hhhjhMC ubj)}(h(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_remove_payload_part2asbuh1hhjubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjlhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jZc.drm_dp_remove_payload_part2asbuh1hhjubj )}(h h]h }(hjήhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjܮhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h3const struct drm_dp_mst_atomic_payload *old_payloadh](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=modnameN classnameNj j )}j ]jZc.drm_dp_remove_payload_part2asbuh1hhjubj )}(h h]h }(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjghhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h old_payloadh]h old_payload}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h-struct drm_dp_mst_atomic_payload *new_payloadh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jZc.drm_dp_remove_payload_part2asbuh1hhjubj )}(h h]h }(hjɯhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjׯhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h new_payloadh]h new_payload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj߭hhhjhMC ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjۭhhhjhMC ubah}(h]j֭ah ](j j eh"]h$]h&]j j )j huh1j hjhMC hjحhhubj )}(hhh]h)}(hRemove an MST payload locallyh]hRemove an MST payload locally}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMC hj hhubah}(h]h ]h"]h$]h&]uh1j hjحhhhjhMC ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j&j$ j&j% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``const struct drm_dp_mst_atomic_payload *old_payload`` The payload with its old state ``struct drm_dp_mst_atomic_payload *new_payload`` The payload with its latest state **Description** Updates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It's independent to the result of payload allocation/deallocation at branch devices along the virtual channel.h](h)}(h**Parameters**h]j3 )}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMG hj*ubjw )}(hhh](j| )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjOh]h#struct drm_dp_mst_topology_mgr *mgr}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMD hjIubj )}(hhh]h)}(hManager to use.h]hManager to use.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMD hjeubah}(h]h ]h"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]uh1j{ hjdhMD hjFubj| )}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](j )}(h/``struct drm_dp_mst_topology_state *mst_state``h]j )}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chME hjubj )}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhME hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhME hjFubj| )}(hW``const struct drm_dp_mst_atomic_payload *old_payload`` The payload with its old state h](j )}(h7``const struct drm_dp_mst_atomic_payload *old_payload``h]j )}(hjh]h3const struct drm_dp_mst_atomic_payload *old_payload}(hjðhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMF hjubj )}(hhh]h)}(hThe payload with its old stateh]hThe payload with its old state}(hjڰhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjְhMF hjװubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjְhMF hjFubj| )}(hT``struct drm_dp_mst_atomic_payload *new_payload`` The payload with its latest state h](j )}(h1``struct drm_dp_mst_atomic_payload *new_payload``h]j )}(hjh]h-struct drm_dp_mst_atomic_payload *new_payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMG hjubj )}(hhh]h)}(h!The payload with its latest stateh]h!The payload with its latest state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMG hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMG hjFubeh}(h]h ]h"]h$]h&]uh1jv hj*ubh)}(h**Description**h]j3 )}(hj5h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMI hj*ubh)}(hXYUpdates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It's independent to the result of payload allocation/deallocation at branch devices along the virtual channel.h]hX[Updates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It’s independent to the result of payload allocation/deallocation at branch devices along the virtual channel.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMH hj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dp_add_payload_part2 (C function)c.drm_dp_add_payload_part2hNtauh1j hjshhhNhNubj )}(hhh](j )}(hmint drm_dp_add_payload_part2 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h]j )}(hlint drm_dp_add_payload_part2(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h](j)}(hinth]hint}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMf ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvhhhjhMf ubj )}(hdrm_dp_add_payload_part2h]j )}(hdrm_dp_add_payload_part2h]hdrm_dp_add_payload_part2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjvhhhjhMf ubj)}(hP(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjıhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjձhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjұubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjױmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_add_payload_part2asbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jc.drm_dp_add_payload_part2asbuh1hhj%ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjshhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hpayloadh]hpayload}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjvhhhjhMf ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjrhhhjhMf ubah}(h]jmah ](j j eh"]h$]h&]j j )j huh1j hjhMf hjohhubj )}(hhh]h)}(hExecute payload update part 2h]hExecute payload update part 2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMf hjhhubah}(h]h ]h"]h$]h&]uh1j hjohhhjhMf ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j²j$ j²j% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_atomic_payload *payload`` The payload to update **Description** If **payload** was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj̲h]h Parameters}(hjβhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjʲubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMj hjƲubjw )}(hhh](j| )}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMg hjubj )}(hhh]h)}(hManager to use.h]hManager to use.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMg hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMg hjubj| )}(hD``struct drm_dp_mst_atomic_payload *payload`` The payload to update h](j )}(h-``struct drm_dp_mst_atomic_payload *payload``h]j )}(hj$h]h)struct drm_dp_mst_atomic_payload *payload}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMh hjubj )}(hhh]h)}(hThe payload to updateh]hThe payload to update}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMh hj:ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj9hMh hjubeh}(h]h ]h"]h$]h&]uh1jv hjƲubh)}(h**Description**h]j3 )}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMj hjƲubh)}(hIf **payload** was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload.h](hIf }(hjuhhhNhNubj3 )}(h **payload**h]hpayload}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubh was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMi hjƲubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMl hjƲubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMm hjƲubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dp_get_vc_payload_bw (C function)c.drm_dp_get_vc_payload_bwhNtauh1j hjshhhNhNubj )}(hhh](j )}(hHfixed20_12 drm_dp_get_vc_payload_bw (int link_rate, int link_lane_count)h]j )}(hGfixed20_12 drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count)h](h)}(hhh]j )}(h fixed20_12h]h fixed20_12}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjݳubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dp_get_vc_payload_bwsbc.drm_dp_get_vc_payload_bwasbuh1hhjٳhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjٳhhhjhMubj )}(hdrm_dp_get_vc_payload_bwh]j )}(hjh]hdrm_dp_get_vc_payload_bw}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjٳhhhjhMubj)}(h$(int link_rate, int link_lane_count)h](j)}(h int link_rateh](j)}(hinth]hint}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h link_rateh]h link_rate}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'ubj)}(hint link_lane_counth](j)}(hinth]hint}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(hlink_lane_counth]hlink_lane_count}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'ubeh}(h]h ]h"]h$]h&]j j uh1jhjٳhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjճhhhjhMubah}(h]jгah ](j j eh"]h$]h&]j j )j huh1j hjhMhjҳhhubj )}(hhh]h)}(h%get the VC payload BW for an MTP linkh]h%get the VC payload BW for an MTP link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjҳhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j´j$ j´j% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``int link_rate`` link rate in 10kbits/s units ``int link_lane_count`` lane count **Description** Calculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP. Returns the BW / timeslot value in 20.12 fixed point format.h](h)}(h**Parameters**h]j3 )}(hj̴h]h Parameters}(hjδhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjʴubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjƴubjw )}(hhh](j| )}(h/``int link_rate`` link rate in 10kbits/s units h](j )}(h``int link_rate``h]j )}(hjh]h int link_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hlink rate in 10kbits/s unitsh]hlink rate in 10kbits/s units}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h#``int link_lane_count`` lane count h](j )}(h``int link_lane_count``h]j )}(hj$h]hint link_lane_count}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h lane counth]h lane count}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj9hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjƴubh)}(h**Description**h]j3 )}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjƴubh)}(hXCalculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP.h]hXCalculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjƴubh)}(hhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]jc.drm_dp_read_mst_capasbuh1hhjubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hauxh]haux}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_mst_capasbuh1hhjubj )}(h h]h }(hj̶hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hdpcdh]hdpcd}(hjڶhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjMh]h[}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubh)}(hhh]j )}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_read_mst_capasbuh1hhjubj9)}(hj=Mh]h]}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h#Read the sink's MST mode capabilityh]h%Read the sink’s MST mode capability}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj<hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jWj$ jWj% j& j' uh1j hhhjshNhNubj) )}(h**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the DPCD capabilities for this sink **Return** enum drm_dp_mst_mode to indicate MST mode capabilityh](h)}(h**Parameters**h]j3 )}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj_ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj[ubjw )}(hhh](j| )}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjzubj )}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjwubj| )}(h]``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the DPCD capabilities for this sink h](j )}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]j )}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h4A cached copy of the DPCD capabilities for this sinkh]h4A cached copy of the DPCD capabilities for this sink}(hjҷhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjηhMhjϷubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjηhMhjwubeh}(h]h ]h"]h$]h&]uh1jv hj[ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj[ubh)}(h4enum drm_dp_mst_mode to indicate MST mode capabilityh]h4enum drm_dp_mst_mode to indicate MST mode capability}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_mst_topology_mgr_set_mst (C function)!c.drm_dp_mst_topology_mgr_set_msthNtauh1j hjshhhNhNubj )}(hhh](j )}(hYint drm_dp_mst_topology_mgr_set_mst (struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h]j )}(hXint drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h](j)}(hinth]hint}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM7ubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5hhhjGhM7ubj )}(hdrm_dp_mst_topology_mgr_set_msth]j )}(hdrm_dp_mst_topology_mgr_set_msth]hdrm_dp_mst_topology_mgr_set_mst}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVubah}(h]h ](j j eh"]h$]h&]j j uh1j hj5hhhjGhM7ubj)}(h5(struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj\sb!c.drm_dp_mst_topology_mgr_set_mstasbuh1hhjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj9)}(hjOh]h*}(hj¸hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjrubj )}(hmgrh]hmgr}(hjϸhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubj)}(hbool mst_stateh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjnubeh}(h]h ]h"]h$]h&]j j uh1jhj5hhhjGhM7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj1hhhjGhM7ubah}(h]j,ah ](j j eh"]h$]h&]j j )j huh1j hjGhM7hj.hhubj )}(hhh]h)}(h(Set the MST state for a topology managerh]h(Set the MST state for a topology manager}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM7hj*hhubah}(h]h ]h"]h$]h&]uh1j hj.hhhjGhM7ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jEj$ jEj% j& j' uh1j hhhjshNhNubj) )}(hXH**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to set state for ``bool mst_state`` true to enable MST on this connector - false to disable. **Description** This is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.h](h)}(h**Parameters**h]j3 )}(hjOh]h Parameters}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hjIubjw )}(hhh](j| )}(hA``struct drm_dp_mst_topology_mgr *mgr`` manager to set state for h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``)h]j )}(hjnh]h#struct drm_dp_mst_topology_mgr *mgr}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j hjlubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM8hjhubj )}(hhh]h)}(hmanager to set state forh]hmanager to set state for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjhM8hjeubj| )}(hL``bool mst_state`` true to enable MST on this connector - false to disable. h](j )}(h``bool mst_state``h]j )}(hjh]hbool mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9hjubj )}(hhh]h)}(h8true to enable MST on this connector - false to disable.h]h8true to enable MST on this connector - false to disable.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM9hjeubeh}(h]h ]h"]h$]h&]uh1jv hjIubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hjIubh)}(hThis is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.h]hThis is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM:hjIubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_mst_topology_queue_probe (C function)!c.drm_dp_mst_topology_queue_probehNtauh1j hjshhhNhNubj )}(hhh](j )}(hJvoid drm_dp_mst_topology_queue_probe (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hIvoid drm_dp_mst_topology_queue_probe(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhj5hMubj )}(hdrm_dp_mst_topology_queue_probeh]j )}(hdrm_dp_mst_topology_queue_probeh]hdrm_dp_mst_topology_queue_probe}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ](j j eh"]h$]h&]j j uh1j hj#hhhj5hMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjJsb!c.drm_dp_mst_topology_queue_probeasbuh1hhj`ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj`ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj\ubah}(h]h ]h"]h$]h&]j j uh1jhj#hhhj5hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj5hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj5hMhjhhubj )}(hhh]h)}(hQueue a topology probeh]hQueue a topology probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj5hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX[**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to probe **Description** Queue a work to probe the MST topology. Driver's should call this only to sync the topology's HW->SW state after the MST link's parameters have changed in a way the state could've become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh]j| )}(h9``struct drm_dp_mst_topology_mgr *mgr`` manager to probe h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hj(h]h#struct drm_dp_mst_topology_mgr *mgr}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj"ubj )}(hhh]h)}(hmanager to probeh]hmanager to probe}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj>ubah}(h]h ]h"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]uh1j{ hj=hMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjch]h Description}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXQueue a work to probe the MST topology. Driver's should call this only to sync the topology's HW->SW state after the MST link's parameters have changed in a way the state could've become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.h]hXQueue a work to probe the MST topology. Driver’s should call this only to sync the topology’s HW->SW state after the MST link’s parameters have changed in a way the state could’ve become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_mst_topology_mgr_suspend (C function)!c.drm_dp_mst_topology_mgr_suspendhNtauh1j hjshhhNhNubj )}(hhh](j )}(hJvoid drm_dp_mst_topology_mgr_suspend (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hIvoid drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_mst_topology_mgr_suspendh]j )}(hdrm_dp_mst_topology_mgr_suspendh]hdrm_dp_mst_topology_mgr_suspend}(hjɻhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjŻubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj˻sb!c.drm_dp_mst_topology_mgr_suspendasbuh1hhjubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjݻubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hsuspend the MST managerh]hsuspend the MST manager}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjehhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(h**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to suspend **Description** This function tells the MST device that we can't handle UP messages anymore. This should stop it from sending any since we are suspended.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh]j| )}(h;``struct drm_dp_mst_topology_mgr *mgr`` manager to suspend h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hmanager to suspendh]hmanager to suspend}(hj¼hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis function tells the MST device that we can't handle UP messages anymore. This should stop it from sending any since we are suspended.h]hThis function tells the MST device that we can’t handle UP messages anymore. This should stop it from sending any since we are suspended.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_dp_mst_topology_mgr_resume (C function) c.drm_dp_mst_topology_mgr_resumehNtauh1j hjshhhNhNubj )}(hhh](j )}(hSint drm_dp_mst_topology_mgr_resume (struct drm_dp_mst_topology_mgr *mgr, bool sync)h]j )}(hRint drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr, bool sync)h](j)}(hinth]hint}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%hhhj7hMubj )}(hdrm_dp_mst_topology_mgr_resumeh]j )}(hdrm_dp_mst_topology_mgr_resumeh]hdrm_dp_mst_topology_mgr_resume}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjFubah}(h]h ](j j eh"]h$]h&]j j uh1j hj%hhhj7hMubj)}(h0(struct drm_dp_mst_topology_mgr *mgr, bool sync)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjLsb c.drm_dp_mst_topology_mgr_resumeasbuh1hhjbubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjbubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj^ubj)}(h bool synch](j)}(hjIh]hbool}(hjؽhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԽubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԽubj )}(hsynch]hsync}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԽubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj^ubeh}(h]h ]h"]h$]h&]j j uh1jhj%hhhj7hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj!hhhj7hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj7hMhjhhubj )}(hhh]h)}(hresume the MST managerh]hresume the MST manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj7hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j5j$ j5j% j& j' uh1j hhhjshNhNubj) )}(hXT**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to resume ``bool sync`` whether or not to perform topology reprobing synchronously **Description** This will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return. If the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked. During system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with **sync** set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with **sync** set to false in order to avoid deadlocking. **Return** -1 if the MST topology was removed while we were suspended, 0 otherwise.h](h)}(h**Parameters**h]j3 )}(hj?h]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubjw )}(hhh](j| )}(h:``struct drm_dp_mst_topology_mgr *mgr`` manager to resume h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hj^h]h#struct drm_dp_mst_topology_mgr *mgr}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjXubj )}(hhh]h)}(hmanager to resumeh]hmanager to resume}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjtubah}(h]h ]h"]h$]h&]uh1j hjXubeh}(h]h ]h"]h$]h&]uh1j{ hjshMhjUubj| )}(hI``bool sync`` whether or not to perform topology reprobing synchronously h](j )}(h ``bool sync``h]j )}(hjh]h bool sync}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h:whether or not to perform topology reprobing synchronouslyh]h:whether or not to perform topology reprobing synchronously}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjUubeh}(h]h ]h"]h$]h&]uh1jv hj9ubh)}(h**Description**h]j3 )}(hjҾh]h Description}(hjԾhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjоubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubh)}(hwThis will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return.h]hwThis will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubh)}(hkIf the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked.h]hkIf the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubh)}(hXnDuring system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with **sync** set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with **sync** set to false in order to avoid deadlocking.h](hDuring system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with }(hjhhhNhNubj3 )}(h**sync**h]hsync}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with }(hjhhhNhNubj3 )}(h**sync**h]hsync}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh, set to false in order to avoid deadlocking.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubh)}(h **Return**h]j3 )}(hj;h]hReturn}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubh)}(hH-1 if the MST topology was removed while we were suspended, 0 otherwise.h]hH-1 if the MST topology was removed while we were suspended, 0 otherwise.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_mst_hpd_irq_handle_event (C function)!c.drm_dp_mst_hpd_irq_handle_eventhNtauh1j hjshhhNhNubj )}(hhh](j )}(hpint drm_dp_mst_hpd_irq_handle_event (struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h]j )}(hoint drm_dp_mst_hpd_irq_handle_event(struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|hhhjhMxubj )}(hdrm_dp_mst_hpd_irq_handle_eventh]j )}(hdrm_dp_mst_hpd_irq_handle_eventh]hdrm_dp_mst_hpd_irq_handle_event}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj|hhhjhMxubj)}(hL(struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjʿhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjۿhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjؿubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjݿmodnameN classnameNj j )}j ]j%)}jjsb!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h const u8 *esih](j )}(hjch]hconst}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubh)}(hhh]j )}(hu8h]hu8}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]j!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhj+ubj )}(h h]h }(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj9)}(hjOh]h*}(hjyhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj+ubj )}(hesih]hesi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 *ackh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hackh]hack}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h bool *handledh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hhandledh]hhandled}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj|hhhjhMxubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjxhhhjhMxubah}(h]jsah ](j j eh"]h$]h&]j j )j huh1j hjhMxhjuhhubj )}(hhh]h)}(h MST hotplug IRQ handle MST eventh]h MST hotplug IRQ handle MST event}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjChhubah}(h]h ]h"]h$]h&]uh1j hjuhhhjhMxubeh}(h]h ](j functioneh"]h$]h&]j" j j# j^j$ j^j% j& j' uh1j hhhjshNhNubj) )}(hXn**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. ``const u8 *esi`` 4 bytes from SINK_COUNT_ESI ``u8 *ack`` 4 bytes used to ack events starting from SINK_COUNT_ESI ``bool *handled`` whether the hpd interrupt was consumed or not **Description** This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later. Note that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the 'handled' is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed. See also: drm_dp_mst_hpd_irq_send_new_request()h](h)}(h**Parameters**h]j3 )}(hjhh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM|hjbubjw )}(hhh](j| )}(hC``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMyhjubj )}(hhh]h)}(hmanager to notify irq for.h]hmanager to notify irq for.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMyhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMyhj~ubj| )}(h.``const u8 *esi`` 4 bytes from SINK_COUNT_ESI h](j )}(h``const u8 *esi``h]j )}(hjh]h const u8 *esi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMzhjubj )}(hhh]h)}(h4 bytes from SINK_COUNT_ESIh]h4 bytes from SINK_COUNT_ESI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMzhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMzhj~ubj| )}(hD``u8 *ack`` 4 bytes used to ack events starting from SINK_COUNT_ESI h](j )}(h ``u8 *ack``h]j )}(hjh]hu8 *ack}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM{hjubj )}(hhh]h)}(h74 bytes used to ack events starting from SINK_COUNT_ESIh]h74 bytes used to ack events starting from SINK_COUNT_ESI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM{hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM{hj~ubj| )}(h@``bool *handled`` whether the hpd interrupt was consumed or not h](j )}(h``bool *handled``h]j )}(hj2h]h bool *handled}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM|hj,ubj )}(hhh]h)}(h-whether the hpd interrupt was consumed or noth]h-whether the hpd interrupt was consumed or not}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM|hjHubah}(h]h ]h"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]uh1j{ hjGhM|hj~ubeh}(h]h ]h"]h$]h&]uh1jv hjbubh)}(h**Description**h]j3 )}(hjmh]h Description}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjkubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM~hjbubh)}(hX>This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later.h]hX>This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM}hjbubh)}(hNote that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the 'handled' is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed.h]hNote that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the ‘handled’ is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjbubh)}(h/See also: drm_dp_mst_hpd_irq_send_new_request()h]h/See also: drm_dp_mst_hpd_irq_send_new_request()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0drm_dp_mst_hpd_irq_send_new_request (C function)%c.drm_dp_mst_hpd_irq_send_new_requesthNtauh1j hjshhhNhNubj )}(hhh](j )}(hNvoid drm_dp_mst_hpd_irq_send_new_request (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hMvoid drm_dp_mst_hpd_irq_send_new_request(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h#drm_dp_mst_hpd_irq_send_new_requesth]j )}(h#drm_dp_mst_hpd_irq_send_new_requesth]h#drm_dp_mst_hpd_irq_send_new_request}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj-modnameN classnameNj j )}j ]j%)}jjsb%c.drm_dp_mst_hpd_irq_send_new_requestasbuh1hhj ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj9)}(hjOh]h*}(hjYhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj ubj )}(hmgrh]hmgr}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h$MST hotplug IRQ kick off new requesth]h$MST hotplug IRQ kick off new request}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hXY**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. **Description** This should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh]j| )}(hC``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hmanager to notify irq for.h]hmanager to notify irq for.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.h]hThis should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_dp_mst_detect_port (C function)c.drm_dp_mst_detect_porthNtauh1j hjshhhNhNubj )}(hhh](j )}(hint drm_dp_mst_detect_port (struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hint drm_dp_mst_detect_port(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMhhhj_hMubj )}(hdrm_dp_mst_detect_porth]j )}(hdrm_dp_mst_detect_porth]hdrm_dp_mst_detect_port}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubah}(h]h ](j j eh"]h$]h&]j j uh1j hjMhhhj_hMubj)}(h(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjtsbc.drm_dp_mst_detect_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_dp_mst_detect_portasbuh1hhjubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_detect_portasbuh1hhjlubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjlubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_detect_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjMhhhj_hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjIhhhj_hMubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j hj_hMhjFhhubj )}(hhh]h)}(h%get connection status for an MST porth]h%get connection status for an MST port}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj^hhubah}(h]h ]h"]h$]h&]uh1j hjFhhhj_hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jyj$ jyj% j& j' uh1j hhhjshNhNubj) )}(hXm**Parameters** ``struct drm_connector *connector`` DRM connector for this port ``struct drm_modeset_acquire_ctx *ctx`` The acquisition context to use for grabbing locks ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` pointer to a port **Description** This returns the current connection state for a port.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj}ubjw )}(hhh](j| )}(h@``struct drm_connector *connector`` DRM connector for this port h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hDRM connector for this porth]hDRM connector for this port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hZ``struct drm_modeset_acquire_ctx *ctx`` The acquisition context to use for grabbing locks h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h1The acquisition context to use for grabbing locksh]h1The acquisition context to use for grabbing locks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hmanager for this porth]hmanager for this port}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj*ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj)hMhjubj| )}(h3``struct drm_dp_mst_port *port`` pointer to a port h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjMh]hstruct drm_dp_mst_port *port}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjGubj )}(hhh]h)}(hpointer to a porth]hpointer to a port}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjcubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hjbhMhjubeh}(h]h ]h"]h$]h&]uh1jv hj}ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj}ubh)}(h5This returns the current connection state for a port.h]h5This returns the current connection state for a port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_dp_mst_edid_read (C function)c.drm_dp_mst_edid_readhNtauh1j hjshhhNhNubj )}(hhh](j )}(hconst struct drm_edid * drm_dp_mst_edid_read (struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hconst struct drm_edid *drm_dp_mst_edid_read(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jdrm_dp_mst_edid_readsbc.drm_dp_mst_edid_readasbuh1hhjhhhjhMubj )}(h h]h }(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj9)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhMubj )}(hdrm_dp_mst_edid_readh]j )}(hj%h]hdrm_dp_mst_edid_read}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hd(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_dp_mst_edid_readasbuh1hhj^ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj^ubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_dp_mst_edid_readasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjbmodnameN classnameNj j )}j ]j#c.drm_dp_mst_edid_readasbuh1hhj>ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj>ubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjZubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hget EDID for an MST porth]hget EDID for an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hXz**Parameters** ``struct drm_connector *connector`` toplevel connector to get EDID for ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` unverified pointer to a port. **Description** This returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh](j| )}(hG``struct drm_connector *connector`` toplevel connector to get EDID for h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h"toplevel connector to get EDID forh]h"toplevel connector to get EDID for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hj=h]h#struct drm_dp_mst_topology_mgr *mgr}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj7ubj )}(hhh]h)}(hmanager for this porth]hmanager for this port}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhMhjSubah}(h]h ]h"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]uh1j{ hjRhMhjubj| )}(h?``struct drm_dp_mst_port *port`` unverified pointer to a port. h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjvh]hstruct drm_dp_mst_port *port}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjpubj )}(hhh]h)}(hunverified pointer to a port.h]hunverified pointer to a port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h]hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn’t require a reference.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_mst_get_edid (C function)c.drm_dp_mst_get_edidhNtauh1j hjshhhNhNubj )}(hhh](j )}(hstruct edid * drm_dp_mst_get_edid (struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hstruct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubh)}(hhh]j )}(hedidh]hedid}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dp_mst_get_edidsbc.drm_dp_mst_get_edidasbuh1hhjhhhjhM ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM ubj9)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhM ubj )}(hdrm_dp_mst_get_edidh]j )}(hj3h]hdrm_dp_mst_get_edid}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM ubj)}(hd(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j1c.drm_dp_mst_get_edidasbuh1hhjlubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjlubj )}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j1c.drm_dp_mst_get_edidasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]j1c.drm_dp_mst_get_edidasbuh1hhjLubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM hjhhubj )}(hhh]h)}(hget EDID for an MST porth]hget EDID for an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` toplevel connector to get EDID for ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` unverified pointer to a port. **Description** This function is deprecated; please use drm_dp_mst_edid_read() instead. This returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$hjubjw )}(hhh](j| )}(hG``struct drm_connector *connector`` toplevel connector to get EDID for h](j )}(h#``struct drm_connector *connector``h]j )}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM!hj ubj )}(hhh]h)}(h"toplevel connector to get EDID forh]h"toplevel connector to get EDID for}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM!hj(ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj'hM!hj ubj| )}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjKh]h#struct drm_dp_mst_topology_mgr *mgr}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM"hjEubj )}(hhh]h)}(hmanager for this porth]hmanager for this port}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM"hjaubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hj`hM"hj ubj| )}(h?``struct drm_dp_mst_port *port`` unverified pointer to a port. h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM#hj~ubj )}(hhh]h)}(hunverified pointer to a port.h]hunverified pointer to a port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM#hjubah}(h]h ]h"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM#hj ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM%hjubh)}(hGThis function is deprecated; please use drm_dp_mst_edid_read() instead.h]hGThis function is deprecated; please use drm_dp_mst_edid_read() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$hjubh)}(hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h]hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn’t require a reference.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM&hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_dp_atomic_find_time_slots (C function)c.drm_dp_atomic_find_time_slotshNtauh1j hjshhhNhNubj )}(hhh](j )}(hint drm_dp_atomic_find_time_slots (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h]j )}(hint drm_dp_atomic_find_time_slots(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM=ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj!hM=ubj )}(hdrm_dp_atomic_find_time_slotsh]j )}(hdrm_dp_atomic_find_time_slotsh]hdrm_dp_atomic_find_time_slots}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj!hM=ubj)}(hm(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjpmodnameN classnameNj j )}j ]j%)}jj6sbc.drm_dp_atomic_find_time_slotsasbuh1hhjLubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjLubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_atomic_find_time_slotsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjRmodnameN classnameNj j )}j ]jc.drm_dp_atomic_find_time_slotsasbuh1hhj.ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj9)}(hjOh]h*}(hj|hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj.ubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(hint pbnh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hpbnh]hpbn}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj!hM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj!hM=ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj!hM=hjhhubj )}(hhh]h)}(h$Find and add time slots to the stateh]h$Find and add time slots to the state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM=hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj!hM=ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port ``struct drm_dp_mst_port *port`` port to find time slots for ``int pbn`` bandwidth required for the mode in PBN **Description** Allocates time slots to **port**, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes. Allocations set by this function are not checked against the bandwidth restraints of **mgr** until the driver calls drm_dp_mst_atomic_check(). Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase. See also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check() **Return** Total slots in the atomic state assigned for this port, or a negative error code if the port no longer existsh](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMAhjubjw )}(hhh](j| )}(h8``struct drm_atomic_commit *state`` global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj)h]hstruct drm_atomic_commit *state}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM>hj#ubj )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hM>hj?ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hM>hj ubj| )}(hJ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjbh]h#struct drm_dp_mst_topology_mgr *mgr}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM?hj\ubj )}(hhh]h)}(h!MST topology manager for the porth]h!MST topology manager for the port}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhM?hjxubah}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hjwhM?hj ubj| )}(h=``struct drm_dp_mst_port *port`` port to find time slots for h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM@hjubj )}(hhh]h)}(hport to find time slots forh]hport to find time slots for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM@hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM@hj ubj| )}(h3``int pbn`` bandwidth required for the mode in PBN h](j )}(h ``int pbn``h]j )}(hjh]hint pbn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMAhjubj )}(hhh]h)}(h&bandwidth required for the mode in PBNh]h&bandwidth required for the mode in PBN}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMAhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMAhj ubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMChjubh)}(hXAllocates time slots to **port**, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes.h](hAllocates time slots to }(hj%hhhNhNubj3 )}(h**port**h]hport}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj%ubh, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their }(hj%hhhNhNubh)}(hN:c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h]j )}(hjAh]h'drm_encoder_helper_funcs.atomic_check()}(hjChhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMBhj%ubh callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMBhjubh)}(hAllocations set by this function are not checked against the bandwidth restraints of **mgr** until the driver calls drm_dp_mst_atomic_check().h](hUAllocations set by this function are not checked against the bandwidth restraints of }(hjihhhNhNubj3 )}(h**mgr**h]hmgr}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubh2 until the driver calls drm_dp_mst_atomic_check().}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMHhjubh)}(hAdditionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase.h](hHAdditionally, it is OK to call this function multiple times on the same }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh~ as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMKhjubh)}(hFSee also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check()h]hFSee also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMOhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMShjubh)}(hmTotal slots in the atomic state assigned for this port, or a negative error code if the port no longer existsh]hmTotal slots in the atomic state assigned for this port, or a negative error code if the port no longer exists}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMThjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_atomic_release_time_slots (C function)"c.drm_dp_atomic_release_time_slotshNtauh1j hjshhhNhNubj )}(hhh](j )}(hint drm_dp_atomic_release_time_slots (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j )}(hint drm_dp_atomic_release_time_slots(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h drm_dp_atomic_release_time_slotsh]j )}(h drm_dp_atomic_release_time_slotsh]h drm_dp_atomic_release_time_slots}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hd(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj )}(h h]h }(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj^modnameN classnameNj j )}j ]j%)}jj$sb"c.drm_dp_atomic_release_time_slotsasbuh1hhj:ubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj:ubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj6ubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jx"c.drm_dp_atomic_release_time_slotsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj6ubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]jx"c.drm_dp_atomic_release_time_slotsasbuh1hhjubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj6ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hRelease allocated time slotsh]hRelease allocated time slots}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port ``struct drm_dp_mst_port *port`` The port to release the time slots from **Description** Releases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their :c:type:`drm_connector_helper_funcs.atomic_check\(\) ` callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology. It is OK to call this even if **port** has been removed from the system. Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same **port** in a single atomic check phase. See also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check() **Return** 0 on success, negative error code otherwiseh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh](j| )}(h8``struct drm_atomic_commit *state`` global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hJ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h!MST topology manager for the porth]h!MST topology manager for the port}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj1ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj0hMhjubj| )}(hI``struct drm_dp_mst_port *port`` The port to release the time slots from h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjTh]hstruct drm_dp_mst_port *port}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjNubj )}(hhh]h)}(h'The port to release the time slots fromh]h'The port to release the time slots from}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMhjjubah}(h]h ]h"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]uh1j{ hjihMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXReleases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their :c:type:`drm_connector_helper_funcs.atomic_check\(\) ` callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology.h](hReleases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their }(hjhhhNhNubh)}(hR:c:type:`drm_connector_helper_funcs.atomic_check\(\) `h]j )}(hjh]h)drm_connector_helper_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hX)It is OK to call this even if **port** has been removed from the system. Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same **port** in a single atomic check phase.h](hIt is OK to call this even if }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhk has been removed from the system. Additionally, it is OK to call this function multiple times on the same }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhh as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh in a single atomic check phase.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hCSee also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check()h]hCSee also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j3 )}(hj-h]hReturn}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h+0 on success, negative error code otherwiseh]h+0 on success, negative error code otherwise}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_dp_mst_atomic_setup_commit (C function) c.drm_dp_mst_atomic_setup_commithNtauh1j hjshhhNhNubj )}(hhh](j )}(hDint drm_dp_mst_atomic_setup_commit (struct drm_atomic_commit *state)h]j )}(hCint drm_dp_mst_atomic_setup_commit(struct drm_atomic_commit *state)h](j)}(hinth]hint}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnhhhjhMubj )}(hdrm_dp_mst_atomic_setup_commith]j )}(hdrm_dp_mst_atomic_setup_commith]hdrm_dp_mst_atomic_setup_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjnhhhjhMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb c.drm_dp_mst_atomic_setup_commitasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjnhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjjhhhjhMubah}(h]jeah ](j j eh"]h$]h&]j j )j huh1j hjhMhjghhubj )}(hhh]h)}(h!setup_commit hook for MST helpersh]h!setup_commit hook for MST helpers}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj/hhubah}(h]h ]h"]h$]h&]uh1j hjghhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jJj$ jJj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state **Description** This function saves all of the :c:type:`drm_crtc_commit` structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook. **Return** 0 if all CRTC commits were retrieved successfully, negative error code otherwiseh](h)}(h**Parameters**h]j3 )}(hjTh]h Parameters}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjNubjw )}(hhh]j| )}(h8``struct drm_atomic_commit *state`` global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjsh]hstruct drm_atomic_commit *state}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjqubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjmubj )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjjubah}(h]h ]h"]h$]h&]uh1jv hjNubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjNubh)}(hXThis function saves all of the :c:type:`drm_crtc_commit` structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook.h](hThis function saves all of the }(hjhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]j )}(hjh]hdrm_crtc_commit}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_commituh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their }(hjhhhNhNubh)}(hY:c:type:`drm_mode_config_helper_funcs.atomic_commit_setup `h]j )}(hjh]h0drm_mode_config_helper_funcs.atomic_commit_setup}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_helper_funcsuh1hhjhMhjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjNubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjNubh)}(hP0 if all CRTC commits were retrieved successfully, negative error code otherwiseh]hP0 if all CRTC commits were retrieved successfully, negative error code otherwise}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjNubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_dp_mst_atomic_wait_for_dependencies (C function))c.drm_dp_mst_atomic_wait_for_dependencieshNtauh1j hjshhhNhNubj )}(hhh](j )}(hNvoid drm_dp_mst_atomic_wait_for_dependencies (struct drm_atomic_commit *state)h]j )}(hMvoid drm_dp_mst_atomic_wait_for_dependencies(struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhjnhMubj )}(h'drm_dp_mst_atomic_wait_for_dependenciesh]j )}(h'drm_dp_mst_atomic_wait_for_dependenciesh]h'drm_dp_mst_atomic_wait_for_dependencies}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj\hhhjnhMubj)}(h!(struct drm_atomic_commit *state)h]j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb)c.drm_dp_mst_atomic_wait_for_dependenciesasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj\hhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjXhhhjnhMubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j hjnhMhjUhhubj )}(hhh]h)}(hPWait for all pending commits on MST topologies, prepare new MST state for commith]hPWait for all pending commits on MST topologies, prepare new MST state for commit}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjUhhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j8j$ j8j% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state **Description** Goes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology. This function also prepares the new MST state for commit by performing some state preparation which can't be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state. All MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.h](h)}(h**Parameters**h]j3 )}(hjBh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj<ubjw )}(hhh]j| )}(h8``struct drm_atomic_commit *state`` global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjah]hstruct drm_atomic_commit *state}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj[ubj )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjwubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hjvhMhjXubah}(h]h ]h"]h$]h&]uh1jv hj<ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj<ubh)}(hXGoes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology.h]hXGoes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj<ubh)}(hThis function also prepares the new MST state for commit by performing some state preparation which can't be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state.h]hThis function also prepares the new MST state for commit by performing some state preparation which can’t be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hj<ubh)}(hAll MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.h]hAll MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$hj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_dp_mst_root_conn_atomic_check (C function)#c.drm_dp_mst_root_conn_atomic_checkhNtauh1j hjshhhNhNubj )}(hhh](j )}(hwint drm_dp_mst_root_conn_atomic_check (struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hvint drm_dp_mst_root_conn_atomic_check(struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMIubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj hMIubj )}(h!drm_dp_mst_root_conn_atomic_checkh]j )}(h!drm_dp_mst_root_conn_atomic_checkh]h!drm_dp_mst_root_conn_atomic_check}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj hMIubj)}(hQ(struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(h*struct drm_connector_state *new_conn_stateh](j )}(hj h]hstruct}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(hdrm_connector_stateh]hdrm_connector_state}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j%)}jj"sb#c.drm_dp_mst_root_conn_atomic_checkasbuh1hhj8ubj )}(h h]h }(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(hnew_conn_stateh]hnew_conn_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4ubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jv#c.drm_dp_mst_root_conn_atomic_checkasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj hMIubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj hMIubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj hMIhjhhubj )}(hhh]h)}(hFSerialize CRTC commits on MST-capable connectors operating in SST modeh]hFSerialize CRTC commits on MST-capable connectors operating in SST mode}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMIhj,hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj hMIubeh}(h]h ](j functioneh"]h$]h&]j" j j# jGj$ jGj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_connector_state *new_conn_state`` The new connector state of the :c:type:`drm_connector` ``struct drm_dp_mst_topology_mgr *mgr`` The MST topology manager for the :c:type:`drm_connector` **Description** Since MST uses fake :c:type:`drm_encoder` structs, the generic atomic modesetting code isn't able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector's MST topology will never share the same :c:type:`drm_encoder`. This function takes care of this serialization issue, by checking a root MST connector's atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to :c:type:`drm_dp_mst_topology_state.pending_crtc_mask `. Drivers implementing MST must call this function from the :c:type:`drm_connector_helper_funcs.atomic_check ` hook of any physical DP :c:type:`drm_connector` capable of driving MST sinks. **Return** 0 on success, negative error code otherwiseh](h)}(h**Parameters**h]j3 )}(hjQh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMMhjKubjw )}(hhh](j| )}(hf``struct drm_connector_state *new_conn_state`` The new connector state of the :c:type:`drm_connector` h](j )}(h.``struct drm_connector_state *new_conn_state``h]j )}(hjph]h*struct drm_connector_state *new_conn_state}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjnubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMKhjjubj )}(hhh]h)}(h6The new connector state of the :c:type:`drm_connector`h](hThe new connector state of the }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjhMKhjubeh}(h]h ]h"]h$]h&]uh1hhjhMKhjubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMKhjgubj| )}(ha``struct drm_dp_mst_topology_mgr *mgr`` The MST topology manager for the :c:type:`drm_connector` h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMLhjubj )}(hhh]h)}(h8The MST topology manager for the :c:type:`drm_connector`h](h!The MST topology manager for the }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjhMLhjubeh}(h]h ]h"]h$]h&]uh1hhjhMLhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMLhjgubeh}(h]h ]h"]h$]h&]uh1jv hjKubh)}(h**Description**h]j3 )}(hj"h]h Description}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMNhjKubh)}(hXaSince MST uses fake :c:type:`drm_encoder` structs, the generic atomic modesetting code isn't able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector's MST topology will never share the same :c:type:`drm_encoder`.h](hSince MST uses fake }(hj8hhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hjBh]h drm_encoder}(hjDhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMMhj8ubhX& structs, the generic atomic modesetting code isn’t able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector’s MST topology will never share the same }(hj8hhhNhNubh)}(h:c:type:`drm_encoder`h]j )}(hjfh]h drm_encoder}(hjhhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoderuh1hhj_hMMhj8ubh.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_hMMhjKubh)}(hXBThis function takes care of this serialization issue, by checking a root MST connector's atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to :c:type:`drm_dp_mst_topology_state.pending_crtc_mask `.h](hThis function takes care of this serialization issue, by checking a root MST connector’s atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to }(hjhhhNhNubh)}(hQ:c:type:`drm_dp_mst_topology_state.pending_crtc_mask `h]j )}(hjh]h+drm_dp_mst_topology_state.pending_crtc_mask}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMRhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMRhjKubh)}(hDrivers implementing MST must call this function from the :c:type:`drm_connector_helper_funcs.atomic_check ` hook of any physical DP :c:type:`drm_connector` capable of driving MST sinks.h](h:Drivers implementing MST must call this function from the }(hjhhhNhNubh)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]j )}(hjh]h'drm_connector_helper_funcs.atomic_check}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMVhjubh hook of any physical DP }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]j )}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connectoruh1hhjhMVhjubh capable of driving MST sinks.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMVhjKubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMZhjKubh)}(h+0 on success, negative error code otherwiseh]h+0 on success, negative error code otherwise}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM[hjKubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_mst_update_slots (C function)c.drm_dp_mst_update_slotshNtauh1j hjshhhNhNubj )}(hhh](j )}(hevoid drm_dp_mst_update_slots (struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h]j )}(hdvoid drm_dp_mst_update_slots(struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h](j)}(hvoidh]hvoid}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhhjihMubj )}(hdrm_dp_mst_update_slotsh]j )}(hdrm_dp_mst_update_slotsh]hdrm_dp_mst_update_slots}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjxubah}(h]h ](j j eh"]h$]h&]j j uh1j hjWhhhjihMubj)}(hH(struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h](j)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jj~sbc.drm_dp_mst_update_slotsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(huint8_t link_encoding_caph](h)}(hhh]j )}(huint8_th]huint8_t}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_update_slotsasbuh1hhjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hlink_encoding_caph]hlink_encoding_cap}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjWhhhjihMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjihMubah}(h]jNah ](j j eh"]h$]h&]j j )j huh1j hjihMhjPhhubj )}(hhh]h)}(h8updates the slot info depending on the DP ecoding formath]h8updates the slot info depending on the DP ecoding format}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj`hhubah}(h]h ]h"]h$]h&]uh1j hjPhhhjihMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j{j$ j{j% j& j' uh1j hhhjshNhNubj) )}(h**Parameters** ``struct drm_dp_mst_topology_state *mst_state`` mst_state to update ``uint8_t link_encoding_cap`` the ecoding format on the linkh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh](j| )}(hD``struct drm_dp_mst_topology_state *mst_state`` mst_state to update h](j )}(h/``struct drm_dp_mst_topology_state *mst_state``h]j )}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hmst_state to updateh]hmst_state to update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h<``uint8_t link_encoding_cap`` the ecoding format on the linkh](j )}(h``uint8_t link_encoding_cap``h]j )}(hjh]huint8_t link_encoding_cap}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hthe ecoding format on the linkh]hthe ecoding format on the link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_check_act_status (C function)c.drm_dp_check_act_statushNtauh1j hjshhhNhNubj )}(hhh](j )}(hAint drm_dp_check_act_status (struct drm_dp_mst_topology_mgr *mgr)h]j )}(h@int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhjEhMubj )}(hdrm_dp_check_act_statush]j )}(hdrm_dp_check_act_statush]hdrm_dp_check_act_status}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhjEhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjZsbc.drm_dp_check_act_statusasbuh1hhjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjpubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubah}(h]h ]h"]h$]h&]j j uh1jhj3hhhjEhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj/hhhjEhMubah}(h]j*ah ](j j eh"]h$]h&]j j )j huh1j hjEhMhj,hhubj )}(hhh]h)}(hPolls for ACT handled status.h]hPolls for ACT handled status.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj,hhhjEhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hXK**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to use **Description** Tries waiting for the MST hub to finish updating it's payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long). **Return** 0 if the ACT was handled in time, negative error code on failure.[h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh]j| )}(h7``struct drm_dp_mst_topology_mgr *mgr`` manager to use h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hj8h]h#struct drm_dp_mst_topology_mgr *mgr}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj2ubj )}(hhh]h)}(hmanager to useh]hmanager to use}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhMhjNubah}(h]h ]h"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]uh1j{ hjMhMhj/ubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjsh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjqubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hTries waiting for the MST hub to finish updating it's payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long).h]hTries waiting for the MST hub to finish updating it’s payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hA0 if the ACT was handled in time, negative error code on failure.h]hA0 if the ACT was handled in time, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_dp_calc_pbn_mode (C function)c.drm_dp_calc_pbn_modehNtauh1j hjshhhNhNubj )}(hhh](j )}(h-int drm_dp_calc_pbn_mode (int clock, int bpp)h]j )}(h,int drm_dp_calc_pbn_mode(int clock, int bpp)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_calc_pbn_modeh]j )}(hdrm_dp_calc_pbn_modeh]hdrm_dp_calc_pbn_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(int clock, int bpp)h](j)}(h int clockh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hclockh]hclock}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hint bpph](j)}(hinth]hint}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubj )}(hbpph]hbpp}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hCalculate the PBN for a mode.h]hCalculate the PBN for a mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(h**Parameters** ``int clock`` dot clock ``int bpp`` bpp as .4 binary fixed point **Description** This uses the formula in the spec to calculate the PBN value for a mode.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh](j| )}(h``int clock`` dot clock h](j )}(h ``int clock``h]j )}(hjh]h int clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h dot clockh]h dot clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h)``int bpp`` bpp as .4 binary fixed point h](j )}(h ``int bpp``h]j )}(hjh]hint bpp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj )}(hhh]h)}(hbpp as .4 binary fixed pointh]hbpp as .4 binary fixed point}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj'ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjLh]h Description}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjJubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hHThis uses the formula in the spec to calculate the PBN value for a mode.h]hHThis uses the formula in the spec to calculate the PBN value for a mode.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dp_mst_dump_topology (C function)c.drm_dp_mst_dump_topologyhNtauh1j hjshhhNhNubj )}(hhh](j )}(hWvoid drm_dp_mst_dump_topology (struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hVvoid drm_dp_mst_dump_topology(struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM)ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM)ubj )}(hdrm_dp_mst_dump_topologyh]j )}(hdrm_dp_mst_dump_topologyh]hdrm_dp_mst_dump_topology}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM)ubj)}(h9(struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct seq_file *mh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hseq_fileh]hseq_file}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_mst_dump_topologyasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hjh]hm}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]jc.drm_dp_mst_dump_topologyasbuh1hhj;ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM)ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM)ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM)hjhhubj )}(hhh]h)}(hdump topology to seq file.h]hdump topology to seq file.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM)hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM)ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(h**Parameters** ``struct seq_file *m`` seq_file to dump output to ``struct drm_dp_mst_topology_mgr *mgr`` manager to dump current topology for. **Description** helper to dump MST topology to a seq file for debugfs.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM-hjubjw )}(hhh](j| )}(h2``struct seq_file *m`` seq_file to dump output to h](j )}(h``struct seq_file *m``h]j )}(hjh]hstruct seq_file *m}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM*hjubj )}(hhh]h)}(hseq_file to dump output toh]hseq_file to dump output to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM*hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM*hjubj| )}(hN``struct drm_dp_mst_topology_mgr *mgr`` manager to dump current topology for. h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hj:h]h#struct drm_dp_mst_topology_mgr *mgr}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM+hj4ubj )}(hhh]h)}(h%manager to dump current topology for.h]h%manager to dump current topology for.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM+hjPubah}(h]h ]h"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]uh1j{ hjOhM+hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjsubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM-hjubh)}(h6helper to dump MST topology to a seq file for debugfs.h]h6helper to dump MST topology to a seq file for debugfs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM,hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_dp_mst_port_downstream_of_parent (C function)&c.drm_dp_mst_port_downstream_of_parenthNtauh1j hjshhhNhNubj )}(hhh](j )}(hbool drm_dp_mst_port_downstream_of_parent (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h]j )}(hbool drm_dp_mst_port_downstream_of_parent(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h$drm_dp_mst_port_downstream_of_parenth]j )}(h$drm_dp_mst_port_downstream_of_parenth]h$drm_dp_mst_port_downstream_of_parent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hc(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjOhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjdubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjdubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct drm_dp_mst_port *parenth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j0&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hparenth]hparent}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h.check if a port is downstream of a parent porth]h.check if a port is downstream of a parent port}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjVhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jqj$ jqj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager ``struct drm_dp_mst_port *port`` the port being looked up ``struct drm_dp_mst_port *parent`` the parent port **Description** The function returns ``true`` if **port** is downstream of **parent**. If **parent** is ``NULL`` - denoting the root port - the function returns ``true`` if **port** is in **mgr**'s topology.h](h)}(h**Parameters**h]j3 )}(hj{h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjyubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjuubjw )}(hhh](j| )}(h=``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hMST topology managerh]hMST topology manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h:``struct drm_dp_mst_port *port`` the port being looked up h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hthe port being looked uph]hthe port being looked up}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h3``struct drm_dp_mst_port *parent`` the parent port h](j )}(h"``struct drm_dp_mst_port *parent``h]j )}(hj h]hstruct drm_dp_mst_port *parent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hthe parent porth]hthe parent port}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj!hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjuubh)}(h**Description**h]j3 )}(hjGh]h Description}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjEubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjuubh)}(hThe function returns ``true`` if **port** is downstream of **parent**. If **parent** is ``NULL`` - denoting the root port - the function returns ``true`` if **port** is in **mgr**'s topology.h](hThe function returns }(hj]hhhNhNubj )}(h``true``h]htrue}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubh if }(hj]hhhNhNubj3 )}(h**port**h]hport}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubh is downstream of }(hj]hhhNhNubj3 )}(h **parent**h]hparent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubh. If }(hj]hhhNhNubj3 )}(h **parent**h]hparent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubh is }(hj]hhhNhNubj )}(h``NULL``h]hNULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubh1 - denoting the root port - the function returns }(hj]hhhNhNubj )}(h``true``h]htrue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubh if }hj]sbj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubh is in }(hj]hhhNhNubj3 )}(h**mgr**h]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubh’s topology.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjuubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_dp_mst_add_affected_dsc_crtcs (C function)#c.drm_dp_mst_add_affected_dsc_crtcshNtauh1j hjshhhNhNubj )}(hhh](j )}(hlint drm_dp_mst_add_affected_dsc_crtcs (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hkint drm_dp_mst_add_affected_dsc_crtcs(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM7ubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj*hM7ubj )}(h!drm_dp_mst_add_affected_dsc_crtcsh]j )}(h!drm_dp_mst_add_affected_dsc_crtcsh]h!drm_dp_mst_add_affected_dsc_crtcs}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj*hM7ubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjymodnameN classnameNj j )}j ]j%)}jj?sb#c.drm_dp_mst_add_affected_dsc_crtcsasbuh1hhjUubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjUubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjQubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_dp_mst_add_affected_dsc_crtcsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjQubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj*hM7ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj*hM7ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj*hM7hjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhj*hM7ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jUj$ jUj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` Pointer to the new struct drm_dp_mst_topology_state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager **Description** Whenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topology See also: drm_dp_mst_atomic_enable_dsc()h](h)}(h**Parameters**h]j3 )}(hj_h]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hjYubjw )}(hhh](j| )}(hX``struct drm_atomic_commit *state`` Pointer to the new struct drm_dp_mst_topology_state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj~h]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM8hjxubj )}(hhh]h)}(h3Pointer to the new struct drm_dp_mst_topology_stateh]h3Pointer to the new struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjhM8hjuubj| )}(h=``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9hjubj )}(hhh]h)}(hMST topology managerh]hMST topology manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM9hjuubeh}(h]h ]h"]h$]h&]uh1jv hjYubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hjYubh)}(hWhenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topologyh]hWhenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topology}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM:hjYubh)}(h(See also: drm_dp_mst_atomic_enable_dsc()h]h(See also: drm_dp_mst_atomic_enable_dsc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM?hjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_mst_atomic_enable_dsc (C function)c.drm_dp_mst_atomic_enable_dschNtauh1j hjshhhNhNubj )}(hhh](j )}(hvint drm_dp_mst_atomic_enable_dsc (struct drm_atomic_commit *state, struct drm_dp_mst_port *port, int pbn, bool enable)h]j )}(huint drm_dp_mst_atomic_enable_dsc(struct drm_atomic_commit *state, struct drm_dp_mst_port *port, int pbn, bool enable)h](j)}(hinth]hint}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMtubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBhhhjThMtubj )}(hdrm_dp_mst_atomic_enable_dsch]j )}(hdrm_dp_mst_atomic_enable_dsch]hdrm_dp_mst_atomic_enable_dsc}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjcubah}(h]h ](j j eh"]h$]h&]j j uh1j hjBhhhjThMtubj)}(hU(struct drm_atomic_commit *state, struct drm_dp_mst_port *port, int pbn, bool enable)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjisbc.drm_dp_mst_atomic_enable_dscasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_enable_dscasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(hint pbnh](j)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj )}(h h]h }(hjshhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(hpbnh]hpbn}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubj)}(h bool enableh](j)}(hjIh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(henableh]henable}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubeh}(h]h ]h"]h$]h&]j j uh1jhjBhhhjThMtubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj>hhhjThMtubah}(h]j9ah ](j j eh"]h$]h&]j j )j huh1j hjThMthj;hhubj )}(hhh]h)}(hSet DSC Enable Flag to On/Offh]hSet DSC Enable Flag to On/Off}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMthjhhubah}(h]h ]h"]h$]h&]uh1j hj;hhhjThMtubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` Pointer to the new drm_atomic_commit ``struct drm_dp_mst_port *port`` Pointer to the affected MST Port ``int pbn`` Newly recalculated bw required for link with DSC enabled ``bool enable`` Boolean flag to enable or disable DSC on the port **Description** This function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabledh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjubjw )}(hhh](j| )}(hI``struct drm_atomic_commit *state`` Pointer to the new drm_atomic_commit h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj h]hstruct drm_atomic_commit *state}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMuhjubj )}(hhh]h)}(h$Pointer to the new drm_atomic_commith]h$Pointer to the new drm_atomic_commit}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMuhj6ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj5hMuhjubj| )}(hB``struct drm_dp_mst_port *port`` Pointer to the affected MST Port h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjYh]hstruct drm_dp_mst_port *port}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMvhjSubj )}(hhh]h)}(h Pointer to the affected MST Porth]h Pointer to the affected MST Port}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMvhjoubah}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjnhMvhjubj| )}(hE``int pbn`` Newly recalculated bw required for link with DSC enabled h](j )}(h ``int pbn``h]j )}(hjh]hint pbn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMwhjubj )}(hhh]h)}(h8Newly recalculated bw required for link with DSC enabledh]h8Newly recalculated bw required for link with DSC enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMwhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMwhjubj| )}(hB``bool enable`` Boolean flag to enable or disable DSC on the port h](j )}(h``bool enable``h]j )}(hjh]h bool enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjubj )}(hhh]h)}(h1Boolean flag to enable or disable DSC on the porth]h1Boolean flag to enable or disable DSC on the port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMxhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMxhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMzhjubh)}(hThis function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabledh]hThis function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMyhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_mst_atomic_check_mgr (C function)c.drm_dp_mst_atomic_check_mgrhNtauh1j hjshhhNhNubj )}(hhh](j )}(hint drm_dp_mst_atomic_check_mgr (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h]j )}(hint drm_dp_mst_atomic_check_mgr(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h](j)}(hinth]hint}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGhhhjYhMubj )}(hdrm_dp_mst_atomic_check_mgrh]j )}(hdrm_dp_mst_atomic_check_mgrh]hdrm_dp_mst_atomic_check_mgr}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ](j j eh"]h$]h&]j j uh1j hjGhhhjYhMubj)}(h(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjnsbc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j )}(hj h]hstruct}(hjjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj )}(h h]h }(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjfubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjfubj )}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h%struct drm_dp_mst_port **failing_porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj$hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h failing_porth]h failing_port}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjGhhhjYhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjChhhjYhMubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j hjYhMhj@hhubj )}(hhh]h)}(h1Check the atomic state of an MST topology managerh]h1Check the atomic state of an MST topology manager}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjehhubah}(h]h ]h"]h$]h&]uh1j hj@hhhjYhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` The global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` Manager to check ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state for **mgr** ``struct drm_dp_mst_port **failing_port`` Returns the port with a BW limitation **Description** Checks the given MST manager's topology state for an atomic update to ensure that it's valid. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update. Any atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback. See also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots() - The non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists. - ``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. - ``-EINVAL``, if the new state is invalid, because the root port has too many payloads. **Return** - 0 if the new state is valid - ``-ENOSPC``, if the new state is invalid, because of BW limitation **failing_port** is set to:h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh](j| )}(h<``struct drm_atomic_commit *state`` The global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hThe global atomic stateh]hThe global atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h9``struct drm_dp_mst_topology_mgr *mgr`` Manager to check h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hManager to checkh]hManager to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hQ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state for **mgr** h](j )}(h/``struct drm_dp_mst_topology_state *mst_state``h]j )}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h The MST atomic state for **mgr**h](hThe MST atomic state for }(hj4hhhNhNubj3 )}(h**mgr**h]hmgr}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubeh}(h]h ]h"]h$]h&]uh1hhj0hMhj1ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj0hMhjubj| )}(hP``struct drm_dp_mst_port **failing_port`` Returns the port with a BW limitation h](j )}(h)``struct drm_dp_mst_port **failing_port``h]j )}(hjbh]h%struct drm_dp_mst_port **failing_port}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj\ubj )}(hhh]h)}(h%Returns the port with a BW limitationh]h%Returns the port with a BW limitation}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjxubah}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hjwhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hChecks the given MST manager's topology state for an atomic update to ensure that it's valid. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update.h]hChecks the given MST manager’s topology state for an atomic update to ensure that it’s valid. This includes checking whether there’s enough bandwidth to support the new timeslot allocations in the atomic update.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hAny atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback.h](hAny atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their }(hjhhhNhNubh)}(hH:c:type:`drm_mode_config_funcs.atomic_check\(\) `h]j )}(hjh]h$drm_mode_config_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hfSee also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()h]hfSee also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj^E)}(hX - The non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists. - ``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. - ``-EINVAL``, if the new state is invalid, because the root port has too many payloads. h](j^E)}(hXg- The non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists. - ``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. h]h)}(hhh](h)}(hThe non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists.h]h)}(hThe non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists.h](hQThe non-root port where a BW limit check failed with all the ports downstream of }(hjhhhNhNubj3 )}(h**failing_port**h]h failing_port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubhs passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhj ubh)}(h``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. h]h)}(h``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check.h](j )}(h``NULL``h]hNULL}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubhy if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9ubah}(h]h ]h"]h$]h&]uh1hhj ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj2hMhjubah}(h]h ]h"]h$]h&]uh1j]Ehj2hMhjubh)}(hhh]h)}(hW``-EINVAL``, if the new state is invalid, because the root port has too many payloads. h]h)}(hV``-EINVAL``, if the new state is invalid, because the root port has too many payloads.h](j )}(h ``-EINVAL``h]h-EINVAL}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubhK, if the new state is invalid, because the root port has too many payloads.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjoubah}(h]h ]h"]h$]h&]uh1hhjlubah}(h]h ]h"]h$]h&]jNj<uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1j]Ehj2hMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hhh](h)}(h0 if the new state is validh]h)}(hjh]h0 if the new state is valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hb``-ENOSPC``, if the new state is invalid, because of BW limitation **failing_port** is set to:h]jw )}(hhh]j| )}(h^``-ENOSPC``, if the new state is invalid, because of BW limitation **failing_port** is set to:h](j )}(hB``-ENOSPC``, if the new state is invalid, because of BW limitationh](j )}(h ``-ENOSPC``h]h-ENOSPC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh7, if the new state is invalid, because of BW limitation}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h**failing_port** is set to:h](j3 )}(h**failing_port**h]h failing_port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh is set to:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]jNj<uh1hhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dp_mst_atomic_check (C function)c.drm_dp_mst_atomic_checkhNtauh1j hjshhhNhNubj )}(hhh](j )}(h=int drm_dp_mst_atomic_check (struct drm_atomic_commit *state)h]j )}(h` **Description** Checks the given topology state for an atomic update to ensure that it's valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update. Any atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback. See also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots() **Return** 0 if the new state is valid, negative error code otherwise.h](h)}(h**Parameters**h]j3 )}(hj=h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj7ubjw )}(hhh]j| )}(h~``struct drm_atomic_commit *state`` Pointer to the new :c:type:`struct drm_dp_mst_topology_state ` h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj\h]hstruct drm_atomic_commit *state}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjVubj )}(hhh]h)}(hYPointer to the new :c:type:`struct drm_dp_mst_topology_state `h](hPointer to the new }(hjuhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]j )}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_topology_stateuh1hhjqhMhjuubeh}(h]h ]h"]h$]h&]uh1hhjqhMhjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhMhjSubah}(h]h ]h"]h$]h&]uh1jv hj7ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj7ubh)}(hXChecks the given topology state for an atomic update to ensure that it's valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update.h]hXChecks the given topology state for an atomic update to ensure that it’s valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there’s enough bandwidth to support the new timeslot allocations in the atomic update. }(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj7ubh)}(hAny atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback.h](hqAny atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their }(hjhhhNhNubh)}(hH:c:type:`drm_mode_config_funcs.atomic_check\(\) `h]j )}(hjh]h$drm_mode_config_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_mode_config_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj7ubh)}(hjSee also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()h]hjSee also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj7ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj7ubh)}(h;0 if the new state is valid, negative error code otherwise.h]h;0 if the new state is valid, negative error code otherwise.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_atomic_get_mst_topology_state (C function)#c.drm_atomic_get_mst_topology_statehNtauh1j hjshhhNhNubj )}(hhh](j )}(hstruct drm_dp_mst_topology_state * drm_atomic_get_mst_topology_state (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hstruct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhjphMubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j!drm_atomic_get_mst_topology_statesb#c.drm_atomic_get_mst_topology_stateasbuh1hhj_hhhjphMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_hhhjphMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_hhhjphMubj )}(h!drm_atomic_get_mst_topology_stateh]j )}(hjh]h!drm_atomic_get_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj_hhhjphMubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j#c.drm_atomic_get_mst_topology_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj'hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]j#c.drm_atomic_get_mst_topology_stateasbuh1hhjIubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjIubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj_hhhjphMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[hhhjphMubah}(h]jVah ](j j eh"]h$]h&]j j )j huh1j hjphMhjXhhubj )}(hhh]h)}(hget MST topology stateh]hget MST topology state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjXhhhjphMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The MST topology state or error pointer.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh](j| )}(h8``struct drm_atomic_commit *state`` global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMhjubj| )}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjHh]h#struct drm_dp_mst_topology_mgr *mgr}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjBubj )}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj^ubah}(h]h ]h"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]uh1j{ hj]hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h(The MST topology state or error pointer.h]h(The MST topology state or error pointer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_atomic_get_old_mst_topology_state (C function)'c.drm_atomic_get_old_mst_topology_statehNtauh1j hjshhhNhNubj )}(hhh](j )}(hstruct drm_dp_mst_topology_state * drm_atomic_get_old_mst_topology_state (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hstruct drm_dp_mst_topology_state *drm_atomic_get_old_mst_topology_state(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM+ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM+ubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j%drm_atomic_get_old_mst_topology_statesb'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjhhhjhM+ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM+ubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjhhhjhM+ubj )}(h%drm_atomic_get_old_mst_topology_stateh]j )}(hj,h]h%drm_atomic_get_old_mst_topology_state}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM+ubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j*'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjeubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjeubj )}(hstateh]hstate}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j*'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmgrh]hmgr}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjaubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM+ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM+ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM+hjhhubj )}(hhh]h)}(h2get old MST topology state in atomic state, if anyh]h2get old MST topology state in atomic state, if any}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM+hjWhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM+ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jrj$ jrj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The old MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh](h)}(h**Parameters**h]j3 )}(hj|h]h Parameters}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM/hjvubjw )}(hhh](j| )}(h8``struct drm_atomic_commit *state`` global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hjh]hstruct drm_atomic_commit *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM,hjubj )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM,hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM,hjubj| )}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM-hjubj )}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM-hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM-hjubeh}(h]h ]h"]h$]h&]uh1jv hjvubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM/hjvubh)}(hThis function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM.hjvubh)}(h **Return**h]j3 )}(hj6h]hReturn}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM2hjvubh)}(hlThe old MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh]hnThe old MST topology state, or NULL if there’s no topology state for this MST mgr in the global atomic state}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM3hjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_atomic_get_new_mst_topology_state (C function)'c.drm_atomic_get_new_mst_topology_statehNtauh1j hjshhhNhNubj )}(hhh](j )}(hstruct drm_dp_mst_topology_state * drm_atomic_get_new_mst_topology_state (struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h]j )}(hstruct drm_dp_mst_topology_state *drm_atomic_get_new_mst_topology_state(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j )}(hj h]hstruct}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhjhMCubh)}(hhh]j )}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}j%drm_atomic_get_new_mst_topology_statesb'c.drm_atomic_get_new_mst_topology_stateasbuh1hhjwhhhjhMCubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjwhhhjhMCubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjwhhhjhMCubj )}(h%drm_atomic_get_new_mst_topology_stateh]j )}(hjh]h%drm_atomic_get_new_mst_topology_state}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjwhhhjhMCubj)}(hF(struct drm_atomic_commit *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.drm_atomic_get_new_mst_topology_stateasbuh1hhjubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hstateh]hstate}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj )}(h h]h }(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.drm_atomic_get_new_mst_topology_stateasbuh1hhjaubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjaubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjwhhhjhMCubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjshhhjhMCubah}(h]jnah ](j j eh"]h$]h&]j j )j huh1j hjhMChjphhubj )}(hhh]h)}(h2get new MST topology state in atomic state, if anyh]h2get new MST topology state in atomic state, if any}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMChjhhubah}(h]h ]h"]h$]h&]uh1j hjphhhjhMCubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_atomic_commit *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The new MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMGhjubjw )}(hhh](j| )}(h8``struct drm_atomic_commit *state`` global atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj'h]hstruct drm_atomic_commit *state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhj!ubj )}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMDhj=ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hMDhjubj| )}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hj`h]h#struct drm_dp_mst_topology_mgr *mgr}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMEhjZubj )}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMEhjvubah}(h]h ]h"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjuhMEhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMGhjubh)}(hThis function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMFhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMJhjubh)}(hlThe new MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh]hnThe new MST topology state, or NULL if there’s no topology state for this MST mgr in the global atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_mst_topology_mgr_init (C function)c.drm_dp_mst_topology_mgr_inithNtauh1j hjshhhNhNubj )}(hhh](j )}(hint drm_dp_mst_topology_mgr_init (struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h]j )}(hint drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM[ubj )}(hdrm_dp_mst_topology_mgr_inith]j )}(hdrm_dp_mst_topology_mgr_inith]hdrm_dp_mst_topology_mgr_init}(hj(hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM[ubj)}(h(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j%)}jj*sbc.drm_dp_mst_topology_mgr_initasbuh1hhj@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j~c.drm_dp_mst_topology_mgr_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdevh]hdev}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hstruct drm_dp_aux *auxh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjFmodnameN classnameNj j )}j ]j~c.drm_dp_mst_topology_mgr_initasbuh1hhj"ubj )}(h h]h }(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj9)}(hjOh]h*}(hjphhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"ubj )}(hauxh]haux}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hint max_dpcd_transaction_bytesh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hmax_dpcd_transaction_bytesh]hmax_dpcd_transaction_bytes}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hint max_payloadsh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h max_payloadsh]h max_payloads}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubj)}(hint conn_base_idh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h conn_base_idh]h conn_base_id}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj<ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM[ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM[ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM[hjhhubj )}(hhh]h)}(hinitialise a topology managerh]hinitialise a topology manager}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM[hjChhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM[ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j^j$ j^j% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager struct to initialise ``struct drm_device *dev`` device providing this structure - for i2c addition. ``struct drm_dp_aux *aux`` DP helper aux channel to talk to this device ``int max_dpcd_transaction_bytes`` hw specific DPCD transaction limit ``int max_payloads`` maximum number of payloads this GPU can source ``int conn_base_id`` the connector object ID the MST device is connected to. **Description** Return 0 for success, or negative error code on failureh](h)}(h**Parameters**h]j3 )}(hjhh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM_hjbubjw )}(hhh](j| )}(hE``struct drm_dp_mst_topology_mgr *mgr`` manager struct to initialise h](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM\hjubj )}(hhh]h)}(hmanager struct to initialiseh]hmanager struct to initialise}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM\hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM\hj~ubj| )}(hO``struct drm_device *dev`` device providing this structure - for i2c addition. h](j )}(h``struct drm_device *dev``h]j )}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM]hjubj )}(hhh]h)}(h3device providing this structure - for i2c addition.h]h3device providing this structure - for i2c addition.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM]hj~ubj| )}(hH``struct drm_dp_aux *aux`` DP helper aux channel to talk to this device h](j )}(h``struct drm_dp_aux *aux``h]j )}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM^hjubj )}(hhh]h)}(h,DP helper aux channel to talk to this deviceh]h,DP helper aux channel to talk to this device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM^hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM^hj~ubj| )}(hF``int max_dpcd_transaction_bytes`` hw specific DPCD transaction limit h](j )}(h"``int max_dpcd_transaction_bytes``h]j )}(hj2h]hint max_dpcd_transaction_bytes}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM_hj,ubj )}(hhh]h)}(h"hw specific DPCD transaction limith]h"hw specific DPCD transaction limit}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM_hjHubah}(h]h ]h"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]uh1j{ hjGhM_hj~ubj| )}(hD``int max_payloads`` maximum number of payloads this GPU can source h](j )}(h``int max_payloads``h]j )}(hjkh]hint max_payloads}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM`hjeubj )}(hhh]h)}(h.maximum number of payloads this GPU can sourceh]h.maximum number of payloads this GPU can source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjubah}(h]h ]h"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]uh1j{ hjhM`hj~ubj| )}(hM``int conn_base_id`` the connector object ID the MST device is connected to. h](j )}(h``int conn_base_id``h]j )}(hjh]hint conn_base_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMahjubj )}(hhh]h)}(h7the connector object ID the MST device is connected to.h]h7the connector object ID the MST device is connected to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMahjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMahj~ubeh}(h]h ]h"]h$]h&]uh1jv hjbubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMchjbubh)}(h7Return 0 for success, or negative error code on failureh]h7Return 0 for success, or negative error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMbhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,drm_dp_mst_topology_mgr_destroy (C function)!c.drm_dp_mst_topology_mgr_destroyhNtauh1j hjshhhNhNubj )}(hhh](j )}(hJvoid drm_dp_mst_topology_mgr_destroy (struct drm_dp_mst_topology_mgr *mgr)h]j )}(hIvoid drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj2hMubj )}(hdrm_dp_mst_topology_mgr_destroyh]j )}(hdrm_dp_mst_topology_mgr_destroyh]hdrm_dp_mst_topology_mgr_destroy}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj2hMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubh)}(hhh]j )}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjGsb!c.drm_dp_mst_topology_mgr_destroyasbuh1hhj]ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj]ubj )}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj2hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj2hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj2hMhjhhubj )}(hhh]h)}(hdestroy topology manager.h]hdestroy topology manager.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj2hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(hL**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to destroyh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh]j| )}(h:``struct drm_dp_mst_topology_mgr *mgr`` manager to destroyh](j )}(h'``struct drm_dp_mst_topology_mgr *mgr``h]j )}(hj%h]h#struct drm_dp_mst_topology_mgr *mgr}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hmanager to destroyh]hmanager to destroy}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj;ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj:hMhjubah}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dp_mst_aux_for_parent (C function)c.drm_dp_mst_aux_for_parenthNtauh1j hjshhhNhNubj )}(hhh](j )}(hLstruct drm_dp_aux * drm_dp_mst_aux_for_parent (struct drm_dp_mst_port *port)h]j )}(hJstruct drm_dp_aux *drm_dp_mst_aux_for_parent(struct drm_dp_mst_port *port)h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{hhhjhMubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dp_mst_aux_for_parentsbc.drm_dp_mst_aux_for_parentasbuh1hhj{hhhjhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{hhhjhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj{hhhjhMubj )}(hdrm_dp_mst_aux_for_parenth]j )}(hjh]hdrm_dp_mst_aux_for_parent}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj{hhhjhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_aux_for_parentasbuh1hhjubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjChhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj{hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjwhhhjhMubah}(h]jrah ](j j eh"]h$]h&]j j )j huh1j hjhMhjthhubj )}(hhh]h)}(h+Get the AUX device for an MST port's parenth]h-Get the AUX device for an MST port’s parent}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjwhhubah}(h]h ]h"]h$]h&]uh1j hjthhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjshNhNubj) )}(h**Parameters** ``struct drm_dp_mst_port *port`` MST port whose parent's AUX device is returned **Description** Return the AUX device for **port**'s parent or NULL if port's parent is the root port.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjw )}(hhh]j| )}(hP``struct drm_dp_mst_port *port`` MST port whose parent's AUX device is returned h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h.MST port whose parent's AUX device is returnedh]h0MST port whose parent’s AUX device is returned}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hVReturn the AUX device for **port**'s parent or NULL if port's parent is the root port.h](hReturn the AUX device for }(hj hhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh8’s parent or NULL if port’s parent is the root port.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dp_mst_dsc_aux_for_port (C function)c.drm_dp_mst_dsc_aux_for_porthNtauh1j hjshhhNhNubj )}(hhh](j )}(hNstruct drm_dp_aux * drm_dp_mst_dsc_aux_for_port (struct drm_dp_mst_port *port)h]j )}(hLstruct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port)h](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjZhMubh)}(hhh]j )}(h drm_dp_auxh]h drm_dp_aux}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnmodnameN classnameNj j )}j ]j%)}jdrm_dp_mst_dsc_aux_for_portsbc.drm_dp_mst_dsc_aux_for_portasbuh1hhjIhhhjZhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIhhhjZhMubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjIhhhjZhMubj )}(hdrm_dp_mst_dsc_aux_for_porth]j )}(hjh]hdrm_dp_mst_dsc_aux_for_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjIhhhjZhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dp_mst_dsc_aux_for_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjIhhhjZhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjEhhhjZhMubah}(h]j@ah ](j j eh"]h$]h&]j j )j huh1j hjZhMhjBhhubj )}(hhh]h)}(hFind the correct aux for DSCh]hFind the correct aux for DSC}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjEhhubah}(h]h ]h"]h$]h&]uh1j hjBhhhjZhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j`j$ j`j% j& j' uh1j hhhjshNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_port *port`` The port to check. A leaf of the MST tree with an attached display. **Description** Depending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector's physical aux. This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED. This operation can be expensive (up to four aux reads), so the caller should cache the return. **Return** NULL if DSC cannot be enabled on this port, otherwise the aux deviceh](h)}(h**Parameters**h]j3 )}(hjjh]h Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjhubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjdubjw )}(hhh]j| )}(he``struct drm_dp_mst_port *port`` The port to check. A leaf of the MST tree with an attached display. h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(hCThe port to check. A leaf of the MST tree with an attached display.h]hCThe port to check. A leaf of the MST tree with an attached display.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjdubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjdubh)}(hDepending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector's physical aux.h]hDepending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector’s physical aux.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjdubh)}(h]This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED.h]h]This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjdubh)}(h^This operation can be expensive (up to four aux reads), so the caller should cache the return.h]h^This operation can be expensive (up to four aux reads), so the caller should cache the return.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjdubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjdubh)}(hDNULL if DSC cannot be enabled on this port, otherwise the aux deviceh]hDNULL if DSC cannot be enabled on this port, otherwise the aux device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:319: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjshhhNhNubeh}(h]jah ]h"]h$]j2ah&]uh1hhjphhhhhM:jCKubh)}(hhh](h)}(hTopology Lifetime Internalsh]hTopology Lifetime Internals}(hj>hhhNhNubah}(h]h ]h"]h$]h&]hj2uh1hhj;hhhhhMCubh)}(h~These functions aren't exported to drivers, but are documented here to help make the MST topology helpers easier to understandh]hThese functions aren’t exported to drivers, but are documented here to help make the MST topology helpers easier to understand}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMEhj;hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_mst_get_mstb_malloc (C function)c.drm_dp_mst_get_mstb_mallochNtauh1j hj;hhhNhNubj )}(hhh](j )}(h@void drm_dp_mst_get_mstb_malloc (struct drm_dp_mst_branch *mstb)h]j )}(h?void drm_dp_mst_get_mstb_malloc(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjohhhjhMubj )}(hdrm_dp_mst_get_mstb_malloch]j )}(hdrm_dp_mst_get_mstb_malloch]hdrm_dp_mst_get_mstb_malloc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjohhhjhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_mst_get_mstb_mallocasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmstbh]hmstb}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjohhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjkhhhjhMubah}(h]jfah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhhubj )}(hhh]h)}(h0Increment the malloc refcount of a branch deviceh]h0Increment the malloc refcount of a branch device}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj0hhubah}(h]h ]h"]h$]h&]uh1j hjhhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jKj$ jKj% j& j' uh1j hhhj;hNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount of **Description** Increments :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used. See also: drm_dp_mst_put_mstb_malloc()h](h)}(h**Parameters**h]j3 )}(hjUh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjSubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjOubjw )}(hhh]j| )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount of h](j )}(h"``struct drm_dp_mst_branch *mstb``h]j )}(hjth]hstruct drm_dp_mst_branch *mstb}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjnubj )}(hhh]h)}(h^The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount ofh](hThe }(hjhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hjh]hstruct drm_dp_mst_branch}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjubh$ to increment the malloc refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjkubah}(h]h ]h"]h$]h&]uh1jv hjOubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjOubh)}(hIncrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used.h](h Increments }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]j )}(hjh]hdrm_dp_mst_branch.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]j )}(hjh]hdrm_dp_mst_branch.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj3 )}(h**mstb**h]hmstb}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh will be released and }(hjhhhNhNubj3 )}(h**mstb**h]hmstb}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjOubh)}(h&See also: drm_dp_mst_put_mstb_malloc()h]h&See also: drm_dp_mst_put_mstb_malloc()}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dp_mst_put_mstb_malloc (C function)c.drm_dp_mst_put_mstb_mallochNtauh1j hj;hhhNhNubj )}(hhh](j )}(h@void drm_dp_mst_put_mstb_malloc (struct drm_dp_mst_branch *mstb)h]j )}(h?void drm_dp_mst_put_mstb_malloc(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dp_mst_put_mstb_malloch]j )}(hdrm_dp_mst_put_mstb_malloch]hdrm_dp_mst_put_mstb_malloc}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_mst_put_mstb_mallocasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmstbh]hmstb}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h0Decrement the malloc refcount of a branch deviceh]h0Decrement the malloc refcount of a branch device}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jhj$ jhj% j& j' uh1j hhhj;hNhNubj) )}(hX**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount of **Description** Decrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used. See also: drm_dp_mst_get_mstb_malloc()h](h)}(h**Parameters**h]j3 )}(hjrh]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjpubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubjw )}(hhh]j| )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount of h](j )}(h"``struct drm_dp_mst_branch *mstb``h]j )}(hjh]hstruct drm_dp_mst_branch *mstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(h^The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount ofh](hThe }(hjhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hjh]hstruct drm_dp_mst_branch}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjhMhjubh$ to decrement the malloc refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjlubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubh)}(hDecrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used.h](h Decrements }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]j )}(hjh]hdrm_dp_mst_branch.malloc_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]j )}(hj3h]hdrm_dp_mst_branch.malloc_kref}(hj5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhj,hMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj3 )}(h**mstb**h]hmstb}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh will be released and }(hjhhhNhNubj3 )}(h**mstb**h]hmstb}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,hMhjlubh)}(h&See also: drm_dp_mst_get_mstb_malloc()h]h&See also: drm_dp_mst_get_mstb_malloc()}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_mst_topology_try_get_mstb (C function)"c.drm_dp_mst_topology_try_get_mstbhNtauh1j hj;hhhNhNubj )}(hhh](j )}(hEint drm_dp_mst_topology_try_get_mstb (struct drm_dp_mst_branch *mstb)h]j )}(hDint drm_dp_mst_topology_try_get_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h drm_dp_mst_topology_try_get_mstbh]j )}(h drm_dp_mst_topology_try_get_mstbh]h drm_dp_mst_topology_try_get_mstb}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jjsb"c.drm_dp_mst_topology_try_get_mstbasbuh1hhjubj )}(h h]h }(hj( hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj6 hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hmstbh]hmstb}(hjC hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hCIncrement the topology refcount of a branch device unless it's zeroh]hEIncrement the topology refcount of a branch device unless it’s zero}(hjm hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjj hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj;hNhNubj) )}(hXz**Parameters** ``struct drm_dp_mst_branch *mstb`` :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of **Description** Attempts to grab a topology reference to **mstb**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_branch.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **mstb** as long as the user holds the topology reference. Care should be taken to ensure that the user has at least one malloc reference to **mstb**. If you already have a topology reference to **mstb**, you should use drm_dp_mst_topology_get_mstb() instead. See also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb() **Return** * 1: A topology reference was grabbed successfully * 0: **port** is no longer in the topology, no reference was grabbedh](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubjw )}(hhh]j| )}(h``struct drm_dp_mst_branch *mstb`` :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of h](j )}(h"``struct drm_dp_mst_branch *mstb``h]j )}(hj h]hstruct drm_dp_mst_branch *mstb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj )}(hhh]h)}(h\:c:type:`struct drm_dp_mst_branch ` to increment the topology refcount ofh](h)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hj h]hstruct drm_dp_mst_branch}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhj hMhj ubh& to increment the topology refcount of}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhj ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh)}(hX>Attempts to grab a topology reference to **mstb**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_branch.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **mstb** as long as the user holds the topology reference.h](h)Attempts to grab a topology reference to }(hj hhhNhNubj3 )}(h**mstb**h]hmstb}(hj& hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh:, if it hasn’t yet been removed from the topology (e.g. }(hj hhhNhNubh)}(h=:c:type:`drm_dp_mst_branch.topology_kref `h]j )}(hj: h]hdrm_dp_mst_branch.topology_kref}(hj< hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj8 ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh^ has reached 0). Holding a topology reference implies that a malloc reference will be held to }(hj hhhNhNubj3 )}(h**mstb**h]hmstb}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh2 as long as the user holds the topology reference.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjW hMhj ubh)}(hCare should be taken to ensure that the user has at least one malloc reference to **mstb**. If you already have a topology reference to **mstb**, you should use drm_dp_mst_topology_get_mstb() instead.h](hRCare should be taken to ensure that the user has at least one malloc reference to }(hjt hhhNhNubj3 )}(h**mstb**h]hmstb}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjt ubh.. If you already have a topology reference to }(hjt hhhNhNubj3 )}(h**mstb**h]hmstb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjt ubh8, you should use drm_dp_mst_topology_get_mstb() instead.}(hjt hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh)}(hGSee also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb()h]hGSee also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh)}(hhh](h)}(h01: A topology reference was grabbed successfullyh]h)}(hj h]h01: A topology reference was grabbed successfully}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubah}(h]h ]h"]h$]h&]uh1hhj ubh)}(hB0: **port** is no longer in the topology, no reference was grabbedh]h)}(hj h](h0: }(hj hhhNhNubj3 )}(h**port**h]hport}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh7 is no longer in the topology, no reference was grabbed}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubah}(h]h ]h"]h$]h&]uh1hhj ubeh}(h]h ]h"]h$]h&]jNjOuh1hhj hMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_mst_topology_get_mstb (C function)c.drm_dp_mst_topology_get_mstbhNtauh1j hj;hhhNhNubj )}(hhh](j )}(hBvoid drm_dp_mst_topology_get_mstb (struct drm_dp_mst_branch *mstb)h]j )}(hAvoid drm_dp_mst_topology_get_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hj9 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5 hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjH hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5 hhhjG hMubj )}(hdrm_dp_mst_topology_get_mstbh]j )}(hdrm_dp_mst_topology_get_mstbh]hdrm_dp_mst_topology_get_mstb}(hjZ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj5 hhhjG hMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hjv hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr ubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]j%)}jj\ sbc.drm_dp_mst_topology_get_mstbasbuh1hhjr ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjr ubj )}(hmstbh]hmstb}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjr ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjn ubah}(h]h ]h"]h$]h&]j j uh1jhj5 hhhjG hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj1 hhhjG hMubah}(h]j, ah ](j j eh"]h$]h&]j j )j huh1j hjG hMhj. hhubj )}(hhh]h)}(h2Increment the topology refcount of a branch deviceh]h2Increment the topology refcount of a branch device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hj. hhhjG hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj;hNhNubj) )}(hX9**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of **Description** Increments :c:type:`drm_dp_mst_branch.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **mstb**. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used. See also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubjw )}(hhh]j| )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of h](j )}(h"``struct drm_dp_mst_branch *mstb``h]j )}(hj: h]hstruct drm_dp_mst_branch *mstb}(hj< hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj8 ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj4 ubj )}(hhh]h)}(h`The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount ofh](hThe }(hjS hhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hj] h]hstruct drm_dp_mst_branch}(hj_ hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj[ ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhjO hMhjS ubh& to increment the topology refcount of}(hjS hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjO hMhjP ubah}(h]h ]h"]h$]h&]uh1j hj4 ubeh}(h]h ]h"]h$]h&]uh1j{ hjO hMhj1 ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh)}(hXDIncrements :c:type:`drm_dp_mst_branch.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **mstb**. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used.h](h Increments }(hj hhhNhNubh)}(hA:c:type:`drm_dp_mst_branch.topology_refcount `h]j )}(hj h]h#drm_dp_mst_branch.topology_refcount}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh without checking whether or not it’s already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to }(hj hhhNhNubj3 )}(h**mstb**h]hmstb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh=. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubh)}(hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()h]hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_mst_topology_put_mstb (C function)c.drm_dp_mst_topology_put_mstbhNtauh1j hj;hhhNhNubj )}(hhh](j )}(hBvoid drm_dp_mst_topology_put_mstb (struct drm_dp_mst_branch *mstb)h]j )}(hAvoid drm_dp_mst_topology_put_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hj! hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hj0 hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj hhhj/ hMubj )}(hdrm_dp_mst_topology_put_mstbh]j )}(hdrm_dp_mst_topology_put_mstbh]hdrm_dp_mst_topology_put_mstb}(hjB hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj> ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj hhhj/ hMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j )}(hj h]hstruct}(hj^ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ ubj )}(h h]h }(hjk hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ ubh)}(hhh]j )}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hj| hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjy ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~ modnameN classnameNj j )}j ]j%)}jjD sbc.drm_dp_mst_topology_put_mstbasbuh1hhjZ ubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ ubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjZ ubj )}(hmstbh]hmstb}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjV ubah}(h]h ]h"]h$]h&]j j uh1jhj hhhj/ hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj hhhj/ hMubah}(h]j ah ](j j eh"]h$]h&]j j )j huh1j hj/ hMhj hhubj )}(hhh]h)}(h/release a topology reference to a branch deviceh]h/release a topology reference to a branch device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj hhubah}(h]h ]h"]h$]h&]uh1j hj hhhj/ hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhj;hNhNubj) )}(hXp**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to release the topology reference from **Description** Releases a topology reference from **mstb** by decrementing :c:type:`drm_dp_mst_branch.topology_kref `. See also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubjw )}(hhh]j| )}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to release the topology reference from h](j )}(h"``struct drm_dp_mst_branch *mstb``h]j )}(hj"h]hstruct drm_dp_mst_branch *mstb}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj )}(hhh]h)}(haThe :c:type:`struct drm_dp_mst_branch ` to release the topology reference fromh](hThe }(hj;hhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]j )}(hjEh]hstruct drm_dp_mst_branch}(hjGhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhj7hMhj;ubh' to release the topology reference from}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hMhj8ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj7hMhjubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh)}(hzReleases a topology reference from **mstb** by decrementing :c:type:`drm_dp_mst_branch.topology_kref `.h](h#Releases a topology reference from }(hjhhhNhNubj3 )}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh by decrementing }(hjhhhNhNubh)}(h=:c:type:`drm_dp_mst_branch.topology_kref `h]j )}(hjh]hdrm_dp_mst_branch.topology_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj ubh)}(hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()h]hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_dp_mst_topology_try_get_port (C function)"c.drm_dp_mst_topology_try_get_porthNtauh1j hj;hhhNhNubj )}(hhh](j )}(hCint drm_dp_mst_topology_try_get_port (struct drm_dp_mst_port *port)h]j )}(hBint drm_dp_mst_topology_try_get_port(struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM@ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM@ubj )}(h drm_dp_mst_topology_try_get_porth]j )}(h drm_dp_mst_topology_try_get_porth]h drm_dp_mst_topology_try_get_port}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM@ubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]j%)}jj,sb"c.drm_dp_mst_topology_try_get_portasbuh1hhjBubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjBubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM@ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM@ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM@hjhhubj )}(hhh]h)}(h:Increment the topology refcount of a port unless it's zeroh]h` to increment the topology refcount of **Description** Attempts to grab a topology reference to **port**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_port.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **port** as long as the user holds the topology reference. Care should be taken to ensure that the user has at least one malloc reference to **port**. If you already have a topology reference to **port**, you should use drm_dp_mst_topology_get_port() instead. See also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port() **Return** * 1: A topology reference was grabbed successfully * 0: **port** is no longer in the topology, no reference was grabbedh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhjubjw )}(hhh]j| )}(hz``struct drm_dp_mst_port *port`` :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hj h]hstruct drm_dp_mst_port *port}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMBhjubj )}(hhh]h)}(hX:c:type:`struct drm_dp_mst_port ` to increment the topology refcount ofh](h)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hj)h]hstruct drm_dp_mst_port}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMBhj#ubh& to increment the topology refcount of}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMBhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMBhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjdh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhjubh)}(hX:Attempts to grab a topology reference to **port**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_port.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **port** as long as the user holds the topology reference.h](h)Attempts to grab a topology reference to }(hjzhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubh:, if it hasn’t yet been removed from the topology (e.g. }(hjzhhhNhNubh)}(h9:c:type:`drm_dp_mst_port.topology_kref `h]j )}(hjh]hdrm_dp_mst_port.topology_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMChjzubh^ has reached 0). Holding a topology reference implies that a malloc reference will be held to }(hjzhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubh2 as long as the user holds the topology reference.}(hjzhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMChjubh)}(hCare should be taken to ensure that the user has at least one malloc reference to **port**. If you already have a topology reference to **port**, you should use drm_dp_mst_topology_get_port() instead.h](hRCare should be taken to ensure that the user has at least one malloc reference to }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh.. If you already have a topology reference to }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh8, you should use drm_dp_mst_topology_get_port() instead.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMHhjubh)}(hGSee also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port()h]hGSee also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMLhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMPhjubh)}(hhh](h)}(h01: A topology reference was grabbed successfullyh]h)}(hj/h]h01: A topology reference was grabbed successfully}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMQhj-ubah}(h]h ]h"]h$]h&]uh1hhj*ubh)}(hB0: **port** is no longer in the topology, no reference was grabbedh]h)}(hjGh](h0: }(hjIhhhNhNubj3 )}(h**port**h]hport}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubh7 is no longer in the topology, no reference was grabbed}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMRhjEubah}(h]h ]h"]h$]h&]uh1hhj*ubeh}(h]h ]h"]h$]h&]jNjOuh1hhj>hMQhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_mst_topology_get_port (C function)c.drm_dp_mst_topology_get_porthNtauh1j hj;hhhNhNubj )}(hhh](j )}(h@void drm_dp_mst_topology_get_port (struct drm_dp_mst_port *port)h]j )}(h?void drm_dp_mst_topology_get_port(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMfubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMfubj )}(hdrm_dp_mst_topology_get_porth]j )}(hdrm_dp_mst_topology_get_porth]hdrm_dp_mst_topology_get_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMfubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_mst_topology_get_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMfubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMfubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMfhjhhubj )}(hhh]h)}(h)Increment the topology refcount of a porth]h)Increment the topology refcount of a port}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMfhjRhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMfubeh}(h]h ](j functioneh"]h$]h&]j" j j# jmj$ jmj% j& j' uh1j hhhj;hNhNubj) )}(hX/**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of **Description** Increments :c:type:`drm_dp_mst_port.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **port**. Otherwise, drm_dp_mst_topology_try_get_port() must be used. See also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()h](h)}(h**Parameters**h]j3 )}(hjwh]h Parameters}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMjhjqubjw )}(hhh]j| )}(h~``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMghjubj )}(hhh]h)}(h\The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount ofh](hThe }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMghjubh& to increment the topology refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMghjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMghjubah}(h]h ]h"]h$]h&]uh1jv hjqubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMihjqubh)}(hX@Increments :c:type:`drm_dp_mst_port.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **port**. Otherwise, drm_dp_mst_topology_try_get_port() must be used.h](h Increments }(hj hhhNhNubh)}(h=:c:type:`drm_dp_mst_port.topology_refcount `h]j )}(hjh]h!drm_dp_mst_port.topology_refcount}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhhj ubh without checking whether or not it’s already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to }(hj hhhNhNubj3 )}(h**port**h]hport}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubh=. Otherwise, drm_dp_mst_topology_try_get_port() must be used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hMhhjqubh)}(hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()h]hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMmhjqubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_dp_mst_topology_put_port (C function)c.drm_dp_mst_topology_put_porthNtauh1j hj;hhhNhNubj )}(hhh](j )}(h@void drm_dp_mst_topology_put_port (struct drm_dp_mst_port *port)h]j )}(h?void drm_dp_mst_topology_put_port(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyhhhjhMubj )}(hdrm_dp_mst_topology_put_porth]j )}(hdrm_dp_mst_topology_put_porth]hdrm_dp_mst_topology_put_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjyhhhjhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dp_mst_topology_put_portasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hporth]hport}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjyhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjuhhhjhMubah}(h]jpah ](j j eh"]h$]h&]j j )j huh1j hjhMhjrhhubj )}(hhh]h)}(h&release a topology reference to a porth]h&release a topology reference to a port}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj:hhubah}(h]h ]h"]h$]h&]uh1j hjrhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jUj$ jUj% j& j' uh1j hhhj;hNhNubj) )}(hXf**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to release the topology reference from **Description** Releases a topology reference from **port** by decrementing :c:type:`drm_dp_mst_port.topology_kref `. See also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()h](h)}(h**Parameters**h]j3 )}(hj_h]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjYubjw )}(hhh]j| )}(h``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to release the topology reference from h](j )}(h ``struct drm_dp_mst_port *port``h]j )}(hj~h]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjxubj )}(hhh]h)}(h]The :c:type:`struct drm_dp_mst_port ` to release the topology reference fromh](hThe }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]j )}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhjhMhjubh' to release the topology reference from}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjuubah}(h]h ]h"]h$]h&]uh1jv hjYubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjYubh)}(hvReleases a topology reference from **port** by decrementing :c:type:`drm_dp_mst_port.topology_kref `.h](h#Releases a topology reference from }(hjhhhNhNubj3 )}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh by decrementing }(hjhhhNhNubh)}(h9:c:type:`drm_dp_mst_port.topology_kref `h]j )}(hjh]hdrm_dp_mst_port.topology_kref}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hMhjYubh)}(hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()h]hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:328: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj;hhhNhNubeh}(h]j8ah ]h"]topology lifetime internalsah$]h&]uh1hhjphhhhhMCubeh}(h]jfah ]h"]display port mst helpersah$]h&]uh1hhhhhhhhM.ubh)}(hhh](h)}(h#MIPI DBI Helper Functions Referenceh]h#MIPI DBI Helper Functions Reference}(hj]hhhNhNubah}(h]h ]h"]h$]h&]hj`uh1hhjZhhhhhMPubh)}(hbThis library provides helpers for MIPI Display Bus Interface (DBI) compatible display controllers.h]hbThis library provides helpers for MIPI Display Bus Interface (DBI) compatible display controllers.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK)hjZhhubh)}(hMany controllers for tiny lcd displays are MIPI compliant and can use this library. If a controller uses registers 0x2A and 0x2B to set the area to update and uses register 0x2C to write to frame memory, it is most likely MIPI compliant.h]hMany controllers for tiny lcd displays are MIPI compliant and can use this library. If a controller uses registers 0x2A and 0x2B to set the area to update and uses register 0x2C to write to frame memory, it is most likely MIPI compliant.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK,hjZhhubh)}(hLOnly MIPI Type 1 displays are supported since a full frame memory is needed.h]hLOnly MIPI Type 1 displays are supported since a full frame memory is needed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK1hjZhhubh)}(h*There are 3 MIPI DBI implementation types:h]h*There are 3 MIPI DBI implementation types:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK3hjZhhubjMP)}(hhh](h)}(h Motorola 6800 type parallel bus h]h)}(hMotorola 6800 type parallel bush]hMotorola 6800 type parallel bus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK5hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hIntel 8080 type parallel bus h]h)}(hIntel 8080 type parallel bush]hIntel 8080 type parallel bus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK7hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hSPI type with 3 options: 1. 9-bit with the Data/Command signal as the ninth bit 2. Same as above except it's sent as 16 bits 3. 8-bit with the Data/Command signal as a separate D/CX pin h](h)}(hSPI type with 3 options:h]hSPI type with 3 options:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK9hjubjMP)}(hhh](h)}(h39-bit with the Data/Command signal as the ninth bith]h)}(hjh]h39-bit with the Data/Command signal as the ninth bit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chK;hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h)Same as above except it's sent as 16 bitsh]h)}(hj h]h+Same as above except it’s sent as 16 bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:338: ./drivers/gpu/drm/drm_mipi_dbi.chKh]hrotation}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKnhj8ubj )}(hhh]h)}(h.initial rotation in degrees Counter Clock Wiseh]h.initial rotation in degrees Counter Clock Wise}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShKnhjTubah}(h]h ]h"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hjShKnhjQubj| )}(hi``left_offset`` Horizontal offset of the display relative to the controller's driver array h](j )}(h``left_offset``h]j )}(hjwh]h left_offset}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKthjqubj )}(hhh]jw )}(hhh]j| )}(hKHorizontal offset of the display relative to the controller's driver array h](j )}(h0Horizontal offset of the display relative to theh]h0Horizontal offset of the display relative to the}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhKthjubj )}(hhh]h)}(hcontroller's driver arrayh]hcontroller’s driver array}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKthjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKthjubah}(h]h ]h"]h$]h&]uh1jv hjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhKthjQubj| )}(he``top_offset`` Vertical offset of the display relative to the controller's driver array h](j )}(h``top_offset``h]j )}(hjh]h top_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKzhjubj )}(hhh]jw )}(hhh]j| )}(hIVertical offset of the display relative to the controller's driver array h](j )}(h.Vertical offset of the display relative to theh]h.Vertical offset of the display relative to the}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhKzhjubj )}(hhh]h)}(hcontroller's driver arrayh]hcontroller’s driver array}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKzhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKzhjubah}(h]h ]h"]h$]h&]uh1jv hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKzhjQubj| )}(h*``backlight`` backlight device (optional) h](j )}(h ``backlight``h]j )}(hj=h]h backlight}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhj7ubj )}(hhh]h)}(hbacklight device (optional)h]hbacklight device (optional)}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhKhjSubah}(h]h ]h"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]uh1j{ hjRhKhjQubj| )}(h/``regulator`` power regulator (Vdd) (optional) h](j )}(h ``regulator``h]j )}(hjvh]h regulator}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjpubj )}(hhh]h)}(h power regulator (Vdd) (optional)h]h power regulator (Vdd) (optional)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjQubj| )}(h7``io_regulator`` I/O power regulator (Vddi) (optional) h](j )}(h``io_regulator``h]j )}(hjh]h io_regulator}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjubj )}(hhh]h)}(h%I/O power regulator (Vddi) (optional)h]h%I/O power regulator (Vddi) (optional)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjQubj| )}(h``dbi`` MIPI DBI interface h](j )}(h``dbi``h]j )}(hjh]hdbi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjubj )}(hhh]h)}(hMIPI DBI interfaceh]hMIPI DBI interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjQubj| )}(h``driver_private`` Driver private data. Necessary for drivers with private data since devm_drm_dev_alloc() can't allocate structures that embed a structure which then again embeds drm_device.h](j )}(h``driver_private``h]j )}(hj!h]hdriver_private}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjubj )}(hhh]jw )}(hhh]j| )}(hDriver private data. Necessary for drivers with private data since devm_drm_dev_alloc() can't allocate structures that embed a structure which then again embeds drm_device.h](j )}(hDriver private data.h]hDriver private data.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6hKhj=ubj )}(hhh]h)}(hNecessary for drivers with private data since devm_drm_dev_alloc() can't allocate structures that embed a structure which then again embeds drm_device.h]hNecessary for drivers with private data since devm_drm_dev_alloc() can’t allocate structures that embed a structure which then again embeds drm_device.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjOubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hKhj:ubah}(h]h ]h"]h$]h&]uh1jv hj7ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj6hKhjQubeh}(h]h ]h"]h$]h&]uh1jv hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dbi_command (C macro)c.mipi_dbi_commandhNtauh1j hjZhhhNhNubj )}(hhh](j )}(hmipi_dbi_commandh]j )}(hmipi_dbi_commandh]j )}(hmipi_dbi_commandh]j )}(hjh]hmipi_dbi_command}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKubah}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjhhhjhKubeh}(h]h ](j macroeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjZhNhNubh)}(h'``mipi_dbi_command (dbi, cmd, seq...)``h]j )}(hjh]h#mipi_dbi_command (dbi, cmd, seq...)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjZhhubj^E)}(h,MIPI DCS command with optional parameter(s) h]h)}(h+MIPI DCS command with optional parameter(s)h]h+MIPI DCS command with optional parameter(s)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjubah}(h]h ]h"]h$]h&]uh1j]EhjhKhjZhhubj) )}(hX**Parameters** ``dbi`` MIPI DBI structure ``cmd`` Command ``seq...`` Optional parameter(s) **Description** Send MIPI DCS command to the controller. Use mipi_dbi_command_read() for get/read. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhj ubjw )}(hhh](j| )}(h``dbi`` MIPI DBI structure h](j )}(h``dbi``h]j )}(hj/h]hdbi}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhj)ubj )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhKhjEubah}(h]h ]h"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]uh1j{ hjDhKhj&ubj| )}(h``cmd`` Command h](j )}(h``cmd``h]j )}(hjhh]hcmd}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjbubj )}(hhh]h)}(hCommandh]hCommand}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hKhj~ubah}(h]h ]h"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]uh1j{ hj}hKhj&ubj| )}(h!``seq...`` Optional parameter(s) h](j )}(h ``seq...``h]j )}(hjh]hseq...}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhjubj )}(hhh]h)}(hOptional parameter(s)h]hOptional parameter(s)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhj&ubeh}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhj ubh)}(hRSend MIPI DCS command to the controller. Use mipi_dbi_command_read() for get/read.h]hRSend MIPI DCS command to the controller. Use mipi_dbi_command_read() for get/read.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhj ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhj ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:341: ./include/drm/drm_mipi_dbi.hhKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "mipi_dbi_command_read (C function)c.mipi_dbi_command_readhNtauh1j hjZhhhNhNubj )}(hhh](j )}(hAint mipi_dbi_command_read (struct mipi_dbi *dbi, u8 cmd, u8 *val)h]j )}(h@int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val)h](j)}(hinth]hint}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKyubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDhhhjVhKyubj )}(hmipi_dbi_command_readh]j )}(hmipi_dbi_command_readh]hmipi_dbi_command_read}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjeubah}(h]h ](j j eh"]h$]h&]j j uh1j hjDhhhjVhKyubj)}(h'(struct mipi_dbi *dbi, u8 cmd, u8 *val)h](j)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjksbc.mipi_dbi_command_readasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdbih]hdbi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dbi_command_readasbuh1hhjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcmdh]hcmd}(hj& hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubj)}(hu8 *valh](h)}(hhh]j )}(hu8h]hu8}(hjB hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj? ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjD modnameN classnameNj j )}j ]jc.mipi_dbi_command_readasbuh1hhj; ubj )}(h h]h }(hj` hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj; ubj9)}(hjOh]h*}(hjn hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj; ubj )}(hvalh]hval}(hj{ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj; ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj}ubeh}(h]h ]h"]h$]h&]j j uh1jhjDhhhjVhKyubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj@hhhjVhKyubah}(h]j;ah ](j j eh"]h$]h&]j j )j huh1j hjVhKyhj=hhubj )}(hhh]h)}(hMIPI DCS read commandh]hMIPI DCS read command}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKyhj hhubah}(h]h ]h"]h$]h&]uh1j hj=hhhjVhKyubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhjZhNhNubj) )}(h**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure ``u8 cmd`` Command ``u8 *val`` Value read **Description** Send MIPI DCS read command to the controller. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chK}hj ubjw )}(hhh](j| )}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](j )}(h``struct mipi_dbi *dbi``h]j )}(hj h]hstruct mipi_dbi *dbi}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKzhj ubj )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKzhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hKzhj ubj| )}(h``u8 cmd`` Command h](j )}(h ``u8 cmd``h]j )}(hj!h]hu8 cmd}(hj!!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chK{hj!ubj )}(hhh]h)}(hCommandh]hCommand}(hj8!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4!hK{hj5!ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj4!hK{hj ubj| )}(h``u8 *val`` Value read h](j )}(h ``u8 *val``h]j )}(hjX!h]hu8 *val}(hjZ!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjV!ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chK|hjR!ubj )}(hhh]h)}(h Value readh]h Value read}(hjq!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjm!hK|hjn!ubah}(h]h ]h"]h$]h&]uh1j hjR!ubeh}(h]h ]h"]h$]h&]uh1j{ hjm!hK|hj ubeh}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chK~hj ubh)}(h-Send MIPI DCS read command to the controller.h]h-Send MIPI DCS read command to the controller.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chK}hj ubh)}(h **Return**h]j3 )}(hj!h]hReturn}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !mipi_dbi_command_buf (C function)c.mipi_dbi_command_bufhNtauh1j hjZhhhNhNubj )}(hhh](j )}(hMint mipi_dbi_command_buf (struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len)h]j )}(hLint mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len)h](j)}(hinth]hint}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!hhhj "hKubj )}(hmipi_dbi_command_bufh]j )}(hmipi_dbi_command_bufh]hmipi_dbi_command_buf}(hj "hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj!hhhj "hKubj)}(h4(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len)h](j)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hj<"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8"ubj )}(h h]h }(hjI"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8"ubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hjZ"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjW"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\"modnameN classnameNj j )}j ]j%)}jj""sbc.mipi_dbi_command_bufasbuh1hhj8"ubj )}(h h]h }(hjz"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8"ubj9)}(hjOh]h*}(hj"hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8"ubj )}(hdbih]hdbi}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4"ubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]jv"c.mipi_dbi_command_bufasbuh1hhj"ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj )}(hcmdh]hcmd}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4"ubj)}(hu8 *datah](h)}(hhh]j )}(hu8h]hu8}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj"modnameN classnameNj j )}j ]jv"c.mipi_dbi_command_bufasbuh1hhj"ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubj9)}(hjOh]h*}(hj%#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj"ubj )}(hdatah]hdata}(hj2#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4"ubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjN#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjK#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjP#modnameN classnameNj j )}j ]jv"c.mipi_dbi_command_bufasbuh1hhjG#ubj )}(h h]h }(hjl#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG#ubj )}(hlenh]hlen}(hjz#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjG#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4"ubeh}(h]h ]h"]h$]h&]j j uh1jhj!hhhj "hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj!hhhj "hKubah}(h]j!ah ](j j eh"]h$]h&]j j )j huh1j hj "hKhj!hhubj )}(hhh]h)}(h.MIPI DCS command with parameter(s) in an arrayh]h.MIPI DCS command with parameter(s) in an array}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj#hhubah}(h]h ]h"]h$]h&]uh1j hj!hhhj "hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j#j$ j#j% j& j' uh1j hhhjZhNhNubj) )}(h**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure ``u8 cmd`` Command ``u8 *data`` Parameter buffer ``size_t len`` Buffer length **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj#h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj#ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj#ubjw )}(hhh](j| )}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](j )}(h``struct mipi_dbi *dbi``h]j )}(hj#h]hstruct mipi_dbi *dbi}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj#ubj )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKhj#ubah}(h]h ]h"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]uh1j{ hj#hKhj#ubj| )}(h``u8 cmd`` Command h](j )}(h ``u8 cmd``h]j )}(hj$h]hu8 cmd}(hj $hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj$ubj )}(hhh]h)}(hCommandh]hCommand}(hj7$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3$hKhj4$ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj3$hKhj#ubj| )}(h``u8 *data`` Parameter buffer h](j )}(h ``u8 *data``h]j )}(hjW$h]hu8 *data}(hjY$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjU$ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhjQ$ubj )}(hhh]h)}(hParameter bufferh]hParameter buffer}(hjp$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjl$hKhjm$ubah}(h]h ]h"]h$]h&]uh1j hjQ$ubeh}(h]h ]h"]h$]h&]uh1j{ hjl$hKhj#ubj| )}(h``size_t len`` Buffer length h](j )}(h``size_t len``h]j )}(hj$h]h size_t len}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj$ubj )}(hhh]h)}(h Buffer lengthh]h Buffer length}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj$ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hKhj#ubeh}(h]h ]h"]h$]h&]uh1jv hj#ubh)}(h **Return**h]j3 )}(hj$h]hReturn}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj#ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dbi_buf_copy (C function)c.mipi_dbi_buf_copyhNtauh1j hjZhhhNhNubj )}(hhh](j )}(hint mipi_dbi_buf_copy (void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h]j )}(hint mipi_dbi_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h](j)}(hinth]hint}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj %hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj %hhhj%hKubj )}(hmipi_dbi_buf_copyh]j )}(hmipi_dbi_buf_copyh]hmipi_dbi_buf_copy}(hj1%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj-%ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj %hhhj%hKubj)}(h(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h](j)}(h void *dsth](j)}(hvoidh]hvoid}(hjM%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjI%ubj )}(h h]h }(hj[%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI%ubj9)}(hjOh]h*}(hji%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjI%ubj )}(hdsth]hdst}(hjv%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjI%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE%ubj)}(hstruct iosys_map *srch](j )}(hj h]hstruct}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(h iosys_maph]h iosys_map}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj%modnameN classnameNj j )}j ]j%)}jj3%sbc.mipi_dbi_buf_copyasbuh1hhj%ubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hj%hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hsrch]hsrc}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE%ubj)}(hstruct drm_framebuffer *fbh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_framebufferh]hdrm_framebuffer}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!&modnameN classnameNj j )}j ]j%c.mipi_dbi_buf_copyasbuh1hhj%ubj )}(h h]h }(hj=&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjK&hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hfbh]hfb}(hjX&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE%ubj)}(hstruct drm_rect *cliph](j )}(hj h]hstruct}(hjq&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjm&ubj )}(h h]h }(hj~&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjm&ubh)}(hhh]j )}(hdrm_recth]hdrm_rect}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j%c.mipi_dbi_buf_copyasbuh1hhjm&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjm&ubj9)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjm&ubj )}(hcliph]hclip}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjm&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE%ubj)}(h bool swaph](j)}(hjIh]hbool}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubj )}(hswaph]hswap}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE%ubj)}(h*struct drm_format_conv_state *fmtcnv_stateh](j )}(hj h]hstruct}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj )}(h h]h }(hj"'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubh)}(hhh]j )}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj3'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0'ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5'modnameN classnameNj j )}j ]j%c.mipi_dbi_buf_copyasbuh1hhj'ubj )}(h h]h }(hjQ'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubj9)}(hjOh]h*}(hj_'hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj'ubj )}(h fmtcnv_stateh]h fmtcnv_state}(hjl'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjE%ubeh}(h]h ]h"]h$]h&]j j uh1jhj %hhhj%hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj%hhhj%hKubah}(h]j%ah ](j j eh"]h$]h&]j j )j huh1j hj%hKhj%hhubj )}(hhh]h)}(h0Copy a framebuffer, transforming it if necessaryh]h0Copy a framebuffer, transforming it if necessary}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj'hhubah}(h]h ]h"]h$]h&]uh1j hj%hhhj%hKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j'j$ j'j% j& j' uh1j hhhjZhNhNubj) )}(hX**Parameters** ``void *dst`` The destination buffer ``struct iosys_map *src`` The source buffer ``struct drm_framebuffer *fb`` The source framebuffer ``struct drm_rect *clip`` Clipping rectangle of the area to be copied ``bool swap`` When true, swap MSB/LSB of 16-bit values ``struct drm_format_conv_state *fmtcnv_state`` Format-conversion state **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj'h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj'ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj'ubjw )}(hhh](j| )}(h%``void *dst`` The destination buffer h](j )}(h ``void *dst``h]j )}(hj'h]h void *dst}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj'ubj )}(hhh]h)}(hThe destination bufferh]hThe destination buffer}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hKhj'ubah}(h]h ]h"]h$]h&]uh1j hj'ubeh}(h]h ]h"]h$]h&]uh1j{ hj'hKhj'ubj| )}(h,``struct iosys_map *src`` The source buffer h](j )}(h``struct iosys_map *src``h]j )}(hj(h]hstruct iosys_map *src}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj (ubj )}(hhh]h)}(hThe source bufferh]hThe source buffer}(hj)(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%(hKhj&(ubah}(h]h ]h"]h$]h&]uh1j hj (ubeh}(h]h ]h"]h$]h&]uh1j{ hj%(hKhj'ubj| )}(h6``struct drm_framebuffer *fb`` The source framebuffer h](j )}(h``struct drm_framebuffer *fb``h]j )}(hjI(h]hstruct drm_framebuffer *fb}(hjK(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjG(ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhjC(ubj )}(hhh]h)}(hThe source framebufferh]hThe source framebuffer}(hjb(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^(hKhj_(ubah}(h]h ]h"]h$]h&]uh1j hjC(ubeh}(h]h ]h"]h$]h&]uh1j{ hj^(hKhj'ubj| )}(hF``struct drm_rect *clip`` Clipping rectangle of the area to be copied h](j )}(h``struct drm_rect *clip``h]j )}(hj(h]hstruct drm_rect *clip}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj|(ubj )}(hhh]h)}(h+Clipping rectangle of the area to be copiedh]h+Clipping rectangle of the area to be copied}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hKhj(ubah}(h]h ]h"]h$]h&]uh1j hj|(ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hKhj'ubj| )}(h7``bool swap`` When true, swap MSB/LSB of 16-bit values h](j )}(h ``bool swap``h]j )}(hj(h]h bool swap}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj(ubj )}(hhh]h)}(h(When true, swap MSB/LSB of 16-bit valuesh]h(When true, swap MSB/LSB of 16-bit values}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hKhj(ubah}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hj(hKhj'ubj| )}(hG``struct drm_format_conv_state *fmtcnv_state`` Format-conversion state h](j )}(h.``struct drm_format_conv_state *fmtcnv_state``h]j )}(hj(h]h*struct drm_format_conv_state *fmtcnv_state}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj(ubj )}(hhh]h)}(hFormat-conversion stateh]hFormat-conversion state}(hj )hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj )hKhj )ubah}(h]h ]h"]h$]h&]uh1j hj(ubeh}(h]h ]h"]h$]h&]uh1j{ hj )hKhj'ubeh}(h]h ]h"]h$]h&]uh1jv hj'ubh)}(h **Return**h]j3 )}(hj/)h]hReturn}(hj1)hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-)ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj'ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjE)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chKhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0drm_mipi_dbi_crtc_helper_mode_valid (C function)%c.drm_mipi_dbi_crtc_helper_mode_validhNtauh1j hjZhhhNhNubj )}(hhh](j )}(huenum drm_mode_status drm_mipi_dbi_crtc_helper_mode_valid (struct drm_crtc *crtc, const struct drm_display_mode *mode)h]j )}(htenum drm_mode_status drm_mipi_dbi_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)h](j )}(hj7h]henum}(hjt)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjp)hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM=ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjp)hhhj)hM=ubh)}(hhh]j )}(hdrm_mode_statush]hdrm_mode_status}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj)modnameN classnameNj j )}j ]j%)}j#drm_mipi_dbi_crtc_helper_mode_validsb%c.drm_mipi_dbi_crtc_helper_mode_validasbuh1hhjp)hhhj)hM=ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjp)hhhj)hM=ubj )}(h#drm_mipi_dbi_crtc_helper_mode_validh]j )}(hj)h]h#drm_mipi_dbi_crtc_helper_mode_valid}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjp)hhhj)hM=ubj)}(h<(struct drm_crtc *crtc, const struct drm_display_mode *mode)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j)%c.drm_mipi_dbi_crtc_helper_mode_validasbuh1hhj)ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubj9)}(hjOh]h*}(hj+*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)ubj )}(hcrtch]hcrtc}(hj8*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)ubj)}(h#const struct drm_display_mode *modeh](j )}(hjch]hconst}(hjQ*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM*ubj )}(h h]h }(hj^*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM*ubj )}(hj h]hstruct}(hjl*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM*ubj )}(h h]h }(hjy*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM*ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*modnameN classnameNj j )}j ]j)%c.drm_mipi_dbi_crtc_helper_mode_validasbuh1hhjM*ubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM*ubj9)}(hjOh]h*}(hj*hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjM*ubj )}(hmodeh]hmode}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjM*ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj)ubeh}(h]h ]h"]h$]h&]j j uh1jhjp)hhhj)hM=ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjl)hhhj)hM=ubah}(h]jg)ah ](j j eh"]h$]h&]j j )j huh1j hj)hM=hji)hhubj )}(hhh]h)}(hMIPI DBI mode-valid helperh]hMIPI DBI mode-valid helper}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM=hj*hhubah}(h]h ]h"]h$]h&]uh1j hji)hhhj)hM=ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j+j$ j+j% j& j' uh1j hhhjZhNhNubj) )}(hXJ**Parameters** ``struct drm_crtc *crtc`` The CRTC ``const struct drm_display_mode *mode`` The mode to test **Description** This function validates a given display mode against the MIPI DBI's hardware display. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.mode_valid ` callback.h](h)}(h**Parameters**h]j3 )}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj +ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMAhj +ubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` The CRTC h](j )}(h``struct drm_crtc *crtc``h]j )}(hj.+h]hstruct drm_crtc *crtc}(hj0+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,+ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM>hj(+ubj )}(hhh]h)}(hThe CRTCh]hThe CRTC}(hjG+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjC+hM>hjD+ubah}(h]h ]h"]h$]h&]uh1j hj(+ubeh}(h]h ]h"]h$]h&]uh1j{ hjC+hM>hj%+ubj| )}(h9``const struct drm_display_mode *mode`` The mode to test h](j )}(h'``const struct drm_display_mode *mode``h]j )}(hjg+h]h#const struct drm_display_mode *mode}(hji+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hje+ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM?hja+ubj )}(hhh]h)}(hThe mode to testh]hThe mode to test}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|+hM?hj}+ubah}(h]h ]h"]h$]h&]uh1j hja+ubeh}(h]h ]h"]h$]h&]uh1j{ hj|+hM?hj%+ubeh}(h]h ]h"]h$]h&]uh1jv hj +ubh)}(h**Description**h]j3 )}(hj+h]h Description}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj+ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMAhj +ubh)}(hThis function validates a given display mode against the MIPI DBI's hardware display. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.mode_valid ` callback.h](h}This function validates a given display mode against the MIPI DBI’s hardware display. Drivers can use this as their struct }(hj+hhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]j )}(hj+h]h drm_crtc_helper_funcs.mode_valid}(hj+hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM@hj+ubh callback.}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hM@hj +ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 3drm_mipi_dbi_plane_helper_atomic_check (C function)(c.drm_mipi_dbi_plane_helper_atomic_checkhNtauh1j hjZhhhNhNubj )}(hhh](j )}(heint drm_mipi_dbi_plane_helper_atomic_check (struct drm_plane *plane, struct drm_atomic_commit *state)h]j )}(hdint drm_mipi_dbi_plane_helper_atomic_check(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj ,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMOubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,hhhj,hMOubj )}(h&drm_mipi_dbi_plane_helper_atomic_checkh]j )}(h&drm_mipi_dbi_plane_helper_atomic_checkh]h&drm_mipi_dbi_plane_helper_atomic_check}(hj+,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj',ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj,hhhj,hMOubj)}(h:(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hjG,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC,ubj )}(h h]h }(hjT,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC,ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hje,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjb,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjg,modnameN classnameNj j )}j ]j%)}jj-,sb(c.drm_mipi_dbi_plane_helper_atomic_checkasbuh1hhjC,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC,ubj9)}(hjOh]h*}(hj,hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjC,ubj )}(hplaneh]hplane}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjC,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?,ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj,modnameN classnameNj j )}j ]j,(c.drm_mipi_dbi_plane_helper_atomic_checkasbuh1hhj,ubj )}(h h]h }(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubj9)}(hjOh]h*}(hj-hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj,ubj )}(hstateh]hstate}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj?,ubeh}(h]h ]h"]h$]h&]j j uh1jhj,hhhj,hMOubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj,hhhj,hMOubah}(h]j+ah ](j j eh"]h$]h&]j j )j huh1j hj,hMOhj+hhubj )}(hhh]h)}(hMIPI DBI plane check helperh]hMIPI DBI plane check helper}(hj:-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMOhj7-hhubah}(h]h ]h"]h$]h&]uh1j hj+hhhj,hMOubeh}(h]h ](j functioneh"]h$]h&]j" j j# jR-j$ jR-j% j& j' uh1j hhhjZhNhNubj) )}(hX**Parameters** ``struct drm_plane *plane`` Plane to check ``struct drm_atomic_commit *state`` Atomic state **Description** This function performs the default checks on the primary plane of a MIPI DBI device. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hj\-h]h Parameters}(hj^-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZ-ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMShjV-ubjw )}(hhh](j| )}(h+``struct drm_plane *plane`` Plane to check h](j )}(h``struct drm_plane *plane``h]j )}(hj{-h]hstruct drm_plane *plane}(hj}-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjy-ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMPhju-ubj )}(hhh]h)}(hPlane to checkh]hPlane to check}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMPhj-ubah}(h]h ]h"]h$]h&]uh1j hju-ubeh}(h]h ]h"]h$]h&]uh1j{ hj-hMPhjr-ubj| )}(h1``struct drm_atomic_commit *state`` Atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj-h]hstruct drm_atomic_commit *state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMQhj-ubj )}(hhh]h)}(h Atomic stateh]h Atomic state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMQhj-ubah}(h]h ]h"]h$]h&]uh1j hj-ubeh}(h]h ]h"]h$]h&]uh1j{ hj-hMQhjr-ubeh}(h]h ]h"]h$]h&]uh1jv hjV-ubh)}(h**Description**h]j3 )}(hj-h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMShjV-ubh)}(hThis function performs the default checks on the primary plane of a MIPI DBI device. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback.h](hzThis function performs the default checks on the primary plane of a MIPI DBI device. Drivers can use this as their struct }(hj.hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]j )}(hj.h]h"drm_crtc_helper_funcs.atomic_check}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj .ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMRhj.ubh callback.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,.hMRhjV-ubh)}(h **Return**h]j3 )}(hj9.h]hReturn}(hj;.hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7.ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMVhjV-ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjO.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMWhjV-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_mipi_dbi_plane_helper_atomic_update (C function))c.drm_mipi_dbi_plane_helper_atomic_updatehNtauh1j hjZhhhNhNubj )}(hhh](j )}(hgvoid drm_mipi_dbi_plane_helper_atomic_update (struct drm_plane *plane, struct drm_atomic_commit *state)h]j )}(hfvoid drm_mipi_dbi_plane_helper_atomic_update(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj~.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz.hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMrubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjz.hhhj.hMrubj )}(h'drm_mipi_dbi_plane_helper_atomic_updateh]j )}(h'drm_mipi_dbi_plane_helper_atomic_updateh]h'drm_mipi_dbi_plane_helper_atomic_update}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjz.hhhj.hMrubj)}(h:(struct drm_plane *plane, struct drm_atomic_commit *state)h](j)}(hstruct drm_plane *planeh](j )}(hj h]hstruct}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubh)}(hhh]j )}(h drm_planeh]h drm_plane}(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj.modnameN classnameNj j )}j ]j%)}jj.sb)c.drm_mipi_dbi_plane_helper_atomic_updateasbuh1hhj.ubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubj9)}(hjOh]h*}(hj/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj.ubj )}(hplaneh]hplane}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj-/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)/ubj )}(h h]h }(hj:/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)/ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hjK/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjH/ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjM/modnameN classnameNj j )}j ]j.)c.drm_mipi_dbi_plane_helper_atomic_updateasbuh1hhj)/ubj )}(h h]h }(hji/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)/ubj9)}(hjOh]h*}(hjw/hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj)/ubj )}(hstateh]hstate}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)/ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj.ubeh}(h]h ]h"]h$]h&]j j uh1jhjz.hhhj.hMrubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjv.hhhj.hMrubah}(h]jq.ah ](j j eh"]h$]h&]j j )j huh1j hj.hMrhjs.hhubj )}(hhh]h)}(hDisplay update helperh]hDisplay update helper}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMrhj/hhubah}(h]h ]h"]h$]h&]uh1j hjs.hhhj.hMrubeh}(h]h ](j functioneh"]h$]h&]j" j j# j/j$ j/j% j& j' uh1j hhhjZhNhNubj) )}(hX.**Parameters** ``struct drm_plane *plane`` Plane ``struct drm_atomic_commit *state`` Atomic state **Description** This function handles framebuffer flushing and vblank events. Drivers can use this as their struct :c:type:`drm_plane_helper_funcs.atomic_update ` callback.h](h)}(h**Parameters**h]j3 )}(hj/h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj/ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMvhj/ubjw )}(hhh](j| )}(h"``struct drm_plane *plane`` Plane h](j )}(h``struct drm_plane *plane``h]j )}(hj/h]hstruct drm_plane *plane}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMshj/ubj )}(hhh]h)}(hPlaneh]hPlane}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMshj0ubah}(h]h ]h"]h$]h&]uh1j hj/ubeh}(h]h ]h"]h$]h&]uh1j{ hj0hMshj/ubj| )}(h1``struct drm_atomic_commit *state`` Atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj(0h]hstruct drm_atomic_commit *state}(hj*0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&0ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMthj"0ubj )}(hhh]h)}(h Atomic stateh]h Atomic state}(hjA0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=0hMthj>0ubah}(h]h ]h"]h$]h&]uh1j hj"0ubeh}(h]h ]h"]h$]h&]uh1j{ hj=0hMthj/ubeh}(h]h ]h"]h$]h&]uh1jv hj/ubh)}(h**Description**h]j3 )}(hjc0h]h Description}(hje0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hja0ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMvhj/ubh)}(hThis function handles framebuffer flushing and vblank events. Drivers can use this as their struct :c:type:`drm_plane_helper_funcs.atomic_update ` callback.h](hcThis function handles framebuffer flushing and vblank events. Drivers can use this as their struct }(hjy0hhhNhNubh)}(hG:c:type:`drm_plane_helper_funcs.atomic_update `h]j )}(hj0h]h$drm_plane_helper_funcs.atomic_update}(hj0hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_plane_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMuhjy0ubh callback.}(hjy0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj0hMuhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2drm_mipi_dbi_crtc_helper_atomic_check (C function)'c.drm_mipi_dbi_crtc_helper_atomic_checkhNtauh1j hjZhhhNhNubj )}(hhh](j )}(hbint drm_mipi_dbi_crtc_helper_atomic_check (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(haint drm_mipi_dbi_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hinth]hint}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhj0hMubj )}(h%drm_mipi_dbi_crtc_helper_atomic_checkh]j )}(h%drm_mipi_dbi_crtc_helper_atomic_checkh]h%drm_mipi_dbi_crtc_helper_atomic_check}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj0hhhj0hMubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj&1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj(1modnameN classnameNj j )}j ]j%)}jj0sb'c.drm_mipi_dbi_crtc_helper_atomic_checkasbuh1hhj1ubj )}(h h]h }(hjF1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubj9)}(hjOh]h*}(hjT1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj1ubj )}(hcrtch]hcrtc}(hja1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hjz1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv1ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj1modnameN classnameNj j )}j ]jB1'c.drm_mipi_dbi_crtc_helper_atomic_checkasbuh1hhjv1ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv1ubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjv1ubj )}(hstateh]hstate}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjv1ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj1ubeh}(h]h ]h"]h$]h&]j j uh1jhj0hhhj0hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj0hhhj0hMubah}(h]j0ah ](j j eh"]h$]h&]j j )j huh1j hj0hMhj0hhubj )}(hhh]h)}(hMIPI DBI CRTC check helperh]hMIPI DBI CRTC check helper}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj1hhubah}(h]h ]h"]h$]h&]uh1j hj0hhhj0hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j2j$ j2j% j& j' uh1j hhhjZhNhNubj) )}(hX**Parameters** ``struct drm_crtc *crtc`` CRTC to check ``struct drm_atomic_commit *state`` Atomic state **Description** This function performs the default checks on the CRTC of a MIPI DBI device and ensures that the primary plane as been set up correctly. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j3 )}(hj2h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj2ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj2ubjw )}(hhh](j| )}(h(``struct drm_crtc *crtc`` CRTC to check h](j )}(h``struct drm_crtc *crtc``h]j )}(hj<2h]hstruct drm_crtc *crtc}(hj>2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:2ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj62ubj )}(hhh]h)}(h CRTC to checkh]h CRTC to check}(hjU2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQ2hMhjR2ubah}(h]h ]h"]h$]h&]uh1j hj62ubeh}(h]h ]h"]h$]h&]uh1j{ hjQ2hMhj32ubj| )}(h1``struct drm_atomic_commit *state`` Atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hju2h]hstruct drm_atomic_commit *state}(hjw2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjs2ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjo2ubj )}(hhh]h)}(h Atomic stateh]h Atomic state}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj2ubah}(h]h ]h"]h$]h&]uh1j hjo2ubeh}(h]h ]h"]h$]h&]uh1j{ hj2hMhj32ubeh}(h]h ]h"]h$]h&]uh1jv hj2ubh)}(h**Description**h]j3 )}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj2ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj2ubh)}(hThis function performs the default checks on the CRTC of a MIPI DBI device and ensures that the primary plane as been set up correctly. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_check ` callback.h](hThis function performs the default checks on the CRTC of a MIPI DBI device and ensures that the primary plane as been set up correctly. Drivers can use this as their struct }(hj2hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]j )}(hj2h]h"drm_crtc_helper_funcs.atomic_check}(hj2hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj2ubh callback.}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2hMhj2ubh)}(h **Return**h]j3 )}(hj2h]hReturn}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj2ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj2ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_mipi_dbi_crtc_helper_atomic_disable (C function))c.drm_mipi_dbi_crtc_helper_atomic_disablehNtauh1j hjZhhhNhNubj )}(hhh](j )}(hevoid drm_mipi_dbi_crtc_helper_atomic_disable (struct drm_crtc *crtc, struct drm_atomic_commit *state)h]j )}(hdvoid drm_mipi_dbi_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hvoidh]hvoid}(hj?3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;3hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hjN3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;3hhhjM3hMubj )}(h'drm_mipi_dbi_crtc_helper_atomic_disableh]j )}(h'drm_mipi_dbi_crtc_helper_atomic_disableh]h'drm_mipi_dbi_crtc_helper_atomic_disable}(hj`3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj;3hhhjM3hMubj)}(h8(struct drm_crtc *crtc, struct drm_atomic_commit *state)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hj|3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjx3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjx3ubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]j%)}jjb3sb)c.drm_mipi_dbi_crtc_helper_atomic_disableasbuh1hhjx3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjx3ubj9)}(hjOh]h*}(hj3hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjx3ubj )}(hcrtch]hcrtc}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjx3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjt3ubj)}(hstruct drm_atomic_commit *stateh](j )}(hj h]hstruct}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubh)}(hhh]j )}(hdrm_atomic_commith]hdrm_atomic_commit}(hj 4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj 4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj4modnameN classnameNj j )}j ]j3)c.drm_mipi_dbi_crtc_helper_atomic_disableasbuh1hhj3ubj )}(h h]h }(hj*4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubj9)}(hjOh]h*}(hj84hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj3ubj )}(hstateh]hstate}(hjE4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjt3ubeh}(h]h ]h"]h$]h&]j j uh1jhj;3hhhjM3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj73hhhjM3hMubah}(h]j23ah ](j j eh"]h$]h&]j j )j huh1j hjM3hMhj43hhubj )}(hhh]h)}(hMIPI DBI CRTC disable helperh]hMIPI DBI CRTC disable helper}(hjo4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjl4hhubah}(h]h ]h"]h$]h&]uh1j hj43hhhjM3hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j4j$ j4j% j& j' uh1j hhhjZhNhNubj) )}(hXo**Parameters** ``struct drm_crtc *crtc`` CRTC to disable ``struct drm_atomic_commit *state`` Atomic state **Description** This function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_disable ` callback.h](h)}(h**Parameters**h]j3 )}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj4ubjw )}(hhh](j| )}(h*``struct drm_crtc *crtc`` CRTC to disable h](j )}(h``struct drm_crtc *crtc``h]j )}(hj4h]hstruct drm_crtc *crtc}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj4ubj )}(hhh]h)}(hCRTC to disableh]hCRTC to disable}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj4ubah}(h]h ]h"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]uh1j{ hj4hMhj4ubj| )}(h1``struct drm_atomic_commit *state`` Atomic state h](j )}(h#``struct drm_atomic_commit *state``h]j )}(hj4h]hstruct drm_atomic_commit *state}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj4ubj )}(hhh]h)}(h Atomic stateh]h Atomic state}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj4ubah}(h]h ]h"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]uh1j{ hj4hMhj4ubeh}(h]h ]h"]h$]h&]uh1jv hj4ubh)}(h**Description**h]j3 )}(hj$5h]h Description}(hj&5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"5ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj4ubh)}(hThis function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their struct :c:type:`drm_crtc_helper_funcs.atomic_disable ` callback.h](hThis function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their struct }(hj:5hhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]j )}(hjD5h]h$drm_crtc_helper_funcs.atomic_disable}(hjF5hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjB5ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj:5ubh callback.}(hj:5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhja5hMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 4drm_mipi_dbi_connector_helper_get_modes (C function))c.drm_mipi_dbi_connector_helper_get_modeshNtauh1j hjZhhhNhNubj )}(hhh](j )}(hMint drm_mipi_dbi_connector_helper_get_modes (struct drm_connector *connector)h]j )}(hLint drm_mipi_dbi_connector_helper_get_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5hhhj5hMubj )}(h'drm_mipi_dbi_connector_helper_get_modesh]j )}(h'drm_mipi_dbi_connector_helper_get_modesh]h'drm_mipi_dbi_connector_helper_get_modes}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj5hhhj5hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j%)}jj5sb)c.drm_mipi_dbi_connector_helper_get_modesasbuh1hhj5ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj9)}(hjOh]h*}(hj6hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj5ubj )}(h connectorh]h connector}(hj"6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubah}(h]h ]h"]h$]h&]j j uh1jhj5hhhj5hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj5hhhj5hMubah}(h]j5ah ](j j eh"]h$]h&]j j )j huh1j hj5hMhj5hhubj )}(hhh]h)}(h.Duplicates the MIPI DBI mode for the connectorh]h.Duplicates the MIPI DBI mode for the connector}(hjL6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjI6hhubah}(h]h ]h"]h$]h&]uh1j hj5hhhj5hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jd6j$ jd6j% j& j' uh1j hhhjZhNhNubj) )}(hXe**Parameters** ``struct drm_connector *connector`` The connector **Description** Sets the connecto rmodes from the MIPI DBI mode. Drivers can use this as their :c:type:`drm_connector_helper_funcs->get_mods ` callback. See drm_gem_destroy_shadow_plane_state() for additional details. **Return** The number of created modes.h](h)}(h**Parameters**h]j3 )}(hjn6h]h Parameters}(hjp6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjl6ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjh6ubjw )}(hhh]j| )}(h2``struct drm_connector *connector`` The connector h](j )}(h#``struct drm_connector *connector``h]j )}(hj6h]hstruct drm_connector *connector}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj6ubj )}(hhh]h)}(h The connectorh]h The connector}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hMhj6ubah}(h]h ]h"]h$]h&]uh1jv hjh6ubh)}(h**Description**h]j3 )}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj6ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjh6ubh)}(hSets the connecto rmodes from the MIPI DBI mode. Drivers can use this as their :c:type:`drm_connector_helper_funcs->get_mods ` callback. See drm_gem_destroy_shadow_plane_state() for additional details.h](hOSets the connecto rmodes from the MIPI DBI mode. Drivers can use this as their }(hj6hhhNhNubh)}(hK:c:type:`drm_connector_helper_funcs->get_mods `h]j )}(hj6h]h$drm_connector_helper_funcs->get_mods}(hj6hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj6ubhK callback. See drm_gem_destroy_shadow_plane_state() for additional details.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7hMhjh6ubh)}(h **Return**h]j3 )}(hj7h]hReturn}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjh6ubh)}(hThe number of created modes.h]hThe number of created modes.}(hj(7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjh6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "drm_mipi_dbi_dev_init (C function)c.drm_mipi_dbi_dev_inithNtauh1j hjZhhhNhNubj )}(hhh](j )}(hint drm_mipi_dbi_dev_init (struct mipi_dbi_dev *dbidev, const struct drm_display_mode *mode, u32 format, unsigned int rotation, size_t tx_buf_size)h]j )}(hint drm_mipi_dbi_dev_init(struct mipi_dbi_dev *dbidev, const struct drm_display_mode *mode, u32 format, unsigned int rotation, size_t tx_buf_size)h](j)}(hinth]hint}(hjW7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS7hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hjf7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS7hhhje7hMubj )}(hdrm_mipi_dbi_dev_inith]j )}(hdrm_mipi_dbi_dev_inith]hdrm_mipi_dbi_dev_init}(hjx7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjt7ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjS7hhhje7hMubj)}(hy(struct mipi_dbi_dev *dbidev, const struct drm_display_mode *mode, u32 format, unsigned int rotation, size_t tx_buf_size)h](j)}(hstruct mipi_dbi_dev *dbidevh](j )}(hj h]hstruct}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubh)}(hhh]j )}(h mipi_dbi_devh]h mipi_dbi_dev}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j%)}jjz7sbc.drm_mipi_dbi_dev_initasbuh1hhj7ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubj9)}(hjOh]h*}(hj7hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj7ubj )}(hdbidevh]hdbidev}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7ubj)}(h#const struct drm_display_mode *modeh](j )}(hjch]hconst}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(hj h]hstruct}(hj!8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj.8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hj?8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjA8modnameN classnameNj j )}j ]j7c.drm_mipi_dbi_dev_initasbuh1hhj8ubj )}(h h]h }(hj]8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hjk8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(hmodeh]hmode}(hjx8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7ubj)}(h u32 formath](h)}(hhh]j )}(hu32h]hu32}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j7c.drm_mipi_dbi_dev_initasbuh1hhj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(hformath]hformat}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7ubj)}(hunsigned int rotationh](j)}(hunsignedh]hunsigned}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj)}(hinth]hint}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj )}(h h]h }(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(hrotationh]hrotation}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7ubj)}(hsize_t tx_buf_sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj-9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj/9modnameN classnameNj j )}j ]j7c.drm_mipi_dbi_dev_initasbuh1hhj&9ubj )}(h h]h }(hjK9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&9ubj )}(h tx_buf_sizeh]h tx_buf_size}(hjY9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj7ubeh}(h]h ]h"]h$]h&]j j uh1jhjS7hhhje7hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjO7hhhje7hMubah}(h]jJ7ah ](j j eh"]h$]h&]j j )j huh1j hje7hMhjL7hhubj )}(hhh]h)}(hMIPI DBI device initializationh]hMIPI DBI device initialization}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj9hhubah}(h]h ]h"]h$]h&]uh1j hjL7hhhje7hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j9j$ j9j% j& j' uh1j hhhjZhNhNubj) )}(hXr**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure to initialize ``const struct drm_display_mode *mode`` Hardware display mode ``u32 format`` Hardware color format (DRM_FORMAT\_\*). ``unsigned int rotation`` Initial rotation in degrees Counter Clock Wise ``size_t tx_buf_size`` Allocate a transmit buffer of at least this size. **Description** Initializes a MIPI-DBI device. The minimum size of the transmit buffer in **tx_buf_size** is optional. Pass 0 to allocate enough memory to transmit a single scanline of the display. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj9h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM hj9ubjw )}(hhh](j| )}(hH``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure to initialize h](j )}(h``struct mipi_dbi_dev *dbidev``h]j )}(hj9h]hstruct mipi_dbi_dev *dbidev}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj9ubj )}(hhh]h)}(h'MIPI DBI device structure to initializeh]h'MIPI DBI device structure to initialize}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubah}(h]h ]h"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]uh1j{ hj9hMhj9ubj| )}(h>``const struct drm_display_mode *mode`` Hardware display mode h](j )}(h'``const struct drm_display_mode *mode``h]j )}(hj9h]h#const struct drm_display_mode *mode}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj9ubj )}(hhh]h)}(hHardware display modeh]hHardware display mode}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj:ubah}(h]h ]h"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]uh1j{ hj:hMhj9ubj| )}(h7``u32 format`` Hardware color format (DRM_FORMAT\_\*). h](j )}(h``u32 format``h]j )}(hj6:h]h u32 format}(hj8:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4:ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0:ubj )}(hhh]h)}(h'Hardware color format (DRM_FORMAT\_\*).h]h'Hardware color format (DRM_FORMAT_*).}(hjO:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjK:hMhjL:ubah}(h]h ]h"]h$]h&]uh1j hj0:ubeh}(h]h ]h"]h$]h&]uh1j{ hjK:hMhj9ubj| )}(hI``unsigned int rotation`` Initial rotation in degrees Counter Clock Wise h](j )}(h``unsigned int rotation``h]j )}(hjo:h]hunsigned int rotation}(hjq:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjm:ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM hji:ubj )}(hhh]h)}(h.Initial rotation in degrees Counter Clock Wiseh]h.Initial rotation in degrees Counter Clock Wise}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hM hj:ubah}(h]h ]h"]h$]h&]uh1j hji:ubeh}(h]h ]h"]h$]h&]uh1j{ hj:hM hj9ubj| )}(hI``size_t tx_buf_size`` Allocate a transmit buffer of at least this size. h](j )}(h``size_t tx_buf_size``h]j )}(hj:h]hsize_t tx_buf_size}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM hj:ubj )}(hhh]h)}(h1Allocate a transmit buffer of at least this size.h]h1Allocate a transmit buffer of at least this size.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hM hj:ubah}(h]h ]h"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]uh1j{ hj:hM hj9ubeh}(h]h ]h"]h$]h&]uh1jv hj9ubh)}(h**Description**h]j3 )}(hj:h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM hj9ubh)}(hInitializes a MIPI-DBI device. The minimum size of the transmit buffer in **tx_buf_size** is optional. Pass 0 to allocate enough memory to transmit a single scanline of the display.h](hJInitializes a MIPI-DBI device. The minimum size of the transmit buffer in }(hj:hhhNhNubj3 )}(h**tx_buf_size**h]h tx_buf_size}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubh\ is optional. Pass 0 to allocate enough memory to transmit a single scanline of the display.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM hj9ubh)}(h **Return**h]j3 )}(hj;h]hReturn}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj;ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj9ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj2;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dbi_hw_reset (C function)c.mipi_dbi_hw_resethNtauh1j hjZhhhNhNubj )}(hhh](j )}(h-void mipi_dbi_hw_reset (struct mipi_dbi *dbi)h]j )}(h,void mipi_dbi_hw_reset(struct mipi_dbi *dbi)h](j)}(hvoidh]hvoid}(hja;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj];hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM:ubj )}(h h]h }(hjp;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj];hhhjo;hM:ubj )}(hmipi_dbi_hw_reseth]j )}(hmipi_dbi_hw_reseth]hmipi_dbi_hw_reset}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~;ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj];hhhjo;hM:ubj)}(h(struct mipi_dbi *dbi)h]j)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j%)}jj;sbc.mipi_dbi_hw_resetasbuh1hhj;ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hj;hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hdbih]hdbi}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubah}(h]h ]h"]h$]h&]j j uh1jhj];hhhjo;hM:ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjY;hhhjo;hM:ubah}(h]jT;ah ](j j eh"]h$]h&]j j )j huh1j hjo;hM:hjV;hhubj )}(hhh]h)}(hHardware reset of controllerh]hHardware reset of controller}(hj!<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM:hj<hhubah}(h]h ]h"]h$]h&]uh1j hjV;hhhjo;hM:ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j9<j$ j9<j% j& j' uh1j hhhjZhNhNubj) )}(h**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure **Description** Reset controller if the :c:type:`mipi_dbi->reset ` gpio is set.h](h)}(h**Parameters**h]j3 )}(hjC<h]h Parameters}(hjE<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjA<ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM>hj=<ubjw )}(hhh]j| )}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](j )}(h``struct mipi_dbi *dbi``h]j )}(hjb<h]hstruct mipi_dbi *dbi}(hjd<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`<ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM;hj\<ubj )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj{<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjw<hM;hjx<ubah}(h]h ]h"]h$]h&]uh1j hj\<ubeh}(h]h ]h"]h$]h&]uh1j{ hjw<hM;hjY<ubah}(h]h ]h"]h$]h&]uh1jv hj=<ubh)}(h**Description**h]j3 )}(hj<h]h Description}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM=hj=<ubh)}(hIReset controller if the :c:type:`mipi_dbi->reset ` gpio is set.h](hReset controller if the }(hj<hhhNhNubh)}(h$:c:type:`mipi_dbi->reset `h]j )}(hj<h]hmipi_dbi->reset}(hj<hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dbiuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM<hj<ubh gpio is set.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hM<hj=<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #mipi_dbi_display_is_on (C function)c.mipi_dbi_display_is_onhNtauh1j hjZhhhNhNubj )}(hhh](j )}(h2bool mipi_dbi_display_is_on (struct mipi_dbi *dbi)h]j )}(h1bool mipi_dbi_display_is_on(struct mipi_dbi *dbi)h](j)}(hjIh]hbool}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMLubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=hhhj=hMLubj )}(hmipi_dbi_display_is_onh]j )}(hmipi_dbi_display_is_onh]hmipi_dbi_display_is_on}(hj%=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj=hhhj=hMLubj)}(h(struct mipi_dbi *dbi)h]j)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hjA=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj==ubj )}(h h]h }(hjN=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj==ubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hj_=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetja=modnameN classnameNj j )}j ]j%)}jj'=sbc.mipi_dbi_display_is_onasbuh1hhj==ubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj==ubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj==ubj )}(hdbih]hdbi}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj==ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj9=ubah}(h]h ]h"]h$]h&]j j uh1jhj=hhhj=hMLubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhj=hMLubah}(h]j<ah ](j j eh"]h$]h&]j j )j huh1j hj=hMLhj<hhubj )}(hhh]h)}(hCheck if display is onh]hCheck if display is on}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMLhj=hhubah}(h]h ]h"]h$]h&]uh1j hj<hhhj=hMLubeh}(h]h ](j functioneh"]h$]h&]j" j j# j=j$ j=j% j& j' uh1j hhhjZhNhNubj) )}(hXx**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure **Description** This function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled. **Return** true if the display can be verified to be on, false otherwise.h](h)}(h**Parameters**h]j3 )}(hj=h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMPhj=ubjw )}(hhh]j| )}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](j )}(h``struct mipi_dbi *dbi``h]j )}(hj>h]hstruct mipi_dbi *dbi}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMMhj=ubj )}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMMhj>ubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMMhj=ubah}(h]h ]h"]h$]h&]uh1jv hj=ubh)}(h**Description**h]j3 )}(hj@>h]h Description}(hjB>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMOhj=ubh)}(hThis function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled.h]hThis function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled.}(hjV>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMNhj=ubh)}(h **Return**h]j3 )}(hjg>h]hReturn}(hji>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hje>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMShj=ubh)}(h>true if the display can be verified to be on, false otherwise.h]h>true if the display can be verified to be on, false otherwise.}(hj}>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMThj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #mipi_dbi_poweron_reset (C function)c.mipi_dbi_poweron_resethNtauh1j hjZhhhNhNubj )}(hhh](j )}(h8int mipi_dbi_poweron_reset (struct mipi_dbi_dev *dbidev)h]j )}(h7int mipi_dbi_poweron_reset(struct mipi_dbi_dev *dbidev)h](j)}(hinth]hint}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhj>hMubj )}(hmipi_dbi_poweron_reseth]j )}(hmipi_dbi_poweron_reseth]hmipi_dbi_poweron_reset}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>hhhj>hMubj)}(h(struct mipi_dbi_dev *dbidev)h]j)}(hstruct mipi_dbi_dev *dbidevh](j )}(hj h]hstruct}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj )}(h h]h }(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubh)}(hhh]j )}(h mipi_dbi_devh]h mipi_dbi_dev}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj ?modnameN classnameNj j )}j ]j%)}jj>sbc.mipi_dbi_poweron_resetasbuh1hhj>ubj )}(h h]h }(hj'?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubj9)}(hjOh]h*}(hj5?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj>ubj )}(hdbidevh]hdbidev}(hjB?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj>ubah}(h]h ]h"]h$]h&]j j uh1jhj>hhhj>hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj>hhhj>hMubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j hj>hMhj>hhubj )}(hhh]h)}(hMIPI DBI poweron and reseth]hMIPI DBI poweron and reset}(hjl?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhji?hhubah}(h]h ]h"]h$]h&]uh1j hj>hhhj>hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j?j$ j?j% j& j' uh1j hhhjZhNhNubj) )}(h**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure **Description** This function enables the regulator if used and does a hardware and software reset. **Return** Zero on success, or a negative error code.h](h)}(h**Parameters**h]j3 )}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubjw )}(hhh]j| )}(h:``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure h](j )}(h``struct mipi_dbi_dev *dbidev``h]j )}(hj?h]hstruct mipi_dbi_dev *dbidev}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubj )}(hhh]h)}(hMIPI DBI device structureh]hMIPI DBI device structure}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hMhj?ubah}(h]h ]h"]h$]h&]uh1jv hj?ubh)}(h**Description**h]j3 )}(hj?h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubh)}(hSThis function enables the regulator if used and does a hardware and software reset.h]hSThis function enables the regulator if used and does a hardware and software reset.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubh)}(h **Return**h]j3 )}(hj@h]hReturn}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj @ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubh)}(h*Zero on success, or a negative error code.h]h*Zero on success, or a negative error code.}(hj%@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /mipi_dbi_poweron_conditional_reset (C function)$c.mipi_dbi_poweron_conditional_resethNtauh1j hjZhhhNhNubj )}(hhh](j )}(hDint mipi_dbi_poweron_conditional_reset (struct mipi_dbi_dev *dbidev)h]j )}(hCint mipi_dbi_poweron_conditional_reset(struct mipi_dbi_dev *dbidev)h](j)}(hinth]hint}(hjT@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP@hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hjc@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjP@hhhjb@hMubj )}(h"mipi_dbi_poweron_conditional_reseth]j )}(h"mipi_dbi_poweron_conditional_reseth]h"mipi_dbi_poweron_conditional_reset}(hju@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjq@ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjP@hhhjb@hMubj)}(h(struct mipi_dbi_dev *dbidev)h]j)}(hstruct mipi_dbi_dev *dbidevh](j )}(hj h]hstruct}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubh)}(hhh]j )}(h mipi_dbi_devh]h mipi_dbi_dev}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]j%)}jjw@sb$c.mipi_dbi_poweron_conditional_resetasbuh1hhj@ubj )}(h h]h }(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubj9)}(hjOh]h*}(hj@hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj@ubj )}(hdbidevh]hdbidev}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj@ubah}(h]h ]h"]h$]h&]j j uh1jhjP@hhhjb@hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjL@hhhjb@hMubah}(h]jG@ah ](j j eh"]h$]h&]j j )j huh1j hjb@hMhjI@hhubj )}(hhh]h)}(h&MIPI DBI poweron and conditional reseth]h&MIPI DBI poweron and conditional reset}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjAhhubah}(h]h ]h"]h$]h&]uh1j hjI@hhhjb@hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j,Aj$ j,Aj% j& j' uh1j hhhjZhNhNubj) )}(hX**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure **Description** This function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed. **Return** Zero if the controller was reset, 1 if the display was already on, or a negative error code.h](h)}(h**Parameters**h]j3 )}(hj6Ah]h Parameters}(hj8AhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4Aubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0Aubjw )}(hhh]j| )}(h:``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure h](j )}(h``struct mipi_dbi_dev *dbidev``h]j )}(hjUAh]hstruct mipi_dbi_dev *dbidev}(hjWAhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSAubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjOAubj )}(hhh]h)}(hMIPI DBI device structureh]hMIPI DBI device structure}(hjnAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjAhMhjkAubah}(h]h ]h"]h$]h&]uh1j hjOAubeh}(h]h ]h"]h$]h&]uh1j{ hjjAhMhjLAubah}(h]h ]h"]h$]h&]uh1jv hj0Aubh)}(h**Description**h]j3 )}(hjAh]h Description}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjAubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0Aubh)}(hThis function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed.h]hThis function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0Aubh)}(h **Return**h]j3 )}(hjAh]hReturn}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjAubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0Aubh)}(h\Zero if the controller was reset, 1 if the display was already on, or a negative error code.h]h\Zero if the controller was reset, 1 if the display was already on, or a negative error code.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj0Aubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'mipi_dbi_spi_cmd_max_speed (C function)c.mipi_dbi_spi_cmd_max_speedhNtauh1j hjZhhhNhNubj )}(hhh](j )}(hCu32 mipi_dbi_spi_cmd_max_speed (struct spi_device *spi, size_t len)h]j )}(hBu32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len)h](h)}(hhh]j )}(hu32h]hu32}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]j%)}jmipi_dbi_spi_cmd_max_speedsbc.mipi_dbi_spi_cmd_max_speedasbuh1hhjAhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj!BhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAhhhj BhMubj )}(hmipi_dbi_spi_cmd_max_speedh]j )}(hjBh]hmipi_dbi_spi_cmd_max_speed}(hj3BhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/Bubah}(h]h ](j j eh"]h$]h&]j j uh1j hjAhhhj BhMubj)}(h$(struct spi_device *spi, size_t len)h](j)}(hstruct spi_device *spih](j )}(hj h]hstruct}(hjNBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJBubj )}(h h]h }(hj[BhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJBubh)}(hhh]j )}(h spi_deviceh]h spi_device}(hjlBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnBmodnameN classnameNj j )}j ]jBc.mipi_dbi_spi_cmd_max_speedasbuh1hhjJBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJBubj9)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJBubj )}(hspih]hspi}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFBubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]jBc.mipi_dbi_spi_cmd_max_speedasbuh1hhjBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubj )}(hlenh]hlen}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFBubeh}(h]h ]h"]h$]h&]j j uh1jhjAhhhj BhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjAhhhj BhMubah}(h]jAah ](j j eh"]h$]h&]j j )j huh1j hj BhMhjAhhubj )}(hhh]h)}(hget the maximum SPI bus speedh]hget the maximum SPI bus speed}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjChhubah}(h]h ]h"]h$]h&]uh1j hjAhhhj BhMubeh}(h]h ](j functione.h"]h$]h&]j" j j# j/Cj$ j/Cj% j& j' uh1j hhhjZhNhNubj) )}(hXU**Parameters** ``struct spi_device *spi`` SPI device ``size_t len`` The transfer buffer length. **Description** Many controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.h](h)}(h**Parameters**h]j3 )}(hj9Ch]h Parameters}(hj;ChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7Cubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj3Cubjw )}(hhh](j| )}(h&``struct spi_device *spi`` SPI device h](j )}(h``struct spi_device *spi``h]j )}(hjXCh]hstruct spi_device *spi}(hjZChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVCubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjRCubj )}(hhh]h)}(h SPI deviceh]h SPI device}(hjqChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmChMhjnCubah}(h]h ]h"]h$]h&]uh1j hjRCubeh}(h]h ]h"]h$]h&]uh1j{ hjmChMhjOCubj| )}(h+``size_t len`` The transfer buffer length. h](j )}(h``size_t len``h]j )}(hjCh]h size_t len}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjCubj )}(hhh]h)}(hThe transfer buffer length.h]hThe transfer buffer length.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjCubah}(h]h ]h"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]uh1j{ hjChMhjOCubeh}(h]h ]h"]h$]h&]uh1jv hj3Cubh)}(h**Description**h]j3 )}(hjCh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj3Cubh)}(hMany controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.h]hMany controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj3Cubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dbi_spi_init (C function)c.mipi_dbi_spi_inithNtauh1j hjZhhhNhNubj )}(hhh](j )}(hZint mipi_dbi_spi_init (struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h]j )}(hYint mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h](j)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Dhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMLubj )}(h h]h }(hj DhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj DhhhjDhMLubj )}(hmipi_dbi_spi_inith]j )}(hmipi_dbi_spi_inith]hmipi_dbi_spi_init}(hj2DhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.Dubah}(h]h ](j j eh"]h$]h&]j j uh1j hj DhhhjDhMLubj)}(hD(struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h](j)}(hstruct spi_device *spih](j )}(hj h]hstruct}(hjNDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJDubj )}(h h]h }(hj[DhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJDubh)}(hhh]j )}(h spi_deviceh]h spi_device}(hjlDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjnDmodnameN classnameNj j )}j ]j%)}jj4Dsbc.mipi_dbi_spi_initasbuh1hhjJDubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJDubj9)}(hjOh]h*}(hjDhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJDubj )}(hspih]hspi}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFDubj)}(hstruct mipi_dbi *dbih](j )}(hj h]hstruct}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubh)}(hhh]j )}(hmipi_dbih]hmipi_dbi}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]jDc.mipi_dbi_spi_initasbuh1hhjDubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubj9)}(hjOh]h*}(hj EhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjDubj )}(hdbih]hdbi}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFDubj)}(hstruct gpio_desc *dch](j )}(hj h]hstruct}(hj0EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,Eubj )}(h h]h }(hj=EhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,Eubh)}(hhh]j )}(h gpio_desch]h gpio_desc}(hjNEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKEubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjPEmodnameN classnameNj j )}j ]jDc.mipi_dbi_spi_initasbuh1hhj,Eubj )}(h h]h }(hjlEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,Eubj9)}(hjOh]h*}(hjzEhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj,Eubj )}(hdch]hdc}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj,Eubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjFDubeh}(h]h ]h"]h$]h&]j j uh1jhj DhhhjDhMLubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj DhhhjDhMLubah}(h]jDah ](j j eh"]h$]h&]j j )j huh1j hjDhMLhjDhhubj )}(hhh]h)}(h!Initialize MIPI DBI SPI interfaceh]h!Initialize MIPI DBI SPI interface}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMLhjEhhubah}(h]h ]h"]h$]h&]uh1j hjDhhhjDhMLubeh}(h]h ](j functioneh"]h$]h&]j" j j# jEj$ jEj% j& j' uh1j hhhjZhNhNubj) )}(hX**Parameters** ``struct spi_device *spi`` SPI device ``struct mipi_dbi *dbi`` MIPI DBI structure to initialize ``struct gpio_desc *dc`` D/C gpio (optional) **Description** This function sets :c:type:`mipi_dbi->command `, enables :c:type:`mipi_dbi->read_commands ` for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init. If **dc** is set, a Type C Option 3 interface is assumed, if not Type C Option 1. If the command is ``MIPI_DCS_WRITE_MEMORY_START`` and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (``DRM_FORMAT_BIG_ENDIAN`` is not supported). This is how endianness is handled: Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is byteswapped before transfer. Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be sent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. This handling is optimised for ``DRM_FORMAT_RGB565`` framebuffers. If the interface is Option 1 and the SPI controller doesn't support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjEh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjEubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMPhjEubjw )}(hhh](j| )}(h&``struct spi_device *spi`` SPI device h](j )}(h``struct spi_device *spi``h]j )}(hjEh]hstruct spi_device *spi}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMMhjEubj )}(hhh]h)}(h SPI deviceh]h SPI device}(hj FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMMhjFubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hjFhMMhjEubj| )}(h:``struct mipi_dbi *dbi`` MIPI DBI structure to initialize h](j )}(h``struct mipi_dbi *dbi``h]j )}(hj+Fh]hstruct mipi_dbi *dbi}(hj-FhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)Fubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMNhj%Fubj )}(hhh]h)}(h MIPI DBI structure to initializeh]h MIPI DBI structure to initialize}(hjDFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@FhMNhjAFubah}(h]h ]h"]h$]h&]uh1j hj%Fubeh}(h]h ]h"]h$]h&]uh1j{ hj@FhMNhjEubj| )}(h-``struct gpio_desc *dc`` D/C gpio (optional) h](j )}(h``struct gpio_desc *dc``h]j )}(hjdFh]hstruct gpio_desc *dc}(hjfFhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbFubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMOhj^Fubj )}(hhh]h)}(hD/C gpio (optional)h]hD/C gpio (optional)}(hj}FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyFhMOhjzFubah}(h]h ]h"]h$]h&]uh1j hj^Fubeh}(h]h ]h"]h$]h&]uh1j{ hjyFhMOhjEubeh}(h]h ]h"]h$]h&]uh1jv hjEubh)}(h**Description**h]j3 )}(hjFh]h Description}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjFubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMQhjEubh)}(hThis function sets :c:type:`mipi_dbi->command `, enables :c:type:`mipi_dbi->read_commands ` for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init.h](hThis function sets }(hjFhhhNhNubh)}(h&:c:type:`mipi_dbi->command `h]j )}(hjFh]hmipi_dbi->command}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dbiuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMPhjFubh , enables }(hjFhhhNhNubh)}(h,:c:type:`mipi_dbi->read_commands `h]j )}(hjFh]hmipi_dbi->read_commands}(hjFhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j mipi_dbiuh1hhjFhMPhjFubho for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhMPhjEubh)}(hQIf **dc** is set, a Type C Option 3 interface is assumed, if not Type C Option 1.h](hIf }(hj GhhhNhNubj3 )}(h**dc**h]hdc}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj GubhH is set, a Type C Option 3 interface is assumed, if not Type C Option 1.}(hj GhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMThjEubh)}(hXIf the command is ``MIPI_DCS_WRITE_MEMORY_START`` and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (``DRM_FORMAT_BIG_ENDIAN`` is not supported).h](hIf the command is }(hj+GhhhNhNubj )}(h``MIPI_DCS_WRITE_MEMORY_START``h]hMIPI_DCS_WRITE_MEMORY_START}(hj3GhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+Gubh and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (}(hj+GhhhNhNubj )}(h``DRM_FORMAT_BIG_ENDIAN``h]hDRM_FORMAT_BIG_ENDIAN}(hjEGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+Gubh is not supported).}(hj+GhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMWhjEubh)}(h"This is how endianness is handled:h]h"This is how endianness is handled:}(hj^GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM[hjEubjw )}(hhh](j| )}(hzOption 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is byteswapped before transfer. h](j )}(h\Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer ish]h\Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is}(hjtGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chM^hjpGubj )}(hhh]h)}(hbyteswapped before transfer.h]hbyteswapped before transfer.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM^hjGubah}(h]h ]h"]h$]h&]uh1j hjpGubeh}(h]h ]h"]h$]h&]uh1j{ hjGhM^hjmGubj| )}(hOption 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be sent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. h](j )}(h[Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can beh]h[Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMbhjGubj )}(hhh]h)}(hsent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw.h]hsent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMahjGubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hjGhMbhjmGubeh}(h]h ]h"]h$]h&]uh1jv hjEubh)}(hBThis handling is optimised for ``DRM_FORMAT_RGB565`` framebuffers.h](hThis handling is optimised for }(hjGhhhNhNubj )}(h``DRM_FORMAT_RGB565``h]hDRM_FORMAT_RGB565}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubh framebuffers.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMdhjEubh)}(hIf the interface is Option 1 and the SPI controller doesn't support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary.h]hIf the interface is Option 1 and the SPI controller doesn’t support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMfhjEubh)}(h **Return**h]j3 )}(hj Hh]hReturn}(hj HhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMihjEubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMjhjEubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "mipi_dbi_spi_transfer (C function)c.mipi_dbi_spi_transferhNtauh1j hjZhhhNhNubj )}(hhh](j )}(heint mipi_dbi_spi_transfer (struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h]j )}(hdint mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h](j)}(hinth]hint}(hjNHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJHhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMubj )}(h h]h }(hj]HhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJHhhhj\HhMubj )}(hmipi_dbi_spi_transferh]j )}(hmipi_dbi_spi_transferh]hmipi_dbi_spi_transfer}(hjoHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkHubah}(h]h ](j j eh"]h$]h&]j j uh1j hjJHhhhj\HhMubj)}(hK(struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h](j)}(hstruct spi_device *spih](j )}(hj h]hstruct}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(h spi_deviceh]h spi_device}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j%)}jjqHsbc.mipi_dbi_spi_transferasbuh1hhjHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj9)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjHubj )}(hspih]hspi}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(h u32 speed_hzh](h)}(hhh]j )}(hu32h]hu32}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jHc.mipi_dbi_spi_transferasbuh1hhjHubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(hspeed_hzh]hspeed_hz}(hj,IhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(hu8 bpwh](h)}(hhh]j )}(hu8h]hu8}(hjHIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjEIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJImodnameN classnameNj j )}j ]jHc.mipi_dbi_spi_transferasbuh1hhjAIubj )}(h h]h }(hjfIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAIubj )}(hbpwh]hbpw}(hjtIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(hconst void *bufh](j )}(hjch]hconst}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj)}(hvoidh]hvoid}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj )}(h h]h }(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj9)}(hjOh]h*}(hjIhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjIubj )}(hbufh]hbuf}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjIhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]jHc.mipi_dbi_spi_transferasbuh1hhjIubj )}(h h]h }(hj JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubj )}(hlenh]hlen}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjIubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubeh}(h]h ]h"]h$]h&]j j uh1jhjJHhhhj\HhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjFHhhhj\HhMubah}(h]jAHah ](j j eh"]h$]h&]j j )j huh1j hj\HhMhjCHhhubj )}(hhh]h)}(hSPI transfer helperh]hSPI transfer helper}(hjCJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj@Jhhubah}(h]h ]h"]h$]h&]uh1j hjCHhhhj\HhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j[Jj$ j[Jj% j& j' uh1j hhhjZhNhNubj) )}(hX**Parameters** ``struct spi_device *spi`` SPI device ``u32 speed_hz`` Override speed (optional) ``u8 bpw`` Bits per word ``const void *buf`` Buffer to transfer ``size_t len`` Buffer length **Description** This SPI transfer helper breaks up the transfer of **buf** into chunks which the SPI controller driver can handle. The SPI bus must be locked when calling this. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjeJh]h Parameters}(hjgJhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjcJubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj_Jubjw )}(hhh](j| )}(h&``struct spi_device *spi`` SPI device h](j )}(h``struct spi_device *spi``h]j )}(hjJh]hstruct spi_device *spi}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj~Jubj )}(hhh]h)}(h SPI deviceh]h SPI device}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjJubah}(h]h ]h"]h$]h&]uh1j hj~Jubeh}(h]h ]h"]h$]h&]uh1j{ hjJhMhj{Jubj| )}(h+``u32 speed_hz`` Override speed (optional) h](j )}(h``u32 speed_hz``h]j )}(hjJh]h u32 speed_hz}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjJubj )}(hhh]h)}(hOverride speed (optional)h]hOverride speed (optional)}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjJubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hjJhMhj{Jubj| )}(h``u8 bpw`` Bits per word h](j )}(h ``u8 bpw``h]j )}(hjJh]hu8 bpw}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjJubj )}(hhh]h)}(h Bits per wordh]h Bits per word}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj KhMhj Kubah}(h]h ]h"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]uh1j{ hj KhMhj{Jubj| )}(h'``const void *buf`` Buffer to transfer h](j )}(h``const void *buf``h]j )}(hj/Kh]hconst void *buf}(hj1KhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-Kubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj)Kubj )}(hhh]h)}(hBuffer to transferh]hBuffer to transfer}(hjHKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDKhMhjEKubah}(h]h ]h"]h$]h&]uh1j hj)Kubeh}(h]h ]h"]h$]h&]uh1j{ hjDKhMhj{Jubj| )}(h``size_t len`` Buffer length h](j )}(h``size_t len``h]j )}(hjhKh]h size_t len}(hjjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfKubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhjbKubj )}(hhh]h)}(h Buffer lengthh]h Buffer length}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}KhMhj~Kubah}(h]h ]h"]h$]h&]uh1j hjbKubeh}(h]h ]h"]h$]h&]uh1j{ hj}KhMhj{Jubeh}(h]h ]h"]h$]h&]uh1jv hj_Jubh)}(h**Description**h]j3 )}(hjKh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj_Jubh)}(hThis SPI transfer helper breaks up the transfer of **buf** into chunks which the SPI controller driver can handle. The SPI bus must be locked when calling this.h](h3This SPI transfer helper breaks up the transfer of }(hjKhhhNhNubj3 )}(h**buf**h]hbuf}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjKubhf into chunks which the SPI controller driver can handle. The SPI bus must be locked when calling this.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj_Jubh)}(h **Return**h]j3 )}(hjKh]hReturn}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjKubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj_Jubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMhj_Jubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j "mipi_dbi_debugfs_init (C function)c.mipi_dbi_debugfs_inithNtauh1j hjZhhhNhNubj )}(hhh](j )}(h4void mipi_dbi_debugfs_init (struct drm_minor *minor)h]j )}(h3void mipi_dbi_debugfs_init(struct drm_minor *minor)h](j)}(hvoidh]hvoid}(hj!LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMRubj )}(h h]h }(hj0LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjLhhhj/LhMRubj )}(hmipi_dbi_debugfs_inith]j )}(hmipi_dbi_debugfs_inith]hmipi_dbi_debugfs_init}(hjBLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>Lubah}(h]h ](j j eh"]h$]h&]j j uh1j hjLhhhj/LhMRubj)}(h(struct drm_minor *minor)h]j)}(hstruct drm_minor *minorh](j )}(hj h]hstruct}(hj^LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZLubj )}(h h]h }(hjkLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZLubh)}(hhh]j )}(h drm_minorh]h drm_minor}(hj|LhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjyLubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj~LmodnameN classnameNj j )}j ]j%)}jjDLsbc.mipi_dbi_debugfs_initasbuh1hhjZLubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZLubj9)}(hjOh]h*}(hjLhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjZLubj )}(hminorh]hminor}(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZLubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjVLubah}(h]h ]h"]h$]h&]j j uh1jhjLhhhj/LhMRubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhj/LhMRubah}(h]jLah ](j j eh"]h$]h&]j j )j huh1j hj/LhMRhjLhhubj )}(hhh]h)}(hCreate debugfs entriesh]hCreate debugfs entries}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMRhjLhhubah}(h]h ]h"]h$]h&]uh1j hjLhhhj/LhMRubeh}(h]h ](j functioneh"]h$]h&]j" j j# jLj$ jLj% j& j' uh1j hhhjZhNhNubj) )}(hX**Parameters** ``struct drm_minor *minor`` DRM minor **Description** This function creates a 'command' debugfs file for sending commands to the controller or getting the read command values. Drivers can use this as their :c:type:`drm_driver->debugfs_init ` callback.h](h)}(h**Parameters**h]j3 )}(hjMh]h Parameters}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMVhjLubjw )}(hhh]j| )}(h&``struct drm_minor *minor`` DRM minor h](j )}(h``struct drm_minor *minor``h]j )}(hj"Mh]hstruct drm_minor *minor}(hj$MhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Mubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMShjMubj )}(hhh]h)}(h DRM minorh]h DRM minor}(hj;MhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7MhMShj8Mubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hj7MhMShjMubah}(h]h ]h"]h$]h&]uh1jv hjLubh)}(h**Description**h]j3 )}(hj]Mh]h Description}(hj_MhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[Mubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMUhjLubh)}(hThis function creates a 'command' debugfs file for sending commands to the controller or getting the read command values. Drivers can use this as their :c:type:`drm_driver->debugfs_init ` callback.h](hThis function creates a ‘command’ debugfs file for sending commands to the controller or getting the read command values. Drivers can use this as their }(hjsMhhhNhNubh)}(h/:c:type:`drm_driver->debugfs_init `h]j )}(hj}Mh]hdrm_driver->debugfs_init}(hjMhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj{Mubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_driveruh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:344: ./drivers/gpu/drm/drm_mipi_dbi.chMThjsMubh callback.}(hjsMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjMhMThjLubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjZhhhNhNubeh}(h]jfah ]h"]#mipi dbi helper functions referenceah$]h&]uh1hhhhhhhhMPubh)}(hhh](h)}(h#MIPI DSI Helper Functions Referenceh]h#MIPI DSI Helper Functions Reference}(hjMhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjMhhhhhM\ubh)}(hXThese functions contain some common logic and helpers to deal with MIPI DSI peripherals.h]hXThese functions contain some common logic and helpers to deal with MIPI DSI peripherals.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chK-hjMhhubh)}(hoHelpers are provided for a number of standard MIPI DSI command as well as a subset of the MIPI DCS command set.h]hoHelpers are provided for a number of standard MIPI DSI command as well as a subset of the MIPI DCS command set.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:350: ./drivers/gpu/drm/drm_mipi_dsi.chK0hjMhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_msg (C struct)c.mipi_dsi_msghNtauh1j hjMhhhNhNubj )}(hhh](j )}(h mipi_dsi_msgh]j )}(hstruct mipi_dsi_msgh](j )}(hj h]hstruct}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKubj )}(h h]h }(hj NhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjMhhhjNhKubj )}(h mipi_dsi_msgh]j )}(hjMh]h mipi_dsi_msg}(hjNhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjNubah}(h]h ](j j eh"]h$]h&]j j uh1j hjMhhhjNhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjMhhhjNhKubah}(h]jMah ](j j eh"]h$]h&]j j )j huh1j hjNhKhjMhhubj )}(hhh]h)}(hread/write DSI bufferh]hread/write DSI buffer}(hj=NhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhj:Nhhubah}(h]h ]h"]h$]h&]uh1j hjMhhhjNhKubeh}(h]h ](j structeh"]h$]h&]j" j j# jUNj$ jUNj% j& j' uh1j hhhjMhNhNubj) )}(hX**Definition**:: struct mipi_dsi_msg { u8 channel; u8 type; u16 flags; size_t tx_len; const void *tx_buf; size_t rx_len; void *rx_buf; }; **Members** ``channel`` virtual channel id ``type`` payload data type ``flags`` flags controlling this message transmission ``tx_len`` length of **tx_buf** ``tx_buf`` data to be written ``rx_len`` length of **rx_buf** ``rx_buf`` data to be read, or NULLh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjaNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj]Nubh:}(hj]NhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjYNubjN )}(hstruct mipi_dsi_msg { u8 channel; u8 type; u16 flags; size_t tx_len; const void *tx_buf; size_t rx_len; void *rx_buf; };h]hstruct mipi_dsi_msg { u8 channel; u8 type; u16 flags; size_t tx_len; const void *tx_buf; size_t rx_len; void *rx_buf; };}hjzNsbah}(h]h ]h"]h$]h&]j j uh1jM h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjYNubh)}(h **Members**h]j3 )}(hjNh]hMembers}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK)hjYNubjw )}(hhh](j| )}(h``channel`` virtual channel id h](j )}(h ``channel``h]j )}(hjNh]hchannel}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjNubj )}(hhh]h)}(hvirtual channel idh]hvirtual channel id}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKhjNubah}(h]h ]h"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]uh1j{ hjNhKhjNubj| )}(h``type`` payload data type h](j )}(h``type``h]j )}(hjNh]htype}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjNubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjNubj )}(hhh]h)}(hpayload data typeh]hpayload data type}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKhjNubah}(h]h ]h"]h$]h&]uh1j hjNubeh}(h]h ]h"]h$]h&]uh1j{ hjNhKhjNubj| )}(h6``flags`` flags controlling this message transmission h](j )}(h ``flags``h]j )}(hjOh]hflags}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjOubj )}(hhh]h)}(h+flags controlling this message transmissionh]h+flags controlling this message transmission}(hj5OhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1OhKhj2Oubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hj1OhKhjNubj| )}(h ``tx_len`` length of **tx_buf** h](j )}(h ``tx_len``h]j )}(hjUOh]htx_len}(hjWOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSOubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjOOubj )}(hhh]h)}(hlength of **tx_buf**h](h length of }(hjnOhhhNhNubj3 )}(h **tx_buf**h]htx_buf}(hjvOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnOubeh}(h]h ]h"]h$]h&]uh1hhjjOhKhjkOubah}(h]h ]h"]h$]h&]uh1j hjOOubeh}(h]h ]h"]h$]h&]uh1j{ hjjOhKhjNubj| )}(h``tx_buf`` data to be written h](j )}(h ``tx_buf``h]j )}(hjOh]htx_buf}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjOubj )}(hhh]h)}(hdata to be writtenh]hdata to be written}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKhjOubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjOhKhjNubj| )}(h ``rx_len`` length of **rx_buf** h](j )}(h ``rx_len``h]j )}(hjOh]hrx_len}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjOubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK hjOubj )}(hhh]h)}(hlength of **rx_buf**h](h length of }(hjOhhhNhNubj3 )}(h **rx_buf**h]hrx_buf}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjOubeh}(h]h ]h"]h$]h&]uh1hhjOhK hjOubah}(h]h ]h"]h$]h&]uh1j hjOubeh}(h]h ]h"]h$]h&]uh1j{ hjOhK hjNubj| )}(h#``rx_buf`` data to be read, or NULLh](j )}(h ``rx_buf``h]j )}(hjPh]hrx_buf}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjPubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK hjPubj )}(hhh]h)}(hdata to be read, or NULLh]hdata to be read, or NULL}(hj5PhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK!hj2Pubah}(h]h ]h"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]uh1j{ hj1PhK hjNubeh}(h]h ]h"]h$]h&]uh1jv hjYNubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_packet (C struct)c.mipi_dsi_packethNtauh1j hjMhhhNhNubj )}(hhh](j )}(hmipi_dsi_packeth]j )}(hstruct mipi_dsi_packeth](j )}(hj h]hstruct}(hjvPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrPhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK'ubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrPhhhjPhK'ubj )}(hmipi_dsi_packeth]j )}(hjpPh]hmipi_dsi_packet}(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ](j j eh"]h$]h&]j j uh1j hjrPhhhjPhK'ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjnPhhhjPhK'ubah}(h]jiPah ](j j eh"]h$]h&]j j )j huh1j hjPhK'hjkPhhubj )}(hhh]h)}(h/represents a MIPI DSI packet in protocol formath]h/represents a MIPI DSI packet in protocol format}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK2hjPhhubah}(h]h ]h"]h$]h&]uh1j hjkPhhhjPhK'ubeh}(h]h ](j structeh"]h$]h&]j" j j# jPj$ jPj% j& j' uh1j hhhjMhNhNubj) )}(hX**Definition**:: struct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; }; **Members** ``size`` size (in bytes) of the packet ``header`` the four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC) ``payload_length`` number of bytes in the payload ``payload`` a pointer to a buffer containing the payload, if anyh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjPubh:}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK6hjPubjN )}(hpstruct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; };h]hpstruct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; };}hjPsbah}(h]h ]h"]h$]h&]j j uh1jM h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK8hjPubh)}(h **Members**h]j3 )}(hjQh]hMembers}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK?hjPubjw )}(hhh](j| )}(h'``size`` size (in bytes) of the packet h](j )}(h``size``h]j )}(hj%Qh]hsize}(hj'QhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#Qubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK4hjQubj )}(hhh]h)}(hsize (in bytes) of the packeth]hsize (in bytes) of the packet}(hj>QhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:QhK4hj;Qubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hj:QhK4hjQubj| )}(h```header`` the four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC) h](j )}(h ``header``h]j )}(hj^Qh]hheader}(hj`QhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\Qubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK6hjXQubj )}(hhh]h)}(hTthe four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC)h]hTthe four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC)}(hjwQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK5hjtQubah}(h]h ]h"]h$]h&]uh1j hjXQubeh}(h]h ]h"]h$]h&]uh1j{ hjsQhK6hjQubj| )}(h2``payload_length`` number of bytes in the payload h](j )}(h``payload_length``h]j )}(hjQh]hpayload_length}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK7hjQubj )}(hhh]h)}(hnumber of bytes in the payloadh]hnumber of bytes in the payload}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhK7hjQubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjQhK7hjQubj| )}(h@``payload`` a pointer to a buffer containing the payload, if anyh](j )}(h ``payload``h]j )}(hjQh]hpayload}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK7hjQubj )}(hhh]h)}(h4a pointer to a buffer containing the payload, if anyh]h4a pointer to a buffer containing the payload, if any}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK8hjQubah}(h]h ]h"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]uh1j{ hjQhK7hjQubeh}(h]h ]h"]h$]h&]uh1jv hjPubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_host_ops (C struct)c.mipi_dsi_host_opshNtauh1j hjMhhhNhNubj )}(hhh](j )}(hmipi_dsi_host_opsh]j )}(hstruct mipi_dsi_host_opsh](j )}(hj h]hstruct}(hj+RhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'Rhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK>ubj )}(h h]h }(hj9RhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'Rhhhj8RhK>ubj )}(hmipi_dsi_host_opsh]j )}(hj%Rh]hmipi_dsi_host_ops}(hjKRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGRubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'Rhhhj8RhK>ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#Rhhhj8RhK>ubah}(h]jRah ](j j eh"]h$]h&]j j )j huh1j hj8RhK>hj Rhhubj )}(hhh]h)}(hDSI bus operationsh]hDSI bus operations}(hjmRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKDhjjRhhubah}(h]h ]h"]h$]h&]uh1j hj Rhhhj8RhK>ubeh}(h]h ](j structeh"]h$]h&]j" j j# jRj$ jRj% j& j' uh1j hhhjMhNhNubj) )}(hX**Definition**:: struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); }; **Members** ``attach`` attach DSI device to DSI host ``detach`` detach DSI device from DSI host ``transfer`` transmit a DSI packeth](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubh:}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKHhjRubjN )}(hX struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); };h]hX struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); };}hjRsbah}(h]h ]h"]h$]h&]j j uh1jM h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKJhjRubh)}(h **Members**h]j3 )}(hjRh]hMembers}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjRubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKPhjRubjw )}(hhh](j| )}(h)``attach`` attach DSI device to DSI host h](j )}(h ``attach``h]j )}(hjRh]hattach}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKFhjRubj )}(hhh]h)}(hattach DSI device to DSI hosth]hattach DSI device to DSI host}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhKFhjRubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjRhKFhjRubj| )}(h+``detach`` detach DSI device from DSI host h](j )}(h ``detach``h]j )}(hjSh]hdetach}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjSubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKGhj Subj )}(hhh]h)}(hdetach DSI device from DSI hosth]hdetach DSI device from DSI host}(hj,ShhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(ShKGhj)Subah}(h]h ]h"]h$]h&]uh1j hj Subeh}(h]h ]h"]h$]h&]uh1j{ hj(ShKGhjRubj| )}(h"``transfer`` transmit a DSI packeth](j )}(h ``transfer``h]j )}(hjLSh]htransfer}(hjNShhhNhNubah}(h]h ]h"]h$]h&]uh1j hjJSubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKGhjFSubj )}(hhh]h)}(htransmit a DSI packeth]htransmit a DSI packet}(hjeShhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKHhjbSubah}(h]h ]h"]h$]h&]uh1j hjFSubeh}(h]h ]h"]h$]h&]uh1j{ hjaShKGhjRubeh}(h]h ]h"]h$]h&]uh1jv hjRubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubh)}(h**Description**h]j3 )}(hjSh]h Description}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjSubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKKhjMhhubh)}(hXDSI packets transmitted by .transfer() are passed in as mipi_dsi_msg structures. This structure contains information about the type of packet being transmitted as well as the transmit and receive buffers. When an error is encountered during transmission, this function will return a negative error code. On success it shall return the number of bytes transmitted for write packets or the number of bytes received for read packets.h]hXDSI packets transmitted by .transfer() are passed in as mipi_dsi_msg structures. This structure contains information about the type of packet being transmitted as well as the transmit and receive buffers. When an error is encountered during transmission, this function will return a negative error code. On success it shall return the number of bytes transmitted for write packets or the number of bytes received for read packets.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKHhjMhhubh)}(hNote that typically DSI packet transmission is atomic, so the .transfer() function will seldomly return anything other than the number of bytes contained in the transmit buffer on success.h]hNote that typically DSI packet transmission is atomic, so the .transfer() function will seldomly return anything other than the number of bytes contained in the transmit buffer on success.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKPhjMhhubh)}(hAlso note that those callbacks can be called no matter the state the host is in. Drivers that need the underlying device to be powered to perform these operations will first need to make sure it's been properly enabled.h]hAlso note that those callbacks can be called no matter the state the host is in. Drivers that need the underlying device to be powered to perform these operations will first need to make sure it’s been properly enabled.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKThjMhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_host (C struct)c.mipi_dsi_hosthNtauh1j hjMhhhNhNubj )}(hhh](j )}(h mipi_dsi_hosth]j )}(hstruct mipi_dsi_hosth](j )}(hj h]hstruct}(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhK\ubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhjShK\ubj )}(h mipi_dsi_hosth]j )}(hjSh]h mipi_dsi_host}(hj ThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hjShhhjShK\ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjShhhjShK\ubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j hjShK\hjShhubj )}(hhh]h)}(hDSI host deviceh]hDSI host device}(hj-ThhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKdhj*Thhubah}(h]h ]h"]h$]h&]uh1j hjShhhjShK\ubeh}(h]h ](j structeh"]h$]h&]j" j j# jETj$ jETj% j& j' uh1j hhhjMhNhNubj) )}(hX**Definition**:: struct mipi_dsi_host { struct device *dev; const struct mipi_dsi_host_ops *ops; struct list_head list; }; **Members** ``dev`` driver model device node for this DSI host ``ops`` DSI host operations ``list`` list managementh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjQThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMTubh:}(hjMThhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhhjITubjN )}(hustruct mipi_dsi_host { struct device *dev; const struct mipi_dsi_host_ops *ops; struct list_head list; };h]hustruct mipi_dsi_host { struct device *dev; const struct mipi_dsi_host_ops *ops; struct list_head list; };}hjjTsbah}(h]h ]h"]h$]h&]j j uh1jM h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKjhjITubh)}(h **Members**h]j3 )}(hj{Th]hMembers}(hj}ThhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjyTubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKphjITubjw )}(hhh](j| )}(h3``dev`` driver model device node for this DSI host h](j )}(h``dev``h]j )}(hjTh]hdev}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKfhjTubj )}(hhh]h)}(h*driver model device node for this DSI hosth]h*driver model device node for this DSI host}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKfhjTubah}(h]h ]h"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]uh1j{ hjThKfhjTubj| )}(h``ops`` DSI host operations h](j )}(h``ops``h]j )}(hjTh]hops}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKghjTubj )}(hhh]h)}(hDSI host operationsh]hDSI host operations}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKghjTubah}(h]h ]h"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]uh1j{ hjThKghjTubj| )}(h``list`` list managementh](j )}(h``list``h]j )}(hj Uh]hlist}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj Uubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKghjUubj )}(hhh]h)}(hlist managementh]hlist management}(hj%UhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhhj"Uubah}(h]h ]h"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]uh1j{ hj!UhKghjTubeh}(h]h ]h"]h$]h&]uh1jv hjITubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_device_info (C struct)c.mipi_dsi_device_infohNtauh1j hjMhhhNhNubj )}(hhh](j )}(hmipi_dsi_device_infoh]j )}(hstruct mipi_dsi_device_infoh](j )}(hj h]hstruct}(hjfUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbUhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKnubj )}(h h]h }(hjtUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjbUhhhjsUhKnubj )}(hmipi_dsi_device_infoh]j )}(hj`Uh]hmipi_dsi_device_info}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ](j j eh"]h$]h&]j j uh1j hjbUhhhjsUhKnubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj^UhhhjsUhKnubah}(h]jYUah ](j j eh"]h$]h&]j j )j huh1j hjsUhKnhj[Uhhubj )}(hhh]h)}(h'template for creating a mipi_dsi_deviceh]h'template for creating a mipi_dsi_device}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjUhhubah}(h]h ]h"]h$]h&]uh1j hj[UhhhjsUhKnubeh}(h]h ](j structeh"]h$]h&]j" j j# jUj$ jUj% j& j' uh1j hhhjMhNhNubj) )}(hX'**Definition**:: struct mipi_dsi_device_info { char type[DSI_DEV_NAME_SIZE]; u32 channel; struct device_node *node; }; **Members** ``type`` DSI peripheral chip type ``channel`` DSI virtual channel assigned to peripheral ``node`` pointer to OF device node or NULLh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUubh:}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjUubjN )}(hqstruct mipi_dsi_device_info { char type[DSI_DEV_NAME_SIZE]; u32 channel; struct device_node *node; };h]hqstruct mipi_dsi_device_info { char type[DSI_DEV_NAME_SIZE]; u32 channel; struct device_node *node; };}hjUsbah}(h]h ]h"]h$]h&]j j uh1jM h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjUubh)}(h **Members**h]j3 )}(hjUh]hMembers}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjUubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjUubjw )}(hhh](j| )}(h"``type`` DSI peripheral chip type h](j )}(h``type``h]j )}(hjVh]htype}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjVubj )}(hhh]h)}(hDSI peripheral chip typeh]hDSI peripheral chip type}(hj.VhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*VhKhj+Vubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hj*VhKhj Vubj| )}(h7``channel`` DSI virtual channel assigned to peripheral h](j )}(h ``channel``h]j )}(hjNVh]hchannel}(hjPVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjLVubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjHVubj )}(hhh]h)}(h*DSI virtual channel assigned to peripheralh]h*DSI virtual channel assigned to peripheral}(hjgVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjcVhKhjdVubah}(h]h ]h"]h$]h&]uh1j hjHVubeh}(h]h ]h"]h$]h&]uh1j{ hjcVhKhj Vubj| )}(h*``node`` pointer to OF device node or NULLh](j )}(h``node``h]j )}(hjVh]hnode}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjVubj )}(hhh]h)}(h!pointer to OF device node or NULLh]h!pointer to OF device node or NULL}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjVubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjVhKhj Vubeh}(h]h ]h"]h$]h&]uh1jv hjUubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubh)}(h**Description**h]j3 )}(hjVh]h Description}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjMhhubh)}(hNThis is populated and passed to mipi_dsi_device_new to create a new DSI deviceh]hNThis is populated and passed to mipi_dsi_device_new to create a new DSI device}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjMhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_device (C struct)c.mipi_dsi_devicehNtauh1j hjMhhhNhNubj )}(hhh](j )}(hmipi_dsi_deviceh]j )}(hstruct mipi_dsi_deviceh](j )}(hj h]hstruct}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhhjWhKubj )}(hmipi_dsi_deviceh]j )}(hjWh]hmipi_dsi_device}(hj(WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj$Wubah}(h]h ](j j eh"]h$]h&]j j uh1j hjWhhhjWhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjWhhhjWhKubah}(h]jVah ](j j eh"]h$]h&]j j )j huh1j hjWhKhjVhhubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjJWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjGWhhubah}(h]h ]h"]h$]h&]uh1j hjVhhhjWhKubeh}(h]h ](j structeh"]h$]h&]j" j j# jbWj$ jbWj% j& j' uh1j hhhjMhNhNubj) )}(hX**Definition**:: struct mipi_dsi_device { struct mipi_dsi_host *host; struct device dev; bool attached; char name[DSI_DEV_NAME_SIZE]; unsigned int channel; unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; }; **Members** ``host`` DSI host for this peripheral ``dev`` driver model device node for this peripheral ``attached`` the DSI device has been successfully attached ``name`` DSI peripheral chip type ``channel`` virtual channel assigned to the peripheral ``lanes`` number of active data lanes ``format`` pixel format for video mode ``mode_flags`` DSI operation mode related flags ``hs_rate`` maximum lane frequency for high speed mode in hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy drivers ``lp_rate`` maximum lane frequency for low power mode in hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy drivers ``dsc`` panel/bridge DSC pps payload to be senth](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjnWhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjWubh:}(hjjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjfWubjN )}(hXTstruct mipi_dsi_device { struct mipi_dsi_host *host; struct device dev; bool attached; char name[DSI_DEV_NAME_SIZE]; unsigned int channel; unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; };h]hXTstruct mipi_dsi_device { struct mipi_dsi_host *host; struct device dev; bool attached; char name[DSI_DEV_NAME_SIZE]; unsigned int channel; unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; struct drm_dsc_config *dsc; };}hjWsbah}(h]h ]h"]h$]h&]j j uh1jM h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjfWubh)}(h **Members**h]j3 )}(hjWh]hMembers}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjWubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjfWubjw )}(hhh](j| )}(h&``host`` DSI host for this peripheral h](j )}(h``host``h]j )}(hjWh]hhost}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjWubj )}(hhh]h)}(hDSI host for this peripheralh]hDSI host for this peripheral}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhKhjWubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjWhKhjWubj| )}(h5``dev`` driver model device node for this peripheral h](j )}(h``dev``h]j )}(hjWh]hdev}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjWubj )}(hhh]h)}(h,driver model device node for this peripheralh]h,driver model device node for this peripheral}(hj XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhKhjXubah}(h]h ]h"]h$]h&]uh1j hjWubeh}(h]h ]h"]h$]h&]uh1j{ hjXhKhjWubj| )}(h;``attached`` the DSI device has been successfully attached h](j )}(h ``attached``h]j )}(hj)Xh]hattached}(hj+XhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'Xubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhj#Xubj )}(hhh]h)}(h-the DSI device has been successfully attachedh]h-the DSI device has been successfully attached}(hjBXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>XhKhj?Xubah}(h]h ]h"]h$]h&]uh1j hj#Xubeh}(h]h ]h"]h$]h&]uh1j{ hj>XhKhjWubj| )}(h"``name`` DSI peripheral chip type h](j )}(h``name``h]j )}(hjbXh]hname}(hjdXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`Xubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhj\Xubj )}(hhh]h)}(hDSI peripheral chip typeh]hDSI peripheral chip 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hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy drivers h](j )}(h ``hs_rate``h]j )}(hjYh]hhs_rate}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}Yubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjyYubj )}(hhh]h)}(hmaximum lane frequency for high speed mode in hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy driversh]hmaximum lane frequency for high speed mode in hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy drivers}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjYubah}(h]h ]h"]h$]h&]uh1j hjyYubeh}(h]h ]h"]h$]h&]uh1j{ hjYhKhjWubj| )}(h``lp_rate`` maximum lane frequency for low power mode in hertz, this should be set to the real limits of the hardware, zero is only accepted for legacy drivers h](j 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)}(hmipi_dsi_pixel_format_to_bpph]hmipi_dsi_pixel_format_to_bpp}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhj[hKubj)}(h (enum mipi_dsi_pixel_format fmt)h]j)}(henum mipi_dsi_pixel_format fmth](j )}(hj7h]henum}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(hmipi_dsi_pixel_formath]hmipi_dsi_pixel_format}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj[modnameN classnameNj j )}j ]j%)}jj[sbc.mipi_dsi_pixel_format_to_bppasbuh1hhj[ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(hfmth]hfmt}(hj'\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubah}(h]h ]h"]h$]h&]j j uh1jhj[hhhj[hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj[hhhj[hKubah}(h]j[ah ](j j eh"]h$]h&]j j )j huh1j hj[hKhj[hhubj )}(hhh]h)}(hdobtain the number of bits per pixel for any given pixel format defined by the MIPI DSI specificationh]hdobtain the number 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./include/drm/drm_mipi_dsi.hhKhj\ubj )}(hhh]h)}(hMIPI DSI pixel formath]hMIPI DSI pixel format}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hKhj\ubah}(h]h ]h"]h$]h&]uh1j hj\ubeh}(h]h ]h"]h$]h&]uh1j{ hj\hKhj\ubah}(h]h ]h"]h$]h&]uh1jv hjm\ubh)}(h **Return**h]j3 )}(hj\h]hReturn}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjm\ubh)}(h7The number of bits per pixel of the given pixel format.h]h7The number of bits per pixel of the given pixel format.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKhjm\ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_dcs_tear_mode (C enum)c.mipi_dsi_dcs_tear_modehNtauh1j hjMhhhNhNubj )}(hhh](j )}(hmipi_dsi_dcs_tear_modeh]j )}(henum mipi_dsi_dcs_tear_modeh](j )}(hj7h]henum}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhKubj )}(h h]h }(hj ]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]hhhj]hKubj )}(hmipi_dsi_dcs_tear_modeh]j )}(hj ]h]hmipi_dsi_dcs_tear_mode}(hj2]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj]hhhj]hKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj ]hhhj]hKubah}(h]j]ah ](j j eh"]h$]h&]j j )j huh1j hj]hKhj]hhubj )}(hhh]h)}(hTearing Effect Output Line modeh]hTearing Effect Output Line mode}(hjT]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM@hjQ]hhubah}(h]h ]h"]h$]h&]uh1j hj]hhhj]hKubeh}(h]h ](j enumeh"]h$]h&]j" j j# jl]j$ jl]j% j& j' uh1j hhhjMhNhNubj) )}(h**Constants** ``MIPI_DSI_DCS_TEAR_MODE_VBLANK`` the TE output line consists of V-Blanking information only ``MIPI_DSI_DCS_TEAR_MODE_VHBLANK`` the TE output line consists of both V-Blanking and H-Blanking informationh](h)}(h **Constants**h]j3 )}(hjv]h]h Constants}(hjx]hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjt]ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMDhjp]ubjw )}(hhh](j| )}(h]``MIPI_DSI_DCS_TEAR_MODE_VBLANK`` the TE output line consists of V-Blanking information only h](j )}(h!``MIPI_DSI_DCS_TEAR_MODE_VBLANK``h]j )}(hj]h]hMIPI_DSI_DCS_TEAR_MODE_VBLANK}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMHhj]ubj )}(hhh]h)}(h:the TE output line consists of V-Blanking information onlyh]h:the TE output line consists of V-Blanking information only}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMGhj]ubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hj]hMHhj]ubj| )}(hl``MIPI_DSI_DCS_TEAR_MODE_VHBLANK`` the TE output line consists of both V-Blanking and H-Blanking informationh](j )}(h"``MIPI_DSI_DCS_TEAR_MODE_VHBLANK``h]j )}(hj]h]hMIPI_DSI_DCS_TEAR_MODE_VHBLANK}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMKhj]ubj )}(hhh]h)}(hIthe TE output line consists of both V-Blanking and H-Blanking informationh]hIthe TE output line consists of both V-Blanking and H-Blanking information}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMKhj]ubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hj]hMKhj]ubeh}(h]h ]h"]h$]h&]uh1jv hjp]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *mipi_dsi_generic_write_seq_multi (C macro)"c.mipi_dsi_generic_write_seq_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(h mipi_dsi_generic_write_seq_multih]j )}(h mipi_dsi_generic_write_seq_multih]j )}(h mipi_dsi_generic_write_seq_multih]j )}(hj"^h]h mipi_dsi_generic_write_seq_multi}(hj,^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj(^ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj$^hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hj ^hhhj?^hMubah}(h]j^ah ](j j eh"]h$]h&]j j )j huh1j hj?^hMhj^hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj^hhhj?^hMubeh}(h]h ](j macroeh"]h$]h&]j" j j# jX^j$ jX^j% j& j' uh1j hhhjMhNhNubh)}(h2``mipi_dsi_generic_write_seq_multi (ctx, seq...)``h]j )}(hj^^h]h.mipi_dsi_generic_write_seq_multi (ctx, seq...)}(hj`^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjMhhubj^E)}(h+transmit data using a generic write packet h]h)}(h*transmit data using a generic write packeth]h*transmit data using a generic write packet}(hjx^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjt^ubah}(h]h ]h"]h$]h&]uh1j]Ehj^hMhjMhhubj) )}(h**Parameters** ``ctx`` Context for multiple DSI transactions ``seq...`` buffer containing the payload **Description** This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j3 )}(hj^h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj^ubjw )}(hhh](j| )}(h.``ctx`` Context for multiple DSI transactions h](j )}(h``ctx``h]j )}(hj^h]hctx}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj^ubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj^ubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj^hMhj^ubj| )}(h)``seq...`` buffer containing the payload h](j )}(h ``seq...``h]j )}(hj^h]hseq...}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj^ubj )}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj_ubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hj_hMhj^ubeh}(h]h ]h"]h$]h&]uh1jv hj^ubh)}(h**Description**h]j3 )}(hj&_h]h Description}(hj(_hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj^ubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hj<_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .mipi_dsi_generic_write_var_seq_multi (C macro)&c.mipi_dsi_generic_write_var_seq_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(h$mipi_dsi_generic_write_var_seq_multih]j )}(h$mipi_dsi_generic_write_var_seq_multih]j )}(h$mipi_dsi_generic_write_var_seq_multih]j )}(hje_h]h$mipi_dsi_generic_write_var_seq_multi}(hjo_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjk_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjg_hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hjc_hhhj_hMubah}(h]j^_ah ](j j eh"]h$]h&]j j )j huh1j hj_hMhj`_hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj`_hhhj_hMubeh}(h]h ](j macroeh"]h$]h&]j" j j# j_j$ j_j% j& j' uh1j hhhjMhNhNubh)}(h6``mipi_dsi_generic_write_var_seq_multi (ctx, seq...)``h]j )}(hj_h]h2mipi_dsi_generic_write_var_seq_multi (ctx, seq...)}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjMhhubj^E)}(h8transmit non-constant data using a generic write packet h]h)}(h7transmit non-constant data using a generic write packeth]h7transmit non-constant data using a generic write packet}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj_ubah}(h]h ]h"]h$]h&]uh1j]Ehj_hMhjMhhubj) )}(h**Parameters** ``ctx`` Context for multiple DSI transactions ``seq...`` buffer containing the payload **Description** This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j3 )}(hj_h]h Parameters}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj_ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj_ubjw )}(hhh](j| )}(h.``ctx`` Context for multiple DSI transactions h](j )}(h``ctx``h]j )}(hj_h]hctx}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj_ubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj `hMhj `ubah}(h]h ]h"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]uh1j{ hj `hMhj_ubj| )}(h)``seq...`` buffer containing the payload h](j )}(h ``seq...``h]j )}(hj.`h]hseq...}(hj0`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,`ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj(`ubj )}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hjG`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjC`hMhjD`ubah}(h]h ]h"]h$]h&]uh1j hj(`ubeh}(h]h ]h"]h$]h&]uh1j{ hjC`hMhj_ubeh}(h]h ]h"]h$]h&]uh1jv hj_ubh)}(h**Description**h]j3 )}(hji`h]h Description}(hjk`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjg`ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj_ubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &mipi_dsi_dcs_write_seq_multi (C macro)c.mipi_dsi_dcs_write_seq_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hmipi_dsi_dcs_write_seq_multih]j )}(hmipi_dsi_dcs_write_seq_multih]j )}(hmipi_dsi_dcs_write_seq_multih]j )}(hj`h]hmipi_dsi_dcs_write_seq_multi}(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj`ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj`hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hj`hhhj`hMubah}(h]j`ah ](j j eh"]h$]h&]j j )j huh1j hj`hMhj`hhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hj`hhhj`hMubeh}(h]h ](j macroeh"]h$]h&]j" j j# j`j$ j`j% j& j' uh1j hhhjMhNhNubh)}(h3``mipi_dsi_dcs_write_seq_multi (ctx, cmd, seq...)``h]j )}(hj`h]h/mipi_dsi_dcs_write_seq_multi (ctx, cmd, seq...)}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjMhhubj^E)}(h$transmit a DCS command with payload h]h)}(h#transmit a DCS command with payloadh]h#transmit a DCS command with payload}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj`ubah}(h]h ]h"]h$]h&]uh1j]Ehj ahMhjMhhubj) )}(hX**Parameters** ``ctx`` Context for multiple DSI transactions ``cmd`` Command ``seq...`` buffer containing data to be transmitted **Description** This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j3 )}(hjah]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjaubjw )}(hhh](j| )}(h.``ctx`` Context for multiple DSI transactions h](j )}(h``ctx``h]j )}(hj8ah]hctx}(hj:ahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6aubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj2aubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjQahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMahMhjNaubah}(h]h ]h"]h$]h&]uh1j hj2aubeh}(h]h ]h"]h$]h&]uh1j{ hjMahMhj/aubj| )}(h``cmd`` Command h](j )}(h``cmd``h]j )}(hjqah]hcmd}(hjsahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjoaubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjkaubj )}(hhh]h)}(hCommandh]hCommand}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjaubah}(h]h ]h"]h$]h&]uh1j hjkaubeh}(h]h ]h"]h$]h&]uh1j{ hjahMhj/aubj| )}(h4``seq...`` buffer containing data to be transmitted h](j )}(h ``seq...``h]j )}(hjah]hseq...}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjaubj )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjaubah}(h]h ]h"]h$]h&]uh1j hjaubeh}(h]h ]h"]h$]h&]uh1j{ hjahMhj/aubeh}(h]h ]h"]h$]h&]uh1jv hjaubh)}(h**Description**h]j3 )}(hjah]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjaubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjaubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *mipi_dsi_dcs_write_var_seq_multi (C macro)"c.mipi_dsi_dcs_write_var_seq_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(h mipi_dsi_dcs_write_var_seq_multih]j )}(h mipi_dsi_dcs_write_var_seq_multih]j )}(h mipi_dsi_dcs_write_var_seq_multih]j )}(hj$bh]h mipi_dsi_dcs_write_var_seq_multi}(hj.bhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj*bubah}(h]h ](j j eh"]h$]h&]j j uh1j hj&bhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]j j j uh1j j j hj"bhhhjAbhMubah}(h]jbah ](j j eh"]h$]h&]j j )j huh1j hjAbhMhjbhhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjbhhhjAbhMubeh}(h]h ](j macroeh"]h$]h&]j" j j# jZbj$ jZbj% j& j' uh1j hhhjMhNhNubh)}(h7``mipi_dsi_dcs_write_var_seq_multi (ctx, cmd, seq...)``h]j )}(hj`bh]h3mipi_dsi_dcs_write_var_seq_multi (ctx, cmd, seq...)}(hjbbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^bubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjMhhubj^E)}(h1transmit a DCS command with non-constant payload h]h)}(h0transmit a DCS command with non-constant payloadh]h0transmit a DCS command with non-constant payload}(hjzbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjvbubah}(h]h ]h"]h$]h&]uh1j]EhjbhMhjMhhubj) )}(hX**Parameters** ``ctx`` Context for multiple DSI transactions ``cmd`` Command ``seq...`` buffer containing data to be transmitted **Description** This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j3 )}(hjbh]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjbubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjbubjw )}(hhh](j| )}(h.``ctx`` Context for multiple DSI transactions h](j )}(h``ctx``h]j )}(hjbh]hctx}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjbubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjbubah}(h]h ]h"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]uh1j{ hjbhMhjbubj| )}(h``cmd`` Command h](j )}(h``cmd``h]j )}(hjbh]hcmd}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjbubj )}(hhh]h)}(hCommandh]hCommand}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1j hjbubeh}(h]h ]h"]h$]h&]uh1j{ hjchMhjbubj| )}(h4``seq...`` buffer containing data to be transmitted h](j )}(h ``seq...``h]j )}(hj&ch]hseq...}(hj(chhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$cubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj cubj )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hj?chhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;chMhjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:fubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj6fubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjUfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQfhMhjRfubah}(h]h ]h"]h$]h&]uh1j hj6fubeh}(h]h ]h"]h$]h&]uh1j{ hjQfhMhj3fubj| )}(h<``_dsi1`` First DSI interface to act as recipient of packet h](j )}(h ``_dsi1``h]j )}(hjufh]h_dsi1}(hjwfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsfubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjofubj )}(hhh]h)}(h1First DSI interface to act as recipient of packeth]h1First DSI interface to act as recipient of packet}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjfubah}(h]h ]h"]h$]h&]uh1j hjofubeh}(h]h ]h"]h$]h&]uh1j{ hjfhMhj3fubj| )}(h=``_dsi2`` Second DSI interface to act as recipient of packet h](j )}(h ``_dsi2``h]j )}(hjfh]h_dsi2}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjfubj )}(hhh]h)}(h2Second DSI interface to act as recipient of packeth]h2Second DSI interface to act as recipient of packet}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjfubah}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hjfhMhj3fubj| )}(h*``_seq...`` buffer containing the payload h](j )}(h ``_seq...``h]j )}(hjfh]h_seq...}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjfubj )}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjfubah}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hjfhMhj3fubeh}(h]h ]h"]h$]h&]uh1jv hjfubh)}(h**Description**h]j3 )}(hj"gh]h Description}(hj$ghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj gubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjfubh)}(hThis macro will send the specified generic packet twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.h]hThis macro will send the specified generic packet twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.}(hj8ghhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjfubh)}(hNote that if an error occurs while transmitting the packet to the first DSI interface, the packet will not be sent to the second DSI interface.h]hNote that if an error occurs while transmitting the packet to the first DSI interface, the packet will not be sent to the second DSI interface.}(hjGghhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjfubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hjVghhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjfubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +mipi_dsi_dual_dcs_write_seq_multi (C macro)#c.mipi_dsi_dual_dcs_write_seq_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(h!mipi_dsi_dual_dcs_write_seq_multih]j )}(h!mipi_dsi_dual_dcs_write_seq_multih]j )}(h!mipi_dsi_dual_dcs_write_seq_multih]j )}(hjgh]h!mipi_dsi_dual_dcs_write_seq_multi}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjgubah}(h]h ](j j eh"]h$]h&]j j uh1j hjghhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM ubah}(h]h ]h"]h$]h&]j j j uh1j j j hj}ghhhjghM ubah}(h]jxgah ](j j eh"]h$]h&]j j )j huh1j hjghM hjzghhubj )}(hhh]h}(h]h ]h"]h$]h&]uh1j hjzghhhjghM ubeh}(h]h ](j macroeh"]h$]h&]j" j j# jgj$ jgj% j& j' uh1j hhhjMhNhNubh)}(hI``mipi_dsi_dual_dcs_write_seq_multi (_ctx, _dsi1, _dsi2, _cmd, _seq...)``h]j )}(hjgh]hEmipi_dsi_dual_dcs_write_seq_multi (_ctx, _dsi1, _dsi2, _cmd, _seq...)}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjgubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjMhhubj^E)}(hOtransmit a DCS command with payload to two dsi interfaces, one after the other h]h)}(hNtransmit a DCS command with payload to two dsi interfaces, one after the otherh]hNtransmit a DCS command with payload to two dsi interfaces, one after the other}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM hjgubah}(h]h ]h"]h$]h&]uh1j]EhjghM hjMhhubj) )}(hX**Parameters** ``_ctx`` Context for multiple DSI transactions ``_dsi1`` First DSI interface to act as recipient of packet ``_dsi2`` Second DSI interface to act as recipient of packet ``_cmd`` Command ``_seq...`` buffer containing the payload **Description** This macro will send the specified DCS command with payload twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces. Note that if an error occurs while transmitting the payload to the first DSI interface, the payload will not be sent to the second DSI interface. This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j3 )}(hjgh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjgubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjgubjw )}(hhh](j| )}(h/``_ctx`` Context for multiple DSI transactions h](j )}(h``_ctx``h]j )}(hjhh]h_ctx}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj hubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj hubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj(hhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hhMhj%hubah}(h]h ]h"]h$]h&]uh1j hj hubeh}(h]h ]h"]h$]h&]uh1j{ hj$hhMhjhubj| )}(h<``_dsi1`` First DSI interface to act as recipient of packet h](j )}(h ``_dsi1``h]j )}(hjHhh]h_dsi1}(hjJhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFhubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjBhubj )}(hhh]h)}(h1First DSI interface to act as recipient of packeth]h1First DSI interface to act as recipient of packet}(hjahhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hhMhj^hubah}(h]h ]h"]h$]h&]uh1j hjBhubeh}(h]h ]h"]h$]h&]uh1j{ hj]hhMhjhubj| )}(h=``_dsi2`` Second DSI interface to act as recipient of packet h](j )}(h ``_dsi2``h]j )}(hjhh]h_dsi2}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhj{hubj )}(hhh]h)}(h2Second DSI interface to act as recipient of packeth]h2Second DSI interface to act as recipient of packet}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjhubah}(h]h ]h"]h$]h&]uh1j hj{hubeh}(h]h ]h"]h$]h&]uh1j{ hjhhMhjhubj| )}(h``_cmd`` Command h](j )}(h``_cmd``h]j )}(hjhh]h_cmd}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjhubj )}(hhh]h)}(hCommandh]hCommand}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjhubah}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjhhMhjhubj| )}(h*``_seq...`` buffer containing the payload h](j )}(h ``_seq...``h]j )}(hjhh]h_seq...}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjhubj )}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hj ihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMhj iubah}(h]h ]h"]h$]h&]uh1j hjhubeh}(h]h ]h"]h$]h&]uh1j{ hjihMhjhubeh}(h]h ]h"]h$]h&]uh1jv hjgubh)}(h**Description**h]j3 )}(hj.ih]h Description}(hj0ihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj,iubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM hjgubh)}(hThis macro will send the specified DCS command with payload twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.h]hThis macro will send the specified DCS command with payload twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.}(hjDihhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjgubh)}(hNote that if an error occurs while transmitting the payload to the first DSI interface, the payload will not be sent to the second DSI interface.h]hNote that if an error occurs while transmitting the payload to the first DSI interface, the payload will not be sent to the second DSI interface.}(hjSihhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjgubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hjbihhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMhjgubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_driver (C struct)c.mipi_dsi_driverhNtauh1j hjMhhhNhNubj )}(hhh](j )}(hmipi_dsi_driverh]j )}(hstruct mipi_dsi_driverh](j )}(hj h]hstruct}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjihhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhMubj )}(h h]h }(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjihhhjihMubj )}(hmipi_dsi_driverh]j )}(hjih]hmipi_dsi_driver}(hjihhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjiubah}(h]h ](j j eh"]h$]h&]j j uh1j hjihhhjihMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjihhhjihMubah}(h]jiah ](j j eh"]h$]h&]j j )j huh1j hjihMhjihhubj )}(hhh]h)}(h DSI driverh]h DSI driver}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM(hjihhubah}(h]h ]h"]h$]h&]uh1j hjihhhjihMubeh}(h]h ](j structeh"]h$]h&]j" j j# jij$ jij% j& j' uh1j hhhjMhNhNubj) )}(hX**Definition**:: struct mipi_dsi_driver { struct device_driver driver; int(*probe)(struct mipi_dsi_device *dsi); void (*remove)(struct mipi_dsi_device *dsi); void (*shutdown)(struct mipi_dsi_device *dsi); }; **Members** ``driver`` device driver model driver ``probe`` callback for device binding ``remove`` callback for device unbinding ``shutdown`` called at shutdown time to quiesce the deviceh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjiubh:}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM,hjiubjN )}(hstruct mipi_dsi_driver { struct device_driver driver; int(*probe)(struct mipi_dsi_device *dsi); void (*remove)(struct mipi_dsi_device *dsi); void (*shutdown)(struct mipi_dsi_device *dsi); };h]hstruct mipi_dsi_driver { struct device_driver driver; int(*probe)(struct mipi_dsi_device *dsi); void (*remove)(struct mipi_dsi_device *dsi); void (*shutdown)(struct mipi_dsi_device *dsi); };}hjjsbah}(h]h ]h"]h$]h&]j j uh1jM h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM.hjiubh)}(h **Members**h]j3 )}(hj!jh]hMembers}(hj#jhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM5hjiubjw )}(hhh](j| )}(h&``driver`` device driver model driver h](j )}(h ``driver``h]j )}(hj@jh]hdriver}(hjBjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>jubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM*hj:jubj )}(hhh]h)}(hdevice driver model driverh]hdevice driver model driver}(hjYjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUjhM*hjVjubah}(h]h ]h"]h$]h&]uh1j hj:jubeh}(h]h ]h"]h$]h&]uh1j{ hjUjhM*hj7jubj| )}(h&``probe`` callback for device binding h](j )}(h ``probe``h]j )}(hjyjh]hprobe}(hj{jhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM+hjsjubj )}(hhh]h)}(hcallback for device bindingh]hcallback for device binding}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhM+hjjubah}(h]h ]h"]h$]h&]uh1j hjsjubeh}(h]h ]h"]h$]h&]uh1j{ hjjhM+hj7jubj| )}(h)``remove`` callback for device unbinding h](j )}(h ``remove``h]j )}(hjjh]hremove}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM,hjjubj )}(hhh]h)}(hcallback for device unbindingh]hcallback for device unbinding}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhM,hjjubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hjjhM,hj7jubj| )}(h:``shutdown`` called at shutdown time to quiesce the deviceh](j )}(h ``shutdown``h]j )}(hjjh]hshutdown}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjjubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM,hjjubj )}(hhh]h)}(h-called at shutdown time to quiesce the deviceh]h-called at shutdown time to quiesce the device}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:353: ./include/drm/drm_mipi_dsi.hhM-hjkubah}(h]h ]h"]h$]h&]uh1j hjjubeh}(h]h ]h"]h$]h&]uh1j{ hjkhM,hj7jubeh}(h]h ]h"]h$]h&]uh1jv hjiubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,of_find_mipi_dsi_device_by_node (C function)!c.of_find_mipi_dsi_device_by_nodehNtauh1j hjMhhhNhNubj )}(hhh](j )}(hQstruct mipi_dsi_device * of_find_mipi_dsi_device_by_node (struct device_node *np)h]j )}(hOstruct mipi_dsi_device *of_find_mipi_dsi_device_by_node(struct device_node *np)h](j )}(hj h]hstruct}(hjEkhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAkhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chKhubj )}(h h]h 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refdomainj reftypej reftargetjmmodnameN classnameNj j )}j ]jNmc.mipi_dsi_device_register_fullasbuh1hhjmubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj9)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjmubj )}(hhosth]hhost}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjmubj)}(h'const struct mipi_dsi_device_info *infoh](j )}(hjch]hconst}(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hj nhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(hj h]hstruct}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj )}(h h]h }(hj%nhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubh)}(hhh]j )}(hmipi_dsi_device_infoh]hmipi_dsi_device_info}(hj6nhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3nubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8nmodnameN classnameNj j )}j ]jNmc.mipi_dsi_device_register_fullasbuh1hhjmubj )}(h h]h }(hjTnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubj9)}(hjOh]h*}(hjbnhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjmubj )}(hinfoh]hinfo}(hjonhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjmubeh}(h]h ]h"]h$]h&]j j uh1jhjmhhhj mhKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj mhhhj mhKubah}(h]jmah ](j j eh"]h$]h&]j j )j huh1j hj mhKhjmhhubj )}(hhh]h)}(hcreate a MIPI DSI deviceh]hcreate a MIPI DSI device}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chKhjnhhubah}(h]h ]h"]h$]h&]uh1j hjmhhhj mhKubeh}(h]h ](j functioneh"]h$]h&]j" j j# jnj$ jnj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_host *host`` DSI host to which this device is connected ``const struct mipi_dsi_device_info *info`` pointer to template containing DSI device information **Description** Create a MIPI DSI device by using the device information provided by mipi_dsi_device_info template **Return** A pointer to the newly created MIPI DSI device, or, a pointer encoded with an errorh](h)}(h**Parameters**h]j3 )}(hjnh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjnubah}(h]h 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hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chKhj oubj )}(hhh]h)}(h5pointer to template containing DSI device informationh]h5pointer to template containing DSI device information}(hj,ohhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(ohKhj)oubah}(h]h ]h"]h$]h&]uh1j hj oubeh}(h]h ]h"]h$]h&]uh1j{ hj(ohKhjnubeh}(h]h ]h"]h$]h&]uh1jv hjnubh)}(h**Description**h]j3 )}(hjNoh]h Description}(hjPohhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjLoubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chKhjnubh)}(hbCreate a MIPI DSI device by using the device information provided by mipi_dsi_device_info templateh]hbCreate a MIPI DSI device by using the device information provided by mipi_dsi_device_info template}(hjdohhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chKhjnubh)}(h **Return**h]j3 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,mipi_dsi_packet_format_is_short (C function)!c.mipi_dsi_packet_format_is_shorthNtauh1j hjMhhhNhNubj )}(hhh](j )}(h.bool mipi_dsi_packet_format_is_short (u8 type)h]j )}(h-bool mipi_dsi_packet_format_is_short(u8 type)h](j)}(hjIh]hbool}(hjm{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji{hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj{{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hji{hhhjz{hMubj )}(hmipi_dsi_packet_format_is_shorth]j )}(hmipi_dsi_packet_format_is_shorth]hmipi_dsi_packet_format_is_short}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ](j j eh"]h$]h&]j j uh1j hji{hhhjz{hMubj)}(h (u8 type)h]j)}(hu8 typeh](h)}(hhh]j )}(hu8h]hu8}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{modnameN classnameNj j )}j ]j%)}jj{sb!c.mipi_dsi_packet_format_is_shortasbuh1hhj{ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubj )}(htypeh]htype}(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj{ubah}(h]h ]h"]h$]h&]j j uh1jhji{hhhjz{hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hje{hhhjz{hMubah}(h]j`{ah ](j j eh"]h$]h&]j j )j huh1j hjz{hMhjb{hhubj )}(hhh]h)}(h(check if a packet is of the short formath]h(check if a packet is of the short format}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj|hhubah}(h]h ]h"]h$]h&]uh1j hjb{hhhjz{hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j|j$ j|j% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``u8 type`` MIPI DSI data type of the packet **Return** true if the packet for the given data type is a short packet, false otherwise.h](h)}(h**Parameters**h]j3 )}(hj&|h]h Parameters}(hj(|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$|ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj |ubjw )}(hhh]j| )}(h-``u8 type`` MIPI DSI data type of the packet h](j )}(h ``u8 type``h]j )}(hjE|h]hu8 type}(hjG|hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjC|ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj?|ubj )}(hhh]h)}(h MIPI DSI data type of the packeth]h MIPI DSI data type of the packet}(hj^|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZ|hMhj[|ubah}(h]h ]h"]h$]h&]uh1j hj?|ubeh}(h]h ]h"]h$]h&]uh1j{ hjZ|hMhj<|ubah}(h]h ]h"]h$]h&]uh1jv hj |ubh)}(h **Return**h]j3 )}(hj|h]hReturn}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~|ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj |ubh)}(hNtrue if the packet for the given data type is a short packet, false otherwise.h]hNtrue if the packet for the given data type is a short packet, false otherwise.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj |ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +mipi_dsi_packet_format_is_long (C function) c.mipi_dsi_packet_format_is_longhNtauh1j hjMhhhNhNubj )}(hhh](j )}(h-bool mipi_dsi_packet_format_is_long (u8 type)h]j )}(h,bool mipi_dsi_packet_format_is_long(u8 type)h](j)}(hjIh]hbool}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|hhhj|hMubj )}(hmipi_dsi_packet_format_is_longh]j )}(hmipi_dsi_packet_format_is_longh]hmipi_dsi_packet_format_is_long}(hj|hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj|hhhj|hMubj)}(h (u8 type)h]j)}(hu8 typeh](h)}(hhh]j )}(hu8h]hu8}(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj}modnameN classnameNj j )}j ]j%)}jj|sb c.mipi_dsi_packet_format_is_longasbuh1hhj|ubj )}(h h]h }(hj$}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(htypeh]htype}(hj2}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj|ubah}(h]h ]h"]h$]h&]j j uh1jhj|hhhj|hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj|hhhj|hMubah}(h]j|ah ](j j eh"]h$]h&]j j )j huh1j hj|hMhj|hhubj )}(hhh]h)}(h'check if a packet is of the long formath]h'check if a packet is of the long format}(hj\}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjY}hhubah}(h]h ]h"]h$]h&]uh1j hj|hhhj|hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jt}j$ jt}j% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``u8 type`` MIPI DSI data type of the packet **Return** true if the packet for the given data type is a long packet, false otherwise.h](h)}(h**Parameters**h]j3 )}(hj~}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|}ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjx}ubjw )}(hhh]j| )}(h-``u8 type`` MIPI DSI data type of the packet h](j )}(h ``u8 type``h]j )}(hj}h]hu8 type}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj}ubj )}(hhh]h)}(h MIPI DSI data type of the packeth]h MIPI DSI data type of the packet}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]uh1j{ hj}hMhj}ubah}(h]h ]h"]h$]h&]uh1jv hjx}ubh)}(h **Return**h]j3 )}(hj}h]hReturn}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj}ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjx}ubh)}(hMtrue if the packet for the given data type is a long packet, false otherwise.h]hMtrue if the packet for the given data type is a long packet, false otherwise.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjx}ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #mipi_dsi_create_packet (C function)c.mipi_dsi_create_packethNtauh1j hjMhhhNhNubj )}(hhh](j )}(h[int mipi_dsi_create_packet (struct mipi_dsi_packet *packet, const struct mipi_dsi_msg *msg)h]j )}(hZint mipi_dsi_create_packet(struct mipi_dsi_packet *packet, const struct mipi_dsi_msg *msg)h](j)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj,~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~hhhj+~hMubj )}(hmipi_dsi_create_packeth]j )}(hmipi_dsi_create_packeth]hmipi_dsi_create_packet}(hj>~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj~hhhj+~hMubj)}(h@(struct mipi_dsi_packet *packet, const struct mipi_dsi_msg *msg)h](j)}(hstruct mipi_dsi_packet *packeth](j )}(hj h]hstruct}(hjZ~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV~ubj )}(h h]h }(hjg~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV~ubh)}(hhh]j )}(hmipi_dsi_packeth]hmipi_dsi_packet}(hjx~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hju~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjz~modnameN classnameNj j )}j ]j%)}jj@~sbc.mipi_dsi_create_packetasbuh1hhjV~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV~ubj9)}(hjOh]h*}(hj~hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjV~ubj )}(hpacketh]hpacket}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjV~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjR~ubj)}(hconst struct mipi_dsi_msg *msgh](j )}(hjch]hconst}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(hj h]hstruct}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj )}(h h]h }(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubh)}(hhh]j )}(h mipi_dsi_msgh]h mipi_dsi_msg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j~c.mipi_dsi_create_packetasbuh1hhj~ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubj9)}(hjOh]h*}(hj1hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj~ubj )}(hmsgh]hmsg}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjR~ubeh}(h]h ]h"]h$]h&]j j uh1jhj~hhhj+~hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhj+~hMubah}(h]j~ah ](j j eh"]h$]h&]j j )j huh1j hj+~hMhj~hhubj )}(hhh]h)}(hint mipi_dsi_shutdown_peripheral (struct mipi_dsi_device *dsi)h]j )}(h=int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMKubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^hhhjphMKubj )}(hmipi_dsi_shutdown_peripheralh]j )}(hmipi_dsi_shutdown_peripheralh]hmipi_dsi_shutdown_peripheral}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^hhhjphMKubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.mipi_dsi_shutdown_peripheralasbuh1hhjubj )}(h h]h }(hj݀hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj^hhhjphMKubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZhhhjphMKubah}(h]jUah ](j j eh"]h$]h&]j j )j huh1j hjphMKhjWhhubj )}(hhh]h)}(h#sends a Shutdown Peripheral commandh]h#sends a Shutdown Peripheral command}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMKhjhhubah}(h]h ]h"]h$]h&]uh1j hjWhhhjphMKubeh}(h]h ](j functioneh"]h$]h&]j" j j# j:j$ j:j% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_shutdown_peripheral_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjBubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMOhj>ubjw )}(hhh]j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjch]hstruct mipi_dsi_device *dsi}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMLhj]ubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMLhjyubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhMLhjZubah}(h]h ]h"]h$]h&]uh1jv hj>ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMNhj>ubh)}(hNThis function is deprecated. Use mipi_dsi_shutdown_peripheral_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_shutdown_peripheral_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMMhj>ubh)}(h **Return**h]j3 )}(hjŁh]hReturn}(hjǁhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjÁubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMPhj>ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjہhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMQhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (mipi_dsi_turn_on_peripheral (C function)c.mipi_dsi_turn_on_peripheralhNtauh1j hjMhhhNhNubj )}(hhh](j )}(h=int mipi_dsi_turn_on_peripheral (struct mipi_dsi_device *dsi)h]j )}(hh]hconst void *params}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMAhj8ubj )}(hhh]h)}(h(buffer containing the request parametersh]h(buffer containing the request parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMAhjTubah}(h]h ]h"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]uh1j{ hjShMAhjubj| )}(h3``size_t num_params`` number of request parameters h](j )}(h``size_t num_params``h]j )}(hjwh]hsize_t num_params}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMBhjqubj )}(hhh]h)}(hnumber of request parametersh]hnumber of request parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMBhjubah}(h]h ]h"]h$]h&]uh1j hjqubeh}(h]h ]h"]h$]h&]uh1j{ hjhMBhjubj| )}(h;``void *data`` buffer in which to return the received data h](j )}(h``void *data``h]j )}(hjh]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMChjubj )}(hhh]h)}(h+buffer in which to return the received datah]h+buffer in which to return the received data}(hjɗhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjŗhMChjƗubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjŗhMChjubj| )}(h'``size_t size`` size of receive buffer h](j )}(h``size_t size``h]j )}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMDhjubj )}(hhh]h)}(hsize of receive bufferh]hsize of receive buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMDhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMDhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMFhjubh)}(hlThis function will automatically choose the right data type depending on the number of parameters passed in.h]hlThis function will automatically choose the right data type depending on the number of parameters passed in.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMEhjubh)}(h **Return**h]j3 )}(hjKh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMHhjubh)}(hJThe number of bytes successfully read or a negative error code on failure.h]hJThe number of bytes successfully read or a negative error code on failure.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMIhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_mipi_dsi_get_input_bus_fmt (C function) c.drm_mipi_dsi_get_input_bus_fmthNtauh1j hjMhhhNhNubj )}(hhh](j )}(hJu32 drm_mipi_dsi_get_input_bus_fmt (enum mipi_dsi_pixel_format dsi_format)h]j )}(hIu32 drm_mipi_dsi_get_input_bus_fmt(enum mipi_dsi_pixel_format dsi_format)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_mipi_dsi_get_input_bus_fmtsb c.drm_mipi_dsi_get_input_bus_fmtasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMmubj )}(hdrm_mipi_dsi_get_input_bus_fmth]j )}(hjh]hdrm_mipi_dsi_get_input_bus_fmt}(hjǘhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjØubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMmubj)}(h'(enum mipi_dsi_pixel_format dsi_format)h]j)}(h%enum mipi_dsi_pixel_format dsi_formath](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޘubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޘubh)}(hhh]j )}(hmipi_dsi_pixel_formath]hmipi_dsi_pixel_format}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j c.drm_mipi_dsi_get_input_bus_fmtasbuh1hhjޘubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޘubj )}(h dsi_formath]h dsi_format}(hj,hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޘubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjژubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMmubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMmhjhhubj )}(hhh]h)}(h]Get the required MEDIA_BUS_FMT_* based input pixel format for a given DSI output pixel formath]h]Get the required MEDIA_BUS_FMT_* based input pixel format for a given DSI output pixel format}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMmhjShhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMmubeh}(h]h ](j functioneh"]h$]h&]j" j j# jnj$ jnj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``enum mipi_dsi_pixel_format dsi_format`` pixel format that a DSI host needs to output **Description** Various DSI hosts can use this function during their :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input. **Return** a 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.h](h)}(h**Parameters**h]j3 )}(hjxh]h Parameters}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjvubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjrubjw )}(hhh]j| )}(hW``enum mipi_dsi_pixel_format dsi_format`` pixel format that a DSI host needs to output h](j )}(h)``enum mipi_dsi_pixel_format dsi_format``h]j )}(hjh]h%enum mipi_dsi_pixel_format dsi_format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMphjubj )}(hhh]h)}(h,pixel format that a DSI host needs to outputh]h,pixel format that a DSI host needs to output}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMphjubah}(h]h ]h"]h$]h&]uh1jv hjrubh)}(h**Description**h]j3 )}(hjҙh]h Description}(hjԙhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjЙubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMrhjrubh)}(hVarious DSI hosts can use this function during their :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input.h](h5Various DSI hosts can use this function during their }(hjhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]j )}(hjh]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjubhK operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMqhjrubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMuhjrubh)}(hBa 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.h]hBa 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMvhjrubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &mipi_dsi_dcs_write_buffer (C function)c.mipi_dsi_dcs_write_bufferhNtauh1j hjMhhhNhNubj )}(hhh](j )}(h]ssize_t mipi_dsi_dcs_write_buffer (struct mipi_dsi_device *dsi, const void *data, size_t len)h]j )}(h\ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi, const void *data, size_t len)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjfmodnameN classnameNj j )}j ]j%)}jmipi_dsi_dcs_write_buffersbc.mipi_dsi_dcs_write_bufferasbuh1hhj]hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]hhhjhMubj )}(hmipi_dsi_dcs_write_bufferh]j )}(hjh]hmipi_dsi_dcs_write_buffer}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj]hhhjhMubj)}(h;(struct mipi_dsi_device *dsi, const void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjњhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjΚubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjӚmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_write_bufferasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsih]hdsi}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst void *datah](j )}(hjch]hconst}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjLhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjZhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdatah]hdata}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_write_bufferasbuh1hhj|ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubj )}(hlenh]hlen}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj]hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjYhhhjhMubah}(h]jTah ](j j eh"]h$]h&]j j )j huh1j hjhMhjVhhubj )}(hhh]h)}(h#transmit a DCS command with payloadh]h#transmit a DCS command with payload}(hjٛhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj֛hhubah}(h]h ]h"]h$]h&]uh1j hjVhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const void *data`` buffer containing data to be transmitted ``size_t len`` size of transmission buffer **Description** This function will automatically choose the right data type depending on the command payload length. **Return** The number of bytes successfully transmitted or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjw )}(hhh](j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj0ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj/hMhjubj| )}(h>``const void *data`` buffer containing data to be transmitted h](j )}(h``const void *data``h]j )}(hjSh]hconst void *data}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjMubj )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1j hjMubeh}(h]h ]h"]h$]h&]uh1j{ hjhhMhjubj| )}(h+``size_t len`` size of transmission buffer h](j )}(h``size_t len``h]j )}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hsize of transmission bufferh]hsize of transmission buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjǜh]h Description}(hjɜhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjŜubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hdThis function will automatically choose the right data type depending on the command payload length.h]hdThis function will automatically choose the right data type depending on the command payload length.}(hjݜhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hQThe number of bytes successfully transmitted or a negative error code on failure.h]hQThe number of bytes successfully transmitted or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -mipi_dsi_dcs_write_buffer_chatty (C function)"c.mipi_dsi_dcs_write_buffer_chattyhNtauh1j hjMhhhNhNubj )}(hhh](j )}(h`int mipi_dsi_dcs_write_buffer_chatty (struct mipi_dsi_device *dsi, const void *data, size_t len)h]j )}(h_int mipi_dsi_dcs_write_buffer_chatty(struct mipi_dsi_device *dsi, const void *data, size_t len)h](j)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhjAhMubj )}(h mipi_dsi_dcs_write_buffer_chattyh]j )}(h mipi_dsi_dcs_write_buffer_chattyh]h mipi_dsi_dcs_write_buffer_chatty}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPubah}(h]h ](j j eh"]h$]h&]j j uh1j hj/hhhjAhMubj)}(h;(struct mipi_dsi_device *dsi, const void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj )}(h h]h }(hj}hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjVsb"c.mipi_dsi_dcs_write_buffer_chattyasbuh1hhjlubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjlubj )}(hdsih]hdsi}(hjɝhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjlubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(hconst void *datah](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޝubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޝubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjޝubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޝubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjޝubj )}(hdatah]hdata}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjޝubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDmodnameN classnameNj j )}j ]j"c.mipi_dsi_dcs_write_buffer_chattyasbuh1hhj;ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(hlenh]hlen}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjhubeh}(h]h ]h"]h$]h&]j j uh1jhj/hhhjAhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj+hhhjAhMubah}(h]j&ah ](j j eh"]h$]h&]j j )j huh1j hjAhMhj(hhubj )}(hhh]h)}(h+mipi_dsi_dcs_write_buffer() w/ an error logh]h+mipi_dsi_dcs_write_buffer() w/ an error log}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj(hhhjAhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const void *data`` buffer containing data to be transmitted ``size_t len`` size of transmission buffer **Description** Like mipi_dsi_dcs_write_buffer() but includes a dev_err() call for you and returns 0 upon success, not the number of bytes sent. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjw )}(hhh](j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjٞh]hstruct mipi_dsi_device *dsi}(hj۞hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjמubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjӞubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjӞubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjОubj| )}(h>``const void *data`` buffer containing data to be transmitted h](j )}(h``const void *data``h]j )}(hjh]hconst void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubj )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMhj(ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj'hMhjОubj| )}(h+``size_t len`` size of transmission buffer h](j )}(h``size_t len``h]j )}(hjKh]h size_t len}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjEubj )}(hhh]h)}(hsize of transmission bufferh]hsize of transmission buffer}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMhjaubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hj`hMhjОubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hLike mipi_dsi_dcs_write_buffer() but includes a dev_err() call for you and returns 0 upon success, not the number of bytes sent.h]hLike mipi_dsi_dcs_write_buffer() but includes a dev_err() call for you and returns 0 upon success, not the number of bytes sent.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjßhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,mipi_dsi_dcs_write_buffer_multi (C function)!c.mipi_dsi_dcs_write_buffer_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hgvoid mipi_dsi_dcs_write_buffer_multi (struct mipi_dsi_multi_context *ctx, const void *data, size_t len)h]j )}(hfvoid mipi_dsi_dcs_write_buffer_multi(struct mipi_dsi_multi_context *ctx, const void *data, size_t len)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_write_buffer_multih]j )}(hmipi_dsi_dcs_write_buffer_multih]hmipi_dsi_dcs_write_buffer_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hB(struct mipi_dsi_multi_context *ctx, const void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj )}(h h]h }(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjMhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjOmodnameN classnameNj j )}j ]j%)}jjsb!c.mipi_dsi_dcs_write_buffer_multiasbuh1hhj+ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubj9)}(hjOh]h*}(hj{hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj+ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'ubj)}(hconst void *datah](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjʠhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjؠhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'ubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]ji!c.mipi_dsi_dcs_write_buffer_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hlenh]hlen}(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj'ubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h/mipi_dsi_dcs_write_buffer_chatty() w/ accum_errh]h/mipi_dsi_dcs_write_buffer_chatty() w/ accum_err}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjThhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# joj$ joj% j& j' uh1j hhhjMhNhNubj) )}(hX_**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``const void *data`` buffer containing data to be transmitted ``size_t len`` size of transmission buffer **Description** Like mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjyh]h Parameters}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjwubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjsubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h>``const void *data`` buffer containing data to be transmitted h](j )}(h``const void *data``h]j )}(hjѡh]hconst void *data}(hjӡhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjϡubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjˡubj )}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjˡubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h+``size_t len`` size of transmission buffer h](j )}(h``size_t len``h]j )}(hj h]h size_t len}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hsize of transmission bufferh]hsize of transmission buffer}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjsubh)}(h**Description**h]j3 )}(hjEh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjsubh)}(hLike mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.h]hLike mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjsubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1mipi_dsi_dual_dcs_write_buffer_multi (C function)&c.mipi_dsi_dual_dcs_write_buffer_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hvoid mipi_dsi_dual_dcs_write_buffer_multi (struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h]j )}(hvoid mipi_dsi_dual_dcs_write_buffer_multi(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h$mipi_dsi_dual_dcs_write_buffer_multih]j )}(h$mipi_dsi_dual_dcs_write_buffer_multih]h$mipi_dsi_dual_dcs_write_buffer_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h~(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjǢhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjâubj )}(h h]h }(hjԢhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjâubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhjâubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjâubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjâubj )}(hctxh]hctx}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjâubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct mipi_dsi_device *dsi1h](j )}(hj h]hstruct}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjYmodnameN classnameNj j )}j ]j&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhj5ubj )}(h h]h }(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj5ubj )}(hdsi1h]hdsi1}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct mipi_dsi_device *dsi2h](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjǣhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjģubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjɣmodnameN classnameNj j )}j ]j&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsi2h]hdsi2}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst void *datah](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj)}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjPhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdatah]hdata}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjvubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj{modnameN classnameNj j )}j ]j&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhjrubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubj )}(hlenh]hlen}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjrubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]j}ah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hKmipi_dsi_dcs_write_buffer_multi() for two dsi channels, one after the otherh]hKmipi_dsi_dcs_write_buffer_multi() for two dsi channels, one after the other}(hjϤhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj̤hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to ``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to ``const void *data`` Buffer containing data to be transmitted ``size_t len`` Size of transmission buffer **Description** A wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj&ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj%hMhjubj| )}(hF``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to h](j )}(h ``struct mipi_dsi_device *dsi1``h]j )}(hjIh]hstruct mipi_dsi_device *dsi1}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjCubj )}(hhh]h)}(h$First dsi channel to write buffer toh]h$First dsi channel to write buffer to}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj_ubah}(h]h ]h"]h$]h&]uh1j hjCubeh}(h]h ]h"]h$]h&]uh1j{ hj^hMhjubj| )}(hG``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to h](j )}(h ``struct mipi_dsi_device *dsi2``h]j )}(hjh]hstruct mipi_dsi_device *dsi2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj|ubj )}(hhh]h)}(h%Second dsi channel to write buffer toh]h%Second dsi channel to write buffer to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h>``const void *data`` Buffer containing data to be transmitted h](j )}(h``const void *data``h]j )}(hjh]hconst void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h(Buffer containing data to be transmittedh]h(Buffer containing data to be transmitted}(hjԥhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjХhMhjѥubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjХhMhjubj| )}(h+``size_t len`` Size of transmission buffer h](j )}(h``size_t len``h]j )}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hSize of transmission bufferh]hSize of transmission buffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj/h]h Description}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hA wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.h]hA wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_dcs_write (C function)c.mipi_dsi_dcs_writehNtauh1j hjMhhhNhNubj )}(hhh](j )}(h^ssize_t mipi_dsi_dcs_write (struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h]j )}(h]ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjymodnameN classnameNj j )}j ]j%)}jmipi_dsi_dcs_writesbc.mipi_dsi_dcs_writeasbuh1hhjphhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjphhhjhM ubj )}(hmipi_dsi_dcs_writeh]j )}(hjh]hmipi_dsi_dcs_write}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjphhhjhM ubj)}(hC(struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjƦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¦ubj )}(h h]h }(hjӦhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¦ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_writeasbuh1hhj¦ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¦ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj¦ubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj¦ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hj9hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]jc.mipi_dsi_dcs_writeasbuh1hhj2ubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubj )}(hcmdh]hcmd}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hconst void *datah](j )}(hjch]hconst}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjzubj )}(hdatah]hdata}(hj§hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjާhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjۧubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_writeasbuh1hhjקubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjקubj )}(hlenh]hlen}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjקubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjphhhjhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j $hjlhhhjhM ubah}(h]jgah ](j j eh"]h$]h&]j j )j huh1j hjhM hjihhubj )}(hhh]h)}(hsend DCS write commandh]hsend DCS write command}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM hj1hhubah}(h]h ]h"]h$]h&]uh1j hjihhhjhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jLj$ jLj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 cmd`` DCS command ``const void *data`` buffer containing the command payload ``size_t len`` command payload length **Description** This function will automatically choose the right data type depending on the command payload length. **Return** The number of bytes successfully transmitted or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjVh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjTubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubjw )}(hhh](j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjuh]hstruct mipi_dsi_device *dsi}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM hjoubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjlubj| )}(h``u8 cmd`` DCS command h](j )}(h ``u8 cmd``h]j )}(hjh]hu8 cmd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubj )}(hhh]h)}(h DCS commandh]h DCS command}(hjǨhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjèhM hjĨubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjèhM hjlubj| )}(h;``const void *data`` buffer containing the command payload h](j )}(h``const void *data``h]j )}(hjh]hconst void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubj )}(hhh]h)}(h%buffer containing the command payloadh]h%buffer containing the command payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjlubj| )}(h&``size_t len`` command payload length h](j )}(h``size_t len``h]j )}(hj h]h size_t len}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hcommand payload lengthh]hcommand payload length}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj6ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj5hMhjlubeh}(h]h ]h"]h$]h&]uh1jv hjPubh)}(h**Description**h]j3 )}(hj[h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubh)}(hdThis function will automatically choose the right data type depending on the command payload length.h]hdThis function will automatically choose the right data type depending on the command payload length.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubh)}(hQThe number of bytes successfully transmitted or a negative error code on failure.h]hQThe number of bytes successfully transmitted or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_dcs_read (C function)c.mipi_dsi_dcs_readhNtauh1j hjMhhhNhNubj )}(hhh](j )}(hWssize_t mipi_dsi_dcs_read (struct mipi_dsi_device *dsi, u8 cmd, void *data, size_t len)h]j )}(hVssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data, size_t len)h](h)}(hhh]j )}(hssize_th]hssize_t}(hjʩhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjǩubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj̩modnameN classnameNj j )}j ]j%)}jmipi_dsi_dcs_readsbc.mipi_dsi_dcs_readasbuh1hhjéhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM6ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjéhhhjhM6ubj )}(hmipi_dsi_dcs_readh]j )}(hjh]hmipi_dsi_dcs_read}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjéhhhjhM6ubj)}(h=(struct mipi_dsi_device *dsi, u8 cmd, void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]jc.mipi_dsi_dcs_readasbuh1hhjubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjchhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsih]hdsi}(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_readasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcmdh]hcmd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h void *datah](j)}(hvoidh]hvoid}(hjѪhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjͪubj )}(h h]h }(hjߪhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͪubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjͪubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͪubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_readasbuh1hhjubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hlenh]hlen}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjéhhhjhM6ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM6ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM6hjhhubj )}(hhh]h)}(hsend DCS read request commandh]hsend DCS read request command}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM6hjihhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM6ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 cmd`` DCS command ``void *data`` buffer in which to receive data ``size_t len`` size of receive buffer **Return** The number of bytes read or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM:hjubjw )}(hhh](j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM7hjubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjƫhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj«hM7hjëubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj«hM7hjubj| )}(h``u8 cmd`` DCS command h](j )}(h ``u8 cmd``h]j )}(hjh]hu8 cmd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM8hjubj )}(hhh]h)}(h DCS commandh]h DCS command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM8hjubj| )}(h/``void *data`` buffer in which to receive data h](j )}(h``void *data``h]j )}(hjh]h void *data}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM9hjubj )}(hhh]h)}(hbuffer in which to receive datah]hbuffer in which to receive data}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hM9hj5ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj4hM9hjubj| )}(h&``size_t len`` size of receive buffer h](j )}(h``size_t len``h]j )}(hjXh]h size_t len}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM:hjRubj )}(hhh]h)}(hsize of receive bufferh]hsize of receive buffer}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhM:hjnubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjmhM:hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM<hjubh)}(h=The number of bytes read or a negative error code on failure.h]h=The number of bytes read or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM<hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $mipi_dsi_dcs_read_multi (C function)c.mipi_dsi_dcs_read_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(havoid mipi_dsi_dcs_read_multi (struct mipi_dsi_multi_context *ctx, u8 cmd, void *data, size_t len)h]j )}(h`void mipi_dsi_dcs_read_multi(struct mipi_dsi_multi_context *ctx, u8 cmd, void *data, size_t len)h](j)}(hvoidh]hvoid}(hjجhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԬhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMOubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjԬhhhjhMOubj )}(hmipi_dsi_dcs_read_multih]j )}(hmipi_dsi_dcs_read_multih]hmipi_dsi_dcs_read_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjԬhhhjhMOubj)}(hD(struct mipi_dsi_multi_context *ctx, u8 cmd, void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj5modnameN classnameNj j )}j ]j%)}jjsbc.mipi_dsi_dcs_read_multiasbuh1hhjubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjahhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(hu8 cmdh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jOc.mipi_dsi_dcs_read_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hcmdh]hcmd}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h void *datah](j)}(hvoidh]hvoid}(hjϭhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˭ubj )}(h h]h }(hjݭhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˭ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj˭ubj )}(hdatah]hdata}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj˭ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubj)}(h size_t lenh](h)}(hhh]j )}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jOc.mipi_dsi_dcs_read_multiasbuh1hhj ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hlenh]hlen}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubeh}(h]h ]h"]h$]h&]j j uh1jhjԬhhhjhMOubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjЬhhhjhMOubah}(h]jˬah ](j j eh"]h$]h&]j j )j huh1j hjhMOhjͬhhubj )}(hhh]h)}(h mipi_dsi_dcs_read() w/ accum_errh]h mipi_dsi_dcs_read() w/ accum_err}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMOhjghhubah}(h]h ]h"]h$]h&]uh1j hjͬhhhjhMOubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hXV**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u8 cmd`` DCS command ``void *data`` buffer in which to receive data ``size_t len`` size of receive buffer **Description** Like mipi_dsi_dcs_read() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMShjubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMPhjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjĮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMPhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMPhjubj| )}(h``u8 cmd`` DCS command h](j )}(h ``u8 cmd``h]j )}(hjh]hu8 cmd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMQhjޮubj )}(hhh]h)}(h DCS commandh]h DCS command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQhjubah}(h]h ]h"]h$]h&]uh1j hjޮubeh}(h]h ]h"]h$]h&]uh1j{ hjhMQhjubj| )}(h/``void *data`` buffer in which to receive data h](j )}(h``void *data``h]j )}(hjh]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMRhjubj )}(hhh]h)}(hbuffer in which to receive datah]hbuffer in which to receive data}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMRhj3ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj2hMRhjubj| )}(h&``size_t len`` size of receive buffer h](j )}(h``size_t len``h]j )}(hjVh]h size_t len}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMShjPubj )}(hhh]h)}(hsize of receive bufferh]hsize of receive buffer}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMShjlubah}(h]h ]h"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]uh1j{ hjkhMShjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjubh)}(hpLike mipi_dsi_dcs_read() but deals with errors in a way that makes it convenient to make several calls in a row.h]hpLike mipi_dsi_dcs_read() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMThjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j mipi_dsi_dcs_nop (C function)c.mipi_dsi_dcs_nophNtauh1j hjMhhhNhNubj )}(hhh](j )}(h2int mipi_dsi_dcs_nop (struct mipi_dsi_device *dsi)h]j )}(h1int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hj֯hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjүhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMtubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjүhhhjhMtubj )}(hmipi_dsi_dcs_noph]j )}(hmipi_dsi_dcs_noph]hmipi_dsi_dcs_nop}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjүhhhjhMtubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj3modnameN classnameNj j )}j ]j%)}jjsbc.mipi_dsi_dcs_nopasbuh1hhjubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsih]hdsi}(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj ubah}(h]h ]h"]h$]h&]j j uh1jhjүhhhjhMtubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjίhhhjhMtubah}(h]jɯah ](j j eh"]h$]h&]j j )j huh1j hjhMthj˯hhubj )}(hhh]h)}(hsend DCS nop packeth]hsend DCS nop packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMthjhhubah}(h]h ]h"]h$]h&]uh1j hj˯hhhjhMtubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_nop_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMxhjubjw )}(hhh]j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjװh]hstruct mipi_dsi_device *dsi}(hjٰhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjհubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMuhjѰubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1j hjѰubeh}(h]h ]h"]h$]h&]uh1j{ hjhMuhjΰubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMwhjubh)}(hBThis function is deprecated. Use mipi_dsi_dcs_nop_multi() instead.h]hBThis function is deprecated. Use mipi_dsi_dcs_nop_multi() instead.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMvhjubh)}(h **Return**h]j3 )}(hj9h]hReturn}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMxhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMyhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $mipi_dsi_dcs_soft_reset (C function)c.mipi_dsi_dcs_soft_resethNtauh1j hjMhhhNhNubj )}(hhh](j )}(h9int mipi_dsi_dcs_soft_reset (struct mipi_dsi_device *dsi)h]j )}(h8int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzhhhjhMubj )}(hmipi_dsi_dcs_soft_reseth]j )}(hmipi_dsi_dcs_soft_reseth]hmipi_dsi_dcs_soft_reset}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjzhhhjhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjȱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjٱhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjֱubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj۱modnameN classnameNj j )}j ]j%)}jjsbc.mipi_dsi_dcs_soft_resetasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjzhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjvhhhjhMubah}(h]jqah ](j j eh"]h$]h&]j j )j huh1j hjhMhjshhubj )}(hhh]h)}(h.perform a software reset of the display moduleh]h.perform a software reset of the display module}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj;hhubah}(h]h ]h"]h$]h&]uh1j hjshhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jVj$ jVj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_soft_reset_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj`h]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjZubjw )}(hhh]j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjyubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjvubah}(h]h ]h"]h$]h&]uh1jv hjZubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjZubh)}(hIThis function is deprecated. Use mipi_dsi_dcs_soft_reset_multi() instead.h]hIThis function is deprecated. Use mipi_dsi_dcs_soft_reset_multi() instead.}(hjвhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjZubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj߲ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjZubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjZubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (mipi_dsi_dcs_get_power_mode (C function)c.mipi_dsi_dcs_get_power_modehNtauh1j hjMhhhNhNubj )}(hhh](j )}(hGint mipi_dsi_dcs_get_power_mode (struct mipi_dsi_device *dsi, u8 *mode)h]j )}(hFint mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode)h](j)}(hinth]hint}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj4hMubj )}(hmipi_dsi_dcs_get_power_modeh]j )}(hmipi_dsi_dcs_get_power_modeh]hmipi_dsi_dcs_get_power_mode}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjCubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhj4hMubj)}(h'(struct mipi_dsi_device *dsi, u8 *mode)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjIsbc.mipi_dsi_dcs_get_power_modeasbuh1hhj_ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubj)}(hu8 *modeh](h)}(hhh]j )}(hu8h]hu8}(hjسhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjճubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjڳmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_get_power_modeasbuh1hhjѳubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjѳubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjѳubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjѳubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubeh}(h]h ]h"]h$]h&]j j uh1jhj"hhhj4hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj4hMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj4hMhjhhubj )}(hhh]h)}(h-query the display module's current power modeh]h/query the display module’s current power mode}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj8hhubah}(h]h ]h"]h$]h&]uh1j hjhhhj4hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jSj$ jSj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 *mode`` return location for the current power mode **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj]h]h Parameters}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjWubjw )}(hhh](j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hj|h]hstruct mipi_dsi_device *dsi}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjzubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjvubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjvubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjsubj| )}(h8``u8 *mode`` return location for the current power mode h](j )}(h ``u8 *mode``h]j )}(hjh]hu8 *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h*return location for the current power modeh]h*return location for the current power mode}(hjδhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjʴhMhj˴ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjʴhMhjsubeh}(h]h ]h"]h$]h&]uh1jv hjWubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjWubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjWubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *mipi_dsi_dcs_get_pixel_format (C function)c.mipi_dsi_dcs_get_pixel_formathNtauh1j hjMhhhNhNubj )}(hhh](j )}(hKint mipi_dsi_dcs_get_pixel_format (struct mipi_dsi_device *dsi, u8 *format)h]j )}(hJint mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format)h](j)}(hinth]hint}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1hhhjChMubj )}(hmipi_dsi_dcs_get_pixel_formath]j )}(hmipi_dsi_dcs_get_pixel_formath]hmipi_dsi_dcs_get_pixel_format}(hjVhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjRubah}(h]h ](j j eh"]h$]h&]j j uh1j hj1hhhjChMubj)}(h)(struct mipi_dsi_device *dsi, u8 *format)h](j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjXsbc.mipi_dsi_dcs_get_pixel_formatasbuh1hhjnubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjnubj )}(hdsih]hdsi}(hj˵hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubj)}(h u8 *formath](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.mipi_dsi_dcs_get_pixel_formatasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hformath]hformat}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjjubeh}(h]h ]h"]h$]h&]j j uh1jhj1hhhjChMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj-hhhjChMubah}(h]j(ah ](j j eh"]h$]h&]j j )j huh1j hjChMhj*hhubj )}(hhh]h)}(hBgets the pixel format for the RGB image data used by the interfaceh]hBgets the pixel format for the RGB image data used by the interface}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjGhhubah}(h]h ]h"]h$]h&]uh1j hj*hhhjChMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jbj$ jbj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 *format`` return location for the pixel format **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjlh]h Parameters}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjfubjw )}(hhh](j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h4``u8 *format`` return location for the pixel format h](j )}(h``u8 *format``h]j )}(hjĶh]h u8 *format}(hjƶhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj¶ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h$return location for the pixel formath]h$return location for the pixel format}(hjݶhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjٶhMhjڶubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjٶhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjfubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjfubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjfubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *mipi_dsi_dcs_enter_sleep_mode (C function)c.mipi_dsi_dcs_enter_sleep_modehNtauh1j hjMhhhNhNubj )}(hhh](j )}(h?int mipi_dsi_dcs_enter_sleep_mode (struct mipi_dsi_device *dsi)h]j )}(h>int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhjRhMubj )}(hmipi_dsi_dcs_enter_sleep_modeh]j )}(hmipi_dsi_dcs_enter_sleep_modeh]hmipi_dsi_dcs_enter_sleep_mode}(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@hhhjRhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjgsbc.mipi_dsi_dcs_enter_sleep_modeasbuh1hhj}ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubj9)}(hjOh]h*}(hjͷhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj}ubj )}(hdsih]hdsi}(hjڷhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyubah}(h]h ]h"]h$]h&]j j uh1jhj@hhhjRhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhjRhMubah}(h]j7ah ](j j eh"]h$]h&]j j )j huh1j hjRhMhj9hhubj )}(hhh]h)}(hWdisable all unnecessary blocks inside the display module except interface communicationh]hWdisable all unnecessary blocks inside the display module except interface communication}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hj9hhhjRhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj&h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubjw )}(hhh]j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjEh]hstruct mipi_dsi_device *dsi}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj?ubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hjZhMhj<ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj~ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubh)}(hOThis function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead.h]hOThis function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )mipi_dsi_dcs_exit_sleep_mode (C function)c.mipi_dsi_dcs_exit_sleep_modehNtauh1j hjMhhhNhNubj )}(hhh](j )}(h>int mipi_dsi_dcs_exit_sleep_mode (struct mipi_dsi_device *dsi)h]j )}(h=int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_exit_sleep_modeh]j )}(hmipi_dsi_dcs_exit_sleep_modeh]hmipi_dsi_dcs_exit_sleep_mode}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjGhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjImodnameN classnameNj j )}j ]j%)}jjsbc.mipi_dsi_dcs_exit_sleep_modeasbuh1hhj%ubj )}(h h]h }(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjuhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]j߸ah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h+enable all blocks inside the display moduleh]h+enable all blocks inside the display module}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jĹj$ jĹj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjιh]h Parameters}(hjйhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj̹ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjȹubjw )}(hhh]j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjȹubh)}(h**Description**h]j3 )}(hj(h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjȹubh)}(hNThis function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjȹubh)}(h **Return**h]j3 )}(hjOh]hReturn}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjMubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjȹubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjȹubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )mipi_dsi_dcs_set_display_off (C function)c.mipi_dsi_dcs_set_display_offhNtauh1j hjMhhhNhNubj )}(hhh](j )}(h>int mipi_dsi_dcs_set_display_off (struct mipi_dsi_device *dsi)h]j )}(h=int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_set_display_offh]j )}(hmipi_dsi_dcs_set_display_offh]hmipi_dsi_dcs_set_display_off}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j )}(hj h]hstruct}(hjѺhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͺubj )}(h h]h }(hj޺hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͺubh)}(hhh]j )}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.mipi_dsi_dcs_set_display_offasbuh1hhjͺubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͺubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjͺubj )}(hdsih]hdsi}(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjͺubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjɺubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h4stop displaying the image data on the display deviceh]h4stop displaying the image data on the display device}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjQhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jlj$ jlj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hjvh]h Parameters}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjtubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjpubjw )}(hhh]j| )}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](j )}(h``struct mipi_dsi_device *dsi``h]j )}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjpubh)}(h**Description**h]j3 )}(hjлh]h Description}(hjһhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjλubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjpubh)}(hNThis function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjpubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjpubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (mipi_dsi_dcs_set_display_on (C function)c.mipi_dsi_dcs_set_display_onhNtauh1j hjMhhhNhNubj )}(hhh](j )}(h=int mipi_dsi_dcs_set_display_on (struct mipi_dsi_device *dsi)h]j )}(hubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMXhj:ubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hj_h]h"struct mipi_dsi_multi_context *ctx}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjYubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMUhjuubah}(h]h ]h"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]uh1j{ hjthMUhjVubah}(h]h ]h"]h$]h&]uh1jv hj:ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMWhj:ubh)}(hoLike mipi_dsi_dcs_nop() but deals with errors in a way that makes it convenient to make several calls in a row.h]hoLike mipi_dsi_dcs_nop() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMVhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0mipi_dsi_dcs_enter_sleep_mode_multi (C function)%c.mipi_dsi_dcs_enter_sleep_mode_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hMvoid mipi_dsi_dcs_enter_sleep_mode_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hLvoid mipi_dsi_dcs_enter_sleep_mode_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMmubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMmubj )}(h#mipi_dsi_dcs_enter_sleep_mode_multih]j )}(h#mipi_dsi_dcs_enter_sleep_mode_multih]h#mipi_dsi_dcs_enter_sleep_mode_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMmubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj<modnameN classnameNj j )}j ]j%)}jjsb%c.mipi_dsi_dcs_enter_sleep_mode_multiasbuh1hhjubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMmubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMmhjhhubj )}(hhh]h)}(h send DCS ENTER_SLEEP_MODE packeth]h send DCS ENTER_SLEEP_MODE packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMmhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMmubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMnhjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMnhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMnhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMphjubh)}(h|Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMohjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /mipi_dsi_dcs_exit_sleep_mode_multi (C function)$c.mipi_dsi_dcs_exit_sleep_mode_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hLvoid mipi_dsi_dcs_exit_sleep_mode_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hKvoid mipi_dsi_dcs_exit_sleep_mode_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjohhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhjnhMubj )}(h"mipi_dsi_dcs_exit_sleep_mode_multih]j )}(h"mipi_dsi_dcs_exit_sleep_mode_multih]h"mipi_dsi_dcs_exit_sleep_mode_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj\hhhjnhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb$c.mipi_dsi_dcs_exit_sleep_mode_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj\hhhjnhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjXhhhjnhMubah}(h]jSah ](j j eh"]h$]h&]j j )j huh1j hjnhMhjUhhubj )}(hhh]h)}(hsend DCS EXIT_SLEEP_MODE packeth]hsend DCS EXIT_SLEEP_MODE packet}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjUhhhjnhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j8j$ j8j% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjBh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj<ubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjah]h"struct mipi_dsi_multi_context *ctx}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj[ubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjwubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hjvhMhjXubah}(h]h ]h"]h$]h&]uh1jv hj<ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj<ubh)}(h{Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /mipi_dsi_dcs_set_display_off_multi (C function)$c.mipi_dsi_dcs_set_display_off_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hLvoid mipi_dsi_dcs_set_display_off_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hKvoid mipi_dsi_dcs_set_display_off_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h"mipi_dsi_dcs_set_display_off_multih]j )}(h"mipi_dsi_dcs_set_display_off_multih]h"mipi_dsi_dcs_set_display_off_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj+hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj<hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj>modnameN classnameNj j )}j ]j%)}jjsb$c.mipi_dsi_dcs_set_display_off_multiasbuh1hhjubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjwhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hsend DCS SET_DISPLAY_OFF packeth]hsend DCS SET_DISPLAY_OFF packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h{Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .mipi_dsi_dcs_set_display_on_multi (C function)#c.mipi_dsi_dcs_set_display_on_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hKvoid mipi_dsi_dcs_set_display_on_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hJvoid mipi_dsi_dcs_set_display_on_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj^hhhjphMubj )}(h!mipi_dsi_dcs_set_display_on_multih]j )}(h!mipi_dsi_dcs_set_display_on_multih]h!mipi_dsi_dcs_set_display_on_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj^hhhjphMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb#c.mipi_dsi_dcs_set_display_on_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj^hhhjphMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZhhhjphMubah}(h]jUah ](j j eh"]h$]h&]j j )j huh1j hjphMhjWhhubj )}(hhh]h)}(hsend DCS SET_DISPLAY_ON packeth]hsend DCS SET_DISPLAY_ON packet}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjWhhhjphMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j:j$ j:j% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjBubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj>ubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjch]h"struct mipi_dsi_multi_context *ctx}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj]ubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhMhjZubah}(h]h ]h"]h$]h&]uh1jv hj>ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj>ubh)}(hzLike mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.h]hzLike mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +mipi_dsi_dcs_set_tear_on_multi (C function) c.mipi_dsi_dcs_set_tear_on_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hjvoid mipi_dsi_dcs_set_tear_on_multi (struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h]j )}(hivoid mipi_dsi_dcs_set_tear_on_multi(struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_set_tear_on_multih]j )}(hmipi_dsi_dcs_set_tear_on_multih]hmipi_dsi_dcs_set_tear_on_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(hF(struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj>hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj@modnameN classnameNj j )}j ]j%)}jjsb c.mipi_dsi_dcs_set_tear_on_multiasbuh1hhjubj )}(h h]h }(hj^hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjlhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h enum mipi_dsi_dcs_tear_mode modeh](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_dcs_tear_modeh]hmipi_dsi_dcs_tear_mode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jZ c.mipi_dsi_dcs_set_tear_on_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hsend DCS SET_TEAR_ON packeth]hsend DCS SET_TEAR_ON packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hX4**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode **Description** Like mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hj(h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj&ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj"ubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjGh]h"struct mipi_dsi_multi_context *ctx}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjEubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjAubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hMhj]ubah}(h]h ]h"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]uh1j{ hj\hMhj>ubj| )}(hI``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode h](j )}(h$``enum mipi_dsi_dcs_tear_mode mode``h]j )}(hjh]h enum mipi_dsi_dcs_tear_mode mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj~ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjzubj )}(hhh]h)}(h#the Tearing Effect Output Line modeh]h#the Tearing Effect Output Line mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjzubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhj>ubeh}(h]h ]h"]h$]h&]uh1jv hj"ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj"ubh)}(hwLike mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.h]hwLike mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .mipi_dsi_turn_on_peripheral_multi (C function)#c.mipi_dsi_turn_on_peripheral_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hKvoid mipi_dsi_turn_on_peripheral_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hJvoid mipi_dsi_turn_on_peripheral_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h!mipi_dsi_turn_on_peripheral_multih]j )}(h!mipi_dsi_turn_on_peripheral_multih]h!mipi_dsi_turn_on_peripheral_multi}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j%)}jj#sb#c.mipi_dsi_turn_on_peripheral_multiasbuh1hhj9ubj )}(h h]h }(hj{hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj9ubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj5ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h"sends a Turn On Peripheral commandh]h"sends a Turn On Peripheral command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj<h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hzLike mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h]hzLike mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j ,mipi_dsi_dcs_set_tear_off_multi (C function)!c.mipi_dsi_dcs_set_tear_off_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hIvoid mipi_dsi_dcs_set_tear_off_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hHvoid mipi_dsi_dcs_set_tear_off_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}hhhjhMubj )}(hmipi_dsi_dcs_set_tear_off_multih]j )}(hmipi_dsi_dcs_set_tear_off_multih]hmipi_dsi_dcs_set_tear_off_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj}hhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb!c.mipi_dsi_dcs_set_tear_off_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj}hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjyhhhjhMubah}(h]jtah ](j j eh"]h$]h&]j j )j huh1j hjhMhjvhhubj )}(hhh]h)}(hPturn off the display module's Tearing Effect output signal on the TE signal lineh]hRturn off the display module’s Tearing Effect output signal on the TE signal line}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj>hhubah}(h]h ]h"]h$]h&]uh1j hjvhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jYj$ jYj% j& j' uh1j hhhjMhNhNubj) )}(h^**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactionsh](h)}(h**Parameters**h]j3 )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM hj]ubjw )}(hhh]j| )}(hL``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactionsh](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM hj|ubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM hjyubah}(h]h ]h"]h$]h&]uh1jv hj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *mipi_dsi_dcs_soft_reset_multi (C function)c.mipi_dsi_dcs_soft_reset_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hGvoid mipi_dsi_dcs_soft_reset_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hFvoid mipi_dsi_dcs_soft_reset_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_dcs_soft_reset_multih]j )}(hmipi_dsi_dcs_soft_reset_multih]hmipi_dsi_dcs_soft_reset_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]j%)}jjsbc.mipi_dsi_dcs_soft_reset_multiasbuh1hhjubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h.perform a software reset of the display moduleh]h.perform a software reset of the display module}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hvLike mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.h]hvLike mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 6mipi_dsi_dcs_set_display_brightness_multi (C function)+c.mipi_dsi_dcs_set_display_brightness_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hcvoid mipi_dsi_dcs_set_display_brightness_multi (struct mipi_dsi_multi_context *ctx, u16 brightness)h]j )}(hbvoid mipi_dsi_dcs_set_display_brightness_multi(struct mipi_dsi_multi_context *ctx, u16 brightness)h](j)}(hvoidh]hvoid}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM5ubj )}(h h]h }(hjlhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYhhhjkhM5ubj )}(h)mipi_dsi_dcs_set_display_brightness_multih]j )}(h)mipi_dsi_dcs_set_display_brightness_multih]h)mipi_dsi_dcs_set_display_brightness_multi}(hj~hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjzubah}(h]h ](j j eh"]h$]h&]j j uh1j hjYhhhjkhM5ubj)}(h4(struct mipi_dsi_multi_context *ctx, u16 brightness)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb+c.mipi_dsi_dcs_set_display_brightness_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 brightnessh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j+c.mipi_dsi_dcs_set_display_brightness_multiasbuh1hhjubj )}(h h]h }(hj-hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h brightnessh]h brightness}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjYhhhjkhM5ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjUhhhjkhM5ubah}(h]jPah ](j j eh"]h$]h&]j j )j huh1j hjkhM5hjRhhubj )}(hhh]h)}(h(sets the brightness value of the displayh]h(sets the brightness value of the display}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM5hjbhhubah}(h]h ]h"]h$]h&]uh1j hjRhhhjkhM5ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j}j$ j}j% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 brightness`` brightness value **Description** Like mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM9hjubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM7hjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM7hjubj| )}(h$``u16 brightness`` brightness value h](j )}(h``u16 brightness``h]j )}(hjh]hu16 brightness}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM8hjubj )}(hhh]h)}(hbrightness valueh]hbrightness value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM8hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM8hjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM:hjubh)}(hLike mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.h]hLike mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chM9hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0mipi_dsi_dcs_set_pixel_format_multi (C function)%c.mipi_dsi_dcs_set_pixel_format_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hXvoid mipi_dsi_dcs_set_pixel_format_multi (struct mipi_dsi_multi_context *ctx, u8 format)h]j )}(hWvoid mipi_dsi_dcs_set_pixel_format_multi(struct mipi_dsi_multi_context *ctx, u8 format)h](j)}(hvoidh]hvoid}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMQubj )}(h h]h }(hjnhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[hhhjmhMQubj )}(h#mipi_dsi_dcs_set_pixel_format_multih]j )}(h#mipi_dsi_dcs_set_pixel_format_multih]h#mipi_dsi_dcs_set_pixel_format_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj|ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj[hhhjmhMQubj)}(h/(struct mipi_dsi_multi_context *ctx, u8 format)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb%c.mipi_dsi_dcs_set_pixel_format_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u8 formath](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%c.mipi_dsi_dcs_set_pixel_format_multiasbuh1hhj ubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hformath]hformat}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj[hhhjmhMQubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjWhhhjmhMQubah}(h]jRah ](j j eh"]h$]h&]j j )j huh1j hjmhMQhjThhubj )}(hhh]h)}(hBsets the pixel format for the RGB image data used by the interfaceh]hBsets the pixel format for the RGB image data used by the interface}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMQhjdhhubah}(h]h ]h"]h$]h&]uh1j hjThhhjmhMQubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hX **Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u8 format`` pixel format **Description** Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMShjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMShjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMShjubj| )}(h``u8 format`` pixel format h](j )}(h ``u8 format``h]j )}(hjh]h u8 format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMThjubj )}(hhh]h)}(h pixel formath]h pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMThjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMThjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMVhjubh)}(h|Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 2mipi_dsi_dcs_set_column_address_multi (C function)'c.mipi_dsi_dcs_set_column_address_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hcvoid mipi_dsi_dcs_set_column_address_multi (struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h]j )}(hbvoid mipi_dsi_dcs_set_column_address_multi(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(hvoidh]hvoid}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMmubj )}(h h]h }(hjphhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]hhhjohMmubj )}(h%mipi_dsi_dcs_set_column_address_multih]j )}(h%mipi_dsi_dcs_set_column_address_multih]h%mipi_dsi_dcs_set_column_address_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj~ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj]hhhjohMmubj)}(h8(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb'c.mipi_dsi_dcs_set_column_address_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u16 starth](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j'c.mipi_dsi_dcs_set_column_address_multiasbuh1hhj ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubj )}(hstarth]hstart}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 endh](h)}(hhh]j )}(hu16h]hu16}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j'c.mipi_dsi_dcs_set_column_address_multiasbuh1hhjTubj )}(h h]h }(hjyhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(hendh]hend}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhj]hhhjohMmubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjYhhhjohMmubah}(h]jTah ](j j eh"]h$]h&]j j )j huh1j hjohMmhjVhhubj )}(hhh]h)}(hKdefine the column extent of the frame memory accessed by the host processorh]hKdefine the column extent of the frame memory accessed by the host processor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMmhjhhubah}(h]h ]h"]h$]h&]uh1j hjVhhhjohMmubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hXH**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 start`` first column of frame memory ``u16 end`` last column of frame memory **Description** Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMohjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMohjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMohjubj| )}(h+``u16 start`` first column of frame memory h](j )}(h ``u16 start``h]j )}(hj+h]h u16 start}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMphj%ubj )}(hhh]h)}(hfirst column of frame memoryh]hfirst column of frame memory}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMphjAubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hMphjubj| )}(h(``u16 end`` last column of frame memory h](j )}(h ``u16 end``h]j )}(hjdh]hu16 end}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjbubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMqhj^ubj )}(hhh]h)}(hlast column of frame memoryh]hlast column of frame memory}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMqhjzubah}(h]h ]h"]h$]h&]uh1j hj^ubeh}(h]h ]h"]h$]h&]uh1j{ hjyhMqhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMshjubh)}(h~Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.h]h~Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMrhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 0mipi_dsi_dcs_set_page_address_multi (C function)%c.mipi_dsi_dcs_set_page_address_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(havoid mipi_dsi_dcs_set_page_address_multi (struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h]j )}(h`void mipi_dsi_dcs_set_page_address_multi(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(h#mipi_dsi_dcs_set_page_address_multih]j )}(h#mipi_dsi_dcs_set_page_address_multih]h#mipi_dsi_dcs_set_page_address_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h8(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj.hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j%)}jjsb%c.mipi_dsi_dcs_set_page_address_multiasbuh1hhjubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjmhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjzhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u16 starth](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j[%c.mipi_dsi_dcs_set_page_address_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hstarth]hstart}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hu16 endh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j[%c.mipi_dsi_dcs_set_page_address_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hendh]hend}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(hIdefine the page extent of the frame memory accessed by the host processorh]hIdefine the page extent of the frame memory accessed by the host processor}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj1hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jLj$ jLj% j& j' uh1j hhhjMhNhNubj) )}(hXB**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 start`` first page of frame memory ``u16 end`` last page of frame memory **Description** Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjVh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjTubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjuh]h"struct mipi_dsi_multi_context *ctx}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjoubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjlubj| )}(h)``u16 start`` first page of frame memory h](j )}(h ``u16 start``h]j )}(hjh]h u16 start}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hfirst page of frame memoryh]hfirst page of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjlubj| )}(h&``u16 end`` last page of frame memory h](j )}(h ``u16 end``h]j )}(hjh]hu16 end}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hlast page of frame memoryh]hlast page of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjlubeh}(h]h ]h"]h$]h&]uh1jv hjPubh)}(h**Description**h]j3 )}(hj"h]h Description}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubh)}(h|Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1mipi_dsi_dcs_set_tear_scanline_multi (C function)&c.mipi_dsi_dcs_set_tear_scanline_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(h\void mipi_dsi_dcs_set_tear_scanline_multi (struct mipi_dsi_multi_context *ctx, u16 scanline)h]j )}(h[void mipi_dsi_dcs_set_tear_scanline_multi(struct mipi_dsi_multi_context *ctx, u16 scanline)h](j)}(hvoidh]hvoid}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjvhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjchhhjuhMubj )}(h$mipi_dsi_dcs_set_tear_scanline_multih]j )}(h$mipi_dsi_dcs_set_tear_scanline_multih]h$mipi_dsi_dcs_set_tear_scanline_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjchhhjuhMubj)}(h2(struct mipi_dsi_multi_context *ctx, u16 scanline)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb&c.mipi_dsi_dcs_set_tear_scanline_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(h u16 scanlineh](h)}(hhh]j )}(hu16h]hu16}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j&c.mipi_dsi_dcs_set_tear_scanline_multiasbuh1hhjubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hscanlineh]hscanline}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjchhhjuhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj_hhhjuhMubah}(h]jZah ](j j eh"]h$]h&]j j )j huh1j hjuhMhj\hhubj )}(hhh]h)}(h]set the scanline to use as trigger for the Tearing Effect output signal of the display moduleh]h]set the scanline to use as trigger for the Tearing Effect output signal of the display module}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjlhhubah}(h]h ]h"]h$]h&]uh1j hj\hhhjuhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjMhNhNubj) )}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 scanline`` scanline to use as trigger **Description** Like mipi_dsi_dcs_set_tear_scanline() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubjw )}(hhh](j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h,``u16 scanline`` scanline to use as trigger h](j )}(h``u16 scanline``h]j )}(hjh]h u16 scanline}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(hscanline to use as triggerh]hscanline to use as trigger}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjubh)}(h**Description**h]j3 )}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h}Like mipi_dsi_dcs_set_tear_scanline() but deals with errors in a way that makes it convenient to make several calls in a row.h]h}Like mipi_dsi_dcs_set_tear_scanline() but deals with errors in a way that makes it convenient to make several calls in a row.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /mipi_dsi_shutdown_peripheral_multi (C function)$c.mipi_dsi_shutdown_peripheral_multihNtauh1j hjMhhhNhNubj )}(hhh](j )}(hLvoid mipi_dsi_shutdown_peripheral_multi (struct mipi_dsi_multi_context *ctx)h]j )}(hKvoid mipi_dsi_shutdown_peripheral_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjxhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjehhhjwhMubj )}(h"mipi_dsi_shutdown_peripheral_multih]j )}(h"mipi_dsi_shutdown_peripheral_multih]h"mipi_dsi_shutdown_peripheral_multi}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjehhhjwhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsb$c.mipi_dsi_shutdown_peripheral_multiasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hctxh]hctx}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjehhhjwhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjahhhjwhMubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j hjwhMhj^hhubj )}(hhh]h)}(h#sends a Shutdown Peripheral commandh]h#sends a Shutdown Peripheral command}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj&hhubah}(h]h ]h"]h$]h&]uh1j hj^hhhjwhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jAj$ jAj% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_shutdown_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j3 )}(hjKh]h Parameters}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjEubjw )}(hhh]j| )}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](j )}(h&``struct mipi_dsi_multi_context *ctx``h]j )}(hjjh]h"struct mipi_dsi_multi_context *ctx}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjdubj )}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjaubah}(h]h ]h"]h$]h&]uh1jv hjEubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjEubh)}(h{Like mipi_dsi_shutdown_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_shutdown_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjEubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *mipi_dsi_driver_register_full (C function)c.mipi_dsi_driver_register_fullhNtauh1j hjMhhhNhNubj )}(hhh](j )}(hUint mipi_dsi_driver_register_full (struct mipi_dsi_driver *drv, struct module *owner)h]j )}(hTint mipi_dsi_driver_register_full(struct mipi_dsi_driver *drv, struct module *owner)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hmipi_dsi_driver_register_fullh]j )}(hmipi_dsi_driver_register_fullh]hmipi_dsi_driver_register_full}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h3(struct mipi_dsi_driver *drv, struct module *owner)h](j)}(hstruct mipi_dsi_driver *drvh](j )}(hj h]hstruct}(hj'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hmipi_dsi_driverh]hmipi_dsi_driver}(hjEhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjGmodnameN classnameNj j )}j ]j%)}jj sbc.mipi_dsi_driver_register_fullasbuh1hhj#ubj )}(h h]h }(hjehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj9)}(hjOh]h*}(hjshhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj#ubj )}(hdrvh]hdrv}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubj)}(hstruct module *ownerh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hmoduleh]hmodule}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jac.mipi_dsi_driver_register_fullasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hownerh]howner}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h!register a driver for DSI devicesh]h!register a driver for DSI devices}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j2j$ j2j% j& j' uh1j hhhjMhNhNubj) )}(h**Parameters** ``struct mipi_dsi_driver *drv`` DSI driver structure ``struct module *owner`` owner module **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j3 )}(hj<h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj6ubjw )}(hhh](j| )}(h5``struct mipi_dsi_driver *drv`` DSI driver structure h](j )}(h``struct mipi_dsi_driver *drv``h]j )}(hj[h]hstruct mipi_dsi_driver *drv}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjUubj )}(hhh]h)}(hDSI driver structureh]hDSI driver structure}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjqubah}(h]h ]h"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]uh1j{ hjphMhjRubj| )}(h&``struct module *owner`` owner module h](j )}(h``struct module *owner``h]j )}(hjh]hstruct module *owner}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj )}(hhh]h)}(h owner moduleh]h owner module}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjRubeh}(h]h ]h"]h$]h&]uh1jv hj6ubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj6ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:356: ./drivers/gpu/drm/drm_mipi_dsi.chMhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjMhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'mipi_dsi_driver_unregister (C function)c.mipi_dsi_driver_unregisterhNtauh1j hjMhhhNhNubj )}(hhh](j )}(h=void mipi_dsi_driver_unregister (struct mipi_dsi_driver *drv)h]j )}(h` ``rc_model_size`` Total size of RC model ``flatness_min_qp`` Minimum QP where flatness information is sent ``flatness_max_qp`` Maximum QP where flatness information is sent ``initial_scale_value`` Initial value for the scale factor ``scale_decrement_interval`` Specifies number of group times between decrementing the scale factor at beginning of a slice. ``scale_increment_interval`` Number of group times between incrementing the scale factor value used at the beginning of a slice. ``nfl_bpg_offset`` Non first line BPG offset to be used ``slice_bpg_offset`` BPG offset used to enforce slice bit ``final_offset`` Final RC linear transformation offset value ``vbr_enable`` True if VBR mode is enabled, false if disabled ``mux_word_size`` Mux word size (in bits) for SSM mode ``slice_chunk_size`` The (max) size in bytes of the "chunks" that are used in slice multiplexing. ``rc_bits`` Rate control buffer size in bits ``dsc_version_minor`` DSC minor version ``dsc_version_major`` DSC major version ``native_422`` True if Native 4:2:2 supported, else false ``native_420`` True if Native 4:2:0 supported else false. ``second_line_bpg_offset`` Additional bits/grp for seconnd line of slice for native 4:2:0 ``nsl_bpg_offset`` Num of bits deallocated for each grp that is not in second line of slice ``second_line_offset_adj`` Offset adjustment for second line in Native 4:2:0 modeh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKGhjubjN )}(hXystruct drm_dsc_config { u8 line_buf_depth; u8 bits_per_component; bool convert_rgb; u8 slice_count; u16 slice_width; u16 slice_height; bool simple_422; u16 pic_width; u16 pic_height; u8 rc_tgt_offset_high; u8 rc_tgt_offset_low; u16 bits_per_pixel; u8 rc_edge_factor; u8 rc_quant_incr_limit1; u8 rc_quant_incr_limit0; u16 initial_xmit_delay; u16 initial_dec_delay; bool block_pred_enable; u8 first_line_bpg_offset; u16 initial_offset; u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; u16 rc_model_size; u8 flatness_min_qp; u8 flatness_max_qp; u8 initial_scale_value; u16 scale_decrement_interval; u16 scale_increment_interval; u16 nfl_bpg_offset; u16 slice_bpg_offset; u16 final_offset; bool vbr_enable; u8 mux_word_size; u16 slice_chunk_size; u16 rc_bits; u8 dsc_version_minor; u8 dsc_version_major; bool native_422; bool native_420; u8 second_line_bpg_offset; u16 nsl_bpg_offset; u16 second_line_offset_adj; };h]hXystruct drm_dsc_config { u8 line_buf_depth; u8 bits_per_component; bool convert_rgb; u8 slice_count; u16 slice_width; u16 slice_height; bool simple_422; u16 pic_width; u16 pic_height; u8 rc_tgt_offset_high; u8 rc_tgt_offset_low; u16 bits_per_pixel; u8 rc_edge_factor; u8 rc_quant_incr_limit1; u8 rc_quant_incr_limit0; u16 initial_xmit_delay; u16 initial_dec_delay; bool block_pred_enable; u8 first_line_bpg_offset; u16 initial_offset; u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; u16 rc_model_size; u8 flatness_min_qp; u8 flatness_max_qp; u8 initial_scale_value; u16 scale_decrement_interval; u16 scale_increment_interval; u16 nfl_bpg_offset; u16 slice_bpg_offset; u16 final_offset; bool vbr_enable; u8 mux_word_size; u16 slice_chunk_size; u16 rc_bits; u8 dsc_version_minor; u8 dsc_version_major; bool native_422; bool native_420; u8 second_line_bpg_offset; u16 nsl_bpg_offset; u16 second_line_offset_adj; };}hjsbah}(h]h ]h"]h$]h&]j j uh1jM hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKIhjubh)}(h **Members**h]j3 )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKvhjubjw )}(hhh](j| )}(hM``line_buf_depth`` Bits per component for previous reconstructed line buffer h](j )}(h``line_buf_depth``h]j )}(hjh]hline_buf_depth}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKKhjubj )}(hhh]h)}(h9Bits per component for previous reconstructed line bufferh]h9Bits per component for previous reconstructed line buffer}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hKKhj3ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj2hKKhjubj| )}(h<``bits_per_component`` Bits per component to code (8/10/12) h](j )}(h``bits_per_component``h]j )}(hjVh]hbits_per_component}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjTubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKPhjPubj )}(hhh]h)}(h$Bits per component to code (8/10/12)h]h$Bits per component to code (8/10/12)}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhKPhjlubah}(h]h ]h"]h$]h&]uh1j hjPubeh}(h]h ]h"]h$]h&]uh1j{ hjkhKPhjubj| )}(hm``convert_rgb`` Flag to indicate if RGB - YCoCg conversion is needed True if RGB input, False if YCoCg input h](j )}(h``convert_rgb``h]j )}(hjh]h convert_rgb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKUhjubj )}(hhh]h)}(h\Flag to indicate if RGB - YCoCg conversion is needed True if RGB input, False if YCoCg inputh]h\Flag to indicate if RGB - YCoCg conversion is needed True if RGB input, False if YCoCg input}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKThjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKUhjubj| )}(hB``slice_count`` Number fo slices per line used by the DSC encoder h](j )}(h``slice_count``h]j )}(hjh]h slice_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKZhjubj )}(hhh]h)}(h1Number fo slices per line used by the DSC encoderh]h1Number fo slices per line used by the DSC encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKZhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKZhjubj| )}(h.``slice_width`` Width of each slice in pixels h](j )}(h``slice_width``h]j )}(hjh]h slice_width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhK^hjubj )}(hhh]h)}(hWidth of each slice in pixelsh]hWidth of each slice in pixels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK^hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhK^hjubj| )}(h(``slice_height`` Slice height in pixels h](j )}(h``slice_height``h]j )}(hj;h]h slice_height}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj9ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKbhj5ubj )}(hhh]h)}(hSlice height in pixelsh]hSlice height in pixels}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhKbhjQubah}(h]h ]h"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]uh1j{ hjPhKbhjubj| )}(h?``simple_422`` True if simple 4_2_2 mode is enabled else False h](j )}(h``simple_422``h]j )}(hjth]h simple_422}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKfhjnubj )}(hhh]h)}(h/True if simple 4_2_2 mode is enabled else Falseh]h/True if simple 4_2_2 mode is enabled else False}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKfhjubah}(h]h ]h"]h$]h&]uh1j hjnubeh}(h]h ]h"]h$]h&]uh1j{ hjhKfhjubj| )}(h9``pic_width`` Width of the input display frame in pixels h](j )}(h ``pic_width``h]j )}(hjh]h pic_width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKjhjubj )}(hhh]h)}(h*Width of the input display frame in pixelsh]h*Width of the input display frame in pixels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKjhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKjhjubj| )}(h:``pic_height`` Vertical height of the input display frame h](j )}(h``pic_height``h]j )}(hjh]h pic_height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKnhjubj )}(hhh]h)}(h*Vertical height of the input display frameh]h*Vertical height of the input display frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKnhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKnhjubj| )}(hR``rc_tgt_offset_high`` Offset to bits/group used by RC to determine QP adjustment h](j )}(h``rc_tgt_offset_high``h]j )}(hjh]hrc_tgt_offset_high}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKrhjubj )}(hhh]h)}(h:Offset to bits/group used by RC to determine QP adjustmenth]h:Offset to bits/group used by RC to determine QP adjustment}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hKrhj5ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj4hKrhjubj| )}(hQ``rc_tgt_offset_low`` Offset to bits/group used by RC to determine QP adjustment h](j )}(h``rc_tgt_offset_low``h]j )}(hjXh]hrc_tgt_offset_low}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKwhjRubj )}(hhh]h)}(h:Offset to bits/group used by RC to determine QP adjustmenth]h:Offset to bits/group used by RC to determine QP adjustment}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhKwhjnubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjmhKwhjubj| )}(hU``bits_per_pixel`` Target bits per pixel with 4 fractional bits, bits_per_pixel << 4 h](j )}(h``bits_per_pixel``h]j )}(hjh]hbits_per_pixel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhK|hjubj )}(hhh]h)}(hATarget bits per pixel with 4 fractional bits, bits_per_pixel << 4h]hATarget bits per pixel with 4 fractional bits, bits_per_pixel << 4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK|hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhK|hjubj| )}(hX``rc_edge_factor`` Factor to determine if an edge is present based on the bits produced h](j )}(h``rc_edge_factor``h]j )}(hjh]hrc_edge_factor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(hDFactor to determine if an edge is present based on the bits producedh]hDFactor to determine if an edge is present based on the bits produced}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(hR``rc_quant_incr_limit1`` Slow down incrementing once the range reaches this value h](j )}(h``rc_quant_incr_limit1``h]j )}(hjh]hrc_quant_incr_limit1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h8Slow down incrementing once the range reaches this valueh]h8Slow down incrementing once the range reaches this value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(hR``rc_quant_incr_limit0`` Slow down incrementing once the range reaches this value h](j )}(h``rc_quant_incr_limit0``h]j )}(hj<h]hrc_quant_incr_limit0}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj6ubj )}(hhh]h)}(h8Slow down incrementing once the range reaches this valueh]h8Slow down incrementing once the range reaches this value}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhKhjRubah}(h]h ]h"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]uh1j{ hjQhKhjubj| )}(hJ``initial_xmit_delay`` Number of pixels to delay the initial transmission h](j )}(h``initial_xmit_delay``h]j )}(hjuh]hinitial_xmit_delay}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjoubj )}(hhh]h)}(h2Number of pixels to delay the initial transmissionh]h2Number of pixels to delay the initial transmission}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjoubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h``initial_dec_delay`` Initial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. h](j )}(h``initial_dec_delay``h]j )}(hjh]hinitial_dec_delay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(hInitial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.h]hInitial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(hs``block_pred_enable`` True if block prediction is used to code any groups within the picture. False if BP not used h](j )}(h``block_pred_enable``h]j )}(hjh]hblock_pred_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h\True if block prediction is used to code any groups within the picture. False if BP not usedh]h\True if block prediction is used to code any groups within the picture. False if BP not used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(hi``first_line_bpg_offset`` Number of additional bits allocated for each group on the first line of slice. h](j )}(h``first_line_bpg_offset``h]j )}(hj"h]hfirst_line_bpg_offset}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(hNNumber of additional bits allocated for each group on the first line of slice.h]hNNumber of additional bits allocated for each group on the first line of slice.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj8ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj7hKhjubj| )}(hC``initial_offset`` Value to use for RC model offset at slice start h](j )}(h``initial_offset``h]j )}(hj\h]hinitial_offset}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjVubj )}(hhh]h)}(h/Value to use for RC model offset at slice starth]h/Value to use for RC model offset at slice start}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhKhjrubah}(h]h ]h"]h$]h&]uh1j hjVubeh}(h]h ]h"]h$]h&]uh1j{ hjqhKhjubj| )}(h@``rc_buf_thresh`` Thresholds defining each of the buffer ranges h](j )}(h``rc_buf_thresh``h]j )}(hjh]h rc_buf_thresh}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h-Thresholds defining each of the buffer rangesh]h-Thresholds defining each of the buffer ranges}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h``rc_range_params`` Parameters for each of the RC ranges defined in :c:type:`struct drm_dsc_rc_range_parameters ` h](j )}(h``rc_range_params``h]j )}(hjh]hrc_range_params}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(hzParameters for each of the RC ranges defined in :c:type:`struct drm_dsc_rc_range_parameters `h](h0Parameters for each of the RC ranges defined in }(hjhhhNhNubh)}(hJ:c:type:`struct drm_dsc_rc_range_parameters `h]j )}(hjh]h"struct drm_dsc_rc_range_parameters}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_rc_range_parametersuh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubeh}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h)``rc_model_size`` Total size of RC model h](j )}(h``rc_model_size``h]j )}(hj'h]h rc_model_size}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj!ubj )}(hhh]h)}(hTotal size of RC modelh]hTotal size of RC model}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hKhj=ubah}(h]h ]h"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]uh1j{ hj<hKhjubj| )}(hB``flatness_min_qp`` Minimum QP where flatness information is sent h](j )}(h``flatness_min_qp``h]j )}(hj`h]hflatness_min_qp}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj^ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjZubj )}(hhh]h)}(h-Minimum QP where flatness information is senth]h-Minimum QP where flatness information is sent}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhKhjvubah}(h]h ]h"]h$]h&]uh1j hjZubeh}(h]h ]h"]h$]h&]uh1j{ hjuhKhjubj| )}(hB``flatness_max_qp`` Maximum QP where flatness information is sent h](j )}(h``flatness_max_qp``h]j )}(hjh]hflatness_max_qp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h-Maximum QP where flatness information is senth]h-Maximum QP where flatness information is sent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h;``initial_scale_value`` Initial value for the scale factor h](j )}(h``initial_scale_value``h]j )}(hjh]hinitial_scale_value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h"Initial value for the scale factorh]h"Initial value for the scale factor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h|``scale_decrement_interval`` Specifies number of group times between decrementing the scale factor at beginning of a slice. h](j )}(h``scale_decrement_interval``h]j )}(hj h]hscale_decrement_interval}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h^Specifies number of group times between decrementing the scale factor at beginning of a slice.h]h^Specifies number of group times between decrementing the scale factor at beginning of a slice.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj!ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hKhjubj| )}(h``scale_increment_interval`` Number of group times between incrementing the scale factor value used at the beginning of a slice. h](j )}(h``scale_increment_interval``h]j )}(hjEh]hscale_increment_interval}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj?ubj )}(hhh]h)}(hcNumber of group times between incrementing the scale factor value used at the beginning of a slice.h]hcNumber of group times between incrementing the scale factor value used at the beginning of a slice.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj[ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hjZhKhjubj| )}(h8``nfl_bpg_offset`` Non first line BPG offset to be used h](j )}(h``nfl_bpg_offset``h]j )}(hjh]hnfl_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj}ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjyubj )}(hhh]h)}(h$Non first line BPG offset to be usedh]h$Non first line BPG offset to be used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjyubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h:``slice_bpg_offset`` BPG offset used to enforce slice bit h](j )}(h``slice_bpg_offset``h]j )}(hjh]hslice_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h$BPG offset used to enforce slice bith]h$BPG offset used to enforce slice bit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h=``final_offset`` Final RC linear transformation offset value h](j )}(h``final_offset``h]j )}(hjh]h final_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h+Final RC linear transformation offset valueh]h+Final RC linear transformation offset value}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h>``vbr_enable`` True if VBR mode is enabled, false if disabled h](j )}(h``vbr_enable``h]j )}(hj*h]h vbr_enable}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj$ubj )}(hhh]h)}(h.True if VBR mode is enabled, false if disabledh]h.True if VBR mode is enabled, false if disabled}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hKhj@ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj?hKhjubj| )}(h7``mux_word_size`` Mux word size (in bits) for SSM mode h](j )}(h``mux_word_size``h]j )}(hjch]h mux_word_size}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj]ubj )}(hhh]h)}(h$Mux word size (in bits) for SSM modeh]h$Mux word size (in bits) for SSM mode}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhKhjyubah}(h]h ]h"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]uh1j{ hjxhKhjubj| )}(hb``slice_chunk_size`` The (max) size in bytes of the "chunks" that are used in slice multiplexing. h](j )}(h``slice_chunk_size``h]j )}(hjh]hslice_chunk_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(hLThe (max) size in bytes of the "chunks" that are used in slice multiplexing.h]hPThe (max) size in bytes of the “chunks” that are used in slice multiplexing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h-``rc_bits`` Rate control buffer size in bits h](j )}(h ``rc_bits``h]j )}(hjh]hrc_bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h Rate control buffer size in bitsh]h Rate control buffer size in bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h(``dsc_version_minor`` DSC minor version h](j )}(h``dsc_version_minor``h]j )}(hjh]hdsc_version_minor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj ubj )}(hhh]h)}(hDSC minor versionh]hDSC minor version}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj%ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hKhjubj| )}(h(``dsc_version_major`` DSC major version h](j )}(h``dsc_version_major``h]j )}(hjHh]hdsc_version_major}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjFubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjBubj )}(hhh]h)}(hDSC major versionh]hDSC major version}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hKhj^ubah}(h]h ]h"]h$]h&]uh1j hjBubeh}(h]h ]h"]h$]h&]uh1j{ hj]hKhjubj| )}(h:``native_422`` True if Native 4:2:2 supported, else false h](j )}(h``native_422``h]j )}(hjh]h native_422}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhj{ubj )}(hhh]h)}(h*True if Native 4:2:2 supported, else falseh]h*True if Native 4:2:2 supported, else false}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hj{ubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(h:``native_420`` True if Native 4:2:0 supported else false. h](j )}(h``native_420``h]j )}(hjh]h native_420}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKhjubj )}(hhh]h)}(h*True if Native 4:2:0 supported else false.h]h*True if Native 4:2:0 supported else false.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKhjubj| )}(hZ``second_line_bpg_offset`` Additional bits/grp for seconnd line of slice for native 4:2:0 h](j )}(h``second_line_bpg_offset``h]j )}(hjh]hsecond_line_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubj )}(hhh]h)}(h>Additional bits/grp for seconnd line of slice for native 4:2:0h]h>Additional bits/grp for seconnd line of slice for native 4:2:0}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h\``nsl_bpg_offset`` Num of bits deallocated for each grp that is not in second line of slice h](j )}(h``nsl_bpg_offset``h]j )}(hj,h]hnsl_bpg_offset}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj*ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj&ubj )}(hhh]h)}(hHNum of bits deallocated for each grp that is not in second line of sliceh]hHNum of bits deallocated for each grp that is not in second line of slice}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjBubah}(h]h ]h"]h$]h&]uh1j hj&ubeh}(h]h ]h"]h$]h&]uh1j{ hjAhMhjubj| )}(hQ``second_line_offset_adj`` Offset adjustment for second line in Native 4:2:0 modeh](j )}(h``second_line_offset_adj``h]j )}(hjfh]hsecond_line_offset_adj}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM hj`ubj )}(hhh]h)}(h6Offset adjustment for second line in Native 4:2:0 modeh]h6Offset adjustment for second line in Native 4:2:0 mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM hj|ubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj{hM hjubeh}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhjhNubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjhhubh)}(h{Driver populates this structure with all the parameters required to configure the display stream compression on the source.h]h{Driver populates this structure with all the parameters required to configure the display stream compression on the source.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKDhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dsc_picture_parameter_set (C struct)c.drm_dsc_picture_parameter_sethNtauh1j hjhhhjhNubj )}(hhh](j )}(hdrm_dsc_picture_parameter_seth]j )}(h$struct drm_dsc_picture_parameter_seth](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhKJubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhKJubj )}(hdrm_dsc_picture_parameter_seth]j )}(hjh]hdrm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhKJubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhKJubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhKJhjhhubj )}(hhh]h)}(h-Represents 128 bytes of Picture Parameter Seth]h-Represents 128 bytes of Picture Parameter Set}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj&hhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhKJubeh}(h]h ](j structeh"]h$]h&]j" j j# jAj$ jAj% j& j' uh1j hhhjhjhNubj) )}(hXk**Definition**:: struct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; }; **Members** ``dsc_version`` PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC ``pps_identifier`` PPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables. ``pps_reserved`` PPS2[7:0]- RESERVED Byte ``pps_3`` PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2) ``pps_4`` PPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits ``bits_per_pixel_low`` PPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element. ``pic_height`` PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster. ``pic_width`` PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster. ``slice_height`` PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. ``slice_width`` PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. ``chunk_size`` PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing. ``initial_xmit_delay_high`` PPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved ``initial_xmit_delay_low`` PPS17[7:0] - Least significant 8 bits of initial transmission delay. ``initial_dec_delay`` PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. ``pps20_reserved`` PPS20[7:0] - Reserved ``initial_scale_value`` PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved ``scale_increment_interval`` PPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice. ``scale_decrement_interval_high`` PPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved ``scale_decrement_interval_low`` PPS25[7:0] - Lower 8 bits of scale decrement interval ``pps26_reserved`` PPS26[7:0] ``first_line_bpg_offset`` PPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved ``nfl_bpg_offset`` PPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice. ``slice_bpg_offset`` PPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint. ``initial_offset`` PPS32,33[7:0] - Initial value for rcXformOffset ``final_offset`` PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset ``flatness_min_qp`` PPS36[4:0] - Minimum QP at which flatness is signaled and flatness QP adjustment is made. PPS36[7:5] - Reserved ``flatness_max_qp`` PPS37[4:0] - Max QP at which flatness is signalled and the flatness adjustment is made. PPS37[7:5] - Reserved ``rc_model_size`` PPS38,39[7:0] - Number of bits within RC Model. ``rc_edge_factor`` PPS40[3:0] - Ratio of current activity vs, previous activity to determine presence of edge. PPS40[7:4] - Reserved ``rc_quant_incr_limit0`` PPS41[4:0] - QP threshold used in short term RC PPS41[7:5] - Reserved ``rc_quant_incr_limit1`` PPS42[4:0] - QP threshold used in short term RC PPS42[7:5] - Reserved ``rc_tgt_offset`` PPS43[3:0] - Lower end of the variability range around the target bits per group that is allowed by short term RC. PPS43[7:4]- Upper end of the variability range around the target bits per group that i allowed by short term rc. ``rc_buf_thresh`` PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for the 15 ranges defined by 14 thresholds. ``rc_range_parameters`` PPS58[7:0] - PPS87[7:0] Parameters that correspond to each of the 15 ranges. ``native_422_420`` PPS88[0] - 0 = Native 4:2:2 not used 1 = Native 4:2:2 used PPS88[1] - 0 = Native 4:2:0 not use 1 = Native 4:2:0 used PPS88[7:2] - Reserved 6 bits ``second_line_bpg_offset`` PPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reserved ``nsl_bpg_offset`` PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice. ``second_line_offset_adj`` PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode. ``pps_long_94_reserved`` PPS 94, 95, 96, 97 - Reserved ``pps_long_98_reserved`` PPS 98, 99, 100, 101 - Reserved ``pps_long_102_reserved`` PPS 102, 103, 104, 105 - Reserved ``pps_long_106_reserved`` PPS 106, 107, 108, 109 - reserved ``pps_long_110_reserved`` PPS 110, 111, 112, 113 - reserved ``pps_long_114_reserved`` PPS 114 - 117 - reserved ``pps_long_118_reserved`` PPS 118 - 121 - reserved ``pps_long_122_reserved`` PPS 122- 125 - reserved ``pps_short_126_reserved`` PPS 126, 127 - reservedh](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubh:}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjEubjN )}(hXVstruct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; };h]hXVstruct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; };}hjfsbah}(h]h ]h"]h$]h&]j j uh1jM hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjEubh)}(h **Members**h]j3 )}(hjwh]hMembers}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjuubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMIhjEubjw )}(hhh](j| )}(h``dsc_version`` PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC h](j )}(h``dsc_version``h]j )}(hjh]h dsc_version}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubj )}(hhh]h)}(hyPPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSCh]hyPPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``pps_identifier`` PPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables. h](j )}(h``pps_identifier``h]j )}(hjh]hpps_identifier}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM%hjubj )}(hhh]h)}(hkPPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables.h]hkPPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM$hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM%hjubj| )}(h*``pps_reserved`` PPS2[7:0]- RESERVED Byte h](j )}(h``pps_reserved``h]j )}(hj h]h pps_reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM*hjubj )}(hhh]h)}(hPPS2[7:0]- RESERVED Byteh]hPPS2[7:0]- RESERVED Byte}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM*hj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM*hjubj| )}(hX``pps_3`` PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2) h](j )}(h ``pps_3``h]j )}(hjCh]hpps_3}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM7hj=ubj )}(hhh]h)}(hXPPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2)h]hXPPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2)}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM/hjYubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hjXhM7hjubj| )}(hX``pps_4`` PPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits h](j )}(h ``pps_4``h]j )}(hj}h]hpps_4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMEhjwubj )}(hhh]h)}(hXPPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bitsh]hXPPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM<hjubah}(h]h ]h"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]uh1j{ hjhMEhjubj| )}(h``bits_per_pixel_low`` PPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element. h](j )}(h``bits_per_pixel_low``h]j )}(hjh]hbits_per_pixel_low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMKhjubj )}(hhh]h)}(hjPPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element.h]hjPPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMJhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMKhjubj| )}(hg``pic_height`` PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster. h](j )}(h``pic_height``h]j )}(hjh]h pic_height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMQhjubj )}(hhh]h)}(hWPPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster.h]hWPPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMPhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMQhjubj| )}(h[``pic_width`` PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster. h](j )}(h ``pic_width``h]j )}(hj+h]h pic_width}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMWhj%ubj )}(hhh]h)}(hLPPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster.h]hLPPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMVhjAubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj@hMWhjubj| )}(hK``slice_height`` PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. h](j )}(h``slice_height``h]j )}(hjeh]h slice_height}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j hjcubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM\hj_ubj )}(hhh]h)}(h9PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.h]h9PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhM\hj{ubah}(h]h ]h"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]uh1j{ hjzhM\hjubj| )}(hI``slice_width`` PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. h](j )}(h``slice_width``h]j )}(hjh]h slice_width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMahjubj )}(hhh]h)}(h8PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.h]h8PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMahjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMahjubj| )}(hs``chunk_size`` PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing. h](j )}(h``chunk_size``h]j )}(hjh]h chunk_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMghjubj )}(hhh]h)}(hcPPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing.h]hcPPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMfhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMghjubj| )}(h``initial_xmit_delay_high`` PPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved h](j )}(h``initial_xmit_delay_high``h]j )}(hjh]hinitial_xmit_delay_high}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMohj ubj )}(hhh]h)}(hPPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reservedh]hPPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMlhj'ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj&hMohjubj| )}(h```initial_xmit_delay_low`` PPS17[7:0] - Least significant 8 bits of initial transmission delay. h](j )}(h``initial_xmit_delay_low``h]j )}(hjKh]hinitial_xmit_delay_low}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjIubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMthjEubj )}(hhh]h)}(hDPPS17[7:0] - Least significant 8 bits of initial transmission delay.h]hDPPS17[7:0] - Least significant 8 bits of initial transmission delay.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMthjaubah}(h]h ]h"]h$]h&]uh1j hjEubeh}(h]h ]h"]h$]h&]uh1j{ hj`hMthjubj| )}(h``initial_dec_delay`` PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. h](j )}(h``initial_dec_delay``h]j )}(hjh]hinitial_dec_delay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM{hj~ubj )}(hhh]h)}(hPPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.h]hPPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMyhjubah}(h]h ]h"]h$]h&]uh1j hj~ubeh}(h]h ]h"]h$]h&]uh1j{ hjhM{hjubj| )}(h)``pps20_reserved`` PPS20[7:0] - Reserved h](j )}(h``pps20_reserved``h]j )}(hjh]hpps20_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubj )}(hhh]h)}(hPPS20[7:0] - Reservedh]hPPS20[7:0] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hu``initial_scale_value`` PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved h](j )}(h``initial_scale_value``h]j )}(hjh]hinitial_scale_value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubj )}(hhh]h)}(h\PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reservedh]h\PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(h``scale_increment_interval`` PPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice. h](j )}(h``scale_increment_interval``h]j )}(hj1h]hscale_increment_interval}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj+ubj )}(hhh]h)}(hnPPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice.h]hnPPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjGubah}(h]h ]h"]h$]h&]uh1j hj+ubeh}(h]h ]h"]h$]h&]uh1j{ hjFhMhjubj| )}(h``scale_decrement_interval_high`` PPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved h](j )}(h!``scale_decrement_interval_high``h]j )}(hjkh]hscale_decrement_interval_high}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjiubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjeubj )}(hhh]h)}(hPPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reservedh]hPPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hW``scale_decrement_interval_low`` PPS25[7:0] - Lower 8 bits of scale decrement interval h](j )}(h ``scale_decrement_interval_low``h]j )}(hjh]hscale_decrement_interval_low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubj )}(hhh]h)}(h5PPS25[7:0] - Lower 8 bits of scale decrement intervalh]h5PPS25[7:0] - Lower 8 bits of scale decrement interval}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``pps26_reserved`` PPS26[7:0] h](j )}(h``pps26_reserved``h]j )}(hjh]hpps26_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjubj )}(hhh]h)}(h PPS26[7:0]h]h PPS26[7:0]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(h``first_line_bpg_offset`` PPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved h](j )}(h``first_line_bpg_offset``h]j )}(hj h]hfirst_line_bpg_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubj )}(hhh]h)}(hxPPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reservedh]hxPPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj- ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj, hMhjubj| )}(h``nfl_bpg_offset`` PPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice. h](j )}(h``nfl_bpg_offset``h]j )}(hjQ h]hnfl_bpg_offset}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjO ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjK ubj )}(hhh]h)}(hPPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice.h]hPPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice.}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjg ubah}(h]h ]h"]h$]h&]uh1j hjK ubeh}(h]h ]h"]h$]h&]uh1j{ hjf hMhjubj| )}(h}``slice_bpg_offset`` PPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint. h](j )}(h``slice_bpg_offset``h]j )}(hj h]hslice_bpg_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubj )}(hhh]h)}(hgPPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint.h]hgPPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(hC``initial_offset`` PPS32,33[7:0] - Initial value for rcXformOffset h](j )}(h``initial_offset``h]j )}(hj h]hinitial_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubj )}(hhh]h)}(h/PPS32,33[7:0] - Initial value for rcXformOffseth]h/PPS32,33[7:0] - Initial value for rcXformOffset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(hN``final_offset`` PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset h](j )}(h``final_offset``h]j )}(hj h]h final_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubj )}(hhh]h)}(h ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj: ubj )}(hhh]h)}(hPPS88[0] - 0 = Native 4:2:2 not used 1 = Native 4:2:2 used PPS88[1] - 0 = Native 4:2:0 not use 1 = Native 4:2:0 used PPS88[7:2] - Reserved 6 bitsh]hPPS88[0] - 0 = Native 4:2:2 not used 1 = Native 4:2:2 used PPS88[1] - 0 = Native 4:2:0 not use 1 = Native 4:2:0 used PPS88[7:2] - Reserved 6 bits}(hjY hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjV ubah}(h]h ]h"]h$]h&]uh1j hj: ubeh}(h]h ]h"]h$]h&]uh1j{ hjU hMhjubj| )}(h``second_line_bpg_offset`` PPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reserved h](j )}(h``second_line_bpg_offset``h]j )}(hjz h]hsecond_line_bpg_offset}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjx ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjt ubj )}(hhh]h)}(hPPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reservedh]hPPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubah}(h]h ]h"]h$]h&]uh1j hjt ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(h``nsl_bpg_offset`` PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice. h](j )}(h``nsl_bpg_offset``h]j )}(hj h]hnsl_bpg_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubj )}(hhh]h)}(hvPPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice.h]hvPPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM hj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(hx``second_line_offset_adj`` PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode. h](j )}(h``second_line_offset_adj``h]j )}(hj h]hsecond_line_offset_adj}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubj )}(hhh]h)}(h\PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode.h]h\PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhjubj| )}(h7``pps_long_94_reserved`` PPS 94, 95, 96, 97 - Reserved h](j )}(h``pps_long_94_reserved``h]j )}(hj( h]hpps_long_94_reserved}(hj* hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj& ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj" ubj )}(hhh]h)}(hPPS 94, 95, 96, 97 - Reservedh]hPPS 94, 95, 96, 97 - Reserved}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj= hMhj> ubah}(h]h ]h"]h$]h&]uh1j hj" ubeh}(h]h ]h"]h$]h&]uh1j{ hj= hMhjubj| )}(h9``pps_long_98_reserved`` PPS 98, 99, 100, 101 - Reserved h](j )}(h``pps_long_98_reserved``h]j )}(hja h]hpps_long_98_reserved}(hjc hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_ ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhj[ ubj )}(hhh]h)}(hPPS 98, 99, 100, 101 - Reservedh]hPPS 98, 99, 100, 101 - Reserved}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjv hMhjw ubah}(h]h ]h"]h$]h&]uh1j hj[ ubeh}(h]h ]h"]h$]h&]uh1j{ hjv hMhjubj| )}(h<``pps_long_102_reserved`` PPS 102, 103, 104, 105 - Reserved h](j )}(h``pps_long_102_reserved``h]j )}(hj h]hpps_long_102_reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM#hj ubj )}(hhh]h)}(h!PPS 102, 103, 104, 105 - Reservedh]h!PPS 102, 103, 104, 105 - Reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM#hj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hM#hjubj| )}(h<``pps_long_106_reserved`` PPS 106, 107, 108, 109 - reserved h](j )}(h``pps_long_106_reserved``h]j )}(hj h]hpps_long_106_reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM(hj ubj )}(hhh]h)}(h!PPS 106, 107, 108, 109 - reservedh]h!PPS 106, 107, 108, 109 - reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM(hj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hM(hjubj| )}(h<``pps_long_110_reserved`` PPS 110, 111, 112, 113 - reserved h](j )}(h``pps_long_110_reserved``h]j )}(hj h]hpps_long_110_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM-hjubj )}(hhh]h)}(h!PPS 110, 111, 112, 113 - reservedh]h!PPS 110, 111, 112, 113 - reserved}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hM-hj"ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj!hM-hjubj| )}(h3``pps_long_114_reserved`` PPS 114 - 117 - reserved h](j )}(h``pps_long_114_reserved``h]j )}(hjEh]hpps_long_114_reserved}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjCubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM2hj?ubj )}(hhh]h)}(hPPS 114 - 117 - reservedh]hPPS 114 - 117 - reserved}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhM2hj[ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hjZhM2hjubj| )}(h3``pps_long_118_reserved`` PPS 118 - 121 - reserved h](j )}(h``pps_long_118_reserved``h]j )}(hj~h]hpps_long_118_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj|ubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM7hjxubj )}(hhh]h)}(hPPS 118 - 121 - reservedh]hPPS 118 - 121 - reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1j hjxubeh}(h]h ]h"]h$]h&]uh1j{ hjhM7hjubj| )}(h2``pps_long_122_reserved`` PPS 122- 125 - reserved h](j )}(h``pps_long_122_reserved``h]j )}(hjh]hpps_long_122_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM<hjubj )}(hhh]h)}(hPPS 122- 125 - reservedh]hPPS 122- 125 - reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM<hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM<hjubj| )}(h2``pps_short_126_reserved`` PPS 126, 127 - reservedh](j )}(h``pps_short_126_reserved``h]j )}(hjh]hpps_short_126_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhM@hjubj )}(hhh]h)}(hPPS 126, 127 - reservedh]hPPS 126, 127 - reserved}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMAhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM@hjubeh}(h]h ]h"]h$]h&]uh1jv hjEubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhjhNubh)}(h**Description**h]j3 )}(hj3h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj1ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMDhjhhubh)}(hXlThe VESA DSC standard defines picture parameter set (PPS) which display stream compression encoders must communicate to decoders. The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. The PPS fields that span over more than a byte should be stored in Big Endian format.h]hXlThe VESA DSC standard defines picture parameter set (PPS) which display stream compression encoders must communicate to decoders. The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. The PPS fields that span over more than a byte should be stored in Big Endian format.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dsc_pps_infoframe (C struct)c.drm_dsc_pps_infoframehNtauh1j hjhhhjhNubj )}(hhh](j )}(hdrm_dsc_pps_infoframeh]j )}(hstruct drm_dsc_pps_infoframeh](j )}(hj h]hstruct}(hjqhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmhhhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjmhhhj~hMubj )}(hdrm_dsc_pps_infoframeh]j )}(hjkh]hdrm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjmhhhj~hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjihhhj~hMubah}(h]jdah ](j j eh"]h$]h&]j j )j huh1j hj~hMhjfhhubj )}(hhh]h)}(h9DSC infoframe carrying the Picture Parameter Set Metadatah]h9DSC infoframe carrying the Picture Parameter Set Metadata}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMGhjhhubah}(h]h ]h"]h$]h&]uh1j hjfhhhj~hMubeh}(h]h ](j structeh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhjhNubj) )}(hX**Definition**:: struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; }; **Members** ``pps_header`` Header for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header ` ``pps_payload`` PPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](h)}(h**Definition**::h](j3 )}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMKhjubjN )}(h|struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; };h]h|struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; };}hjsbah}(h]h ]h"]h$]h&]j j uh1jM hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMMhjubh)}(h **Members**h]j3 )}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMRhjubjw )}(hhh](j| )}(hq``pps_header`` Header for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header ` h](j )}(h``pps_header``h]j )}(hj h]h pps_header}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMRhjubj )}(hhh]h)}(haHeader for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header `h](h3Header for PPS as per DP SDP header format of type }(hj9hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]j )}(hjCh]hstruct dp_sdp_header}(hjEhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMQhj9ubeh}(h]h ]h"]h$]h&]uh1hhj`hMQhj6ubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hj5hMRhjubj| )}(h``pps_payload`` PPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](j )}(h``pps_payload``h]j )}(hjyh]h pps_payload}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjwubah}(h]h ]h"]h$]h&]uh1j hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMShjsubj )}(hhh]h)}(hPPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](hHPPS payload fields as per DSC specification Table 4-1 as represented in }(hjhhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]j )}(hjh]h$struct drm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_picture_parameter_setuh1hhjhMShjubeh}(h]h ]h"]h$]h&]uh1hhjhMShjubah}(h]h ]h"]h$]h&]uh1j hjsubeh}(h]h ]h"]h$]h&]uh1j{ hjhMShjubeh}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhjhNubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMWhjhhubh)}(hXThis structure represents the DSC PPS infoframe required to send the Picture Parameter Set metadata required before enabling VESA Display Stream Compression. This is based on the DP Secondary Data Packet structure and comprises of SDP Header as defined :c:type:`struct dp_sdp_header ` in drm_dp_helper.h and PPS payload defined in :c:type:`struct drm_dsc_picture_parameter_set `.h](hThis structure represents the DSC PPS infoframe required to send the Picture Parameter Set metadata required before enabling VESA Display Stream Compression. This is based on the DP Secondary Data Packet structure and comprises of SDP Header as defined }(hjhhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]j )}(hjh]hstruct dp_sdp_header}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:365: ./include/drm/display/drm_dsc.hhMHhjubh/ in drm_dp_helper.h and PPS payload defined in }(hjhhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]j )}(hjh]h$struct drm_dsc_picture_parameter_set}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_picture_parameter_setuh1hhjhMHhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMHhjhhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_dsc_dp_pps_header_init (C function)c.drm_dsc_dp_pps_header_inithNtauh1j hjhhhNhNubj )}(hhh](j )}(hBvoid drm_dsc_dp_pps_header_init (struct dp_sdp_header *pps_header)h]j )}(hAvoid drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header)h](j)}(hvoidh]hvoid}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK$ubj )}(h h]h }(hjmhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjlhK$ubj )}(hdrm_dsc_dp_pps_header_inith]j )}(hdrm_dsc_dp_pps_header_inith]hdrm_dsc_dp_pps_header_init}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZhhhjlhK$ubj)}(h"(struct dp_sdp_header *pps_header)h]j)}(h struct dp_sdp_header *pps_headerh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(h dp_sdp_headerh]h dp_sdp_header}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dsc_dp_pps_header_initasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(h pps_headerh]h pps_header}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjZhhhjlhK$ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjVhhhjlhK$ubah}(h]jQah ](j j eh"]h$]h&]j j )j huh1j hjlhK$hjShhubj )}(hhh]h)}(hBInitializes the PPS Header for DisplayPort as per the DP 1.4 spec.h]hBInitializes the PPS Header for DisplayPort as per the DP 1.4 spec.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK$hjhhubah}(h]h ]h"]h$]h&]uh1j hjShhhjlhK$ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j6j$ j6j% j& j' uh1j hhhjhNhNubj) )}(hX**Parameters** ``struct dp_sdp_header *pps_header`` Secondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header ` **Description** DP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in :c:type:`struct dp_sdp_header `.h](h)}(h**Parameters**h]j3 )}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK(hj:ubjw )}(hhh]j| )}(h``struct dp_sdp_header *pps_header`` Secondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header ` h](j )}(h$``struct dp_sdp_header *pps_header``h]j )}(hj_h]h struct dp_sdp_header *pps_header}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK'hjYubj )}(hhh]h)}(hwSecondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header `h](hISecondary data packet header for DSC Picture Parameter Set as defined in }(hjxhhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]j )}(hjh]hstruct dp_sdp_header}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK&hjxubeh}(h]h ]h"]h$]h&]uh1hhjhK&hjuubah}(h]h ]h"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]uh1j{ hjthK'hjVubah}(h]h ]h"]h$]h&]uh1jv hj:ubh)}(h**Description**h]j3 )}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK)hj:ubh)}(hDP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in :c:type:`struct dp_sdp_header `.h](hDP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in }(hjhhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]j )}(hjh]hstruct dp_sdp_header}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j dp_sdp_headeruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK(hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK(hj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dsc_dp_rc_buffer_size (C function)c.drm_dsc_dp_rc_buffer_sizehNtauh1j hjhhhNhNubj )}(hhh](j )}(hJint drm_dsc_dp_rc_buffer_size (u8 rc_buffer_block_size, u8 rc_buffer_size)h]j )}(hIint drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8 rc_buffer_size)h](j)}(hinth]hint}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK8ubj )}(h h]h }(hj1hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhj0hK8ubj )}(hdrm_dsc_dp_rc_buffer_sizeh]j )}(hdrm_dsc_dp_rc_buffer_sizeh]hdrm_dsc_dp_rc_buffer_size}(hjChhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhj0hK8ubj)}(h,(u8 rc_buffer_block_size, u8 rc_buffer_size)h](j)}(hu8 rc_buffer_block_sizeh](h)}(hhh]j )}(hu8h]hu8}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]j%)}jjEsbc.drm_dsc_dp_rc_buffer_sizeasbuh1hhj[ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(hrc_buffer_block_sizeh]hrc_buffer_block_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjWubj)}(hu8 rc_buffer_sizeh](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j~c.drm_dsc_dp_rc_buffer_sizeasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hrc_buffer_sizeh]hrc_buffer_size}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjWubeh}(h]h ]h"]h$]h&]j j uh1jhjhhhj0hK8ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhj0hK8ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hj0hK8hjhhubj )}(hhh]h)}(hget rc buffer size in bytesh]hget rc buffer size in bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK8hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhj0hK8ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``u8 rc_buffer_block_size`` block size code, according to DPCD offset 62h ``u8 rc_buffer_size`` number of blocks - 1, according to DPCD offset 63h **Return** buffer size in bytes, or 0 on invalid inputh](h)}(h**Parameters**h]j3 )}(hj$h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK` ``const struct drm_dsc_config *dsc_cfg`` DSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config ` **Description** DSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.h](h)}(h**Parameters**h]j3 )}(hjih]h Parameters}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjgubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chKWhjcubjw )}(hhh](j| )}(h``struct drm_dsc_picture_parameter_set *pps_payload`` Bitwise struct for DSC Picture Parameter Set. This is defined by :c:type:`struct drm_dsc_picture_parameter_set ` h](j )}(h5``struct drm_dsc_picture_parameter_set *pps_payload``h]j )}(hjh]h1struct drm_dsc_picture_parameter_set *pps_payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chKVhjubj )}(hhh]h)}(hBitwise struct for DSC Picture Parameter Set. This is defined by :c:type:`struct drm_dsc_picture_parameter_set `h](hABitwise struct for DSC Picture Parameter Set. This is defined by }(hjhhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]j )}(hjh]h$struct drm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_picture_parameter_setuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chKUhjubeh}(h]h ]h"]h$]h&]uh1hhjhKUhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKVhjubj| )}(h``const struct drm_dsc_config *dsc_cfg`` DSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config ` h](j )}(h(``const struct drm_dsc_config *dsc_cfg``h]j )}(hjh]h$const struct drm_dsc_config *dsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chKYhjubj )}(hhh]h)}(hfDSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config `h](h6DSC Configuration data filled by driver as defined by }(hjhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]j )}(hjh]hstruct drm_dsc_config}(hjhhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_dsc_configuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chKXhjubeh}(h]h ]h"]h$]h&]uh1hhj!hKXhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhKYhjubeh}(h]h ]h"]h$]h&]uh1jv hjcubh)}(h**Description**h]j3 )}(hj<h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK[hjcubh)}(hXwDSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.h]hXwDSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chK[hjcubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_dsc_set_const_params (C function)c.drm_dsc_set_const_paramshNtauh1j hjhhhNhNubj )}(hhh](j )}(h?void drm_dsc_set_const_params (struct drm_dsc_config *vdsc_cfg)h]j )}(h>void drm_dsc_set_const_params(struct drm_dsc_config *vdsc_cfg)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}hhhjhMubj )}(hdrm_dsc_set_const_paramsh]j )}(hdrm_dsc_set_const_paramsh]hdrm_dsc_set_const_params}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hj}hhhjhMubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjsbc.drm_dsc_set_const_paramsasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hvdsc_cfgh]hvdsc_cfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhj}hhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjyhhhjhMubah}(h]jtah ](j j eh"]h$]h&]j j )j huh1j hjhMhjvhhubj )}(hhh]h)}(hGSet DSC parameters considered typically constant across operation modesh]hGSet DSC parameters considered typically constant across operation modes}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj>hhubah}(h]h ]h"]h$]h&]uh1j hjvhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jYj$ jYj% j& j' uh1j hhhjhNhNubj) )}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j3 )}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjaubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj]ubjw )}(hhh]j| )}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](j )}(h#``struct drm_dsc_config *vdsc_cfg``h]j )}(hjh]hstruct drm_dsc_config *vdsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj|ubj )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hj|ubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjyubah}(h]h ]h"]h$]h&]uh1jv hj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drm_dsc_set_rc_buf_thresh (C function)c.drm_dsc_set_rc_buf_threshhNtauh1j hjhhhNhNubj )}(hhh](j )}(h@void drm_dsc_set_rc_buf_thresh (struct drm_dsc_config *vdsc_cfg)h]j )}(h?void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chM0ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhM0ubj )}(hdrm_dsc_set_rc_buf_threshh]j )}(hdrm_dsc_set_rc_buf_threshh]hdrm_dsc_set_rc_buf_thresh}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhM0ubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj9modnameN classnameNj j )}j ]j%)}jjsbc.drm_dsc_set_rc_buf_threshasbuh1hhjubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hvdsc_cfgh]hvdsc_cfg}(hjrhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhM0ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhM0ubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhM0hjhhubj )}(hhh]h)}(hMSet thresholds for the RC model in accordance with the DSC 1.2 specification.h]hMSet thresholds for the RC model in accordance with the DSC 1.2 specification.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chM0hjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhM0ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chM4hjubjw )}(hhh]j| )}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](j )}(h#``struct drm_dsc_config *vdsc_cfg``h]j )}(hjh]hstruct drm_dsc_config *vdsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chM6hjubj )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chM3hjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhM6hjubah}(h]h ]h"]h$]h&]uh1jv hjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j $drm_dsc_setup_rc_params (C function)c.drm_dsc_setup_rc_paramshNtauh1j hjhhhNhNubj )}(hhh](j )}(h\int drm_dsc_setup_rc_params (struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h]j )}(h[int drm_dsc_setup_rc_params(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h](j)}(hinth]hint}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjFhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhjEhMubj )}(hdrm_dsc_setup_rc_paramsh]j )}(hdrm_dsc_setup_rc_paramsh]hdrm_dsc_setup_rc_params}(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhjEhMubj)}(h@(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h](j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hjthhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjZsbc.drm_dsc_setup_rc_paramsasbuh1hhjpubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjpubj )}(hvdsc_cfgh]hvdsc_cfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjpubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubj)}(henum drm_dsc_params_type typeh](j )}(hj7h]henum}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_params_typeh]hdrm_dsc_params_type}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]jc.drm_dsc_setup_rc_paramsasbuh1hhjubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(htypeh]htype}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjlubeh}(h]h ]h"]h$]h&]j j uh1jhj3hhhjEhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj/hhhjEhMubah}(h]j*ah ](j j eh"]h$]h&]j j )j huh1j hjEhMhj,hhubj )}(hhh]h)}(hSet parameters and limits for RC model in accordance with the DSC 1.1 or 1.2 specification and DSC C Model Required bits_per_pixel and bits_per_component to be set before calling this function.Jh]hSet parameters and limits for RC model in accordance with the DSC 1.1 or 1.2 specification and DSC C Model Required bits_per_pixel and bits_per_component to be set before calling this function.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjWhhubah}(h]h ]h"]h$]h&]uh1j hj,hhhjEhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jrj$ jrj% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driver ``enum drm_dsc_params_type type`` operating mode and standard to follow **Return** 0 or -error code in case of an errorh](h)}(h**Parameters**h]j3 )}(hj|h]h Parameters}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjzubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjvubjw )}(hhh](j| )}(hV``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driver h](j )}(h#``struct drm_dsc_config *vdsc_cfg``h]j )}(hjh]hstruct drm_dsc_config *vdsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubj )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubj| )}(hH``enum drm_dsc_params_type type`` operating mode and standard to follow h](j )}(h!``enum drm_dsc_params_type type``h]j )}(hjh]henum drm_dsc_params_type type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubj )}(hhh]h)}(h%operating mode and standard to followh]h%operating mode and standard to follow}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubeh}(h]h ]h"]h$]h&]uh1jv hjvubh)}(h **Return**h]j3 )}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjvubh)}(h$0 or -error code in case of an errorh]h$0 or -error code in case of an error}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_dsc_compute_rc_parameters (C function)c.drm_dsc_compute_rc_parametershNtauh1j hjhhhNhNubj )}(hhh](j )}(hCint drm_dsc_compute_rc_parameters (struct drm_dsc_config *vdsc_cfg)h]j )}(hBint drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg)h](j)}(hinth]hint}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjchhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjbhMubj )}(hdrm_dsc_compute_rc_parametersh]j )}(hdrm_dsc_compute_rc_parametersh]hdrm_dsc_compute_rc_parameters}(hjuhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjqubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjbhMubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jjwsbc.drm_dsc_compute_rc_parametersasbuh1hhjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hvdsc_cfgh]hvdsc_cfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjPhhhjbhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjLhhhjbhMubah}(h]jGah ](j j eh"]h$]h&]j j )j huh1j hjbhMhjIhhubj )}(hhh]h)}(hWrite rate control parameters to the dsc configuration defined in :c:type:`struct drm_dsc_config ` in accordance with the DSC 1.2 specification. Some configuration fields must be present beforehand.h](hBWrite rate control parameters to the dsc configuration defined in }(hjhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]j )}(hjh]hstruct drm_dsc_config}(hj hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j )}j ]jc.drm_dsc_compute_rc_parametersasbj drm_dsc_configuh1hhjlhK$hjubhd in accordance with the DSC 1.2 specification. Some configuration fields must be present beforehand.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjIhhhjbhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jTj$ jTj% j& j' uh1j hhhjhNhNubj) )}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j3 )}(hj^h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj\ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjXubjw )}(hhh]j| )}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](j )}(h#``struct drm_dsc_config *vdsc_cfg``h]j )}(hj}h]hstruct drm_dsc_config *vdsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjwubj )}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubah}(h]h ]h"]h$]h&]uh1j hjwubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjtubah}(h]h ]h"]h$]h&]uh1jv hjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dsc_get_bpp_int (C function)c.drm_dsc_get_bpp_inthNtauh1j hjhhhNhNubj )}(hhh](j )}(h?u32 drm_dsc_get_bpp_int (const struct drm_dsc_config *vdsc_cfg)h]j )}(h>u32 drm_dsc_get_bpp_int(const struct drm_dsc_config *vdsc_cfg)h](h)}(hhh]j )}(hu32h]hu32}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dsc_get_bpp_intsbc.drm_dsc_get_bpp_intasbuh1hhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dsc_get_bpp_inth]j )}(hjh]hdrm_dsc_get_bpp_int}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h'(const struct drm_dsc_config *vdsc_cfg)h]j)}(h%const struct drm_dsc_config *vdsc_cfgh](j )}(hjch]hconst}(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(hj h]hstruct}(hjDhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hjbhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]jc.drm_dsc_get_bpp_intasbuh1hhj%ubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubj9)}(hjOh]h*}(hjhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj%ubj )}(hvdsc_cfgh]hvdsc_cfg}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjhhhjhMubah}(h]jah ](j j eh"]h$]h&]j j )j huh1j hjhMhjhhubj )}(hhh]h)}(h=Get integer bits per pixel value for the given DRM DSC configh]h=Get integer bits per pixel value for the given DRM DSC config}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1j hjhhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jj$ jj% j& j' uh1j hhhjhNhNubj) )}(h{**Parameters** ``const struct drm_dsc_config *vdsc_cfg`` Pointer to DRM DSC config struct **Return** Integer BPP valueh](h)}(h**Parameters**h]j3 )}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubjw )}(hhh]j| )}(hK``const struct drm_dsc_config *vdsc_cfg`` Pointer to DRM DSC config struct h](j )}(h)``const struct drm_dsc_config *vdsc_cfg``h]j )}(hjh]h%const struct drm_dsc_config *vdsc_cfg}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubj )}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]uh1j{ hjhMhjubah}(h]h ]h"]h$]h&]uh1jv hjubh)}(h **Return**h]j3 )}(hjAh]hReturn}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubh)}(hInteger BPP valueh]hInteger BPP value}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dsc_initial_scale_value (C function)c.drm_dsc_initial_scale_valuehNtauh1j hjhhhNhNubj )}(hhh](j )}(hAu8 drm_dsc_initial_scale_value (const struct drm_dsc_config *dsc)h]j )}(h@u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc)h](h)}(hhh]j )}(hu8h]hu8}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjmodnameN classnameNj j )}j ]j%)}jdrm_dsc_initial_scale_valuesbc.drm_dsc_initial_scale_valueasbuh1hhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjhhhjhMubj )}(hdrm_dsc_initial_scale_valueh]j )}(hjh]hdrm_dsc_initial_scale_value}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubah}(h]h ](j j eh"]h$]h&]j j uh1j hjhhhjhMubj)}(h"(const struct drm_dsc_config *dsc)h]j)}(h const struct drm_dsc_config *dsch](j )}(hjch]hconst}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(hj h]hstruct}(hjhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj )}(h h]h }(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hj hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj modnameN classnameNj j )}j ]jc.drm_dsc_initial_scale_valueasbuh1hhjubj )}(h h]h }(hj/ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubj9)}(hjOh]h*}(hj= hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjubj )}(hdsch]hdsc}(hjJ hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjubah}(h]h ]h"]h$]h&]j j uh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj~hhhjhMubah}(h]jyah ](j j eh"]h$]h&]j j )j huh1j hjhMhj{hhubj )}(hhh]h)}(h:Calculate the initial scale value for the given DSC configh]h:Calculate the initial scale value for the given DSC config}(hjt hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjq hhubah}(h]h ]h"]h$]h&]uh1j hj{hhhjhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j j$ j j% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct **Return** Calculated initial scale valueh](h)}(h**Parameters**h]j3 )}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj ubjw )}(hhh]j| )}(hF``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct h](j )}(h$``const struct drm_dsc_config *dsc``h]j )}(hj h]h const struct drm_dsc_config *dsc}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj ubj )}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]uh1j{ hj hMhj ubah}(h]h ]h"]h$]h&]uh1jv hj ubh)}(h **Return**h]j3 )}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj ubh)}(hCalculated initial scale valueh]hCalculated initial scale value}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_dsc_flatness_det_thresh (C function)c.drm_dsc_flatness_det_threshhNtauh1j hjhhhNhNubj )}(hhh](j )}(hBu32 drm_dsc_flatness_det_thresh (const struct drm_dsc_config *dsc)h]j )}(hAu32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc)h](h)}(hhh]j )}(hu32h]hu32}(hj8!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj5!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj:!modnameN classnameNj j )}j ]j%)}jdrm_dsc_flatness_det_threshsbc.drm_dsc_flatness_det_threshasbuh1hhj1!hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hjZ!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj1!hhhjY!hMubj )}(hdrm_dsc_flatness_det_threshh]j )}(hjV!h]hdrm_dsc_flatness_det_thresh}(hjl!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjh!ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj1!hhhjY!hMubj)}(h"(const struct drm_dsc_config *dsc)h]j)}(h const struct drm_dsc_config *dsch](j )}(hjch]hconst}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(hj h]hstruct}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj!modnameN classnameNj j )}j ]jT!c.drm_dsc_flatness_det_threshasbuh1hhj!ubj )}(h h]h }(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubj9)}(hjOh]h*}(hj!hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj!ubj )}(hdsch]hdsc}(hj!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj!ubah}(h]h ]h"]h$]h&]j j uh1jhj1!hhhjY!hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj-!hhhjY!hMubah}(h]j(!ah ](j j eh"]h$]h&]j j )j huh1j hjY!hMhj*!hhubj )}(hhh]h)}(h:Calculate the flatness_det_thresh for the given DSC configh]h:Calculate the flatness_det_thresh for the given DSC config}(hj#"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj "hhubah}(h]h ]h"]h$]h&]uh1j hj*!hhhjY!hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j;"j$ j;"j% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct **Return** Calculated flatness det thresh valueh](h)}(h**Parameters**h]j3 )}(hjE"h]h Parameters}(hjG"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjC"ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj?"ubjw )}(hhh]j| )}(hF``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct h](j )}(h$``const struct drm_dsc_config *dsc``h]j )}(hjd"h]h const struct drm_dsc_config *dsc}(hjf"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjb"ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj^"ubj )}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hj}"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjy"hMhjz"ubah}(h]h ]h"]h$]h&]uh1j hj^"ubeh}(h]h ]h"]h$]h&]uh1j{ hjy"hMhj["ubah}(h]h ]h"]h$]h&]uh1jv hj?"ubh)}(h **Return**h]j3 )}(hj"h]hReturn}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj?"ubh)}(h$Calculated flatness det thresh valueh]h$Calculated flatness det thresh value}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj?"ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dsc_dump_config (C function)c.drm_dsc_dump_confighNtauh1j hjhhhNhNubj )}(hhh](j )}(h^void drm_dsc_dump_config (struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h]j )}(h]void drm_dsc_dump_config(struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h](j)}(hvoidh]hvoid}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj"hMubj )}(hdrm_dsc_dump_configh]j )}(hdrm_dsc_dump_configh]hdrm_dsc_dump_config}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj"hhhj"hMubj)}(hE(struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h](j)}(hstruct drm_printer *ph](j )}(hj h]hstruct}(hj!#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj.#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(h drm_printerh]h drm_printer}(hj?#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjA#modnameN classnameNj j )}j ]j%)}jj#sbc.drm_dsc_dump_configasbuh1hhj#ubj )}(h h]h }(hj_#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj9)}(hjOh]h*}(hjm#hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj#ubj )}(hjDh]hp}(hjz#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj#ubj)}(h int indenth](j)}(hinth]hint}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hindenth]hindent}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj#ubj)}(h const struct drm_dsc_config *cfgh](j )}(hjch]hconst}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(hj h]hstruct}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj )}(h h]h }(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubh)}(hhh]j )}(hdrm_dsc_configh]hdrm_dsc_config}(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj$modnameN classnameNj j )}j ]j[#c.drm_dsc_dump_configasbuh1hhj#ubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubj9)}(hjOh]h*}(hj,$hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj#ubj )}(hcfgh]hcfg}(hj9$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj#ubeh}(h]h ]h"]h$]h&]j j uh1jhj"hhhj"hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj"hhhj"hMubah}(h]j"ah ](j j eh"]h$]h&]j j )j huh1j hj"hMhj"hhubj )}(hhh]h)}(h#Dump the provided DSC configurationh]h#Dump the provided DSC configuration}(hjc$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj`$hhubah}(h]h ]h"]h$]h&]uh1j hj"hhhj"hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j{$j$ j{$j% j& j' uh1j hhhjhNhNubj) )}(h**Parameters** ``struct drm_printer *p`` The printer used for output ``int indent`` Tab indentation level (max 5) ``const struct drm_dsc_config *cfg`` DSC configuration to print **Description** Print the provided DSC configuration in **cfg**.h](h)}(h**Parameters**h]j3 )}(hj$h]h Parameters}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj$ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj$ubjw )}(hhh](j| )}(h6``struct drm_printer *p`` The printer used for output h](j )}(h``struct drm_printer *p``h]j )}(hj$h]hstruct drm_printer *p}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj$ubj )}(hhh]h)}(hThe printer used for outputh]hThe printer used for output}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj$ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMhj$ubj| )}(h-``int indent`` Tab indentation level (max 5) h](j )}(h``int indent``h]j )}(hj$h]h int indent}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj$ubj )}(hhh]h)}(hTab indentation level (max 5)h]hTab indentation level (max 5)}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj$ubah}(h]h ]h"]h$]h&]uh1j hj$ubeh}(h]h ]h"]h$]h&]uh1j{ hj$hMhj$ubj| )}(h@``const struct drm_dsc_config *cfg`` DSC configuration to print h](j )}(h$``const struct drm_dsc_config *cfg``h]j )}(hj%h]h const struct drm_dsc_config *cfg}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]uh1j hm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj%ubj )}(hhh]h)}(hDSC configuration to printh]hDSC configuration to print}(hj/%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+%hMhj,%ubah}(h]h ]h"]h$]h&]uh1j hj%ubeh}(h]h ]h"]h$]h&]uh1j{ hj+%hMhj$ubeh}(h]h ]h"]h$]h&]uh1jv hj$ubh)}(h**Description**h]j3 )}(hjQ%h]h Description}(hjS%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjO%ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj$ubh)}(h0Print the provided DSC configuration in **cfg**.h](h(Print the provided DSC configuration in }(hjg%hhhNhNubj3 )}(h**cfg**h]hcfg}(hjo%hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjg%ubh.}(hjg%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:368: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjhhhNhNubeh}(h]jah ]h"]5display stream compression helper functions referenceah$]h&]uh1hhhhhhhhMhubh)}(hhh](h)}(h)Output Probing Helper Functions Referenceh]h)Output Probing Helper Functions Reference}(hj%hhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhj%hhhhhMtubh)}(hThis library provides some helper code for output probing. It provides an implementation of the core :c:type:`drm_connector_funcs.fill_modes ` interface with drm_helper_probe_single_connector_modes().h](heThis library provides some helper code for output probing. It provides an implementation of the core }(hj%hhhNhNubh)}(h>:c:type:`drm_connector_funcs.fill_modes `h]j )}(hj%h]hdrm_connector_funcs.fill_modes}(hj%hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:374: ./drivers/gpu/drm/drm_probe_helper.chK1hj%ubh: interface with drm_helper_probe_single_connector_modes().}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj%hK1hj%hhubh)}(hIt also provides support for polling connectors with a work item and for generic hotplug interrupt handling where the driver doesn't or cannot keep track of a per-connector hpd interrupt.h]hIt also provides support for polling connectors with a work item and for generic hotplug interrupt handling where the driver doesn’t or cannot keep track of a per-connector hpd interrupt.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:374: ./drivers/gpu/drm/drm_probe_helper.chK5hj%hhubh)}(hThis helper library can be used independently of the modeset helper library. Drivers can also overwrite different parts e.g. use their own hotplug handling code to avoid probing unrelated outputs.h]hThis helper library can be used independently of the modeset helper library. Drivers can also overwrite different parts e.g. use their own hotplug handling code to avoid probing unrelated outputs.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:374: ./drivers/gpu/drm/drm_probe_helper.chK9hj%hhubh)}(hThe probe helpers share the function table structures with other display helper libraries. See :c:type:`struct drm_connector_helper_funcs ` for the details.h](h_The probe helpers share the function table structures with other display helper libraries. See }(hj%hhhNhNubh)}(hH:c:type:`struct drm_connector_helper_funcs `h]j )}(hj&h]h!struct drm_connector_helper_funcs}(hj&hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj%ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:374: ./drivers/gpu/drm/drm_probe_helper.chK=hj%ubh for the details.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&hK=hj%hhubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 'drm_kms_helper_poll_enable (C function)c.drm_kms_helper_poll_enablehNtauh1j hj%hhhNhNubj )}(hhh](j )}(h8void drm_kms_helper_poll_enable (struct drm_device *dev)h]j )}(h7void drm_kms_helper_poll_enable(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hjB&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>&hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM ubj )}(h h]h }(hjQ&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>&hhhjP&hM ubj )}(hdrm_kms_helper_poll_enableh]j )}(hdrm_kms_helper_poll_enableh]hdrm_kms_helper_poll_enable}(hjc&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_&ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>&hhhjP&hM ubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{&ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&modnameN classnameNj j )}j ]j%)}jje&sbc.drm_kms_helper_poll_enableasbuh1hhj{&ubj )}(h h]h }(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{&ubj9)}(hjOh]h*}(hj&hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj{&ubj )}(hdevh]hdev}(hj&hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{&ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjw&ubah}(h]h ]h"]h$]h&]j j uh1jhj>&hhhjP&hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj:&hhhjP&hM ubah}(h]j5&ah ](j j eh"]h$]h&]j j )j huh1j hjP&hM hj7&hhubj )}(hhh]h)}(hre-enable output polling.h]hre-enable output polling.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM hj&hhubah}(h]h ]h"]h$]h&]uh1j hj7&hhhjP&hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j'j$ j'j% j& j' uh1j hhhj%hNhNubj) )}(hXt**Parameters** ``struct drm_device *dev`` drm_device **Description** This function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume. Drivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn't enabled. If device polling was never initialized before, this call will trigger a warning and return. Note that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h](h)}(h**Parameters**h]j3 )}(hj$'h]h Parameters}(hj&'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj"'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM$hj'ubjw )}(hhh]j| )}(h&``struct drm_device *dev`` drm_device h](j )}(h``struct drm_device *dev``h]j )}(hjC'h]hstruct drm_device *dev}(hjE'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjA'ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM!hj='ubj )}(hhh]h)}(h drm_deviceh]h drm_device}(hj\'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjX'hM!hjY'ubah}(h]h ]h"]h$]h&]uh1j hj='ubeh}(h]h ]h"]h$]h&]uh1j{ hjX'hM!hj:'ubah}(h]h ]h"]h$]h&]uh1jv hj'ubh)}(h**Description**h]j3 )}(hj~'h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|'ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM#hj'ubh)}(hThis function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume.h]hThis function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM"hj'ubh)}(hDrivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn't enabled.h]hDrivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn’t enabled.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM&hj'ubh)}(h\If device polling was never initialized before, this call will trigger a warning and return.h]h\If device polling was never initialized before, this call will trigger a warning and return.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM)hj'ubh)}(hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h]hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they’re only call from suspend/resume callbacks.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM,hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j +drm_kms_helper_poll_reschedule (C function) c.drm_kms_helper_poll_reschedulehNtauh1j hj%hhhNhNubj )}(hhh](j )}(h` vfunc for drivers that use the CRTC helpers for output mode filtering and detection. The basic procedure is as follows 1. All modes currently on the connector's modes list are marked as stale 2. New modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order. - :c:type:`drm_connector_helper_funcs.get_modes ` vfunc - if the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) Finally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas. 3. Modes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again. 4. Any non-stale mode on the modes list then undergoes validation - drm_mode_validate_basic() performs basic sanity checks - drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified) - drm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed) - the optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checks - the optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers 5. Any mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()). **Return** The number of modes found on **connector**.h](h)}(h**Parameters**h]j3 )}(hj-h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj-ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj-ubjw )}(hhh](j| )}(h7``struct drm_connector *connector`` connector to probe h](j )}(h#``struct drm_connector *connector``h]j )}(hj.h]hstruct drm_connector *connector}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj .ubj )}(hhh]h)}(hconnector to probeh]hconnector to probe}(hj).hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%.hMhj&.ubah}(h]h ]h"]h$]h&]uh1j hj .ubeh}(h]h ]h"]h$]h&]uh1j{ hj%.hMhj.ubj| )}(h&``uint32_t maxX`` max width for modes h](j )}(h``uint32_t maxX``h]j )}(hjI.h]h uint32_t maxX}(hjK.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjG.ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjC.ubj )}(hhh]h)}(hmax width for modesh]hmax width for modes}(hjb.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^.hMhj_.ubah}(h]h ]h"]h$]h&]uh1j hjC.ubeh}(h]h ]h"]h$]h&]uh1j{ hj^.hMhj.ubj| )}(h'``uint32_t maxY`` max height for modes h](j )}(h``uint32_t maxY``h]j )}(hj.h]h uint32_t maxY}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj|.ubj )}(hhh]h)}(hmax height for modesh]hmax height for modes}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMhj.ubah}(h]h ]h"]h$]h&]uh1j hj|.ubeh}(h]h ]h"]h$]h&]uh1j{ hj.hMhj.ubeh}(h]h ]h"]h$]h&]uh1jv hj-ubh)}(h**Description**h]j3 )}(hj.h]h Description}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj-ubh)}(hX3Based on the helper callbacks implemented by **connector** in struct :c:type:`drm_connector_helper_funcs` try to detect all valid modes. Modes will first be added to the connector's probed_modes list, then culled (based on validity and the **maxX**, **maxY** parameters) and put into the normal modes list.h](h-Based on the helper callbacks implemented by }(hj.hhhNhNubj3 )}(h **connector**h]h connector}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubh in struct }(hj.hhhNhNubh)}(h$:c:type:`drm_connector_helper_funcs`h]j )}(hj.h]hdrm_connector_helper_funcs}(hj.hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj.ubh try to detect all valid modes. Modes will first be added to the connector’s probed_modes list, then culled (based on validity and the }(hj.hhhNhNubj3 )}(h**maxX**h]hmaxX}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubh, }(hj.hhhNhNubj3 )}(h**maxY**h]hmaxY}(hj#/hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj.ubh0 parameters) and put into the normal modes list.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj /hMhj-ubh)}(hIntended to be used as a generic implementation of the :c:type:`drm_connector_funcs.fill_modes\(\) ` vfunc for drivers that use the CRTC helpers for output mode filtering and detection.h](h7Intended to be used as a generic implementation of the }(hj;/hhhNhNubh)}(hB:c:type:`drm_connector_funcs.fill_modes\(\) `h]j )}(hjE/h]h drm_connector_funcs.fill_modes()}(hjG/hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjC/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj;/ubhU vfunc for drivers that use the CRTC helpers for output mode filtering and detection.}(hj;/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjb/hMhj-ubh)}(h!The basic procedure is as followsh]h!The basic procedure is as follows}(hjm/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj-ubjMP)}(hhh](h)}(hFAll modes currently on the connector's modes list are marked as stale h]h)}(hEAll modes currently on the connector's modes list are marked as staleh]hGAll modes currently on the connector’s modes list are marked as stale}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj/ubah}(h]h ]h"]h$]h&]uh1hhj|/ubh)}(hXNew modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order. - :c:type:`drm_connector_helper_funcs.get_modes ` vfunc - if the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) Finally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas. h](h)}(hNew modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order.h]hNew modes are added to the connector’s probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj/ubh)}(hhh](h)}(hQ:c:type:`drm_connector_helper_funcs.get_modes ` vfunch]h)}(hj/h](h)}(hK:c:type:`drm_connector_helper_funcs.get_modes `h]j )}(hj/h]h$drm_connector_helper_funcs.get_modes}(hj/hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj/ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM hj/ubh vfunc}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/hM hj/ubah}(h]h ]h"]h$]h&]uh1hhj/ubh)}(hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) h]h)}(hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid())h]hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid())}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM hj/ubah}(h]h ]h"]h$]h&]uh1hhj/ubeh}(h]h ]h"]h$]h&]jNj<uh1hhj/hM hj/ubh)}(hFinally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas.h]hFinally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj/ubeh}(h]h ]h"]h$]h&]uh1hhj|/ubh)}(hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again. h]h)}(hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again.h]hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj0ubah}(h]h ]h"]h$]h&]uh1hhj|/ubh)}(hXAny non-stale mode on the modes list then undergoes validation - drm_mode_validate_basic() performs basic sanity checks - drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified) - drm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed) - the optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checks - the optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers h](h)}(h>Any non-stale mode on the modes list then undergoes validationh]h>Any non-stale mode on the modes list then undergoes validation}(hj60hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj20ubh)}(hhh](h)}(h6drm_mode_validate_basic() performs basic sanity checksh]h)}(hjJ0h]h6drm_mode_validate_basic() performs basic sanity checks}(hjL0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjH0ubah}(h]h ]h"]h$]h&]uh1hhjE0ubh)}(h[drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified)h]h)}(h[drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified)h](h7drm_mode_validate_size() filters out modes larger than }(hjd0hhhNhNubj3 )}(h**maxX**h]hmaxX}(hjl0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjd0ubh and }(hjd0hhhNhNubj3 )}(h**maxY**h]hmaxY}(hj~0hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjd0ubh (if specified)}(hjd0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj`0ubah}(h]h ]h"]h$]h&]uh1hhjE0ubh)}(hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)h]h)}(hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)h]hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj0ubah}(h]h ]h"]h$]h&]uh1hhjE0ubh)}(hthe optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checksh]h)}(hthe optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checksh](h the optional }(hj0hhhNhNubh)}(hL:c:type:`drm_connector_helper_funcs.mode_valid `h]j )}(hj0h]h%drm_connector_helper_funcs.mode_valid}(hj0hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj0ubh or }(hj0hhhNhNubh)}(hP:c:type:`drm_connector_helper_funcs.mode_valid_ctx `h]j )}(hj0h]h)drm_connector_helper_funcs.mode_valid_ctx}(hj0hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_connector_helper_funcsuh1hhj0hMhj0ubh7 helpers can perform driver and/or sink specific checks}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1hhjE0ubh)}(hXFthe optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers h]h)}(hXEthe optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpersh](h the optional }(hj1hhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]j )}(hj#1h]h drm_crtc_helper_funcs.mode_valid}(hj%1hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hj!1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM"hj1ubh, }(hj1hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]j )}(hjG1h]hdrm_bridge_funcs.mode_valid}(hjI1hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjE1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_bridge_funcsuh1hhj@1hM"hj1ubh and }(hj1hhhNhNubh)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]j )}(hjj1h]h#drm_encoder_helper_funcs.mode_valid}(hjl1hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjh1ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j drm_encoder_helper_funcsuh1hhj@1hM"hj1ubho helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@1hM"hj1ubah}(h]h ]h"]h$]h&]uh1hhjE0ubeh}(h]h ]h"]h$]h&]jNj<uh1hhjY0hMhj20ubeh}(h]h ]h"]h$]h&]uh1hhj|/ubh)}(hAny mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()). h]h)}(hAny mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()).h]hAny mode whose status is not OK is pruned from the connector’s modes list, accompanied by a debug message indicating the reason for the mode’s rejection (see drm_mode_prune_invalid()).}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM'hj1ubah}(h]h ]h"]h$]h&]uh1hhj|/ubeh}(h]h ]h"]h$]h&]jIRjJRjKRhjLRjMRuh1jLPhj-ubh)}(h **Return**h]j3 )}(hj1h]hReturn}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj1ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM+hj-ubh)}(h+The number of modes found on **connector**.h](hThe number of modes found on }(hj1hhhNhNubj3 )}(h **connector**h]h connector}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj1ubh.}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM,hj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j )drm_kms_helper_hotplug_event (C function)c.drm_kms_helper_hotplug_eventhNtauh1j hj%hhhNhNubj )}(hhh](j )}(h:void drm_kms_helper_hotplug_event (struct drm_device *dev)h]j )}(h9void drm_kms_helper_hotplug_event(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj*2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj2hhhj)2hMubj )}(hdrm_kms_helper_hotplug_eventh]j )}(hdrm_kms_helper_hotplug_eventh]hdrm_kms_helper_hotplug_event}(hj<2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj82ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj2hhhj)2hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hjX2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT2ubj )}(h h]h }(hje2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT2ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjv2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjs2ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjx2modnameN classnameNj j )}j ]j%)}jj>2sbc.drm_kms_helper_hotplug_eventasbuh1hhjT2ubj )}(h h]h }(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT2ubj9)}(hjOh]h*}(hj2hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjT2ubj )}(hdevh]hdev}(hj2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT2ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjP2ubah}(h]h ]h"]h$]h&]j j uh1jhj2hhhj)2hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2hhhj)2hMubah}(h]j2ah ](j j eh"]h$]h&]j j )j huh1j hj)2hMhj2hhubj )}(hhh]h)}(hfire off KMS hotplug eventsh]hfire off KMS hotplug events}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj2hhubah}(h]h ]h"]h$]h&]uh1j hj2hhhj)2hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j2j$ j2j% j& j' uh1j hhhj%hNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` drm_device whose connector state changed **Description** This function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration. Drivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already. This function must be called from process context with no mode setting locks held. If only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.h](h)}(h**Parameters**h]j3 )}(hj2h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj2ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj2ubjw )}(hhh]j| )}(hD``struct drm_device *dev`` drm_device whose connector state changed h](j )}(h``struct drm_device *dev``h]j )}(hj3h]hstruct drm_device *dev}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj3ubj )}(hhh]h)}(h(drm_device whose connector state changedh]h(drm_device whose connector state changed}(hj53hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj13hMhj23ubah}(h]h ]h"]h$]h&]uh1j hj3ubeh}(h]h ]h"]h$]h&]uh1j{ hj13hMhj3ubah}(h]h ]h"]h$]h&]uh1jv hj2ubh)}(h**Description**h]j3 )}(hjW3h]h Description}(hjY3hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjU3ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj2ubh)}(hThis function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration.h]hThis function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration.}(hjm3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj2ubh)}(hDrivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already.h]hDrivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already.}(hj|3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj2ubh)}(hRThis function must be called from process context with no mode setting locks held.h]hRThis function must be called from process context with no mode setting locks held.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj2ubh)}(hjIf only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.h]hjIf only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 3drm_kms_helper_connector_hotplug_event (C function)(c.drm_kms_helper_connector_hotplug_eventhNtauh1j hj%hhhNhNubj )}(hhh](j )}(hMvoid drm_kms_helper_connector_hotplug_event (struct drm_connector *connector)h]j )}(hLvoid drm_kms_helper_connector_hotplug_event(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3hhhj3hMubj )}(h&drm_kms_helper_connector_hotplug_eventh]j )}(h&drm_kms_helper_connector_hotplug_eventh]h&drm_kms_helper_connector_hotplug_event}(hj3hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj3ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj3hhhj3hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj )}(h h]h }(hj4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj$4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!4ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj&4modnameN classnameNj j )}j ]j%)}jj3sb(c.drm_kms_helper_connector_hotplug_eventasbuh1hhj4ubj )}(h h]h }(hjD4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubj9)}(hjOh]h*}(hjR4hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj4ubj )}(h connectorh]h connector}(hj_4hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj3ubah}(h]h ]h"]h$]h&]j j uh1jhj3hhhj3hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj3hhhj3hMubah}(h]j3ah ](j j eh"]h$]h&]j j )j huh1j hj3hMhj3hhubj )}(hhh]h)}(h&fire off a KMS connector hotplug eventh]h&fire off a KMS connector hotplug event}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj4hhubah}(h]h ]h"]h$]h&]uh1j hj3hhhj3hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j4j$ j4j% j& j' uh1j hhhj%hNhNubj) )}(h**Parameters** ``struct drm_connector *connector`` drm_connector which has changed **Description** This is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.h](h)}(h**Parameters**h]j3 )}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj4ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubjw )}(hhh]j| )}(hD``struct drm_connector *connector`` drm_connector which has changed h](j )}(h#``struct drm_connector *connector``h]j )}(hj4h]hstruct drm_connector *connector}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubj )}(hhh]h)}(hdrm_connector which has changedh]hdrm_connector which has changed}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj4ubah}(h]h ]h"]h$]h&]uh1j hj4ubeh}(h]h ]h"]h$]h&]uh1j{ hj4hMhj4ubah}(h]h ]h"]h$]h&]uh1jv hj4ubh)}(h**Description**h]j3 )}(hj5h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubh)}(hvThis is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.h]hvThis is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j *drm_kms_helper_is_poll_worker (C function)c.drm_kms_helper_is_poll_workerhNtauh1j hj%hhhNhNubj )}(hhh](j )}(h)bool drm_kms_helper_is_poll_worker (void)h]j )}(h(bool drm_kms_helper_is_poll_worker(void)h](j)}(hjIh]hbool}(hjJ5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjF5hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMcubj )}(h h]h }(hjX5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjF5hhhjW5hMcubj )}(hdrm_kms_helper_is_poll_workerh]j )}(hdrm_kms_helper_is_poll_workerh]hdrm_kms_helper_is_poll_worker}(hjj5hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjf5ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjF5hhhjW5hMcubj)}(h(void)h]j)}(hvoidh]j)}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&]noemphj j uh1jhj~5ubah}(h]h ]h"]h$]h&]j j uh1jhjF5hhhjW5hMcubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjB5hhhjW5hMcubah}(h]j=5ah ](j j eh"]h$]h&]j j )j huh1j hjW5hMchj?5hhubj )}(hhh]h)}(h*is ``current`` task an output poll worker?h](his }(hj5hhhNhNubj )}(h ``current``h]hcurrent}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj5ubh task an output poll worker?}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMchj5hhubah}(h]h ]h"]h$]h&]uh1j hj?5hhhjW5hMcubeh}(h]h ](j functioneh"]h$]h&]j" j j# j5j$ j5j% j& j' uh1j hhhj%hNhNubj) )}(hX**Parameters** ``void`` no arguments **Description** Determine if ``current`` task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts. One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.h](h)}(h**Parameters**h]j3 )}(hj5h]h Parameters}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj5ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMghj5ubjw )}(hhh]j| )}(h``void`` no arguments h](j )}(h``void``h]j )}(hj6h]hvoid}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chKhj5ubj )}(hhh]h)}(h no argumentsh]h no arguments}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hKhj6ubah}(h]h ]h"]h$]h&]uh1j hj5ubeh}(h]h ]h"]h$]h&]uh1j{ hj6hKhj5ubah}(h]h ]h"]h$]h&]uh1jv hj5ubh)}(h**Description**h]j3 )}(hj>6h]h Description}(hj@6hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<6ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chKhj5ubh)}(hDetermine if ``current`` task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts.h](h Determine if }(hjT6hhhNhNubj )}(h ``current``h]hcurrent}(hj\6hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjT6ubhy task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts.}(hjT6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMdhj5ubh)}(hX.One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.h]hX.One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.}(hju6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMghj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j (drm_kms_helper_poll_disable (C function)c.drm_kms_helper_poll_disablehNtauh1j hj%hhhNhNubj )}(hhh](j )}(h9void drm_kms_helper_poll_disable (struct drm_device *dev)h]j )}(h8void drm_kms_helper_poll_disable(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMwubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6hhhj6hMwubj )}(hdrm_kms_helper_poll_disableh]j )}(hdrm_kms_helper_poll_disableh]hdrm_kms_helper_poll_disable}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj6hhhj6hMwubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj )}(h h]h }(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj6hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj7modnameN classnameNj j )}j ]j%)}jj6sbc.drm_kms_helper_poll_disableasbuh1hhj6ubj )}(h h]h }(hj7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubj9)}(hjOh]h*}(hj-7hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj6ubj )}(hdevh]hdev}(hj:7hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj6ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj6ubah}(h]h ]h"]h$]h&]j j uh1jhj6hhhj6hMwubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj6hhhj6hMwubah}(h]j6ah ](j j eh"]h$]h&]j j )j huh1j hj6hMwhj6hhubj )}(hhh]h)}(hdisable output pollingh]hdisable output polling}(hjd7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMwhja7hhubah}(h]h ]h"]h$]h&]uh1j hj6hhhj6hMwubeh}(h]h ](j functioneh"]h$]h&]j" j j# j|7j$ j|7j% j& j' uh1j hhhj%hNhNubj) )}(hXX**Parameters** ``struct drm_device *dev`` drm_device **Description** This function disables the output polling work. Drivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn't enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable(). If however, the polling was never initialized, this call will trigger a warning and return. Note that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h](h)}(h**Parameters**h]j3 )}(hj7h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM{hj7ubjw )}(hhh]j| )}(h&``struct drm_device *dev`` drm_device h](j )}(h``struct drm_device *dev``h]j )}(hj7h]hstruct drm_device *dev}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMxhj7ubj )}(hhh]h)}(h drm_deviceh]h drm_device}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMxhj7ubah}(h]h ]h"]h$]h&]uh1j hj7ubeh}(h]h ]h"]h$]h&]uh1j{ hj7hMxhj7ubah}(h]h ]h"]h$]h&]uh1jv hj7ubh)}(h**Description**h]j3 )}(hj7h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMzhj7ubh)}(h/This function disables the output polling work.h]h/This function disables the output polling work.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMyhj7ubh)}(hDrivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn't enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable().h]hDrivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn’t enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable().}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM{hj7ubh)}(h[If however, the polling was never initialized, this call will trigger a warning and return.h]h[If however, the polling was never initialized, this call will trigger a warning and return.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj7ubh)}(hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h]hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they’re only call from suspend/resume callbacks.}(hj#8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_kms_helper_poll_init (C function)c.drm_kms_helper_poll_inithNtauh1j hj%hhhNhNubj )}(hhh](j )}(h6void drm_kms_helper_poll_init (struct drm_device *dev)h]j )}(h5void drm_kms_helper_poll_init(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hjR8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjN8hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hja8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN8hhhj`8hMubj )}(hdrm_kms_helper_poll_inith]j )}(hdrm_kms_helper_poll_inith]hdrm_kms_helper_poll_init}(hjs8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjo8ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjN8hhhj`8hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj8modnameN classnameNj j )}j ]j%)}jju8sbc.drm_kms_helper_poll_initasbuh1hhj8ubj )}(h h]h }(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubj9)}(hjOh]h*}(hj8hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8ubj )}(hdevh]hdev}(hj8hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8ubah}(h]h ]h"]h$]h&]j j uh1jhjN8hhhj`8hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJ8hhhj`8hMubah}(h]jE8ah ](j j eh"]h$]h&]j j )j huh1j hj`8hMhjG8hhubj )}(hhh]h)}(h$initialize and enable output pollingh]h$initialize and enable output polling}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj9hhubah}(h]h ]h"]h$]h&]uh1j hjG8hhhj`8hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j*9j$ j*9j% j& j' uh1j hhhj%hNhNubj) )}(hXX**Parameters** ``struct drm_device *dev`` drm_device **Description** This function initializes and then also enables output polling support for **dev**. Drivers which do not have reliable hotplug support in hardware can use this helper infrastructure to regularly poll such connectors for changes in their connection state. Drivers can control which connectors are polled by setting the DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On connectors where probing live outputs can result in visual distortion drivers should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this. Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are completely ignored by the polling logic. Note that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h](h)}(h**Parameters**h]j3 )}(hj49h]h Parameters}(hj69hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj29ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj.9ubjw )}(hhh]j| )}(h&``struct drm_device *dev`` drm_device h](j )}(h``struct drm_device *dev``h]j )}(hjS9h]hstruct drm_device *dev}(hjU9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjQ9ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjM9ubj )}(hhh]h)}(h drm_deviceh]h drm_device}(hjl9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjh9hMhji9ubah}(h]h ]h"]h$]h&]uh1j hjM9ubeh}(h]h ]h"]h$]h&]uh1j{ hjh9hMhjJ9ubah}(h]h ]h"]h$]h&]uh1jv hj.9ubh)}(h**Description**h]j3 )}(hj9h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj.9ubh)}(hThis function initializes and then also enables output polling support for **dev**. Drivers which do not have reliable hotplug support in hardware can use this helper infrastructure to regularly poll such connectors for changes in their connection state.h](hKThis function initializes and then also enables output polling support for }(hj9hhhNhNubj3 )}(h**dev**h]hdev}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9ubh. Drivers which do not have reliable hotplug support in hardware can use this helper infrastructure to regularly poll such connectors for changes in their connection state.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj.9ubh)}(hXDrivers can control which connectors are polled by setting the DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On connectors where probing live outputs can result in visual distortion drivers should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this. Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are completely ignored by the polling logic.h]hXDrivers can control which connectors are polled by setting the DRM_CONNECTOR_POLL_CONNECT and DRM_CONNECTOR_POLL_DISCONNECT flags. On connectors where probing live outputs can result in visual distortion drivers should not set the DRM_CONNECTOR_POLL_DISCONNECT flag to avoid this. Connectors which have no flag or only DRM_CONNECTOR_POLL_HPD set are completely ignored by the polling logic.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj.9ubh)}(hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h]hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj.9ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_kms_helper_poll_fini (C function)c.drm_kms_helper_poll_finihNtauh1j hj%hhhNhNubj )}(hhh](j )}(h6void drm_kms_helper_poll_fini (struct drm_device *dev)h]j )}(h5void drm_kms_helper_poll_fini(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj9hhhj:hMubj )}(hdrm_kms_helper_poll_finih]j )}(hdrm_kms_helper_poll_finih]hdrm_kms_helper_poll_fini}(hj$:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj :ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj9hhhj:hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj@:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<:ubj )}(h h]h }(hjM:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<:ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj^:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[:ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj`:modnameN classnameNj j )}j ]j%)}jj&:sbc.drm_kms_helper_poll_finiasbuh1hhj<:ubj )}(h h]h }(hj~:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<:ubj9)}(hjOh]h*}(hj:hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj<:ubj )}(hdevh]hdev}(hj:hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<:ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj8:ubah}(h]h ]h"]h$]h&]j j uh1jhj9hhhj:hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj9hhhj:hMubah}(h]j9ah ](j j eh"]h$]h&]j j )j huh1j hj:hMhj9hhubj )}(hhh]h)}(h&disable output polling and clean it uph]h&disable output polling and clean it up}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj:hhubah}(h]h ]h"]h$]h&]uh1j hj9hhhj:hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j:j$ j:j% j& j' uh1j hhhj%hNhNubj) )}(h7**Parameters** ``struct drm_device *dev`` drm_deviceh](h)}(h**Parameters**h]j3 )}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj:ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj:ubjw )}(hhh]j| )}(h%``struct drm_device *dev`` drm_deviceh](j )}(h``struct drm_device *dev``h]j )}(hj;h]hstruct drm_device *dev}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj:ubj )}(hhh]h)}(h drm_deviceh]h drm_device}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj;ubah}(h]h ]h"]h$]h&]uh1j hj:ubeh}(h]h ]h"]h$]h&]uh1j{ hj;hMhj:ubah}(h]h ]h"]h$]h&]uh1jv hj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j &drmm_kms_helper_poll_init (C function)c.drmm_kms_helper_poll_inithNtauh1j hj%hhhNhNubj )}(hhh](j )}(h7void drmm_kms_helper_poll_init (struct drm_device *dev)h]j )}(h6void drmm_kms_helper_poll_init(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj^;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ;hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hjm;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZ;hhhjl;hMubj )}(hdrmm_kms_helper_poll_inith]j )}(hdrmm_kms_helper_poll_inith]hdrmm_kms_helper_poll_init}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj{;ubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZ;hhhjl;hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj;modnameN classnameNj j )}j ]j%)}jj;sbc.drmm_kms_helper_poll_initasbuh1hhj;ubj )}(h h]h }(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubj9)}(hjOh]h*}(hj;hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj;ubj )}(hdevh]hdev}(hj;hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj;ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj;ubah}(h]h ]h"]h$]h&]j j uh1jhjZ;hhhjl;hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjV;hhhjl;hMubah}(h]jQ;ah ](j j eh"]h$]h&]j j )j huh1j hjl;hMhjS;hhubj )}(hhh]h)}(h$initialize and enable output pollingh]h$initialize and enable output polling}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj<hhubah}(h]h ]h"]h$]h&]uh1j hjS;hhhjl;hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j6<j$ j6<j% j& j' uh1j hhhj%hNhNubj) )}(hXA**Parameters** ``struct drm_device *dev`` drm_device **Description** This function initializes and then also enables output polling support for **dev** similar to drm_kms_helper_poll_init(). Polling will automatically be cleaned up when the DRM device goes away. See drm_kms_helper_poll_init() for more information.h](h)}(h**Parameters**h]j3 )}(hj@<h]h Parameters}(hjB<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj><ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj:<ubjw )}(hhh]j| )}(h&``struct drm_device *dev`` drm_device h](j )}(h``struct drm_device *dev``h]j )}(hj_<h]hstruct drm_device *dev}(hja<hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj]<ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjY<ubj )}(hhh]h)}(h drm_deviceh]h drm_device}(hjx<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjt<hMhju<ubah}(h]h ]h"]h$]h&]uh1j hjY<ubeh}(h]h ]h"]h$]h&]uh1j{ hjt<hMhjV<ubah}(h]h ]h"]h$]h&]uh1jv hj:<ubh)}(h**Description**h]j3 )}(hj<h]h Description}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj:<ubh)}(hThis function initializes and then also enables output polling support for **dev** similar to drm_kms_helper_poll_init(). Polling will automatically be cleaned up when the DRM device goes away.h](hKThis function initializes and then also enables output polling support for }(hj<hhhNhNubj3 )}(h**dev**h]hdev}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj<ubho similar to drm_kms_helper_poll_init(). Polling will automatically be cleaned up when the DRM device goes away.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj:<ubh)}(h4See drm_kms_helper_poll_init() for more information.h]h4See drm_kms_helper_poll_init() for more information.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj:<ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_connector_helper_hpd_irq_event (C function)$c.drm_connector_helper_hpd_irq_eventhNtauh1j hj%hhhNhNubj )}(hhh](j )}(hIbool drm_connector_helper_hpd_irq_event (struct drm_connector *connector)h]j )}(hHbool drm_connector_helper_hpd_irq_event(struct drm_connector *connector)h](j)}(hjIh]hbool}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj<hhhj =hMubj )}(h"drm_connector_helper_hpd_irq_eventh]j )}(h"drm_connector_helper_hpd_irq_eventh]h"drm_connector_helper_hpd_irq_event}(hj =hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj=ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj<hhhj =hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hj<=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8=ubj )}(h h]h }(hjI=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8=ubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjZ=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjW=ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\=modnameN classnameNj j )}j ]j%)}jj"=sb$c.drm_connector_helper_hpd_irq_eventasbuh1hhj8=ubj )}(h h]h }(hjz=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8=ubj9)}(hjOh]h*}(hj=hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj8=ubj )}(h connectorh]h connector}(hj=hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8=ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj4=ubah}(h]h ]h"]h$]h&]j j uh1jhj<hhhj =hMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj<hhhj =hMubah}(h]j<ah ](j j eh"]h$]h&]j j )j huh1j hj =hMhj<hhubj )}(hhh]h)}(hhotplug processingh]hhotplug processing}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=hhubah}(h]h ]h"]h$]h&]uh1j hj<hhhj =hMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j=j$ j=j% j& j' uh1j hhhj%hNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` drm_connector **Description** Drivers can use this helper function to run a detect cycle on a connector which has the DRM_CONNECTOR_POLL_HPD flag set in its :c:type:`polled` member. This helper function is useful for drivers which can track hotplug interrupts for a single connector. Drivers that want to send a hotplug event for all connectors or can't track hotplug interrupts per connector need to use drm_helper_hpd_irq_event(). This function must be called from process context with no mode setting locks held. Note that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable. **Return** A boolean indicating whether the connector status changed or noth](h)}(h**Parameters**h]j3 )}(hj=h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj=ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=ubjw )}(hhh]j| )}(h2``struct drm_connector *connector`` drm_connector h](j )}(h#``struct drm_connector *connector``h]j )}(hj>h]hstruct drm_connector *connector}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj=ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=ubj )}(hhh]h)}(h drm_connectorh]h drm_connector}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj>ubah}(h]h ]h"]h$]h&]uh1j hj=ubeh}(h]h ]h"]h$]h&]uh1j{ hj>hMhj=ubah}(h]h ]h"]h$]h&]uh1jv hj=ubh)}(h**Description**h]j3 )}(hj;>h]h Description}(hj=>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj9>ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=ubh)}(hDrivers can use this helper function to run a detect cycle on a connector which has the DRM_CONNECTOR_POLL_HPD flag set in its :c:type:`polled` member.h](hDrivers can use this helper function to run a detect cycle on a connector which has the DRM_CONNECTOR_POLL_HPD flag set in its }(hjQ>hhhNhNubh)}(h:c:type:`polled`h]j )}(hj[>h]hpolled}(hj]>hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjY>ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j polleduh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjQ>ubh member.}(hjQ>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjx>hMhj=ubh)}(hThis helper function is useful for drivers which can track hotplug interrupts for a single connector. Drivers that want to send a hotplug event for all connectors or can't track hotplug interrupts per connector need to use drm_helper_hpd_irq_event().h]hThis helper function is useful for drivers which can track hotplug interrupts for a single connector. Drivers that want to send a hotplug event for all connectors or can’t track hotplug interrupts per connector need to use drm_helper_hpd_irq_event().}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=ubh)}(hRThis function must be called from process context with no mode setting locks held.h]hRThis function must be called from process context with no mode setting locks held.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM hj=ubh)}(hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h]hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=ubh)}(h **Return**h]j3 )}(hj>h]hReturn}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj>ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=ubh)}(h@A boolean indicating whether the connector status changed or noth]h@A boolean indicating whether the connector status changed or not}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_helper_hpd_irq_event (C function)c.drm_helper_hpd_irq_eventhNtauh1j hj%hhhNhNubj )}(hhh](j )}(h6bool drm_helper_hpd_irq_event (struct drm_device *dev)h]j )}(h5bool drm_helper_hpd_irq_event(struct drm_device *dev)h](j)}(hjIh]hbool}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM,ubj )}(h h]h }(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj>hhhj?hM,ubj )}(hdrm_helper_hpd_irq_eventh]j )}(hdrm_helper_hpd_irq_eventh]hdrm_helper_hpd_irq_event}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj>hhhj?hM,ubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j )}(hj h]hstruct}(hj3?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/?ubj )}(h h]h }(hj@?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/?ubh)}(hhh]j )}(h drm_deviceh]h drm_device}(hjQ?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjN?ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjS?modnameN classnameNj j )}j ]j%)}jj?sbc.drm_helper_hpd_irq_eventasbuh1hhj/?ubj )}(h h]h }(hjq?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/?ubj9)}(hjOh]h*}(hj?hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj/?ubj )}(hdevh]hdev}(hj?hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/?ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj+?ubah}(h]h ]h"]h$]h&]j j uh1jhj>hhhj?hM,ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj>hhhj?hM,ubah}(h]j>ah ](j j eh"]h$]h&]j j )j huh1j hj?hM,hj>hhubj )}(hhh]h)}(hhotplug processingh]hhotplug processing}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM,hj?hhubah}(h]h ]h"]h$]h&]uh1j hj>hhhj?hM,ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j?j$ j?j% j& j' uh1j hhhj%hNhNubj) )}(hX**Parameters** ``struct drm_device *dev`` drm_device **Description** Drivers can use this helper function to run a detect cycle on all connectors which have the DRM_CONNECTOR_POLL_HPD flag set in their :c:type:`polled` member. All other connectors are ignored, which is useful to avoid reprobing fixed panels. This helper function is useful for drivers which can't or don't track hotplug interrupts for each connector. Drivers which support hotplug interrupts for each connector individually and which have a more fine-grained detect logic can use drm_connector_helper_hpd_irq_event(). Alternatively, they should bypass this code and directly call drm_kms_helper_hotplug_event() in case the connector state changed. This function must be called from process context with no mode setting locks held. Note that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable. **Return** A boolean indicating whether the connector status changed or noth](h)}(h**Parameters**h]j3 )}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj?ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM0hj?ubjw )}(hhh]j| )}(h&``struct drm_device *dev`` drm_device h](j )}(h``struct drm_device *dev``h]j )}(hj?h]hstruct drm_device *dev}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?ubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM-hj?ubj )}(hhh]h)}(h drm_deviceh]h drm_device}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj @hM-hj @ubah}(h]h ]h"]h$]h&]uh1j hj?ubeh}(h]h ]h"]h$]h&]uh1j{ hj @hM-hj?ubah}(h]h ]h"]h$]h&]uh1jv hj?ubh)}(h**Description**h]j3 )}(hj2@h]h Description}(hj4@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj0@ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM/hj?ubh)}(hDrivers can use this helper function to run a detect cycle on all connectors which have the DRM_CONNECTOR_POLL_HPD flag set in their :c:type:`polled` member. All other connectors are ignored, which is useful to avoid reprobing fixed panels.h](hDrivers can use this helper function to run a detect cycle on all connectors which have the DRM_CONNECTOR_POLL_HPD flag set in their }(hjH@hhhNhNubh)}(h:c:type:`polled`h]j )}(hjR@h]hpolled}(hjT@hhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjP@ubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j polleduh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM.hjH@ubh[ member. All other connectors are ignored, which is useful to avoid reprobing fixed panels.}(hjH@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjo@hM.hj?ubh)}(hlThis helper function is useful for drivers which can't or don't track hotplug interrupts for each connector.h]hpThis helper function is useful for drivers which can’t or don’t track hotplug interrupts for each connector.}(hjz@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM3hj?ubh)}(hX(Drivers which support hotplug interrupts for each connector individually and which have a more fine-grained detect logic can use drm_connector_helper_hpd_irq_event(). Alternatively, they should bypass this code and directly call drm_kms_helper_hotplug_event() in case the connector state changed.h]hX(Drivers which support hotplug interrupts for each connector individually and which have a more fine-grained detect logic can use drm_connector_helper_hpd_irq_event(). Alternatively, they should bypass this code and directly call drm_kms_helper_hotplug_event() in case the connector state changed.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM6hj?ubh)}(hRThis function must be called from process context with no mode setting locks held.h]hRThis function must be called from process context with no mode setting locks held.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM<hj?ubh)}(hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.h]hNote that a connector can be both polled and probed from the hotplug handler, in case the hotplug interrupt is known to be unreliable.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM?hj?ubh)}(h **Return**h]j3 )}(hj@h]hReturn}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj@ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMBhj?ubh)}(h@A boolean indicating whether the connector status changed or noth]h@A boolean indicating whether the connector status changed or not}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMChj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j -drm_crtc_helper_mode_valid_fixed (C function)"c.drm_crtc_helper_mode_valid_fixedhNtauh1j hj%hhhNhNubj )}(hhh](j )}(henum drm_mode_status drm_crtc_helper_mode_valid_fixed (struct drm_crtc *crtc, const struct drm_display_mode *mode, const struct drm_display_mode *fixed_mode)h]j )}(henum drm_mode_status drm_crtc_helper_mode_valid_fixed(struct drm_crtc *crtc, const struct drm_display_mode *mode, const struct drm_display_mode *fixed_mode)h](j )}(hj7h]henum}(hj@hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMfubj )}(h h]h }(hj AhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhj AhMfubh)}(hhh]j )}(hdrm_mode_statush]hdrm_mode_status}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j%)}j drm_crtc_helper_mode_valid_fixedsb"c.drm_crtc_helper_mode_valid_fixedasbuh1hhj@hhhj AhMfubj )}(h h]h }(hj=AhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@hhhj AhMfubj )}(h drm_crtc_helper_mode_valid_fixedh]j )}(hj:Ah]h drm_crtc_helper_mode_valid_fixed}(hjOAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjKAubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@hhhj AhMfubj)}(hg(struct drm_crtc *crtc, const struct drm_display_mode *mode, const struct drm_display_mode *fixed_mode)h](j)}(hstruct drm_crtc *crtch](j )}(hj h]hstruct}(hjjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfAubj )}(h h]h }(hjwAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfAubh)}(hhh]j )}(hdrm_crtch]hdrm_crtc}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjAmodnameN classnameNj j )}j ]j8A"c.drm_crtc_helper_mode_valid_fixedasbuh1hhjfAubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfAubj9)}(hjOh]h*}(hjAhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjfAubj )}(hcrtch]hcrtc}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjbAubj)}(h#const struct drm_display_mode *modeh](j )}(hjch]hconst}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(h h]h }(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(hj h]hstruct}(hjAhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]j8A"c.drm_crtc_helper_mode_valid_fixedasbuh1hhjAubj )}(h h]h }(hj1BhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubj9)}(hjOh]h*}(hj?BhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjAubj )}(hmodeh]hmode}(hjLBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjAubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjbAubj)}(h)const struct drm_display_mode *fixed_modeh](j )}(hjch]hconst}(hjeBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaBubj )}(h h]h }(hjrBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaBubj )}(hj h]hstruct}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaBubh)}(hhh]j )}(hdrm_display_modeh]hdrm_display_mode}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjBmodnameN classnameNj j )}j ]j8A"c.drm_crtc_helper_mode_valid_fixedasbuh1hhjaBubj )}(h h]h }(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaBubj9)}(hjOh]h*}(hjBhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjaBubj )}(h fixed_modeh]h fixed_mode}(hjBhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaBubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjbAubeh}(h]h ]h"]h$]h&]j j uh1jhj@hhhj AhMfubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj@hhhj AhMfubah}(h]j@ah ](j j eh"]h$]h&]j j )j huh1j hj AhMfhj@hhubj )}(hhh]h)}(hValidates a display modeh]hValidates a display mode}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMfhjBhhubah}(h]h ]h"]h$]h&]uh1j hj@hhhj AhMfubeh}(h]h ](j functioneh"]h$]h&]j" j j# jCj$ jCj% j& j' uh1j hhhj%hNhNubj) )}(hX **Parameters** ``struct drm_crtc *crtc`` the crtc ``const struct drm_display_mode *mode`` the mode to validate ``const struct drm_display_mode *fixed_mode`` the display hardware's mode **Return** MODE_OK on success, or another mode-status code otherwise.h](h)}(h**Parameters**h]j3 )}(hj#Ch]h Parameters}(hj%ChhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj!Cubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMjhjCubjw )}(hhh](j| )}(h#``struct drm_crtc *crtc`` the crtc h](j )}(h``struct drm_crtc *crtc``h]j )}(hjBCh]hstruct drm_crtc *crtc}(hjDChhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@Cubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMghjddc is set), and update the connector using the EDID. This can be used as the "default" connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update. **Return** Number of modes.h](h)}(h**Parameters**h]j3 )}(hjGh]h Parameters}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj|Gubjw )}(hhh]j| )}(h2``struct drm_connector *connector`` The connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjGh]hstruct drm_connector *connector}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjGubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjGubj )}(hhh]h)}(h The connectorh]h The connector}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjGubah}(h]h ]h"]h$]h&]uh1j hjGubeh}(h]h ]h"]h$]h&]uh1j{ hjGhMhjGubah}(h]h ]h"]h$]h&]uh1jv hj|Gubh)}(h**Description**h]j3 )}(hjGh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj|Gubh)}(hyRead the EDID using drm_edid_read() (which requires that connector->ddc is set), and update the connector using the EDID.h]hyRead the EDID using drm_edid_read() (which requires that connector->ddc is set), and update the connector using the EDID.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj|Gubh)}(hThis can be used as the "default" connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update.h]hThis can be used as the “default” connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj|Gubh)}(h **Return**h]j3 )}(hjHh]hReturn}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjHubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj|Gubh)}(hNumber of modes.h]hNumber of modes.}(hj(HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj|Gubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j .drm_connector_helper_tv_get_modes (C function)#c.drm_connector_helper_tv_get_modeshNtauh1j hj%hhhNhNubj )}(hhh](j )}(hGint drm_connector_helper_tv_get_modes (struct drm_connector *connector)h]j )}(hFint drm_connector_helper_tv_get_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjWHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSHhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hjfHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjSHhhhjeHhMubj )}(h!drm_connector_helper_tv_get_modesh]j )}(h!drm_connector_helper_tv_get_modesh]h!drm_connector_helper_tv_get_modes}(hjxHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjtHubah}(h]h ](j j eh"]h$]h&]j j uh1j hjSHhhhjeHhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjHmodnameN classnameNj j )}j ]j%)}jjzHsb#c.drm_connector_helper_tv_get_modesasbuh1hhjHubj )}(h h]h }(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubj9)}(hjOh]h*}(hjHhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjHubj )}(h connectorh]h connector}(hjHhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjHubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjHubah}(h]h ]h"]h$]h&]j j uh1jhjSHhhhjeHhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjOHhhhjeHhMubah}(h]jJHah ](j j eh"]h$]h&]j j )j huh1j hjeHhMhjLHhhubj )}(hhh]h)}(h,Fills the modes availables to a TV connectorh]h,Fills the modes availables to a TV connector}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjIhhubah}(h]h ]h"]h$]h&]uh1j hjLHhhhjeHhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# j/Ij$ j/Ij% j& j' uh1j hhhj%hNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` The connector **Description** Fills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line. This can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing. **Return** The number of modes added to the connector.h](h)}(h**Parameters**h]j3 )}(hj9Ih]h Parameters}(hj;IhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj7Iubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj3Iubjw )}(hhh]j| )}(h2``struct drm_connector *connector`` The connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjXIh]hstruct drm_connector *connector}(hjZIhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjVIubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjRIubj )}(hhh]h)}(h The connectorh]h The connector}(hjqIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmIhMhjnIubah}(h]h ]h"]h$]h&]uh1j hjRIubeh}(h]h ]h"]h$]h&]uh1j{ hjmIhMhjOIubah}(h]h ]h"]h$]h&]uh1jv hj3Iubh)}(h**Description**h]j3 )}(hjIh]h Description}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj3Iubh)}(hFills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line.h]hFills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj3Iubh)}(hyThis can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing.h]hyThis can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj3Iubh)}(h **Return**h]j3 )}(hjIh]hReturn}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjIubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj3Iubh)}(h+The number of modes added to the connector.h]h+The number of modes added to the connector.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhj3Iubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j 1drm_connector_helper_detect_from_ddc (C function)&c.drm_connector_helper_detect_from_ddchNtauh1j hj%hhhNhNubj )}(hhh](j )}(h{int drm_connector_helper_detect_from_ddc (struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h]j )}(hzint drm_connector_helper_detect_from_ddc(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hinth]hint}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Jhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj JhhhjJhMubj )}(h$drm_connector_helper_detect_from_ddch]j )}(h$drm_connector_helper_detect_from_ddch]h$drm_connector_helper_detect_from_ddc}(hj/JhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj+Jubah}(h]h ](j j eh"]h$]h&]j j uh1j hj JhhhjJhMubj)}(hR(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjKJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGJubj )}(h h]h }(hjXJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGJubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjiJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjkJmodnameN classnameNj j )}j ]j%)}jj1Jsb&c.drm_connector_helper_detect_from_ddcasbuh1hhjGJubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGJubj9)}(hjOh]h*}(hjJhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjGJubj )}(h connectorh]h connector}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjGJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCJubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j )}(hj h]hstruct}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubh)}(hhh]j )}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjJmodnameN classnameNj j )}j ]jJ&c.drm_connector_helper_detect_from_ddcasbuh1hhjJubj )}(h h]h }(hjJhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubj9)}(hjOh]h*}(hjKhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjJubj )}(hctxh]hctx}(hjKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjJubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCJubj)}(h bool forceh](j)}(hjIh]hbool}(hj-KhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)Kubj )}(h h]h }(hj:KhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)Kubj )}(hforceh]hforce}(hjHKhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)Kubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjCJubeh}(h]h ]h"]h$]h&]j j uh1jhj JhhhjJhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjJhhhjJhMubah}(h]jJah ](j j eh"]h$]h&]j j )j huh1j hjJhMhjJhhubj )}(hhh]h)}(h&Read EDID and detect connector status.h]h&Read EDID and detect connector status.}(hjrKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjoKhhubah}(h]h ]h"]h$]h&]uh1j hjJhhhjJhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jKj$ jKj% j& j' uh1j hhhj%hNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` The connector ``struct drm_modeset_acquire_ctx *ctx`` Acquire context ``bool force`` Perform screen-destructive operations, if necessary **Description** Detects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure. **Return** The connector status as defined by enum drm_connector_status.h](h)}(h**Parameters**h]j3 )}(hjKh]h Parameters}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjKubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM!hjKubjw )}(hhh](j| )}(h2``struct drm_connector *connector`` The connector h](j )}(h#``struct drm_connector *connector``h]j )}(hjKh]hstruct drm_connector *connector}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjKubj )}(hhh]h)}(h The connectorh]h The connector}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMhjKubah}(h]h ]h"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]uh1j{ hjKhMhjKubj| )}(h8``struct drm_modeset_acquire_ctx *ctx`` Acquire context h](j )}(h'``struct drm_modeset_acquire_ctx *ctx``h]j )}(hjKh]h#struct drm_modeset_acquire_ctx *ctx}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chMhjKubj )}(hhh]h)}(hAcquire contexth]hAcquire context}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhMhjLubah}(h]h ]h"]h$]h&]uh1j hjKubeh}(h]h ]h"]h$]h&]uh1j{ hjLhMhjKubj| )}(hC``bool force`` Perform screen-destructive operations, if necessary h](j )}(h``bool force``h]j )}(hj%Lh]h bool force}(hj'LhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#Lubah}(h]h ]h"]h$]h&]uh1j hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM hjLubj )}(hhh]h)}(h3Perform screen-destructive operations, if necessaryh]h3Perform screen-destructive operations, if necessary}(hj>LhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:LhM hj;Lubah}(h]h ]h"]h$]h&]uh1j hjLubeh}(h]h ]h"]h$]h&]uh1j{ hj:LhM hjKubeh}(h]h ]h"]h$]h&]uh1jv hjKubh)}(h**Description**h]j3 )}(hj`Lh]h Description}(hjbLhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^Lubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM"hjKubh)}(hDetects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure.h]hDetects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure.}(hjvLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM!hjKubh)}(h **Return**h]j3 )}(hjLh]hReturn}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjLubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM%hjKubh)}(h=The connector status as defined by enum drm_connector_status.h]h=The connector status as defined by enum drm_connector_status.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:377: ./drivers/gpu/drm/drm_probe_helper.chM&hjKubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hj%hhhNhNubeh}(h]jah ]h"])output probing helper functions referenceah$]h&]uh1hhhhhhhhMtubh)}(hhh](h)}(hEDID Helper Functions Referenceh]hEDID Helper Functions Reference}(hjLhhhNhNubah}(h]h ]h"]h$]h&]hjuh1hhjLhhhhhM}ubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j #drm_edid_decode_mfg_id (C function)c.drm_edid_decode_mfg_idhNtauh1j hjLhhhNhNubj )}(hhh](j )}(h>const char * drm_edid_decode_mfg_id (u16 mfg_id, char vend[4])h]j )}(h 0x09e52d08 **Return** a 32-bit ID per panel.h](h)}(h**Parameters**h]j3 )}(hj>Oh]h Parameters}(hj@OhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj 0x09e52d08 h](j )}(h For instance:h]h For instance:}(hjoPhhhNhNubah}(h]h ]h"]h$]h&]uh1j h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjkPubj )}(hhh]h)}(h=drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08h]hIdrm_edid_encode_panel_id(‘B’, ‘O’, ‘E’, 0x2d08) => 0x09e52d08}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}PhMhj~Pubah}(h]h ]h"]h$]h&]uh1j hjkPubeh}(h]h ]h"]h$]h&]uh1j{ hj}PhMhjhPubah}(h]h ]h"]h$]h&]uh1jv hj8Oubh)}(h **Return**h]j3 )}(hjPh]hReturn}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjPubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhj8Oubh)}(ha 32-bit ID per panel.h]ha 32-bit ID per panel.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhj8Oubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_edid_decode_panel_id (C function)c.drm_edid_decode_panel_idhNtauh1j hjLhhhNhNubj )}(hhh](j )}(hKvoid drm_edid_decode_panel_id (u32 panel_id, char vend[4], u16 *product_id)h]j )}(hJvoid drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 *product_id)h](j)}(hvoidh]hvoid}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMubj )}(h h]h }(hjPhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjPhhhjPhMubj )}(hdrm_edid_decode_panel_idh]j )}(hdrm_edid_decode_panel_idh]hdrm_edid_decode_panel_id}(hj QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ](j j eh"]h$]h&]j j uh1j hjPhhhjPhMubj)}(h-(u32 panel_id, char vend[4], u16 *product_id)h](j)}(h u32 panel_idh](h)}(hhh]j )}(hu32h]hu32}(hj(QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%Qubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj*QmodnameN classnameNj j )}j ]j%)}jj Qsbc.drm_edid_decode_panel_idasbuh1hhj!Qubj )}(h h]h }(hjHQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!Qubj )}(hpanel_idh]hpanel_id}(hjVQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj!Qubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjQubj)}(h char vend[4]h](j)}(hcharh]hchar}(hjoQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkQubj )}(h h]h }(hj}QhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkQubj )}(hvendh]hvend}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjkQubj9)}(hjMh]h[}(hjQhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjkQubj)}(hjh]h4}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkQubj9)}(hj=Mh]h]}(hjQhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjkQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjQubj)}(hu16 *product_idh](h)}(hhh]j )}(hu16h]hu16}(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjQmodnameN classnameNj j )}j ]jDQc.drm_edid_decode_panel_idasbuh1hhjQubj )}(h h]h }(hjQhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubj9)}(hjOh]h*}(hjQhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjQubj )}(h product_idh]h product_id}(hjRhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjQubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjQubeh}(h]h ]h"]h$]h&]j j uh1jhjPhhhjPhMubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjPhhhjPhMubah}(h]jPah ](j j eh"]h$]h&]j j )j huh1j hjPhMhjPhhubj )}(hhh]h)}(h1Decode a panel ID from drm_edid_encode_panel_id()h]h1Decode a panel ID from drm_edid_encode_panel_id()}(hj1RhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhj.Rhhubah}(h]h ]h"]h$]h&]uh1j hjPhhhjPhMubeh}(h]h ](j functioneh"]h$]h&]j" j j# jIRj$ jIRj% j& j' uh1j hhhjLhNhNubj) )}(hX**Parameters** ``u32 panel_id`` The panel ID to decode. ``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' termination ``u16 *product_id`` The product ID will be returned here. **Description** For instance, after: drm_edid_decode_panel_id(0x09e52d08, vend, :c:type:`product_id`) These will be true: vend[0] = 'B' vend[1] = 'O' vend[2] = 'E' vend[3] = '\0' product_id = 0x2d08h](h)}(h**Parameters**h]j3 )}(hjSRh]h Parameters}(hjURhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjQRubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjMRubjw )}(hhh](j| )}(h)``u32 panel_id`` The panel ID to decode. h](j )}(h``u32 panel_id``h]j )}(hjrRh]h u32 panel_id}(hjtRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjpRubah}(h]h ]h"]h$]h&]uh1j h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjlRubj )}(hhh]h)}(hThe panel ID to decode.h]hThe panel ID to decode.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhMhjRubah}(h]h ]h"]h$]h&]uh1j hjlRubeh}(h]h ]h"]h$]h&]uh1j{ hjRhMhjiRubj| )}(h]``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' termination h](j )}(h``char vend[4]``h]j )}(hjRh]h char vend[4]}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjRubj )}(hhh]h)}(hKA 4-byte buffer to store the 3-letter vendor string plus a '\0' terminationh]hOA 4-byte buffer to store the 3-letter vendor string plus a ‘0’ termination}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjRubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjRhMhjiRubj| )}(h:``u16 *product_id`` The product ID will be returned here. h](j )}(h``u16 *product_id``h]j )}(hjRh]hu16 *product_id}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjRubah}(h]h ]h"]h$]h&]uh1j h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjRubj )}(hhh ]h)}(h%The product ID will be returned here.h]h%The product ID will be returned here.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhMhjRubah}(h]h ]h"]h$]h&]uh1j hjRubeh}(h]h ]h"]h$]h&]uh1j{ hjRhMhjiRubeh}(h]h ]h"]h$]h&]uh1jv hjMRubh)}(h**Description**h]j3 )}(hj Sh]h Description}(hj"ShhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjSubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjMRubjw )}(hhh](j| )}(hUFor instance, after: drm_edid_decode_panel_id(0x09e52d08, vend, :c:type:`product_id`)h](j )}(hFor instance, after:h]hFor instance, after:}(hj=ShhhNhNubah}(h]h ]h"]h$]h&]uh1j h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhj9Subj )}(hhh]h)}(h@drm_edid_decode_panel_id(0x09e52d08, vend, :c:type:`product_id`)h](h+drm_edid_decode_panel_id(0x09e52d08, vend, }(hjOShhhNhNubh)}(h:c:type:`product_id`h]j )}(hjYSh]h product_id}(hj[ShhhNhNubah}(h]h ](j j c-typeeh"]h$]h&]uh1j hjWSubah}(h]h ]h"]h$]h&]refdocj refdomainj reftypetype refexplicitrefwarnj j j product_iduh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjOSubh)}(hjOShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjvShMhjLSubah}(h]h ]h"]h$]h&]uh1j hj9Subeh}(h]h ]h"]h$]h&]uh1j{ hjKShMhj6Subj| )}(h`These will be true: vend[0] = 'B' vend[1] = 'O' vend[2] = 'E' vend[3] = '\0' product_id = 0x2d08h](j )}(hThese will be true:h]hThese will be true:}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j h[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjSubj )}(hhh]h)}(hLvend[0] = 'B' vend[1] = 'O' vend[2] = 'E' vend[3] = '\0' product_id = 0x2d08h]h\vend[0] = ‘B’ vend[1] = ‘O’ vend[2] = ‘E’ vend[3] = ‘0’ product_id = 0x2d08}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:383: ./include/drm/drm_edid.hhMhjSubah}(h]h ]h"]h$]h&]uh1j hjSubeh}(h]h ]h"]h$]h&]uh1j{ hjShMhj6Subeh}(h]h ]h"]h$]h&]uh1jv hjMRubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j %drm_edid_header_is_valid (C function)c.drm_edid_header_is_validhNtauh1j hjLhhhNhNubj )}(hhh](j )}(h0int drm_edid_header_is_valid (const void *_edid)h]j )}(h/int drm_edid_header_is_valid(const void *_edid)h](j)}(hinth]hint}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjShhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjShhhjShM ubj )}(hdrm_edid_header_is_validh]j )}(hdrm_edid_header_is_validh]hdrm_edid_header_is_valid}(hjThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubah}(h]h ](j j eh"]h$]h&]j j uh1j hjShhhjShM ubj)}(h(const void *_edid)h]j)}(hconst void *_edidh](j )}(hjch]hconst}(hj!ThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj )}(h h]h }(hj.ThhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjTubj)}(hvoidh]hvoid}(hj8 if the header is perfect, down to 0 if it’s totally wrong.}(hjHUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chMhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_edid_is_valid (C function)c.drm_edid_is_validhNtauh1j hjLhhhNhNubj )}(hhh](j )}(h*bool drm_edid_is_valid (struct edid *edid)h]j )}(h)bool drm_edid_is_valid(struct edid *edid)h](j)}(hjIh]hbool}(hjwUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsUhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjsUhhhjUhM ubj )}(hdrm_edid_is_validh]j )}(hdrm_edid_is_validh]hdrm_edid_is_valid}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ](j j eh"]h$]h&]j j uh1j hjsUhhhjUhM ubj)}(h(struct edid *edid)h]j)}(hstruct edid *edidh](j )}(hj h]hstruct}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubh)}(hhh]j )}(hedidh]hedid}(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjUmodnameN classnameNj j )}j ]j%)}jjUsbc.drm_edid_is_validasbuh1hhjUubj )}(h h]h }(hjUhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubj9)}(hjOh]h*}(hjUhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjUubj )}(hedidh]hedid}(hj VhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjUubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjUubah}(h]h ]h"]h$]h&]j j uh1jhjsUhhhjUhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjoUhhhjUhM ubah}(h]jjUah ](j j eh"]h$]h&]j j )j huh1j hjUhM hjlUhhubj )}(hhh]h)}(hsanity check EDID datah]hsanity check EDID data}(hj6VhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj3Vhhubah}(h]h ]h"]h$]h&]uh1j hjlUhhhjUhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jNVj$ jNVj% j& j' uh1j hhhjLhNhNubj) )}(h**Parameters** ``struct edid *edid`` EDID data **Description** Sanity-check an entire EDID record (including extensions) **Return** True if the EDID data is valid, false otherwise.h](h)}(h**Parameters**h]j3 )}(hjXVh]h Parameters}(hjZVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVVubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chMhjRVubjw )}(hhh]j| )}(h ``struct edid *edid`` EDID data h](j )}(h``struct edid *edid``h]j )}(hjwVh]hstruct edid *edid}(hjyVhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjuVubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjqVubj )}(hhh]h)}(h EDID datah]h EDID data}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhM hjVubah}(h]h ]h"]h$]h&]uh1j hjqVubeh}(h]h ]h"]h$]h&]uh1j{ hjVhM hjnVubah}(h]h ]h"]h$]h&]uh1jv hjRVubh)}(h**Description**h]j3 )}(hjVh]h Description}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjRVubh)}(h9Sanity-check an entire EDID record (including extensions)h]h9Sanity-check an entire EDID record (including extensions)}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjRVubh)}(h **Return**h]j3 )}(hjVh]hReturn}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjVubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chMhjRVubh)}(h0True if the EDID data is valid, false otherwise.h]h0True if the EDID data is valid, false otherwise.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chMhjRVubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_edid_valid (C function)c.drm_edid_validhNtauh1j hjLhhhNhNubj )}(hhh](j )}(h5bool drm_edid_valid (const struct drm_edid *drm_edid)h]j )}(h4bool drm_edid_valid(const struct drm_edid *drm_edid)h](j)}(hjIh]hbool}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM$ubj )}(h h]h }(hj,WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWhhhj+WhM$ubj )}(hdrm_edid_validh]j )}(hdrm_edid_validh]hdrm_edid_valid}(hj>WhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj:Wubah}(h]h ](j j eh"]h$]h&]j j uh1j hjWhhhj+WhM$ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hjZWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVWubj )}(h h]h }(hjgWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVWubj )}(hj h]hstruct}(hjuWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVWubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVWubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjWmodnameN classnameNj j )}j ]j%)}jj@Wsbc.drm_edid_validasbuh1hhjVWubj )}(h h]h }(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVWubj9)}(hjOh]h*}(hjWhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjVWubj )}(hdrm_edidh]hdrm_edid}(hjWhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjVWubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjRWubah}(h]h ]h"]h$]h&]j j uh1jhjWhhhj+WhM$ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjWhhhj+WhM$ubah}(h]jWah ](j j eh"]h$]h&]j j )j huh1j hj+WhM$hjWhhubj )}(hhh]h)}(hsanity check EDID datah]hsanity check EDID data}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM$hjWhhubah}(h]h ]h"]h$]h&]uh1j hjWhhhj+WhM$ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jXj$ jXj% j& j' uh1j hhhjLhNhNubj) )}(h**Parameters** ``const struct drm_edid *drm_edid`` EDID data **Description** Sanity check an EDID. Cross check block count against allocated size and checksum the blocks. **Return** True if the EDID data is valid, false otherwise.h](h)}(h**Parameters**h]j3 )}(hjXh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM(hjXubjw )}(hhh]j| )}(h.``const struct drm_edid *drm_edid`` EDID data h](j )}(h#``const struct drm_edid *drm_edid``h]j )}(hj9Xh]hconst struct drm_edid *drm_edid}(hj;XhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj7Xubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM%hj3Xubj )}(hhh]h)}(h EDID datah]h EDID data}(hjRXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNXhM%hjOXubah}(h]h ]h"]h$]h&]uh1j hj3Xubeh}(h]h ]h"]h$]h&]uh1j{ hjNXhM%hj0Xubah}(h]h ]h"]h$]h&]uh1jv hjXubh)}(h**Description**h]j3 )}(hjtXh]h Description}(hjvXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjrXubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM'hjXubh)}(h]Sanity check an EDID. Cross check block count against allocated size and checksum the blocks.h]h]Sanity check an EDID. Cross check block count against allocated size and checksum the blocks.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM&hjXubh)}(h **Return**h]j3 )}(hjXh]hReturn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM)hjXubh)}(h0True if the EDID data is valid, false otherwise.h]h0True if the EDID data is valid, false otherwise.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM*hjXubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j /drm_edid_override_connector_update (C function)$c.drm_edid_override_connector_updatehNtauh1j hjLhhhNhNubj )}(hhh](j )}(hHint drm_edid_override_connector_update (struct drm_connector *connector)h]j )}(hGint drm_edid_override_connector_update(struct drm_connector *connector)h](j)}(hinth]hint}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjXhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXhhhjXhM ubj )}(h"drm_edid_override_connector_updateh]j )}(h"drm_edid_override_connector_updateh]h"drm_edid_override_connector_update}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjXubah}(h]h ](j j eh"]h$]h&]j j uh1j hjXhhhjXhM ubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj )}(h h]h }(hj*YhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hj;YhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj8Yubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj=YmodnameN classnameNj j )}j ]j%)}jjYsb$c.drm_edid_override_connector_updateasbuh1hhjYubj )}(h h]h }(hj[YhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubj9)}(hjOh]h*}(hjiYhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjYubj )}(h connectorh]h connector}(hjvYhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjYubah}(h]h ]h"]h$]h&]j j uh1jhjXhhhjXhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjXhhhjXhM ubah}(h]jXah ](j j eh"]h$]h&]j j )j huh1j hjXhM hjXhhubj )}(hhh]h)}(h%add modes from override/firmware EDIDh]h%add modes from override/firmware EDID}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjYhhubah}(h]h ]h"]h$]h&]uh1j hjXhhhjXhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jYj$ jYj% j& j' uh1j hhhjLhNhNubj) )}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing **Description** Add modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped. **Return** The number of modes added or 0 if we couldn't find any.h](h)}(h**Parameters**h]j3 )}(hjYh]h Parameters}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjYubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjYubjw )}(hhh]j| )}(h<``struct drm_connector *connector`` connector we're probing h](j )}(h#``struct drm_connector *connector``h]j )}(hjYh]hstruct drm_connector *connector}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjYubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjYubj )}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhM hjYubah}(h]h ]h"]h$]h&]uh1j hjYubeh}(h]h ]h"]h$]h&]uh1j{ hjYhM hjYubah}(h]h ]h"]h$]h&]uh1jv hjYubh)}(h**Description**h]j3 )}(hjZh]h Description}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjZubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjYubh)}(hAdd modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped.h]hAdd modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped.}(hj2ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjYubh)}(h **Return**h]j3 )}(hjCZh]hReturn}(hjEZhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjAZubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjYubh)}(h7The number of modes added or 0 if we couldn't find any.h]h9The number of modes added or 0 if we couldn’t find any.}(hjYZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjYubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_edid_raw (C function)c.drm_edid_rawhNtauh1j hjLhhhNhNubj )}(hhh](j )}(hBconst struct edid * drm_edid_raw (const struct drm_edid *drm_edid)h]j )}(h@const struct edid *drm_edid_raw(const struct drm_edid *drm_edid)h](j )}(hjch]hconst}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubj )}(hj h]hstruct}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubh)}(hhh]j )}(hedidh]hedid}(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjZmodnameN classnameNj j )}j ]j%)}j drm_edid_rawsbc.drm_edid_rawasbuh1hhjZhhhjZhM ubj )}(h h]h }(hjZhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZhhhjZhM ubj9)}(hjOh]h*}(hjZhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjZhhhjZhM ubj )}(h drm_edid_rawh]j )}(hjZh]h drm_edid_raw}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjZubah}(h]h ](j j eh"]h$]h&]j j uh1j hjZhhhjZhM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hj*[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(hj h]hstruct}(hj8[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj )}(h h]h }(hjE[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjV[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjS[ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjX[modnameN classnameNj j )}j ]jZc.drm_edid_rawasbuh1hhj[ubj )}(h h]h }(hjt[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubj9)}(hjOh]h*}(hj[hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj[ubj )}(hdrm_edidh]hdrm_edid}(hj[hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj[ubah}(h]h ]h"]h$]h&]j j uh1jhjZhhhjZhM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hjZhhhjZhM ubah}(h]j{Zah ](j j eh"]h$]h&]j j )j huh1j hjZhM hj}Zhhubj )}(hhh]h)}(h#Get a pointer to the raw EDID data.h]h#Get a pointer to the raw EDID data.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[hhubah}(h]h ]h"]h$]h&]uh1j hj}ZhhhjZhM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j[j$ j[j% j& j' uh1j hhhjLhNhNubj) )}(h**Parameters** ``const struct drm_edid *drm_edid`` drm_edid container **Description** Get a pointer to the raw EDID data. This is for transition only. Avoid using this like the plague. **Return** Pointer to raw EDID data.h](h)}(h**Parameters**h]j3 )}(hj[h]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj[ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[ubjw )}(hhh]j| )}(h7``const struct drm_edid *drm_edid`` drm_edid container h](j )}(h#``const struct drm_edid *drm_edid``h]j )}(hj[h]hconst struct drm_edid *drm_edid}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[ubj )}(hhh]h)}(hdrm_edid containerh]hdrm_edid container}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hM hj\ubah}(h]h ]h"]h$]h&]uh1j hj[ubeh}(h]h ]h"]h$]h&]uh1j{ hj\hM hj[ubah}(h]h ]h"]h$]h&]uh1jv hj[ubh)}(h**Description**h]j3 )}(hj5\h]h Description}(hj7\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj3\ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[ubh)}(h#Get a pointer to the raw EDID data.h]h#Get a pointer to the raw EDID data.}(hjK\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[ubh)}(h>This is for transition only. Avoid using this like the plague.h]h>This is for transition only. Avoid using this like the plague.}(hjZ\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[ubh)}(h **Return**h]j3 )}(hjk\h]hReturn}(hjm\hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hji\ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[ubh)}(hPointer to raw EDID data.h]hPointer to raw EDID data.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_edid_alloc (C function)c.drm_edid_allochNtauh1j hjLhhhNhNubj )}(hhh](j )}(hFconst struct drm_edid * drm_edid_alloc (const void *edid, size_t size)h]j )}(hDconst struct drm_edid *drm_edid_alloc(const void *edid, size_t size)h](j )}(hjch]hconst}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhj\hM ubj )}(hj h]hstruct}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhj\hM ubj )}(h h]h }(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhj\hM ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj\hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj\modnameN classnameNj j )}j ]j%)}jdrm_edid_allocsbc.drm_edid_allocasbuh1hhj\hhhj\hM ubj )}(h h]h }(hj ]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj\hhhj\hM ubj9)}(hjOh]h*}(hj]hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj\hhhj\hM ubj )}(hdrm_edid_alloch]j )}(hj]h]hdrm_edid_alloc}(hj*]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&]ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj\hhhj\hM ubj)}(h(const void *edid, size_t size)h](j)}(hconst void *edidh](j )}(hjch]hconst}(hjE]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubj )}(h h]h }(hjR]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubj)}(hvoidh]hvoid}(hj`]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA]ubj )}(h h]h }(hjn]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubj9)}(hjOh]h*}(hj|]hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjA]ubj )}(hedidh]hedid}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjA]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=]ubj)}(h size_t sizeh](h)}(hhh]j )}(hsize_th]hsize_t}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj]modnameN classnameNj j )}j ]j]c.drm_edid_allocasbuh1hhj]ubj )}(h h]h }(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubj )}(hsizeh]hsize}(hj]hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj]ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj=]ubeh}(h]h ]h"]h$]h&]j j uh1jhj\hhhj\hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj\hhhj\hM ubah}(h]j\ah ](j j eh"]h$]h&]j j )j huh1j hj\hM hj\hhubj )}(hhh]h)}(h!Allocate a new drm_edid containerh]h!Allocate a new drm_edid container}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj]hhubah}(h]h ]h"]h$]h&]uh1j hj\hhhj\hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# j^j$ j^j% j& j' uh1j hhhjLhNhNubj) )}(hX**Parameters** ``const void *edid`` Pointer to raw EDID data ``size_t size`` Size of memory allocated for EDID **Description** Allocate a new drm_edid container. Do not calculate edid size from edid, pass the actual size that has been allocated for the data. There is no validation of the raw EDID data against the size, but at least the EDID base block must fit in the buffer. The returned pointer must be freed using drm_edid_free(). **Return** drm_edid container, or NULL on errorsh](h)}(h**Parameters**h]j3 )}(hj^h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj^ubjw )}(hhh](j| )}(h.``const void *edid`` Pointer to raw EDID data h](j )}(h``const void *edid``h]j )}(hj<^h]hconst void *edid}(hj>^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj:^ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj6^ubj )}(hhh]h)}(hPointer to raw EDID datah]hPointer to raw EDID data}(hjU^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQ^hM hjR^ubah}(h]h ]h"]h$]h&]uh1j hj6^ubeh}(h]h ]h"]h$]h&]uh1j{ hjQ^hM hj3^ubj| )}(h2``size_t size`` Size of memory allocated for EDID h](j )}(h``size_t size``h]j )}(hju^h]h size_t size}(hjw^hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjs^ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjo^ubj )}(hhh]h)}(h!Size of memory allocated for EDIDh]h!Size of memory allocated for EDID}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hM hj^ubah}(h]h ]h"]h$]h&]uh1j hjo^ubeh}(h]h ]h"]h$]h&]uh1j{ hj^hM hj3^ubeh}(h]h ]h"]h$]h&]uh1jv hj^ubh)}(h**Description**h]j3 )}(hj^h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj^ubh)}(hAllocate a new drm_edid container. Do not calculate edid size from edid, pass the actual size that has been allocated for the data. There is no validation of the raw EDID data against the size, but at least the EDID base block must fit in the buffer.h]hAllocate a new drm_edid container. Do not calculate edid size from edid, pass the actual size that has been allocated for the data. There is no validation of the raw EDID data against the size, but at least the EDID base block must fit in the buffer.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj^ubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj^ubh)}(h **Return**h]j3 )}(hj^h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj^ubh)}(h%drm_edid container, or NULL on errorsh]h%drm_edid container, or NULL on errors}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_edid_dup (C function)c.drm_edid_duphNtauh1j hjLhhhNhNubj )}(hhh](j )}(hFconst struct drm_edid * drm_edid_dup (const struct drm_edid *drm_edid)h]j )}(hDconst struct drm_edid *drm_edid_dup(const struct drm_edid *drm_edid)h](j )}(hjch]hconst}(hj+_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'_hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hj9_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'_hhhj8_hM ubj )}(hj h]hstruct}(hjG_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'_hhhj8_hM ubj )}(h h]h }(hjT_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'_hhhj8_hM ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hje_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjb_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjg_modnameN classnameNj j )}j ]j%)}j drm_edid_dupsbc.drm_edid_dupasbuh1hhj'_hhhj8_hM ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj'_hhhj8_hM ubj9)}(hjOh]h*}(hj_hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj'_hhhj8_hM ubj )}(h drm_edid_duph]j )}(hj_h]h drm_edid_dup}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ](j j eh"]h$]h&]j j uh1j hj'_hhhj8_hM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(hj h]hstruct}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj )}(h h]h }(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hj_hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetj_modnameN classnameNj j )}j ]j_c.drm_edid_dupasbuh1hhj_ubj )}(h h]h }(hj`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubj9)}(hjOh]h*}(hj%`hhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj_ubj )}(hdrm_edidh]hdrm_edid}(hj2`hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj_ubeh}(h]h ]h"]h$]h&]noemphj j uh1jhj_ubah}(h]h ]h"]h$]h&]j j uh1jhj'_hhhj8_hM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj#_hhhj8_hM ubah}(h]j_ah ](j j eh"]h$]h&]j j )j huh1j hj8_hM hj _hhubj )}(hhh]h)}(hDuplicate a drm_edid containerh]hDuplicate a drm_edid container}(hj\`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjY`hhubah}(h]h ]h"]h$]h&]uh1j hj _hhhj8_hM ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jt`j$ jt`j% j& j' uh1j hhhjLhNhNubj) )}(h**Parameters** ``const struct drm_edid *drm_edid`` EDID to duplicate **Description** The returned pointer must be freed using drm_edid_free(). **Return** drm_edid container copy, or NULL on errorsh](h)}(h**Parameters**h]j3 )}(hj~`h]h Parameters}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj|`ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjx`ubjw )}(hhh]j| )}(h6``const struct drm_edid *drm_edid`` EDID to duplicate h](j )}(h#``const struct drm_edid *drm_edid``h]j )}(hj`h]hconst struct drm_edid *drm_edid}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj`ubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hj`ubj )}(hhh]h)}(hEDID to duplicateh]hEDID to duplicate}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM hj`ubah}(h]h ]h"]h$]h&]uh1j hj`ubeh}(h]h ]h"]h$]h&]uh1j{ hj`hM hj`ubah}(h]h ]h"]h$]h&]uh1jv hjx`ubh)}(h**Description**h]j3 )}(hj`h]h Description}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjx`ubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjx`ubh)}(h **Return**h]j3 )}(hj`h]hReturn}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hj`ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjx`ubh)}(h*drm_edid container copy, or NULL on errorsh]h*drm_edid container copy, or NULL on errors}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM hjx`ubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_edid_free (C function)c.drm_edid_freehNtauh1j hjLhhhNhNubj )}(hhh](j )}(h4void drm_edid_free (const struct drm_edid *drm_edid)h]j )}(h3void drm_edid_free(const struct drm_edid *drm_edid)h](j)}(hvoidh]hvoid}(hjDahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ahhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM ubj )}(h h]h }(hjSahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj@ahhhjRahM ubj )}(h drm_edid_freeh]j )}(h drm_edid_freeh]h drm_edid_free}(hjeahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaaubah}(h]h ](j j eh"]h$]h&]j j uh1j hj@ahhhjRahM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j )}(hjch]hconst}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}aubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}aubj )}(hj h]hstruct}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}aubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}aubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjamodnameN classnameNj j )}j ]j%)}jjgasbc.drm_edid_freeasbuh1hhj}aubj )}(h h]h }(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}aubj9)}(hjOh]h*}(hjahhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj}aubj )}(hdrm_edidh]hdrm_edid}(hjahhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj}aubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjyaubah}(h]h ]h"]h$]h&]j j uh1jhj@ahhhjRahM ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j )}(hj h]hstruct}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubh)}(hhh]j )}(h drm_connectorh]h drm_connector}(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjdmodnameN classnameNj j )}j ]judc.drm_get_edidasbuh1hhjdubj )}(h h]h }(hjdhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubj9)}(hjOh]h*}(hjdhhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjdubj )}(h connectorh]h connector}(hj ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjdubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjdubj)}(hstruct i2c_adapter *adapterh](j )}(hj h]hstruct}(hj$ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj eubj )}(h h]h }(hj1ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj eubh)}(hhh]j )}(h i2c_adapterh]h i2c_adapter}(hjBehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj?eubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjDemodnameN classnameNj j )}j ]judc.drm_get_edidasbuh1hhj eubj )}(h h]h }(hj`ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj eubj9)}(hjOh]h*}(hjnehhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hj eubj )}(hadapterh]hadapter}(hj{ehhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj eubeh}(h]h ]h"]h$]h&]noemphj j uh1jhjdubeh}(h]h ]h"]h$]h&]j j uh1jhj6dhhhjGdhM: ubeh}(h]h ]h"]h$]h&]j j j uh1j j j hj2dhhhjGdhM: ubah}(h]j-dah ](j j eh"]h$]h&]j j )j huh1j hjGdhM: hj/dhhubj )}(hhh]h)}(hget EDID data, if availableh]hget EDID data, if available}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM: hjehhubah}(h]h ]h"]h$]h&]uh1j hj/dhhhjGdhM: ubeh}(h]h ](j functioneh"]h$]h&]j" j j# jej$ jej% j& j' uh1j hhhjLhNhNubj) )}(hXB**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Poke the given I2C channel to grab EDID data if possible. If found, attach it to the connector. **Return** Pointer to valid EDID or NULL if we couldn't find any.h](h)}(h**Parameters**h]j3 )}(hjeh]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjeubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM> hjeubjw )}(hhh](j| )}(h<``struct drm_connector *connector`` connector we're probing h](j )}(h#``struct drm_connector *connector``h]j )}(hjeh]hstruct drm_connector *connector}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j hjeubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM; hjeubj )}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehM; hjeubah}(h]h ]h"]h$]h&]uh1j hjeubeh}(h]h ]h"]h$]h&]uh1j{ hjehM; hjeubj| )}(h;``struct i2c_adapter *adapter`` I2C adapter to use for DDC h](j )}(h``struct i2c_adapter *adapter``h]j )}(hjfh]hstruct i2c_adapter *adapter}(hj!fhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&]uh1j h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM< hjfubj )}(hhh]h)}(hI2C adapter to use for DDCh]hI2C adapter to use for DDC}(hj8fhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4fhM< hj5fubah}(h]h ]h"]h$]h&]uh1j hjfubeh}(h]h ]h"]h$]h&]uh1j{ hj4fhM< hjeubeh}(h]h ]h"]h$]h&]uh1jv hjeubh)}(h**Description**h]j3 )}(hjZfh]h Description}(hj\fhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjXfubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM> hjeubh)}(h`Poke the given I2C channel to grab EDID data if possible. If found, attach it to the connector.h]h`Poke the given I2C channel to grab EDID data if possible. If found, attach it to the connector.}(hjpfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM= hjeubh)}(h **Return**h]j3 )}(hjfh]hReturn}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j2 hjfubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chM@ hjeubh)}(h6Pointer to valid EDID or NULL if we couldn't find any.h]h8Pointer to valid EDID or NULL if we couldn’t find any.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chMA hjeubeh}(h]h ] kernelindentah"]h$]h&]uh1j( hjLhhhNhNubj )}(hhh]h}(h]h ]h"]h$]h&]entries](j !drm_edid_read_custom (C function)c.drm_edid_read_customhNtauh1j hjLhhhNhNubj )}(hhh](j )}(hwconst struct drm_edid * drm_edid_read_custom (struct drm_connector *connector, read_block_fn read_block, void *context)h]j )}(huconst struct drm_edid *drm_edid_read_custom(struct drm_connector *connector, read_block_fn read_block, void *context)h](j )}(hjch]hconst}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:386: ./drivers/gpu/drm/drm_edid.chMU ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfhhhjfhMU ubj )}(hj h]hstruct}(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfhhhjfhMU ubj )}(h h]h }(hjfhhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfhhhjfhMU ubh)}(hhh]j )}(hdrm_edidh]hdrm_edid}(hjghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfubah}(h]h ]h"]h$]h&] refdomainj reftypej reftargetjgmodnameN classnameNj j )}j ]j%)}jdrm_edid_read_customsbc.drm_edid_read_customasbuh1hhjfhhhjfhMU ubj )}(h h]h }(hj!ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjfhhhjfhMU ubj9)}(hjOh]h*}(hj/ghhhNhNubah}(h]h ]jDah"]h$]h&]uh1j8hjfhhhjfhMU ubj )}(hdrm_edid_read_customh]j )}(hjgh]hdrm_edid_read_custom}(hj@ghhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj