sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget'/translations/zh_CN/gpu/drm-kms-helpersmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/zh_TW/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/it_IT/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ja_JP/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ko_KR/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/sp_SP/gpu/drm-kms-helpersmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hMode Setting Helper Functionsh]hMode Setting Helper Functions}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhA/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers.rsthKubh paragraph)}(hXThe DRM subsystem aims for a strong separation between core code and helper libraries. Core code takes care of general setup and teardown and decoding userspace requests to kernel internal objects. Everything else is handled by a large set of helper libraries, which can be combined freely to pick and choose for each driver what fits, and avoid shared code where special behaviour is needed.h]hXThe DRM subsystem aims for a strong separation between core code and helper libraries. Core code takes care of general setup and teardown and decoding userspace requests to kernel internal objects. Everything else is handled by a large set of helper libraries, which can be combined freely to pick and choose for each driver what fits, and avoid shared code where special behaviour is needed.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXThis distinction between core code and helpers is especially strong in the modesetting code, where there's a shared userspace ABI for all drivers. This is in contrast to the render side, where pretty much everything (with very few exceptions) can be considered optional helper code.h]hXThis distinction between core code and helpers is especially strong in the modesetting code, where there’s a shared userspace ABI for all drivers. This is in contrast to the render side, where pretty much everything (with very few exceptions) can be considered optional helper code.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(h5There are a few areas these helpers can grouped into:h]h5There are a few areas these helpers can grouped into:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh bullet_list)}(hhh](h list_item)}(hXTHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there's also the simple display pipe helpers. h]h)}(hXSHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there's also the simple display pipe helpers.h]hXUHelpers to implement modesetting. The important ones here are the atomic helpers. Old drivers still often use the legacy CRTC helpers. They both share the same set of common helper vtables. For really simple drivers (anything that would have been a great fit in the deprecated fbdev subsystem) there’s also the simple display pipe helpers.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhhhhhNubh)}(hXThere's a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally there's also generic helpers for handling output probing, and for dealing with EDIDs. h]h)}(hXThere's a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally there's also generic helpers for handling output probing, and for dealing with EDIDs.h]hXThere’s a big pile of helpers for handling outputs. First the generic bridge helpers for handling encoder and transcoder IP blocks. Second the panel helpers for handling panel-related information and logic. Plus then a big set of helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally there’s also generic helpers for handling output probing, and for dealing with EDIDs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhhhhhhNubh)}(hThe last group of helpers concerns itself with the frontend side of a display pipeline: Planes, handling rectangles for visibility checking and scissoring, flip queues and assorted bits. h]h)}(hThe last group of helpers concerns itself with the frontend side of a display pipeline: Planes, handling rectangles for visibility checking and scissoring, flip queues and assorted bits.h]hThe last group of helpers concerns itself with the frontend side of a display pipeline: Planes, handling rectangles for visibility checking and scissoring, flip queues and assorted bits.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hjubah}(h]h ]h"]h$]h&]uh1hhhhhhhhNubeh}(h]h ]h"]h$]h&]bullet*uh1hhhhKhhhhubh)}(hhh](h)}(h+Modeset Helper Reference for Common Vtablesh]h+Modeset Helper Reference for Common Vtables}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hhhhhK%ubh)}(hX`The DRM mode setting helper functions are common code for drivers to use if they wish. Drivers are not forced to use this code in their implementations but it would be useful if the code they do use at least provides a consistent interface and operation to userspace. Therefore it is highly recommended to use the provided helpers as much as possible.h]hX`The DRM mode setting helper functions are common code for drivers to use if they wish. Drivers are not forced to use this code in their implementations but it would be useful if the code they do use at least provides a consistent interface and operation to userspace. Therefore it is highly recommended to use the provided helpers as much as possible.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:39: ./include/drm/drm_modeset_helper_vtables.hhK$hj:hhubh)}(hBecause there is only one pointer per modeset object to hold a vfunc table for helper libraries they are by necessity shared among the different helpers.h]hBecause there is only one pointer per modeset object to hold a vfunc table for helper libraries they are by necessity shared among the different helpers.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:39: ./include/drm/drm_modeset_helper_vtables.hhK*hj:hhubh)}(hTTo make this clear all the helper vtables are pulled together in this location here.h]hTTo make this clear all the helper vtables are pulled together in this location here.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:39: ./include/drm/drm_modeset_helper_vtables.hhK.hj:hhubhindex)}(hhh]h}(h]h ]h"]h$]h&]entries](single drm_crtc_helper_funcs (C struct)c.drm_crtc_helper_funcshNtauh1jxhj:hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhNubhdesc)}(hhh](hdesc_signature)}(hdrm_crtc_helper_funcsh]hdesc_signature_line)}(hstruct drm_crtc_helper_funcsh](hdesc_sig_keyword)}(hstructh]hstruct}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKubhdesc_sig_space)}(h h]h }(hjhhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKubh desc_name)}(hdrm_crtc_helper_funcsh]h desc_sig_name)}(hjh]hdrm_crtc_helper_funcs}(hjhhhNhNubah}(h]h ]nah"]h$]h&]uh1jhjubah}(h]h ](sig-namedescnameeh"]h$]h&] xml:spacepreserveuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jj add_permalinkuh1jsphinx_line_type declaratorhjhhhjhKubah}(h]jah ](sig sig-objecteh"]h$]h&] is_multiline _toc_parts) _toc_namehuh1jhjhKhjhhubh desc_content)}(hhh]h)}(hhelper operations for CRTCsh]hhelper operations for CRTCs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhK8hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](cstructeh"]h$]h&]domainjobjtypejdesctypejnoindex noindexentrynocontentsentryuh1jhhhj:hjhNubh container)}(hX@**Definition**:: struct drm_crtc_helper_funcs { void (*dpms)(struct drm_crtc *crtc, int mode); void (*prepare)(struct drm_crtc *crtc); void (*commit)(struct drm_crtc *crtc); enum drm_mode_status (*mode_valid)(struct drm_crtc *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, int x, int y, struct drm_framebuffer *old_fb); void (*mode_set_nofb)(struct drm_crtc *crtc); int (*mode_set_base)(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb); void (*disable)(struct drm_crtc *crtc); int (*atomic_check)(struct drm_crtc *crtc, struct drm_atomic_state *state); void (*atomic_begin)(struct drm_crtc *crtc, struct drm_atomic_state *state); void (*atomic_flush)(struct drm_crtc *crtc, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_crtc *crtc, struct drm_atomic_state *state); void (*atomic_disable)(struct drm_crtc *crtc, struct drm_atomic_state *state); bool (*get_scanout_position)(struct drm_crtc *crtc, bool in_vblank_irq, int *vpos, int *hpos, ktime_t *stime, ktime_t *etime, const struct drm_display_mode *mode); bool (*handle_vblank_timeout)(struct drm_crtc *crtc); }; **Members** ``dpms`` Callback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used. ``prepare`` This callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used. ``commit`` This callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used. ``mode_valid`` This callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``mode_set`` This callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. ``mode_set_nofb`` This callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers. Note that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback. This callback is optional. ``mode_set_base`` This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by the CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. ``disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one. NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. ``atomic_check`` Drivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check(). When using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_begin`` Drivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display. This hook is called before any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_flush`` Drivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates. Simple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates. This hook is called after any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_enable`` This callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers. This function is optional. ``atomic_disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. This function is optional. ``get_scanout_position`` Called by vblank timestamping code. Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback. Parameters: crtc: The CRTC. in_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set. vpos: Target location for current vertical scanout position. hpos: Target location for current horizontal scanout position. stime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp. etime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp. mode: Current display timings. Returns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank." Returns: True on success, false if a reliable scanout position counter could not be read out. ``handle_vblank_timeout`` Handles timeouts of the vblank timer. Called by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout. This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h](h)}(h**Definition**::h](hstrong)}(h**Definition**h]h Definition}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(h **Members**h]j%)}(hjRh]hMembers}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKQhjubhdefinition_list)}(hhh](hdefinition_list_item)}(hXn``dpms`` Callback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used. h](hterm)}(h``dpms``h]hliteral)}(hjwh]hdpms}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKKhjoubh definition)}(hhh](h)}(hCallback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms().h]hCallback to control power levels on the CRTC. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy CRTC helpers to implement DPMS functionality in drm_helper_connector_dpms().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhK@hjubh)}(huThis callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used.h](hYThis callback is also used to disable a CRTC by calling it with DRM_MODE_DPMS_OFF if the }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh hook isn’t used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKEhjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** and **atomic_disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKHhjubeh}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jmhjhKKhjjubjn)}(hX``prepare`` This callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used. h](jt)}(h ``prepare``h]jz)}(hj h]hprepare}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKZhjubj)}(hhh](h)}(hThis callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF.h](hThis callback should prepare the CRTC for a subsequent modeset, which in practice means the driver should disable the CRTC if it is running. Most drivers ended up implementing this by calling their }(hj"hhhNhNubj%)}(h**dpms**h]hdpms}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"ubh hook with DRM_MODE_DPMS_OFF.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKRhjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hjChhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjCubh should be used.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKWhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKZhjjubjn)}(hX``commit`` This callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used. h](jt)}(h ``commit``h]jz)}(hjvh]hcommit}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjtubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKihjpubj)}(hhh](h)}(hThis callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON.h](hThis callback should commit the new mode on the CRTC after a modeset, which in practice means the driver should enable the CRTC. Most drivers ended up implementing this by calling their }(hjhhhNhNubj%)}(h**dpms**h]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh hook with DRM_MODE_DPMS_ON.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKahjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead **atomic_enable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling a CRTC to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKfhjubeh}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhjhKihjjubjn)}(hX?``mode_valid`` This callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum h](jt)}(h``mode_valid``h]jz)}(hjh]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubj)}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this crtc. This should be implemented if the crtc has some sort of restriction in the modes it can display. For example, a given crtc may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKphjubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKxhjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhK}hjubh)}(hNOTE:h]hNOTE:}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hXrSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hj8hhhNhNubj%)}(h**mode_fixup**h]h mode_fixup}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubh or }(hj8hhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubh.}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hRETURNS:h]hRETURNS:}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjjubjn)}(hX4``mode_fixup`` This callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](jt)}(h``mode_fixup``h]jz)}(hjh]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubj)}(hhh](h)}(hXThis callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the :c:type:`drm_encoder` and :c:type:`drm_bridge_funcs.mode_fixup ` vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate a mode. The parameter mode is the display mode that userspace requested, adjusted_mode is the mode the encoders need to be fed with. Note that this is the inverse semantics of the meaning for the }(hjhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjh]h drm_encoder}(hjhhhNhNubah}(h]h ](xrefjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocgpu/drm-kms-helpers refdomainjreftypetype refexplicitrefwarn c:parent_keysphinx.domains.c LookupKey)}data]sb reftarget drm_encoderuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh and }(hjhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_fixup `h]jz)}(hjh]hdrm_bridge_funcs.mode_fixup}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjhKhjubh~ vfunc. If the CRTC cannot support the requested conversion from mode to adjusted_mode it should reject the modeset. See also }(hjhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jz)}(hjh]hdrm_crtc_state.adjusted_mode}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjhKhjubh for more details.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjubh)}(hiThis function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional.h]hiThis function is used by both legacy CRTC helpers and atomic helpers. With atomic helpers it is optional.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hNOTE:h]hNOTE:}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hXIThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.h]hXKThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hFThis is in contrast to the legacy CRTC helpers where this was allowed.h]hFThis is in contrast to the legacy CRTC helpers where this was allowed.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hXaAtomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback, but note that they're not perfectly equivalent: **mode_valid** is called from drm_atomic_helper_check_modeset(), but **atomic_check** is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only.h](hRAtomic drivers which need to inspect and adjust more state should instead use the }(hjrhhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubh= callback, but note that they’re not perfectly equivalent: }(hjrhhhNhNubj%)}(h**mode_valid**h]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubh7 is called from drm_atomic_helper_check_modeset(), but }(hjrhhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubho is called from drm_atomic_helper_check_planes(), because originally it was meant for plane update checks only.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hXLAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jz)}(hjh]hdrm_connector.modes}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubha. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into }(hjhhhNhNubj%)}(h**mode_valid**h]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjjubjn)}(hX``mode_set`` This callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. h](jt)}(h ``mode_set``h]jz)}(hj+h]hmode_set}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhj%ubj)}(hhh](h)}(hXThis callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can't update other planes it's incompatible with atomic modeset support.h]hXThis callback is used by the legacy CRTC helpers to set a new mode, position and framebuffer. Since it ties the primary plane to every mode change it is incompatible with universal plane support. And since it can’t update other planes it’s incompatible with atomic modeset support.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjAubh)}(h:This callback is only used by CRTC helpers and deprecated.h]h:This callback is only used by CRTC helpers and deprecated.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjAubh)}(hRETURNS:h]hRETURNS:}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjAubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKhjAubeh}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj@hKhjjubjn)}(hXZ``mode_set_nofb`` This callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers. Note that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback. This callback is optional. h](jt)}(h``mode_set_nofb``h]jz)}(hjh]h mode_set_nofb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubj)}(hhh](h)}(hThis callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers.h]hThis callback is used to update the display mode of a CRTC without changing anything of the primary plane configuration. This fits the requirement of atomic and hence is used by the atomic helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hXdNote that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the **atomic_enable** callback.h](hXMNote that the display pipe is completely off when this function is called. Atomic drivers which need hardware to be running before they program the new display mode (e.g. because they implement runtime PM) should not use this hook. This is because the helper library calls this hook only once per mode change and not every time the display pipeline is suspended using either DPMS or the new “ACTIVE” property. Which means register values set in this callback might get reset when the CRTC is suspended, but not restored. Such drivers should instead move all their CRTC setup into the }(hjhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hThis callback is optional.h]hThis callback is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjjubjn)}(hX0``mode_set_base`` This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support. This callback is only used by the CRTC helpers and deprecated. RETURNS: 0 on success or a negative error code on failure. h](jt)}(h``mode_set_base``h]jz)}(hjh]h mode_set_base}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubj)}(hhh](h)}(hXThis callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the **mode_set** callback. Since it can't update other planes it's incompatible with atomic modeset support.h](hX8This callback is used by the legacy CRTC helpers to set a new framebuffer and scanout position. It is optional and used as an optimized fast-path instead of a full mode set operation with all the resulting flickering. If it is not present drm_crtc_helper_set_config() will fall back to a full modeset, using the }(hjhhhNhNubj%)}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh` callback. Since it can’t update other planes it’s incompatible with atomic modeset support.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(h>This callback is only used by the CRTC helpers and deprecated.h]h>This callback is only used by the CRTC helpers and deprecated.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(hRETURNS:h]hRETURNS:}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjjubjn)}(hXd``disable`` This callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one. NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. h](jt)}(h ``disable``h]jz)}(hjrh]hdisable}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjlubj)}(hhh](h)}(hXThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own }(hjhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jz)}(hjh]h drm_encoder_helper_funcs.disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhKhjubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjubh)}(hXThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **atomic_enable** for atomic drivers. Atomic drivers should consider to use **atomic_disable** instead of this one.h](hXThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh must be the inverse of }(hjhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh; for atomic drivers. Atomic drivers should consider to use }(hjhhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh instead of this one.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hNOTE:h]hNOTE:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM hjubh)}(hX[With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a CRTC: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers).h](hEWith legacy CRTC helpers there’s a big semantic difference between }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and other hooks (like }(hjhhhNhNubj%)}(h **prepare**h]hprepare}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh or }(hjhhhNhNubj%)}(h**dpms**h]hdpms}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh) used to shut down a CRTC: }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhr is only called when also logically disabling the display pipeline and needs to release any resources acquired in }(hjhhhNhNubj%)}(h **mode_set**h]hmode_set}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh: (like shared PLLs, or again release pinned framebuffers).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hTherefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic.h](h Therefore }(hjzhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubh must be the inverse of }(hjzhhhNhNubj%)}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubh plus }(hjzhhhNhNubj%)}(h **commit**h]hcommit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubh] for drivers still using legacy CRTC helpers, which is different from the rules under atomic.}(hjzhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjjubjn)}(hX``atomic_check`` Drivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check(). When using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](jt)}(h``atomic_check``h]jz)}(hjh]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMKhjubj)}(hhh](h)}(hXfDrivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check().h]hXfDrivers should check plane-update related CRTC constraints in this hook. They can also check mode related limitations but need to be aware of the calling order, since this hook is used by drm_atomic_helper_check_planes() whereas the preparations needed to check output routing and the display mode is done in drm_atomic_helper_check_modeset(). Therefore drivers that want to check output routing and display mode constraints in this callback must ensure that drm_atomic_helper_check_modeset() has been called beforehand. This is calling order used by the default helper implementation in drm_atomic_helper_check().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXWhen using drm_atomic_helper_check_planes() this hook is called after the :c:type:`drm_plane_helper_funcs.atomic_check ` hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.h](hJWhen using drm_atomic_helper_check_planes() this hook is called after the }(hjhhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jz)}(hj h]h#drm_plane_helper_funcs.atomic_check}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM)hjubhX  hook for planes, which allows drivers to assign shared resources requested by planes in this callback here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hM)hjubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hj+ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM0hjubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj: hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM7hjubh)}(hNOTE:h]hNOTE:}(hjI hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM:hjubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in.h]hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state object passed-in.}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM<hjubh)}(hXLAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjg hhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jz)}(hjq h]hdrm_connector.modes}(hjs hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjo ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM@hjg ubha. To ensure that modes are filtered consistently put any CRTC constraints and limits checks into }(hjg hhhNhNubj%)}(h**mode_valid**h]h mode_valid}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjg ubh.}(hjg hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hM@hjubh)}(hRETURNS:h]hRETURNS:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMFhjubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hj h]hdrm_modeset_lock}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMHhj ubh deadlock.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMHhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMKhjjubjn)}(hX``atomic_begin`` Drivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display. This hook is called before any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](jt)}(h``atomic_begin``h]jz)}(hj h]h atomic_begin}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM`hj ubj)}(hhh](h)}(hDrivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display.h]hDrivers should prepare for an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might be vblank evasion, blocking updates by setting bits or doing preparatory work for e.g. manual update display.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMShj ubh)}(hAThis hook is called before any plane commit functions are called.h]hAThis hook is called before any plane commit functions are called.}(hj& hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMXhj ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMZhj ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hjD hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM_hj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hM`hjjubjn)}(hXS``atomic_flush`` Drivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates. Simple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates. This hook is called after any plane commit functions are called. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](jt)}(h``atomic_flush``h]jz)}(hje h]h atomic_flush}(hjg hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjc ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMxhj_ ubj)}(hhh](h)}(hDrivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates.h]hDrivers should finalize an atomic update of multiple planes on a CRTC in this hook. Depending upon hardware this might include checking that vblank evasion was successful, unblocking updates by setting bits or setting the GO bit to flush out all updates.}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMghj{ ubh)}(hSimple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates.h]hSimple hardware or hardware with special requirements can commit and flush out all updates for all planes from this hook and forgo all the other commit hooks for plane updates.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMlhj{ ubh)}(h@This hook is called after any plane commit functions are called.h]h@This hook is called after any plane commit functions are called.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMphj{ ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMrhj{ ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMwhj{ ubeh}(h]h ]h"]h$]h&]uh1jhj_ ubeh}(h]h ]h"]h$]h&]uh1jmhjz hMxhjjubjn)}(hX;``atomic_enable`` This callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers. This function is optional. h](jt)}(h``atomic_enable``h]jz)}(hj h]h atomic_enable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh](h)}(hXThis callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder's own :c:type:`drm_encoder_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to enable the CRTC. With the atomic drivers it is called before all encoders connected to this CRTC are enabled through the encoder’s own }(hj hhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.enable `h]jz)}(hj h]hdrm_encoder_helper_funcs.enable}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubh)}(hX\This hook is used only by atomic helpers, for symmetry with **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the CRTC level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_enable** must be the inverse of **atomic_disable** for atomic drivers.h](h` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level. This function is optional. h](jt)}(h``atomic_disable``h]jz)}(hj h]hatomic_disable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh](h)}(hXThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own :c:type:`drm_encoder_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the CRTC. With the atomic drivers it is called after all encoders connected to this CRTC have been shut off already using their own }(hj hhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jz)}(hj h]h drm_encoder_helper_funcs.disable}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh hook. If that sequence is too simple drivers can just add their own hooks and call it from this CRTC callback here by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubh)}(hThis hook is used only by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the CRTC level.h]hThis hook is used only by atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the CRTC level.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hThis function is optional.h]hThis function is optional.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjjubjn)}(hXD``get_scanout_position`` Called by vblank timestamping code. Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback. Parameters: crtc: The CRTC. in_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set. vpos: Target location for current vertical scanout position. hpos: Target location for current horizontal scanout position. stime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp. etime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp. mode: Current display timings. Returns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank." Returns: True on success, false if a reliable scanout position counter could not be read out. h](jt)}(h``get_scanout_position``h]jz)}(hj h]hget_scanout_position}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh](h)}(h#Called by vblank timestamping code.h]h#Called by vblank timestamping code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hX:Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the **drm_crtc_funcs.get_vblank_timestamp** callback.h](hX Returns the current display scanout position from a CRTC and an optional accurate ktime_get() timestamp of when the position was measured. Note that this is a helper callback which is only used if a driver uses drm_crtc_vblank_helper_get_vblank_timestamp() for the }(hj- hhhNhNubj%)}(h'**drm_crtc_funcs.get_vblank_timestamp**h]h#drm_crtc_funcs.get_vblank_timestamp}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj- ubh callback.}(hj- hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(h Parameters:h]h Parameters:}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubji)}(hhh](jn)}(hcrtc: The CRTC.h](jt)}(hcrtc:h]hcrtc:}(hjd hhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj` ubj)}(hhh]h)}(h The CRTC.h]h The CRTC.}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjs ubah}(h]h ]h"]h$]h&]uh1jhj` ubeh}(h]h ]h"]h$]h&]uh1jmhjr hMhj] ubjn)}(hin_vblank_irq: True when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.h](jt)}(hin_vblank_irq:h]hin_vblank_irq:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh]h)}(hTrue when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.h]hTrue when called from drm_crtc_handle_vblank(). Some drivers need to apply some workarounds for gpu-specific vblank irq quirks if the flag is set.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj] ubjn)}(hhpos: Target location for current horizontal scanout position.h](jt)}(hhpos:h]hhpos:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh]h)}(h8Target location for current horizontal scanout position.h]h8Target location for current horizontal scanout position.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj] ubjn)}(htstime: Target location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.h](jt)}(hstime:h]hstime:}(hj( hhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ ubj)}(hhh]h)}(hmTarget location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.h]hmTarget location for timestamp taken immediately before scanout position query. Can be NULL to skip timestamp.}(hj: hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6 hMhj7 ubah}(h]h ]h"]h$]h&]uh1jhj$ ubeh}(h]h ]h"]h$]h&]uh1jmhj6 hMhj] ubjn)}(hsetime: Target location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.h](jt)}(hetime:h]hetime:}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjT ubj)}(hhh]h)}(hlTarget location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.h]hlTarget location for timestamp taken immediately after scanout position query. Can be NULL to skip timestamp.}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjf hMhjg ubah}(h]h ]h"]h$]h&]uh1jhjT ubeh}(h]h ]h"]h$]h&]uh1jmhjf hMhj] ubjn)}(hmode: Current display timings. h](jt)}(hmode:h]hmode:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh]h)}(hCurrent display timings.h]hCurrent display timings.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj] ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(hReturns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means "one scanline until start of active scanout / end of vblank."h]hReturns vpos as a positive number while in active scanout area. Returns vpos as a negative number inside vblank, counting the number of scanlines to go until end of vblank, e.g., -1 means “one scanline until start of active scanout / end of vblank.”}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hReturns:h]hReturns:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hTTrue on success, false if a reliable scanout position counter could not be read out.h]hTTrue on success, false if a reliable scanout position counter could not be read out.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjjubjn)}(hXe``handle_vblank_timeout`` Handles timeouts of the vblank timer. Called by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout. This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h](jt)}(h``handle_vblank_timeout``h]jz)}(hj h]hhandle_vblank_timeout}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh](h)}(h%Handles timeouts of the vblank timer.h]h%Handles timeouts of the vblank timer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hCalled by CRTC's the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout.h]hCalled by CRTC’s the vblank timer on each timeout. Semantics is equivalient to drm_crtc_handle_vblank(). Implementations should invoke drm_crtc_handle_vblank() as part of processing the timeout.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(h`This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.h]h`This callback is optional. If unset, the vblank timer invokes drm_crtc_handle_vblank() directly.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubh)}(h**Description**h]j%)}(hjYh]h Description}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj:hhubh)}(hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.h]hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhK9hj:hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_crtc_helper_add (C function)c.drm_crtc_helper_addhNtauh1jxhj:hhhjhNubj)}(hhh](j)}(h[void drm_crtc_helper_add (struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h]j)}(hZvoid drm_crtc_helper_add(struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h](hdesc_sig_keyword_type)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]ktah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_crtc_helper_addh]j)}(hdrm_crtc_helper_addh]hdrm_crtc_helper_add}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubhdesc_parameterlist)}(hB(struct drm_crtc *crtc, const struct drm_crtc_helper_funcs *funcs)h](hdesc_parameter)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftype identifier reftargetjmodnameN classnameNjj)}j]j ASTIdentifier)}jjsbc.drm_crtc_helper_addasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubhdesc_sig_punctuation)}(hj9h]h*}(hj,hhhNhNubah}(h]h ]pah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h)const struct drm_crtc_helper_funcs *funcsh](j)}(hconsth]hconst}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(hjh]hstruct}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubh)}(hhh]j)}(hdrm_crtc_helper_funcsh]hdrm_crtc_helper_funcs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_crtc_helper_addasbuh1hhjOubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjOubj)}(hfuncsh]hfuncs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h!sets the helper vtable for a crtch]h!sets the helper vtable for a crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj:hjhNubj)}(h**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``const struct drm_crtc_helper_funcs *funcs`` helper vtable to set for **crtc**h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` DRM CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj1h]hstruct drm_crtc *crtc}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj+ubj)}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjGubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhjFhMhj(ubjn)}(hO``const struct drm_crtc_helper_funcs *funcs`` helper vtable to set for **crtc**h](jt)}(h-``const struct drm_crtc_helper_funcs *funcs``h]jz)}(hjjh]h)const struct drm_crtc_helper_funcs *funcs}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjdubj)}(hhh]h)}(h!helper vtable to set for **crtc**h](hhelper vtable to set for }(hjhhhNhNubj%)}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj(ubeh}(h]h ]h"]h$]h&]uh1jhhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_encoder_helper_funcs (C struct)c.drm_encoder_helper_funcshNtauh1jxhj:hhhjhNubj)}(hhh](j)}(hdrm_encoder_helper_funcsh]j)}(hstruct drm_encoder_helper_funcsh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_encoder_helper_funcsh]j)}(hjh]hdrm_encoder_helper_funcs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hhelper operations for encodersh]hhelper operations for encoders}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jstructeh"]h$]h&]jjjj,jj,jjjuh1jhhhj:hjhNubj)}(hX4**Definition**:: struct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); }; **Members** ``dpms`` Callback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used. ``mode_valid`` This callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``prepare`` This callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used. ``commit`` This callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used. ``mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers. NOTE: If the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead. ``atomic_mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector. ``detect`` This callback can be used by drivers who want to do detection on the encoder object instead of in connector functions. It is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks. FIXME: This should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it. ``atomic_disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers. This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**. ``atomic_enable`` This callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers. This hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**. ``disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers. For atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below! NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. ``enable`` This callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers. ``atomic_check`` This callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector. Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented. This function is used by the atomic helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_state` update tracking structure. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubh:}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubj@)}(hXstruct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); };h]hXstruct drm_encoder_helper_funcs { void (*dpms)(struct drm_encoder *encoder, int mode); enum drm_mode_status (*mode_valid)(struct drm_encoder *crtc, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*prepare)(struct drm_encoder *encoder); void (*commit)(struct drm_encoder *encoder); void (*mode_set)(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*atomic_mode_set)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); enum drm_connector_status (*detect)(struct drm_encoder *encoder, struct drm_connector *connector); void (*atomic_disable)(struct drm_encoder *encoder, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state); void (*disable)(struct drm_encoder *encoder); void (*enable)(struct drm_encoder *encoder); int (*atomic_check)(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); };}hjQsbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh)}(h **Members**h]j%)}(hjbh]hMembers}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubji)}(hhh](jn)}(hXn``dpms`` Callback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms(). This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used. h](jt)}(h``dpms``h]jz)}(hjh]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj{ubj)}(hhh](h)}(hCallback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms().h]hCallback to control power levels on the encoder. If the mode passed in is unsupported, the provider must use the next lowest power level. This is used by the legacy encoder helpers to implement DPMS functionality in drm_helper_connector_dpms().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hyThis callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the **disable** hook isn't used.h](h]This callback is also used to disable an encoder by calling it with DRM_MODE_DPMS_OFF if the }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh hook isn’t used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** and **disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling and disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj%)}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjxubjn)}(hXH``mode_valid`` This callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**. RETURNS: drm_mode_status Enum h](jt)}(h``mode_valid``h]jz)}(hjh]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM$hj ubj)}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this encoder. This should be implemented if the encoder has some sort of restriction in the modes it can display. For example, a given encoder may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM hj%ubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj%ubh)}(hThis function is optional.h]hThis function is optional.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj%ubh)}(hNOTE:h]hNOTE:}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj%ubh)}(hXrSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup** or **atomic_check**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hjdhhhNhNubj%)}(h**mode_fixup**h]h mode_fixup}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubh or }(hjdhhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubh.}(hjdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj%ubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM"hj%ubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hM$hj%ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hM$hjxubjn)}(hXz``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter. This is in contrast to the legacy CRTC helpers where this was allowed. Atomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](jt)}(h``mode_fixup``h]jz)}(hjh]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMOhjubj)}(hhh](h)}(hXThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or a :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM,hjubh or a }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hj h]h drm_bridge}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjhM,hjubh. The parameter adjusted_mode is the input mode the encoder requires. It can be modified by this callback and does not need to match mode. See also }(hjhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jz)}(hj0h]hdrm_crtc_state.adjusted_mode}(hj2hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjhM,hjubh for more details.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM,hjubh)}(h\This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional.h]h\This function is used by both legacy CRTC helpers and atomic helpers. This hook is optional.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM3hjubh)}(hNOTE:h]hNOTE:}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM6hjubh)}(hXIThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.h]hXKThis function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Atomic drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in adjusted_mode parameter.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM8hjubh)}(hFThis is in contrast to the legacy CRTC helpers where this was allowed.h]hFThis is in contrast to the legacy CRTC helpers where this was allowed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM>hjubh)}(hAtomic drivers which need to inspect and adjust more state should instead use the **atomic_check** callback. If **atomic_check** is used, this hook isn't called since **atomic_check** allows a strict superset of the functionality of **mode_fixup**.h](hRAtomic drivers which need to inspect and adjust more state should instead use the }(hjhhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh callback. If }(hjhhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh) is used, this hook isn’t called since }(hjhhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 allows a strict superset of the functionality of }(hjhhhNhNubj%)}(h**mode_fixup**h]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMAhjubh)}(hXOAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jz)}(hjh]hdrm_connector.modes}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMFhjubhd. To ensure that modes are filtered consistently put any encoder constraints and limits checks into }(hjhhhNhNubj%)}(h**mode_valid**h]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMFhjubh)}(hRETURNS:h]hRETURNS:}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMLhjubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMNhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMOhjxubjn)}(hX``prepare`` This callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used. h](jt)}(h ``prepare``h]jz)}(hj^h]hprepare}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM`hjXubj)}(hhh](h)}(hThis callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_OFF.h](hThis callback should prepare the encoder for a subsequent modeset, which in practice means the driver should disable the encoder if it is running. Most drivers ended up implementing this by calling their }(hjwhhhNhNubj%)}(h**dpms**h]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubh hook with DRM_MODE_DPMS_OFF.}(hjwhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMXhjtubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **disable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for disabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM]hjtubeh}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jmhjshM`hjxubjn)}(hX``commit`` This callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON. This callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used. h](jt)}(h ``commit``h]jz)}(hjh]hcommit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMohjubj)}(hhh](h)}(hThis callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their **dpms** hook with DRM_MODE_DPMS_ON.h](hThis callback should commit the new mode on the encoder after a modeset, which in practice means the driver should enable the encoder. Most drivers ended up implementing this by calling their }(hjhhhNhNubj%)}(h**dpms**h]hdpms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh hook with DRM_MODE_DPMS_ON.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMghjubh)}(hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead **enable** should be used.h](hThis callback is used by the legacy CRTC helpers. Atomic helpers also support using this hook for enabling an encoder to facilitate transitions to atomic, but it is deprecated. Instead }(hjhhhNhNubj%)}(h **enable**h]henable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh should be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMlhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMohjxubjn)}(hXF``mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers. NOTE: If the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead. h](jt)}(h ``mode_set``h]jz)}(hj8h]hmode_set}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj6ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj2ubj)}(hhh](h)}(h?This callback is used to update the display mode of an encoder.h]h?This callback is used to update the display mode of an encoder.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMvhjNubh)}(hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback.h](hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspend using either DPMS or the new “ACTIVE” property. Such drivers should instead move all their encoder setup into the }(hj`hhhNhNubj%)}(h **enable**h]henable}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubh callback.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMxhjNubh)}(h{This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers.h]h{This callback is used both by the legacy CRTC helpers and the atomic modeset helpers. It is optional in the atomic helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjNubh)}(hNOTE:h]hNOTE:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjNubh)}(hIf the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, **atomic_mode_set** can be used instead.h](hIf the driver uses the atomic modeset helpers and needs to inspect the connector state or connector display info during mode setting, }(hjhhhNhNubj%)}(h**atomic_mode_set**h]hatomic_mode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh can be used instead.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjNubeh}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jmhjMhMhjxubjn)}(hXY``atomic_mode_set`` This callback is used to update the display mode of an encoder. Note that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback. This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector. h](jt)}(h``atomic_mode_set``h]jz)}(hjh]hatomic_mode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubj)}(hhh](h)}(h?This callback is used to update the display mode of an encoder.h]h?This callback is used to update the display mode of an encoder.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new "ACTIVE" property. Such drivers should instead move all their encoder setup into the **enable** callback.h](hXNote that the display pipe is completely off when this function is called. Drivers which need hardware to be running before they program the new display mode (because they implement runtime PM) should not use this hook, because the helper library calls it only once and not every time the display pipeline is suspended using either DPMS or the new “ACTIVE” property. Such drivers should instead move all their encoder setup into the }(hjhhhNhNubj%)}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX<This callback is used by the atomic modeset helpers in place of the **mode_set** callback, if set by the driver. It is optional and should be used instead of **mode_set** if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector.h](hDThis callback is used by the atomic modeset helpers in place of the }(hjhhhNhNubj%)}(h **mode_set**h]hmode_set}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhN callback, if set by the driver. It is optional and should be used instead of }(hjhhhNhNubj%)}(h **mode_set**h]hmode_set}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh if the driver needs to inspect the connector state or display info, since there is no direct way to go from the encoder to the current connector.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjxubjn)}(hX``detect`` This callback can be used by drivers who want to do detection on the encoder object instead of in connector functions. It is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks. FIXME: This should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it. h](jt)}(h ``detect``h]jz)}(hj`h]hdetect}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjZubj)}(hhh](h)}(hvThis callback can be used by drivers who want to do detection on the encoder object instead of in connector functions.h]hvThis callback can be used by drivers who want to do detection on the encoder object instead of in connector functions.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjvubh)}(hIt is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn't use this and instead just implement their own private callbacks.h]hIt is not used by any helper and therefore has purely driver-specific semantics. New drivers shouldn’t use this and instead just implement their own private callbacks.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjvubh)}(hFIXME:h]hFIXME:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjvubh)}(hnThis should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it.h]hnThis should just be converted into a pile of driver vfuncs. Currently radeon, amdgpu and nouveau are using it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjvubeh}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jmhjuhMhjxubjn)}(hX``atomic_disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers. This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**. h](jt)}(h``atomic_disable``h]jz)}(hjh]hatomic_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubj)}(hhh](h)}(hXThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.atomic_disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder’s CRTC has been shut off using their own }(hjhhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]jz)}(hjh]h$drm_crtc_helper_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis callback is a variant of **disable** that provides the atomic state to the driver. If **atomic_disable** is implemented, **disable** is not called by the helpers.h](hThis callback is a variant of }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 that provides the atomic state to the driver. If }(hjhhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is implemented, }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is not called by the helpers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX'This hook is only used by atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **atomic_disable** must be the inverse of **atomic_enable**.h](hThis hook is only used by atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjWhhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubh must be the inverse of }(hjWhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubh.}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjxubjn)}(hXn``atomic_enable`` This callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers. This hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**. h](jt)}(h``atomic_enable``h]jz)}(hjh]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubj)}(hhh](h)}(hXThis callback should be used to enable the encoder. It is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.atomic_enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](h~This callback should be used to enable the encoder. It is called after this encoder’s CRTC has been enabled using their own }(hjhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]jz)}(hjh]h#drm_crtc_helper_funcs.atomic_enable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis callback is a variant of **enable** that provides the atomic state to the driver. If **atomic_enable** is implemented, **enable** is not called by the helpers.h](hThis callback is a variant of }(hjhhhNhNubj%)}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 that provides the atomic state to the driver. If }(hjhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is implemented, }(hjhhhNhNubj%)}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is not called by the helpers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hXThis hook is only used by atomic helpers, it is the opposite of **atomic_disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling works **atomic_enable** must be the inverse of **atomic_disable**.h](h@This hook is only used by atomic helpers, it is the opposite of }(hj,hhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubh. Atomic drivers don’t need to implement it if there’s no need to enable anything at the encoder level. To ensure that runtime PM handling works }(hj,hhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubh must be the inverse of }(hj,hhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubh.}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjxubjn)}(hXw``disable`` This callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers. For atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below! NOTE: With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers). Therefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic. h](jt)}(h ``disable``h]jz)}(hjh]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj}ubj)}(hhh](h)}(hXThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder's CRTC has been shut off using their own :c:type:`drm_crtc_helper_funcs.disable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to disable the encoder. With the atomic drivers it is called before this encoder’s CRTC has been shut off using their own }(hjhhhNhNubh)}(h?:c:type:`drm_crtc_helper_funcs.disable `h]jz)}(hjh]hdrm_crtc_helper_funcs.disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hXDThis hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don't need to implement it if there's no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **disable** must be the inverse of **enable** for atomic drivers.h](hX This hook is used both by legacy CRTC helpers and atomic helpers. Atomic drivers don’t need to implement it if there’s no need to disable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh must be the inverse of }(hjhhhNhNubj%)}(h **enable**h]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh for atomic drivers.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hiFor atomic drivers also consider **atomic_disable** and save yourself from having to read the NOTE below!h](h!For atomic drivers also consider }(hjhhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh6 and save yourself from having to read the NOTE below!}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hNOTE:h]hNOTE:}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX^With legacy CRTC helpers there's a big semantic difference between **disable** and other hooks (like **prepare** or **dpms**) used to shut down a encoder: **disable** is only called when also logically disabling the display pipeline and needs to release any resources acquired in **mode_set** (like shared PLLs, or again release pinned framebuffers).h](hEWith legacy CRTC helpers there’s a big semantic difference between }(hj1hhhNhNubj%)}(h **disable**h]hdisable}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubh and other hooks (like }(hj1hhhNhNubj%)}(h **prepare**h]hprepare}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubh or }(hj1hhhNhNubj%)}(h**dpms**h]hdpms}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubh) used to shut down a encoder: }(hj1hhhNhNubj%)}(h **disable**h]hdisable}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubhr is only called when also logically disabling the display pipeline and needs to release any resources acquired in }(hj1hhhNhNubj%)}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubh: (like shared PLLs, or again release pinned framebuffers).}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hTherefore **disable** must be the inverse of **mode_set** plus **commit** for drivers still using legacy CRTC helpers, which is different from the rules under atomic.h](h Therefore }(hjhhhNhNubj%)}(h **disable**h]hdisable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh must be the inverse of }(hjhhhNhNubj%)}(h **mode_set**h]hmode_set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh plus }(hjhhhNhNubj%)}(h **commit**h]hcommit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh] for drivers still using legacy CRTC helpers, which is different from the rules under atomic.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjxubjn)}(hX``enable`` This callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc(). This hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers. h](jt)}(h ``enable``h]jz)}(hjh]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubj)}(hhh](h)}(hXThis callback should be used to enable the encoder. With the atomic drivers it is called after this encoder's CRTC has been enabled using their own :c:type:`drm_crtc_helper_funcs.enable ` hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC's callback by looping over all encoders connected to it using for_each_encoder_on_crtc().h](hThis callback should be used to enable the encoder. With the atomic drivers it is called after this encoder’s CRTC has been enabled using their own }(hj hhhNhNubh)}(h>:c:type:`drm_crtc_helper_funcs.enable `h]jz)}(hjh]hdrm_crtc_helper_funcs.enable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh hook. If that sequence is too simple drivers can just add their own driver private encoder hooks and call them from CRTC’s callback by looping over all encoders connected to it using for_each_encoder_on_crtc().}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hMhjubh)}(hXNThis hook is only used by atomic helpers, it is the opposite of **disable**. Atomic drivers don't need to implement it if there's no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new "ACTIVE" property) works **enable** must be the inverse of **disable** for atomic drivers.h](h@This hook is only used by atomic helpers, it is the opposite of }(hj<hhhNhNubj%)}(h **disable**h]hdisable}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubh. Atomic drivers don’t need to implement it if there’s no need to enable anything at the encoder level. To ensure that runtime PM handling (using either DPMS or the new “ACTIVE” property) works }(hj<hhhNhNubj%)}(h **enable**h]henable}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubh must be the inverse of }(hj<hhhNhNubj%)}(h **disable**h]hdisable}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubh for atomic drivers.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjxubjn)}(hX``atomic_check`` This callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector. Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented. This function is used by the atomic helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_state` update tracking structure. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any encoder constraints and limits checks into **mode_valid**. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](jt)}(h``atomic_check``h]jz)}(hjh]h atomic_check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM8hjubj)}(hhh](h)}(hXThis callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector.h]hXThis callback is used to validate encoder state for atomic drivers. Since the encoder is the object connecting the CRTC and connector it gets passed both states, to be able to validate interactions and update the CRTC to match what the encoder needs for the requested connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjubh)}(hX Since this provides a strict superset of the functionality of **mode_fixup** (the requested and adjusted modes are both available through the passed in :c:type:`struct drm_crtc_state `) **mode_fixup** is not called when **atomic_check** is implemented.h](h>Since this provides a strict superset of the functionality of }(hjhhhNhNubj%)}(h**mode_fixup**h]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhL (the requested and adjusted modes are both available through the passed in }(hjhhhNhNubh)}(h0:c:type:`struct drm_crtc_state `h]jz)}(hjh]hstruct drm_crtc_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM hjubh) }(hjhhhNhNubj%)}(h**mode_fixup**h]h mode_fixup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is not called when }(hjhhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is implemented.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h@This function is used by the atomic helpers, but it is optional.h]h@This function is used by the atomic helpers, but it is optional.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM%hjubh)}(hNOTE:h]hNOTE:}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM'hjubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_state` update tracking structure.h](hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall }(hjAhhhNhNubh)}(h:c:type:`drm_atomic_state`h]jz)}(hjKh]hdrm_atomic_state}(hjMhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM)hjAubh update tracking structure.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhhM)hjubh)}(hXOAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. 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To ensure that modes are filtered consistently put any encoder constraints and limits checks into }(hjshhhNhNubj%)}(h**mode_valid**h]h mode_valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubh.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM.hjubh)}(hRETURNS:h]hRETURNS:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM4hjubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM6hjubh deadlock.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM6hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM8hjxubeh}(h]h ]h"]h$]h&]uh1jhhj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM<hj:hhubh)}(hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.h]hWThese hooks are used by the legacy CRTC helpers and the new atomic modesetting helpers.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj:hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_encoder_helper_add (C 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]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjtsbc.drm_encoder_helper_addasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hencoderh]hencoder}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h,const struct drm_encoder_helper_funcs *funcsh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_encoder_helper_funcsh]hdrm_encoder_helper_funcs}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj;modnameN classnameNjj)}j]jc.drm_encoder_helper_addasbuh1hhjubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfuncsh]hfuncs}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjMhhhj_hMBubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjIhhhj_hMBubah}(h]jDah ](jjeh"]h$]h&]jj)jhuh1jhj_hMBhjFhhubj)}(hhh]h)}(h%sets the helper vtable for an encoderh]h%sets the helper vtable for an encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMBhjhhubah}(h]h ]h"]h$]h&]uh1jhjFhhhj_hMBubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj:hjhNubj)}(h**Parameters** ``struct drm_encoder *encoder`` DRM encoder ``const struct drm_encoder_helper_funcs *funcs`` helper vtable to set for **encoder**h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMFhjubji)}(hhh](jn)}(h,``struct drm_encoder *encoder`` DRM encoder h](jt)}(h``struct drm_encoder *encoder``h]jz)}(hjh]hstruct drm_encoder *encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMChjubj)}(hhh]h)}(h DRM encoderh]h DRM encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMChjubjn)}(hU``const struct drm_encoder_helper_funcs *funcs`` helper vtable to set for **encoder**h](jt)}(h0``const struct drm_encoder_helper_funcs *funcs``h]jz)}(hjh]h,const struct drm_encoder_helper_funcs *funcs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMEhjubj)}(hhh]h)}(h$helper vtable to set for **encoder**h](hhelper vtable to set for }(hj/hhhNhNubj%)}(h **encoder**h]hencoder}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMDhj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj+hMEhjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_connector_helper_funcs (C struct)c.drm_connector_helper_funcshNtauh1jxhj:hhhjhNubj)}(hhh](j)}(hdrm_connector_helper_funcsh]j)}(h!struct drm_connector_helper_funcsh](j)}(hjh]hstruct}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMIubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjhMIubj)}(hdrm_connector_helper_funcsh]j)}(hjxh]hdrm_connector_helper_funcs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjzhhhjhMIubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjvhhhjhMIubah}(h]jqah ](jjeh"]h$]h&]jj)jhuh1jhjhMIhjshhubj)}(hhh]h)}(h helper operations for connectorsh]h helper operations for connectors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMMhjhhubah}(h]h ]h"]h$]h&]uh1jhjshhhjhMIubeh}(h]h ](jstructeh"]h$]h&]jjjjjjjjjuh1jhhhj:hjhNubj)}(hXS0**Definition**:: struct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_state *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_state *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_state *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); }; **Members** ``get_modes`` This function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property(). The usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in. Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case. Virtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode(). This function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline. This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes(). To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes. ``detect_ctx`` Check to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing. This callback is optional, if not implemented the connector will be considered as always being attached. This is the atomic version of :c:type:`drm_connector_funcs.detect `. To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required. RETURNS: :c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK. ``mode_valid`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional. NOTE: This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here. To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. ``mode_valid_ctx`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `. To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required. Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state. Returns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise. ``best_encoder`` This function should select the best encoder for the given connector. This function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers. NOTE: In atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**. You can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. ``atomic_best_encoder`` This is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically. This function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL). NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_state` update tracking structure passed in. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. ``atomic_check`` This hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced. Because :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_state` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_commit`` This hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `. This hook is optional. This callback is used by the atomic modeset helpers. ``prepare_writeback_job`` As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only. This operation is optional. This callback is used by the atomic modeset helpers. ``cleanup_writeback_job`` This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes. This operation is optional. This callback is used by the atomic modeset helpers. ``enable_hpd`` Enable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_enable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced. ``disable_hpd`` Disable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_disable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMQhjubj@)}(hXstruct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_state *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_state *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_state *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); };h]hXstruct drm_connector_helper_funcs { int (*get_modes)(struct drm_connector *connector); int (*detect_ctx)(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force); enum drm_mode_status (*mode_valid)(struct drm_connector *connector, const struct drm_display_mode *mode); int (*mode_valid_ctx)(struct drm_connector *connector, const struct drm_display_mode *mode, struct drm_modeset_acquire_ctx *ctx, enum drm_mode_status *status); struct drm_encoder *(*best_encoder)(struct drm_connector *connector); struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector, struct drm_atomic_state *state); int (*atomic_check)(struct drm_connector *connector, struct drm_atomic_state *state); void (*atomic_commit)(struct drm_connector *connector, struct drm_atomic_state *state); int (*prepare_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); void (*enable_hpd)(struct drm_connector *connector); void (*disable_hpd)(struct drm_connector *connector); };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMShjubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMbhjubji)}(hhh](jn)}(hX``get_modes`` This function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property(). The usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in. Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case. Virtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode(). This function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline. This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes(). To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes. h](jt)}(h ``get_modes``h]jz)}(hj-h]h get_modes}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM{hj'ubj)}(hhh](h)}(hThis function should fill in all modes currently valid for the sink into the :c:type:`drm_connector.probed_modes ` list. It should also update the EDID property by calling drm_connector_update_edid_property().h](hMThis function should fill in all modes currently valid for the sink into the }(hjFhhhNhNubh)}(h4:c:type:`drm_connector.probed_modes `h]jz)}(hjPh]hdrm_connector.probed_modes}(hjRhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMUhjFubh_ list. It should also update the EDID property by calling drm_connector_update_edid_property().}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjmhMUhjCubh)}(hXNThe usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the :c:type:`drm_connector.display_info `, :c:type:`drm_connector.width_mm ` and :c:type:`drm_connector.height_mm ` fields are filled in.h](hXThe usual way to implement this is to cache the EDID retrieved in the probe callback somewhere in the driver-private connector structure. In this function drivers then parse the modes in the EDID and add them by calling drm_add_edid_modes(). But connectors that drive a fixed panel can also manually add specific modes using drm_mode_probed_add(). Drivers which manually add modes should also make sure that the }(hjxhhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]jz)}(hjh]hdrm_connector.display_info}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMYhjxubh, }(hjxhhhNhNubh)}(h0:c:type:`drm_connector.width_mm `h]jz)}(hjh]hdrm_connector.width_mm}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhMYhjxubh and }(hjxhhhNhNubh)}(h1:c:type:`drm_connector.height_mm `h]jz)}(hjh]hdrm_connector.height_mm}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhMYhjxubh fields are filled in.}(hjxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMYhjCubh)}(hX.Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case.h]hX.Note that the caller function will automatically add standard VESA DMT modes up to 1024x768 if the .get_modes() helper operation returns no mode and if the connector status is connector_status_connected or connector_status_unknown. There is no need to call drm_add_modes_noedid() manually in that case.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMchjCubh)}(hVirtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode().h]hVirtual drivers that just want some standard VESA mode with a given resolution can call drm_add_modes_noedid(), and mark the preferred one using drm_set_preferred_mode().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMihjCubh)}(hThis function is only called after the **detect** hook has indicated that a sink is connected and when the EDID isn't overridden through sysfs or the kernel commandline.h](h'This function is only called after the }(hj hhhNhNubj%)}(h **detect**h]hdetect}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubhz hook has indicated that a sink is connected and when the EDID isn’t overridden through sysfs or the kernel commandline.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMmhjCubh)}(h]This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes().h]h]This callback is used by the probe helpers in e.g. drm_helper_probe_single_connector_modes().}(hj/ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMqhjCubh)}(hTo avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `.h](hgTo avoid races with concurrent connector state updates, the helper libraries always call this with the }(hj> hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jz)}(hjH h]h drm_mode_config.connection_mutex}(hjJ hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjF ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMthj> ubh. held. Because of this it’s safe to inspect }(hj> hhhNhNubh)}(h.:c:type:`drm_connector->state `h]jz)}(hjl h]hdrm_connector->state}(hjn hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhje hMthj> ubh.}(hj> hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhje hMthjCubh)}(hRETURNS:h]hRETURNS:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMxhjCubh)}(h|The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes.h]h|The number of modes added by calling drm_mode_probed_add(). Return 0 on failures (no modes) instead of negative error codes.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMzhjCubeh}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhjBhM{hj$ubjn)}(hX``detect_ctx`` Check to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing. This callback is optional, if not implemented the connector will be considered as always being attached. This is the atomic version of :c:type:`drm_connector_funcs.detect `. To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required. RETURNS: :c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK. h](jt)}(h``detect_ctx``h]jz)}(hj h]h detect_ctx}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubj)}(hhh](h)}(hXCheck to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing.h]hXCheck to see if anything is attached to the connector. The parameter force is set to false whilst polling, true when checking the connector due to a user request. force can be used by the driver to avoid expensive, destructive operations during automated probing.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hhThis callback is optional, if not implemented the connector will be considered as always being attached.h]hhThis callback is optional, if not implemented the connector will be considered as always being attached.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(hYThis is the atomic version of :c:type:`drm_connector_funcs.detect `.h](hThis is the atomic version of }(hj hhhNhNubh)}(h::c:type:`drm_connector_funcs.detect `h]jz)}(hj!h]hdrm_connector_funcs.detect}(hj!hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!!hMhj ubh)}(hX1To avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required.h](hTo avoid races against concurrent connector state updates, the helper libraries always call this with ctx set to a valid context, and }(hj,!hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jz)}(hj6!h]h drm_mode_config.connection_mutex}(hj8!hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4!ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj,!ubho will always be locked with the ctx parameter set to this ctx. This allows taking additional locks as required.}(hj,!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjS!hMhj ubh)}(hRETURNS:h]hRETURNS:}(hj^!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ubh)}(h}:c:type:`drm_connector_status` indicating the connector's status, or the error code returned by drm_modeset_lock(), -EDEADLK.h](h)}(h:c:type:`drm_connector_status`h]jz)}(hjs!h]hdrm_connector_status}(hju!hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjq!ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_statusuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjm!ubha indicating the connector’s status, or the error code returned by drm_modeset_lock(), -EDEADLK.}(hjm!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!hMhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj$ubjn)}(hX``mode_valid`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional. NOTE: This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here. To avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `. RETURNS: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. h](jt)}(h``mode_valid``h]jz)}(hj!h]h mode_valid}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubj)}(hhh](h)}(h`Callback to validate a mode for a connector, irrespective of the specific display configuration.h]h`Callback to validate a mode for a connector, irrespective of the specific display configuration.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubh)}(hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().h]hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubh)}(hThis function is optional.h]hThis function is optional.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubh)}(hNOTE:h]hNOTE:}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubh)}(hXThis only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_crtc_helper_funcs.mode_valid ` and :c:type:`drm_bridge_funcs.mode_valid `, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen's EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here.h](h]This only filters the mode list supplied to userspace in the GETCONNECTOR IOCTL. Compared to }(hj"hhhNhNubh)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]jz)}(hj "h]h#drm_encoder_helper_funcs.mode_valid}(hj"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj "ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj"ubh, }(hj"hhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]jz)}(hj0"h]h drm_crtc_helper_funcs.mode_valid}(hj2"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj."ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhj)"hMhj"ubh and }(hj"hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jz)}(hjS"h]hdrm_bridge_funcs.mode_valid}(hjU"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQ"ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhj)"hMhj"ubhX, which are also called by the atomic helpers from drm_atomic_helper_check_modeset(). This allows userspace to force and ignore sink constraint (like the pixel clock limits in the screen’s EDID), which is useful for e.g. testing, or working around a broken EDID. Any source hardware constraint (which always need to be enforced) therefore should be checked in one of the above callbacks, and not this one here.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj)"hMhj!ubh)}(hTo avoid races with concurrent connector state updates, the helper libraries always call this with the :c:type:`drm_mode_config.connection_mutex ` held. Because of this it's safe to inspect :c:type:`drm_connector->state `.h](hgTo avoid races with concurrent connector state updates, the helper libraries always call this with the }(hjz"hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jz)}(hj"h]h drm_mode_config.connection_mutex}(hj"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjz"ubh. held. Because of this it’s safe to inspect }(hjz"hhhNhNubh)}(h.:c:type:`drm_connector->state `h]jz)}(hj"h]hdrm_connector->state}(hj"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhj"hMhjz"ubh.}(hjz"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"hMhj!ubh)}(hRETURNS:h]hRETURNS:}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj!ubh)}(hEither :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `.h](hEither }(hj"hhhNhNubh)}(h3:c:type:`drm_mode_status.MODE_OK `h]jz)}(hj"h]hdrm_mode_status.MODE_OK}(hj"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_statusuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj"ubh" or one of the failure reasons in }(hj"hhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]jz)}(hj #h]henum drm_mode_status}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj #ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_statusuh1hhj#hMhj"ubh.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hMhj!ubeh}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hMhj$ubjn)}(hX,``mode_valid_ctx`` Callback to validate a mode for a connector, irrespective of the specific display configuration. This callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes(). This function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `. To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required. Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state. Returns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise. h](jt)}(h``mode_valid_ctx``h]jz)}(hjE#h]hmode_valid_ctx}(hjG#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjC#ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj?#ubj)}(hhh](h)}(h`Callback to validate a mode for a connector, irrespective of the specific display configuration.h]h`Callback to validate a mode for a connector, irrespective of the specific display configuration.}(hj^#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj[#ubh)}(hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().h]hThis callback is used by the probe helpers to filter the mode list (which is usually derived from the EDID data block from the sink). See e.g. drm_helper_probe_single_connector_modes().}(hjm#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj[#ubh)}(hThis function is optional, and is the atomic version of :c:type:`drm_connector_helper_funcs.mode_valid `.h](h8This function is optional, and is the atomic version of }(hj|#hhhNhNubh)}(hL:c:type:`drm_connector_helper_funcs.mode_valid `h]jz)}(hj#h]h%drm_connector_helper_funcs.mode_valid}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj|#ubh.}(hj|#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hMhj[#ubh)}(hX9To allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and :c:type:`drm_mode_config.connection_mutex ` will always be locked with the ctx parameter set to **ctx**. This allows for taking additional locks as required.h](hTo allow for accessing the atomic state of modesetting objects, the helper libraries always call this with ctx set to a valid context, and }(hj#hhhNhNubh)}(h<:c:type:`drm_mode_config.connection_mutex `h]jz)}(hj#h]h drm_mode_config.connection_mutex}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj#ubh5 will always be locked with the ctx parameter set to }(hj#hhhNhNubj%)}(h**ctx**h]hctx}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#ubh6. This allows for taking additional locks as required.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hMhj[#ubh)}(hXWEven though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver's atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn't be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state.h]hX[Even though additional locks may be acquired, this callback is still expected not to take any constraints into account which would be influenced by the currently set display state - such constraints should be handled in the driver’s atomic check. For example, if a connector shares display bandwidth with other connectors then it would be ok to validate the minimum bandwidth requirement of a mode against the maximum possible bandwidth of the connector. But it wouldn’t be ok to take the current bandwidth usage of other connectors into account, as this would change depending on the display state.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj[#ubh)}(hReturns: 0 if :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` succeeded and wrote the :c:type:`enum drm_mode_status ` value to **status**, or a negative error code otherwise.h](hReturns: 0 if }(hj$hhhNhNubh)}(hP:c:type:`drm_connector_helper_funcs.mode_valid_ctx `h]jz)}(hj $h]h)drm_connector_helper_funcs.mode_valid_ctx}(hj $hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj $ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubh succeeded and wrote the }(hj$hhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]jz)}(hj/$h]henum drm_mode_status}(hj1$hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj-$ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_statusuh1hhj($hMhj$ubh value to }(hj$hhhNhNubj%)}(h **status**h]hstatus}(hjP$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubh%, or a negative error code otherwise.}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj($hMhj[#ubeh}(h]h ]h"]h$]h&]uh1jhj?#ubeh}(h]h ]h"]h$]h&]uh1jmhjZ#hMhj$ubjn)}(hX``best_encoder`` This function should select the best encoder for the given connector. This function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers. NOTE: In atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**. You can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. h](jt)}(h``best_encoder``h]jz)}(hjz$h]h best_encoder}(hj|$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjx$ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjt$ubj)}(hhh](h)}(hEThis function should select the best encoder for the given connector.h]hEThis function should select the best encoder for the given connector.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubh)}(hThis function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers.h]hThis function is used by both the atomic helpers (in the drm_atomic_helper_check_modeset() function) and in the legacy CRTC helpers.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubh)}(hNOTE:h]hNOTE:}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubh)}(hXIn atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use **atomic_best_encoder**.h](hIn atomic drivers this function is called in the check phase of an atomic update. The driver is not allowed to change or inspect anything outside of arguments passed-in. Atomic drivers which need to inspect dynamic configuration state should instead use }(hj$hhhNhNubj%)}(h**atomic_best_encoder**h]hatomic_best_encoder}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubh.}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubh)}(hYou can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you.h]hYou can leave this function to NULL if the connector is only attached to a single encoder. In this case, the core will call drm_connector_get_single_encoder() for you.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubh)}(hRETURNS:h]hRETURNS:}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubh)}(hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this.h]hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren’t used twice, drivers should not check for this.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj$ubeh}(h]h ]h"]h$]h&]uh1jhjt$ubeh}(h]h ]h"]h$]h&]uh1jmhj$hMhj$ubjn)}(hX5``atomic_best_encoder`` This is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically. This function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL). NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_state` update tracking structure passed in. RETURNS: Encoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this. h](jt)}(h``atomic_best_encoder``h]jz)}(hj %h]hatomic_best_encoder}(hj"%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj%ubj)}(hhh](h)}(hThis is the atomic version of **best_encoder** for atomic drivers which need to select the best encoder depending upon the desired configuration and can't select it statically.h](hThis is the atomic version of }(hj9%hhhNhNubj%)}(h**best_encoder**h]h best_encoder}(hjA%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9%ubh for atomic drivers which need to select the best encoder depending upon the desired configuration and can’t select it statically.}(hj9%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM hj6%ubh)}(hThis function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to **best_encoder** (or drm_connector_get_single_encoder() if **best_encoder** is NULL).h](hpThis function is used by drm_atomic_helper_check_modeset(). If it is not implemented, the core will fallback to }(hjZ%hhhNhNubj%)}(h**best_encoder**h]h best_encoder}(hjb%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjZ%ubh+ (or drm_connector_get_single_encoder() if }(hjZ%hhhNhNubj%)}(h**best_encoder**h]h best_encoder}(hjt%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjZ%ubh is NULL).}(hjZ%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj6%ubh)}(hNOTE:h]hNOTE:}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj6%ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_state` update tracking structure passed in.h](h|This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the }(hj%hhhNhNubh)}(h:c:type:`drm_atomic_state`h]jz)}(hj%h]hdrm_atomic_state}(hj%hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj%ubh% update tracking structure passed in.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj%hMhj6%ubh)}(hRETURNS:h]hRETURNS:}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj6%ubh)}(hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren't used twice, drivers should not check for this.h]hEncoder that should be used for the given connector and connector state, or NULL if no suitable encoder exists. Note that the helpers will ensure that encoders aren’t used twice, drivers should not check for this.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj6%ubeh}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj5%hMhj$ubjn)}(hX``atomic_check`` This hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced. Because :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_state` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](jt)}(h``atomic_check``h]jz)}(hj%h]h atomic_check}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM?hj%ubj)}(hhh](h)}(hThis hook is used to validate connector state. This function is called from :c:type:`drm_atomic_helper_check_modeset`, and is called when a connector property is set, or a modeset on the crtc is forced.h](hLThis hook is used to validate connector state. This function is called from }(hj&hhhNhNubh)}(h):c:type:`drm_atomic_helper_check_modeset`h]jz)}(hj!&h]hdrm_atomic_helper_check_modeset}(hj#&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_helper_check_modesetuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM%hj&ubhU, and is called when a connector property is set, or a modeset on the crtc is forced.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>&hM%hj&ubh)}(hBecause :c:type:`drm_atomic_helper_check_modeset` may be called multiple times, this function should handle being called multiple times as well.h](hBecause }(hjI&hhhNhNubh)}(h):c:type:`drm_atomic_helper_check_modeset`h]jz)}(hjS&h]hdrm_atomic_helper_check_modeset}(hjU&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQ&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_helper_check_modesetuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM)hjI&ubh_ may be called multiple times, this function should handle being called multiple times as well.}(hjI&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjp&hM)hj&ubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hj{&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM,hj&ubh)}(hNOTE:h]hNOTE:}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM3hj&ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall :c:type:`drm_atomic_state` update tracking structure.h](hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the free-standing state objects passed-in or assembled in the overall }(hj&hhhNhNubh)}(h:c:type:`drm_atomic_state`h]jz)}(hj&h]hdrm_atomic_state}(hj&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM5hj&ubh update tracking structure.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&hM5hj&ubh)}(hRETURNS:h]hRETURNS:}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM:hj&ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj&hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hj&h]hdrm_modeset_lock}(hj&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM<hj&ubh deadlock.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hM<hj&ubeh}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj&hM?hj$ubjn)}(hXt``atomic_commit`` This hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `. This hook is optional. This callback is used by the atomic modeset helpers. h](jt)}(h``atomic_commit``h]jz)}(hj'h]h atomic_commit}(hj 'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMNhj'ubj)}(hhh](h)}(hXThis hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in :c:type:`drm_connector_state.writeback_job `.h](hThis hook is to be used by drivers implementing writeback connectors that need a point when to commit the writeback job to the hardware. The writeback_job to commit is available in the new connector state, in }(hj7'hhhNhNubh)}(hA:c:type:`drm_connector_state.writeback_job `h]jz)}(hjA'h]h!drm_connector_state.writeback_job}(hjC'hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj?'ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMGhj7'ubh.}(hj7'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^'hMGhj4'ubh)}(hThis hook is optional.h]hThis hook is optional.}(hji'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMLhj4'ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hjx'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3'hMNhj4'ubeh}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhj3'hMNhj$ubjn)}(hX``prepare_writeback_job`` As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only. This operation is optional. This callback is used by the atomic modeset helpers. h](jt)}(h``prepare_writeback_job``h]jz)}(hj'h]hprepare_writeback_job}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM_hj'ubj)}(hhh](h)}(hX|As writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct :c:type:`drm_writeback_connector` connectors only.h](hXJAs writeback jobs contain a framebuffer, drivers may need to prepare and clean them up the same way they can prepare and clean up framebuffers for planes. This optional connector operation is used to support the preparation of writeback jobs. The job prepare operation is called from drm_atomic_helper_prepare_planes() for struct }(hj'hhhNhNubh)}(h!:c:type:`drm_writeback_connector`h]jz)}(hj'h]hdrm_writeback_connector}(hj'hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_writeback_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMVhj'ubh connectors only.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hMVhj'ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM]hj'ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM_hj'ubeh}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhj'hM_hj$ubjn)}(hX{``cleanup_writeback_job`` This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes. This operation is optional. This callback is used by the atomic modeset helpers. h](jt)}(h``cleanup_writeback_job``h]jz)}(hj(h]hcleanup_writeback_job}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj(ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMnhj (ubj)}(hhh](h)}(hX This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes.h]hX This optional connector operation is used to support the cleanup of writeback jobs. The job cleanup operation is called from the existing drm_writeback_cleanup_job() function, invoked both when destroying the job as part of an aborted commit, or when the job completes.}(hj+(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMfhj((ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj:(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMlhj((ubh)}(h4This callback is used by the atomic modeset helpers.h]h4This callback is used by the atomic modeset helpers.}(hjI(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'(hMnhj((ubeh}(h]h ]h"]h$]h&]uh1jhj (ubeh}(h]h ]h"]h$]h&]uh1jmhj'(hMnhj$ubjn)}(hXD``enable_hpd`` Enable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_enable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced. h](jt)}(h``enable_hpd``h]jz)}(hji(h]h enable_hpd}(hjk(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjg(ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM~hjc(ubj)}(hhh](h)}(h,Enable hot-plug detection for the connector.h]h,Enable hot-plug detection for the connector.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMvhj(ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMxhj(ubh)}(hBThis callback is used by the drm_kms_helper_poll_enable() helpers.h]hBThis callback is used by the drm_kms_helper_poll_enable() helpers.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMzhj(ubh)}(hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h]hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM|hj(ubeh}(h]h ]h"]h$]h&]uh1jhjc(ubeh}(h]h ]h"]h$]h&]uh1jmhj~(hM~hj$ubjn)}(hXF``disable_hpd`` Disable hot-plug detection for the connector. This operation is optional. This callback is used by the drm_kms_helper_poll_disable() helpers. This operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h](jt)}(h``disable_hpd``h]jz)}(hj(h]h disable_hpd}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj(ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubj)}(hhh](h)}(h-Disable hot-plug detection for the connector.h]h-Disable hot-plug detection for the connector.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(hThis operation is optional.h]hThis operation is optional.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(hCThis callback is used by the drm_kms_helper_poll_disable() helpers.h]hCThis callback is used by the drm_kms_helper_poll_disable() helpers.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubh)}(hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.h]hThis operation does not need to perform any hpd state tracking as the DRM core handles that maintenance and ensures the calls to enable and disable hpd are balanced.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj(ubeh}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jmhj(hMhj$ubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubh)}(h**Description**h]j%)}(hj@)h]h Description}(hjB)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>)ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj:hhubh)}(h[These functions are used by the atomic and legacy modeset helpers and by the probe helpers.h]h[These functions are used by the atomic and legacy modeset helpers and by the probe helpers.}(hjV)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMNhj:hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_connector_helper_add (C function)c.drm_connector_helper_addhNtauh1jxhj:hhhjhNubj)}(hhh](j)}(hovoid drm_connector_helper_add (struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h]j)}(hnvoid drm_connector_helper_add(struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hj~)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz)hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz)hhhj)hMubj)}(hdrm_connector_helper_addh]j)}(hdrm_connector_helper_addh]hdrm_connector_helper_add}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjz)hhhj)hMubj)}(hQ(struct drm_connector *connector, const struct drm_connector_helper_funcs *funcs)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j)}jj)sbc.drm_connector_helper_addasbuh1hhj)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj+)}(hj9h]h*}(hj*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)ubj)}(h connectorh]h connector}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(h.const struct drm_connector_helper_funcs *funcsh](j)}(hjUh]hconst}(hj-*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)*ubj)}(h h]h }(hj:*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)*ubj)}(hjh]hstruct}(hjH*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)*ubj)}(h h]h }(hjU*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)*ubh)}(hhh]j)}(hdrm_connector_helper_funcsh]hdrm_connector_helper_funcs}(hjf*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjc*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjh*modnameN classnameNjj)}j]j)c.drm_connector_helper_addasbuh1hhj)*ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)*ubj+)}(hj9h]h*}(hj*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)*ubj)}(hfuncsh]hfuncs}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubeh}(h]h ]h"]h$]h&]jjuh1jhjz)hhhj)hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjv)hhhj)hMubah}(h]jq)ah ](jjeh"]h$]h&]jj)jhuh1jhj)hMhjs)hhubj)}(hhh]h)}(h&sets the helper vtable for a connectorh]h&sets the helper vtable for a connector}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj*hhubah}(h]h ]h"]h$]h&]uh1jhjs)hhhj)hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj*jj*jjjuh1jhhhj:hjhNubj)}(h**Parameters** ``struct drm_connector *connector`` DRM connector ``const struct drm_connector_helper_funcs *funcs`` helper vtable to set for **connector**h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj*ubji)}(hhh](jn)}(h2``struct drm_connector *connector`` DRM connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj +h]hstruct drm_connector *connector}(hj +hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj+ubj)}(hhh]h)}(h DRM connectorh]h DRM connector}(hj#+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj +ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhj+hMhj+ubjn)}(hY``const struct drm_connector_helper_funcs *funcs`` helper vtable to set for **connector**h](jt)}(h2``const struct drm_connector_helper_funcs *funcs``h]jz)}(hjC+h]h.const struct drm_connector_helper_funcs *funcs}(hjE+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjA+ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj=+ubj)}(hhh]h)}(h&helper vtable to set for **connector**h](hhelper vtable to set for }(hj\+hhhNhNubj%)}(h **connector**h]h connector}(hjd+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj\+ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjY+ubah}(h]h ]h"]h$]h&]uh1jhj=+ubeh}(h]h ]h"]h$]h&]uh1jmhjX+hMhj+ubeh}(h]h ]h"]h$]h&]uh1jhhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_plane_helper_funcs (C struct)c.drm_plane_helper_funcshNtauh1jxhj:hhhjhNubj)}(hhh](j)}(hdrm_plane_helper_funcsh]j)}(hstruct drm_plane_helper_funcsh](j)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhj+hMubj)}(hdrm_plane_helper_funcsh]j)}(hj+h]hdrm_plane_helper_funcs}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj+hhhj+hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhj+hMubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1jhj+hMhj+hhubj)}(hhh]h)}(hhelper operations for planesh]hhelper operations for planes}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj+hhubah}(h]h ]h"]h$]h&]uh1jhj+hhhj+hMubeh}(h]h ](jstructeh"]h$]h&]jjjj,jj,jjjuh1jhhhj:hjhNubj)}(hX/**Definition**:: struct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_state *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_state *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_state *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); }; **Members** ``prepare_fb`` This hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches. This function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. The resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit. The helpers will call **cleanup_fb** with matching arguments for every successful call to this hook. This callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources. RETURNS: 0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully. ``cleanup_fb`` This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**. This callback is used by the atomic modeset helpers, but it is optional. ``begin_fb_access`` This hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**. For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. The callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip. Returns: 0 on success, or a negative errno code otherwise. ``end_fb_access`` This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state. ``atomic_check`` Drivers should check plane specific constraints in this hook. When using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_state` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``atomic_update`` Drivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. ``atomic_enable`` Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**. ``atomic_disable`` Drivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented. This hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**. ``atomic_async_check`` Drivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized". This hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update. This function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip. RETURNS: Return 0 on success and any error returned indicates that the update can not be applied in asynchronous manner. ``atomic_async_update`` Drivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized". This hook is called by drm_atomic_helper_async_commit(). An async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane. When doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state. Drivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit. FIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. ``get_scanout_buffer`` Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned. Return: ``0`` on success, negative errno on failure. ``panic_flush`` It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ,ubh:}(hj ,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ,ubj@)}(hXstruct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_state *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_state *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_state *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); };h]hXstruct drm_plane_helper_funcs { int (*prepare_fb)(struct drm_plane *plane, struct drm_plane_state *new_state); void (*cleanup_fb)(struct drm_plane *plane, struct drm_plane_state *old_state); int (*begin_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_plane *plane, struct drm_plane_state *new_plane_state); int (*atomic_check)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_update)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_plane *plane, struct drm_atomic_state *state); void (*atomic_disable)(struct drm_plane *plane, struct drm_atomic_state *state); int (*atomic_async_check)(struct drm_plane *plane, struct drm_atomic_state *state, bool flip); void (*atomic_async_update)(struct drm_plane *plane, struct drm_atomic_state *state); int (*get_scanout_buffer)(struct drm_plane *plane, struct drm_scanout_buffer *sb); void (*panic_flush)(struct drm_plane *plane); };}hj*,sbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ,ubh)}(h **Members**h]j%)}(hj;,h]hMembers}(hj=,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9,ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj ,ubji)}(hhh](jn)}(hX``prepare_fb`` This hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches. This function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. The resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit. The helpers will call **cleanup_fb** with matching arguments for every successful call to this hook. This callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources. RETURNS: 0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully. h](jt)}(h``prepare_fb``h]jz)}(hjZ,h]h prepare_fb}(hj\,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjX,ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjT,ubj)}(hhh](h)}(hThis hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches.h]hThis hook is to prepare a framebuffer for scanout by e.g. pinning its backing storage or relocating it into a contiguous block of VRAM. Other possible preparatory work includes flushing caches.}(hjs,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjp,ubh)}(hXThis function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the :c:type:`drm_plane_state.fence ` of the passed-in :c:type:`drm_plane_state`. If the driver doesn't support native fences then equivalent functionality should be implemented through private members in the plane structure.h](hThis function must not block for outstanding rendering, since it is called in the context of the atomic IOCTL even for async commits to be able to return any errors to userspace. Instead the recommended way is to fill out the }(hj,hhhNhNubh)}(h1:c:type:`drm_plane_state.fence `h]jz)}(hj,h]hdrm_plane_state.fence}(hj,hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj,ubh of the passed-in }(hj,hhhNhNubh)}(h:c:type:`drm_plane_state`h]jz)}(hj,h]hdrm_plane_state}(hj,hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_stateuh1hhj,hMhj,ubh. If the driver doesn’t support native fences then equivalent functionality should be implemented through private members in the plane structure.}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,hMhjp,ubh)}(hXFor GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook.h](h#For GEM drivers who neither have a }(hj,hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubh nor }(hj,hhhNhNubj%)}(h**cleanup_fb**h]h cleanup_fb}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubh hook set drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their }(hj,hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubh hook.}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjp,ubh)}(hXThe resources acquired in **prepare_fb** persist after the end of the atomic commit. Resources that can be release at the commit's end should be acquired in **begin_fb_access** and released in **end_fb_access**. For example, a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into **begin_fb_access**, so that atomic helpers remove the mapping at the end of the commit.h](hThe resources acquired in }(hj-hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hj$-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubhw persist after the end of the atomic commit. Resources that can be release at the commit’s end should be acquired in }(hj-hhhNhNubj%)}(h**begin_fb_access**h]hbegin_fb_access}(hj6-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubh and released in }(hj-hhhNhNubj%)}(h**end_fb_access**h]h end_fb_access}(hjH-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubh;. For example, a GEM buffer’s pin operation belongs into }(hj-hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hjZ-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubhh to keep the buffer pinned after the commit. But a vmap operation for shadow-plane helpers belongs into }(hj-hhhNhNubj%)}(h**begin_fb_access**h]hbegin_fb_access}(hjl-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubhE, so that atomic helpers remove the mapping at the end of the commit.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjp,ubh)}(hdThe helpers will call **cleanup_fb** with matching arguments for every successful call to this hook.h](hThe helpers will call }(hj-hhhNhNubj%)}(h**cleanup_fb**h]h cleanup_fb}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubh@ with matching arguments for every successful call to this hook.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjp,ubh)}(hThis callback is used by the atomic modeset helpers, but it is optional. See **begin_fb_access** for preparing per-commit resources.h](hMThis callback is used by the atomic modeset helpers, but it is optional. See }(hj-hhhNhNubj%)}(h**begin_fb_access**h]hbegin_fb_access}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubh$ for preparing per-commit resources.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjp,ubh)}(hRETURNS:h]hRETURNS:}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjp,ubh)}(hX0 on success or one of the following negative error codes allowed by the :c:type:`drm_mode_config_funcs.atomic_commit ` vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully.h](hI0 on success or one of the following negative error codes allowed by the }(hj-hhhNhNubh)}(hE:c:type:`drm_mode_config_funcs.atomic_commit `h]jz)}(hj-h]h#drm_mode_config_funcs.atomic_commit}(hj-hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj-ubh vfunc. When using helpers this callback is the only one which can fail an atomic commit, everything else must complete successfully.}(hj-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMhjp,ubeh}(h]h ]h"]h$]h&]uh1jhjT,ubeh}(h]h ]h"]h$]h&]uh1jmhjo,hMhjQ,ubjn)}(h``cleanup_fb`` This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**. This callback is used by the atomic modeset helpers, but it is optional. h](jt)}(h``cleanup_fb``h]jz)}(hj.h]h cleanup_fb}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj.ubj)}(hhh](h)}(h|This hook is called to clean up any resources allocated for the given framebuffer and plane configuration in **prepare_fb**.h](hmThis hook is called to clean up any resources allocated for the given framebuffer and plane configuration in }(hj3.hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hj;.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3.ubh.}(hj3.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj0.ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hjT.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj0.ubeh}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhj/.hMhjQ,ubjn)}(hX!``begin_fb_access`` This hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**. For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit. The callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip. Returns: 0 on success, or a negative errno code otherwise. h](jt)}(h``begin_fb_access``h]jz)}(hju.h]hbegin_fb_access}(hjw.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjs.ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjo.ubj)}(hhh](h)}(hThis hook prepares the plane for access during an atomic commit. In contrast to **prepare_fb**, resources acquired in **begin_fb_access**, are released at the end of the atomic commit in **end_fb_access**.h](hPThis hook prepares the plane for access during an atomic commit. In contrast to }(hj.hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubh, resources acquired in }(hj.hhhNhNubj%)}(h**begin_fb_access**h]hbegin_fb_access}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubh2, are released at the end of the atomic commit in }(hj.hhhNhNubj%)}(h**end_fb_access**h]h end_fb_access}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubh.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj.ubh)}(hX.For example, with shadow-plane helpers, the GEM buffer's vmap operation belongs into **begin_fb_access**, so that the buffer's memory will be unmapped at the end of the commit in **end_fb_access**. But a GEM buffer's pin operation belongs into **prepare_fb** to keep the buffer pinned after the commit.h](hWFor example, with shadow-plane helpers, the GEM buffer’s vmap operation belongs into }(hj.hhhNhNubj%)}(h**begin_fb_access**h]hbegin_fb_access}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubhM, so that the buffer’s memory will be unmapped at the end of the commit in }(hj.hhhNhNubj%)}(h**end_fb_access**h]h end_fb_access}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubh2. But a GEM buffer’s pin operation belongs into }(hj.hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubh, to keep the buffer pinned after the commit.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj.ubh)}(hThe callback is used by the atomic modeset helpers, but it is optional. See **end_fb_cleanup** for undoing the effects of **begin_fb_access** and **prepare_fb** for acquiring resources until the next pageflip.h](hLThe callback is used by the atomic modeset helpers, but it is optional. See }(hj/hhhNhNubj%)}(h**end_fb_cleanup**h]hend_fb_cleanup}(hj /hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubh for undoing the effects of }(hj/hhhNhNubj%)}(h**begin_fb_access**h]hbegin_fb_access}(hj2/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubh and }(hj/hhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hjD/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubh1 for acquiring resources until the next pageflip.}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj.ubh)}(h:Returns: 0 on success, or a negative errno code otherwise.h]h:Returns: 0 on success, or a negative errno code otherwise.}(hj]/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj.ubeh}(h]h ]h"]h$]h&]uh1jhjo.ubeh}(h]h ]h"]h$]h&]uh1jmhj.hMhjQ,ubjn)}(h``end_fb_access`` This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state. h](jt)}(h``end_fb_access``h]jz)}(hj~/h]h end_fb_access}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|/ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjx/ubj)}(hhh]h)}(h|This hook cleans up resources allocated by **begin_fb_access**. It it called at the end of a commit for the new plane state.h](h+This hook cleans up resources allocated by }(hj/hhhNhNubj%)}(h**begin_fb_access**h]hbegin_fb_access}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubh>. It it called at the end of a commit for the new plane state.}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubah}(h]h ]h"]h$]h&]uh1jhjx/ubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjQ,ubjn)}(hX/``atomic_check`` Drivers should check plane specific constraints in this hook. When using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked. This function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached. This callback is used by the atomic modeset helpers, but it is optional. NOTE: This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_state` update tracking structure. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](jt)}(h``atomic_check``h]jz)}(hj/h]h atomic_check}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubj)}(hhh](h)}(h=Drivers should check plane specific constraints in this hook.h]h=Drivers should check plane specific constraints in this hook.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubh)}(hXrWhen using drm_atomic_helper_check_planes() plane's **atomic_check** hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.h](h6When using drm_atomic_helper_check_planes() plane’s }(hj/hhhNhNubj%)}(h**atomic_check**h]h atomic_check}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubhX. hooks are called before the ones for CRTCs, which allows drivers to request shared resources that the CRTC controls here. For more complicated dependencies the driver can call the provided check helpers multiple times until the computed state has a final configuration and everything has been checked.}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubh)}(hXThis function is also allowed to inspect any other object's state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.h]hXThis function is also allowed to inspect any other object’s state and can add more state objects to the atomic commit if needed. Care must be taken though to ensure that state check and compute functions for these added states are all called, and derived state in other objects all updated. Again the recommendation is to just call check helpers until a maximal configuration is reached.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj"0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubh)}(hNOTE:h]hNOTE:}(hj10hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubh)}(hThis function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the :c:type:`drm_atomic_state` update tracking structure.h](h|This function is called in the check phase of an atomic update. The driver is not allowed to change anything outside of the }(hj@0hhhNhNubh)}(h:c:type:`drm_atomic_state`h]jz)}(hjJ0h]hdrm_atomic_state}(hjL0hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjH0ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj@0ubh update tracking structure.}(hj@0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjg0hMhj/ubh)}(hRETURNS:h]hRETURNS:}(hjr0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj/ubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hj0hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hj0h]hdrm_modeset_lock}(hj0hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjijdrm_modeset_lockuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj0ubh deadlock.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj0hMhj/ubeh}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjQ,ubjn)}(hX8``atomic_update`` Drivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. h](jt)}(h``atomic_update``h]jz)}(hj0h]h atomic_update}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM-hj0ubj)}(hhh](h)}(hDrivers should use this function to update the plane state. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks.h](h`Drivers should use this function to update the plane state. This hook is called in-between the }(hj0hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]jz)}(hj0h]h"drm_crtc_helper_funcs.atomic_begin}(hj0hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM$hj0ubh2 and drm_crtc_helper_funcs.atomic_flush callbacks.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hM$hj0ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM(hj0ubh)}(hHThis callback is used by the atomic modeset helpers, but it is optional.h]hHThis callback is used by the atomic modeset helpers, but it is optional.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM-hj0ubeh}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhj0hM-hjQ,ubjn)}(hXB``atomic_enable`` Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**. h](jt)}(h``atomic_enable``h]jz)}(hj?1h]h atomic_enable}(hjA1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=1ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMFhj91ubj)}(hhh](h)}(hX'Drivers should use this function to unconditionally enable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after **atomic_update**, which will be called for all enabled planes. Drivers that use **atomic_enable** should set up a plane in **atomic_update** and afterwards enable the plane in **atomic_enable**. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in **atomic_update**.h](hgDrivers should use this function to unconditionally enable a plane. This hook is called in-between the }(hjX1hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]jz)}(hjb1h]h"drm_crtc_helper_funcs.atomic_begin}(hjd1hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj`1ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM5hjX1ubhF and drm_crtc_helper_funcs.atomic_flush callbacks. It is called after }(hjX1hhhNhNubj%)}(h**atomic_update**h]h atomic_update}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX1ubh@, which will be called for all enabled planes. Drivers that use }(hjX1hhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX1ubh should set up a plane in }(hjX1hhhNhNubj%)}(h**atomic_update**h]h atomic_update}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX1ubh$ and afterwards enable the plane in }(hjX1hhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX1ubhb. If a plane needs to be enabled before installing the scanout buffer, drivers can still do so in }(hjX1hhhNhNubj%)}(h**atomic_update**h]h atomic_update}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX1ubh.}(hjX1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hM5hjU1ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM>hjU1ubh)}(hXThis callback is used by the atomic modeset helpers, but it is optional. If implemented, **atomic_enable** should be the inverse of **atomic_disable**. Drivers that don't want to use either can still implement the complete plane update in **atomic_update**.h](hYThis callback is used by the atomic modeset helpers, but it is optional. If implemented, }(hj1hhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubh should be the inverse of }(hj1hhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hj 2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubh[. Drivers that don’t want to use either can still implement the complete plane update in }(hj1hhhNhNubj%)}(h**atomic_update**h]h atomic_update}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubh.}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMChjU1ubeh}(h]h ]h"]h$]h&]uh1jhj91ubeh}(h]h ]h"]h$]h&]uh1jmhjT1hMFhjQ,ubjn)}(hX``atomic_disable`` Drivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented. This hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook. Note that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers. This callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**. h](jt)}(h``atomic_disable``h]jz)}(hjJ2h]hatomic_disable}(hjL2hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjH2ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM_hjD2ubj)}(hhh](h)}(hXkDrivers should use this function to unconditionally disable a plane. This hook is called in-between the :c:type:`drm_crtc_helper_funcs.atomic_begin ` and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to **atomic_update**, which will be called for disabling planes, too, if the **atomic_disable** hook isn't implemented.h](hhDrivers should use this function to unconditionally disable a plane. This hook is called in-between the }(hjc2hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_begin `h]jz)}(hjm2h]h"drm_crtc_helper_funcs.atomic_begin}(hjo2hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjk2ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMNhjc2ubhK and drm_crtc_helper_funcs.atomic_flush callbacks. It is an alternative to }(hjc2hhhNhNubj%)}(h**atomic_update**h]h atomic_update}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjc2ubh9, which will be called for disabling planes, too, if the }(hjc2hhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjc2ubh hook isn’t implemented.}(hjc2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2hMNhj`2ubh)}(hThis hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the :c:type:`drm_crtc_helper_funcs.disable ` hook.h](hThis hook is also useful to disable planes in preparation of a modeset, by calling drm_atomic_helper_disable_planes_on_crtc() from the }(hj2hhhNhNubh)}(h?:c:type:`drm_crtc_helper_funcs.disable `h]jz)}(hj2h]hdrm_crtc_helper_funcs.disable}(hj2hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMUhj2ubh hook.}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2hMUhj`2ubh)}(hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.h]hXNote that the power state of the display pipe when this function is called depends upon the exact helpers and calling sequence the driver has picked. See drm_atomic_helper_commit_planes() for a discussion of the tradeoffs and variants of plane commit helpers.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMYhj`2ubh)}(hThis callback is used by the atomic modeset helpers, but it is optional. It's intended to reverse the effects of **atomic_enable**.h](hsThis callback is used by the atomic modeset helpers, but it is optional. It’s intended to reverse the effects of }(hj2hhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubh.}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM^hj`2ubeh}(h]h ]h"]h$]h&]uh1jhjD2ubeh}(h]h ]h"]h$]h&]uh1jmhj_2hM_hjQ,ubjn)}(hX``atomic_async_check`` Drivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized". This hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update. This function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip. RETURNS: Return 0 on success and any error returned indicates that the update can not be applied in asynchronous manner. h](jt)}(h``atomic_async_check``h]jz)}(hj-3h]hatomic_async_check}(hj/3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+3ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMwhj'3ubj)}(hhh](h)}(hDrivers should set this function pointer to check if the plane's atomic state can be updated in a async fashion. Here async means "not vblank synchronized".h]hDrivers should set this function pointer to check if the plane’s atomic state can be updated in a async fashion. Here async means “not vblank synchronized”.}(hjF3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMghjC3ubh)}(hThis hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update.h]hThis hook is called by drm_atomic_async_check() to establish if a given update can be committed asynchronously, that is, if it can jump ahead of the state currently queued for update.}(hjU3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMkhjC3ubh)}(hThis function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip.h]hThis function is also used by drm_atomic_set_property() to determine if the plane can be flipped in async. The flip flag is used to distinguish if the function is used for just the plane state or for a flip.}(hjd3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMohjC3ubh)}(hRETURNS:h]hRETURNS:}(hjs3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMthjC3ubh)}(hoReturn 0 on success and any error returned indicates that the update can not be applied in asynchronous manner.h]hoReturn 0 on success and any error returned indicates that the update can not be applied in asynchronous manner.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMvhjC3ubeh}(h]h ]h"]h$]h&]uh1jhj'3ubeh}(h]h ]h"]h$]h&]uh1jmhjB3hMwhjQ,ubjn)}(hX<``atomic_async_update`` Drivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized". This hook is called by drm_atomic_helper_async_commit(). An async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane. When doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state. Drivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit. FIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h](jt)}(h``atomic_async_update``h]jz)}(hj3h]hatomic_async_update}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubj)}(hhh](h)}(hDrivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means "not vblank synchronized".h]hDrivers should set this function pointer to perform asynchronous updates of planes, that is, jump ahead of the currently queued state and update the plane. Here async means “not vblank synchronized”.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(h8This hook is called by drm_atomic_helper_async_commit().h]h8This hook is called by drm_atomic_helper_async_commit().}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(hAn async update will happen on legacy cursor updates. An async update won't happen if there is an outstanding commit modifying the same plane.h]hAn async update will happen on legacy cursor updates. An async update won’t happen if there is an outstanding commit modifying the same plane.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubh)}(hWhen doing async_update drivers shouldn't replace the :c:type:`drm_plane_state` but update the current one with the new plane configurations in the new plane_state.h](h8When doing async_update drivers shouldn’t replace the }(hj3hhhNhNubh)}(h:c:type:`drm_plane_state`h]jz)}(hj3h]hdrm_plane_state}(hj3hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj3ubhU but update the current one with the new plane configurations in the new plane_state.}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hMhj3ubh)}(hXDrivers should also swap the framebuffers between current plane state (:c:type:`drm_plane.state `) and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit.h](hGDrivers should also swap the framebuffers between current plane state (}(hj4hhhNhNubh)}(h%:c:type:`drm_plane.state `h]jz)}(hj%4h]hdrm_plane.state}(hj'4hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj#4ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_planeuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubhX") and new_state. This is required since cleanup for async commits is performed on the new state, rather than old state like for traditional commits. Since we want to give up the reference on the current (old) fb instead of our brand new one, swap them in the driver during the async commit.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjB4hMhj3ubji)}(hhh]jn)}(hXUFIXME: - It only works for single plane updates - Async Pageflips are not supported yet - Some hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h](jt)}(hFIXME:h]hFIXME:}(hjT4hhhNhNubah}(h]h ]h"]h$]h&]uh1jshj3hMhjP4ubj)}(hhh]h)}(hhh](h)}(h&It only works for single plane updatesh]h)}(hjj4h]h&It only works for single plane updates}(hjl4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhjh4ubah}(h]h ]h"]h$]h&]uh1hhje4ubh)}(h%Async Pageflips are not supported yeth]h)}(hj4h]h%Async Pageflips are not supported yet}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubah}(h]h ]h"]h$]h&]uh1hhje4ubh)}(hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created. h]h)}(hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created.h]hSome hw might still scan out the old buffer until the next vblank, however we let go of the fb references as soon as we run this hook. For now drivers must implement their own workers for deferring if needed, until a common solution is created.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubah}(h]h ]h"]h$]h&]uh1hhje4ubeh}(h]h ]h"]h$]h&]j8-uh1hhjy4hMhjb4ubah}(h]h ]h"]h$]h&]uh1jhjP4ubeh}(h]h ]h"]h$]h&]uh1jmhj3hMhjM4ubah}(h]h ]h"]h$]h&]uh1jhhj3ubeh}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jmhj3hMhjQ,ubjn)}(hX``get_scanout_buffer`` Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned. Return: ``0`` on success, negative errno on failure. h](jt)}(h``get_scanout_buffer``h]jz)}(hj4h]hget_scanout_buffer}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubj)}(hhh](h)}(hX<Get the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device :c:type:`dev.mode_config `.panic_lock is taken before calling this function, so you can safely access the :c:type:`plane.state ` It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed. It's a best effort mode, so it's expected that in some complex cases the panic screen won't be displayed. The returned :c:type:`drm_scanout_buffer.map ` must be valid if no error code is returned.h](hXGet the current scanout buffer, to display a message with drm_panic. The driver should do the minimum changes to provide a buffer, that can be used to display the panic screen. Currently only linear buffers are supported. Non-linear buffer support is on the TODO list. The device }(hj4hhhNhNubh)}(h:c:type:`dev.mode_config `h]jz)}(hj4h]hdev.mode_config}(hj5hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdevuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubhP.panic_lock is taken before calling this function, so you can safely access the }(hj4hhhNhNubh)}(h:c:type:`plane.state `h]jz)}(hj#5h]h plane.state}(hj%5hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj!5ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjplaneuh1hhj5hMhj4ubhX? It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what’s safe and what is not allowed. It’s a best effort mode, so it’s expected that in some complex cases the panic screen won’t be displayed. The returned }(hj4hhhNhNubh)}(h5:c:type:`drm_scanout_buffer.map `h]jz)}(hjF5h]hdrm_scanout_buffer.map}(hjH5hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjD5ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_scanout_bufferuh1hhj5hMhj4ubh, must be valid if no error code is returned.}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj5hMhj4ubh)}(h4Return: ``0`` on success, negative errno on failure.h](hReturn: }(hjm5hhhNhNubjz)}(h``0``h]h0}(hju5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjm5ubh' on success, negative errno on failure.}(hjm5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj4ubeh}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhj4hMhjQ,ubjn)}(hX3``panic_flush`` It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](jt)}(h``panic_flush``h]jz)}(hj5h]h panic_flush}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj5ubj)}(hhh]h)}(hX#It is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the :c:type:`dev.mode_config `.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what's safe and what is not allowed.h](hXIt is used by drm_panic, and is called after the panic screen is drawn to the scanout buffer. In this function, the driver can send additional commands to the hardware, to make the scanout buffer visible. It is only called if get_scanout_buffer() returned successfully, and the }(hj5hhhNhNubh)}(h:c:type:`dev.mode_config `h]jz)}(hj5h]hdev.mode_config}(hj5hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj5ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdevuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj5ubh.panic_lock is held during the entire sequence. It is called from a panic callback, and must follow its restrictions. Please look the documentation at drm_panic_trylock() for an in-depth discussions of what’s safe and what is not allowed.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj5hMhj5ubah}(h]h ]h"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]uh1jmhj5hMhjQ,ubeh}(h]h ]h"]h$]h&]uh1jhhj ,ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubh)}(h**Description**h]j%)}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj:hhubh)}(h/These functions are used by the atomic helpers.h]h/These functions are used by the atomic helpers.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj:hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_plane_helper_add (C function)c.drm_plane_helper_addhNtauh1jxhj:hhhjhNubj)}(hhh](j)}(h_void drm_plane_helper_add (struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h]j)}(h^void drm_plane_helper_add(struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hjD6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@6hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMubj)}(h h]h }(hjS6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@6hhhjR6hMubj)}(hdrm_plane_helper_addh]j)}(hdrm_plane_helper_addh]hdrm_plane_helper_add}(hje6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhja6ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@6hhhjR6hMubj)}(hE(struct drm_plane *plane, const struct drm_plane_helper_funcs *funcs)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}6ubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj6modnameN classnameNjj)}j]j)}jjg6sbc.drm_plane_helper_addasbuh1hhj}6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}6ubj+)}(hj9h]h*}(hj6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj}6ubj)}(hplaneh]hplane}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjy6ubj)}(h*const struct drm_plane_helper_funcs *funcsh](j)}(hjUh]hconst}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_plane_helper_funcsh]hdrm_plane_helper_funcs}(hj,7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.7modnameN classnameNjj)}j]j6c.drm_plane_helper_addasbuh1hhj6ubj)}(h h]h }(hjJ7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjX7hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hfuncsh]hfuncs}(hje7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjy6ubeh}(h]h ]h"]h$]h&]jjuh1jhj@6hhhjR6hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj<6hhhjR6hMubah}(h]j76ah ](jjeh"]h$]h&]jj)jhuh1jhjR6hMhj96hhubj)}(hhh]h)}(h"sets the helper vtable for a planeh]h"sets the helper vtable for a plane}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj7hhubah}(h]h ]h"]h$]h&]uh1jhj96hhhjR6hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj7jj7jjjuh1jhhhj:hjhNubj)}(h**Parameters** ``struct drm_plane *plane`` DRM plane ``const struct drm_plane_helper_funcs *funcs`` helper vtable to set for **plane**h](h)}(h**Parameters**h]j%)}(hj7h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubji)}(hhh](jn)}(h&``struct drm_plane *plane`` DRM plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hj7h]hstruct drm_plane *plane}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj7ubj)}(hhh]h)}(h DRM planeh]h DRM plane}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj7ubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jmhj7hMhj7ubjn)}(hQ``const struct drm_plane_helper_funcs *funcs`` helper vtable to set for **plane**h](jt)}(h.``const struct drm_plane_helper_funcs *funcs``h]jz)}(hj 8h]h*const struct drm_plane_helper_funcs *funcs}(hj 8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj8ubj)}(hhh]h)}(h"helper vtable to set for **plane**h](hhelper vtable to set for }(hj"8hhhNhNubj%)}(h **plane**h]hplane}(hj*8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"8ubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj8ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jmhj8hMhj7ubeh}(h]h ]h"]h$]h&]uh1jhhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_mode_config_helper_funcs (C struct)c.drm_mode_config_helper_funcshNtauh1jxhj:hhhjhNubj)}(hhh](j)}(hdrm_mode_config_helper_funcsh]j)}(h#struct drm_mode_config_helper_funcsh](j)}(hjh]hstruct}(hjq8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm8hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm8hhhj~8hMubj)}(hdrm_mode_config_helper_funcsh]j)}(hjk8h]hdrm_mode_config_helper_funcs}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjm8hhhj~8hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhji8hhhj~8hMubah}(h]jd8ah ](jjeh"]h$]h&]jj)jhuh1jhj~8hMhjf8hhubj)}(hhh]h)}(h global modeset helper operationsh]h global modeset helper operations}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj8hhubah}(h]h ]h"]h$]h&]uh1jhjf8hhhj~8hMubeh}(h]h ](jstructeh"]h$]h&]jjjj8jj8jjjuh1jhhhj:hjhNubj)}(hXN **Definition**:: struct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_state *state); int (*atomic_commit_setup)(struct drm_atomic_state *state); }; **Members** ``atomic_commit_tail`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers This function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware. After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes(). When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely. This hook is optional, the default implementation is drm_atomic_helper_commit_tail(). ``atomic_commit_setup`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers. This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure. Note that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this. This hook is optional.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubh:}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj8ubj@)}(hstruct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_state *state); int (*atomic_commit_setup)(struct drm_atomic_state *state); };h]hstruct drm_mode_config_helper_funcs { void (*atomic_commit_tail)(struct drm_atomic_state *state); int (*atomic_commit_setup)(struct drm_atomic_state *state); };}hj8sbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj8ubh)}(h **Members**h]j%)}(hj9h]hMembers}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj8ubji)}(hhh](jn)}(hXi``atomic_commit_tail`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers This function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware. After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes(). When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely. This hook is optional, the default implementation is drm_atomic_helper_commit_tail(). h](jt)}(h``atomic_commit_tail``h]jz)}(hj 9h]hatomic_commit_tail}(hj"9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj9ubj)}(hhh](h)}(hX#This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpersh]hX#This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking commit helpers (see drm_atomic_helper_setup_commit() for a starting point) to implement blocking and nonblocking commits easily. It is not used by the atomic helpers}(hj99hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj69ubh)}(hXThis function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware.h]hXThis function is called when the new atomic state has already been swapped into the various state pointers. The passed in state therefore contains copies of the old/previous state. This hook should commit the new state into hardware. Note that the helpers have already waited for preceding atomic commits and fences, but drivers can add more waiting calls at the start of their implementation, e.g. to wait for driver-internal request for implicit syncing, before starting to commit the update to the hardware.}(hjH9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj69ubh)}(hX\After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes().h]hX\After the atomic update is committed to the hardware this hook needs to call drm_atomic_helper_commit_hw_done(). Then wait for the update to be executed by the hardware, for example using drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(), and then clean up the old framebuffers using drm_atomic_helper_cleanup_planes().}(hjW9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj69ubh)}(hXwWhen disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don't work on disabled CRTC, hence the core can't take care of this. And it also can't rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely.h]hX}When disabling a CRTC this hook _must_ stall for the commit to complete. Vblank waits don’t work on disabled CRTC, hence the core can’t take care of this. And it also can’t rely on the vblank event, since that can be signalled already when the screen shows black, which can happen much earlier than the last hardware access needed to shut off the display pipeline completely.}(hjf9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj69ubh)}(hUThis hook is optional, the default implementation is drm_atomic_helper_commit_tail().h]hUThis hook is optional, the default implementation is drm_atomic_helper_commit_tail().}(hju9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj69ubeh}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhj59hMhj9ubjn)}(hX``atomic_commit_setup`` This hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers. This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure. Note that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this. This hook is optional.h](jt)}(h``atomic_commit_setup``h]jz)}(hj9h]hatomic_commit_setup}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj9ubj)}(hhh](h)}(hThis hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers.h]hThis hook is used by the default atomic_commit() hook implemented in drm_atomic_helper_commit() together with the nonblocking helpers (see drm_atomic_helper_setup_commit()) to extend the DRM commit setup. It is not used by the atomic helpers.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj9ubh)}(hX4This function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn't related to a CRTC, plane or connector, tracked in a :c:type:`drm_private_obj` structure.h](hXThis function is called at the end of drm_atomic_helper_setup_commit(), so once the commit has been properly setup across the generic DRM object states. It allows drivers to do some additional commit tracking that isn’t related to a CRTC, plane or connector, tracked in a }(hj9hhhNhNubh)}(h:c:type:`drm_private_obj`h]jz)}(hj9h]hdrm_private_obj}(hj9hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj9ubh structure.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubh)}(hkNote that the documentation of :c:type:`drm_private_obj` has more details on how one should implement this.h](hNote that the documentation of }(hj9hhhNhNubh)}(h:c:type:`drm_private_obj`h]jz)}(hj9h]hdrm_private_obj}(hj9hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhM hj9ubh3 has more details on how one should implement this.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:hM hj9ubh)}(hThis hook is optional.h]hThis hook is optional.}(hj":hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj9ubeh}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhj9hMhj9ubeh}(h]h ]h"]h$]h&]uh1jhhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj:hhhjhNubh)}(h**Description**h]j%)}(hjL:h]h Description}(hjN:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJ:ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj:hhubh)}(h6These helper functions are used by the atomic helpers.h]h6These helper functions are used by the atomic helpers.}(hjb:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:42: ./include/drm/drm_modeset_helper_vtables.hhMhj:hhubhtarget)}(h.. _drm_atomic_helper:h]h}(h]h ]h"]h$]h&]refiddrm-atomic-helperuh1jq:hK-hj:hhhhubeh}(h]+modeset-helper-reference-for-common-vtablesah ]h"]+modeset helper reference for common vtablesah$]h&]uh1hhhhhhhhK%ubh)}(hhh](h)}(h)Atomic Modeset Helper Functions Referenceh]h)Atomic Modeset Helper Functions Reference}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hhhhhK0ubh)}(hhh](h)}(hOverviewh]hOverview}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hhhhhK3ubh)}(hXXThis helper library provides implementations of check and commit functions on top of the CRTC modeset helper callbacks and the plane helper callbacks. It also provides convenience implementations for the atomic state handling callbacks for drivers which don't need to subclass the drm core structures to add their own additional internal state.h]hXZThis helper library provides implementations of check and commit functions on top of the CRTC modeset helper callbacks and the plane helper callbacks. It also provides convenience implementations for the atomic state handling callbacks for drivers which don’t need to subclass the drm core structures to add their own additional internal state.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:53: ./drivers/gpu/drm/drm_atomic_helper.chK5hj:hhubh)}(hXTThis library also provides default implementations for the check callback in drm_atomic_helper_check() and for the commit callback with drm_atomic_helper_commit(). But the individual stages and callbacks are exposed to allow drivers to mix and match and e.g. use the plane helpers only together with a driver private modeset implementation.h]hXTThis library also provides default implementations for the check callback in drm_atomic_helper_check() and for the commit callback with drm_atomic_helper_commit(). But the individual stages and callbacks are exposed to allow drivers to mix and match and e.g. use the plane helpers only together with a driver private modeset implementation.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:53: ./drivers/gpu/drm/drm_atomic_helper.chK;hj:hhubh)}(hXRThis library also provides implementations for all the legacy driver interfaces on top of the atomic interface. See drm_atomic_helper_set_config(), drm_atomic_helper_disable_plane(), and the various functions to implement set_property callbacks. New drivers must not implement these functions themselves but must use the provided helpers.h]hXRThis library also provides implementations for all the legacy driver interfaces on top of the atomic interface. See drm_atomic_helper_set_config(), drm_atomic_helper_disable_plane(), and the various functions to implement set_property callbacks. New drivers must not implement these functions themselves but must use the provided helpers.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:53: ./drivers/gpu/drm/drm_atomic_helper.chKAhj:hhubh)}(hXThe atomic helper uses the same function table structures as all other modesetting helpers. See the documentation for :c:type:`struct drm_crtc_helper_funcs `, struct :c:type:`drm_encoder_helper_funcs` and :c:type:`struct drm_connector_helper_funcs `. It also shares the :c:type:`struct drm_plane_helper_funcs ` function table with the plane helpers.h](hvThe atomic helper uses the same function table structures as all other modesetting helpers. See the documentation for }(hj:hhhNhNubh)}(h>:c:type:`struct drm_crtc_helper_funcs `h]jz)}(hj:h]hstruct drm_crtc_helper_funcs}(hj:hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:53: ./drivers/gpu/drm/drm_atomic_helper.chKGhj:ubh , struct }(hj:hhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]jz)}(hj;h]hdrm_encoder_helper_funcs}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhj:hKGhj:ubh and }(hj:hhhNhNubh)}(hH:c:type:`struct drm_connector_helper_funcs `h]jz)}(hj';h]h!struct drm_connector_helper_funcs}(hj);hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj%;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhj:hKGhj:ubh. It also shares the }(hj:hhhNhNubh)}(h@:c:type:`struct drm_plane_helper_funcs `h]jz)}(hjJ;h]hstruct drm_plane_helper_funcs}(hjL;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjH;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhj:hKGhj:ubh' function table with the plane helpers.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:hKGhj:hhubeh}(h]overviewah ]h"]h$]overviewah&]uh1hhj:hhhhhK3 referencedKubh)}(hhh](h)}(h'Implementing Asynchronous Atomic Commith]h'Implementing Asynchronous Atomic Commit}(hj};hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz;hhhhhK9ubh)}(hXNonblocking atomic commits should use struct :c:type:`drm_crtc_commit` to sequence different operations against each another. Locks, especially struct :c:type:`drm_modeset_lock`, should not be held in worker threads or any other asynchronous context used to commit the hardware state.h](h-Nonblocking atomic commits should use struct }(hj;hhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jz)}(hj;h]hdrm_crtc_commit}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM hj;ubhQ to sequence different operations against each another. Locks, especially struct }(hj;hhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hj;h]hdrm_modeset_lock}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_modeset_lockuh1hhj;hM hj;ubhk, should not be held in worker threads or any other asynchronous context used to commit the hardware state.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hM hjz;hhubh)}(hdrm_atomic_helper_commit() implements the recommended sequence for nonblocking commits, using drm_atomic_helper_setup_commit() internally:h]hdrm_atomic_helper_commit() implements the recommended sequence for nonblocking commits, using drm_atomic_helper_setup_commit() internally:}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM hjz;hhubh)}(h1. Run drm_atomic_helper_prepare_planes(). Since this can fail and we need to propagate out of memory/VRAM errors to userspace, it must be called synchronously.h]h1. Run drm_atomic_helper_prepare_planes(). Since this can fail and we need to propagate out of memory/VRAM errors to userspace, it must be called synchronously.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM hjz;hhubh)}(h2. Synchronize with any outstanding nonblocking commit worker threads which might be affected by the new state update. This is handled by drm_atomic_helper_setup_commit().h]h2. Synchronize with any outstanding nonblocking commit worker threads which might be affected by the new state update. This is handled by drm_atomic_helper_setup_commit().}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM hjz;hhubh)}(hXEAsynchronous workers need to have sufficient parallelism to be able to run different atomic commits on different CRTCs in parallel. The simplest way to achieve this is by running them on the :c:type:`system_unbound_wq` work queue. Note that drivers are not required to split up atomic commits and run an individual commit in parallel - userspace is supposed to do that if it cares. But it might be beneficial to do that for modesets, since those necessarily must be done as one global operation, and enabling or disabling a CRTC can take a long time. But even that is not required.h](hAsynchronous workers need to have sufficient parallelism to be able to run different atomic commits on different CRTCs in parallel. The simplest way to achieve this is by running them on the }(hj <hhhNhNubh)}(h:c:type:`system_unbound_wq`h]jz)}(hj<h]hsystem_unbound_wq}(hj<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj<ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjsystem_unbound_wquh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM# hj <ubhXk work queue. Note that drivers are not required to split up atomic commits and run an individual commit in parallel - userspace is supposed to do that if it cares. But it might be beneficial to do that for modesets, since those necessarily must be done as one global operation, and enabling or disabling a CRTC can take a long time. But even that is not required.}(hj <hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4<hM# hjz;hhubh)}(hX+IMPORTANT: A :c:type:`drm_atomic_state` update for multiple CRTCs is sequenced against all CRTCs therein. Therefore for atomic state updates which only flip planes the driver must not get the struct :c:type:`drm_crtc_state` of unrelated CRTCs in its atomic check code: This would prevent committing of atomic updates to multiple CRTCs in parallel. In general, adding additional state structures should be avoided as much as possible, because this reduces parallelism in (nonblocking) commits, both due to locking and due to commit sequencing requirements.h](h IMPORTANT: A }(hj?<hhhNhNubh)}(h:c:type:`drm_atomic_state`h]jz)}(hjI<h]hdrm_atomic_state}(hjK<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjG<ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM, hj?<ubh update for multiple CRTCs is sequenced against all CRTCs therein. Therefore for atomic state updates which only flip planes the driver must not get the struct }(hj?<hhhNhNubh)}(h:c:type:`drm_crtc_state`h]jz)}(hjm<h]hdrm_crtc_state}(hjo<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjk<ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjf<hM, hj?<ubhXL of unrelated CRTCs in its atomic check code: This would prevent committing of atomic updates to multiple CRTCs in parallel. In general, adding additional state structures should be avoided as much as possible, because this reduces parallelism in (nonblocking) commits, both due to locking and due to commit sequencing requirements.}(hj?<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjf<hM, hjz;hhubh)}(hX3. The software state is updated synchronously with drm_atomic_helper_swap_state(). Doing this under the protection of all modeset locks means concurrent callers never see inconsistent state. Note that commit workers do not hold any locks; their access is only coordinated through ordering. If workers would access state only through the pointers in the free-standing state objects (currently not the case for any driver) then even multiple pending commits could be in-flight at the same time.h]hX3. The software state is updated synchronously with drm_atomic_helper_swap_state(). Doing this under the protection of all modeset locks means concurrent callers never see inconsistent state. Note that commit workers do not hold any locks; their access is only coordinated through ordering. If workers would access state only through the pointers in the free-standing state objects (currently not the case for any driver) then even multiple pending commits could be in-flight at the same time.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM5 hjz;hhubh)}(hX4. Schedule a work item to do all subsequent steps, using the split-out commit helpers: a) pre-plane commit b) plane commit c) post-plane commit and then cleaning up the framebuffers after the old framebuffer is no longer being displayed. The scheduled work should synchronize against other workers using the :c:type:`drm_crtc_commit` infrastructure as needed. See drm_atomic_helper_setup_commit() for more details.h](hX54. Schedule a work item to do all subsequent steps, using the split-out commit helpers: a) pre-plane commit b) plane commit c) post-plane commit and then cleaning up the framebuffers after the old framebuffer is no longer being displayed. The scheduled work should synchronize against other workers using the }(hj<hhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jz)}(hj<h]hdrm_crtc_commit}(hj<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj<ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:59: ./drivers/gpu/drm/drm_atomic_helper.chM= hj<ubhQ infrastructure as needed. See drm_atomic_helper_setup_commit() for more details.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hM= hjz;hhubeh}(h]'implementing-asynchronous-atomic-commitah ]h"]'implementing asynchronous atomic commitah$]h&]uh1hhj:hhhhhK9ubh)}(hhh](h)}(hHelper Functions Referenceh]hHelper Functions Reference}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hhhhhK?ubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_atomic_crtc_for_each_plane (C macro) c.drm_atomic_crtc_for_each_planehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hdrm_atomic_crtc_for_each_planeh]j)}(hdrm_atomic_crtc_for_each_planeh]j)}(hdrm_atomic_crtc_for_each_planeh]j)}(hj=h]hdrm_atomic_crtc_for_each_plane}(hj =hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj=hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj<hhhj=hKubah}(h]j<ah ](jjeh"]h$]h&]jj)jhuh1jhj=hKhj<hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj<hhhj=hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj7=jj7=jjjuh1jhhhj<hNhNubh)}(h0``drm_atomic_crtc_for_each_plane (plane, crtc)``h]jz)}(hj==h]h,drm_atomic_crtc_for_each_plane (plane, crtc)}(hj?=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj<hhubh block_quote)}(h/iterate over planes currently attached to CRTC h]h)}(h.iterate over planes currently attached to CRTCh]h.iterate over planes currently attached to CRTC}(hjY=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjU=ubah}(h]h ]h"]h$]h&]uh1jS=hjg=hKhj<hhubj)}(hX**Parameters** ``plane`` the loop cursor ``crtc`` the CRTC whose planes are iterated **Description** This iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which *will* be attached (more useful in code called from :c:type:`drm_mode_config_funcs.atomic_check `) see drm_atomic_crtc_state_for_each_plane().h](h)}(h**Parameters**h]j%)}(hjt=h]h Parameters}(hjv=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjr=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjn=ubji)}(hhh](jn)}(h``plane`` the loop cursor h](jt)}(h ``plane``h]jz)}(hj=h]hplane}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj=ubj)}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hKhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhj=hKhj=ubjn)}(h,``crtc`` the CRTC whose planes are iterated h](jt)}(h``crtc``h]jz)}(hj=h]hcrtc}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj=ubj)}(hhh]h)}(h"the CRTC whose planes are iteratedh]h"the CRTC whose planes are iterated}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hKhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhj=hKhj=ubeh}(h]h ]h"]h$]h&]uh1jhhjn=ubh)}(h**Description**h]j%)}(hj>h]h Description}(hj >hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjn=ubh)}(hXDThis iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which *will* be attached (more useful in code called from :c:type:`drm_mode_config_funcs.atomic_check `) see drm_atomic_crtc_state_for_each_plane().h](hThis iterates over the current state, useful (for example) when applying atomic state after it has been checked and swapped. To iterate over the planes which }(hj>hhhNhNubhemphasis)}(h*will*h]hwill}(hj'>hhhNhNubah}(h]h ]h"]h$]h&]uh1j%>hj>ubh. be attached (more useful in code called from }(hj>hhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jz)}(hj;>h]h"drm_mode_config_funcs.atomic_check}(hj=>hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9>ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj>ubh-) see drm_atomic_crtc_state_for_each_plane().}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjX>hKhjn=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_atomic_crtc_state_for_each_plane (C macro)&c.drm_atomic_crtc_state_for_each_planehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h$drm_atomic_crtc_state_for_each_planeh]j)}(h$drm_atomic_crtc_state_for_each_planeh]j)}(h$drm_atomic_crtc_state_for_each_planeh]j)}(hj}>h]h$drm_atomic_crtc_state_for_each_plane}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj>hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj{>hhhj>hKubah}(h]jv>ah ](jjeh"]h$]h&]jj)jhuh1jhj>hKhjx>hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjx>hhhj>hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj>jj>jjjuh1jhhhj<hNhNubh)}(h<``drm_atomic_crtc_state_for_each_plane (plane, crtc_state)``h]jz)}(hj>h]h8drm_atomic_crtc_state_for_each_plane (plane, crtc_state)}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj<hhubjT=)}(h*iterate over attached planes in new state h]h)}(h)iterate over attached planes in new stateh]h)iterate over attached planes in new state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj>ubah}(h]h ]h"]h$]h&]uh1jS=hj>hKhj<hhubj)}(hX~**Parameters** ``plane`` the loop cursor ``crtc_state`` the incoming CRTC state **Description** Similar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](h)}(h**Parameters**h]j%)}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj>ubji)}(hhh](jn)}(h``plane`` the loop cursor h](jt)}(h ``plane``h]jz)}(hj ?h]hplane}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ?ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj?ubj)}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hj&?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"?hKhj#?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj"?hKhj?ubjn)}(h'``crtc_state`` the incoming CRTC state h](jt)}(h``crtc_state``h]jz)}(hjF?h]h crtc_state}(hjH?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjD?ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj@?ubj)}(hhh]h)}(hthe incoming CRTC stateh]hthe incoming CRTC state}(hj_?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[?hKhj\?ubah}(h]h ]h"]h$]h&]uh1jhj@?ubeh}(h]h ]h"]h$]h&]uh1jmhj[?hKhj?ubeh}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hj?h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj>ubh)}(hXSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](hSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from }(hj?hhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jz)}(hj?h]h"drm_mode_config_funcs.atomic_check}(hj?hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj?ubh, operations, to validate the incoming state.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hKhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_atomic_crtc_state_for_each_plane_state (C macro),c.drm_atomic_crtc_state_for_each_plane_statehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h*drm_atomic_crtc_state_for_each_plane_stateh]j)}(h*drm_atomic_crtc_state_for_each_plane_stateh]j)}(h*drm_atomic_crtc_state_for_each_plane_stateh]j)}(hj?h]h*drm_atomic_crtc_state_for_each_plane_state}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj?hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj?hhhj@hKubah}(h]j?ah ](jjeh"]h$]h&]jj)jhuh1jhj@hKhj?hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj?hhhj@hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj@jj@jjjuh1jhhhj<hNhNubh)}(hO``drm_atomic_crtc_state_for_each_plane_state (plane, plane_state, crtc_state)``h]jz)}(hj@h]hKdrm_atomic_crtc_state_for_each_plane_state (plane, plane_state, crtc_state)}(hj!@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj<hhubjT=)}(h*iterate over attached planes in new state h]h)}(h)iterate over attached planes in new stateh]h)iterate over attached planes in new state}(hj9@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj5@ubah}(h]h ]h"]h$]h&]uh1jS=hjG@hKhj<hhubj)}(hX**Parameters** ``plane`` the loop cursor ``plane_state`` loop cursor for the plane's state, must be const ``crtc_state`` the incoming CRTC state **Description** Similar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state. Compared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.h](h)}(h**Parameters**h]j%)}(hjT@h]h Parameters}(hjV@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjR@ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjN@ubji)}(hhh](jn)}(h``plane`` the loop cursor h](jt)}(h ``plane``h]jz)}(hjs@h]hplane}(hju@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjq@ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjm@ubj)}(hhh]h)}(hthe loop cursorh]hthe loop cursor}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKhj@ubah}(h]h ]h"]h$]h&]uh1jhjm@ubeh}(h]h ]h"]h$]h&]uh1jmhj@hKhjj@ubjn)}(hA``plane_state`` loop cursor for the plane's state, must be const h](jt)}(h``plane_state``h]jz)}(hj@h]h plane_state}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj@ubj)}(hhh]h)}(h0loop cursor for the plane's state, must be consth]h2loop cursor for the plane’s state, must be const}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKhj@ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj@hKhjj@ubjn)}(h'``crtc_state`` the incoming CRTC state h](jt)}(h``crtc_state``h]jz)}(hj@h]h crtc_state}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj@ubj)}(hhh]h)}(hthe incoming CRTC stateh]hthe incoming CRTC state}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKhj@ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj@hKhjj@ubeh}(h]h ]h"]h$]h&]uh1jhhjN@ubh)}(h**Description**h]j%)}(hj Ah]h Description}(hj"AhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjN@ubh)}(hXSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from :c:type:`drm_mode_config_funcs.atomic_check ` operations, to validate the incoming state.h](hSimilar to drm_crtc_for_each_plane(), but iterates the planes that will be attached if the specified state is applied. Useful during for example in code called from }(hj6AhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jz)}(hj@Ah]h"drm_mode_config_funcs.atomic_check}(hjBAhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj>Aubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj6Aubh, operations, to validate the incoming state.}(hj6AhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj]AhKhjN@ubh)}(hCompared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.h]hCompared to just drm_atomic_crtc_state_for_each_plane() this also fills in a const plane_state. This is useful when a driver just wants to peek at other active planes on this CRTC, but does not need to change it.}(hjhAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjN@ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_atomic_plane_enabling (C function)c.drm_atomic_plane_enablinghNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hqbool drm_atomic_plane_enabling (struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h]j)}(hpbool drm_atomic_plane_enabling(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(hboolh]hbool}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhjAhKubj)}(hdrm_atomic_plane_enablingh]j)}(hdrm_atomic_plane_enablingh]hdrm_atomic_plane_enabling}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ](jjeh"]h$]h&]jjuh1jhjAhhhjAhKubj)}(hR(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(h'struct drm_plane_state *old_plane_stateh](j)}(hjh]hstruct}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjAmodnameN classnameNjj)}j]j)}jjAsbc.drm_atomic_plane_enablingasbuh1hhjAubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj+)}(hj9h]h*}(hj BhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjAubj)}(hold_plane_stateh]hold_plane_state}(hj-BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjAubj)}(h'struct drm_plane_state *new_plane_stateh](j)}(hjh]hstruct}(hjFBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBBubj)}(h h]h }(hjSBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBBubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjdBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaBubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjfBmodnameN classnameNjj)}j]jBc.drm_atomic_plane_enablingasbuh1hhjBBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBBubj+)}(hj9h]h*}(hjBhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBBubj)}(hnew_plane_stateh]hnew_plane_state}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjAubeh}(h]h ]h"]h$]h&]jjuh1jhjAhhhjAhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjAhhhjAhKubah}(h]jAah ](jjeh"]h$]h&]jj)jhuh1jhjAhKhjAhhubj)}(hhh]h)}(h&check whether a plane is being enabledh]h&check whether a plane is being enabled}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjBhhubah}(h]h ]h"]h$]h&]uh1jhjAhhhjAhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjBjjBjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_plane_state *old_plane_state`` old atomic plane state ``struct drm_plane_state *new_plane_state`` new atomic plane state **Description** Checks the atomic state of a plane to determine whether it's being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL). **Return** True if the plane is being enabled, false otherwise.h](h)}(h**Parameters**h]j%)}(hjBh]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjBubji)}(hhh](jn)}(hC``struct drm_plane_state *old_plane_state`` old atomic plane state h](jt)}(h+``struct drm_plane_state *old_plane_state``h]jz)}(hjCh]h'struct drm_plane_state *old_plane_state}(hj ChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjCubj)}(hhh]h)}(hold atomic plane stateh]hold atomic plane state}(hj!ChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChKhjCubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jmhjChKhjBubjn)}(hC``struct drm_plane_state *new_plane_state`` new atomic plane state h](jt)}(h+``struct drm_plane_state *new_plane_state``h]jz)}(hjACh]h'struct drm_plane_state *new_plane_state}(hjCChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?Cubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhj;Cubj)}(hhh]h)}(hnew atomic plane stateh]hnew atomic plane state}(hjZChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVChKhjWCubah}(h]h ]h"]h$]h&]uh1jhj;Cubeh}(h]h ]h"]h$]h&]uh1jmhjVChKhjBubeh}(h]h ]h"]h$]h&]uh1jhhjBubh)}(h**Description**h]j%)}(hj|Ch]h Description}(hj~ChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjBubh)}(hChecks the atomic state of a plane to determine whether it's being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).h]hChecks the atomic state of a plane to determine whether it’s being enabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjBubh)}(h **Return**h]j%)}(hjCh]hReturn}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjBubh)}(h4True if the plane is being enabled, false otherwise.h]h4True if the plane is being enabled, false otherwise.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhKhjBubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_atomic_plane_disabling (C function)c.drm_atomic_plane_disablinghNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hrbool drm_atomic_plane_disabling (struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h]j)}(hqbool drm_atomic_plane_disabling(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(hjAh]hbool}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjChhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhMubj)}(h h]h }(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjChhhjChMubj)}(hdrm_atomic_plane_disablingh]j)}(hdrm_atomic_plane_disablingh]hdrm_atomic_plane_disabling}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ](jjeh"]h$]h&]jjuh1jhjChhhjChMubj)}(hR(struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state)h](j)}(h'struct drm_plane_state *old_plane_stateh](j)}(hjh]hstruct}(hj$DhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Dubj)}(h h]h }(hj1DhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Dubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjBDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?Dubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDDmodnameN classnameNjj)}j]j)}jj Dsbc.drm_atomic_plane_disablingasbuh1hhj Dubj)}(h h]h }(hjbDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Dubj+)}(hj9h]h*}(hjpDhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj Dubj)}(hold_plane_stateh]hold_plane_state}(hj}DhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Dubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjDubj)}(h'struct drm_plane_state *new_plane_stateh](j)}(hjh]hstruct}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDmodnameN classnameNjj)}j]j^Dc.drm_atomic_plane_disablingasbuh1hhjDubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj+)}(hj9h]h*}(hjDhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjDubj)}(hnew_plane_stateh]hnew_plane_state}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjDubeh}(h]h ]h"]h$]h&]jjuh1jhjChhhjChMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjChhhjChMubah}(h]jCah ](jjeh"]h$]h&]jj)jhuh1jhjChMhjChhubj)}(hhh]h)}(h'check whether a plane is being disabledh]h'check whether a plane is being disabled}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhMhjEhhubah}(h]h ]h"]h$]h&]uh1jhjChhhjChMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj/Ejj/Ejjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_plane_state *old_plane_state`` old atomic plane state ``struct drm_plane_state *new_plane_state`` new atomic plane state **Description** Checks the atomic state of a plane to determine whether it's being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL). **Return** True if the plane is being disabled, false otherwise.h](h)}(h**Parameters**h]j%)}(hj9Eh]h Parameters}(hj;EhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7Eubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhM hj3Eubji)}(hhh](jn)}(hC``struct drm_plane_state *old_plane_state`` old atomic plane state h](jt)}(h+``struct drm_plane_state *old_plane_state``h]jz)}(hjXEh]h'struct drm_plane_state *old_plane_state}(hjZEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjVEubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhM hjREubj)}(hhh]h)}(hold atomic plane stateh]hold atomic plane state}(hjqEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmEhM hjnEubah}(h]h ]h"]h$]h&]uh1jhjREubeh}(h]h ]h"]h$]h&]uh1jmhjmEhM hjOEubjn)}(hC``struct drm_plane_state *new_plane_state`` new atomic plane state h](jt)}(h+``struct drm_plane_state *new_plane_state``h]jz)}(hjEh]h'struct drm_plane_state *new_plane_state}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhM hjEubj)}(hhh]h)}(hnew atomic plane stateh]hnew atomic plane state}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhM hjEubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhjEhM hjOEubeh}(h]h ]h"]h$]h&]uh1jhhj3Eubh)}(h**Description**h]j%)}(hjEh]h Description}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhM hj3Eubh)}(hChecks the atomic state of a plane to determine whether it's being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).h]hChecks the atomic state of a plane to determine whether it’s being disabled or not. This also WARNs if it detects an invalid state (both CRTC and FB need to either both be NULL or both be non-NULL).}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhM hj3Eubh)}(h **Return**h]j%)}(hjEh]hReturn}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhMhj3Eubh)}(h5True if the plane is being disabled, false otherwise.h]h5True if the plane is being disabled, false otherwise.}(hj FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:65: ./include/drm/drm_atomic_helper.hhMhj3Eubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_atomic_helper_check_modeset (C function)!c.drm_atomic_helper_check_modesethNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h\int drm_atomic_helper_check_modeset (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(h[int drm_atomic_helper_check_modeset(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hinth]hint}(hj8FhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4Fhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM^ubj)}(h h]h }(hjGFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4FhhhjFFhM^ubj)}(hdrm_atomic_helper_check_modeseth]j)}(hdrm_atomic_helper_check_modeseth]hdrm_atomic_helper_check_modeset}(hjYFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUFubah}(h]h ](jjeh"]h$]h&]jjuh1jhj4FhhhjFFhM^ubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjuFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqFubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjFmodnameN classnameNjj)}j]j)}jj[Fsb!c.drm_atomic_helper_check_modesetasbuh1hhjqFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqFubj+)}(hj9h]h*}(hjFhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjqFubj)}(hdevh]hdev}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmFubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjGmodnameN classnameNjj)}j]jF!c.drm_atomic_helper_check_modesetasbuh1hhjFubj)}(h h]h }(hj#GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj+)}(hj9h]h*}(hj1GhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjFubj)}(hstateh]hstate}(hj>GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmFubeh}(h]h ]h"]h$]h&]jjuh1jhj4FhhhjFFhM^ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj0FhhhjFFhM^ubah}(h]j+Fah ](jjeh"]h$]h&]jj)jhuh1jhjFFhM^hj-Fhhubj)}(hhh]h)}(h)validate state object for modeset changesh]h)validate state object for modeset changes}(hjhGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM^hjeGhhubah}(h]h ]h"]h$]h&]uh1jhj-FhhhjFFhM^ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjGjjGjjjuh1jhhhj<hNhNubj)}(hX **Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` the driver state object **Description** Check the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order: 1. :c:type:`drm_connector_helper_funcs.atomic_best_encoder ` for determining the new encoder. 2. :c:type:`drm_connector_helper_funcs.atomic_check ` to validate the connector state. 3. If it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them. 4. :c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components. 5. :c:type:`drm_bridge_funcs.mode_fixup ` is called on all encoder bridges. 6. :c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead. 7. :c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints. :c:type:`drm_crtc_state.mode_changed ` is set when the input mode is changed. :c:type:`drm_crtc_state.connectors_changed ` is set when a connector is added or removed from the CRTC. :c:type:`drm_crtc_state.active_changed ` is set when :c:type:`drm_crtc_state.active ` changes, which is used for DPMS. :c:type:`drm_crtc_state.no_vblank ` is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset() IMPORTANT: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the :c:type:`drm_crtc_helper_funcs.atomic_check ` functions depend upon the adjusted dotclock for fifo space allocation and watermark computation. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j%)}(hjGh]h Parameters}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMbhjGubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjGh]hstruct drm_device *dev}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM_hjGubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM_hjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjGhM_hjGubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjGh]hstruct drm_atomic_state *state}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM`hjGubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM`hjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjGhM`hjGubeh}(h]h ]h"]h$]h&]uh1jhhjGubh)}(h**Description**h]j%)}(hjHh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMbhjGubh)}(hXCheck the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order:h]hXCheck the state object to see if the requested state is physically possible. This does all the CRTC and connector related computations for an atomic update and adds any additional connectors needed for full modesets. It calls the various per-object callbacks in the follow order:}(hj3HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMahjGubhenumerated_list)}(hhh](h)}(hv:c:type:`drm_connector_helper_funcs.atomic_best_encoder ` for determining the new encoder.h]h)}(hjIHh](h)}(hU:c:type:`drm_connector_helper_funcs.atomic_best_encoder `h]jz)}(hjPHh]h.drm_connector_helper_funcs.atomic_best_encoder}(hjRHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjNHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMfhjKHubh! for determining the new encoder.}(hjKHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjmHhMfhjGHubah}(h]h ]h"]h$]h&]uh1hhjDHubh)}(ho:c:type:`drm_connector_helper_funcs.atomic_check ` to validate the connector state.h]h)}(hjHh](h)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]jz)}(hjHh]h'drm_connector_helper_funcs.atomic_check}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMghjHubh! to validate the connector state.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhMghj~Hubah}(h]h ]h"]h$]h&]uh1hhjDHubh)}(hIf it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them.h]h)}(hIf it's determined a modeset is needed then all connectors on the affected CRTC are added and :c:type:`drm_connector_helper_funcs.atomic_check ` is run on them.h](h`If it’s determined a modeset is needed then all connectors on the affected CRTC are added and }(hjHhhhNhNubh)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]jz)}(hjHh]h'drm_connector_helper_funcs.atomic_check}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhhjHubh is run on them.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhMhhjHubah}(h]h ]h"]h$]h&]uh1hhjDHubh)}(h:c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components.h]h)}(h:c:type:`drm_encoder_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_crtc_helper_funcs.mode_valid ` are called on the affected components.h](h)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]jz)}(hjHh]h#drm_encoder_helper_funcs.mode_valid}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMjhjHubh, }(hjHhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jz)}(hjIh]hdrm_bridge_funcs.mode_valid}(hj!IhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjIhMjhjHubh and }(hjHhhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]jz)}(hjBIh]h drm_crtc_helper_funcs.mode_valid}(hjDIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj@Iubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhjIhMjhjHubh' are called on the affected components.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMjhjHubah}(h]h ]h"]h$]h&]uh1hhjDHubh)}(hZ:c:type:`drm_bridge_funcs.mode_fixup ` is called on all encoder bridges.h]h)}(hjqIh](h)}(h8:c:type:`drm_bridge_funcs.mode_fixup `h]jz)}(hjxIh]hdrm_bridge_funcs.mode_fixup}(hjzIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjvIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMlhjsIubh" is called on all encoder bridges.}(hjsIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMlhjoIubah}(h]h ]h"]h$]h&]uh1hhjDHubh)}(hX:c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead.h]h)}(hX:c:type:`drm_encoder_helper_funcs.atomic_check ` is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, :c:type:`drm_atomic_encoder_helper_funcs.mode_fixup ` is called instead.h](h)}(hJ:c:type:`drm_encoder_helper_funcs.atomic_check `h]jz)}(hjIh]h%drm_encoder_helper_funcs.atomic_check}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMmhjIubh is called to validate any encoder state. This function is only called when the encoder will be part of a configured CRTC, it must not be used for implementing connector property validation. If this function is NULL, }(hjIhhhNhNubh)}(hV:c:type:`drm_atomic_encoder_helper_funcs.mode_fixup `h]jz)}(hjIh]h*drm_atomic_encoder_helper_funcs.mode_fixup}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_encoder_helper_funcsuh1hhjIhMmhjIubh is called instead.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMmhjIubah}(h]h ]h"]h$]h&]uh1hhjDHubh)}(h}:c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints. h]h)}(h|:c:type:`drm_crtc_helper_funcs.mode_fixup ` is called last, to fix up the mode with CRTC constraints.h](h)}(hB:c:type:`drm_crtc_helper_funcs.mode_fixup `h]jz)}(hj Jh]h drm_crtc_helper_funcs.mode_fixup}(hj JhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj Jubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMrhjJubh: is called last, to fix up the mode with CRTC constraints.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(JhMrhjJubah}(h]h ]h"]h$]h&]uh1hhjDHubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jBHhjGubh)}(hX:c:type:`drm_crtc_state.mode_changed ` is set when the input mode is changed. :c:type:`drm_crtc_state.connectors_changed ` is set when a connector is added or removed from the CRTC. :c:type:`drm_crtc_state.active_changed ` is set when :c:type:`drm_crtc_state.active ` changes, which is used for DPMS. :c:type:`drm_crtc_state.no_vblank ` is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset()h](h)}(h6:c:type:`drm_crtc_state.mode_changed `h]jz)}(hjJJh]hdrm_crtc_state.mode_changed}(hjLJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMthjDJubh( is set when the input mode is changed. }(hjDJhhhNhNubh)}(h<:c:type:`drm_crtc_state.connectors_changed `h]jz)}(hjnJh]h!drm_crtc_state.connectors_changed}(hjpJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjlJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjgJhMthjDJubh= is set when a connector is added or removed from the CRTC. }(hjDJhhhNhNubh)}(h8:c:type:`drm_crtc_state.active_changed `h]jz)}(hjJh]hdrm_crtc_state.active_changed}(hjJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjgJhMthjDJubh is set when }(hjDJhhhNhNubh)}(h0:c:type:`drm_crtc_state.active `h]jz)}(hjJh]hdrm_crtc_state.active}(hjJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjgJhMthjDJubh" changes, which is used for DPMS. }(hjDJhhhNhNubh)}(h3:c:type:`drm_crtc_state.no_vblank `h]jz)}(hjJh]hdrm_crtc_state.no_vblank}(hjJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjgJhMthjDJubhZ is set from the result of drm_dev_has_vblank(). See also: drm_atomic_crtc_needs_modeset()}(hjDJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjgJhMthjGubh)}(h IMPORTANT:h]h IMPORTANT:}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM{hjGubh)}(hXDrivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the :c:type:`drm_crtc_helper_funcs.atomic_check ` functions depend upon the adjusted dotclock for fifo space allocation and watermark computation.h](hDrivers which set }(hj KhhhNhNubh)}(h6:c:type:`drm_crtc_state.mode_changed `h]jz)}(hjKh]hdrm_crtc_state.mode_changed}(hjKhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM}hj Kubh (e.g. in their }(hj KhhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jz)}(hj;Kh]h#drm_plane_helper_funcs.atomic_check}(hj=KhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9Kubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhj4KhM}hj Kubh hooks if a plane update can’t be done without a full modeset) _must_ call this function after that change. It is permitted to call this function multiple times for the same update, e.g. when the }(hj KhhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]jz)}(hj^Kh]h"drm_crtc_helper_funcs.atomic_check}(hj`KhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\Kubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhj4KhM}hj Kubha functions depend upon the adjusted dotclock for fifo space allocation and watermark computation.}(hj KhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4KhM}hjGubh)}(h **Return**h]j%)}(hjKh]hReturn}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjGubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjGubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j7drm_atomic_helper_check_wb_connector_state (C function),c.drm_atomic_helper_check_wb_connector_statehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hpint drm_atomic_helper_check_wb_connector_state (struct drm_connector *connector, struct drm_atomic_state *state)h]j)}(hoint drm_atomic_helper_check_wb_connector_state(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hinth]hint}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM@ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhjKhM@ubj)}(h*drm_atomic_helper_check_wb_connector_stateh]j)}(h*drm_atomic_helper_check_wb_connector_stateh]h*drm_atomic_helper_check_wb_connector_state}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubah}(h]h ](jjeh"]h$]h&]jjuh1jhjKhhhjKhM@ubj)}(hA(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj'LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$Lubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)LmodnameN classnameNjj)}j]j)}jjKsb,c.drm_atomic_helper_check_wb_connector_stateasbuh1hhjLubj)}(h h]h }(hjGLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubj+)}(hj9h]h*}(hjULhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjLubj)}(h connectorh]h connector}(hjbLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjLubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj{LhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwLubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwLubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjLmodnameN classnameNjj)}j]jCL,c.drm_atomic_helper_check_wb_connector_stateasbuh1hhjwLubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwLubj+)}(hj9h]h*}(hjLhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjwLubj)}(hstateh]hstate}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwLubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjLubeh}(h]h ]h"]h$]h&]jjuh1jhjKhhhjKhM@ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjKhhhjKhM@ubah}(h]jKah ](jjeh"]h$]h&]jj)jhuh1jhjKhM@hjKhhubj)}(hhh]h)}(hCheck writeback connector stateh]hCheck writeback connector state}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM@hjLhhubah}(h]h ]h"]h$]h&]uh1jhjKhhhjKhM@ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjMjjMjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` corresponding connector ``struct drm_atomic_state *state`` the driver state object **Description** Checks if the writeback connector state is valid, and returns an error if it isn't. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j%)}(hjMh]h Parameters}(hj MhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMDhjMubji)}(hhh](jn)}(h<``struct drm_connector *connector`` corresponding connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj=Mh]hstruct drm_connector *connector}(hj?MhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;Mubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMAhj7Mubj)}(hhh]h)}(hcorresponding connectorh]hcorresponding connector}(hjVMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRMhMAhjSMubah}(h]h ]h"]h$]h&]uh1jhj7Mubeh}(h]h ]h"]h$]h&]uh1jmhjRMhMAhj4Mubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjvMh]hstruct drm_atomic_state *state}(hjxMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjtMubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMBhjpMubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhMBhjMubah}(h]h ]h"]h$]h&]uh1jhjpMubeh}(h]h ]h"]h$]h&]uh1jmhjMhMBhj4Mubeh}(h]h ]h"]h$]h&]uh1jhhjMubh)}(h**Description**h]j%)}(hjMh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMDhjMubh)}(hSChecks if the writeback connector state is valid, and returns an error if it isn't.h]hUChecks if the writeback connector state is valid, and returns an error if it isn’t.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMChjMubh)}(h **Return**h]j%)}(hjMh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMFhjMubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMGhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0drm_atomic_helper_check_plane_state (C function)%c.drm_atomic_helper_check_plane_statehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hint drm_atomic_helper_check_plane_state (struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h]j)}(hint drm_atomic_helper_check_plane_state(struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h](j)}(hinth]hint}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMiubj)}(h h]h }(hj,NhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhj+NhMiubj)}(h#drm_atomic_helper_check_plane_stateh]j)}(h#drm_atomic_helper_check_plane_stateh]h#drm_atomic_helper_check_plane_state}(hj>NhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:Nubah}(h]h ](jjeh"]h$]h&]jjuh1jhjNhhhj+NhMiubj)}(h(struct drm_plane_state *plane_state, const struct drm_crtc_state *crtc_state, int min_scale, int max_scale, bool can_position, bool can_update_disabled)h](j)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hjZNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVNubj)}(h h]h }(hjgNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVNubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjxNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuNubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjzNmodnameN classnameNjj)}j]j)}jj@Nsb%c.drm_atomic_helper_check_plane_stateasbuh1hhjVNubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVNubj+)}(hj9h]h*}(hjNhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjVNubj)}(h plane_stateh]h plane_state}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVNubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRNubj)}(h'const struct drm_crtc_state *crtc_stateh](j)}(hjUh]hconst}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(hjh]hstruct}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjOmodnameN classnameNjj)}j]jN%c.drm_atomic_helper_check_plane_stateasbuh1hhjNubj)}(h h]h }(hj#OhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj+)}(hj9h]h*}(hj1OhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjNubj)}(h crtc_stateh]h crtc_state}(hj>OhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRNubj)}(h int min_scaleh](j)}(hinth]hint}(hjWOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSOubj)}(h h]h }(hjeOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSOubj)}(h min_scaleh]h min_scale}(hjsOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRNubj)}(h int max_scaleh](j)}(hinth]hint}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h max_scaleh]h max_scale}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRNubj)}(hbool can_positionh](j)}(hjAh]hbool}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h can_positionh]h can_position}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRNubj)}(hbool can_update_disabledh](j)}(hjAh]hbool}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(hcan_update_disabledh]hcan_update_disabled}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRNubeh}(h]h ]h"]h$]h&]jjuh1jhjNhhhj+NhMiubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjNhhhj+NhMiubah}(h]jNah ](jjeh"]h$]h&]jj)jhuh1jhj+NhMihjNhhubj)}(hhh]h)}(hCheck plane state for validityh]hCheck plane state for validity}(hj:PhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMihj7Phhubah}(h]h ]h"]h$]h&]uh1jhjNhhhj+NhMiubeh}(h]h ](jfunctioneh"]h$]h&]jjjjRPjjRPjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_plane_state *plane_state`` plane state to check ``const struct drm_crtc_state *crtc_state`` CRTC state to check ``int min_scale`` minimum **src**:**dest** scaling factor in 16.16 fixed point ``int max_scale`` maximum **src**:**dest** scaling factor in 16.16 fixed point ``bool can_position`` is it legal to position the plane such that it doesn't cover the entire CRTC? This will generally only be false for primary planes. ``bool can_update_disabled`` can the plane be updated while the CRTC is disabled? **Description** Checks that a desired plane update is valid, and updates various bits of derived state (clipped coordinates etc.). Drivers that provide their own plane handling rather than helper-provided implementations may still wish to call this function to avoid duplication of error checking code. **Return** Zero if update appears valid, error code on failureh](h)}(h**Parameters**h]j%)}(hj\Ph]h Parameters}(hj^PhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjZPubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMmhjVPubji)}(hhh](jn)}(h=``struct drm_plane_state *plane_state`` plane state to check h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hj{Ph]h#struct drm_plane_state *plane_state}(hj}PhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyPubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMjhjuPubj)}(hhh]h)}(hplane state to checkh]hplane state to check}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMjhjPubah}(h]h ]h"]h$]h&]uh1jhjuPubeh}(h]h ]h"]h$]h&]uh1jmhjPhMjhjrPubjn)}(h@``const struct drm_crtc_state *crtc_state`` CRTC state to check h](jt)}(h+``const struct drm_crtc_state *crtc_state``h]jz)}(hjPh]h'const struct drm_crtc_state *crtc_state}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMkhjPubj)}(hhh]h)}(hCRTC state to checkh]hCRTC state to check}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMkhjPubah}(h]h ]h"]h$]h&]uh1jhjPubeh}(h]h ]h"]h$]h&]uh1jmhjPhMkhjrPubjn)}(hO``int min_scale`` minimum **src**:**dest** scaling factor in 16.16 fixed point h](jt)}(h``int min_scale``h]jz)}(hjPh]h int min_scale}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMlhjPubj)}(hhh]h)}(h` and :c:type:`drm_plane_helper_funcs.atomic_check ` hooks provided by the driver. It also sets :c:type:`drm_crtc_state.planes_changed ` to indicate that a CRTC has updated planes. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j%)}(hjUh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}Uubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjUh]hstruct drm_device *dev}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjUubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjUubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMhjUubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jmhjUhMhjUubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjUh]hstruct drm_atomic_state *state}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjUubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjUubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMhjUubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jmhjUhMhjUubeh}(h]h ]h"]h$]h&]uh1jhhj}Uubh)}(h**Description**h]j%)}(hjVh]h Description}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}Uubh)}(hXBCheck the state object to see if the requested state is physically possible. This does all the plane update related checks using by calling into the :c:type:`drm_crtc_helper_funcs.atomic_check ` and :c:type:`drm_plane_helper_funcs.atomic_check ` hooks provided by the driver.h](hCheck the state object to see if the requested state is physically possible. This does all the plane update related checks using by calling into the }(hj,VhhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_check `h]jz)}(hj6Vh]h"drm_crtc_helper_funcs.atomic_check}(hj8VhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4Vubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj,Vubh and }(hj,VhhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jz)}(hjZVh]h#drm_plane_helper_funcs.atomic_check}(hj\VhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXVubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjSVhMhj,Vubh hooks provided by the driver.}(hj,VhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSVhMhj}Uubh)}(hqIt also sets :c:type:`drm_crtc_state.planes_changed ` to indicate that a CRTC has updated planes.h](h It also sets }(hjVhhhNhNubh)}(h8:c:type:`drm_crtc_state.planes_changed `h]jz)}(hjVh]hdrm_crtc_state.planes_changed}(hjVhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjVubh, to indicate that a CRTC has updated planes.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVhMhj}Uubh)}(h **Return**h]j%)}(hjVh]hReturn}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}Uubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}Uubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_atomic_helper_check (C function)c.drm_atomic_helper_checkhNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hTint drm_atomic_helper_check (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(hSint drm_atomic_helper_check(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hinth]hint}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM1ubj)}(h h]h }(hj WhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVhhhjWhM1ubj)}(hdrm_atomic_helper_checkh]j)}(hdrm_atomic_helper_checkh]hdrm_atomic_helper_check}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ](jjeh"]h$]h&]jjuh1jhjVhhhjWhM1ubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj7WhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3Wubj)}(h h]h }(hjDWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3Wubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjUWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRWubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjWWmodnameN classnameNjj)}j]j)}jjWsbc.drm_atomic_helper_checkasbuh1hhj3Wubj)}(h h]h }(hjuWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3Wubj+)}(hj9h]h*}(hjWhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3Wubj)}(hdevh]hdev}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3Wubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/Wubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjWmodnameN classnameNjj)}j]jqWc.drm_atomic_helper_checkasbuh1hhjWubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj+)}(hj9h]h*}(hjWhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjWubj)}(hstateh]hstate}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/Wubeh}(h]h ]h"]h$]h&]jjuh1jhjVhhhjWhM1ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjVhhhjWhM1ubah}(h]jVah ](jjeh"]h$]h&]jj)jhuh1jhjWhM1hjVhhubj)}(hhh]h)}(hvalidate state objecth]hvalidate state object}(hj*XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM1hj'Xhhubah}(h]h ]h"]h$]h&]uh1jhjVhhhjWhM1ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjBXjjBXjjjuh1jhhhj<hNhNubj)}(hXE**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` the driver state object **Description** Check the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their :c:type:`drm_mode_config_funcs.atomic_check ` callback. This just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the **drm_plane_helper_funcs.atomic_check** and **drm_crtc_helper_funcs.atomic_check** functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks. Note that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change. IMPORTANT: As this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change. **Return** Zero for success or -errnoh](h)}(h**Parameters**h]j%)}(hjLXh]h Parameters}(hjNXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM5hjFXubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjkXh]hstruct drm_device *dev}(hjmXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiXubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM2hjeXubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhM2hjXubah}(h]h ]h"]h$]h&]uh1jhjeXubeh}(h]h ]h"]h$]h&]uh1jmhjXhM2hjbXubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjXh]hstruct drm_atomic_state *state}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM3hjXubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhM3hjXubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jmhjXhM3hjbXubeh}(h]h ]h"]h$]h&]uh1jhhjFXubh)}(h**Description**h]j%)}(hjXh]h Description}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM5hjFXubh)}(hXkCheck the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their :c:type:`drm_mode_config_funcs.atomic_check ` callback.h](hXCheck the state object to see if the requested state is physically possible. Only CRTCs and planes have check callbacks, so for any additional (global) checking that a driver needs it can simply wrap that around this function. Drivers without such needs can directly use this as their }(hjXhhhNhNubh)}(hD:c:type:`drm_mode_config_funcs.atomic_check `h]jz)}(hjXh]h"drm_mode_config_funcs.atomic_check}(hjYhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM4hjXubh callback.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhM4hjFXubh)}(hXThis just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the **drm_plane_helper_funcs.atomic_check** and **drm_crtc_helper_funcs.atomic_check** functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks.h](hThis just wraps the two parts of the state checking for planes and modeset state in the default order: First it calls drm_atomic_helper_check_modeset() and then drm_atomic_helper_check_planes(). The assumption is that the }(hj'YhhhNhNubj%)}(h'**drm_plane_helper_funcs.atomic_check**h]h#drm_plane_helper_funcs.atomic_check}(hj/YhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'Yubh and }(hj'YhhhNhNubj%)}(h&**drm_crtc_helper_funcs.atomic_check**h]h"drm_crtc_helper_funcs.atomic_check}(hjAYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'YubhZ functions depend upon an updated adjusted_mode.clock to e.g. properly compute watermarks.}(hj'YhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM:hjFXubh)}(hXNote that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change.h]hXNote that zpos normalization will add all enable planes to the state which might not desired for some drivers. For example enable/disable of a cursor plane which have fixed zpos value would trigger all other enabled planes to be forced to the state change.}(hjZYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMAhjFXubh)}(h IMPORTANT:h]h IMPORTANT:}(hjiYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMFhjFXubh)}(hXAs this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set :c:type:`drm_crtc_state.mode_changed ` (e.g. in their :c:type:`drm_plane_helper_funcs.atomic_check ` hooks if a plane update can't be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change.h](htAs this function calls drm_atomic_helper_check_modeset() internally, its restrictions also apply: Drivers which set }(hjxYhhhNhNubh)}(h6:c:type:`drm_crtc_state.mode_changed `h]jz)}(hjYh]hdrm_crtc_state.mode_changed}(hjYhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMHhjxYubh (e.g. in their }(hjxYhhhNhNubh)}(hF:c:type:`drm_plane_helper_funcs.atomic_check `h]jz)}(hjYh]h#drm_plane_helper_funcs.atomic_check}(hjYhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjYhMHhjxYubh hooks if a plane update can’t be done without a full modeset) _must_ call drm_atomic_helper_check_modeset() function again after that change.}(hjxYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMHhjFXubh)}(h **Return**h]j%)}(hjYh]hReturn}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMOhjFXubh)}(hZero for success or -errnoh]hZero for success or -errno}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMPhjFXubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:\hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjM\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:\hhhjL\hMubj)}(h%drm_atomic_helper_commit_crtc_disableh]j)}(h%drm_atomic_helper_commit_crtc_disableh]h%drm_atomic_helper_commit_crtc_disable}(hj_\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[\ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj:\hhhjL\hMubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj{\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw\ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw\ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\modnameN classnameNjj)}j]j)}jja\sb'c.drm_atomic_helper_commit_crtc_disableasbuh1hhjw\ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw\ubj+)}(hj9h]h*}(hj\hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjw\ubj)}(hdevh]hdev}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjs\ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj ]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj ]modnameN classnameNjj)}j]j\'c.drm_atomic_helper_commit_crtc_disableasbuh1hhj\ubj)}(h h]h }(hj)]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj+)}(hj9h]h*}(hj7]hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj\ubj)}(hstateh]hstate}(hjD]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjs\ubeh}(h]h ]h"]h$]h&]jjuh1jhj:\hhhjL\hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj6\hhhjL\hMubah}(h]j1\ah ](jjeh"]h$]h&]jj)jhuh1jhjL\hMhj3\hhubj)}(hhh]h)}(h disable CRTSsh]h disable CRTSs}(hjn]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjk]hhubah}(h]h ]h"]h$]h&]uh1jhj3\hhhjL\hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj]jj]jjjuh1jhhhj<hNhNubj)}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` the driver state object **Description** Loops over all CRTCs in the current state and if the CRTC needs it, disables it.h](h)}(h**Parameters**h]j%)}(hj]h]h Parameters}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj]h]hstruct drm_device *dev}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj]ubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj]hMhj]ubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj]h]hstruct drm_atomic_state *state}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj]ubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj]hMhj]ubeh}(h]h ]h"]h$]h&]uh1jhhj]ubh)}(h**Description**h]j%)}(hj#^h]h Description}(hj%^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!^ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubh)}(hPLoops over all CRTCs in the current state and if the CRTC needs it, disables it.h]hPLoops over all CRTCs in the current state and if the CRTC needs it, disables it.}(hj9^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jAdrm_atomic_helper_commit_encoder_bridge_post_disable (C function)6c.drm_atomic_helper_commit_encoder_bridge_post_disablehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hrvoid drm_atomic_helper_commit_encoder_bridge_post_disable (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(hqvoid drm_atomic_helper_commit_encoder_bridge_post_disable(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjh^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjd^hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjw^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjd^hhhjv^hMubj)}(h4drm_atomic_helper_commit_encoder_bridge_post_disableh]j)}(h4drm_atomic_helper_commit_encoder_bridge_post_disableh]h4drm_atomic_helper_commit_encoder_bridge_post_disable}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjd^hhhjv^hMubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj^modnameN classnameNjj)}j]j)}jj^sb6c.drm_atomic_helper_commit_encoder_bridge_post_disableasbuh1hhj^ubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj+)}(hj9h]h*}(hj^hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj^ubj)}(hdevh]hdev}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj^ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(h h]h }(hj$_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj5_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2_ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7_modnameN classnameNjj)}j]j^6c.drm_atomic_helper_commit_encoder_bridge_post_disableasbuh1hhj_ubj)}(h h]h }(hjS_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj+)}(hj9h]h*}(hja_hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj_ubj)}(hstateh]hstate}(hjn_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj^ubeh}(h]h ]h"]h$]h&]jjuh1jhjd^hhhjv^hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj`^hhhjv^hMubah}(h]j[^ah ](jjeh"]h$]h&]jj)jhuh1jhjv^hMhj]^hhubj)}(hhh]h)}(hpost-disable encoder bridgesh]hpost-disable encoder bridges}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj_hhubah}(h]h ]h"]h$]h&]uh1jhj]^hhhjv^hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj_jj_jjjuh1jhhhj<hNhNubj)}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` the driver state object **Description** Loops over all connectors in the current state and if the CRTC needs it, post-disables all encoder bridges.h](h)}(h**Parameters**h]j%)}(hj_h]h Parameters}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj_ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj_h]hstruct drm_device *dev}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj_ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj_ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj_hMhj_ubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj`h]hstruct drm_atomic_state *state}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj `ubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj+`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'`hMhj(`ubah}(h]h ]h"]h$]h&]uh1jhj `ubeh}(h]h ]h"]h$]h&]uh1jmhj'`hMhj_ubeh}(h]h ]h"]h$]h&]uh1jhhj_ubh)}(h**Description**h]j%)}(hjM`h]h Description}(hjO`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjK`ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj_ubh)}(hkLoops over all connectors in the current state and if the CRTC needs it, post-disables all encoder bridges.h]hkLoops over all connectors in the current state and if the CRTC needs it, post-disables all encoder bridges.}(hjc`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j:drm_atomic_helper_update_legacy_modeset_state (C function)/c.drm_atomic_helper_update_legacy_modeset_statehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hkvoid drm_atomic_helper_update_legacy_modeset_state (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(hjvoid drm_atomic_helper_update_legacy_modeset_state(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMdubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`hhhj`hMdubj)}(h-drm_atomic_helper_update_legacy_modeset_stateh]j)}(h-drm_atomic_helper_update_legacy_modeset_stateh]h-drm_atomic_helper_update_legacy_modeset_state}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj`hhhj`hMdubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj`modnameN classnameNjj)}j]j)}jj`sb/c.drm_atomic_helper_update_legacy_modeset_stateasbuh1hhj`ubj)}(h h]h }(hj ahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj+)}(hj9h]h*}(hjahhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj`ubj)}(hdevh]hdev}(hj(ahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjAahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=aubj)}(h h]h }(hjNahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=aubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj_ahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\aubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjaamodnameN classnameNjj)}j]j a/c.drm_atomic_helper_update_legacy_modeset_stateasbuh1hhj=aubj)}(h h]h }(hj}ahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=aubj+)}(hj9h]h*}(hjahhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=aubj)}(hstateh]hstate}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=aubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubeh}(h]h ]h"]h$]h&]jjuh1jhj`hhhj`hMdubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj`hhhj`hMdubah}(h]j`ah ](jjeh"]h$]h&]jj)jhuh1jhj`hMdhj`hhubj)}(hhh]h)}(hupdate legacy modeset stateh]hupdate legacy modeset state}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMdhjahhubah}(h]h ]h"]h$]h&]uh1jhj`hhhj`hMdubeh}(h]h ](jfunctioneh"]h$]h&]jjjjajjajjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object being committed **Description** This function updates all the various legacy modeset state pointers in connectors, encoders and CRTCs. Drivers can use this for building their own atomic commit if they don't have a pure helper-based modeset implementation. Since these updates are not synchronized with lockings, only code paths called from :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.h](h)}(h**Parameters**h]j%)}(hjah]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjaubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhhjaubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjbh]hstruct drm_device *dev}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMehjaubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMehjbubah}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jmhjbhMehjaubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:bubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMfhj6bubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjUbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQbhMfhjRbubah}(h]h ]h"]h$]h&]uh1jhj6bubeh}(h]h ]h"]h$]h&]uh1jmhjQbhMfhjaubeh}(h]h ]h"]h$]h&]uh1jhhjaubh)}(h**Description**h]j%)}(hjwbh]h Description}(hjybhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjububah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhhjaubh)}(hfThis function updates all the various legacy modeset state pointers in connectors, encoders and CRTCs.h]hfThis function updates all the various legacy modeset state pointers in connectors, encoders and CRTCs.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMghjaubh)}(hxDrivers can use this for building their own atomic commit if they don't have a pure helper-based modeset implementation.h]hzDrivers can use this for building their own atomic commit if they don’t have a pure helper-based modeset implementation.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMjhjaubh)}(hXrSince these updates are not synchronized with lockings, only code paths called from :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.h](hTSince these updates are not synchronized with lockings, only code paths called from }(hjbhhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]jz)}(hjbh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjbhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMmhjbubh can look at the legacy state filled out by this helper. Defacto this means this helper and the legacy state pointers are only really useful for transitioning an existing driver to the atomic world.}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjbhMmhjaubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j:drm_atomic_helper_calc_timestamping_constants (C function)/c.drm_atomic_helper_calc_timestamping_constantshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hSvoid drm_atomic_helper_calc_timestamping_constants (struct drm_atomic_state *state)h]j)}(hRvoid drm_atomic_helper_calc_timestamping_constants(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hj chhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhj chMubj)}(h-drm_atomic_helper_calc_timestamping_constantsh]j)}(h-drm_atomic_helper_calc_timestamping_constantsh]h-drm_atomic_helper_calc_timestamping_constants}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubah}(h]h ](jjeh"]h$]h&]jjuh1jhjbhhhj chMubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj:chhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6cubj)}(h h]h }(hjGchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6cubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjXchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUcubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZcmodnameN classnameNjj)}j]j)}jj csb/c.drm_atomic_helper_calc_timestamping_constantsasbuh1hhj6cubj)}(h h]h }(hjxchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6cubj+)}(hj9h]h*}(hjchhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6cubj)}(hstateh]hstate}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6cubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2cubah}(h]h ]h"]h$]h&]jjuh1jhjbhhhj chMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjbhhhj chMubah}(h]jbah ](jjeh"]h$]h&]jj)jhuh1jhj chMhjbhhubj)}(hhh]h)}(h$update vblank timestamping constantsh]h$update vblank timestamping constants}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjchhubah}(h]h ]h"]h$]h&]uh1jhjbhhhj chMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjcjjcjjjuh1jhhhj<hNhNubj)}(h**Parameters** ``struct drm_atomic_state *state`` atomic state object **Description** Updates the timestamping constants used for precise vblank timestamps by calling drm_calc_timestamping_constants() for all enabled crtcs in **state**.h](h)}(h**Parameters**h]j%)}(hjch]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjcubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjcubji)}(hhh]jn)}(h7``struct drm_atomic_state *state`` atomic state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjch]hstruct drm_atomic_state *state}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjcubj)}(hhh]h)}(hatomic state objecth]hatomic state object}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjdubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhjdhMhjcubah}(h]h ]h"]h$]h&]uh1jhhjcubh)}(h**Description**h]j%)}(hj9dh]h Description}(hj;dhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7dubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjcubh)}(hUpdates the timestamping constants used for precise vblank timestamps by calling drm_calc_timestamping_constants() for all enabled crtcs in **state**.h](hUpdates the timestamping constants used for precise vblank timestamps by calling drm_calc_timestamping_constants() for all enabled crtcs in }(hjOdhhhNhNubj%)}(h **state**h]hstate}(hjWdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjOdubh.}(hjOdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjcubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_atomic_helper_commit_crtc_set_mode (C function)(c.drm_atomic_helper_commit_crtc_set_modehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hdvoid drm_atomic_helper_commit_crtc_set_mode (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(hcvoid drm_atomic_helper_commit_crtc_set_mode(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdhhhjdhMubj)}(h&drm_atomic_helper_commit_crtc_set_modeh]j)}(h&drm_atomic_helper_commit_crtc_set_modeh]h&drm_atomic_helper_commit_crtc_set_mode}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ](jjeh"]h$]h&]jjuh1jhjdhhhjdhMubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjdmodnameN classnameNjj)}j]j)}jjdsb(c.drm_atomic_helper_commit_crtc_set_modeasbuh1hhjdubj)}(h h]h }(hj ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj+)}(hj9h]h*}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjdubj)}(hdevh]hdev}(hj&ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj?ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;eubj)}(h h]h }(hjLehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;eubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj]ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_emodnameN classnameNjj)}j]je(c.drm_atomic_helper_commit_crtc_set_modeasbuh1hhj;eubj)}(h h]h }(hj{ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;eubj+)}(hj9h]h*}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;eubj)}(hstateh]hstate}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;eubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubeh}(h]h ]h"]h$]h&]jjuh1jhjdhhhjdhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjdhhhjdhMubah}(h]jdah ](jjeh"]h$]h&]jj)jhuh1jhjdhMhjdhhubj)}(hhh]h)}(hset the new modeh]hset the new mode}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjehhubah}(h]h ]h"]h$]h&]uh1jhjdhhhjdhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjejjejjjuh1jhhhj<hNhNubj)}(hX<**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` the driver state object **Description** Loops over all connectors in the current state and if the mode has changed, change the mode of the CRTC, then call down the bridge chain and change the mode in all bridges as well.h](h)}(h**Parameters**h]j%)}(hjeh]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjeubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjfh]hstruct drm_device *dev}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjeubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjeubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjfubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjfhMhjeubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj:fh]hstruct drm_atomic_state *state}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:kubah}(h]h ](jjeh"]h$]h&]jjuh1jhjkhhhj+khMJubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjZkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVkubj)}(h h]h }(hjgkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVkubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjxkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjukubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjzkmodnameN classnameNjj)}j]j)}jj@ksb4c.drm_atomic_helper_commit_encoder_bridge_pre_enableasbuh1hhjVkubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVkubj+)}(hj9h]h*}(hjkhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjVkubj)}(hdevh]hdev}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRkubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjkmodnameN classnameNjj)}j]jk4c.drm_atomic_helper_commit_encoder_bridge_pre_enableasbuh1hhjkubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj+)}(hj9h]h*}(hjlhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjkubj)}(hstateh]hstate}(hj#lhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRkubeh}(h]h ]h"]h$]h&]jjuh1jhjkhhhj+khMJubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjkhhhj+khMJubah}(h]jkah ](jjeh"]h$]h&]jj)jhuh1jhj+khMJhjkhhubj)}(hhh]h)}(hpre-enable bridgesh]hpre-enable bridges}(hjMlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMJhjJlhhubah}(h]h ]h"]h$]h&]uh1jhjkhhhj+khMJubeh}(h]h ](jfunctioneh"]h$]h&]jjjjeljjeljjjuh1jhhhj<hNhNubj)}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object being committed **Description** This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.h](h)}(h**Parameters**h]j%)}(hjolh]h Parameters}(hjqlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmlubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMNhjilubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjlh]hstruct drm_device *dev}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMKhjlubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMKhjlubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhjlhMKhjlubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjlh]hstruct drm_atomic_state *state}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMLhjlubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhMLhjlubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhjlhMLhjlubeh}(h]h ]h"]h$]h&]uh1jhhjilubh)}(h**Description**h]j%)}(hjmh]h Description}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMNhjilubh)}(h]This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.h]h]This loops over the connectors and if the CRTC needs it, pre-enables the entire bridge chain.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMMhjilubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_atomic_helper_commit_crtc_enable (C function)&c.drm_atomic_helper_commit_crtc_enablehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hbvoid drm_atomic_helper_commit_crtc_enable (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(havoid drm_atomic_helper_commit_crtc_enable(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjGmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCmhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMtubj)}(h h]h }(hjVmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCmhhhjUmhMtubj)}(h$drm_atomic_helper_commit_crtc_enableh]j)}(h$drm_atomic_helper_commit_crtc_enableh]h$drm_atomic_helper_commit_crtc_enable}(hjhmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdmubah}(h]h ](jjeh"]h$]h&]jjuh1jhjCmhhhjUmhMtubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmmodnameN classnameNjj)}j]j)}jjjmsb&c.drm_atomic_helper_commit_crtc_enableasbuh1hhjmubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hjmhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(hdevh]hdev}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|mubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjnmodnameN classnameNjj)}j]jm&c.drm_atomic_helper_commit_crtc_enableasbuh1hhjmubj)}(h h]h }(hj2nhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hj@nhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(hstateh]hstate}(hjMnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|mubeh}(h]h ]h"]h$]h&]jjuh1jhjCmhhhjUmhMtubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj?mhhhjUmhMtubah}(h]j:mah ](jjeh"]h$]h&]jj)jhuh1jhjUmhMthjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;pubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@pmodnameN classnameNjj)}j]jo0c.drm_atomic_helper_commit_encoder_bridge_enableasbuh1hhjpubj)}(h h]h }(hj\phhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj+)}(hj9h]h*}(hjjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjpubj)}(hstateh]hstate}(hjwphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjoubeh}(h]h ]h"]h$]h&]jjuh1jhjmohhhjohMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjiohhhjohMubah}(h]jdoah ](jjeh"]h$]h&]jj)jhuh1jhjohMhjfohhubj)}(hhh]h)}(henables the bridgesh]henables the bridges}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjphhubah}(h]h ]h"]h$]h&]uh1jhjfohhhjohMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjpjjpjjjuh1jhhhj<hNhNubj)}(h**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object being committed **Description** This loops over all connectors in the new state, and of the CRTC needs it, enables the entire bridge chain.h](h)}(h**Parameters**h]j%)}(hjph]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjph]hstruct drm_device *dev}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhjphMhjpubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjqh]hstruct drm_atomic_state *state}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjqubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj4qhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0qhMhj1qubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhj0qhMhjpubeh}(h]h ]h"]h$]h&]uh1jhhjpubh)}(h**Description**h]j%)}(hjVqh]h Description}(hjXqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTqubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubh)}(hkThis loops over all connectors in the new state, and of the CRTC needs it, enables the entire bridge chain.h]hkThis loops over all connectors in the new state, and of the CRTC needs it, enables the entire bridge chain.}(hjlqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5drm_atomic_helper_commit_modeset_enables (C function)*c.drm_atomic_helper_commit_modeset_enableshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hfvoid drm_atomic_helper_commit_modeset_enables (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(hevoid drm_atomic_helper_commit_modeset_enables(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqhhhjqhMubj)}(h(drm_atomic_helper_commit_modeset_enablesh]j)}(h(drm_atomic_helper_commit_modeset_enablesh]h(drm_atomic_helper_commit_modeset_enables}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ](jjeh"]h$]h&]jjuh1jhjqhhhjqhMubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjqmodnameN classnameNjj)}j]j)}jjqsb*c.drm_atomic_helper_commit_modeset_enablesasbuh1hhjqubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj+)}(hj9h]h*}(hj$rhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjqubj)}(hdevh]hdev}(hj1rhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjJrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFrubj)}(h h]h }(hjWrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFrubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjerubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjjrmodnameN classnameNjj)}j]jr*c.drm_atomic_helper_commit_modeset_enablesasbuh1hhjFrubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFrubj+)}(hj9h]h*}(hjrhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjFrubj)}(hstateh]hstate}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFrubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubeh}(h]h ]h"]h$]h&]jjuh1jhjqhhhjqhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjqhhhjqhMubah}(h]jqah ](jjeh"]h$]h&]jj)jhuh1jhjqhMhjqhhubj)}(hhh]h)}(h modeset commit to enable outputsh]h modeset commit to enable outputs}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjrhhubah}(h]h ]h"]h$]h&]uh1jhjqhhhjqhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjrjjrjjjuh1jhhhj<hNhNubj)}(hX|**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object being committed **Description** This function enables all the outputs with the new configuration which had to be turned off for the update. For compatibility with legacy CRTC helpers this should be called after drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h](h)}(h**Parameters**h]j%)}(hjrh]h Parameters}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjrubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj sh]hstruct drm_device *dev}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj subah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjsubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj%shhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!shMhj"subah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhj!shMhjsubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjEsh]hstruct drm_atomic_state *state}(hjGshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCsubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj?subj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj^shhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZshMhj[subah}(h]h ]h"]h$]h&]uh1jhj?subeh}(h]h ]h"]h$]h&]uh1jmhjZshMhjsubeh}(h]h ]h"]h$]h&]uh1jhhjrubh)}(h**Description**h]j%)}(hjsh]h Description}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~subah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjrubh)}(hkThis function enables all the outputs with the new configuration which had to be turned off for the update.h]hkThis function enables all the outputs with the new configuration which had to be turned off for the update.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjrubh)}(hX{For compatibility with legacy CRTC helpers this should be called after drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.h]hX{For compatibility with legacy CRTC helpers this should be called after drm_atomic_helper_commit_planes(), which is what the default commit function does. But drivers with different needs can group the modeset commits together and do the plane commits at the end. This is useful for drivers doing runtime PM since planes updates then only happen when the CRTC is actually enabled.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjrubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_atomic_helper_wait_for_fences (C function)#c.drm_atomic_helper_wait_for_fenceshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hmint drm_atomic_helper_wait_for_fences (struct drm_device *dev, struct drm_atomic_state *state, bool pre_swap)h]j)}(hlint drm_atomic_helper_wait_for_fences(struct drm_device *dev, struct drm_atomic_state *state, bool pre_swap)h](j)}(hinth]hint}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhjshMubj)}(h!drm_atomic_helper_wait_for_fencesh]j)}(h!drm_atomic_helper_wait_for_fencesh]h!drm_atomic_helper_wait_for_fences}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ](jjeh"]h$]h&]jjuh1jhjshhhjshMubj)}(hG(struct drm_device *dev, struct drm_atomic_state *state, bool pre_swap)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj tubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj tubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj/thhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,tubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj1tmodnameN classnameNjj)}j]j)}jjssb#c.drm_atomic_helper_wait_for_fencesasbuh1hhj tubj)}(h h]h }(hjOthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj tubj+)}(hj9h]h*}(hj]thhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj tubj)}(hdevh]hdev}(hjjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj tubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj tubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjtmodnameN classnameNjj)}j]jKt#c.drm_atomic_helper_wait_for_fencesasbuh1hhjtubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj+)}(hj9h]h*}(hjthhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjtubj)}(hstateh]hstate}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj tubj)}(h bool pre_swaph](j)}(hjAh]hbool}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(hpre_swaph]hpre_swap}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj tubeh}(h]h ]h"]h$]h&]jjuh1jhjshhhjshMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjshhhjshMubah}(h]jsah ](jjeh"]h$]h&]jj)jhuh1jhjshMhjshhubj)}(hhh]h)}(h&wait for fences stashed in plane stateh]h&wait for fences stashed in plane state}(hj8uhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj5uhhubah}(h]h ]h"]h$]h&]uh1jhjshhhjshMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjPujjPujjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object with old state structures ``bool pre_swap`` If true, do an interruptible wait, and **state** is the new state. Otherwise **state** is the old state. **Description** For implicit sync, driver should fish the exclusive fence out from the incoming fb's and stash it in the drm_plane_state. This is called after drm_atomic_helper_swap_state() so it uses the current plane state (and just uses the atomic state to find the changed planes) Note that **pre_swap** is needed since the point where we block for fences moves around depending upon whether an atomic commit is blocking or non-blocking. For non-blocking commit all waiting needs to happen after drm_atomic_helper_swap_state() is called, but for blocking commits we want to wait **before** we do anything that can't be easily rolled back. That is before we call drm_atomic_helper_swap_state(). Returns zero if success or < 0 if dma_fence_wait() fails.h](h)}(h**Parameters**h]j%)}(hjZuh]h Parameters}(hj\uhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXuubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjTuubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjyuh]hstruct drm_device *dev}(hj{uhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwuubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjsuubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjuubah}(h]h ]h"]h$]h&]uh1jhjsuubeh}(h]h ]h"]h$]h&]uh1jmhjuhMhjpuubjn)}(hQ``struct drm_atomic_state *state`` atomic state object with old state structures h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjuh]hstruct drm_atomic_state *state}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjuubj)}(hhh]h)}(h-atomic state object with old state structuresh]h-atomic state object with old state structures}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMhjuubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jmhjuhMhjpuubjn)}(h{``bool pre_swap`` If true, do an interruptible wait, and **state** is the new state. Otherwise **state** is the old state. h](jt)}(h``bool pre_swap``h]jz)}(hjuh]h bool pre_swap}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjuubj)}(hhh]h)}(hhIf true, do an interruptible wait, and **state** is the new state. Otherwise **state** is the old state.h](h'If true, do an interruptible wait, and }(hjvhhhNhNubj%)}(h **state**h]hstate}(hj vhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjvubh is the new state. Otherwise }(hjvhhhNhNubj%)}(h **state**h]hstate}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjvubh is the old state.}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjvubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jmhjvhMhjpuubeh}(h]h ]h"]h$]h&]uh1jhhjTuubh)}(h**Description**h]j%)}(hjKvh]h Description}(hjMvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIvubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjTuubh)}(hX For implicit sync, driver should fish the exclusive fence out from the incoming fb's and stash it in the drm_plane_state. This is called after drm_atomic_helper_swap_state() so it uses the current plane state (and just uses the atomic state to find the changed planes)h]hXFor implicit sync, driver should fish the exclusive fence out from the incoming fb’s and stash it in the drm_plane_state. This is called after drm_atomic_helper_swap_state() so it uses the current plane state (and just uses the atomic state to find the changed planes)}(hjavhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjTuubh)}(hXNote that **pre_swap** is needed since the point where we block for fences moves around depending upon whether an atomic commit is blocking or non-blocking. For non-blocking commit all waiting needs to happen after drm_atomic_helper_swap_state() is called, but for blocking commits we want to wait **before** we do anything that can't be easily rolled back. That is before we call drm_atomic_helper_swap_state().h](h Note that }(hjpvhhhNhNubj%)}(h **pre_swap**h]hpre_swap}(hjxvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpvubhX is needed since the point where we block for fences moves around depending upon whether an atomic commit is blocking or non-blocking. For non-blocking commit all waiting needs to happen after drm_atomic_helper_swap_state() is called, but for blocking commits we want to wait }(hjpvhhhNhNubj%)}(h **before**h]hbefore}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpvubhj we do anything that can’t be easily rolled back. That is before we call drm_atomic_helper_swap_state().}(hjpvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjTuubh)}(h9Returns zero if success or < 0 if dma_fence_wait() fails.h]h9Returns zero if success or < 0 if dma_fence_wait() fails.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM'hjTuubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_atomic_helper_wait_for_vblanks (C function)$c.drm_atomic_helper_wait_for_vblankshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h`void drm_atomic_helper_wait_for_vblanks (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(h_void drm_atomic_helper_wait_for_vblanks(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMLubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvhhhjvhMLubj)}(h"drm_atomic_helper_wait_for_vblanksh]j)}(h"drm_atomic_helper_wait_for_vblanksh]h"drm_atomic_helper_wait_for_vblanks}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ](jjeh"]h$]h&]jjuh1jhjvhhhjvhMLubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj wubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj wubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj-whhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*wubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/wmodnameN classnameNjj)}j]j)}jjvsb$c.drm_atomic_helper_wait_for_vblanksasbuh1hhj wubj)}(h h]h }(hjMwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj wubj+)}(hj9h]h*}(hj[whhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj wubj)}(hdevh]hdev}(hjhwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj wubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjwubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}wubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}wubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]jIw$c.drm_atomic_helper_wait_for_vblanksasbuh1hhj}wubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}wubj+)}(hj9h]h*}(hjwhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj}wubj)}(hstateh]hstate}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}wubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjwubeh}(h]h ]h"]h$]h&]jjuh1jhjvhhhjvhMLubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjvhhhjvhMLubah}(h]jvah ](jjeh"]h$]h&]jj)jhuh1jhjvhMLhjvhhubj)}(hhh]h)}(hwait for vblank on CRTCsh]hwait for vblank on CRTCs}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMLhjwhhubah}(h]h ]h"]h$]h&]uh1jhjvhhhjvhMLubeh}(h]h ](jfunctioneh"]h$]h&]jjjjxjjxjjjuh1jhhhj<hNhNubj)}(hXk**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object being committed **Description** Helper to, after atomic commit, wait for vblanks on all affected CRTCs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). It will only wait on CRTCs where the framebuffers have actually changed to optimize for the legacy cursor and plane update use-case. Drivers using the nonblocking commit tracking support initialized by calling drm_atomic_helper_setup_commit() should look at drm_atomic_helper_wait_for_flip_done() as an alternative.h](h)}(h**Parameters**h]j%)}(hj$xh]h Parameters}(hj&xhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"xubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMPhjxubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjCxh]hstruct drm_device *dev}(hjExhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAxubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMMhj=xubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj\xhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXxhMMhjYxubah}(h]h ]h"]h$]h&]uh1jhj=xubeh}(h]h ]h"]h$]h&]uh1jmhjXxhMMhj:xubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj|xh]hstruct drm_atomic_state *state}(hj~xhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzxubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMNhjvxubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMNhjxubah}(h]h ]h"]h$]h&]uh1jhjvxubeh}(h]h ]h"]h$]h&]uh1jmhjxhMNhj:xubeh}(h]h ]h"]h$]h&]uh1jhhjxubh)}(h**Description**h]j%)}(hjxh]h Description}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMPhjxubh)}(hXHelper to, after atomic commit, wait for vblanks on all affected CRTCs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). It will only wait on CRTCs where the framebuffers have actually changed to optimize for the legacy cursor and plane update use-case.h]hXHelper to, after atomic commit, wait for vblanks on all affected CRTCs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). 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Compared to drm_atomic_helper_wait_for_vblanks() this waits for the completion on all CRTCs, assuming that cursors-only updates are signalling their completion immediately (or using a different path). This requires that drivers use the nonblocking commit tracking support initialized using drm_atomic_helper_setup_commit().h](h)}(h**Parameters**h]j%)}(hj]zh]h Parameters}(hj_zhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[zubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjWzubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj|zh]hstruct drm_device *dev}(hj~zhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzzubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjvzubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1jhjvzubeh}(h]h ]h"]h$]h&]uh1jmhjzhMhjszubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjzh]hstruct drm_atomic_state *state}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjzubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhjzhMhjszubeh}(h]h ]h"]h$]h&]uh1jhhjWzubh)}(h**Description**h]j%)}(hjzh]h Description}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjWzubh)}(hXfHelper to, after atomic commit, wait for page flips on all affected crtcs (ie. before cleaning up old framebuffers using drm_atomic_helper_cleanup_planes()). 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Note that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.h](h)}(h**Parameters**h]j%)}(hj&|h]h Parameters}(hj(|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$|ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj |ubji)}(hhh]jn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjE|h]hstruct drm_atomic_state *state}(hjG|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjC|ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj?|ubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj^|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZ|hMhj[|ubah}(h]h ]h"]h$]h&]uh1jhj?|ubeh}(h]h ]h"]h$]h&]uh1jmhjZ|hMhj<|ubah}(h]h ]h"]h$]h&]uh1jhhj |ubh)}(h**Description**h]j%)}(hj|h]h Description}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~|ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj |ubh)}(hX#This is the default implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that do not support runtime_pm or do not need the CRTC to be enabled to perform a commit. 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Otherwise, see drm_atomic_helper_commit_tail_rpm().}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj|hMhj |ubh)}(hzNote that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.h]hzNote that the default ordering of how the various stages are called is to match the legacy modeset helper library closest.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj |ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_atomic_helper_commit_tail_rpm (C function)#c.drm_atomic_helper_commit_tail_rpmhNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hGvoid drm_atomic_helper_commit_tail_rpm (struct drm_atomic_state *state)h]j)}(hFvoid drm_atomic_helper_commit_tail_rpm(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhj}hMubj)}(h!drm_atomic_helper_commit_tail_rpmh]j)}(h!drm_atomic_helper_commit_tail_rpmh]h!drm_atomic_helper_commit_tail_rpm}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj|hhhj}hMubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj4}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0}ubj)}(h h]h }(hjA}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0}ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjR}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO}ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjT}modnameN classnameNjj)}j]j)}jj}sb#c.drm_atomic_helper_commit_tail_rpmasbuh1hhj0}ubj)}(h h]h }(hjr}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0}ubj+)}(hj9h]h*}(hj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj0}ubj)}(hstateh]hstate}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0}ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,}ubah}(h]h ]h"]h$]h&]jjuh1jhj|hhhj}hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj|hhhj}hMubah}(h]j|ah ](jjeh"]h$]h&]jj)jhuh1jhj}hMhj|hhubj)}(hhh]h)}(h commit atomic update to hardwareh]h commit atomic update to hardware}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}hhubah}(h]h ]h"]h$]h&]uh1jhj|hhhj}hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj}jj}jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` new modeset state to be committed **Description** This is an alternative implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().h](h)}(h**Parameters**h]j%)}(hj}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}ubji)}(hhh]jn)}(hE``struct drm_atomic_state *state`` new modeset state to be committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj}h]hstruct drm_atomic_state *state}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}ubj)}(hhh]h)}(h!new modeset state to be committedh]h!new modeset state to be committed}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ~hMhj~ubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhj ~hMhj}ubah}(h]h ]h"]h$]h&]uh1jhhj}ubh)}(h**Description**h]j%)}(hj3~h]h Description}(hj5~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1~ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj}ubh)}(hX:This is an alternative implementation for the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().h](h.This is an alternative implementation for the }(hjI~hhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]jz)}(hjS~h]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjU~hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQ~ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjI~ubh hook, for drivers that support runtime_pm or need the CRTC to be enabled to perform a commit. Otherwise, one should use the default implementation drm_atomic_helper_commit_tail().}(hjI~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjp~hMhj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_atomic_helper_async_check (C function)c.drm_atomic_helper_async_checkhNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hZint drm_atomic_helper_async_check (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(hYint drm_atomic_helper_async_check(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM0ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhj~hM0ubj)}(hdrm_atomic_helper_async_checkh]j)}(hdrm_atomic_helper_async_checkh]hdrm_atomic_helper_async_check}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj~hhhj~hM0ubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]j)}jj~sbc.drm_atomic_helper_async_checkasbuh1hhj~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj+)}(hj9h]h*}(hj$hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~ubj)}(hdevh]hdev}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjjmodnameN classnameNjj)}j]jc.drm_atomic_helper_async_checkasbuh1hhjFubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjFubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubeh}(h]h ]h"]h$]h&]jjuh1jhj~hhhj~hM0ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj~hhhj~hM0ubah}(h]j~ah ](jjeh"]h$]h&]jj)jhuh1jhj~hM0hj~hhubj)}(hhh]h)}(h.check if state can be committed asynchronouslyh]h.check if state can be committed asynchronously}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM0hjhhubah}(h]h ]h"]h$]h&]uh1jhj~hhhj~hM0ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX4**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` the driver state object **Description** This helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state. It will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can't be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM4hjubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj h]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM1hjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hM1hj"ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj!hM1hjubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjEh]hstruct drm_atomic_state *state}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM2hj?ubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhM2hj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhjZhM2hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM4hjubh)}(hThis helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state.h]hThis helper will check if it is possible to commit the state asynchronously. Async commits are not supposed to swap the states like normal sync commits but just do in-place changes on the current state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM3hjubh)}(hIt will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can't be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.h]hIt will return 0 if the commit can happen in an asynchronous fashion or error if not. Note that error just mean it can’t be committed asynchronously, if it fails the commit should be treated like a normal synchronous commit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM7hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_atomic_helper_async_commit (C function) c.drm_atomic_helper_async_commithNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h\void drm_atomic_helper_async_commit (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(h[void drm_atomic_helper_async_commit(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjԀhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjЀhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjЀhhhjhMubj)}(hdrm_atomic_helper_async_commith]j)}(hdrm_atomic_helper_async_commith]hdrm_atomic_helper_async_commit}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjЀhhhjhMubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj1modnameN classnameNjj)}j]j)}jjsb c.drm_atomic_helper_async_commitasbuh1hhj ubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj]hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hdevh]hdev}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jK c.drm_atomic_helper_async_commitasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj́hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjځhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubeh}(h]h ]h"]h$]h&]jjuh1jhjЀhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj̀hhhjhMubah}(h]jǀah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjɀhhubj)}(hhh]h)}(hcommit state asynchronouslyh]hcommit state asynchronously}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjɀhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` the driver state object **Description** This function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state. TODO: Implement full swap instead of doing in-place changes.h](h)}(h**Parameters**h]j%)}(hj&h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjEh]hstruct drm_device *dev}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj?ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhjZhMhj<ubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj~h]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjxubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj<ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj ubh)}(hXThis function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state.h]hXThis function commits a state asynchronously, i.e., not vblank synchronized. It should be used on a state only when drm_atomic_async_check() succeeds. Async commits are not supposed to swap the states like normal sync commits, but just do in-place changes on the current state.}(hjςhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj ubh)}(h` callback, or its default implementation drm_atomic_helper_commit_tail(). **Return** Zero for success or -errno.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj˄hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDŽhMhjȄubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjDŽhMhjubjn)}(h;``struct drm_atomic_state *state`` the driver state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(hthe driver state objecth]hthe driver state object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h=``bool nonblock`` whether nonblocking behavior is requested. h](jt)}(h``bool nonblock``h]jz)}(hj$h]h bool nonblock}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(h*whether nonblocking behavior is requested.h]h*whether nonblocking behavior is requested.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj9hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hThis function commits a with drm_atomic_helper_check() pre-validated state object. This can still fail when e.g. the framebuffer reservation fails. This function implements nonblocking commits, using drm_atomic_helper_setup_commit() and related functions.h]hThis function commits a with drm_atomic_helper_check() pre-validated state object. This can still fail when e.g. the framebuffer reservation fails. This function implements nonblocking commits, using drm_atomic_helper_setup_commit() and related functions.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hCommitting the actual hardware state is done through the :c:type:`drm_mode_config_helper_funcs.atomic_commit_tail ` callback, or its default implementation drm_atomic_helper_commit_tail().h](h9Committing the actual hardware state is done through the }(hjhhhNhNubh)}(hX:c:type:`drm_mode_config_helper_funcs.atomic_commit_tail `h]jz)}(hjh]h/drm_mode_config_helper_funcs.atomic_commit_tail}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubhI callback, or its default implementation drm_atomic_helper_commit_tail().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hZero for success or -errno.h]hZero for success or -errno.}(hj΅hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_atomic_helper_setup_commit (C function) c.drm_atomic_helper_setup_commithNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hRint drm_atomic_helper_setup_commit (struct drm_atomic_state *state, bool nonblock)h]j)}(hQint drm_atomic_helper_setup_commit(struct drm_atomic_state *state, bool nonblock)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hM ubj)}(hdrm_atomic_helper_setup_commith]j)}(hdrm_atomic_helper_setup_commith]hdrm_atomic_helper_setup_commit}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hM ubj)}(h/(struct drm_atomic_state *state, bool nonblock)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]j)}jj sb c.drm_atomic_helper_setup_commitasbuh1hhj6ubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubj)}(h bool nonblockh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hnonblockh]hnonblock}(hjdžhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hM hjhhubj)}(hhh]h)}(h!setup possibly nonblocking commith]h!setup possibly nonblocking commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` new modeset state to be committed ``bool nonblock`` whether nonblocking behavior is requested. **Description** This function prepares **state** to be used by the atomic helper's support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their :c:type:`drm_mode_config_funcs.atomic_commit ` hook. Drivers that need to extend the commit setup to private objects can use the :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook. To be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver's commit hooks look at the :c:type:`drm_crtc.state `, :c:type:`drm_plane.state ` or :c:type:`drm_connector.state ` pointer directly. Completion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Only the free standing **state** with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes(). At the very end, before cleaning up **state** drivers must call drm_atomic_helper_commit_cleanup_done(). This is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook. The tracking of asynchronously executed and still pending commits is done using the core structure :c:type:`drm_crtc_commit`. By default there's no need to clean up resources allocated by this function explicitly: drm_atomic_state_default_clear() will take care of that automatically. **Return** 0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubji)}(hhh](jn)}(hE``struct drm_atomic_state *state`` new modeset state to be committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj2h]hstruct drm_atomic_state *state}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj,ubj)}(hhh]h)}(h!new modeset state to be committedh]h!new modeset state to be committed}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM hjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhjGhM hj)ubjn)}(h=``bool nonblock`` whether nonblocking behavior is requested. h](jt)}(h``bool nonblock``h]jz)}(hjkh]h bool nonblock}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjeubj)}(hhh]h)}(h*whether nonblocking behavior is requested.h]h*whether nonblocking behavior is requested.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj)ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubh)}(hXThis function prepares **state** to be used by the atomic helper's support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their :c:type:`drm_mode_config_funcs.atomic_commit ` hook.h](hThis function prepares }(hjhhhNhNubj%)}(h **state**h]hstate}(hjćhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh to be used by the atomic helper’s support for nonblocking commits. Drivers using the nonblocking commit infrastructure should always call this function from their }(hjhhhNhNubh)}(hE:c:type:`drm_mode_config_funcs.atomic_commit `h]jz)}(hj؇h]h#drm_mode_config_funcs.atomic_commit}(hjڇhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjևubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hj ubh)}(hDrivers that need to extend the commit setup to private objects can use the :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook.h](hLDrivers that need to extend the commit setup to private objects can use the }(hjhhhNhNubh)}(hY:c:type:`drm_mode_config_helper_funcs.atomic_commit_setup `h]jz)}(hj h]h0drm_mode_config_helper_funcs.atomic_commit_setup}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hM hj ubh)}(hXTo be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver's commit hooks look at the :c:type:`drm_crtc.state `, :c:type:`drm_plane.state ` or :c:type:`drm_connector.state ` pointer directly.h](hXrTo be able to use this support drivers need to use a few more helper functions. drm_atomic_helper_wait_for_dependencies() must be called before actually committing the hardware state, and for nonblocking commits this call must be placed in the async worker. See also drm_atomic_helper_swap_state() and its stall parameter, for when a driver’s commit hooks look at the }(hj2hhhNhNubh)}(h#:c:type:`drm_crtc.state `h]jz)}(hj<h]hdrm_crtc.state}(hj>hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtcuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj2ubh, }(hj2hhhNhNubh)}(h%:c:type:`drm_plane.state `h]jz)}(hj`h]hdrm_plane.state}(hjbhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_planeuh1hhjYhM hj2ubh or }(hj2hhhNhNubh)}(h-:c:type:`drm_connector.state `h]jz)}(hjh]hdrm_connector.state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjYhM hj2ubh pointer directly.}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhM hj ubh)}(hXCompletion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Only the free standing **state** with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes().h](hX Completion of the hardware commit step must be signalled using drm_atomic_helper_commit_hw_done(). After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_modeset_lockuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh locks. Only the free standing }(hjhhhNhNubj%)}(h **state**h]hstate}(hjֈhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh with pointers to the old state structures can be inspected, e.g. to clean up old buffers using drm_atomic_helper_cleanup_planes().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjшhM hj ubh)}(hhAt the very end, before cleaning up **state** drivers must call drm_atomic_helper_commit_cleanup_done().h](h$At the very end, before cleaning up }(hjhhhNhNubj%)}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh; drivers must call drm_atomic_helper_commit_cleanup_done().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubh)}(hThis is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook.h]hThis is all implemented by in drm_atomic_helper_commit(), giving drivers a complete and easy-to-use default implementation of the atomic_commit() hook.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubh)}(h}The tracking of asynchronously executed and still pending commits is done using the core structure :c:type:`drm_crtc_commit`.h](hcThe tracking of asynchronously executed and still pending commits is done using the core structure }(hjhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jz)}(hj(h]hdrm_crtc_commit}(hj*hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_commituh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhM hj ubh)}(hBy default there's no need to clean up resources allocated by this function explicitly: drm_atomic_state_default_clear() will take care of that automatically.h]hBy default there’s no need to clean up resources allocated by this function explicitly: drm_atomic_state_default_clear() will take care of that automatically.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubh)}(h **Return**h]j%)}(hjah]hReturn}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubh)}(h0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.h]h0 on success. -EBUSY when userspace schedules nonblocking commits too fast, -ENOMEM on allocation failures and -EINTR when a signal is pending.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_atomic_helper_wait_for_dependencies (C function))c.drm_atomic_helper_wait_for_dependencieshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hMvoid drm_atomic_helper_wait_for_dependencies (struct drm_atomic_state *state)h]j)}(hLvoid drm_atomic_helper_wait_for_dependencies(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMA ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMA ubj)}(h'drm_atomic_helper_wait_for_dependenciesh]j)}(h'drm_atomic_helper_wait_for_dependenciesh]h'drm_atomic_helper_wait_for_dependencies}(hjljhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjÉubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMA ubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߉ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߉ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjɉsb)c.drm_atomic_helper_wait_for_dependenciesasbuh1hhj߉ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߉ubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj߉ubj)}(hstateh]hstate}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߉ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjۉubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMA ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMA ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMA hjhhubj)}(hhh]h)}(h#wait for required preceding commitsh]h#wait for required preceding commits}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMA hjchhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMA ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj~jj~jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` atomic state object being committed **Description** This function waits for all preceding commits that touch the same CRTC as **state** to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the :c:type:`drm_crtc_state.event `). This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chME hjubji)}(hhh]jn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMB hjubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMB hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMB hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMD hjubh)}(hX9This function waits for all preceding commits that touch the same CRTC as **state** to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the :c:type:`drm_crtc_state.event `).h](hJThis function waits for all preceding commits that touch the same CRTC as }(hjhhhNhNubj%)}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh to both be committed to the hardware (as signalled by drm_atomic_helper_commit_hw_done()) and executed by the hardware (as signalled by calling drm_crtc_send_vblank_event() on the }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_state.event `h]jz)}(hjh]hdrm_crtc_state.event}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMC hjubh).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hMC hjubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMH hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_atomic_helper_fake_vblank (C function)c.drm_atomic_helper_fake_vblankhNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hCvoid drm_atomic_helper_fake_vblank (struct drm_atomic_state *state)h]j)}(hBvoid drm_atomic_helper_fake_vblank(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjghhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMr ubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjghhhjyhMr ubj)}(hdrm_atomic_helper_fake_vblankh]j)}(hdrm_atomic_helper_fake_vblankh]hdrm_atomic_helper_fake_vblank}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjghhhjyhMr ubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjƋhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjËubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjȋmodnameN classnameNjj)}j]j)}jjsbc.drm_atomic_helper_fake_vblankasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjghhhjyhMr ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjchhhjyhMr ubah}(h]j^ah ](jjeh"]h$]h&]jj)jhuh1jhjyhMr hj`hhubj)}(hhh]h)}(hfake VBLANK events if neededh]hfake VBLANK events if needed}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMr hj(hhubah}(h]h ]h"]h$]h&]uh1jhj`hhhjyhMr ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjCjjCjjjuh1jhhhj<hNhNubj)}(hX{**Parameters** ``struct drm_atomic_state *state`` atomic state object being committed **Description** This function walks all CRTCs and fakes VBLANK events on those with :c:type:`drm_crtc_state.no_vblank ` set to true and :c:type:`drm_crtc_state.event ` != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt. This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j%)}(hjMh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMv hjGubji)}(hhh]jn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjlh]hstruct drm_atomic_state *state}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMs hjfubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMs hjubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjhMs hjcubah}(h]h ]h"]h$]h&]uh1jhhjGubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMu hjGubh)}(hXThis function walks all CRTCs and fakes VBLANK events on those with :c:type:`drm_crtc_state.no_vblank ` set to true and :c:type:`drm_crtc_state.event ` != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt.h](hDThis function walks all CRTCs and fakes VBLANK events on those with }(hjhhhNhNubh)}(h3:c:type:`drm_crtc_state.no_vblank `h]jz)}(hjnjh]hdrm_crtc_state.no_vblank}(hjɌhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjŌubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMt hjubh set to true and }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_state.event `h]jz)}(hjh]hdrm_crtc_state.event}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjhMt hjubhX != NULL. The primary use of this function is writeback connectors working in oneshot mode and faking VBLANK events. In this case they only fake the VBLANK event when a job is queued, and any change to the pipeline that does not touch the connector is leading to timeouts when calling drm_atomic_helper_wait_for_vblanks() or drm_atomic_helper_wait_for_flip_done(). In addition to writeback connectors, this function can also fake VBLANK events for CRTCs without VBLANK interrupt.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMt hjGubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjGubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_atomic_helper_commit_hw_done (C function)"c.drm_atomic_helper_commit_hw_donehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hFvoid drm_atomic_helper_commit_hw_done (struct drm_atomic_state *state)h]j)}(hEvoid drm_atomic_helper_commit_hw_done(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhjOhM ubj)}(h drm_atomic_helper_commit_hw_doneh]j)}(h drm_atomic_helper_commit_hw_doneh]h drm_atomic_helper_commit_hw_done}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj=hhhjOhM ubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjdsb"c.drm_atomic_helper_commit_hw_doneasbuh1hhjzubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj+)}(hj9h]h*}(hjʍhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjzubj)}(hstateh]hstate}(hj׍hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjvubah}(h]h ]h"]h$]h&]jjuh1jhj=hhhjOhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj9hhhjOhM ubah}(h]j4ah ](jjeh"]h$]h&]jj)jhuh1jhjOhM hj6hhubj)}(hhh]h)}(h!setup possible nonblocking commith]h!setup possible nonblocking commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj6hhhjOhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX[**Parameters** ``struct drm_atomic_state *state`` atomic state object being committed **Description** This function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks. Drivers should try to postpone any expensive or delayed cleanup work after this function is called. This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j%)}(hj#h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubji)}(hhh]jn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjBh]hstruct drm_atomic_state *state}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj<ubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhM hjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jmhjWhM hj9ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj}h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXThis function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than :c:type:`drm_modeset_lock` locks.h](hThis function is used to signal completion of the hardware commit step. After this step the driver is not allowed to read or change any permanent software or hardware modeset state. The only exception is state protected by other means than }(hjhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hjh]hdrm_modeset_lock}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_modeset_lockuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh locks.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hcDrivers should try to postpone any expensive or delayed cleanup work after this function is called.h]hcDrivers should try to postpone any expensive or delayed cleanup work after this function is called.}(hjŎhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjԎhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_atomic_helper_commit_cleanup_done (C function)'c.drm_atomic_helper_commit_cleanup_donehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hKvoid drm_atomic_helper_commit_cleanup_done (struct drm_atomic_state *state)h]j)}(hJvoid drm_atomic_helper_commit_cleanup_done(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(h%drm_atomic_helper_commit_cleanup_doneh]j)}(h%drm_atomic_helper_commit_cleanup_doneh]h%drm_atomic_helper_commit_cleanup_done}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj`modnameN classnameNjj)}j]j)}jj&sb'c.drm_atomic_helper_commit_cleanup_doneasbuh1hhj<ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj<ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj8ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(hsignal completion of commith]hsignal completion of commit}(hjÏhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjۏjjۏjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` atomic state object being committed **Description** This signals completion of the atomic update **state**, including any cleanup work. If used, it must be called right before calling drm_atomic_state_put(). This is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjߏubji)}(hhh]jn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhjߏubh)}(h**Description**h]j%)}(hj?h]h Description}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjߏubh)}(hThis signals completion of the atomic update **state**, including any cleanup work. If used, it must be called right before calling drm_atomic_state_put().h](h-This signals completion of the atomic update }(hjUhhhNhNubj%)}(h **state**h]hstate}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubhe, including any cleanup work. If used, it must be called right before calling drm_atomic_state_put().}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjߏubh)}(hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.h]hxThis is part of the atomic helper support for nonblocking commits, see drm_atomic_helper_setup_commit() for an overview.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjߏubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_atomic_helper_prepare_planes (C function)"c.drm_atomic_helper_prepare_planeshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h]int drm_atomic_helper_prepare_planes (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(h\int drm_atomic_helper_prepare_planes(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(h drm_atomic_helper_prepare_planesh]j)}(h drm_atomic_helper_prepare_planesh]h drm_atomic_helper_prepare_planes}(hjƐhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjސubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjސubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjȐsb"c.drm_atomic_helper_prepare_planesasbuh1hhjސubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjސubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjސubj)}(hdevh]hdev}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjސubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjڐubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubj)}(h h]h }(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjtmodnameN classnameNjj)}j]j"c.drm_atomic_helper_prepare_planesasbuh1hhjPubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjPubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjڐubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h%prepare plane resources before commith]h%prepare plane resources before commit}(hjՑhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjґhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX0**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object with new state structures **Description** This function prepares plane state, specifically framebuffers, for the new configuration, by calling :c:type:`drm_plane_helper_funcs.prepare_fb `. If any failure is encountered this function will call :c:type:`drm_plane_helper_funcs.cleanup_fb ` on any already successfully prepared framebuffer. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hM hj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj+hM hj ubjn)}(hQ``struct drm_atomic_state *state`` atomic state object with new state structures h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjOh]hstruct drm_atomic_state *state}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjIubj)}(hhh]h)}(h-atomic state object with new state structuresh]h-atomic state object with new state structures}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhM hjeubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjdhM hj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXWThis function prepares plane state, specifically framebuffers, for the new configuration, by calling :c:type:`drm_plane_helper_funcs.prepare_fb `. If any failure is encountered this function will call :c:type:`drm_plane_helper_funcs.cleanup_fb ` on any already successfully prepared framebuffer.h](heThis function prepares plane state, specifically framebuffers, for the new configuration, by calling }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jz)}(hjh]h!drm_plane_helper_funcs.prepare_fb}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh8. If any failure is encountered this function will call }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]jz)}(hjΒh]h!drm_plane_helper_funcs.cleanup_fb}(hjВhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj̒ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjǒhM hjubh2 on any already successfully prepared framebuffer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjǒhM hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_atomic_helper_unprepare_planes (C function)$c.drm_atomic_helper_unprepare_planeshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h`void drm_atomic_helper_unprepare_planes (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(h_void drm_atomic_helper_unprepare_planes(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMN ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhjJhMN ubj)}(h"drm_atomic_helper_unprepare_planesh]j)}(h"drm_atomic_helper_unprepare_planesh]h"drm_atomic_helper_unprepare_planes}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubah}(h]h ](jjeh"]h$]h&]jjuh1jhj8hhhjJhMN ubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj_sb$c.drm_atomic_helper_unprepare_planesasbuh1hhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj+)}(hj9h]h*}(hjœhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjuubj)}(hdevh]hdev}(hjғhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j$c.drm_atomic_helper_unprepare_planesasbuh1hhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubeh}(h]h ]h"]h$]h&]jjuh1jhj8hhhjJhMN ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj4hhhjJhMN ubah}(h]j/ah ](jjeh"]h$]h&]jj)jhuh1jhjJhMN hj1hhubj)}(hhh]h)}(h!release plane resources on abortsh]h!release plane resources on aborts}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMN hjihhubah}(h]h ]h"]h$]h&]uh1jhj1hhhjJhMN ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object with old state structures **Description** This function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMR hjubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMO hjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjƔhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj”hMO hjÔubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj”hMO hjubjn)}(hQ``struct drm_atomic_state *state`` atomic state object with old state structures h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMP hjubj)}(hhh]h)}(h-atomic state object with old state structuresh]h-atomic state object with old state structures}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMP hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMP hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMR hjubh)}(hXThis function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().h]hXThis function cleans up plane state, specifically framebuffers, from the atomic state. It undoes the effects of drm_atomic_helper_prepare_planes() when aborting an atomic commit. For cleaning up after a successful commit use drm_atomic_helper_cleanup_planes().}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMQ hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_atomic_helper_commit_planes (C function)!c.drm_atomic_helper_commit_planeshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hmvoid drm_atomic_helper_commit_planes (struct drm_device *dev, struct drm_atomic_state *state, uint32_t flags)h]j)}(hlvoid drm_atomic_helper_commit_planes(struct drm_device *dev, struct drm_atomic_state *state, uint32_t flags)h](j)}(hvoidh]hvoid}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMt ubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhjthMt ubj)}(hdrm_atomic_helper_commit_planesh]j)}(hdrm_atomic_helper_commit_planesh]hdrm_atomic_helper_commit_planes}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjbhhhjthMt ubj)}(hH(struct drm_device *dev, struct drm_atomic_state *state, uint32_t flags)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjÕmodnameN classnameNjj)}j]j)}jjsb!c.drm_atomic_helper_commit_planesasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj5modnameN classnameNjj)}j]jݕ!c.drm_atomic_helper_commit_planesasbuh1hhjubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj_hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t flagsh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jݕ!c.drm_atomic_helper_commit_planesasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjbhhhjthMt ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj^hhhjthMt ubah}(h]jYah ](jjeh"]h$]h&]jj)jhuh1jhjthMt hj[hhubj)}(hhh]h)}(hcommit plane stateh]hcommit plane state}(hjޖhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMt hjۖhhubah}(h]h ]h"]h$]h&]uh1jhj[hhhjthMt ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX!**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object being committed ``uint32_t flags`` flags for committing plane state **Description** This function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail. It still requires the global state object **state** to know which planes and crtcs need to be updated though. Note that this function does all plane updates across all CRTCs in one step. If the hardware can't support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead. Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don't need to be immediately notified of plane updates for a disabled CRTC. Unless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in **flags** in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can't or just don't need to deal with updates on disabled CRTCs, for example when supporting runtime PM. Drivers may set the NO_DISABLE_AFTER_MODESET flag in **flags** if the relevant display controllers require to disable a CRTC's planes when the CRTC is disabled. This function would skip the :c:type:`drm_plane_helper_funcs.atomic_disable ` call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that. The drm_atomic_helper_commit() default implementation doesn't set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMx hjubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMu hjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMu hj5ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj4hMu hjubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjXh]hstruct drm_atomic_state *state}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMv hjRubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMv hjnubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jmhjmhMv hjubjn)}(h4``uint32_t flags`` flags for committing plane state h](jt)}(h``uint32_t flags``h]jz)}(hjh]huint32_t flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMw hjubj)}(hhh]h)}(h flags for committing plane stateh]h flags for committing plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMw hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMw hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj̗h]h Description}(hjΗhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjʗubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMy hjubh)}(hThis function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.h]hThis function commits the new plane state using the plane and atomic helper functions for planes and CRTCs. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMx hjubh)}(hmIt still requires the global state object **state** to know which planes and crtcs need to be updated though.h](h*It still requires the global state object }(hjhhhNhNubj%)}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh: to know which planes and crtcs need to be updated though.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM} hjubh)}(hNote that this function does all plane updates across all CRTCs in one step. If the hardware can't support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead.h]hNote that this function does all plane updates across all CRTCs in one step. If the hardware can’t support this approach look at drm_atomic_helper_commit_planes_on_crtc() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hX<Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don't need to be immediately notified of plane updates for a disabled CRTC.h]hX>Plane parameters can be updated by applications while the associated CRTC is disabled. The DRM/KMS core will store the parameters in the plane state, which will be available to the driver when the CRTC is turned on. As a result most drivers don’t need to be immediately notified of plane updates for a disabled CRTC.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXrUnless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in **flags** in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can't or just don't need to deal with updates on disabled CRTCs, for example when supporting runtime PM.h](hLUnless otherwise needed, drivers are advised to set the ACTIVE_ONLY flag in }(hj0hhhNhNubj%)}(h **flags**h]hflags}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubhX! in order not to receive plane update notifications related to a disabled CRTC. This avoids the need to manually ignore plane updates in driver code when the driver and/or hardware can’t or just don’t need to deal with updates on disabled CRTCs, for example when supporting runtime PM.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXDrivers may set the NO_DISABLE_AFTER_MODESET flag in **flags** if the relevant display controllers require to disable a CRTC's planes when the CRTC is disabled. This function would skip the :c:type:`drm_plane_helper_funcs.atomic_disable ` call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that.h](h5Drivers may set the NO_DISABLE_AFTER_MODESET flag in }(hjQhhhNhNubj%)}(h **flags**h]hflags}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubh if the relevant display controllers require to disable a CRTC’s planes when the CRTC is disabled. This function would skip the }(hjQhhhNhNubh)}(hH:c:type:`drm_plane_helper_funcs.atomic_disable `h]jz)}(hjmh]h%drm_plane_helper_funcs.atomic_disable}(hjohhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjQubh call for a plane if the CRTC of the old plane state needs a modesetting operation. Of course, the drivers need to disable the planes in their CRTC disable callbacks since no one else would do that.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(hThe drm_atomic_helper_commit() default implementation doesn't set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.h]hThe drm_atomic_helper_commit() default implementation doesn’t set the ACTIVE_ONLY flag to most closely match the behaviour of the legacy helpers. This should not be copied blindly by drivers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_atomic_helper_commit_planes_on_crtc (C function))c.drm_atomic_helper_commit_planes_on_crtchNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hTvoid drm_atomic_helper_commit_planes_on_crtc (struct drm_crtc_state *old_crtc_state)h]j)}(hSvoid drm_atomic_helper_commit_planes_on_crtc(struct drm_crtc_state *old_crtc_state)h](j)}(hvoidh]hvoid}(hjĘhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hjӘhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjҘhM ubj)}(h'drm_atomic_helper_commit_planes_on_crtch]j)}(h'drm_atomic_helper_commit_planes_on_crtch]h'drm_atomic_helper_commit_planes_on_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjҘhM ubj)}(h'(struct drm_crtc_state *old_crtc_state)h]j)}(h%struct drm_crtc_state *old_crtc_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]j)}jjsb)c.drm_atomic_helper_commit_planes_on_crtcasbuh1hhjubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjMhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hold_crtc_stateh]hold_crtc_state}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjҘhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjҘhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjҘhM hjhhubj)}(hhh]h)}(hcommit plane state for a CRTCh]hcommit plane state for a CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjҘhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX1**Parameters** ``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state **Description** This function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail. This function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does. This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn't handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubji)}(hhh]jn)}(hV``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state h](jt)}(h)``struct drm_crtc_state *old_crtc_state``h]jz)}(hjřh]h%struct drm_crtc_state *old_crtc_state}(hjǙhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjÙubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj)}(hhh]h)}(h+atomic state object with the old CRTC stateh]h+atomic state object with the old CRTC state}(hjޙhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjڙhM hjۙubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjڙhM hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.h]hThis function commits the new plane state using the plane and atomic helper functions for planes on the specific CRTC. It assumes that the atomic state has already been pushed into the relevant object state pointers, since this step can no longer fail.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does.h]hThis function is useful when plane updates should be done CRTC-by-CRTC instead of one global step like drm_atomic_helper_commit_planes() does.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hX)This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn't handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.h]hX+This function can only be savely used when planes are not allowed to move between different CRTCs because this function doesn’t handle inter-CRTC dependencies. Callers need to ensure that either no such dependencies exist, resolve them through ordering of commit calls or through some other means.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5drm_atomic_helper_disable_planes_on_crtc (C function)*c.drm_atomic_helper_disable_planes_on_crtchNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hbvoid drm_atomic_helper_disable_planes_on_crtc (struct drm_crtc_state *old_crtc_state, bool atomic)h]j)}(havoid drm_atomic_helper_disable_planes_on_crtc(struct drm_crtc_state *old_crtc_state, bool atomic)h](j)}(hvoidh]hvoid}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMI ubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhjqhMI ubj)}(h(drm_atomic_helper_disable_planes_on_crtch]j)}(h(drm_atomic_helper_disable_planes_on_crtch]h(drm_atomic_helper_disable_planes_on_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj_hhhjqhMI ubj)}(h4(struct drm_crtc_state *old_crtc_state, bool atomic)h](j)}(h%struct drm_crtc_state *old_crtc_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb*c.drm_atomic_helper_disable_planes_on_crtcasbuh1hhjubj)}(h h]h }(hjޚhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hold_crtc_stateh]hold_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool atomich](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hatomich]hatomic}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj_hhhjqhMI ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj[hhhjqhMI ubah}(h]jVah ](jjeh"]h$]h&]jj)jhuh1jhjqhMI hjXhhubj)}(hhh]h)}(hhelper to disable CRTC's planesh]h!helper to disable CRTC’s planes}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMI hjThhubah}(h]h ]h"]h$]h&]uh1jhjXhhhjqhMI ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjojjojjjuh1jhhhj<hNhNubj)}(hXy**Parameters** ``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state ``bool atomic`` if set, synchronize with CRTC's atomic_begin/flush hooks **Description** Disables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes. If the atomic-parameter is set the function calls the CRTC's atomic_begin hook before and atomic_flush hook after disabling the planes. It is a bug to call this function without having implemented the :c:type:`drm_plane_helper_funcs.atomic_disable ` plane hook.h](h)}(h**Parameters**h]j%)}(hjyh]h Parameters}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMM hjsubji)}(hhh](jn)}(hV``struct drm_crtc_state *old_crtc_state`` atomic state object with the old CRTC state h](jt)}(h)``struct drm_crtc_state *old_crtc_state``h]jz)}(hjh]h%struct drm_crtc_state *old_crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMJ hjubj)}(hhh]h)}(h+atomic state object with the old CRTC stateh]h+atomic state object with the old CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMJ hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMJ hjubjn)}(hI``bool atomic`` if set, synchronize with CRTC's atomic_begin/flush hooks h](jt)}(h``bool atomic``h]jz)}(hjћh]h bool atomic}(hjӛhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjϛubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMK hj˛ubj)}(hhh]h)}(h8if set, synchronize with CRTC's atomic_begin/flush hooksh]h:if set, synchronize with CRTC’s atomic_begin/flush hooks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMK hjubah}(h]h ]h"]h$]h&]uh1jhj˛ubeh}(h]h ]h"]h$]h&]uh1jmhjhMK hjubeh}(h]h ]h"]h$]h&]uh1jhhjsubh)}(h**Description**h]j%)}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMM hjsubh)}(hDisables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes.h]hDisables all planes associated with the given CRTC. This can be used for instance in the CRTC helper atomic_disable callback to disable all planes.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chML hjsubh)}(hIf the atomic-parameter is set the function calls the CRTC's atomic_begin hook before and atomic_flush hook after disabling the planes.h]hIf the atomic-parameter is set the function calls the CRTC’s atomic_begin hook before and atomic_flush hook after disabling the planes.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMP hjsubh)}(hIt is a bug to call this function without having implemented the :c:type:`drm_plane_helper_funcs.atomic_disable ` plane hook.h](hAIt is a bug to call this function without having implemented the }(hj@hhhNhNubh)}(hH:c:type:`drm_plane_helper_funcs.atomic_disable `h]jz)}(hjJh]h%drm_plane_helper_funcs.atomic_disable}(hjLhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMT hj@ubh plane hook.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjghMT hjsubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_atomic_helper_cleanup_planes (C function)"c.drm_atomic_helper_cleanup_planeshNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h^void drm_atomic_helper_cleanup_planes (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(h]void drm_atomic_helper_cleanup_planes(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMv ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMv ubj)}(h drm_atomic_helper_cleanup_planesh]j)}(h drm_atomic_helper_cleanup_planesh]h drm_atomic_helper_cleanup_planes}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMv ubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjϜhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˜ubj)}(h h]h }(hjܜhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˜ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb"c.drm_atomic_helper_cleanup_planesasbuh1hhj˜ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˜ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj˜ubj)}(hdevh]hdev}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˜ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjǜubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjamodnameN classnameNjj)}j]j "c.drm_atomic_helper_cleanup_planesasbuh1hhj=ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjǜubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMv ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMv ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMv hjhhubj)}(hhh]h)}(h$cleanup plane resources after commith]h$cleanup plane resources after commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMv hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMv ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjڝjjڝjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state object being committed **Description** This function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in **state** to be able to call this function. This function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMz hjޝubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMw hjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMw hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMw hjubjn)}(hG``struct drm_atomic_state *state`` atomic state object being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj<h]hstruct drm_atomic_state *state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMx hj6ubj)}(hhh]h)}(h#atomic state object being committedh]h#atomic state object being committed}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMx hjRubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jmhjQhMx hjubeh}(h]h ]h"]h$]h&]uh1jhhjޝubh)}(h**Description**h]j%)}(hjwh]h Description}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjuubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMz hjޝubh)}(hThis function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in **state** to be able to call this function.h](hThis function cleans up plane state, specifically framebuffers, from the old configuration. Hence the old configuration must be perserved in }(hjhhhNhNubj%)}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh" to be able to call this function.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMy hjޝubh)}(hThis function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.h]hThis function may not be called on the new state when the atomic update fails at any point after calling drm_atomic_helper_prepare_planes(). Use drm_atomic_helper_unprepare_planes() in this case.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM} hjޝubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_atomic_helper_swap_state (C function)c.drm_atomic_helper_swap_statehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hMint drm_atomic_helper_swap_state (struct drm_atomic_state *state, bool stall)h]j)}(hLint drm_atomic_helper_swap_state(struct drm_atomic_state *state, bool stall)h](j)}(hinth]hint}(hjݞhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjٞhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjٞhhhjhM ubj)}(hdrm_atomic_helper_swap_stateh]j)}(hdrm_atomic_helper_swap_stateh]hdrm_atomic_helper_swap_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjٞhhhjhM ubj)}(h,(struct drm_atomic_state *state, bool stall)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj:modnameN classnameNjj)}j]j)}jjsbc.drm_atomic_helper_swap_stateasbuh1hhjubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjfhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool stallh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hstallh]hstall}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjٞhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj՞hhhjhM ubah}(h]jОah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjҞhhubj)}(hhh]h)}(h(store atomic state into current sw stateh]h(store atomic state into current sw state}(hjџhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjΟhhubah}(h]h ]h"]h$]h&]uh1jhjҞhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` atomic state ``bool stall`` stall for preceding commits **Description** This function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed. For cleanup and error recovery the current state for all changed objects will be swapped into **state**. With that sequence it fits perfectly into the plane prepare/cleanup sequence: 1. Call drm_atomic_helper_prepare_planes() with the staged atomic state. 2. Do any other steps that might fail. 3. Put the staged state into the current state pointers with this function. 4. Actually commit the hardware state. 5. Call drm_atomic_helper_cleanup_planes() with **state**, which since step 3 contains the old state. Also do any other cleanup required with that state. **stall** must be set when nonblocking commits for this driver directly access the :c:type:`drm_plane.state `, :c:type:`drm_crtc.state ` or :c:type:`drm_connector.state ` pointer. With the current atomic helpers this is almost always the case, since the helpers don't pass the right state structures to the callbacks. **Return** Returns 0 on success. Can return -ERESTARTSYS when **stall** is true and the waiting for the previous commits has been interrupted.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubji)}(hhh](jn)}(h0``struct drm_atomic_state *state`` atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj ubj)}(hhh]h)}(h atomic stateh]h atomic state}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM hj(ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj'hM hj ubjn)}(h+``bool stall`` stall for preceding commits h](jt)}(h``bool stall``h]jz)}(hjKh]h bool stall}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjEubj)}(hhh]h)}(hstall for preceding commitsh]hstall for preceding commits}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM hjaubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhj`hM hj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hThis function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed.h]hThis function stores the atomic state into the current state pointers in all driver objects. It should be called after all failing steps have been done and succeeded, but before the actual hardware state is committed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hhFor cleanup and error recovery the current state for all changed objects will be swapped into **state**.h](h^For cleanup and error recovery the current state for all changed objects will be swapped into }(hjhhhNhNubj%)}(h **state**h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hMWith that sequence it fits perfectly into the plane prepare/cleanup sequence:h]hMWith that sequence it fits perfectly into the plane prepare/cleanup sequence:}(hj̠hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubjCH)}(hhh](h)}(hFCall drm_atomic_helper_prepare_planes() with the staged atomic state. h]h)}(hECall drm_atomic_helper_prepare_planes() with the staged atomic state.h]hECall drm_atomic_helper_prepare_planes() with the staged atomic state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjޠubah}(h]h ]h"]h$]h&]uh1hhj۠ubh)}(h$Do any other steps that might fail. h]h)}(h#Do any other steps that might fail.h]h#Do any other steps that might fail.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhj۠ubh)}(hIPut the staged state into the current state pointers with this function. h]h)}(hHPut the staged state into the current state pointers with this function.h]hHPut the staged state into the current state pointers with this function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubah}(h]h ]h"]h$]h&]uh1hhj۠ubh)}(h$Actually commit the hardware state. h]h)}(h#Actually commit the hardware state.h]h#Actually commit the hardware state.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj)ubah}(h]h ]h"]h$]h&]uh1hhj۠ubeh}(h]h ]h"]h$]h&]j?Jj@JjAJhjBJjCJuh1jBHhjubh)}(h5. Call drm_atomic_helper_cleanup_planes() with **state**, which since step 3 contains the old state. Also do any other cleanup required with that state.h](h05. Call drm_atomic_helper_cleanup_planes() with }(hjHhhhNhNubj%)}(h **state**h]hstate}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubh`, which since step 3 contains the old state. Also do any other cleanup required with that state.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXa**stall** must be set when nonblocking commits for this driver directly access the :c:type:`drm_plane.state `, :c:type:`drm_crtc.state ` or :c:type:`drm_connector.state ` pointer. With the current atomic helpers this is almost always the case, since the helpers don't pass the right state structures to the callbacks.h](j%)}(h **stall**h]hstall}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubhJ must be set when nonblocking commits for this driver directly access the }(hjihhhNhNubh)}(h%:c:type:`drm_plane.state `h]jz)}(hjh]hdrm_plane.state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_planeuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjiubh, }(hjihhhNhNubh)}(h#:c:type:`drm_crtc.state `h]jz)}(hjh]hdrm_crtc.state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtcuh1hhjhM hjiubh or }(hjihhhNhNubh)}(h-:c:type:`drm_connector.state `h]jz)}(hjȡh]hdrm_connector.state}(hjʡhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjơubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhM hjiubh pointer. With the current atomic helpers this is almost always the case, since the helpers don’t pass the right state structures to the callbacks.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hReturns 0 on success. Can return -ERESTARTSYS when **stall** is true and the waiting for the previous commits has been interrupted.h](h3Returns 0 on success. Can return -ERESTARTSYS when }(hjhhhNhNubj%)}(h **stall**h]hstall}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhG is true and the waiting for the previous commits has been interrupted.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_atomic_helper_update_plane (C function) c.drm_atomic_helper_update_planehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hXint drm_atomic_helper_update_plane (struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h]j)}(hXint drm_atomic_helper_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM3 ubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhjVhM3 ubj)}(hdrm_atomic_helper_update_planeh]j)}(hdrm_atomic_helper_update_planeh]hdrm_atomic_helper_update_plane}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ](jjeh"]h$]h&]jjuh1jhjDhhhjVhM3 ubj)}(h(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjksb c.drm_atomic_helper_update_planeasbuh1hhjubj)}(h h]h }(hjâhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjѢhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hjޢhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_atomic_helper_update_planeasbuh1hhjubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjAhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_atomic_helper_update_planeasbuh1hhjcubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjcubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(h int crtc_xh](j)}(hinth]hint}(hjףhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӣubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӣubj)}(hcrtc_xh]hcrtc_x}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӣubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(h int crtc_yh](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcrtc_yh]hcrtc_y}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(hunsigned int crtc_wh](j)}(hunsignedh]hunsigned}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(hinth]hint}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(hcrtc_wh]hcrtc_w}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(hunsigned int crtc_hh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcrtc_hh]hcrtc_h}(hjʤhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(huint32_t src_xh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_atomic_helper_update_planeasbuh1hhjߤubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjߤubj)}(hsrc_xh]hsrc_x}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjߤubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(huint32_t src_yh](h)}(hhh]j)}(huint32_th]huint32_t}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]j c.drm_atomic_helper_update_planeasbuh1hhj'ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(hsrc_yh]hsrc_y}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(huint32_t src_wh](h)}(hhh]j)}(huint32_th]huint32_t}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjxmodnameN classnameNjj)}j]j c.drm_atomic_helper_update_planeasbuh1hhjoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj)}(hsrc_wh]hsrc_w}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(huint32_t src_hh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_atomic_helper_update_planeasbuh1hhjubj)}(h h]h }(hjܥhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsrc_hh]hsrc_h}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj#modnameN classnameNjj)}j]j c.drm_atomic_helper_update_planeasbuh1hhjubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjMhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubeh}(h]h ]h"]h$]h&]jjuh1jhjDhhhjVhM3 ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj@hhhjVhM3 ubah}(h]j;ah ](jjeh"]h$]h&]jj)jhuh1jhjVhM3 hj=hhubj)}(hhh]h)}(h,Helper for primary plane update using atomich]h,Helper for primary plane update using atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM3 hjhhubah}(h]h ]h"]h$]h&]uh1jhj=hhhjVhM3 ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hXo**Parameters** ``struct drm_plane *plane`` plane object to update ``struct drm_crtc *crtc`` owning CRTC of owning plane ``struct drm_framebuffer *fb`` framebuffer to flip onto plane ``int crtc_x`` x offset of primary plane on **crtc** ``int crtc_y`` y offset of primary plane on **crtc** ``unsigned int crtc_w`` width of primary plane rectangle on **crtc** ``unsigned int crtc_h`` height of primary plane rectangle on **crtc** ``uint32_t src_x`` x offset of **fb** for panning ``uint32_t src_y`` y offset of **fb** for panning ``uint32_t src_w`` width of source rectangle in **fb** ``uint32_t src_h`` height of source rectangle in **fb** ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context **Description** Provides a default plane update handler using the atomic driver interface. **Return** Zero on success, error code on failureh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM7 hjubji)}(hhh](jn)}(h3``struct drm_plane *plane`` plane object to update h](jt)}(h``struct drm_plane *plane``h]jz)}(hjŦh]hstruct drm_plane *plane}(hjǦhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjæubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM4 hjubj)}(hhh]h)}(hplane object to updateh]hplane object to update}(hjަhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjڦhM4 hjۦubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjڦhM4 hjubjn)}(h6``struct drm_crtc *crtc`` owning CRTC of owning plane h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM5 hjubj)}(hhh]h)}(howning CRTC of owning planeh]howning CRTC of owning plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5 hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM5 hjubjn)}(h>``struct drm_framebuffer *fb`` framebuffer to flip onto plane h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hj7h]hstruct drm_framebuffer *fb}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM6 hj1ubj)}(hhh]h)}(hframebuffer to flip onto planeh]hframebuffer to flip onto plane}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhM6 hjMubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhjLhM6 hjubjn)}(h5``int crtc_x`` x offset of primary plane on **crtc** h](jt)}(h``int crtc_x``h]jz)}(hjph]h int crtc_x}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM7 hjjubj)}(hhh]h)}(h%x offset of primary plane on **crtc**h](hx offset of primary plane on }(hjhhhNhNubj%)}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h ]h"]h$]h&]uh1hhjhM7 hjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjhM7 hjubjn)}(h5``int crtc_y`` y offset of primary plane on **crtc** h](jt)}(h``int crtc_y``h]jz)}(hjh]h int crtc_y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM8 hjubj)}(hhh]h)}(h%y offset of primary plane on **crtc**h](hy offset of primary plane on }(hjЧhhhNhNubj%)}(h**crtc**h]hcrtc}(hjاhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjЧubeh}(h]h ]h"]h$]h&]uh1hhj̧hM8 hjͧubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj̧hM8 hjubjn)}(hE``unsigned int crtc_w`` width of primary plane rectangle on **crtc** h](jt)}(h``unsigned int crtc_w``h]jz)}(hjh]hunsigned int crtc_w}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM9 hjubj)}(hhh]h)}(h,width of primary plane rectangle on **crtc**h](h$width of primary plane rectangle on }(hjhhhNhNubj%)}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h ]h"]h$]h&]uh1hhjhM9 hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM9 hjubjn)}(hF``unsigned int crtc_h`` height of primary plane rectangle on **crtc** h](jt)}(h``unsigned int crtc_h``h]jz)}(hjEh]hunsigned int crtc_h}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM: hj?ubj)}(hhh]h)}(h-height of primary plane rectangle on **crtc**h](h%height of primary plane rectangle on }(hj^hhhNhNubj%)}(h**crtc**h]hcrtc}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubeh}(h]h ]h"]h$]h&]uh1hhjZhM: hj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhjZhM: hjubjn)}(h2``uint32_t src_x`` x offset of **fb** for panning h](jt)}(h``uint32_t src_x``h]jz)}(hjh]huint32_t src_x}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM; hjubj)}(hhh]h)}(hx offset of **fb** for panningh](h x offset of }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh for panning}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM; hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM; hjubjn)}(h2``uint32_t src_y`` y offset of **fb** for panning h](jt)}(h``uint32_t src_y``h]jz)}(hjרh]huint32_t src_y}(hj٨hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjըubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM< hjѨubj)}(hhh]h)}(hy offset of **fb** for panningh](h y offset of }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh for panning}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM< hjubah}(h]h ]h"]h$]h&]uh1jhjѨubeh}(h]h ]h"]h$]h&]uh1jmhjhM< hjubjn)}(h7``uint32_t src_w`` width of source rectangle in **fb** h](jt)}(h``uint32_t src_w``h]jz)}(hj"h]huint32_t src_w}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM= hjubj)}(hhh]h)}(h#width of source rectangle in **fb**h](hwidth of source rectangle in }(hj;hhhNhNubj%)}(h**fb**h]hfb}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubeh}(h]h ]h"]h$]h&]uh1hhj7hM= hj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj7hM= hjubjn)}(h8``uint32_t src_h`` height of source rectangle in **fb** h](jt)}(h``uint32_t src_h``h]jz)}(hjih]huint32_t src_h}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM> hjcubj)}(hhh]h)}(h$height of source rectangle in **fb**h](hheight of source rectangle in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h 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*ctx)h](j)}(hinth]hint}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMv ubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhjehMv ubj)}(hdrm_atomic_helper_disable_planeh]j)}(hdrm_atomic_helper_disable_planeh]hdrm_atomic_helper_disable_plane}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ](jjeh"]h$]h&]jjuh1jhjShhhjehMv ubj)}(h>(struct drm_plane *plane, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjzsb!c.drm_atomic_helper_disable_planeasbuh1hhjubj)}(h h]h }(hjҪhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj&modnameN classnameNjj)}j]jΪ!c.drm_atomic_helper_disable_planeasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjPhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjShhhjehMv ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjOhhhjehMv ubah}(h]jJah ](jjeh"]h$]h&]jj)jhuh1jhjehMv hjLhhubj)}(hhh]h)}(h-Helper for primary plane disable using atomich]h-Helper for primary plane disable using atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMv hjhhubah}(h]h ]h"]h$]h&]uh1jhjLhhhjehMv ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_plane *plane`` plane to disable ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context **Description** Provides a default plane disable handler using the atomic driver interface. **Return** Zero on success, error code on failureh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMz hjubji)}(hhh](jn)}(h-``struct drm_plane *plane`` plane to disable h](jt)}(h``struct drm_plane *plane``h]jz)}(hjȫh]hstruct drm_plane *plane}(hjʫhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjƫubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMw hj«ubj)}(hhh]h)}(hplane to disableh]hplane to disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjݫhMw hjޫubah}(h]h ]h"]h$]h&]uh1jhj«ubeh}(h]h ]h"]h$]h&]uh1jmhjݫhMw hjubjn)}(h=``struct drm_modeset_acquire_ctx *ctx`` lock acquire context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMx hjubj)}(hhh]h)}(hlock acquire contexth]hlock acquire context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMx hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMx hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj<h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMz hjubh)}(hKProvides a default plane disable handler using the atomic driver interface.h]hKProvides a default plane disable handler using the atomic driver interface.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMy hjubh)}(h **Return**h]j%)}(hjch]hReturn}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjaubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM{ hjubh)}(h&Zero on success, error code on failureh]h&Zero on success, error code on failure}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM| hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_atomic_helper_set_config (C function)c.drm_atomic_helper_set_confighNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h`int drm_atomic_helper_set_config (struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h]j)}(h_int drm_atomic_helper_set_config(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_atomic_helper_set_configh]j)}(hdrm_atomic_helper_set_configh]hdrm_atomic_helper_set_config}(hjɬhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŬubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h?(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_mode_set *seth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_mode_seth]h drm_mode_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjˬsbc.drm_atomic_helper_set_configasbuh1hhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj1hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hseth]hset}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjݬubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]jc.drm_atomic_helper_set_configasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjSubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjݬubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(hset a new config from userspaceh]hset a new config from userspace}(hjحhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjխhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX~**Parameters** ``struct drm_mode_set *set`` mode set configuration ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default CRTC set_config handler using the atomic driver interface. **NOTE** For backwards compatibility with old userspace this automatically resets the "link-status" property to GOOD, to force any link re-training. The SETCRTC ioctl does not define whether an update does need a full modeset or just a plane update, hence we're allowed to do that. See also drm_connector_set_link_status_property(). **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubji)}(hhh](jn)}(h4``struct drm_mode_set *set`` mode set configuration h](jt)}(h``struct drm_mode_set *set``h]jz)}(hjh]hstruct drm_mode_set *set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj)}(hhh]h)}(hmode set configurationh]hmode set configuration}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hM hj/ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj.hM hjubjn)}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjRh]h#struct drm_modeset_acquire_ctx *ctx}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjLubj)}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghM hjhubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhjghM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hMProvides a default CRTC set_config handler using the atomic driver interface.h]hMProvides a default CRTC set_config handler using the atomic driver interface.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h**NOTE**h]j%)}(hjh]hNOTE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(hXCFor backwards compatibility with old userspace this automatically resets the "link-status" property to GOOD, to force any link re-training. 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See also drm_connector_set_link_status_property().}(hjʮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h **Return**h]j%)}(hjۮh]hReturn}(hjݮhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjٮubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_atomic_helper_disable_all (C function)c.drm_atomic_helper_disable_allhNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h_int drm_atomic_helper_disable_all (struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h]j)}(h^int drm_atomic_helper_disable_all(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj.hM ubj)}(hdrm_atomic_helper_disable_allh]j)}(hdrm_atomic_helper_disable_allh]hdrm_atomic_helper_disable_all}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj.hM ubj)}(h=(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj}modnameN classnameNjj)}j]j)}jjCsbc.drm_atomic_helper_disable_allasbuh1hhjYubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjYubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjUubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjϯhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˯ubj)}(h h]h }(hjܯhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˯ubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_atomic_helper_disable_allasbuh1hhj˯ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˯ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj˯ubj)}(hctxh]hctx}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˯ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjUubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj.hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj.hM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj.hM hjhhubj)}(hhh]h)}(h$disable all currently active outputsh]h$disable all currently active outputs}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjMhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj.hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjhjjhjjjuh1jhhhj<hNhNubj)}(hXG**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Loops through all connectors, finding those that aren't turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to. This is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown(). Note that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff(). See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjrh]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjʰh]h#struct drm_modeset_acquire_ctx *ctx}(hj̰hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjȰubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjİubj)}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj߰hM hjubah}(h]h ]h"]h$]h&]uh1jhjİubeh}(h]h ]h"]h$]h&]uh1jmhj߰hM hjubeh}(h]h ]h"]h$]h&]uh1jhhjlubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubh)}(hLoops through all connectors, finding those that aren't turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to.h]hLoops through all connectors, finding those that aren’t turned off and then turns them off by setting their DPMS mode to OFF and deactivating the CRTC that they are connected to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubh)}(hThis is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown().h]hThis is used for example in suspend/resume to disable all currently active functions when suspending. If you just want to shut down everything at e.g. driver unload, look at drm_atomic_helper_shutdown().}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubh)}(hNote that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().h]hNote that if callers haven’t already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubh)}(hcSee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown().h]hcSee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() and drm_atomic_helper_shutdown().}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubh)}(h **Return**h]j%)}(hjYh]hReturn}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hjlubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_atomic_helper_reset_crtc (C function)c.drm_atomic_helper_reset_crtchNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h]int drm_atomic_helper_reset_crtc (struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h]j)}(h\int drm_atomic_helper_reset_crtc(struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_atomic_helper_reset_crtch]j)}(hdrm_atomic_helper_reset_crtch]hdrm_atomic_helper_reset_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h<(struct drm_crtc *crtc, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj۱hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjױubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjױubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_atomic_helper_reset_crtcasbuh1hhjױubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjױubj+)}(hj9h]h*}(hj'hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjױubj)}(hcrtch]hcrtc}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjױubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjӱubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmmodnameN classnameNjj)}j]jc.drm_atomic_helper_reset_crtcasbuh1hhjIubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjIubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjӱubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h"reset the active outputs of a CRTCh]h"reset the active outputs of a CRTC}(hjβhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj˲hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Reset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors. A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges. **NOTE** This relies on resetting :c:type:`drm_crtc_state.connectors_changed `. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM$hjubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` DRM CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM!hj ubj)}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hM!hj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hM!hjubjn)}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjHh]h#struct drm_modeset_acquire_ctx *ctx}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM"hjBubj)}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hM"hj^ubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jmhj]hM"hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM$hjubh)}(hReset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors.h]hReset the active outputs by indicating that connectors have changed. This implies a reset of all active components available between the CRTC and connectors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM#hjubh)}(h\A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges.h]h\A variant of this function exists with drm_bridge_helper_reset_crtc(), dedicated to bridges.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM'hjubh)}(h**NOTE**h]j%)}(hjh]hNOTE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM*hjubh)}(hThis relies on resetting :c:type:`drm_crtc_state.connectors_changed `. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing.h](hThis relies on resetting }(hjϳhhhNhNubh)}(h<:c:type:`drm_crtc_state.connectors_changed `h]jz)}(hjٳh]h!drm_crtc_state.connectors_changed}(hj۳hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj׳ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM+hjϳubhl. For drivers which optimize out unnecessary modesets this will result in a no-op commit, achieving nothing.}(hjϳhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM+hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM/hjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM/hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_atomic_helper_shutdown (C function)c.drm_atomic_helper_shutdownhNtauh1jxhj<hhhNhNubj)}(hhh](j)}(h8void drm_atomic_helper_shutdown (struct drm_device *dev)h]j)}(h7void drm_atomic_helper_shutdown(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMPubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhjVhMPubj)}(hdrm_atomic_helper_shutdownh]j)}(hdrm_atomic_helper_shutdownh]hdrm_atomic_helper_shutdown}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ](jjeh"]h$]h&]jjuh1jhjDhhhjVhMPubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjksbc.drm_atomic_helper_shutdownasbuh1hhjubj)}(h h]h }(hjôhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjѴhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hj޴hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubah}(h]h ]h"]h$]h&]jjuh1jhjDhhhjVhMPubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj@hhhjVhMPubah}(h]j;ah ](jjeh"]h$]h&]jj)jhuh1jhjVhMPhj=hhubj)}(hhh]h)}(hshutdown all CRTCh]hshutdown all CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMPhjhhubah}(h]h ]h"]h$]h&]uh1jhj=hhhjVhMPubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device **Description** This shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume. This is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMThj$ubji)}(hhh]jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjIh]hstruct drm_device *dev}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMQhjCubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMQhj_ubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jmhj^hMQhj@ubah}(h]h ]h"]h$]h&]uh1jhhj$ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMShj$ubh)}(hThis shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume.h]hThis shuts down all CRTC, which is useful for driver unloading. Shutdown on suspend should instead be handled with drm_atomic_helper_suspend(), since that also takes a snapshot of the modeset state to be restored on resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMRhj$ubh)}(hThis is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().h]hThis is just a convenience wrapper around drm_atomic_helper_disable_all(), and it is the atomic version of drm_helper_force_disable_all().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMVhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_atomic_helper_duplicate_state (C function)#c.drm_atomic_helper_duplicate_statehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hystruct drm_atomic_state * drm_atomic_helper_duplicate_state (struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h]j)}(hwstruct drm_atomic_state *drm_atomic_helper_duplicate_state(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hjh]hstruct}(hjصhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԵhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԵhhhjhMoubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j!drm_atomic_helper_duplicate_statesb#c.drm_atomic_helper_duplicate_stateasbuh1hhjԵhhhjhMoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԵhhhjhMoubj+)}(hj9h]h*}(hj&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjԵhhhjhMoubj)}(h!drm_atomic_helper_duplicate_stateh]j)}(hjh]h!drm_atomic_helper_duplicate_state}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjԵhhhjhMoubj)}(h=(struct drm_device *dev, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjrmodnameN classnameNjj)}j]j#c.drm_atomic_helper_duplicate_stateasbuh1hhjNubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjNubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hj¶hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj϶hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݶubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j#c.drm_atomic_helper_duplicate_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubeh}(h]h ]h"]h$]h&]jjuh1jhjԵhhhjhMoubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjеhhhjhMoubah}(h]j˵ah ](jjeh"]h$]h&]jj)jhuh1jhjhMohj͵hhubj)}(hhh]h)}(h duplicate an atomic state objecth]h duplicate an atomic state object}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMohj@hhubah}(h]h ]h"]h$]h&]uh1jhj͵hhhjhMoubeh}(h]h ](jfunctioneh"]h$]h&]jjjj[jj[jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Makes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume. Note that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won't result in confusion or erroneous behaviour. Note that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff(). See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume() **Return** A pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.h](h)}(h**Parameters**h]j%)}(hjeh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjcubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMshj_ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMphj~ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhjhMphj{ubjn)}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMqhjubj)}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjַhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjҷhMqhjӷubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjҷhMqhj{ubeh}(h]h ]h"]h$]h&]uh1jhhj_ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMshj_ubh)}(hMakes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume.h]hMakes a copy of the current atomic state by looping over all objects and duplicating their respective states. This is used for example by suspend/ resume support code to save the state prior to suspend such that it can be restored upon resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMrhj_ubh)}(hNote that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won't result in confusion or erroneous behaviour.h]hNote that this treats atomic state as persistent between save and restore. Drivers must make sure that this is possible and won’t result in confusion or erroneous behaviour.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMwhj_ubh)}(hNote that if callers haven't already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().h]hNote that if callers haven’t already acquired all modeset locks this might return -EDEADLK, which must be handled by calling drm_modeset_backoff().}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM{hj_ubh)}(hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()h]hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj_ubh)}(h **Return**h]j%)}(hjLh]hReturn}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj_ubh)}(hjA pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.h]hjA pointer to the copy of the atomic state object on success or an ERR_PTR()-encoded error code on failure.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_atomic_helper_suspend (C function)c.drm_atomic_helper_suspendhNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hLstruct drm_atomic_state * drm_atomic_helper_suspend (struct drm_device *dev)h]j)}(hJstruct drm_atomic_state *drm_atomic_helper_suspend(struct drm_device *dev)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_atomic_helper_suspendsbc.drm_atomic_helper_suspendasbuh1hhjhhhjhMubj)}(h h]h }(hjѸhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hj߸hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrm_atomic_helper_suspendh]j)}(hjθh]hdrm_atomic_helper_suspend}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j̸c.drm_atomic_helper_suspendasbuh1hhjubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjUhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hsubsystem-level suspend helperh]hsubsystem-level suspend helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hX-**Parameters** ``struct drm_device *dev`` DRM device **Description** Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend. Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device. See also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state() **Return** A pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubji)}(hhh]jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj͹h]hstruct drm_device *dev}(hjϹhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj˹ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjǹubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjǹubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjĹubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX6Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend.h]hX6Duplicates the current atomic state, disables all active outputs and then returns a pointer to the original atomic state to the caller. Drivers can pass this pointer to the drm_atomic_helper_resume() helper upon resume to restore the output configuration that was active at the time the system entered suspend.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hX!Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device.h]hX!Note that it is potentially unsafe to use this. The atomic state object returned by this function is assumed to be persistent. Drivers must ensure that this holds true. Before calling this function, drivers must make sure to suspend fbdev emulation so that nothing can be using the device.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hSee also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state()h]hSee also: drm_atomic_helper_duplicate_state(), drm_atomic_helper_disable_all(), drm_atomic_helper_resume(), drm_atomic_helper_commit_duplicated_state()}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j%)}(hjMh]hReturn}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(hA pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.h]hA pointer to a copy of the state before suspend on success or an ERR_PTR()- encoded error code on failure. Drivers should store the returned atomic state object and pass it to the drm_atomic_helper_resume() helper upon resume.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6drm_atomic_helper_commit_duplicated_state (C function)+c.drm_atomic_helper_commit_duplicated_statehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hsint drm_atomic_helper_commit_duplicated_state (struct drm_atomic_state *state, struct drm_modeset_acquire_ctx *ctx)h]j)}(hrint drm_atomic_helper_commit_duplicated_state(struct drm_atomic_state *state, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h)drm_atomic_helper_commit_duplicated_stateh]j)}(h)drm_atomic_helper_commit_duplicated_stateh]h)drm_atomic_helper_commit_duplicated_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hE(struct drm_atomic_state *state, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjϺhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˺ubj)}(h h]h }(hjܺhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˺ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb+c.drm_atomic_helper_commit_duplicated_stateasbuh1hhj˺ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˺ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj˺ubj)}(hstateh]hstate}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj˺ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjǺubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjamodnameN classnameNjj)}j]j +c.drm_atomic_helper_commit_duplicated_stateasbuh1hhj=ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjǺubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hcommit duplicated stateh]hcommit duplicated state}(hj»hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjڻjjڻjjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` duplicated atomic state to commit ``struct drm_modeset_acquire_ctx *ctx`` pointer to acquire_ctx to use for commit. **Description** The state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit. See also: drm_atomic_helper_suspend() **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj޻ubji)}(hhh](jn)}(hE``struct drm_atomic_state *state`` duplicated atomic state to commit h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(h!duplicated atomic state to commith]h!duplicated atomic state to commit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hR``struct drm_modeset_acquire_ctx *ctx`` pointer to acquire_ctx to use for commit. h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hj<h]h#struct drm_modeset_acquire_ctx *ctx}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj6ubj)}(hhh]h)}(h)pointer to acquire_ctx to use for commit.h]h)pointer to acquire_ctx to use for commit.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMhjRubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jmhjQhMhjubeh}(h]h ]h"]h$]h&]uh1jhhj޻ubh)}(h**Description**h]j%)}(hjwh]h Description}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjuubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj޻ubh)}(hThe state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit.h]hThe state returned by drm_atomic_helper_duplicate_state() and drm_atomic_helper_suspend() is partially invalid, and needs to be fixed up before commit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj޻ubh)}(h%See also: drm_atomic_helper_suspend()h]h%See also: drm_atomic_helper_suspend()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj޻ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM hj޻ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjühhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj޻ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_atomic_helper_resume (C function)c.drm_atomic_helper_resumehNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hUint drm_atomic_helper_resume (struct drm_device *dev, struct drm_atomic_state *state)h]j)}(hTint drm_atomic_helper_resume(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM,ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM,ubj)}(hdrm_atomic_helper_resumeh]j)}(hdrm_atomic_helper_resumeh]hdrm_atomic_helper_resume}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM,ubj)}(h8(struct drm_device *dev, struct drm_atomic_state *state)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjOmodnameN classnameNjj)}j]j)}jjsbc.drm_atomic_helper_resumeasbuh1hhj+ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj+)}(hj9h]h*}(hj{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj+ubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jic.drm_atomic_helper_resumeasbuh1hhjubj)}(h h]h }(hjݽhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM,ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM,ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM,hjhhubj)}(hhh]h)}(hsubsystem-level resume helperh]hsubsystem-level resume helper}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM,hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM,ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_atomic_state *state`` atomic state to resume to **Description** Calls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting. See also: drm_atomic_helper_suspend() **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM0hj>ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjch]hstruct drm_device *dev}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM-hj]ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhM-hjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhM-hjZubjn)}(h=``struct drm_atomic_state *state`` atomic state to resume to h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM.hjubj)}(hhh]h)}(hatomic state to resume toh]hatomic state to resume to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM.hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM.hjZubeh}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hj׾h]h Description}(hjپhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjվubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM0hj>ubh)}(hXCalls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting.h]hXCalls drm_mode_config_reset() to synchronize hardware and software states, grabs all modeset locks and commits the atomic state object. This can be used in conjunction with the drm_atomic_helper_suspend() helper to implement suspend/resume for drivers that support atomic mode-setting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM/hj>ubh)}(h%See also: drm_atomic_helper_suspend()h]h%See also: drm_atomic_helper_suspend()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM5hj>ubh)}(h **Return**h]j%)}(hj h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM8hj>ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM5hj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_atomic_helper_page_flip (C function)c.drm_atomic_helper_page_fliphNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hint drm_atomic_helper_page_flip (struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h]j)}(hint drm_atomic_helper_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMvubj)}(h h]h }(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNhhhj`hMvubj)}(hdrm_atomic_helper_page_fliph]j)}(hdrm_atomic_helper_page_fliph]hdrm_atomic_helper_page_flip}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubah}(h]h ](jjeh"]h$]h&]jjuh1jhjNhhhj`hMvubj)}(h(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjusbc.drm_atomic_helper_page_flipasbuh1hhjubj)}(h h]h }(hjͿhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjۿhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]jɿc.drm_atomic_helper_page_flipasbuh1hhjubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjKhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h&struct drm_pending_vblank_event *eventh](j)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(hdrm_pending_vblank_eventh]hdrm_pending_vblank_event}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jɿc.drm_atomic_helper_page_flipasbuh1hhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(heventh]hevent}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t flagsh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jɿc.drm_atomic_helper_page_flipasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hflagsh]hflags}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjImodnameN classnameNjj)}j]jɿc.drm_atomic_helper_page_flipasbuh1hhj%ubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj+)}(hj9h]h*}(hjshhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj%ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjNhhhj`hMvubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjJhhhj`hMvubah}(h]jEah ](jjeh"]h$]h&]jj)jhuh1jhj`hMvhjGhhubj)}(hhh]h)}(hexecute a legacy page fliph]hexecute a legacy page flip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMvhjhhubah}(h]h ]h"]h$]h&]uh1jhjGhhhj`hMvubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj<hNhNubj)}(hXG**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_framebuffer *fb`` DRM framebuffer ``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion ``uint32_t flags`` flip flags for non-vblank sync'ed updates ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default :c:type:`drm_crtc_funcs.page_flip ` implementation using the atomic driver interface. See also: drm_atomic_helper_page_flip_target() **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMzhjubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` DRM CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMwhjubj)}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMwhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMwhjubjn)}(h/``struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hj$h]hstruct drm_framebuffer *fb}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMxhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMxhj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj9hMxhjubjn)}(hX``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion h](jt)}(h*``struct drm_pending_vblank_event *event``h]jz)}(hj]h]h&struct drm_pending_vblank_event *event}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMyhjWubj)}(hhh]h)}(h,optional DRM event to signal upon completionh]h,optional DRM event to signal upon completion}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMyhjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjrhMyhjubjn)}(h=``uint32_t flags`` flip flags for non-vblank sync'ed updates h](jt)}(h``uint32_t flags``h]jz)}(hjh]huint32_t flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMzhjubj)}(hhh]h)}(h)flip flags for non-vblank sync'ed updatesh]h+flip flags for non-vblank sync’ed updates}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMzhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMzhjubjn)}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM{hjubj)}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM{hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM{hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM}hjubh)}(hxProvides a default :c:type:`drm_crtc_funcs.page_flip ` implementation using the atomic driver interface.h](hProvides a default }(hj hhhNhNubh)}(h3:c:type:`drm_crtc_funcs.page_flip `h]jz)}(hj*h]hdrm_crtc_funcs.page_flip}(hj,hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj(ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chM|hj ubh2 implementation using the atomic driver interface.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhM|hjubh)}(h.See also: drm_atomic_helper_page_flip_target()h]h.See also: drm_atomic_helper_page_flip_target()}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h **Return**h]j%)}(hjch]hReturn}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjaubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_atomic_helper_page_flip_target (C function)$c.drm_atomic_helper_page_flip_targethNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hint drm_atomic_helper_page_flip_target (struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h]j)}(hint drm_atomic_helper_page_flip_target(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h"drm_atomic_helper_page_flip_targeth]j)}(h"drm_atomic_helper_page_flip_targeth]h"drm_atomic_helper_page_flip_target}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, uint32_t target, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj1hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]j$c.drm_atomic_helper_page_flip_targetasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjSubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h&struct drm_pending_vblank_event *eventh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_pending_vblank_eventh]hdrm_pending_vblank_event}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(heventh]hevent}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t flagsh](h)}(hhh]j)}(huint32_th]huint32_t}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j$c.drm_atomic_helper_page_flip_targetasbuh1hhj3ubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(hflagsh]hflags}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint32_t targeth](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j$c.drm_atomic_helper_page_flip_targetasbuh1hhj{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj)}(htargeth]htarget}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j$c.drm_atomic_helper_page_flip_targetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h%do page flip on target vblank period.h]h%do page flip on target vblank period.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjEhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj`jj`jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_crtc *crtc`` DRM CRTC ``struct drm_framebuffer *fb`` DRM framebuffer ``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion ``uint32_t flags`` flip flags for non-vblank sync'ed updates ``uint32_t target`` specifying the target vblank period when the flip to take effect ``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context **Description** Provides a default :c:type:`drm_crtc_funcs.page_flip_target ` implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip. **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j%)}(hjjh]h Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjdubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` DRM CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(hDRM CRTCh]hDRM CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h/``struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hX``struct drm_pending_vblank_event *event`` optional DRM event to signal upon completion h](jt)}(h*``struct drm_pending_vblank_event *event``h]jz)}(hjh]h&struct drm_pending_vblank_event *event}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(h,optional DRM event to signal upon completionh]h,optional DRM event to signal upon completion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h=``uint32_t flags`` flip flags for non-vblank sync'ed updates h](jt)}(h``uint32_t flags``h]jz)}(hj4h]huint32_t flags}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj.ubj)}(hhh]h)}(h)flip flags for non-vblank sync'ed updatesh]h+flip flags for non-vblank sync’ed updates}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhjIhMhjubjn)}(hU``uint32_t target`` specifying the target vblank period when the flip to take effect h](jt)}(h``uint32_t target``h]jz)}(hjmh]huint32_t target}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjgubj)}(hhh]h)}(h@specifying the target vblank period when the flip to take effecth]h@specifying the target vblank period when the flip to take effect}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hA``struct drm_modeset_acquire_ctx *ctx`` lock acquisition context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(hlock acquisition contexth]hlock acquisition context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjdubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjdubh)}(hProvides a default :c:type:`drm_crtc_funcs.page_flip_target ` implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip.h](hProvides a default }(hjhhhNhNubh)}(h::c:type:`drm_crtc_funcs.page_flip_target `h]jz)}(hjh]hdrm_crtc_funcs.page_flip_target}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubhw implementation. Similar to drm_atomic_helper_page_flip() with extra parameter to specify target vblank period to flip.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjdubh)}(h **Return**h]j%)}(hj+h]hReturn}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj)ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjdubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjdubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j7drm_atomic_helper_bridge_propagate_bus_fmt (C function),c.drm_atomic_helper_bridge_propagate_bus_fmthNtauh1jxhj<hhhNhNubj)}(hhh](j)}(hu32 * drm_atomic_helper_bridge_propagate_bus_fmt (struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h]j)}(hu32 *drm_atomic_helper_bridge_propagate_bus_fmt(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h](h)}(hhh]j)}(hu32h]hu32}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}j*drm_atomic_helper_bridge_propagate_bus_fmtsb,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjlhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjlhhhjhMubj)}(h*drm_atomic_helper_bridge_propagate_bus_fmth]j)}(hjh]h*drm_atomic_helper_bridge_propagate_bus_fmt}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjlhhhjhMubj)}(h(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h%struct drm_bridge_state *bridge_stateh](j)}(hjh]hstruct}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hdrm_bridge_stateh]hdrm_bridge_state}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_modnameN classnameNjj)}j]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhj;ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubj)}(h bridge_stateh]h bridge_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h!struct drm_crtc_state *crtc_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h crtc_stateh]h crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjihhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h conn_stateh]h conn_state}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu32 output_fmth](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j,c.drm_atomic_helper_bridge_propagate_bus_fmtasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h output_fmth]h output_fmt}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hunsigned int *num_input_fmtsh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hnum_input_fmtsh]hnum_input_fmts}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjlhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhhjhMubah}(h]jcah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjehhubj)}(hhh]h)}(h4Propagate output format to the input end of a bridgeh]h4Propagate output format to the input end of a bridge}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjChhubah}(h]h ]h"]h$]h&]uh1jhjehhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj^jj^jjjuh1jhhhj<hNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_bridge_state *bridge_state`` new bridge state ``struct drm_crtc_state *crtc_state`` new CRTC state ``struct drm_connector_state *conn_state`` new connector state ``u32 output_fmt`` tested output bus format ``unsigned int *num_input_fmts`` will contain the size of the returned array **Description** This helper is a pluggable implementation of the :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation for bridges that don't modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to **output_fmt**. **Return** a valid format array of size **num_input_fmts**, or NULL if the allocation failedh](h)}(h**Parameters**h]j%)}(hjhh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjbubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj~ubjn)}(h;``struct drm_bridge_state *bridge_state`` new bridge state h](jt)}(h)``struct drm_bridge_state *bridge_state``h]jz)}(hjh]h%struct drm_bridge_state *bridge_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(hnew bridge stateh]hnew bridge state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj~ubjn)}(h5``struct drm_crtc_state *crtc_state`` new CRTC state h](jt)}(h%``struct drm_crtc_state *crtc_state``h]jz)}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(hnew CRTC stateh]hnew CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj~ubjn)}(h?``struct drm_connector_state *conn_state`` new connector state h](jt)}(h*``struct drm_connector_state *conn_state``h]jz)}(hj2h]h&struct drm_connector_state *conn_state}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhj,ubj)}(hhh]h)}(hnew connector stateh]hnew connector state}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhjGhMhj~ubjn)}(h,``u32 output_fmt`` tested output bus format h](jt)}(h``u32 output_fmt``h]jz)}(hjkh]hu32 output_fmt}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjeubj)}(hhh]h)}(htested output bus formath]htested output bus format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj~ubjn)}(hM``unsigned int *num_input_fmts`` will contain the size of the returned array h](jt)}(h ``unsigned int *num_input_fmts``h]jz)}(hjh]hunsigned int *num_input_fmts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubj)}(hhh]h)}(h+will contain the size of the returned arrayh]h+will contain the size of the returned array}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj~ubeh}(h]h ]h"]h$]h&]uh1jhhjbubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjbubh)}(hX.This helper is a pluggable implementation of the :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation for bridges that don't modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to **output_fmt**.h](h1This helper is a pluggable implementation of the }(hjhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]jz)}(hjh]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjubh operation for bridges that don’t modify the bus configuration between their input and their output. It returns an array of input formats with a single element set to }(hjhhhNhNubj%)}(h**output_fmt**h]h output_fmt}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjbubh)}(h **Return**h]j%)}(hj;h]hReturn}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjbubh)}(hQa valid format array of size **num_input_fmts**, or NULL if the allocation failedh](ha valid format array of size }(hjQhhhNhNubj%)}(h**num_input_fmts**h]hnum_input_fmts}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubh", or NULL if the allocation failed}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:68: ./drivers/gpu/drm/drm_atomic_helper.chMhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<hhhNhNubeh}(h]helper-functions-referenceah ]h"]helper functions referenceah$]h&]uh1hhj:hhhhhK?ubh)}(hhh](h)}(h%Atomic State Reset and Initializationh]h%Atomic State Reset and Initialization}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKHubh)}(hXsBoth the drm core and the atomic helpers assume that there is always the full and correct atomic software state for all connectors, CRTCs and planes available. Which is a bit a problem on driver load and also after system suspend. One way to solve this is to have a hardware state read-out infrastructure which reconstructs the full software state (e.g. the i915 driver).h]hXsBoth the drm core and the atomic helpers assume that there is always the full and correct atomic software state for all connectors, CRTCs and planes available. Which is a bit a problem on driver load and also after system suspend. One way to solve this is to have a hardware state read-out infrastructure which reconstructs the full software state (e.g. the i915 driver).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:74: ./drivers/gpu/drm/drm_atomic_state_helper.chK-hjhhubh)}(hThe simpler solution is to just reset the software state to everything off, which is easiest to do by calling drm_mode_config_reset(). To facilitate this the atomic helpers provide default reset implementations for all hooks.h]hThe simpler solution is to just reset the software state to everything off, which is easiest to do by calling drm_mode_config_reset(). To facilitate this the atomic helpers provide default reset implementations for all hooks.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:74: ./drivers/gpu/drm/drm_atomic_state_helper.chK4hjhhubh)}(hXHOn the upside the precise state tracking of atomic simplifies system suspend and resume a lot. For drivers using drm_mode_config_reset() a complete recipe is implemented in drm_atomic_helper_suspend() and drm_atomic_helper_resume(). For other drivers the building blocks are split out, see the documentation for these functions.h]hXHOn the upside the precise state tracking of atomic simplifies system suspend and resume a lot. For drivers using drm_mode_config_reset() a complete recipe is implemented in drm_atomic_helper_suspend() and drm_atomic_helper_resume(). For other drivers the building blocks are split out, see the documentation for these functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:74: ./drivers/gpu/drm/drm_atomic_state_helper.chK8hjhhubeh}(h]%atomic-state-reset-and-initializationah ]h"]%atomic state reset and initializationah$]h&]uh1hhj:hhhhhKHubh)}(hhh](h)}(hAtomic State Helper Referenceh]hAtomic State Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1__drm_atomic_helper_crtc_state_reset (C function)&c.__drm_atomic_helper_crtc_state_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hdvoid __drm_atomic_helper_crtc_state_reset (struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h]j)}(hcvoid __drm_atomic_helper_crtc_state_reset(struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKBubj)}(h$__drm_atomic_helper_crtc_state_reseth]j)}(h$__drm_atomic_helper_crtc_state_reseth]h$__drm_atomic_helper_crtc_state_reset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKBubj)}(h:(struct drm_crtc_state *crtc_state, struct drm_crtc *crtc)h](j)}(h!struct drm_crtc_state *crtc_stateh](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjNmodnameN classnameNjj)}j]j)}jjsb&c.__drm_atomic_helper_crtc_state_resetasbuh1hhj*ubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj+)}(hj9h]h*}(hjzhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj*ubj)}(h crtc_stateh]h crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jh&c.__drm_atomic_helper_crtc_state_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKBubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKBubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKBhjhhubj)}(hhh]h)}(hreset the CRTC stateh]hreset the CRTC state}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKBhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKBubeh}(h]h ](jfunctioneh"]h$]h&]jjjj9jj9jjjuh1jhhhjhNhNubj)}(hX%**Parameters** ``struct drm_crtc_state *crtc_state`` atomic CRTC state, must not be NULL ``struct drm_crtc *crtc`` CRTC object, must not be NULL **Description** Initializes the newly allocated **crtc_state** with default values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j%)}(hjCh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKFhj=ubji)}(hhh](jn)}(hJ``struct drm_crtc_state *crtc_state`` atomic CRTC state, must not be NULL h](jt)}(h%``struct drm_crtc_state *crtc_state``h]jz)}(hjbh]h!struct drm_crtc_state *crtc_state}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKChj\ubj)}(hhh]h)}(h#atomic CRTC state, must not be NULLh]h#atomic CRTC state, must not be NULL}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhKChjxubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jmhjwhKChjYubjn)}(h8``struct drm_crtc *crtc`` CRTC object, must not be NULL h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKDhjubj)}(hhh]h)}(hCRTC object, must not be NULLh]hCRTC object, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKDhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKDhjYubeh}(h]h ]h"]h$]h&]uh1jhhj=ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKFhj=ubh)}(h|Initializes the newly allocated **crtc_state** with default values. This is useful for drivers that subclass the CRTC state.h](h Initializes the newly allocated }(hjhhhNhNubj%)}(h**crtc_state**h]h crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhN with default values. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKEhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+__drm_atomic_helper_crtc_reset (C function) c.__drm_atomic_helper_crtc_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(h^void __drm_atomic_helper_crtc_reset (struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h]j)}(h]void __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h](j)}(hvoidh]hvoid}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKRubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhj;hKRubj)}(h__drm_atomic_helper_crtc_reseth]j)}(h__drm_atomic_helper_crtc_reseth]h__drm_atomic_helper_crtc_reset}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ](jjeh"]h$]h&]jjuh1jhj)hhhj;hKRubj)}(h:(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjPsb c.__drm_atomic_helper_crtc_resetasbuh1hhjfubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjfubj)}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubj)}(h!struct drm_crtc_state *crtc_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.__drm_atomic_helper_crtc_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h crtc_stateh]h crtc_state}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubeh}(h]h ]h"]h$]h&]jjuh1jhj)hhhj;hKRubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj%hhhj;hKRubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj;hKRhj"hhubj)}(hhh]h)}(hreset state on CRTCh]hreset state on CRTC}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKRhjZhhubah}(h]h ]h"]h$]h&]uh1jhj"hhhj;hKRubeh}(h]h ](jfunctioneh"]h$]h&]jjjjujjujjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_crtc *crtc`` drm CRTC ``struct drm_crtc_state *crtc_state`` CRTC state to assign **Description** Initializes the newly allocated **crtc_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **crtc**, usually required when initializing the drivers or when called from the :c:type:`drm_crtc_funcs.reset ` hook. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKVhjyubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` drm CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKShjubj)}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKShjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKShjubjn)}(h;``struct drm_crtc_state *crtc_state`` CRTC state to assign h](jt)}(h%``struct drm_crtc_state *crtc_state``h]jz)}(hjh]h!struct drm_crtc_state *crtc_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKThjubj)}(hhh]h)}(hCRTC state to assignh]hCRTC state to assign}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKThjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKThjubeh}(h]h ]h"]h$]h&]uh1jhhjyubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKVhjyubh)}(hInitializes the newly allocated **crtc_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **crtc**, usually required when initializing the drivers or when called from the :c:type:`drm_crtc_funcs.reset ` hook.h](h Initializes the newly allocated }(hj(hhhNhNubj%)}(h**crtc_state**h]h crtc_state}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubh and assigns it to the }(hj(hhhNhNubh)}(h$:c:type:`drm_crtc->state `h]jz)}(hjDh]hdrm_crtc->state}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtcuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKUhj(ubh pointer of }(hj(hhhNhNubj%)}(h**crtc**h]hcrtc}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubhI, usually required when initializing the drivers or when called from the }(hj(hhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]jz)}(hjzh]hdrm_crtc_funcs.reset}(hj|hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhjahKUhj(ubh hook.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahKUhjyubh)}(h8This is useful for drivers that subclass the CRTC state.h]h8This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKZhjyubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_atomic_helper_crtc_reset (C function)c.drm_atomic_helper_crtc_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(h9void drm_atomic_helper_crtc_reset (struct drm_crtc *crtc)h]j)}(h8void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKlubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKlubj)}(hdrm_atomic_helper_crtc_reseth]j)}(hdrm_atomic_helper_crtc_reseth]hdrm_atomic_helper_crtc_reset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKlubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj-modnameN classnameNjj)}j]j)}jjsbc.drm_atomic_helper_crtc_resetasbuh1hhj ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjYhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hcrtch]hcrtc}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKlubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKlubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKlhjhhubj)}(hhh]h)}(hFdefault :c:type:`drm_crtc_funcs.reset ` hook for CRTCsh](hdefault }(hjhhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]jz)}(hjh]hdrm_crtc_funcs.reset}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jGc.drm_atomic_helper_crtc_resetasbjdrm_crtc_funcsuh1hhjhKBhjubh hook for CRTCs}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKlhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKlubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC **Description** Resets the atomic state for **crtc** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKphjubji)}(hhh]jn)}(h#``struct drm_crtc *crtc`` drm CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKmhjubj)}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKmhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKmhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj4h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKohjubh)}(hResets the atomic state for **crtc** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hjJhhhNhNubj%)}(h**crtc**h]hcrtc}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKnhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5__drm_atomic_helper_crtc_duplicate_state (C function)*c.__drm_atomic_helper_crtc_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hcvoid __drm_atomic_helper_crtc_duplicate_state (struct drm_crtc *crtc, struct drm_crtc_state *state)h]j)}(hbvoid __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(h(__drm_atomic_helper_crtc_duplicate_stateh]j)}(h(__drm_atomic_helper_crtc_duplicate_stateh]h(__drm_atomic_helper_crtc_duplicate_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h5(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb*c.__drm_atomic_helper_crtc_duplicate_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_crtc_state *stateh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]j*c.__drm_atomic_helper_crtc_duplicate_stateasbuh1hhj6ubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]j~ah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(hcopy atomic CRTC stateh]hcopy atomic CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_crtc *crtc`` CRTC object ``struct drm_crtc_state *state`` atomic CRTC state **Description** Copies atomic state from a CRTC's current state and resets inferred values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubji)}(hhh](jn)}(h&``struct drm_crtc *crtc`` CRTC object h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj)}(hhh]h)}(h CRTC objecth]h CRTC object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h3``struct drm_crtc_state *state`` atomic CRTC state h](jt)}(h ``struct drm_crtc_state *state``h]jz)}(hj5h]hstruct drm_crtc_state *state}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj/ubj)}(hhh]h)}(hatomic CRTC stateh]hatomic CRTC state}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhKhjKubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhjJhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjph]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(hCopies atomic state from a CRTC's current state and resets inferred values. This is useful for drivers that subclass the CRTC state.h]hCopies atomic state from a CRTC’s current state and resets inferred values. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_atomic_helper_crtc_duplicate_state (C function)(c.drm_atomic_helper_crtc_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hVstruct drm_crtc_state * drm_atomic_helper_crtc_duplicate_state (struct drm_crtc *crtc)h]j)}(hTstruct drm_crtc_state *drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j&drm_atomic_helper_crtc_duplicate_statesb(c.drm_atomic_helper_crtc_duplicate_stateasbuh1hhjhhhjhKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhKubj)}(h&drm_atomic_helper_crtc_duplicate_stateh]j)}(hjh]h&drm_atomic_helper_crtc_duplicate_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjOmodnameN classnameNjj)}j]j(c.drm_atomic_helper_crtc_duplicate_stateasbuh1hhj+ubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj+)}(hj9h]h*}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj+ubj)}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC **Description** Default CRTC state duplicate hook for drivers which don't have their own subclassed CRTC state structure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubji)}(hhh]jn)}(h#``struct drm_crtc *crtc`` drm CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj)}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj,h]h Description}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubh)}(hiDefault CRTC state duplicate hook for drivers which don't have their own subclassed CRTC state structure.h]hkDefault CRTC state duplicate hook for drivers which don’t have their own subclassed CRTC state structure.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3__drm_atomic_helper_crtc_destroy_state (C function)(c.__drm_atomic_helper_crtc_destroy_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hJvoid __drm_atomic_helper_crtc_destroy_state (struct drm_crtc_state *state)h]j)}(hIvoid __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhjhKubj)}(h&__drm_atomic_helper_crtc_destroy_stateh]j)}(h&__drm_atomic_helper_crtc_destroy_stateh]h&__drm_atomic_helper_crtc_destroy_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjmhhhjhKubj)}(h(struct drm_crtc_state *state)h]j)}(hstruct drm_crtc_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb(c.__drm_atomic_helper_crtc_destroy_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjmhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjihhhjhKubah}(h]jdah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjfhhubj)}(hhh]h)}(hrelease CRTC stateh]hrelease CRTC state}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj.hhubah}(h]h ]h"]h$]h&]uh1jhjfhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjIjjIjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_crtc_state *state`` CRTC state object to release **Description** Releases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j%)}(hjSh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjMubji)}(hhh]jn)}(h>``struct drm_crtc_state *state`` CRTC state object to release h](jt)}(h ``struct drm_crtc_state *state``h]jz)}(hjrh]hstruct drm_crtc_state *state}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjlubj)}(hhh]h)}(hCRTC state object to releaseh]hCRTC state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjiubah}(h]h ]h"]h$]h&]uh1jhhjMubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjMubh)}(hReleases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.h]hReleases all resources stored in the CRTC state without actually freeing the memory of the CRTC state. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_atomic_helper_crtc_destroy_state (C function)&c.drm_atomic_helper_crtc_destroy_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(h_void drm_atomic_helper_crtc_destroy_state (struct drm_crtc *crtc, struct drm_crtc_state *state)h]j)}(h^void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(h$drm_atomic_helper_crtc_destroy_stateh]j)}(h$drm_atomic_helper_crtc_destroy_stateh]h$drm_atomic_helper_crtc_destroy_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h5(struct drm_crtc *crtc, struct drm_crtc_state *state)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjOmodnameN classnameNjj)}j]j)}jjsb&c.drm_atomic_helper_crtc_destroy_stateasbuh1hhj+ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj+)}(hj9h]h*}(hj{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj+ubj)}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubj)}(hstruct drm_crtc_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]ji&c.drm_atomic_helper_crtc_destroy_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_crtc *crtc`` drm CRTC ``struct drm_crtc_state *state`` CRTC state object to release **Description** Default CRTC state destroy hook for drivers which don't have their own subclassed CRTC state structure.h](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj>ubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` drm CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjch]hstruct drm_crtc *crtc}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj]ubj)}(hhh]h)}(hdrm CRTCh]hdrm CRTC}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhKhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhKhjZubjn)}(h>``struct drm_crtc_state *state`` CRTC state object to release h](jt)}(h ``struct drm_crtc_state *state``h]jz)}(hjh]hstruct drm_crtc_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj)}(hhh]h)}(hCRTC state object to releaseh]hCRTC state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjZubeh}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj>ubh)}(hgDefault CRTC state destroy hook for drivers which don't have their own subclassed CRTC state structure.h]hiDefault CRTC state destroy hook for drivers which don’t have their own subclassed CRTC state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2__drm_atomic_helper_plane_state_reset (C function)'c.__drm_atomic_helper_plane_state_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hivoid __drm_atomic_helper_plane_state_reset (struct drm_plane_state *plane_state, struct drm_plane *plane)h]j)}(hhvoid __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state, struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj*hKubj)}(h%__drm_atomic_helper_plane_state_reseth]j)}(h%__drm_atomic_helper_plane_state_reseth]h%__drm_atomic_helper_plane_state_reset}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj*hKubj)}(h>(struct drm_plane_state *plane_state, struct drm_plane *plane)h](j)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjymodnameN classnameNjj)}j]j)}jj?sb'c.__drm_atomic_helper_plane_state_resetasbuh1hhjUubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjUubj)}(h plane_stateh]h plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjQubj)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j'c.__drm_atomic_helper_plane_state_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjQubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj*hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj*hKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj*hKhjhhubj)}(hhh]h)}(h$resets plane state to default valuesh]h$resets plane state to default values}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjIhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj*hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjdjjdjjjuh1jhhhjhNhNubj)}(hX,**Parameters** ``struct drm_plane_state *plane_state`` atomic plane state, must not be NULL ``struct drm_plane *plane`` plane object, must not be NULL **Description** Initializes the newly allocated **plane_state** with default values. This is useful for drivers that subclass the CRTC state.h](h)}(h**Parameters**h]j%)}(hjnh]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhubji)}(hhh](jn)}(hM``struct drm_plane_state *plane_state`` atomic plane state, must not be NULL h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hjh]h#struct drm_plane_state *plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj)}(hhh]h)}(h$atomic plane state, must not be NULLh]h$atomic plane state, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h;``struct drm_plane *plane`` plane object, must not be NULL h](jt)}(h``struct drm_plane *plane``h]jz)}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjubj)}(hhh]h)}(hplane object, must not be NULLh]hplane object, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjhubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhubh)}(h}Initializes the newly allocated **plane_state** with default values. This is useful for drivers that subclass the CRTC state.h](h Initializes the newly allocated }(hjhhhNhNubj%)}(h**plane_state**h]h plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhN with default values. This is useful for drivers that subclass the CRTC state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chKhjhubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,__drm_atomic_helper_plane_reset (C function)!c.__drm_atomic_helper_plane_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hcvoid __drm_atomic_helper_plane_reset (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j)}(hbvoid __drm_atomic_helper_plane_reset(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM.ubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhjfhM.ubj)}(h__drm_atomic_helper_plane_reseth]j)}(h__drm_atomic_helper_plane_reseth]h__drm_atomic_helper_plane_reset}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ](jjeh"]h$]h&]jjuh1jhjThhhjfhM.ubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj{sb!c.__drm_atomic_helper_plane_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'modnameN classnameNjj)}j]j!c.__drm_atomic_helper_plane_resetasbuh1hhjubj)}(h h]h }(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjQhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h plane_stateh]h plane_state}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjThhhjfhM.ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjPhhhjfhM.ubah}(h]jKah ](jjeh"]h$]h&]jj)jhuh1jhjfhM.hjMhhubj)}(hhh]h)}(hreset state on planeh]hreset state on plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM.hjhhubah}(h]h ]h"]h$]h&]uh1jhjMhhhjfhM.ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_plane *plane`` drm plane ``struct drm_plane_state *plane_state`` plane state to assign **Description** Initializes the newly allocated **plane_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **plane**, usually required when initializing the drivers or when called from the :c:type:`drm_plane_funcs.reset ` hook. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM2hjubji)}(hhh](jn)}(h&``struct drm_plane *plane`` drm plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM/hjubj)}(hhh]h)}(h drm planeh]h drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM/hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM/hjubjn)}(h>``struct drm_plane_state *plane_state`` plane state to assign h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hjh]h#struct drm_plane_state *plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM0hjubj)}(hhh]h)}(hplane state to assignh]hplane state to assign}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM0hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM0hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj=h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM2hjubh)}(hInitializes the newly allocated **plane_state** and assigns it to the :c:type:`drm_crtc->state ` pointer of **plane**, usually required when initializing the drivers or when called from the :c:type:`drm_plane_funcs.reset ` hook.h](h Initializes the newly allocated }(hjShhhNhNubj%)}(h**plane_state**h]h plane_state}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjSubh and assigns it to the }(hjShhhNhNubh)}(h$:c:type:`drm_crtc->state `h]jz)}(hjoh]hdrm_crtc->state}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtcuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM1hjSubh pointer of }(hjShhhNhNubj%)}(h **plane**h]hplane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjSubhI, usually required when initializing the drivers or when called from the }(hjShhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]jz)}(hjh]hdrm_plane_funcs.reset}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhjhM1hjSubh hook.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM1hjubh)}(h9This is useful for drivers that subclass the plane state.h]h9This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM6hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_atomic_helper_plane_reset (C function)c.drm_atomic_helper_plane_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(h` hook for planesh](hdefault }(hjhhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]jz)}(hjh]hdrm_plane_funcs.reset}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jrc.drm_atomic_helper_plane_resetasbjdrm_plane_funcsuh1hhjhKBhjubh hook for planes}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMDhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMDubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_plane *plane`` drm plane **Description** Resets the atomic state for **plane** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMHhjubji)}(hhh]jn)}(h&``struct drm_plane *plane`` drm plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hj$h]hstruct drm_plane *plane}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMEhjubj)}(hhh]h)}(h drm planeh]h drm plane}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMEhj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj9hMEhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMGhjubh)}(hResets the atomic state for **plane** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hjuhhhNhNubj%)}(h **plane**h]hplane}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjuubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMFhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6__drm_atomic_helper_plane_duplicate_state (C function)+c.__drm_atomic_helper_plane_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hgvoid __drm_atomic_helper_plane_duplicate_state (struct drm_plane *plane, struct drm_plane_state *state)h]j)}(hfvoid __drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMWubj)}(h)__drm_atomic_helper_plane_duplicate_stateh]j)}(h)__drm_atomic_helper_plane_duplicate_stateh]h)__drm_atomic_helper_plane_duplicate_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMWubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb+c.__drm_atomic_helper_plane_duplicate_stateasbuh1hhjubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_plane_state *stateh](j)}(hjh]hstruct}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j-+c.__drm_atomic_helper_plane_duplicate_stateasbuh1hhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjaubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMWubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMWubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMWhjhhubj)}(hhh]h)}(hcopy atomic plane stateh]hcopy atomic plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMWhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMWubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_plane *plane`` plane object ``struct drm_plane_state *state`` atomic plane state **Description** Copies atomic state from a plane's current state. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM[hjubji)}(hhh](jn)}(h)``struct drm_plane *plane`` plane object h](jt)}(h``struct drm_plane *plane``h]jz)}(hj'h]hstruct drm_plane *plane}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMXhj!ubj)}(hhh]h)}(h plane objecth]h plane object}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hMXhj=ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj<hMXhjubjn)}(h5``struct drm_plane_state *state`` atomic plane state h](jt)}(h!``struct drm_plane_state *state``h]jz)}(hj`h]hstruct drm_plane_state *state}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMYhjZubj)}(hhh]h)}(hatomic plane stateh]hatomic plane state}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMYhjvubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jmhjuhMYhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM[hjubh)}(hkCopies atomic state from a plane's current state. This is useful for drivers that subclass the plane state.h]hmCopies atomic state from a plane’s current state. This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMZhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_atomic_helper_plane_duplicate_state (C function))c.drm_atomic_helper_plane_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hZstruct drm_plane_state * drm_atomic_helper_plane_duplicate_state (struct drm_plane *plane)h]j)}(hXstruct drm_plane_state *drm_atomic_helper_plane_duplicate_state(struct drm_plane *plane)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMnubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMnubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j'drm_atomic_helper_plane_duplicate_statesb)c.drm_atomic_helper_plane_duplicate_stateasbuh1hhjhhhjhMnubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMnubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMnubj)}(h'drm_atomic_helper_plane_duplicate_stateh]j)}(hjh]h'drm_atomic_helper_plane_duplicate_state}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMnubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjzmodnameN classnameNjj)}j]j)c.drm_atomic_helper_plane_duplicate_stateasbuh1hhjVubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjVubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMnubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMnubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMnhjhhubj)}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMnhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMnubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_plane *plane`` drm plane **Description** Default plane state duplicate hook for drivers which don't have their own subclassed plane state structure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMrhjubji)}(hhh]jn)}(h&``struct drm_plane *plane`` drm plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMohjubj)}(hhh]h)}(h drm planeh]h drm plane}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMohj2ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj1hMohjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjWh]h Description}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMqhjubh)}(hkDefault plane state duplicate hook for drivers which don't have their own subclassed plane state structure.h]hmDefault plane state duplicate hook for drivers which don’t have their own subclassed plane state structure.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMphjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4__drm_atomic_helper_plane_destroy_state (C function))c.__drm_atomic_helper_plane_destroy_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hLvoid __drm_atomic_helper_plane_destroy_state (struct drm_plane_state *state)h]j)}(hKvoid __drm_atomic_helper_plane_destroy_state(struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h'__drm_atomic_helper_plane_destroy_stateh]j)}(h'__drm_atomic_helper_plane_destroy_stateh]h'__drm_atomic_helper_plane_destroy_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_plane_state *state)h]j)}(hstruct drm_plane_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb)c.__drm_atomic_helper_plane_destroy_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hrelease plane stateh]hrelease plane state}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjYhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjtjjtjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_plane_state *state`` plane state object to release **Description** Releases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.h](h)}(h**Parameters**h]j%)}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjxubji)}(hhh]jn)}(h@``struct drm_plane_state *state`` plane state object to release h](jt)}(h!``struct drm_plane_state *state``h]jz)}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(hplane state object to releaseh]hplane state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjxubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjxubh)}(hReleases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.h]hReleases all resources stored in the plane state without actually freeing the memory of the plane state. This is useful for drivers that subclass the plane state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_atomic_helper_plane_destroy_state (C function)'c.drm_atomic_helper_plane_destroy_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hcvoid drm_atomic_helper_plane_destroy_state (struct drm_plane *plane, struct drm_plane_state *state)h]j)}(hbvoid drm_atomic_helper_plane_destroy_state(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj+hMubj)}(h%drm_atomic_helper_plane_destroy_stateh]j)}(h%drm_atomic_helper_plane_destroy_stateh]h%drm_atomic_helper_plane_destroy_state}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj+hMubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjzmodnameN classnameNjj)}j]j)}jj@sb'c.drm_atomic_helper_plane_destroy_stateasbuh1hhjVubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjVubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRubj)}(hstruct drm_plane_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j'c.drm_atomic_helper_plane_destroy_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj+hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj+hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj+hMhjhhubj)}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjJhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj+hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjejjejjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_plane *plane`` drm plane ``struct drm_plane_state *state`` plane state object to release **Description** Default plane state destroy hook for drivers which don't have their own subclassed plane state structure.h](h)}(h**Parameters**h]j%)}(hjoh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjiubji)}(hhh](jn)}(h&``struct drm_plane *plane`` drm plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(h drm planeh]h drm plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h@``struct drm_plane_state *state`` plane state object to release h](jt)}(h!``struct drm_plane_state *state``h]jz)}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(hplane state object to releaseh]hplane state object to release}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjiubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjiubh)}(hiDefault plane state destroy hook for drivers which don't have their own subclassed plane state structure.h]hkDefault plane state destroy hook for drivers which don’t have their own subclassed plane state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6__drm_atomic_helper_connector_state_reset (C function)+c.__drm_atomic_helper_connector_state_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hxvoid __drm_atomic_helper_connector_state_reset (struct drm_connector_state *conn_state, struct drm_connector *connector)h]j)}(hwvoid __drm_atomic_helper_connector_state_reset(struct drm_connector_state *conn_state, struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjChhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjChhhjUhMubj)}(h)__drm_atomic_helper_connector_state_reseth]j)}(h)__drm_atomic_helper_connector_state_reseth]h)__drm_atomic_helper_connector_state_reset}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ](jjeh"]h$]h&]jjuh1jhjChhhjUhMubj)}(hI(struct drm_connector_state *conn_state, struct drm_connector *connector)h](j)}(h&struct drm_connector_state *conn_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjjsb+c.__drm_atomic_helper_connector_state_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubj)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j+c.__drm_atomic_helper_connector_state_resetasbuh1hhjubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj@hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubeh}(h]h ]h"]h$]h&]jjuh1jhjChhhjUhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj?hhhjUhMubah}(h]j:ah ](jjeh"]h$]h&]jj)jhuh1jhjUhMhj<hhubj)}(hhh]h)}(hreset the connector stateh]hreset the connector state}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjthhubah}(h]h ]h"]h$]h&]uh1jhj<hhhjUhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXD**Parameters** ``struct drm_connector_state *conn_state`` atomic connector state, must not be NULL ``struct drm_connector *connector`` connectotr object, must not be NULL **Description** Initializes the newly allocated **conn_state** with default values. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh](jn)}(hT``struct drm_connector_state *conn_state`` atomic connector state, must not be NULL h](jt)}(h*``struct drm_connector_state *conn_state``h]jz)}(hjh]h&struct drm_connector_state *conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(h(atomic connector state, must not be NULLh]h(atomic connector state, must not be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hH``struct drm_connector *connector`` connectotr object, must not be NULL h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(h#connectotr object, must not be NULLh]h#connectotr object, must not be NULL}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj,h]h Description}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hInitializes the newly allocated **conn_state** with default values. This is useful for drivers that subclass the connector state.h](h Initializes the newly allocated }(hjBhhhNhNubj%)}(h**conn_state**h]h conn_state}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubhS with default values. This is useful for drivers that subclass the connector state.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0__drm_atomic_helper_connector_reset (C function)%c.__drm_atomic_helper_connector_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hrvoid __drm_atomic_helper_connector_reset (struct drm_connector *connector, struct drm_connector_state *conn_state)h]j)}(hqvoid __drm_atomic_helper_connector_reset(struct drm_connector *connector, struct drm_connector_state *conn_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h#__drm_atomic_helper_connector_reseth]j)}(h#__drm_atomic_helper_connector_reseth]h#__drm_atomic_helper_connector_reset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hI(struct drm_connector *connector, struct drm_connector_state *conn_state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb%c.__drm_atomic_helper_connector_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjRmodnameN classnameNjj)}j]j%c.__drm_atomic_helper_connector_resetasbuh1hhj.ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj+)}(hj9h]h*}(hj|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj.ubj)}(h conn_stateh]h conn_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj{hhhjhMubah}(h]jvah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjxhhubj)}(hhh]h)}(hreset state on connectorh]hreset state on connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjxhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` drm connector ``struct drm_connector_state *conn_state`` connector state to assign **Description** Initializes the newly allocated **conn_state** and assigns it to the :c:type:`drm_connector->state ` pointer of **connector**, usually required when initializing the drivers or when called from the :c:type:`drm_connector_funcs.reset ` hook. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh](jn)}(h2``struct drm_connector *connector`` drm connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(h drm connectorh]h drm connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjubjn)}(hE``struct drm_connector_state *conn_state`` connector state to assign h](jt)}(h*``struct drm_connector_state *conn_state``h]jz)}(hj-h]h&struct drm_connector_state *conn_state}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj'ubj)}(hhh]h)}(hconnector state to assignh]hconnector state to assign}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjCubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhjBhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjhh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hXInitializes the newly allocated **conn_state** and assigns it to the :c:type:`drm_connector->state ` pointer of **connector**, usually required when initializing the drivers or when called from the :c:type:`drm_connector_funcs.reset ` hook.h](h Initializes the newly allocated }(hj~hhhNhNubj%)}(h**conn_state**h]h conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubh and assigns it to the }(hj~hhhNhNubh)}(h.:c:type:`drm_connector->state `h]jz)}(hjh]hdrm_connector->state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj~ubh pointer of }(hj~hhhNhNubj%)}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubhI, usually required when initializing the drivers or when called from the }(hj~hhhNhNubh)}(h9:c:type:`drm_connector_funcs.reset `h]jz)}(hjh]hdrm_connector_funcs.reset}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_funcsuh1hhjhMhj~ubh hook.}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h=This is useful for drivers that subclass the connector state.h]h=This is useful for drivers that subclass the connector state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_atomic_helper_connector_reset (C function)#c.drm_atomic_helper_connector_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hHvoid drm_atomic_helper_connector_reset (struct drm_connector *connector)h]j)}(hGvoid drm_atomic_helper_connector_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhj4hMubj)}(h!drm_atomic_helper_connector_reseth]j)}(h!drm_atomic_helper_connector_reseth]h!drm_atomic_helper_connector_reset}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubah}(h]h ](jjeh"]h$]h&]jjuh1jhj"hhhj4hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjIsb#c.drm_atomic_helper_connector_resetasbuh1hhj_ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj_ubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[ubah}(h]h ]h"]h$]h&]jjuh1jhj"hhhj4hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj4hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj4hMhjhhubj)}(hhh]h)}(hUdefault :c:type:`drm_connector_funcs.reset ` hook for connectorsh](hdefault }(hjhhhNhNubh)}(h9:c:type:`drm_connector_funcs.reset `h]jz)}(hjh]hdrm_connector_funcs.reset}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j#c.drm_atomic_helper_connector_resetasbjdrm_connector_funcsuh1hhjhKBhjubh hook for connectors}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj4hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj&jj&jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_connector *connector`` drm connector **Description** Resets the atomic state for **connector** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](h)}(h**Parameters**h]j%)}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj*ubji)}(hhh]jn)}(h2``struct drm_connector *connector`` drm connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjOh]hstruct drm_connector *connector}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjIubj)}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjdhMhjFubah}(h]h ]h"]h$]h&]uh1jhhj*ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj*ubh)}(hResets the atomic state for **connector** by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.h](hResets the atomic state for }(hjhhhNhNubj%)}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhv by freeing the state pointer (which might be NULL, e.g. at driver load time) and allocating a new empty state object.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j9drm_atomic_helper_connector_tv_margins_reset (C function).c.drm_atomic_helper_connector_tv_margins_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hSvoid drm_atomic_helper_connector_tv_margins_reset (struct drm_connector *connector)h]j)}(hRvoid drm_atomic_helper_connector_tv_margins_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h,drm_atomic_helper_connector_tv_margins_reseth]j)}(h,drm_atomic_helper_connector_tv_margins_reseth]h,drm_atomic_helper_connector_tv_margins_reset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj>modnameN classnameNjj)}j]j)}jjsb.c.drm_atomic_helper_connector_tv_margins_resetasbuh1hhjubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hResets TV connector propertiesh]hResets TV connector properties}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_connector *connector`` DRM connector **Description** Resets the TV-related properties attached to a connector.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh]jn)}(h2``struct drm_connector *connector`` DRM connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(h DRM connectorh]h DRM connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(h9Resets the TV-related properties attached to a connector.h]h9Resets the TV-related properties attached to a connector.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_atomic_helper_connector_tv_reset (C function)&c.drm_atomic_helper_connector_tv_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hKvoid drm_atomic_helper_connector_tv_reset (struct drm_connector *connector)h]j)}(hJvoid drm_atomic_helper_connector_tv_reset(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhjphMubj)}(h$drm_atomic_helper_connector_tv_reseth]j)}(h$drm_atomic_helper_connector_tv_reseth]h$drm_atomic_helper_connector_tv_reset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj^hhhjphMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb&c.drm_atomic_helper_connector_tv_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj^hhhjphMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjZhhhjphMubah}(h]jUah ](jjeh"]h$]h&]jj)jhuh1jhjphMhjWhhubj)}(hhh]h)}(h%Resets Analog TV connector propertiesh]h%Resets Analog TV connector properties}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjWhhhjphMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_connector *connector`` DRM connector **Description** Resets the analog TV properties attached to a connectorh](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj>ubji)}(hhh]jn)}(h2``struct drm_connector *connector`` DRM connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjch]hstruct drm_connector *connector}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj]ubj)}(hhh]h)}(h DRM connectorh]h DRM connector}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjZubah}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj>ubh)}(h7Resets the analog TV properties attached to a connectorh]h7Resets the analog TV properties attached to a connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_atomic_helper_connector_tv_check (C function)&c.drm_atomic_helper_connector_tv_checkhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hjint drm_atomic_helper_connector_tv_check (struct drm_connector *connector, struct drm_atomic_state *state)h]j)}(hiint drm_atomic_helper_connector_tv_check(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMDubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMDubj)}(h$drm_atomic_helper_connector_tv_checkh]j)}(h$drm_atomic_helper_connector_tv_checkh]h$drm_atomic_helper_connector_tv_check}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMDubj)}(hA(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@modnameN classnameNjj)}j]j)}jjsb&c.drm_atomic_helper_connector_tv_checkasbuh1hhjubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjlhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jZ&c.drm_atomic_helper_connector_tv_checkasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMDubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMDubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMDhjhhubj)}(hhh]h)}(h%Validate an analog TV connector stateh]h%Validate an analog TV connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMDhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMDubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhjhNhNubj)}(hX+**Parameters** ``struct drm_connector *connector`` DRM Connector ``struct drm_atomic_state *state`` the DRM State object **Description** Checks the state object to see if the requested state is valid for an analog TV connector. **Return** ``0`` for success, a negative error code on error.h](h)}(h**Parameters**h]j%)}(hj5h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMHhj/ubji)}(hhh](jn)}(h2``struct drm_connector *connector`` DRM Connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjTh]hstruct drm_connector *connector}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMEhjNubj)}(hhh]h)}(h DRM Connectorh]h DRM Connector}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMEhjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjihMEhjKubjn)}(h8``struct drm_atomic_state *state`` the DRM State object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMFhjubj)}(hhh]h)}(hthe DRM State objecth]hthe DRM State object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMFhjKubeh}(h]h ]h"]h$]h&]uh1jhhj/ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMHhj/ubh)}(hZChecks the state object to see if the requested state is valid for an analog TV connector.h]hZChecks the state object to see if the requested state is valid for an analog TV connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMGhj/ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMJhj/ubh)}(h2``0`` for success, a negative error code on error.h](jz)}(h``0``h]h0}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh- for success, a negative error code on error.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMKhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j:__drm_atomic_helper_connector_duplicate_state (C function)/c.__drm_atomic_helper_connector_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hwvoid __drm_atomic_helper_connector_duplicate_state (struct drm_connector *connector, struct drm_connector_state *state)h]j)}(hvvoid __drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMuubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhjPhMuubj)}(h-__drm_atomic_helper_connector_duplicate_stateh]j)}(h-__drm_atomic_helper_connector_duplicate_stateh]h-__drm_atomic_helper_connector_duplicate_state}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj>hhhjPhMuubj)}(hD(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjesb/c.__drm_atomic_helper_connector_duplicate_stateasbuh1hhj{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj{ubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjwubj)}(h!struct drm_connector_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j/c.__drm_atomic_helper_connector_duplicate_stateasbuh1hhjubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj;hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjwubeh}(h]h ]h"]h$]h&]jjuh1jhj>hhhjPhMuubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj:hhhjPhMuubah}(h]j5ah ](jjeh"]h$]h&]jj)jhuh1jhjPhMuhj7hhubj)}(hhh]h)}(hcopy atomic connector stateh]hcopy atomic connector state}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMuhjohhubah}(h]h ]h"]h$]h&]uh1jhj7hhhjPhMuubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX **Parameters** ``struct drm_connector *connector`` connector object ``struct drm_connector_state *state`` atomic connector state **Description** Copies atomic state from a connector's current state. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMyhjubji)}(hhh](jn)}(h5``struct drm_connector *connector`` connector object h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMvhjubj)}(hhh]h)}(hconnector objecth]hconnector object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMvhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMvhjubjn)}(h=``struct drm_connector_state *state`` atomic connector state h](jt)}(h%``struct drm_connector_state *state``h]jz)}(hjh]h!struct drm_connector_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMwhjubj)}(hhh]h)}(hatomic connector stateh]hatomic connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMwhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMwhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj'h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMyhjubh)}(hsCopies atomic state from a connector's current state. This is useful for drivers that subclass the connector state.h]huCopies atomic state from a connector’s current state. This is useful for drivers that subclass the connector state.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMxhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j8drm_atomic_helper_connector_duplicate_state (C function)-c.drm_atomic_helper_connector_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hjstruct drm_connector_state * drm_atomic_helper_connector_duplicate_state (struct drm_connector *connector)h]j)}(hhstruct drm_connector_state *drm_atomic_helper_connector_duplicate_state(struct drm_connector *connector)h](j)}(hjh]hstruct}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhjyhMubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j+drm_atomic_helper_connector_duplicate_statesb-c.drm_atomic_helper_connector_duplicate_stateasbuh1hhjhhhhjyhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhjyhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhhjyhMubj)}(h+drm_atomic_helper_connector_duplicate_stateh]j)}(hjh]h+drm_atomic_helper_connector_duplicate_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhhjyhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j-c.drm_atomic_helper_connector_duplicate_stateasbuh1hhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhhjyhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjdhhhjyhMubah}(h]j_ah ](jjeh"]h$]h&]jj)jhuh1jhjyhMhjahhubj)}(hhh]h)}(hdefault state duplicate hookh]hdefault state duplicate hook}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjdhhubah}(h]h ]h"]h$]h&]uh1jhjahhhjyhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_connector *connector`` drm connector **Description** Default connector state duplicate hook for drivers which don't have their own subclassed connector state structure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh]jn)}(h2``struct drm_connector *connector`` drm connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(h drm connectorh]h drm connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hsDefault connector state duplicate hook for drivers which don't have their own subclassed connector state structure.h]huDefault connector state duplicate hook for drivers which don’t have their own subclassed connector state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j8__drm_atomic_helper_connector_destroy_state (C function)-c.__drm_atomic_helper_connector_destroy_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hTvoid __drm_atomic_helper_connector_destroy_state (struct drm_connector_state *state)h]j)}(hSvoid __drm_atomic_helper_connector_destroy_state(struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhj6hMubj)}(h+__drm_atomic_helper_connector_destroy_stateh]j)}(h+__drm_atomic_helper_connector_destroy_stateh]h+__drm_atomic_helper_connector_destroy_state}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ](jjeh"]h$]h&]jjuh1jhj$hhhj6hMubj)}(h#(struct drm_connector_state *state)h]j)}(h!struct drm_connector_state *stateh](j)}(hjh]hstruct}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjKsb-c.__drm_atomic_helper_connector_destroy_stateasbuh1hhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjaubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj]ubah}(h]h ]h"]h$]h&]jjuh1jhj$hhhj6hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj6hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj6hMhjhhubj)}(hhh]h)}(hrelease connector stateh]hrelease connector state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj6hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_connector_state *state`` connector state object to release **Description** Releases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh]jn)}(hH``struct drm_connector_state *state`` connector state object to release h](jt)}(h%``struct drm_connector_state *state``h]jz)}(hj)h]h!struct drm_connector_state *state}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj#ubj)}(hhh]h)}(h!connector state object to releaseh]h!connector state object to release}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj>hMhj ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjdh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjbubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hReleases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.h]hReleases all resources stored in the connector state without actually freeing the memory of the connector state. This is useful for drivers that subclass the connector state.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6drm_atomic_helper_connector_destroy_state (C function)+c.drm_atomic_helper_connector_destroy_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hsvoid drm_atomic_helper_connector_destroy_state (struct drm_connector *connector, struct drm_connector_state *state)h]j)}(hrvoid drm_atomic_helper_connector_destroy_state(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h)drm_atomic_helper_connector_destroy_stateh]j)}(h)drm_atomic_helper_connector_destroy_stateh]h)drm_atomic_helper_connector_destroy_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hD(struct drm_connector *connector, struct drm_connector_state *state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb+c.drm_atomic_helper_connector_destroy_stateasbuh1hhjubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj2hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h!struct drm_connector_state *stateh](j)}(hjh]hstruct}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjxmodnameN classnameNjj)}j]j +c.drm_atomic_helper_connector_destroy_stateasbuh1hhjTubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjTubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hdefault state destroy hookh]hdefault state destroy hook}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` drm connector ``struct drm_connector_state *state`` connector state object to release **Description** Default connector state destroy hook for drivers which don't have their own subclassed connector state structure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh](jn)}(h2``struct drm_connector *connector`` drm connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(h drm connectorh]h drm connector}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj0ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjubjn)}(hH``struct drm_connector_state *state`` connector state object to release h](jt)}(h%``struct drm_connector_state *state``h]jz)}(hjSh]h!struct drm_connector_state *state}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjMubj)}(hhh]h)}(h!connector state object to releaseh]h!connector state object to release}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjhhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hqDefault connector state destroy hook for drivers which don't have their own subclassed connector state structure.h]hsDefault connector state destroy hook for drivers which don’t have their own subclassed connector state structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j<__drm_atomic_helper_private_obj_duplicate_state (C function)1c.__drm_atomic_helper_private_obj_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hsvoid __drm_atomic_helper_private_obj_duplicate_state (struct drm_private_obj *obj, struct drm_private_state *state)h]j)}(hrvoid __drm_atomic_helper_private_obj_duplicate_state(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h/__drm_atomic_helper_private_obj_duplicate_stateh]j)}(h/__drm_atomic_helper_private_obj_duplicate_stateh]h/__drm_atomic_helper_private_obj_duplicate_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h>(struct drm_private_obj *obj, struct drm_private_state *state)h](j)}(hstruct drm_private_obj *objh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_private_objh]hdrm_private_obj}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]j)}jjsb1c.__drm_atomic_helper_private_obj_duplicate_stateasbuh1hhj ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj\hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hobjh]hobj}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_private_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubh)}(hhh]j)}(hdrm_private_stateh]hdrm_private_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jJ1c.__drm_atomic_helper_private_obj_duplicate_stateasbuh1hhj~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hcopy atomic private stateh]hcopy atomic private state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX"**Parameters** ``struct drm_private_obj *obj`` CRTC object ``struct drm_private_state *state`` new private object state **Description** Copies atomic state from a private objects's current state and resets inferred values. This is useful for drivers that subclass the private state.h](h)}(h**Parameters**h]j%)}(hj%h]h Parameters}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh](jn)}(h,``struct drm_private_obj *obj`` CRTC object h](jt)}(h``struct drm_private_obj *obj``h]jz)}(hjDh]hstruct drm_private_obj *obj}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj>ubj)}(hhh]h)}(h CRTC objecth]h CRTC object}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jmhjYhMhj;ubjn)}(h=``struct drm_private_state *state`` new private object state h](jt)}(h#``struct drm_private_state *state``h]jz)}(hj}h]hstruct drm_private_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjwubj)}(hhh]h)}(hnew private object stateh]hnew private object state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj;ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hCopies atomic state from a private objects's current state and resets inferred values. This is useful for drivers that subclass the private state.h]hCopies atomic state from a private objects’s current state and resets inferred values. This is useful for drivers that subclass the private state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j7__drm_atomic_helper_bridge_duplicate_state (C function),c.__drm_atomic_helper_bridge_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hkvoid __drm_atomic_helper_bridge_duplicate_state (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j)}(hjvoid __drm_atomic_helper_bridge_duplicate_state(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMubj)}(h*__drm_atomic_helper_bridge_duplicate_stateh]j)}(h*__drm_atomic_helper_bridge_duplicate_stateh]h*__drm_atomic_helper_bridge_duplicate_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]j)}jj sb,c.__drm_atomic_helper_bridge_duplicate_stateasbuh1hhj6ubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubj)}(hstruct drm_bridge_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jt,c.__drm_atomic_helper_bridge_duplicate_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMhjhhubj)}(hhh]h)}(hCopy atomic bridge stateh]hCopy atomic bridge state}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj*hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjEjjEjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object ``struct drm_bridge_state *state`` atomic bridge state **Description** Copies atomic state from a bridge's current state and resets inferred values. This is useful for drivers that subclass the bridge state.h](h)}(h**Parameters**h]j%)}(hjOh]h Parameters}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjIubji)}(hhh](jn)}(h,``struct drm_bridge *bridge`` bridge object h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjnh]hstruct drm_bridge *bridge}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhubj)}(hhh]h)}(h bridge objecth]h bridge object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjeubjn)}(h7``struct drm_bridge_state *state`` atomic bridge state h](jt)}(h"``struct drm_bridge_state *state``h]jz)}(hjh]hstruct drm_bridge_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(hatomic bridge stateh]hatomic bridge state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjeubeh}(h]h ]h"]h$]h&]uh1jhhjIubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjIubh)}(hCopies atomic state from a bridge's current state and resets inferred values. This is useful for drivers that subclass the bridge state.h]hCopies atomic state from a bridge’s current state and resets inferred values. This is useful for drivers that subclass the bridge state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjIubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5drm_atomic_helper_bridge_duplicate_state (C function)*c.drm_atomic_helper_bridge_duplicate_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(h^struct drm_bridge_state * drm_atomic_helper_bridge_duplicate_state (struct drm_bridge *bridge)h]j)}(h\struct drm_bridge_state *drm_atomic_helper_bridge_duplicate_state(struct drm_bridge *bridge)h](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhj4hMubh)}(hhh]j)}(hdrm_bridge_stateh]hdrm_bridge_state}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjHmodnameN classnameNjj)}j]j)}j(drm_atomic_helper_bridge_duplicate_statesb*c.drm_atomic_helper_bridge_duplicate_stateasbuh1hhj#hhhj4hMubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhj4hMubj+)}(hj9h]h*}(hjuhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj#hhhj4hMubj)}(h(drm_atomic_helper_bridge_duplicate_stateh]j)}(hjdh]h(drm_atomic_helper_bridge_duplicate_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj#hhhj4hMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jb*c.drm_atomic_helper_bridge_duplicate_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj#hhhj4hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj4hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj4hMhjhhubj)}(hhh]h)}(hDuplicate a bridge state objecth]hDuplicate a bridge state object}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj4hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhjhNhNubj)}(hXM**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** Allocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_duplicate_state ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj>ubji)}(hhh]jn)}(h,``struct drm_bridge *bridge`` bridge object h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjch]hstruct drm_bridge *bridge}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj]ubj)}(hhh]h)}(h bridge objecth]h bridge object}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjZubah}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj>ubh)}(hAllocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_duplicate_state ` hook for bridges that don't subclass the bridge state.h](hAllocates a new bridge state and initializes it with the current bridge state values. This helper is meant to be used as a bridge }(hjhhhNhNubh)}(hD:c:type:`drm_bridge_funcs.atomic_duplicate_state `h]jz)}(hjh]h'drm_bridge_funcs.atomic_duplicate_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh9 hook for bridges that don’t subclass the bridge state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_atomic_helper_bridge_destroy_state (C function)(c.drm_atomic_helper_bridge_destroy_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hgvoid drm_atomic_helper_bridge_destroy_state (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j)}(hfvoid drm_atomic_helper_bridge_destroy_state(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h&drm_atomic_helper_bridge_destroy_stateh]j)}(h&drm_atomic_helper_bridge_destroy_stateh]h&drm_atomic_helper_bridge_destroy_state}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjcmodnameN classnameNjj)}j]j)}jj)sb(c.drm_atomic_helper_bridge_destroy_stateasbuh1hhj?ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj?ubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubj)}(hstruct drm_bridge_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j}(c.drm_atomic_helper_bridge_destroy_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hDestroy a bridge state objecth]hDestroy a bridge state object}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhj3hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjNjjNjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` the bridge this state refers to ``struct drm_bridge_state *state`` bridge state to destroy **Description** Destroys a bridge state previously created by :c:type:`drm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j%)}(hjXh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM hjRubji)}(hhh](jn)}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjwh]hstruct drm_bridge *bridge}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjqubj)}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjnubjn)}(h;``struct drm_bridge_state *state`` bridge state to destroy h](jt)}(h"``struct drm_bridge_state *state``h]jz)}(hjh]hstruct drm_bridge_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(hbridge state to destroyh]hbridge state to destroy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjnubeh}(h]h ]h"]h$]h&]uh1jhhjRubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM hjRubh)}(hX7Destroys a bridge state previously created by :c:type:`drm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state ` hook for bridges that don't subclass the bridge state.h](h.Destroys a bridge state previously created by }(hjhhhNhNubh)}(h:c:type:`drm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state `h]jz)}(hj h]hdrm_atomic_helper_bridge_reset`() or :c:type:`drm_atomic_helper_bridge_duplicate_state`(). This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_destroy_state}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM hjubh9 hook for bridges that don’t subclass the bridge state.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(hM hjRubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-__drm_atomic_helper_bridge_reset (C function)"c.__drm_atomic_helper_bridge_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(havoid __drm_atomic_helper_bridge_reset (struct drm_bridge *bridge, struct drm_bridge_state *state)h]j)}(h`void __drm_atomic_helper_bridge_reset(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hvoidh]hvoid}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOhhhjahMubj)}(h __drm_atomic_helper_bridge_reseth]j)}(h __drm_atomic_helper_bridge_reseth]h __drm_atomic_helper_bridge_reset}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ](jjeh"]h$]h&]jjuh1jhjOhhhjahMubj)}(h;(struct drm_bridge *bridge, struct drm_bridge_state *state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjvsb"c.__drm_atomic_helper_bridge_resetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_bridge_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_bridge_stateh]hdrm_bridge_state}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]j"c.__drm_atomic_helper_bridge_resetasbuh1hhjubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjLhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjOhhhjahMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjKhhhjahMubah}(h]jFah ](jjeh"]h$]h&]jj)jhuh1jhjahMhjHhhubj)}(hhh]h)}(h(Initialize a bridge state to its defaulth]h(Initialize a bridge state to its default}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjHhhhjahMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXg**Parameters** ``struct drm_bridge *bridge`` the bridge this state refers to ``struct drm_bridge_state *state`` bridge state to initialize **Description** Initializes the bridge state to default values. This is meant to be called by the bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that subclass the bridge state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubji)}(hhh](jn)}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h>``struct drm_bridge_state *state`` bridge state to initialize h](jt)}(h"``struct drm_bridge_state *state``h]jz)}(hjh]hstruct drm_bridge_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubj)}(hhh]h)}(hbridge state to initializeh]hbridge state to initialize}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj8h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjubh)}(hInitializes the bridge state to default values. This is meant to be called by the bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that subclass the bridge state.h](hYInitializes the bridge state to default values. This is meant to be called by the bridge }(hjNhhhNhNubh)}(h::c:type:`drm_bridge_funcs.atomic_reset `h]jz)}(hjXh]hdrm_bridge_funcs.atomic_reset}(hjZhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chMhjNubh1 hook for bridges that subclass the bridge state.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjuhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_atomic_helper_bridge_reset (C function) c.drm_atomic_helper_bridge_resethNtauh1jxhjhhhNhNubj)}(hhh](j)}(hTstruct drm_bridge_state * drm_atomic_helper_bridge_reset (struct drm_bridge *bridge)h]j)}(hRstruct drm_bridge_state *drm_atomic_helper_bridge_reset(struct drm_bridge *bridge)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM*ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM*ubh)}(hhh]j)}(hdrm_bridge_stateh]hdrm_bridge_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_atomic_helper_bridge_resetsb c.drm_atomic_helper_bridge_resetasbuh1hhjhhhjhM*ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM*ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhM*ubj)}(hdrm_atomic_helper_bridge_reseth]j)}(hjh]hdrm_atomic_helper_bridge_reset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM*ubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj' hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hj8 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5 ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj: modnameN classnameNjj)}j]j c.drm_atomic_helper_bridge_resetasbuh1hhj ubj)}(h h]h }(hjV hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjd hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hbridgeh]hbridge}(hjq hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM*ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM*ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM*hjhhubj)}(hhh]h)}(h5Allocate and initialize a bridge state to its defaulth]h5Allocate and initialize a bridge state to its default}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM*hj hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM*ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(hX@**Parameters** ``struct drm_bridge *bridge`` the bridge this state refers to **Description** Allocates the bridge state and initializes it to default values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that don't subclass the bridge state.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM.hj ubji)}(hhh]jn)}(h>``struct drm_bridge *bridge`` the bridge this state refers to h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hj h]hstruct drm_bridge *bridge}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM,hj ubj)}(hhh]h)}(hthe bridge this state refers toh]hthe bridge this state refers to}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM,hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hM,hj ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM.hj ubh)}(hAllocates the bridge state and initializes it to default values. This helper is meant to be used as a bridge :c:type:`drm_bridge_funcs.atomic_reset ` hook for bridges that don't subclass the bridge state.h](hmAllocates the bridge state and initializes it to default values. This helper is meant to be used as a bridge }(hj- hhhNhNubh)}(h::c:type:`drm_bridge_funcs.atomic_reset `h]jz)}(hj7 h]hdrm_bridge_funcs.atomic_reset}(hj9 hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj5 ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:80: ./drivers/gpu/drm/drm_atomic_state_helper.chM-hj- ubh9 hook for bridges that don’t subclass the bridge state.}(hj- hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjT hM-hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h]atomic-state-helper-referenceah ]h"]atomic state helper referenceah$]h&]uh1hhj:hhhhhKNubh)}(hhh](h)}(hGEM Atomic Helper Referenceh]hGEM Atomic Helper Reference}(hjq hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjn hhhhhKTubh)}(hThe GEM atomic helpers library implements generic atomic-commit functions for drivers that use GEM objects. Currently, it provides synchronization helpers, and plane state and framebuffer BO mappings for planes with shadow buffers.h]hThe GEM atomic helpers library implements generic atomic-commit functions for drivers that use GEM objects. Currently, it provides synchronization helpers, and plane state and framebuffer BO mappings for planes with shadow buffers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjn hhubh)}(hXBefore scanout, a plane's framebuffer needs to be synchronized with possible writers that draw into the framebuffer. All drivers should call drm_gem_plane_helper_prepare_fb() from their implementation of struct :c:type:`drm_plane_helper.prepare_fb ` . It sets the plane's fence from the framebuffer so that the DRM core can synchronize access automatically. drm_gem_plane_helper_prepare_fb() can also be used directly as implementation of prepare_fb.h](hBefore scanout, a plane’s framebuffer needs to be synchronized with possible writers that draw into the framebuffer. All drivers should call drm_gem_plane_helper_prepare_fb() from their implementation of struct }(hj hhhNhNubh)}(h8:c:type:`drm_plane_helper.prepare_fb `h]jz)}(hj h]hdrm_plane_helper.prepare_fb}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helperuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj ubh . It sets the plane’s fence from the framebuffer so that the DRM core can synchronize access automatically. drm_gem_plane_helper_prepare_fb() can also be used directly as implementation of prepare_fb.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hKhjn hhubj@)}(h#include struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., . prepare_fb = drm_gem_plane_helper_prepare_fb, };h]h#include struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., . prepare_fb = drm_gem_plane_helper_prepare_fb, };}hj sbah}(h]h ]h"]h$]h&]jjforcelanguagejhighlight_args}uh1j?hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjn hhubh)}(hXXA driver using a shadow buffer copies the content of the shadow buffers into the HW's framebuffer memory during an atomic update. This requires a mapping of the shadow buffer into kernel address space. The mappings cannot be established by commit-tail functions, such as atomic_update, as this would violate locking rules around dma_buf_vmap().h]hXZA driver using a shadow buffer copies the content of the shadow buffers into the HW’s framebuffer memory during an atomic update. This requires a mapping of the shadow buffer into kernel address space. The mappings cannot be established by commit-tail functions, such as atomic_update, as this would violate locking rules around dma_buf_vmap().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chK(hjn hhubh)}(hThe helpers for shadow-buffered planes establish and release mappings, and provide struct drm_shadow_plane_state, which stores the plane's mapping for commit-tail functions.h]hThe helpers for shadow-buffered planes establish and release mappings, and provide struct drm_shadow_plane_state, which stores the plane’s mapping for commit-tail functions.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chK.hjn hhubh)}(hShadow-buffered planes can easily be enabled by using the provided macros ``DRM_GEM_SHADOW_PLANE_FUNCS`` and ``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``. These macros set up the plane and plane-helper callbacks to point to the shadow-buffer helpers.h](hJShadow-buffered planes can easily be enabled by using the provided macros }(hj hhhNhNubjz)}(h``DRM_GEM_SHADOW_PLANE_FUNCS``h]hDRM_GEM_SHADOW_PLANE_FUNCS}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubh and }(hj hhhNhNubjz)}(h%``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``h]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubha. These macros set up the plane and plane-helper callbacks to point to the shadow-buffer helpers.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chK2hjn hhubj@)}(hX#include struct drm_plane_funcs driver_plane_funcs = { ..., DRM_GEM_SHADOW_PLANE_FUNCS, }; struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, };h]hX#include struct drm_plane_funcs driver_plane_funcs = { ..., DRM_GEM_SHADOW_PLANE_FUNCS, }; struct drm_plane_helper_funcs driver_plane_helper_funcs = { ..., DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, };}hj$ sbah}(h]h ]h"]h$]h&]jjj j jj }uh1j?hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chK7hjn hhubh)}(hIn the driver's atomic-update function, shadow-buffer mappings are available from the plane state. Use to_drm_shadow_plane_state() to upcast from struct drm_plane_state.h]hIn the driver’s atomic-update function, shadow-buffer mappings are available from the plane state. Use to_drm_shadow_plane_state() to upcast from struct drm_plane_state.}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chKEhjn hhubj@)}(hXrvoid driver_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state) { struct drm_plane_state *plane_state = plane->state; struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }h]hXrvoid driver_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *old_plane_state) { struct drm_plane_state *plane_state = plane->state; struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }}hjC sbah}(h]h ]h"]h$]h&]jjj j jj }uh1j?hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chKIhjn hhubh)}(hA mapping address for each of the framebuffer's buffer object is stored in struct :c:type:`drm_shadow_plane_state.map `. The mappings are valid while the state is being used.h](hTA mapping address for each of the framebuffer’s buffer object is stored in struct }(hjS hhhNhNubh)}(h=:c:type:`drm_shadow_plane_state.map `h]jz)}(hj] h]hdrm_shadow_plane_state.map}(hj_ hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj[ ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_shadow_plane_stateuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chKUhjS ubh7. The mappings are valid while the state is being used.}(hjS hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjz hKUhjn hhubh)}(hDrivers that use struct drm_simple_display_pipe can use ``DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS`` to initialize the rsp callbacks. Access to shadow-buffer mappings is similar to regular atomic_update.h](h8Drivers that use struct drm_simple_display_pipe can use }(hj hhhNhNubjz)}(h2``DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS``h]h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubhg to initialize the rsp callbacks. Access to shadow-buffer mappings is similar to regular atomic_update.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chKYhjn hhubj@)}(hXstruct drm_simple_display_pipe_funcs driver_pipe_funcs = { ..., DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS, }; void driver_pipe_enable(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state) { struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }h]hXstruct drm_simple_display_pipe_funcs driver_pipe_funcs = { ..., DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS, }; void driver_pipe_enable(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state) { struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); // access shadow buffer via shadow_plane_state->map }}hj sbah}(h]h ]h"]h$]h&]jjj j jj }uh1j?hk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:86: ./drivers/gpu/drm/drm_gem_atomic_helper.chK^hjn hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$DRM_SHADOW_PLANE_MAX_WIDTH (C macro)c.DRM_SHADOW_PLANE_MAX_WIDTHhNtauh1jxhjn hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhNubj)}(hhh](j)}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j)}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j)}(hDRM_SHADOW_PLANE_MAX_WIDTHh]j)}(hj h]hDRM_SHADOW_PLANE_MAX_WIDTH}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hKubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hKhj hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj hhhj hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1jhhhjn hj hNubh)}(h``DRM_SHADOW_PLANE_MAX_WIDTH``h]jz)}(hj h]hDRM_SHADOW_PLANE_MAX_WIDTH}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhjn hhubjT=)}(hX Maximum width of a plane's shadow buffer in pixels **Description** For drivers with shadow planes, the maximum width of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_width from DRM_SHADOW_PLANE_MAX_WIDTH. h](jT=)}(h3Maximum width of a plane's shadow buffer in pixels h]h)}(h2Maximum width of a plane's shadow buffer in pixelsh]h4Maximum width of a plane’s shadow buffer in pixels}(hj$ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhj ubah}(h]h ]h"]h$]h&]uh1jS=hj2 hKhj ubh)}(h**Description**h]j%)}(hj; h]h Description}(hj= hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9 ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhj ubh)}(hFor drivers with shadow planes, the maximum width of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_width from DRM_SHADOW_PLANE_MAX_WIDTH.h]hFor drivers with shadow planes, the maximum width of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_width from DRM_SHADOW_PLANE_MAX_WIDTH.}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhj ubeh}(h]h ]h"]h$]h&]uh1jS=hj2 hKhjn hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%DRM_SHADOW_PLANE_MAX_HEIGHT (C macro)c.DRM_SHADOW_PLANE_MAX_HEIGHThNtauh1jxhjn hhhj hNubj)}(hhh](j)}(hDRM_SHADOW_PLANE_MAX_HEIGHTh]j)}(hDRM_SHADOW_PLANE_MAX_HEIGHTh]j)}(hDRM_SHADOW_PLANE_MAX_HEIGHTh]j)}(hjy h]hDRM_SHADOW_PLANE_MAX_HEIGHT}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj{ hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK"ubah}(h]h ]h"]h$]h&]jjjuh1jjjhjw hhhj hK"ubah}(h]jr ah ](jjeh"]h$]h&]jj)jhuh1jhj hK"hjt hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjt hhhj hK"ubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1jhhhjn hj hNubh)}(h``DRM_SHADOW_PLANE_MAX_HEIGHT``h]jz)}(hj h]hDRM_SHADOW_PLANE_MAX_HEIGHT}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK$hjn hhubjT=)}(hX  Maximum height of a plane's shadow buffer in scanlines **Description** For drivers with shadow planes, the maximum height of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_height from DRM_SHADOW_PLANE_MAX_HEIGHT. h](jT=)}(h7Maximum height of a plane's shadow buffer in scanlines h]h)}(h6Maximum height of a plane's shadow buffer in scanlinesh]h8Maximum height of a plane’s shadow buffer in scanlines}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK"hj ubah}(h]h ]h"]h$]h&]uh1jS=hj hK"hj ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK$hj ubh)}(hFor drivers with shadow planes, the maximum height of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_height from DRM_SHADOW_PLANE_MAX_HEIGHT.h]hFor drivers with shadow planes, the maximum height of the framebuffer is usually independent from hardware limitations. Drivers can initialize struct drm_mode_config.max_height from DRM_SHADOW_PLANE_MAX_HEIGHT.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK#hj ubeh}(h]h ]h"]h$]h&]uh1jS=hj hK"hjn hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_shadow_plane_state (C struct)c.drm_shadow_plane_statehNtauh1jxhjn hhhj hNubj)}(hhh](j)}(hdrm_shadow_plane_stateh]j)}(hstruct drm_shadow_plane_stateh](j)}(hjh]hstruct}(hj. hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj* hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK*ubj)}(h h]h }(hj< hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj* hhhj; hK*ubj)}(hdrm_shadow_plane_stateh]j)}(hj( h]hdrm_shadow_plane_state}(hjN hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj* hhhj; hK*ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj& hhhj; hK*ubah}(h]j! ah ](jjeh"]h$]h&]jj)jhuh1jhj; hK*hj# hhubj)}(hhh]h)}(h*plane state for planes with shadow buffersh]h*plane state for planes with shadow buffers}(hjp hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK+hjm hhubah}(h]h ]h"]h$]h&]uh1jhj# hhhj; hK*ubeh}(h]h ](jstructeh"]h$]h&]jjjj jj jjjuh1jhhhjn hj hNubj)}(hXZ**Definition**:: struct drm_shadow_plane_state { struct drm_plane_state base; struct drm_format_conv_state fmtcnv_state; struct iosys_map map[DRM_FORMAT_MAX_PLANES]; struct iosys_map data[DRM_FORMAT_MAX_PLANES]; }; **Members** ``base`` plane state ``fmtcnv_state`` Format-conversion state Per-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion. ``map`` Mappings of the plane's framebuffer BOs in to kernel address space The memory mappings stored in map should be established in the plane's prepare_fb callback and removed in the cleanup_fb callback. ``data`` Address of each framebuffer BO's data The address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK/hj ubj@)}(hstruct drm_shadow_plane_state { struct drm_plane_state base; struct drm_format_conv_state fmtcnv_state; struct iosys_map map[DRM_FORMAT_MAX_PLANES]; struct iosys_map data[DRM_FORMAT_MAX_PLANES]; };h]hstruct drm_shadow_plane_state { struct drm_plane_state base; struct drm_format_conv_state fmtcnv_state; struct iosys_map map[DRM_FORMAT_MAX_PLANES]; struct iosys_map data[DRM_FORMAT_MAX_PLANES]; };}hj sbah}(h]h ]h"]h$]h&]jjuh1j?hg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK1hj ubh)}(h **Members**h]j%)}(hj h]hMembers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK8hj ubji)}(hhh](jn)}(h``base`` plane state h](jt)}(h``base``h]jz)}(hj h]hbase}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK3hj ubj)}(hhh]h)}(h plane stateh]h plane state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK3hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hK3hj ubjn)}(h``fmtcnv_state`` Format-conversion state Per-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion. h](jt)}(h``fmtcnv_state``h]jz)}(hjh]h fmtcnv_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK;hjubj)}(hhh](h)}(hFormat-conversion stateh]hFormat-conversion state}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK7hj,ubh)}(hPer-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion.h]hPer-plane state for format conversion. Flags for copying shadow buffers into backend storage. Also holds temporary storage for format conversion.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK9hj,ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj+hK;hj ubjn)}(h``map`` Mappings of the plane's framebuffer BOs in to kernel address space The memory mappings stored in map should be established in the plane's prepare_fb callback and removed in the cleanup_fb callback. h](jt)}(h``map``h]jz)}(hj_h]hmap}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKEhjYubj)}(hhh](h)}(hBMappings of the plane's framebuffer BOs in to kernel address spaceh]hDMappings of the plane’s framebuffer BOs in to kernel address space}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKBhjuubh)}(hThe memory mappings stored in map should be established in the plane's prepare_fb callback and removed in the cleanup_fb callback.h]hThe memory mappings stored in map should be established in the plane’s prepare_fb callback and removed in the cleanup_fb callback.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKDhjuubeh}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jmhjthKEhj ubjn)}(h``data`` Address of each framebuffer BO's data The address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.h](jt)}(h``data``h]jz)}(hjh]hdata}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKLhjubj)}(hhh](h)}(h%Address of each framebuffer BO's datah]h'Address of each framebuffer BO’s data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKJhjubh)}(hoThe address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.h]hoThe address of the data stored in each mapping. This is different for framebuffers with non-zero offset fields.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKLhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKLhj ubeh}(h]h ]h"]h$]h&]uh1jhhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhj hNubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKPhjn hhubh)}(hFor planes that use a shadow buffer, struct drm_shadow_plane_state provides the regular plane state plus mappings of the shadow buffer into kernel address space.h]hFor planes that use a shadow buffer, struct drm_shadow_plane_state provides the regular plane state plus mappings of the shadow buffer into kernel address space.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhK,hjn hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&to_drm_shadow_plane_state (C function)c.to_drm_shadow_plane_statehNtauh1jxhjn hhhj hNubj)}(hhh](j)}(hYstruct drm_shadow_plane_state * to_drm_shadow_plane_state (struct drm_plane_state *state)h]j)}(hWstruct drm_shadow_plane_state *to_drm_shadow_plane_state(struct drm_plane_state *state)h](j)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKRubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhjDhKRubh)}(hhh]j)}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjXmodnameN classnameNjj)}j]j)}jto_drm_shadow_plane_statesbc.to_drm_shadow_plane_stateasbuh1hhj3hhhjDhKRubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhjDhKRubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3hhhjDhKRubj)}(hto_drm_shadow_plane_stateh]j)}(hjth]hto_drm_shadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj3hhhjDhKRubj)}(h(struct drm_plane_state *state)h]j)}(hstruct drm_plane_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jrc.to_drm_shadow_plane_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj3hhhjDhKRubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj/hhhjDhKRubah}(h]j*ah ](jjeh"]h$]h&]jj)jhuh1jhjDhKRhj,hhubj)}(hhh]h)}(h#upcasts from struct drm_plane_stateh]h#upcasts from struct drm_plane_state}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKRhj/hhubah}(h]h ]h"]h$]h&]uh1jhj,hhhjDhKRubeh}(h]h ](jfunctioneh"]h$]h&]jjjjJjjJjjjuh1jhhhjn hj hNubj)}(hC**Parameters** ``struct drm_plane_state *state`` the plane stateh](h)}(h**Parameters**h]j%)}(hjTh]h Parameters}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjRubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKVhjNubji)}(hhh]jn)}(h1``struct drm_plane_state *state`` the plane stateh](jt)}(h!``struct drm_plane_state *state``h]jz)}(hjsh]hstruct drm_plane_state *state}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKXhjmubj)}(hhh]h)}(hthe plane stateh]hthe plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKShjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjhKXhjjubah}(h]h ]h"]h$]h&]uh1jhhjNubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhj hNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$DRM_GEM_SHADOW_PLANE_FUNCS (C macro)c.DRM_GEM_SHADOW_PLANE_FUNCShNtauh1jxhjn hhhj hNubj)}(hhh](j)}(hDRM_GEM_SHADOW_PLANE_FUNCSh]j)}(hDRM_GEM_SHADOW_PLANE_FUNCSh]j)}(hDRM_GEM_SHADOW_PLANE_FUNCSh]j)}(hjh]hDRM_GEM_SHADOW_PLANE_FUNCS}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKgubah}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKgubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKghjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhjhKgubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhjn hj hNubh)}(h``DRM_GEM_SHADOW_PLANE_FUNCS``h]jz)}(hjh]hDRM_GEM_SHADOW_PLANE_FUNCS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKihjn hhubjT=)}(h Initializes struct drm_plane_funcs for shadow-buffered planes **Description** Drivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions. h](jT=)}(h>Initializes struct drm_plane_funcs for shadow-buffered planes h]h)}(h=Initializes struct drm_plane_funcs for shadow-buffered planesh]h=Initializes struct drm_plane_funcs for shadow-buffered planes}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKghjubah}(h]h ]h"]h$]h&]uh1jS=hj/hKghjubh)}(h**Description**h]j%)}(hj8h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKihjubh)}(hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions.h]hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_funcs to use the rsp helper functions.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhhjubeh}(h]h ]h"]h$]h&]uh1jS=hj/hKghjn hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+DRM_GEM_SHADOW_PLANE_HELPER_FUNCS (C macro)#c.DRM_GEM_SHADOW_PLANE_HELPER_FUNCShNtauh1jxhjn hhhj hNubj)}(hhh](j)}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j)}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j)}(h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCSh]j)}(hjvh]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjxhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKvubah}(h]h ]h"]h$]h&]jjjuh1jjjhjthhhjhKvubah}(h]joah ](jjeh"]h$]h&]jj)jhuh1jhjhKvhjqhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjqhhhjhKvubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhjn hj hNubh)}(h%``DRM_GEM_SHADOW_PLANE_HELPER_FUNCS``h]jz)}(hjh]h!DRM_GEM_SHADOW_PLANE_HELPER_FUNCS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKxhjn hhubjT=)}(h Initializes struct drm_plane_helper_funcs for shadow-buffered planes **Description** Drivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_helper_funcs to use the rsp helper functions. h](jT=)}(hEInitializes struct drm_plane_helper_funcs for shadow-buffered planes h]h)}(hDInitializes struct drm_plane_helper_funcs for shadow-buffered planesh]hDInitializes struct drm_plane_helper_funcs for shadow-buffered planes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKvhjubah}(h]h ]h"]h$]h&]uh1jS=hjhKvhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKxhjubh)}(hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_helper_funcs to use the rsp helper functions.h]hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_plane_helper_funcs to use the rsp helper functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKwhjubeh}(h]h ]h"]h$]h&]uh1jS=hjhKvhjn hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j8DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS (C macro)0c.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCShNtauh1jxhjn hhhj hNubj)}(hhh](j)}(h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCSh]j)}(h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCSh]j)}(h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCSh]j)}(hj%h]h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj'hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj#hhhjBhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjBhKhj hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj hhhjBhKubeh}(h]h ](jmacroeh"]h$]h&]jjjj[jj[jjjuh1jhhhjn hj hNubh)}(h2``DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS``h]jz)}(hjah]h.DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhjn hhubjT=)}(hX Initializes struct drm_simple_display_pipe_funcs for shadow-buffered planes **Description** Drivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_simple_display_pipe_funcs to use the rsp helper functions. h](jT=)}(hLInitializes struct drm_simple_display_pipe_funcs for shadow-buffered planes h]h)}(hKInitializes struct drm_simple_display_pipe_funcs for shadow-buffered planesh]hKInitializes struct drm_simple_display_pipe_funcs for shadow-buffered planes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhj{ubah}(h]h ]h"]h$]h&]uh1jS=hjhKhjwubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhjwubh)}(hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_simple_display_pipe_funcs to use the rsp helper functions.h]hDrivers may use GEM BOs as shadow buffers over the framebuffer memory. This macro initializes struct drm_simple_display_pipe_funcs to use the rsp helper functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:89: ./include/drm/drm_gem_atomic_helper.hhKhjwubeh}(h]h ]h"]h$]h&]uh1jS=hjhKhjn hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_gem_plane_helper_prepare_fb (C function)!c.drm_gem_plane_helper_prepare_fbhNtauh1jxhjn hhhNhNubj)}(hhh](j)}(h\int drm_gem_plane_helper_prepare_fb (struct drm_plane *plane, struct drm_plane_state *state)h]j)}(h[int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKwubj)}(hdrm_gem_plane_helper_prepare_fbh]j)}(hdrm_gem_plane_helper_prepare_fbh]hdrm_gem_plane_helper_prepare_fb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKwubj)}(h8(struct drm_plane *plane, struct drm_plane_state *state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7modnameN classnameNjj)}j]j)}jjsb!c.drm_gem_plane_helper_prepare_fbasbuh1hhjubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjchhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_plane_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jQ!c.drm_gem_plane_helper_prepare_fbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKwubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKwubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKwhjhhubj)}(hhh]h)}(h Prepare a GEM backed framebufferh]h Prepare a GEM backed framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKwhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKwubeh}(h]h ](jfunctioneh"]h$]h&]jjjj"jj"jjjuh1jhhhjn hNhNubj)}(hXx**Parameters** ``struct drm_plane *plane`` Plane ``struct drm_plane_state *state`` Plane state the fence will be attached to **Description** This function extracts the exclusive fence from :c:type:`drm_gem_object.resv ` and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct :c:type:`dma_buf`. This function can be used as the :c:type:`drm_plane_helper_funcs.prepare_fb ` callback. There is no need for :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory. This function is the default implementation for GEM drivers of :c:type:`drm_plane_helper_funcs.prepare_fb ` if no callback is provided.h](h)}(h**Parameters**h]j%)}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chK{hj&ubji)}(hhh](jn)}(h"``struct drm_plane *plane`` Plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hjKh]hstruct drm_plane *plane}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKxhjEubj)}(hhh]h)}(hPlaneh]hPlane}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hKxhjaubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhj`hKxhjBubjn)}(hL``struct drm_plane_state *state`` Plane state the fence will be attached to h](jt)}(h!``struct drm_plane_state *state``h]jz)}(hjh]hstruct drm_plane_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKyhj~ubj)}(hhh]h)}(h)Plane state the fence will be attached toh]h)Plane state the fence will be attached to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKyhjubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhjhKyhjBubeh}(h]h ]h"]h$]h&]uh1jhhj&ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chK{hj&ubh)}(hXThis function extracts the exclusive fence from :c:type:`drm_gem_object.resv ` and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct :c:type:`dma_buf`. This function can be used as the :c:type:`drm_plane_helper_funcs.prepare_fb ` callback.h](h0This function extracts the exclusive fence from }(hjhhhNhNubh)}(h.:c:type:`drm_gem_object.resv `h]jz)}(hjh]hdrm_gem_object.resv}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_gem_objectuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKzhjubh and attaches it to plane state for the atomic helper to wait on. This is necessary to correctly implement implicit synchronization for any buffers shared as a struct }(hjhhhNhNubh)}(h:c:type:`dma_buf`h]jz)}(hjh]hdma_buf}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdma_bufuh1hhjhKzhjubh#. This function can be used as the }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jz)}(hj&h]h!drm_plane_helper_funcs.prepare_fb}(hj(hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjhKzhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKzhj&ubh)}(hThere is no need for :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory.h](hThere is no need for }(hjMhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]jz)}(hjWh]h!drm_plane_helper_funcs.cleanup_fb}(hjYhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjUubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjMubh` hook for simple GEM based framebuffer drivers which have their buffers always pinned in memory.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjthKhj&ubh)}(hThis function is the default implementation for GEM drivers of :c:type:`drm_plane_helper_funcs.prepare_fb ` if no callback is provided.h](h?This function is the default implementation for GEM drivers of }(hjhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jz)}(hjh]h!drm_plane_helper_funcs.prepare_fb}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjubh if no callback is provided.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3__drm_gem_duplicate_shadow_plane_state (C function)(c.__drm_gem_duplicate_shadow_plane_statehNtauh1jxhjn hhhNhNubj)}(hhh](j)}(h|void __drm_gem_duplicate_shadow_plane_state (struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h]j)}(h{void __drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(h&__drm_gem_duplicate_shadow_plane_stateh]j)}(h&__drm_gem_duplicate_shadow_plane_stateh]h&__drm_gem_duplicate_shadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(hP(struct drm_plane *plane, struct drm_shadow_plane_state *new_shadow_plane_state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j)}jjsb(c.__drm_gem_duplicate_shadow_plane_stateasbuh1hhj ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjZhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hplaneh]hplane}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h5struct drm_shadow_plane_state *new_shadow_plane_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubh)}(hhh]j)}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jH(c.__drm_gem_duplicate_shadow_plane_stateasbuh1hhj|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj)}(hnew_shadow_plane_stateh]hnew_shadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h&duplicates shadow-buffered plane stateh]h&duplicates shadow-buffered plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjn hNhNubj)}(hX1**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_shadow_plane_state *new_shadow_plane_state`` the new shadow-buffered plane state **Description** This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state. The function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h](h)}(h**Parameters**h]j%)}(hj#h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjubji)}(hhh](jn)}(h&``struct drm_plane *plane`` the plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hjBh]hstruct drm_plane *plane}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj<ubj)}(hhh]h)}(h the planeh]h the plane}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhKhjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jmhjWhKhj9ubjn)}(h^``struct drm_shadow_plane_state *new_shadow_plane_state`` the new shadow-buffered plane state h](jt)}(h9``struct drm_shadow_plane_state *new_shadow_plane_state``h]jz)}(hj{h]h5struct drm_shadow_plane_state *new_shadow_plane_state}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjuubj)}(hhh]h)}(h#the new shadow-buffered plane stateh]h#the new shadow-buffered plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj9ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjubh)}(h~This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state.h]h~This function duplicates shadow-buffered plane state. This is helpful for drivers that subclass struct drm_shadow_plane_state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjubh)}(hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h]hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane’s prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_gem_duplicate_shadow_plane_state (C function)&c.drm_gem_duplicate_shadow_plane_statehNtauh1jxhjn hhhNhNubj)}(hhh](j)}(hWstruct drm_plane_state * drm_gem_duplicate_shadow_plane_state (struct drm_plane *plane)h]j)}(hUstruct drm_plane_state *drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane)h](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j)}j$drm_gem_duplicate_shadow_plane_statesb&c.drm_gem_duplicate_shadow_plane_stateasbuh1hhjhhhjhKubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj+)}(hj9h]h*}(hjXhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhKubj)}(h$drm_gem_duplicate_shadow_plane_stateh]j)}(hjGh]h$drm_gem_duplicate_shadow_plane_state}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jE&c.drm_gem_duplicate_shadow_plane_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h&duplicates shadow-buffered plane stateh]h&duplicates shadow-buffered plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjn hNhNubj)}(hX**Parameters** ``struct drm_plane *plane`` the plane **Description** This function implements struct :c:type:`drm_plane_funcs.atomic_duplicate_state ` for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type. The function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers. **Return** A pointer to a new plane state on success, or NULL otherwise.h](h)}(h**Parameters**h]j%)}(hj'h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!ubji)}(hhh]jn)}(h&``struct drm_plane *plane`` the plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hjFh]hstruct drm_plane *plane}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj@ubj)}(hhh]h)}(h the planeh]h the plane}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hKhj\ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj[hKhj=ubah}(h]h ]h"]h$]h&]uh1jhhj!ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.atomic_duplicate_state ` for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type.h](h This function implements struct }(hjhhhNhNubh)}(hB:c:type:`drm_plane_funcs.atomic_duplicate_state `h]jz)}(hjh]h&drm_plane_funcs.atomic_duplicate_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhjubh for shadow-buffered planes. It assumes the existing state to be of type struct drm_shadow_plane_state and it allocates the new state to be of this type.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhj!ubh)}(hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane's prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.h]hXThe function does not duplicate existing mappings of the shadow buffers. Mappings are maintained during the atomic commit by the plane’s prepare_fb and cleanup_fb helpers. See drm_gem_prepare_shadow_fb() and drm_gem_cleanup_shadow_fb() for corresponding helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!ubh)}(h=A pointer to a new plane state on success, or NULL otherwise.h]h=A pointer to a new plane state on success, or NULL otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chKhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1__drm_gem_destroy_shadow_plane_state (C function)&c.__drm_gem_destroy_shadow_plane_statehNtauh1jxhjn hhhNhNubj)}(hhh](j)}(h]void __drm_gem_destroy_shadow_plane_state (struct drm_shadow_plane_state *shadow_plane_state)h]j)}(h\void __drm_gem_destroy_shadow_plane_state(struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj-hM ubj)}(h$__drm_gem_destroy_shadow_plane_stateh]j)}(h$__drm_gem_destroy_shadow_plane_stateh]h$__drm_gem_destroy_shadow_plane_state}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj-hM ubj)}(h3(struct drm_shadow_plane_state *shadow_plane_state)h]j)}(h1struct drm_shadow_plane_state *shadow_plane_stateh](j)}(hjh]hstruct}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubh)}(hhh]j)}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj|modnameN classnameNjj)}j]j)}jjBsb&c.__drm_gem_destroy_shadow_plane_stateasbuh1hhjXubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjXubj)}(hshadow_plane_stateh]hshadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjTubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj-hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj-hM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj-hM hjhhubj)}(hhh]h)}(h%cleans up shadow-buffered plane stateh]h%cleans up shadow-buffered plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj-hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjn hNhNubj)}(h**Parameters** ``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state **Description** This function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjubji)}(hhh]jn)}(hV``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state h](jt)}(h5``struct drm_shadow_plane_state *shadow_plane_state``h]jz)}(hj h]h1struct drm_shadow_plane_state *shadow_plane_state}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjubj)}(hhh]h)}(hthe shadow-buffered plane stateh]hthe shadow-buffered plane state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj[h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjubh)}(huThis function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.h]huThis function cleans up shadow-buffered plane state. Helpful for drivers that subclass struct drm_shadow_plane_state.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_gem_destroy_shadow_plane_state (C function)$c.drm_gem_destroy_shadow_plane_statehNtauh1jxhjn hhhNhNubj)}(hhh](j)}(hfvoid drm_gem_destroy_shadow_plane_state (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j)}(hevoid drm_gem_destroy_shadow_plane_state(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h"drm_gem_destroy_shadow_plane_stateh]j)}(h"drm_gem_destroy_shadow_plane_stateh]h"drm_gem_destroy_shadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb$c.drm_gem_destroy_shadow_plane_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjomodnameN classnameNjj)}j]j$c.drm_gem_destroy_shadow_plane_stateasbuh1hhjKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjKubj)}(h plane_stateh]h plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h#deletes shadow-buffered plane stateh]h#deletes shadow-buffered plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjn hNhNubj)}(hXn**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_funcs.atomic_destroy_state ` for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjubji)}(hhh](jn)}(h&``struct drm_plane *plane`` the plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj ubj)}(hhh]h)}(h the planeh]h the plane}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj&hMhjubjn)}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hjJh]h#struct drm_plane_state *plane_state}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjDubj)}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj`ubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jmhj_hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjubh)}(hThis function implements struct :c:type:`drm_plane_funcs.atomic_destroy_state ` for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.h](h This function implements struct }(hjhhhNhNubh)}(h@:c:type:`drm_plane_funcs.atomic_destroy_state `h]jz)}(hjh]h$drm_plane_funcs.atomic_destroy_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjubhc for shadow-buffered planes. It expects that mappings of shadow buffers have been released already.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)__drm_gem_reset_shadow_plane (C function)c.__drm_gem_reset_shadow_planehNtauh1jxhjn hhhNhNubj)}(hhh](j)}(hnvoid __drm_gem_reset_shadow_plane (struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h]j)}(hmvoid __drm_gem_reset_shadow_plane(struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM/ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM/ubj)}(h__drm_gem_reset_shadow_planeh]j)}(h__drm_gem_reset_shadow_planeh]h__drm_gem_reset_shadow_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM/ubj)}(hL(struct drm_plane *plane, struct drm_shadow_plane_state *shadow_plane_state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjHhhhNhNubah}(h]h ]jah"]h$B]h&]uh1jhjEubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjJmodnameN classnameNjj)}j]j)}jjsbc.__drm_gem_reset_shadow_planeasbuh1hhj&ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj+)}(hj9h]h*}(hjvhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj&ubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"ubj)}(h1struct drm_shadow_plane_state *shadow_plane_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_shadow_plane_stateh]hdrm_shadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jdc.__drm_gem_reset_shadow_planeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hshadow_plane_stateh]hshadow_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM/ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM/ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM/hjhhubj)}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM/hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM/ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj5jj5jjjuh1jhhhjn hNhNubj)}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state **Description** This function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.h](h)}(h**Parameters**h]j%)}(hj?h]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM3hj9ubji)}(hhh](jn)}(h&``struct drm_plane *plane`` the plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hj^h]hstruct drm_plane *plane}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM0hjXubj)}(hhh]h)}(h the planeh]h the plane}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshM0hjtubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jmhjshM0hjUubjn)}(hV``struct drm_shadow_plane_state *shadow_plane_state`` the shadow-buffered plane state h](jt)}(h5``struct drm_shadow_plane_state *shadow_plane_state``h]jz)}(hjh]h1struct drm_shadow_plane_state *shadow_plane_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM1hjubj)}(hhh]h)}(hthe shadow-buffered plane stateh]hthe shadow-buffered plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM1hjUubeh}(h]h ]h"]h$]h&]uh1jhhj9ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM3hj9ubh)}(hwThis function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.h]hwThis function resets state for shadow-buffered planes. Helpful for drivers that subclass struct drm_shadow_plane_state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM2hj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_gem_reset_shadow_plane (C function)c.drm_gem_reset_shadow_planehNtauh1jxhjn hhhNhNubj)}(hhh](j)}(h9void drm_gem_reset_shadow_plane (struct drm_plane *plane)h]j)}(h8void drm_gem_reset_shadow_plane(struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMCubj)}(h h]h }(hj& hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj% hMCubj)}(hdrm_gem_reset_shadow_planeh]j)}(hdrm_gem_reset_shadow_planeh]hdrm_gem_reset_shadow_plane}(hj8 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4 ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj% hMCubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjT hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP ubj)}(h h]h }(hja hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP ubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjr hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjt modnameN classnameNjj)}j]j)}jj: sbc.drm_gem_reset_shadow_planeasbuh1hhjP ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjP ubj)}(hplaneh]hplane}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjL ubah}(h]h ]h"]h$]h&]jjuh1jhj hhhj% hMCubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj% hMCubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj% hMChj hhubj)}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMChj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj% hMCubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjn hNhNubj)}(hX3**Parameters** ``struct drm_plane *plane`` the plane **Description** This function implements struct :c:type:`drm_plane_funcs.reset_plane ` for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMGhj ubji)}(hhh]jn)}(h&``struct drm_plane *plane`` the plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hj!h]hstruct drm_plane *plane}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMDhj!ubj)}(hhh]h)}(h the planeh]h the plane}(hj1!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-!hMDhj.!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj-!hMDhj!ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjS!h]h Description}(hjU!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQ!ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMFhj ubh)}(hThis function implements struct :c:type:`drm_plane_funcs.reset_plane ` for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.h](h This function implements struct }(hji!hhhNhNubh)}(h7:c:type:`drm_plane_funcs.reset_plane `h]jz)}(hjs!h]hdrm_plane_funcs.reset_plane}(hju!hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjq!ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMEhji!ubh for shadow-buffered planes. It assumes the current plane state to be of type struct drm_shadow_plane and it allocates the new state of this type.}(hji!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!hMEhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_gem_begin_shadow_fb_access (C function) c.drm_gem_begin_shadow_fb_accesshNtauh1jxhjn hhhNhNubj)}(hhh](j)}(haint drm_gem_begin_shadow_fb_access (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j)}(h`int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hinth]hint}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMZubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhhj!hMZubj)}(hdrm_gem_begin_shadow_fb_accessh]j)}(hdrm_gem_begin_shadow_fb_accessh]hdrm_gem_begin_shadow_fb_access}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj!hhhj!hMZubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]j)}jj!sb c.drm_gem_begin_shadow_fb_accessasbuh1hhj!ubj)}(h h]h }(hj6"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj+)}(hj9h]h*}(hjD"hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj!ubj)}(hplaneh]hplane}(hjQ"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hjj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf"ubj)}(h h]h }(hjw"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf"ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]j2" c.drm_gem_begin_shadow_fb_accessasbuh1hhjf"ubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf"ubj+)}(hj9h]h*}(hj"hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjf"ubj)}(h plane_stateh]h plane_state}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubeh}(h]h ]h"]h$]h&]jjuh1jhj!hhhj!hMZubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj!hhhj!hMZubah}(h]j!ah ](jjeh"]h$]h&]jj)jhuh1jhj!hMZhj!hhubj)}(hhh]h)}(h+prepares shadow framebuffers for CPU accessh]h+prepares shadow framebuffers for CPU access}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMZhj"hhubah}(h]h ]h"]h$]h&]uh1jhj!hhhj!hMZubeh}(h]h ](jfunctioneh"]h$]h&]jjjj#jj#jjjuh1jhhhjn hNhNubj)}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_helper_funcs.begin_fb_access `. It maps all buffer objects of the plane's framebuffer into kernel address space and stores them in struct :c:type:`drm_shadow_plane_state.map `. The first data bytes are available in struct :c:type:`drm_shadow_plane_state.data `. See drm_gem_end_shadow_fb_access() for cleanup. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j%)}(hj #h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj #ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM^hj#ubji)}(hhh](jn)}(h&``struct drm_plane *plane`` the plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hj,#h]hstruct drm_plane *plane}(hj.#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*#ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM[hj&#ubj)}(hhh]h)}(h the planeh]h the plane}(hjE#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjA#hM[hjB#ubah}(h]h ]h"]h$]h&]uh1jhj&#ubeh}(h]h ]h"]h$]h&]uh1jmhjA#hM[hj##ubjn)}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hje#h]h#struct drm_plane_state *plane_state}(hjg#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjc#ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM\hj_#ubj)}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj~#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz#hM\hj{#ubah}(h]h ]h"]h$]h&]uh1jhj_#ubeh}(h]h ]h"]h$]h&]uh1jmhjz#hM\hj##ubeh}(h]h ]h"]h$]h&]uh1jhhj#ubh)}(h**Description**h]j%)}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM^hj#ubh)}(hXThis function implements struct :c:type:`drm_plane_helper_funcs.begin_fb_access `. It maps all buffer objects of the plane's framebuffer into kernel address space and stores them in struct :c:type:`drm_shadow_plane_state.map `. The first data bytes are available in struct :c:type:`drm_shadow_plane_state.data `.h](h This function implements struct }(hj#hhhNhNubh)}(hI:c:type:`drm_plane_helper_funcs.begin_fb_access `h]jz)}(hj#h]h&drm_plane_helper_funcs.begin_fb_access}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM]hj#ubhn. It maps all buffer objects of the plane’s framebuffer into kernel address space and stores them in struct }(hj#hhhNhNubh)}(h=:c:type:`drm_shadow_plane_state.map `h]jz)}(hj#h]hdrm_shadow_plane_state.map}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_shadow_plane_stateuh1hhj#hM]hj#ubh/. The first data bytes are available in struct }(hj#hhhNhNubh)}(h>:c:type:`drm_shadow_plane_state.data `h]jz)}(hj$h]hdrm_shadow_plane_state.data}(hj $hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_shadow_plane_stateuh1hhj#hM]hj#ubh.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj#hM]hj#ubh)}(h/See drm_gem_end_shadow_fb_access() for cleanup.h]h/See drm_gem_end_shadow_fb_access() for cleanup.}(hj.$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMbhj#ubh)}(h **Return**h]j%)}(hj?$h]hReturn}(hjA$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=$ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMdhj#ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjU$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMehj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_gem_end_shadow_fb_access (C function)c.drm_gem_end_shadow_fb_accesshNtauh1jxhjn hhhNhNubj)}(hhh](j)}(h`void drm_gem_end_shadow_fb_access (struct drm_plane *plane, struct drm_plane_state *plane_state)h]j)}(h_void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMuubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhj$hMuubj)}(hdrm_gem_end_shadow_fb_accessh]j)}(hdrm_gem_end_shadow_fb_accessh]hdrm_gem_end_shadow_fb_access}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj$hhhj$hMuubj)}(h>(struct drm_plane *plane, struct drm_plane_state *plane_state)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj$modnameN classnameNjj)}j]j)}jj$sbc.drm_gem_end_shadow_fb_accessasbuh1hhj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj+)}(hj9h]h*}(hj %hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj$ubj)}(hplaneh]hplane}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hj3%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/%ubj)}(h h]h }(hj@%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/%ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjQ%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjN%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjS%modnameN classnameNjj)}j]j$c.drm_gem_end_shadow_fb_accessasbuh1hhj/%ubj)}(h h]h }(hjo%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/%ubj+)}(hj9h]h*}(hj}%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/%ubj)}(h plane_stateh]h plane_state}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubeh}(h]h ]h"]h$]h&]jjuh1jhj$hhhj$hMuubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj|$hhhj$hMuubah}(h]jw$ah ](jjeh"]h$]h&]jj)jhuh1jhj$hMuhjy$hhubj)}(hhh]h)}(h,releases shadow framebuffers from CPU accessh]h,releases shadow framebuffers from CPU access}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMuhj%hhubah}(h]h ]h"]h$]h&]uh1jhjy$hhhj$hMuubeh}(h]h ](jfunctioneh"]h$]h&]jjjj%jj%jjjuh1jhhhjn hNhNubj)}(hX**Parameters** ``struct drm_plane *plane`` the plane ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct :c:type:`drm_plane_helper_funcs.end_fb_access `. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order. See drm_gem_begin_shadow_fb_access() for more information.h](h)}(h**Parameters**h]j%)}(hj%h]h Parameters}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMyhj%ubji)}(hhh](jn)}(h&``struct drm_plane *plane`` the plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hj%h]hstruct drm_plane *plane}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMvhj%ubj)}(hhh]h)}(h the planeh]h the plane}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj &hMvhj &ubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj &hMvhj%ubjn)}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hj.&h]h#struct drm_plane_state *plane_state}(hj0&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,&ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMwhj(&ubj)}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hjG&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjC&hMwhjD&ubah}(h]h ]h"]h$]h&]uh1jhj(&ubeh}(h]h ]h"]h$]h&]uh1jmhjC&hMwhj%ubeh}(h]h ]h"]h$]h&]uh1jhhj%ubh)}(h**Description**h]j%)}(hji&h]h Description}(hjk&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjg&ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMyhj%ubh)}(hThis function implements struct :c:type:`drm_plane_helper_funcs.end_fb_access `. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order.h](h This function implements struct }(hj&hhhNhNubh)}(hG:c:type:`drm_plane_helper_funcs.end_fb_access `h]jz)}(hj&h]h$drm_plane_helper_funcs.end_fb_access}(hj&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMxhj&ubhM. It undoes all effects of drm_gem_begin_shadow_fb_access() in reverse order.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&hMxhj%ubh)}(h:See drm_gem_begin_shadow_fb_access() for more information.h]h:See drm_gem_begin_shadow_fb_access() for more information.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chM{hj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6drm_gem_simple_kms_begin_shadow_fb_access (C function)+c.drm_gem_simple_kms_begin_shadow_fb_accesshNtauh1jxhjn hhhNhNubj)}(hhh](j)}(hyint drm_gem_simple_kms_begin_shadow_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j)}(hxint drm_gem_simple_kms_begin_shadow_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hinth]hint}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&hhhj&hMubj)}(h)drm_gem_simple_kms_begin_shadow_fb_accessh]j)}(h)drm_gem_simple_kms_begin_shadow_fb_accessh]h)drm_gem_simple_kms_begin_shadow_fb_access}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj&hhhj&hMubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h h]h }(hj*'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj;'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj='modnameN classnameNjj)}j]j)}jj'sb+c.drm_gem_simple_kms_begin_shadow_fb_accessasbuh1hhj'ubj)}(h h]h }(hj['hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj+)}(hj9h]h*}(hji'hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj'ubj)}(hpipeh]hpipe}(hjv'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'modnameN classnameNjj)}j]jW'+c.drm_gem_simple_kms_begin_shadow_fb_accessasbuh1hhj'ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj+)}(hj9h]h*}(hj'hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj'ubj)}(h plane_stateh]h plane_state}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubeh}(h]h ]h"]h$]h&]jjuh1jhj&hhhj&hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj&hhhj&hMubah}(h]j&ah ](jjeh"]h$]h&]jj)jhuh1jhj&hMhj&hhubj)}(hhh]h)}(h+prepares shadow framebuffers for CPU accessh]h+prepares shadow framebuffers for CPU access}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj (hhubah}(h]h ]h"]h$]h&]uh1jhj&hhhj&hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj((jj((jjjuh1jhhhjn hNhNubj)}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct drm_simple_display_funcs.begin_fb_access. See drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j%)}(hj2(h]h Parameters}(hj4(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0(ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj,(ubji)}(hhh](jn)}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hjQ(h]h$struct drm_simple_display_pipe *pipe}(hjS(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjO(ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjK(ubj)}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hjj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjf(hMhjg(ubah}(h]h ]h"]h$]h&]uh1jhjK(ubeh}(h]h ]h"]h$]h&]uh1jmhjf(hMhjH(ubjn)}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hj(h]h#struct drm_plane_state *plane_state}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj(ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj(ubj)}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jmhj(hMhjH(ubeh}(h]h ]h"]h$]h&]uh1jhhj,(ubh)}(h**Description**h]j%)}(hj(h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj,(ubh)}(hIThis function implements struct drm_simple_display_funcs.begin_fb_access.h]hIThis function implements struct drm_simple_display_funcs.begin_fb_access.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj,(ubh)}(hhSee drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup.h]hhSee drm_gem_begin_shadow_fb_access() for details and drm_gem_simple_kms_cleanup_shadow_fb() for cleanup.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj,(ubh)}(h **Return**h]j%)}(hj(h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj,(ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj,(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_gem_simple_kms_end_shadow_fb_access (C function))c.drm_gem_simple_kms_end_shadow_fb_accesshNtauh1jxhjn hhhNhNubj)}(hhh](j)}(hxvoid drm_gem_simple_kms_end_shadow_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j)}(hwvoid drm_gem_simple_kms_end_shadow_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj@)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<)hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj)}(h h]h }(hjO)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<)hhhjN)hMubj)}(h'drm_gem_simple_kms_end_shadow_fb_accessh]j)}(h'drm_gem_simple_kms_end_shadow_fb_accessh]h'drm_gem_simple_kms_end_shadow_fb_access}(hja)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj])ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj<)hhhjN)hMubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hj})hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjy)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjy)ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j)}jjc)sb)c.drm_gem_simple_kms_end_shadow_fb_accessasbuh1hhjy)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjy)ubj+)}(hj9h]h*}(hj)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjy)ubj)}(hpipeh]hpipe}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjy)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhju)ubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj *hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj *ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]j))c.drm_gem_simple_kms_end_shadow_fb_accessasbuh1hhj)ubj)}(h h]h }(hj+*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj+)}(hj9h]h*}(hj9*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)ubj)}(h plane_stateh]h plane_state}(hjF*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhju)ubeh}(h]h ]h"]h$]h&]jjuh1jhj<)hhhjN)hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj8)hhhjN)hMubah}(h]j3)ah ](jjeh"]h$]h&]jj)jhuh1jhjN)hMhj5)hhubj)}(hhh]h)}(h,releases shadow framebuffers from CPU accessh]h,releases shadow framebuffers from CPU access}(hjp*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjm*hhubah}(h]h ]h"]h$]h&]uh1jhj5)hhhjN)hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj*jj*jjjuh1jhhhjn hNhNubj)}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe ``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state **Description** This function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order. See drm_gem_simple_kms_begin_shadow_fb_access().h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj*ubji)}(hhh](jn)}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hj*h]h$struct drm_simple_display_pipe *pipe}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj*ubj)}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhj*hMhj*ubjn)}(h^``struct drm_plane_state *plane_state`` the plane state of type struct drm_shadow_plane_state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hj*h]h#struct drm_plane_state *plane_state}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj*ubj)}(hhh]h)}(h5the plane state of type struct drm_shadow_plane_stateh]h5the plane state of type struct drm_shadow_plane_state}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhj*hMhj*ubeh}(h]h ]h"]h$]h&]uh1jhhj*ubh)}(h**Description**h]j%)}(hj%+h]h Description}(hj'+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#+ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj*ubh)}(hThis function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order.h]hThis function implements struct drm_simple_display_funcs.end_fb_access. It undoes all effects of drm_gem_simple_kms_begin_shadow_fb_access() in reverse order.}(hj;+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj*ubh)}(h0See drm_gem_simple_kms_begin_shadow_fb_access().h]h0See drm_gem_simple_kms_begin_shadow_fb_access().}(hjJ+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_gem_simple_kms_reset_shadow_plane (C function)'c.drm_gem_simple_kms_reset_shadow_planehNtauh1jxhjn hhhNhNubj)}(hhh](j)}(hQvoid drm_gem_simple_kms_reset_shadow_plane (struct drm_simple_display_pipe *pipe)h]j)}(hPvoid drm_gem_simple_kms_reset_shadow_plane(struct drm_simple_display_pipe *pipe)h](j)}(hvoidh]hvoid}(hjy+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju+hhhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju+hhhj+hMubj)}(h%drm_gem_simple_kms_reset_shadow_planeh]j)}(h%drm_gem_simple_kms_reset_shadow_planeh]h%drm_gem_simple_kms_reset_shadow_plane}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ](jjeh"]h$]h&]jjuh1jhju+hhhj+hMubj)}(h&(struct drm_simple_display_pipe *pipe)h]j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j)}jj+sb'c.drm_gem_simple_kms_reset_shadow_planeasbuh1hhj+ubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj+)}(hj9h]h*}(hj,hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj+ubj)}(hpipeh]hpipe}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj+ubah}(h]h ]h"]h$]h&]jjuh1jhju+hhhj+hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjq+hhhj+hMubah}(h]jl+ah ](jjeh"]h$]h&]jj)jhuh1jhj+hMhjn+hhubj)}(hhh]h)}(hresets a shadow-buffered planeh]hresets a shadow-buffered plane}(hj9,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhj6,hhubah}(h]h ]h"]h$]h&]uh1jhjn+hhhj+hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjQ,jjQ,jjjuh1jhhhjn hNhNubj)}(h**Parameters** ``struct drm_simple_display_pipe *pipe`` the simple display pipe **Description** This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.h](h)}(h**Parameters**h]j%)}(hj[,h]h Parameters}(hj],hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjY,ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjU,ubji)}(hhh]jn)}(hA``struct drm_simple_display_pipe *pipe`` the simple display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hjz,h]h$struct drm_simple_display_pipe *pipe}(hj|,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjx,ubah}(h]h ]h"]h$]h&]uh1jshk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjt,ubj)}(hhh]h)}(hthe simple display pipeh]hthe simple display pipe}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhjt,ubeh}(h]h ]h"]h$]h&]uh1jmhj,hMhjq,ubah}(h]h ]h"]h$]h&]uh1jhhjU,ubh)}(h**Description**h]j%)}(hj,h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjU,ubh)}(h`This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.h]h`This function implements struct drm_simple_display_funcs.reset_plane for shadow-buffered planes.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:92: ./drivers/gpu/drm/drm_gem_atomic_helper.chMhjU,ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjn hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j`.Vh](hXOnce the driver enables vblank support with drm_vblank_init(), each CRTC’s vblank timer fires according to the programmed display mode. By default, the vblank timer invokes drm_crtc_handle_vblank(). Drivers with more specific requirements can set their own handler function in struct }(hjk1hhhNhNubh)}(hM:c:type:`drm_crtc_helper_funcs.handle_vblank_timeout `h]jz)}(hju1h]h+drm_crtc_helper_funcs.handle_vblank_timeout}(hjw1hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjs1ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:98: ./drivers/gpu/drm/drm_vblank_helper.chKhjk1ubh.}(hjk1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hKhj0hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&DRM_CRTC_HELPER_VBLANK_FUNCS (C macro)c.DRM_CRTC_HELPER_VBLANK_FUNCShNtauh1jxhj0hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhNubj)}(hhh](j)}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j)}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j)}(hDRM_CRTC_HELPER_VBLANK_FUNCSh]j)}(hj1h]hDRM_CRTC_HELPER_VBLANK_FUNCS}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj1hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj1hhhj1hKubah}(h]j1ah ](jjeh"]h$]h&]jj)jhuh1jhj1hKhj1hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj1hhhj1hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj1jj1jjjuh1jhhhj0hj1hNubh)}(h ``DRM_CRTC_HELPER_VBLANK_FUNCS``h]jz)}(hj1h]hDRM_CRTC_HELPER_VBLANK_FUNCS}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhKhj0hhubjT=)}(h Default implementation for VBLANK helpers **Description** This macro initializes struct :c:type:`drm_crtc_helper_funcs` to default helpers for VBLANK handling. h](jT=)}(h*Default implementation for VBLANK helpers h]h)}(h)Default implementation for VBLANK helpersh]h)Default implementation for VBLANK helpers}(hj 2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhKhj2ubah}(h]h ]h"]h$]h&]uh1jS=hj2hKhj2ubh)}(h**Description**h]j%)}(hj"2h]h Description}(hj$2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj 2ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhKhj2ubh)}(heThis macro initializes struct :c:type:`drm_crtc_helper_funcs` to default helpers for VBLANK handling.h](hThis macro initializes struct }(hj82hhhNhNubh)}(h:c:type:`drm_crtc_helper_funcs`h]jz)}(hjB2h]hdrm_crtc_helper_funcs}(hjD2hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj@2ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhKhj82ubh( to default helpers for VBLANK handling.}(hj82hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_2hKhj2ubeh}(h]h ]h"]h$]h&]uh1jS=hj2hKhj0hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%DRM_CRTC_VBLANK_TIMER_FUNCS (C macro)c.DRM_CRTC_VBLANK_TIMER_FUNCShNtauh1jxhj0hhhj1hNubj)}(hhh](j)}(hDRM_CRTC_VBLANK_TIMER_FUNCSh]j)}(hDRM_CRTC_VBLANK_TIMER_FUNCSh]j)}(hDRM_CRTC_VBLANK_TIMER_FUNCSh]j)}(hj2h]hDRM_CRTC_VBLANK_TIMER_FUNCS}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj2hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhK.ubah}(h]h ]h"]h$]h&]jjjuh1jjjhj2hhhj2hK.ubah}(h]j|2ah ](jjeh"]h$]h&]jj)jhuh1jhj2hK.hj~2hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj~2hhhj2hK.ubeh}(h]h ](jmacroeh"]h$]h&]jjjj2jj2jjjuh1jhhhj0hj1hNubh)}(h``DRM_CRTC_VBLANK_TIMER_FUNCS``h]jz)}(hj2h]hDRM_CRTC_VBLANK_TIMER_FUNCS}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhK0hj0hhubjT=)}(h Default implementation for VBLANK timers **Description** This macro initializes struct :c:type:`drm_crtc_funcs` to default helpers for VBLANK timers. h](jT=)}(h)Default implementation for VBLANK timers h]h)}(h(Default implementation for VBLANK timersh]h(Default implementation for VBLANK timers}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhK.hj2ubah}(h]h ]h"]h$]h&]uh1jS=hj2hK.hj2ubh)}(h**Description**h]j%)}(hj2h]h Description}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhK0hj2ubh)}(h\This macro initializes struct :c:type:`drm_crtc_funcs` to default helpers for VBLANK timers.h](hThis macro initializes struct }(hj 3hhhNhNubh)}(h:c:type:`drm_crtc_funcs`h]jz)}(hj3h]hdrm_crtc_funcs}(hj3hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:101: ./include/drm/drm_vblank_helper.hhK/hj 3ubh& to default helpers for VBLANK timers.}(hj 3hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj13hK/hj2ubeh}(h]h ]h"]h$]h&]uh1jS=hj2hK.hj0hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_crtc_vblank_atomic_flush (C function)c.drm_crtc_vblank_atomic_flushhNtauh1jxhj0hhhNhNubj)}(hhh](j)}(hYvoid drm_crtc_vblank_atomic_flush (struct drm_crtc *crtc, struct drm_atomic_state *state)h]j)}(hXvoid drm_crtc_vblank_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hj[3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW3hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK(ubj)}(h h]h }(hjj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW3hhhji3hK(ubj)}(hdrm_crtc_vblank_atomic_flushh]j)}(hdrm_crtc_vblank_atomic_flushh]hdrm_crtc_vblank_atomic_flush}(hj|3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjx3ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjW3hhhji3hK(ubj)}(h7(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj3modnameN classnameNjj)}j]j)}jj~3sbc.drm_crtc_vblank_atomic_flushasbuh1hhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj+)}(hj9h]h*}(hj3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3ubj)}(hcrtch]hcrtc}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj 4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj(4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*4modnameN classnameNjj)}j]j3c.drm_crtc_vblank_atomic_flushasbuh1hhj4ubj)}(h h]h }(hjF4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj+)}(hj9h]h*}(hjT4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj4ubj)}(hstateh]hstate}(hja4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubeh}(h]h ]h"]h$]h&]jjuh1jhjW3hhhji3hK(ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjS3hhhji3hK(ubah}(h]jN3ah ](jjeh"]h$]h&]jj)jhuh1jhji3hK(hjP3hhubj)}(hhh]h)}(hVImplements struct :c:type:`drm_crtc_helper_funcs.atomic_flush `h](hImplements struct }(hj4hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_flush `h]jz)}(hj4h]h"drm_crtc_helper_funcs.atomic_flush}(hj4hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j3c.drm_crtc_vblank_atomic_flushasbjdrm_crtc_helper_funcsuh1hhji3hK(hj4ubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK(hj4hhubah}(h]h ]h"]h$]h&]uh1jhjP3hhhji3hK(ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj4jj4jjjuh1jhhhj0hNhNubj)}(hXt**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_state *state`` The atomic state to apply **Description** The helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event. See also struct :c:type:`drm_crtc_helper_funcs.atomic_flush `.h](h)}(h**Parameters**h]j%)}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK,hj4ubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` The CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj4h]hstruct drm_crtc *crtc}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK*hj4ubj)}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj 5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hK*hj5ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhj5hK*hj4ubjn)}(h=``struct drm_atomic_state *state`` The atomic state to apply h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj)5h]hstruct drm_atomic_state *state}(hj+5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'5ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK+hj#5ubj)}(hhh]h)}(hThe atomic state to applyh]hThe atomic state to apply}(hjB5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>5hK+hj?5ubah}(h]h ]h"]h$]h&]uh1jhj#5ubeh}(h]h ]h"]h$]h&]uh1jmhj>5hK+hj4ubeh}(h]h ]h"]h$]h&]uh1jhhj4ubh)}(h**Description**h]j%)}(hjd5h]h Description}(hjf5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjb5ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK-hj4ubh)}(hThe helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event.h]hThe helper drm_crtc_vblank_atomic_flush() implements atomic_flush of struct drm_crtc_helper_funcs for CRTCs that only need to send out a VBLANK event.}(hjz5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK,hj4ubh)}(hUSee also struct :c:type:`drm_crtc_helper_funcs.atomic_flush `.h](hSee also struct }(hj5hhhNhNubh)}(hD:c:type:`drm_crtc_helper_funcs.atomic_flush `h]jz)}(hj5h]h"drm_crtc_helper_funcs.atomic_flush}(hj5hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj5ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK0hj5ubh.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj5hK0hj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj0hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_crtc_vblank_atomic_enable (C function)c.drm_crtc_vblank_atomic_enablehNtauh1jxhj0hhhNhNubj)}(hhh](j)}(hZvoid drm_crtc_vblank_atomic_enable (struct drm_crtc *crtc, struct drm_atomic_state *state)h]j)}(hYvoid drm_crtc_vblank_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKKubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhj5hKKubj)}(hdrm_crtc_vblank_atomic_enableh]j)}(hdrm_crtc_vblank_atomic_enableh]hdrm_crtc_vblank_atomic_enable}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj5hhhj5hKKubj)}(h7(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj%6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hj66hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj36ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj86modnameN classnameNjj)}j]j)}jj5sbc.drm_crtc_vblank_atomic_enableasbuh1hhj6ubj)}(h h]h }(hjV6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjd6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hcrtch]hcrtc}(hjq6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj6modnameN classnameNjj)}j]jR6c.drm_crtc_vblank_atomic_enableasbuh1hhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hj6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hstateh]hstate}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubeh}(h]h ]h"]h$]h&]jjuh1jhj5hhhj5hKKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj5hhhj5hKKubah}(h]j5ah ](jjeh"]h$]h&]jj)jhuh1jhj5hKKhj5hhubj)}(hhh]h)}(hWImplements struct :c:type:`drm_crtc_helper_funcs.atomic_enable `h](hImplements struct }(hj 7hhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]jz)}(hj7h]h#drm_crtc_helper_funcs.atomic_enable}(hj7hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jR6c.drm_crtc_vblank_atomic_enableasbjdrm_crtc_helper_funcsuh1hhji3hK(hj 7ubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKKhj7hhubah}(h]h ]h"]h$]h&]uh1jhj5hhhj5hKKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjG7jjG7jjjuh1jhhhj0hNhNubj)}(hXd**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_state *state`` The atomic state **Description** The helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs. See also struct :c:type:`drm_crtc_helper_funcs.atomic_enable `.h](h)}(h**Parameters**h]j%)}(hjQ7h]h Parameters}(hjS7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjO7ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKOhjK7ubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` The CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjp7h]hstruct drm_crtc *crtc}(hjr7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjn7ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKLhjj7ubj)}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hKLhj7ubah}(h]h ]h"]h$]h&]uh1jhjj7ubeh}(h]h ]h"]h$]h&]uh1jmhj7hKLhjg7ubjn)}(h4``struct drm_atomic_state *state`` The atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj7h]hstruct drm_atomic_state *state}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKMhj7ubj)}(hhh]h)}(hThe atomic stateh]hThe atomic state}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hKMhj7ubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jmhj7hKMhjg7ubeh}(h]h ]h"]h$]h&]uh1jhhjK7ubh)}(h**Description**h]j%)}(hj7h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKOhjK7ubh)}(hThe helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs.h]hThe helper drm_crtc_vblank_atomic_enable() implements atomic_enable of struct drm_crtc_helper_funcs for CRTCs the only need to enable VBLANKs.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKNhjK7ubh)}(hVSee also struct :c:type:`drm_crtc_helper_funcs.atomic_enable `.h](hSee also struct }(hj 8hhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.atomic_enable `h]jz)}(hj8h]h#drm_crtc_helper_funcs.atomic_enable}(hj8hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKQhj 8ubh.}(hj 8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj08hKQhjK7ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj0hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_crtc_vblank_atomic_disable (C function) c.drm_crtc_vblank_atomic_disablehNtauh1jxhj0hhhNhNubj)}(hhh](j)}(h[void drm_crtc_vblank_atomic_disable (struct drm_crtc *crtc, struct drm_atomic_state *state)h]j)}(hZvoid drm_crtc_vblank_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hj[8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW8hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK\ubj)}(h h]h }(hjj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW8hhhji8hK\ubj)}(hdrm_crtc_vblank_atomic_disableh]j)}(hdrm_crtc_vblank_atomic_disableh]hdrm_crtc_vblank_atomic_disable}(hj|8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjx8ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjW8hhhji8hK\ubj)}(h7(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj8modnameN classnameNjj)}j]j)}jj~8sb c.drm_crtc_vblank_atomic_disableasbuh1hhj8ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj+)}(hj9h]h*}(hj8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj8ubj)}(hcrtch]hcrtc}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj8ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj 9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj(9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%9ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*9modnameN classnameNjj)}j]j8 c.drm_crtc_vblank_atomic_disableasbuh1hhj9ubj)}(h h]h }(hjF9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj+)}(hj9h]h*}(hjT9hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj9ubj)}(hstateh]hstate}(hja9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj8ubeh}(h]h ]h"]h$]h&]jjuh1jhjW8hhhji8hK\ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjS8hhhji8hK\ubah}(h]jN8ah ](jjeh"]h$]h&]jj)jhuh1jhji8hK\hjP8hhubj)}(hhh]h)}(hXImplements struct :c:type:`drm_crtc_helper_funcs.atomic_disable `h](hImplements struct }(hj9hhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.atomic_disable `h]jz)}(hj9h]h$drm_crtc_helper_funcs.atomic_disable}(hj9hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j8 c.drm_crtc_vblank_atomic_disableasbjdrm_crtc_helper_funcsuh1hhji3hK(hj9ubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK\hj9hhubah}(h]h ]h"]h$]h&]uh1jhjP8hhhji8hK\ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj9jj9jjjuh1jhhhj0hNhNubj)}(hXZ**Parameters** ``struct drm_crtc *crtc`` The CRTC ``struct drm_atomic_state *state`` The atomic state **Description** The helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs. See also struct :c:type:`drm_crtc_funcs.atomic_disable `.h](h)}(h**Parameters**h]j%)}(hj9h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK`hj9ubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` The CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj9h]hstruct drm_crtc *crtc}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK]hj9ubj)}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj :hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hK]hj:ubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhj:hK]hj9ubjn)}(h4``struct drm_atomic_state *state`` The atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj):h]hstruct drm_atomic_state *state}(hj+:hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj':ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK^hj#:ubj)}(hhh]h)}(hThe atomic stateh]hThe atomic state}(hjB:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>:hK^hj?:ubah}(h]h ]h"]h$]h&]uh1jhj#:ubeh}(h]h ]h"]h$]h&]uh1jmhj>:hK^hj9ubeh}(h]h ]h"]h$]h&]uh1jhhj9ubh)}(h**Description**h]j%)}(hjd:h]h Description}(hjf:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjb:ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK`hj9ubh)}(hThe helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs.h]hThe helper drm_crtc_vblank_atomic_disable() implements atomic_disable of struct drm_crtc_helper_funcs for CRTCs the only need to disable VBLANKs.}(hjz:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK_hj9ubh)}(hISee also struct :c:type:`drm_crtc_funcs.atomic_disable `.h](hSee also struct }(hj:hhhNhNubh)}(h8:c:type:`drm_crtc_funcs.atomic_disable `h]jz)}(hj:h]hdrm_crtc_funcs.atomic_disable}(hj:hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKbhj:ubh.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:hKbhj9ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj0hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j7drm_crtc_vblank_helper_enable_vblank_timer (C function),c.drm_crtc_vblank_helper_enable_vblank_timerhNtauh1jxhj0hhhNhNubj)}(hhh](j)}(hFint drm_crtc_vblank_helper_enable_vblank_timer (struct drm_crtc *crtc)h]j)}(hEint drm_crtc_vblank_helper_enable_vblank_timer(struct drm_crtc *crtc)h](j)}(hinth]hint}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKqubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhj:hKqubj)}(h*drm_crtc_vblank_helper_enable_vblank_timerh]j)}(h*drm_crtc_vblank_helper_enable_vblank_timerh]h*drm_crtc_vblank_helper_enable_vblank_timer}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj:hhhj:hKqubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hj%;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hj6;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3;ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj8;modnameN classnameNjj)}j]j)}jj:sb,c.drm_crtc_vblank_helper_enable_vblank_timerasbuh1hhj;ubj)}(h h]h }(hjV;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj+)}(hj9h]h*}(hjd;hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubj)}(hcrtch]hcrtc}(hjq;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubah}(h]h ]h"]h$]h&]jjuh1jhj:hhhj:hKqubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj:hhhj:hKqubah}(h]j:ah ](jjeh"]h$]h&]jj)jhuh1jhj:hKqhj:hhubj)}(hhh]h)}(hIImplements struct :c:type:`drm_crtc_funcs.enable_vblank `h](hImplements struct }(hj;hhhNhNubh)}(h7:c:type:`drm_crtc_funcs.enable_vblank `h]jz)}(hj;h]hdrm_crtc_funcs.enable_vblank}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jR;,c.drm_crtc_vblank_helper_enable_vblank_timerasbjdrm_crtc_funcsuh1hhji3hK(hj;ubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKqhj;hhubah}(h]h ]h"]h$]h&]uh1jhj:hhhj:hKqubeh}(h]h ](jfunctioneh"]h$]h&]jjjj;jj;jjjuh1jhhhj0hNhNubj)}(hX#**Parameters** ``struct drm_crtc *crtc`` The CRTC **Description** The helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct :c:type:`drm_vblank_crtc.framedur_ns `. See also struct :c:type:`drm_crtc_helper_funcs.enable_vblank `. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j%)}(hj;h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKuhj;ubji)}(hhh]jn)}(h#``struct drm_crtc *crtc`` The CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj<h]hstruct drm_crtc *crtc}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKrhj;ubj)}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hKrhj<ubah}(h]h ]h"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]uh1jmhj<hKrhj;ubah}(h]h ]h"]h$]h&]uh1jhhj;ubh)}(h**Description**h]j%)}(hj;<h]h Description}(hj=<hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9<ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKthj;ubh)}(hXEThe helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct :c:type:`drm_vblank_crtc.framedur_ns `.h](hX The helper drm_crtc_vblank_helper_enable_vblank_timer() implements enable_vblank of struct drm_crtc_helper_funcs for CRTCs that require a VBLANK timer. It sets up the timer on the first invocation. The started timer expires after the current frame duration. See struct }(hjQ<hhhNhNubh)}(h7:c:type:`drm_vblank_crtc.framedur_ns `h]jz)}(hj[<h]hdrm_vblank_crtc.framedur_ns}(hj]<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjY<ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_vblank_crtcuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKshjQ<ubh.}(hjQ<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjx<hKshj;ubh)}(hVSee also struct :c:type:`drm_crtc_helper_funcs.enable_vblank `.h](hSee also struct }(hj<hhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.enable_vblank `h]jz)}(hj<h]h#drm_crtc_helper_funcs.enable_vblank}(hj<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj<ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKyhj<ubh.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<hKyhj;ubh)}(h **Return**h]j%)}(hj<h]hReturn}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK{hj;ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chK|hj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj0hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j8drm_crtc_vblank_helper_disable_vblank_timer (C function)-c.drm_crtc_vblank_helper_disable_vblank_timerhNtauh1jxhj0hhhNhNubj)}(hhh](j)}(hHvoid drm_crtc_vblank_helper_disable_vblank_timer (struct drm_crtc *crtc)h]j)}(hGvoid drm_crtc_vblank_helper_disable_vblank_timer(struct drm_crtc *crtc)h](j)}(hvoidh]hvoid}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKubj)}(h h]h }(hj =hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhj =hKubj)}(h+drm_crtc_vblank_helper_disable_vblank_timerh]j)}(h+drm_crtc_vblank_helper_disable_vblank_timerh]h+drm_crtc_vblank_helper_disable_vblank_timer}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj<hhhj =hKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj9=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5=ubj)}(h h]h }(hjF=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5=ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjW=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjT=ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjY=modnameN classnameNjj)}j]j)}jj=sb-c.drm_crtc_vblank_helper_disable_vblank_timerasbuh1hhj5=ubj)}(h h]h }(hjw=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5=ubj+)}(hj9h]h*}(hj=hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj5=ubj)}(hcrtch]hcrtc}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj1=ubah}(h]h ]h"]h$]h&]jjuh1jhj<hhhj =hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj<hhhj =hKubah}(h]j<ah ](jjeh"]h$]h&]jj)jhuh1jhj =hKhj<hhubj)}(hhh]h)}(hJImplements struct :c:type:`drm_crtc_funcs.disable_vblank `h](hImplements struct }(hj=hhhNhNubh)}(h8:c:type:`drm_crtc_funcs.disable_vblank `h]jz)}(hj=h]hdrm_crtc_funcs.disable_vblank}(hj=hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]js=-c.drm_crtc_vblank_helper_disable_vblank_timerasbjdrm_crtc_funcsuh1hhji3hK(hj=ubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj=hhubah}(h]h ]h"]h$]h&]uh1jhj<hhhj =hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj=jj=jjjuh1jhhhj0hNhNubj)}(hX2**Parameters** ``struct drm_crtc *crtc`` The CRTC **Description** The helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. See also struct :c:type:`drm_crtc_helper_funcs.disable_vblank `.h](h)}(h**Parameters**h]j%)}(hj>h]h Parameters}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj=ubji)}(hhh]jn)}(h#``struct drm_crtc *crtc`` The CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj!>h]hstruct drm_crtc *crtc}(hj#>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj>ubj)}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj:>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6>hKhj7>ubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jmhj6>hKhj>ubah}(h]h ]h"]h$]h&]uh1jhhj=ubh)}(h**Description**h]j%)}(hj\>h]h Description}(hj^>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjZ>ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj=ubh)}(hThe helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer.h]hThe helper drm_crtc_vblank_helper_disable_vblank_timer() implements disable_vblank of struct drm_crtc_funcs for CRTCs that require a VBLANK timer.}(hjr>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj=ubh)}(hWSee also struct :c:type:`drm_crtc_helper_funcs.disable_vblank `.h](hSee also struct }(hj>hhhNhNubh)}(hF:c:type:`drm_crtc_helper_funcs.disable_vblank `h]jz)}(hj>h]h$drm_crtc_helper_funcs.disable_vblank}(hj>hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj>ubh.}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>hKhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj0hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jCdrm_crtc_vblank_helper_get_vblank_timestamp_from_timer (C function)8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerhNtauh1jxhj0hhhNhNubj)}(hhh](j)}(hbool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer (struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h]j)}(hbool drm_crtc_vblank_helper_get_vblank_timestamp_from_timer(struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h](j)}(hjAh]hbool}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhj>hKubj)}(h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timerh]j)}(h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timerh]h6drm_crtc_vblank_helper_get_vblank_timestamp_from_timer}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj>hhhj>hKubj)}(hQ(struct drm_crtc *crtc, int *max_error, ktime_t *vblank_time, bool in_vblank_irq)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ?ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ?ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hj-?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/?modnameN classnameNjj)}j]j)}jj>sb8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbuh1hhj ?ubj)}(h h]h }(hjM?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ?ubj+)}(hj9h]h*}(hj[?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ?ubj)}(hcrtch]hcrtc}(hjh?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj?ubj)}(hint *max_errorh](j)}(hinth]hint}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}?ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}?ubj+)}(hj9h]h*}(hj?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj}?ubj)}(h max_errorh]h max_error}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj?ubj)}(hktime_t *vblank_timeh](h)}(hhh]j)}(hktime_th]hktime_t}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]jI?8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbuh1hhj?ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj+)}(hj9h]h*}(hj?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj?ubj)}(h vblank_timeh]h vblank_time}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj?ubj)}(hbool in_vblank_irqh](j)}(hjAh]hbool}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hj%@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h in_vblank_irqh]h in_vblank_irq}(hj3@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj?ubeh}(h]h ]h"]h$]h&]jjuh1jhj>hhhj>hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>hhhj>hKubah}(h]j>ah ](jjeh"]h$]h&]jj)jhuh1jhj>hKhj>hhubj)}(hhh]h)}(hPImplements struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `h](hImplements struct }(hj]@hhhNhNubh)}(h>:c:type:`drm_crtc_funcs.get_vblank_timestamp `h]jz)}(hjg@h]h#drm_crtc_funcs.get_vblank_timestamp}(hji@hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhje@ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jI?8c.drm_crtc_vblank_helper_get_vblank_timestamp_from_timerasbjdrm_crtc_funcsuh1hhji3hK(hj]@ubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhjZ@hhubah}(h]h ]h"]h$]h&]uh1jhj>hhhj>hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj@jj@jjjuh1jhhhj0hNhNubj)}(hXY**Parameters** ``struct drm_crtc *crtc`` The CRTC ``int *max_error`` Maximum acceptable error ``ktime_t *vblank_time`` Returns the next vblank timestamp ``bool in_vblank_irq`` True is called from drm_crtc_handle_vblank() **Description** The helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer's expiry time. See also struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `. **Return** True on success, or false otherwise.h](h)}(h**Parameters**h]j%)}(hj@h]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj@ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj@ubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` The CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj@h]hstruct drm_crtc *crtc}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj@ubj)}(hhh]h)}(hThe CRTCh]hThe CRTC}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hKhj@ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj@hKhj@ubjn)}(h,``int *max_error`` Maximum acceptable error h](jt)}(h``int *max_error``h]jz)}(hj@h]hint *max_error}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj@ubj)}(hhh]h)}(hMaximum acceptable errorh]hMaximum acceptable error}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKhjAubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhjAhKhj@ubjn)}(h;``ktime_t *vblank_time`` Returns the next vblank timestamp h](jt)}(h``ktime_t *vblank_time``h]jz)}(hj4Ah]hktime_t *vblank_time}(hj6AhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2Aubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj.Aubj)}(hhh]h)}(h!Returns the next vblank timestamph]h!Returns the next vblank timestamp}(hjMAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIAhKhjJAubah}(h]h ]h"]h$]h&]uh1jhj.Aubeh}(h]h ]h"]h$]h&]uh1jmhjIAhKhj@ubjn)}(hD``bool in_vblank_irq`` True is called from drm_crtc_handle_vblank() h](jt)}(h``bool in_vblank_irq``h]jz)}(hjmAh]hbool in_vblank_irq}(hjoAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkAubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhjgAubj)}(hhh]h)}(h,True is called from drm_crtc_handle_vblank()h]h,True is called from drm_crtc_handle_vblank()}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKhjAubah}(h]h ]h"]h$]h&]uh1jhjgAubeh}(h]h ]h"]h$]h&]uh1jmhjAhKhj@ubeh}(h]h ]h"]h$]h&]uh1jhhj@ubh)}(h**Description**h]j%)}(hjAh]h Description}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj@ubh)}(hThe helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer's expiry time.h]hThe helper drm_crtc_helper_get_vblank_timestamp_from_timer() implements get_vblank_timestamp of struct drm_crtc_funcs for CRTCs that require a VBLANK timer. It returns the timestamp according to the timer’s expiry time.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj@ubh)}(hOSee also struct :c:type:`drm_crtc_funcs.get_vblank_timestamp `.h](hSee also struct }(hjAhhhNhNubh)}(h>:c:type:`drm_crtc_funcs.get_vblank_timestamp `h]jz)}(hjAh]h#drm_crtc_funcs.get_vblank_timestamp}(hjAhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhjAubh.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhKhj@ubh)}(h **Return**h]j%)}(hjBh]hReturn}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj@ubh)}(h$True on success, or false otherwise.h]h$True on success, or false otherwise.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:104: ./drivers/gpu/drm/drm_vblank_helper.chKhj@ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj0hhhNhNubeh}(h]vblank-helper-referenceah ]h"]vblank helper referenceah$]h&]uh1hhj:hhhhhK`ubeh}(h]()atomic-modeset-helper-functions-referencej~:eh ]h"]()atomic modeset helper functions referencedrm_atomic_helpereh$]h&]uh1hhhhhhhhK0expect_referenced_by_name}j;Bjs:sexpect_referenced_by_id}j~:js:subh)}(hhh](h)}(hSimple KMS Helper Referenceh]hSimple KMS Helper Reference}(hjEBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBBhhhhhKlubh)}(hMThis helper library provides helpers for drivers for simple display hardware.h]hMThis helper library provides helpers for drivers for simple display hardware.}(hjSBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:110: ./drivers/gpu/drm/drm_simple_kms_helper.chKhjBBhhubh)}(hXdrm_simple_display_pipe_init() initializes a simple display pipeline which has only one full-screen scanout buffer feeding one output. The pipeline is represented by :c:type:`struct drm_simple_display_pipe ` and binds together :c:type:`drm_plane`, :c:type:`drm_crtc` and :c:type:`drm_encoder` structures into one fixed entity. Some flexibility for code reuse is provided through a separately allocated :c:type:`drm_connector` object and supporting optional :c:type:`drm_bridge` encoder drivers.h](hdrm_simple_display_pipe_init() initializes a simple display pipeline which has only one full-screen scanout buffer feeding one output. The pipeline is represented by }(hjbBhhhNhNubh)}(hB:c:type:`struct drm_simple_display_pipe `h]jz)}(hjlBh]hstruct drm_simple_display_pipe}(hjnBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipeuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:110: ./drivers/gpu/drm/drm_simple_kms_helper.chKhjbBubh and binds together }(hjbBhhhNhNubh)}(h:c:type:`drm_plane`h]jz)}(hjBh]h drm_plane}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_planeuh1hhjBhKhjbBubh, }(hjbBhhhNhNubh)}(h:c:type:`drm_crtc`h]jz)}(hjBh]hdrm_crtc}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtcuh1hhjBhKhjbBubh and }(hjbBhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjBh]h drm_encoder}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hhjBhKhjbBubhn structures into one fixed entity. Some flexibility for code reuse is provided through a separately allocated }(hjbBhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjBh]h drm_connector}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjBhKhjbBubh object and supporting optional }(hjbBhhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjCh]h drm_bridge}(hjChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjBhKhjbBubh encoder drivers.}(hjbBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhKhjBBhhubh)}(hMany drivers require only a very simple encoder that fulfills the minimum requirements of the display pipeline and does not add additional functionality. The function drm_simple_encoder_init() provides an implementation of such an encoder.h]hMany drivers require only a very simple encoder that fulfills the minimum requirements of the display pipeline and does not add additional functionality. The function drm_simple_encoder_init() provides an implementation of such an encoder.}(hjCChhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:110: ./drivers/gpu/drm/drm_simple_kms_helper.chKhjBBhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_simple_display_pipe_funcs (C struct)c.drm_simple_display_pipe_funcshNtauh1jxhjBBhhhNhNubj)}(hhh](j)}(hdrm_simple_display_pipe_funcsh]j)}(h$struct drm_simple_display_pipe_funcsh](j)}(hjh]hstruct}(hjkChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgChhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKubj)}(h h]h }(hjyChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgChhhjxChKubj)}(hdrm_simple_display_pipe_funcsh]j)}(hjeCh]hdrm_simple_display_pipe_funcs}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubah}(h]h ](jjeh"]h$]h&]jjuh1jhjgChhhjxChKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjcChhhjxChKubah}(h]j^Cah ](jjeh"]h$]h&]jj)jhuh1jhjxChKhj`Chhubj)}(hhh]h)}(h/helper operations for a simple display pipelineh]h/helper operations for a simple display pipeline}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjChhubah}(h]h ]h"]h$]h&]uh1jhj`ChhhjxChKubeh}(h]h ](jstructeh"]h$]h&]jjjjCjjCjjjuh1jhhhjBBhNhNubj)}(hX]**Definition**:: struct drm_simple_display_pipe_funcs { enum drm_mode_status (*mode_valid)(struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode); void (*enable)(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state); void (*disable)(struct drm_simple_display_pipe *pipe); int (*check)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state, struct drm_crtc_state *crtc_state); void (*update)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_plane_state); int (*prepare_fb)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); void (*cleanup_fb)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); int (*begin_fb_access)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); int (*enable_vblank)(struct drm_simple_display_pipe *pipe); void (*disable_vblank)(struct drm_simple_display_pipe *pipe); void (*reset_crtc)(struct drm_simple_display_pipe *pipe); struct drm_crtc_state * (*duplicate_crtc_state)(struct drm_simple_display_pipe *pipe); void (*destroy_crtc_state)(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state); void (*reset_plane)(struct drm_simple_display_pipe *pipe); struct drm_plane_state * (*duplicate_plane_state)(struct drm_simple_display_pipe *pipe); void (*destroy_plane_state)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); }; **Members** ``mode_valid`` This callback is used to check if a specific mode is valid in the crtc used in this simple display pipe. This should be implemented if the display pipe has some sort of restriction in the modes it can display. For example, a given display pipe may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. Another reason can be bandwidth mitigation: the memory port on the display controller can have bandwidth limitations not allowing pixel data to be fetched at any rate. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. RETURNS: drm_mode_status Enum ``enable`` This function should be used to enable the pipeline. It is called when the underlying crtc is enabled. This hook is optional. ``disable`` This function should be used to disable the pipeline. It is called when the underlying crtc is disabled. This hook is optional. ``check`` This function is called in the check phase of an atomic update, specifically when the underlying plane is checked. The simple display pipeline helpers already check that the plane is not scaled, fills the entire visible area and is always enabled when the crtc is also enabled. This hook is optional. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. ``update`` This function is called when the underlying plane state is updated. This hook is optional. This is the function drivers should submit the :c:type:`drm_pending_vblank_event` from. Using either drm_crtc_arm_vblank_event(), when the driver supports vblank interrupt handling, or drm_crtc_send_vblank_event() for more complex case. In case the hardware lacks vblank support entirely, drivers can set :c:type:`struct drm_crtc_state `.no_vblank in :c:type:`struct drm_simple_display_pipe_funcs `.check and let DRM's atomic helper fake a vblank event. ``prepare_fb`` Optional, called by :c:type:`drm_plane_helper_funcs.prepare_fb `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.prepare_fb ` hook for more details. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set, drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. ``cleanup_fb`` Optional, called by :c:type:`drm_plane_helper_funcs.cleanup_fb `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for more details. ``begin_fb_access`` Optional, called by :c:type:`drm_plane_helper_funcs.begin_fb_access `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.begin_fb_access ` hook for more details. ``end_fb_access`` Optional, called by :c:type:`drm_plane_helper_funcs.end_fb_access `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.end_fb_access ` hook for more details. ``enable_vblank`` Optional, called by :c:type:`drm_crtc_funcs.enable_vblank `. Please read the documentation for the :c:type:`drm_crtc_funcs.enable_vblank ` hook for more details. ``disable_vblank`` Optional, called by :c:type:`drm_crtc_funcs.disable_vblank `. Please read the documentation for the :c:type:`drm_crtc_funcs.disable_vblank ` hook for more details. ``reset_crtc`` Optional, called by :c:type:`drm_crtc_funcs.reset `. Please read the documentation for the :c:type:`drm_crtc_funcs.reset ` hook for more details. ``duplicate_crtc_state`` Optional, called by :c:type:`drm_crtc_funcs.atomic_duplicate_state `. Please read the documentation for the :c:type:`drm_crtc_funcs.atomic_duplicate_state ` hook for more details. ``destroy_crtc_state`` Optional, called by :c:type:`drm_crtc_funcs.atomic_destroy_state `. Please read the documentation for the :c:type:`drm_crtc_funcs.atomic_destroy_state ` hook for more details. ``reset_plane`` Optional, called by :c:type:`drm_plane_funcs.reset `. Please read the documentation for the :c:type:`drm_plane_funcs.reset ` hook for more details. ``duplicate_plane_state`` Optional, called by :c:type:`drm_plane_funcs.atomic_duplicate_state `. Please read the documentation for the :c:type:`drm_plane_funcs.atomic_duplicate_state ` hook for more details. ``destroy_plane_state`` Optional, called by :c:type:`drm_plane_funcs.atomic_destroy_state `. Please read the documentation for the :c:type:`drm_plane_funcs.atomic_destroy_state ` hook for more details.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjCubh:}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjCubj@)}(hX^struct drm_simple_display_pipe_funcs { enum drm_mode_status (*mode_valid)(struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode); void (*enable)(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state); void (*disable)(struct drm_simple_display_pipe *pipe); int (*check)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state, struct drm_crtc_state *crtc_state); void (*update)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_plane_state); int (*prepare_fb)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); void (*cleanup_fb)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); int (*begin_fb_access)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); int (*enable_vblank)(struct drm_simple_display_pipe *pipe); void (*disable_vblank)(struct drm_simple_display_pipe *pipe); void (*reset_crtc)(struct drm_simple_display_pipe *pipe); struct drm_crtc_state * (*duplicate_crtc_state)(struct drm_simple_display_pipe *pipe); void (*destroy_crtc_state)(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state); void (*reset_plane)(struct drm_simple_display_pipe *pipe); struct drm_plane_state * (*duplicate_plane_state)(struct drm_simple_display_pipe *pipe); void (*destroy_plane_state)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); };h]hX^struct drm_simple_display_pipe_funcs { enum drm_mode_status (*mode_valid)(struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode); void (*enable)(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state); void (*disable)(struct drm_simple_display_pipe *pipe); int (*check)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state, struct drm_crtc_state *crtc_state); void (*update)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_plane_state); int (*prepare_fb)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); void (*cleanup_fb)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); int (*begin_fb_access)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *new_plane_state); void (*end_fb_access)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); int (*enable_vblank)(struct drm_simple_display_pipe *pipe); void (*disable_vblank)(struct drm_simple_display_pipe *pipe); void (*reset_crtc)(struct drm_simple_display_pipe *pipe); struct drm_crtc_state * (*duplicate_crtc_state)(struct drm_simple_display_pipe *pipe); void (*destroy_crtc_state)(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state); void (*reset_plane)(struct drm_simple_display_pipe *pipe); struct drm_plane_state * (*duplicate_plane_state)(struct drm_simple_display_pipe *pipe); void (*destroy_plane_state)(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state); };}hjCsbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjCubh)}(h **Members**h]j%)}(hjCh]hMembers}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjCubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK*hjCubji)}(hhh](jn)}(hX``mode_valid`` This callback is used to check if a specific mode is valid in the crtc used in this simple display pipe. This should be implemented if the display pipe has some sort of restriction in the modes it can display. For example, a given display pipe may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. Another reason can be bandwidth mitigation: the memory port on the display controller can have bandwidth limitations not allowing pixel data to be fetched at any rate. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). This function is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. RETURNS: drm_mode_status Enum h](jt)}(h``mode_valid``h]jz)}(hjDh]h mode_valid}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK1hjDubj)}(hhh](h)}(hXoThis callback is used to check if a specific mode is valid in the crtc used in this simple display pipe. This should be implemented if the display pipe has some sort of restriction in the modes it can display. For example, a given display pipe may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. Another reason can be bandwidth mitigation: the memory port on the display controller can have bandwidth limitations not allowing pixel data to be fetched at any rate.h]hXoThis callback is used to check if a specific mode is valid in the crtc used in this simple display pipe. This should be implemented if the display pipe has some sort of restriction in the modes it can display. For example, a given display pipe may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. Another reason can be bandwidth mitigation: the memory port on the display controller can have bandwidth limitations not allowing pixel data to be fetched at any rate.}(hj3DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj0Dubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hjBDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK!hj0Dubh)}(hThis function is optional.h]hThis function is optional.}(hjQDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK&hj0Dubh)}(hNOTE:h]hNOTE:}(hj`DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK(hj0Dubh)}(hXSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints.h]hXSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints.}(hjoDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK*hj0Dubh)}(hRETURNS:h]hRETURNS:}(hj~DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK/hj0Dubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/DhK1hj0Dubeh}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jmhj/DhK1hjDubjn)}(h``enable`` This function should be used to enable the pipeline. It is called when the underlying crtc is enabled. This hook is optional. h](jt)}(h ``enable``h]jz)}(hjDh]henable}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK;hjDubj)}(hhh]h)}(h}This function should be used to enable the pipeline. It is called when the underlying crtc is enabled. This hook is optional.h]h}This function should be used to enable the pipeline. It is called when the underlying crtc is enabled. This hook is optional.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK9hjDubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jmhjDhK;hjDubjn)}(h``disable`` This function should be used to disable the pipeline. It is called when the underlying crtc is disabled. This hook is optional. h](jt)}(h ``disable``h]jz)}(hjDh]hdisable}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKEhjDubj)}(hhh]h)}(hThis function should be used to disable the pipeline. It is called when the underlying crtc is disabled. This hook is optional.h]hThis function should be used to disable the pipeline. It is called when the underlying crtc is disabled. This hook is optional.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKChjDubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jmhjDhKEhjDubjn)}(hX``check`` This function is called in the check phase of an atomic update, specifically when the underlying plane is checked. The simple display pipeline helpers already check that the plane is not scaled, fills the entire visible area and is always enabled when the crtc is also enabled. This hook is optional. RETURNS: 0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock. h](jt)}(h ``check``h]jz)}(hj!Eh]hcheck}(hj#EhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKXhjEubj)}(hhh](h)}(hX,This function is called in the check phase of an atomic update, specifically when the underlying plane is checked. The simple display pipeline helpers already check that the plane is not scaled, fills the entire visible area and is always enabled when the crtc is also enabled. This hook is optional.h]hX,This function is called in the check phase of an atomic update, specifically when the underlying plane is checked. The simple display pipeline helpers already check that the plane is not scaled, fills the entire visible area and is always enabled when the crtc is also enabled. This hook is optional.}(hj:EhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKLhj7Eubh)}(hRETURNS:h]hRETURNS:}(hjIEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKShj7Eubh)}(h0 on success, -EINVAL if the state or the transition can't be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a :c:type:`drm_modeset_lock` deadlock.h](h0 on success, -EINVAL if the state or the transition can’t be supported, -ENOMEM on memory allocation failure and -EDEADLK if an attempt to obtain another state object ran into a }(hjXEhhhNhNubh)}(h:c:type:`drm_modeset_lock`h]jz)}(hjbEh]hdrm_modeset_lock}(hjdEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj`Eubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_modeset_lockuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKUhjXEubh deadlock.}(hjXEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhKUhj7Eubeh}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhj6EhKXhjDubjn)}(hX\``update`` This function is called when the underlying plane state is updated. This hook is optional. This is the function drivers should submit the :c:type:`drm_pending_vblank_event` from. Using either drm_crtc_arm_vblank_event(), when the driver supports vblank interrupt handling, or drm_crtc_send_vblank_event() for more complex case. In case the hardware lacks vblank support entirely, drivers can set :c:type:`struct drm_crtc_state `.no_vblank in :c:type:`struct drm_simple_display_pipe_funcs `.check and let DRM's atomic helper fake a vblank event. h](jt)}(h ``update``h]jz)}(hjEh]hupdate}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKjhjEubj)}(hhh](h)}(hZThis function is called when the underlying plane state is updated. This hook is optional.h]hZThis function is called when the underlying plane state is updated. This hook is optional.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhK`hjEubh)}(hXThis is the function drivers should submit the :c:type:`drm_pending_vblank_event` from. Using either drm_crtc_arm_vblank_event(), when the driver supports vblank interrupt handling, or drm_crtc_send_vblank_event() for more complex case. In case the hardware lacks vblank support entirely, drivers can set :c:type:`struct drm_crtc_state `.no_vblank in :c:type:`struct drm_simple_display_pipe_funcs `.check and let DRM's atomic helper fake a vblank event.h](h/This is the function drivers should submit the }(hjEhhhNhNubh)}(h":c:type:`drm_pending_vblank_event`h]jz)}(hjEh]hdrm_pending_vblank_event}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_pending_vblank_eventuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKchjEubh from. Using either drm_crtc_arm_vblank_event(), when the driver supports vblank interrupt handling, or drm_crtc_send_vblank_event() for more complex case. In case the hardware lacks vblank support entirely, drivers can set }(hjEhhhNhNubh)}(h0:c:type:`struct drm_crtc_state `h]jz)}(hjEh]hstruct drm_crtc_state}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjEhKchjEubh.no_vblank in }(hjEhhhNhNubh)}(hN:c:type:`struct drm_simple_display_pipe_funcs `h]jz)}(hjFh]h$struct drm_simple_display_pipe_funcs}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipe_funcsuh1hhjEhKchjEubh9.check and let DRM’s atomic helper fake a vblank event.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhKchjEubeh}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhjEhKjhjDubjn)}(hX ``prepare_fb`` Optional, called by :c:type:`drm_plane_helper_funcs.prepare_fb `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.prepare_fb ` hook for more details. For GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set, drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook. h](jt)}(h``prepare_fb``h]jz)}(hjNFh]h prepare_fb}(hjPFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLFubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKzhjHFubj)}(hhh](h)}(hOptional, called by :c:type:`drm_plane_helper_funcs.prepare_fb `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.prepare_fb ` hook for more details.h](hOptional, called by }(hjgFhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jz)}(hjqFh]h!drm_plane_helper_funcs.prepare_fb}(hjsFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjoFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKrhjgFubh). Please read the documentation for the }(hjgFhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.prepare_fb `h]jz)}(hjFh]h!drm_plane_helper_funcs.prepare_fb}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjFhKrhjgFubh hook for more details.}(hjgFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhKrhjdFubh)}(hXFor GEM drivers who neither have a **prepare_fb** nor **cleanup_fb** hook set, drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their **prepare_fb** hook.h](h#For GEM drivers who neither have a }(hjFhhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubh nor }(hjFhhhNhNubj%)}(h**cleanup_fb**h]h cleanup_fb}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubh hook set, drm_gem_plane_helper_prepare_fb() is called automatically to implement this. Other drivers which need additional plane processing can call drm_gem_plane_helper_prepare_fb() from their }(hjFhhhNhNubj%)}(h**prepare_fb**h]h prepare_fb}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubh hook.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKvhjdFubeh}(h]h ]h"]h$]h&]uh1jhjHFubeh}(h]h ]h"]h$]h&]uh1jmhjcFhKzhjDubjn)}(h``cleanup_fb`` Optional, called by :c:type:`drm_plane_helper_funcs.cleanup_fb `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for more details. h](jt)}(h``cleanup_fb``h]jz)}(hjGh]h cleanup_fb}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj Gubj)}(hhh]h)}(hOptional, called by :c:type:`drm_plane_helper_funcs.cleanup_fb `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.cleanup_fb ` hook for more details.h](hOptional, called by }(hj,GhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]jz)}(hj6Gh]h!drm_plane_helper_funcs.cleanup_fb}(hj8GhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4Gubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj,Gubh). Please read the documentation for the }(hj,GhhhNhNubh)}(hD:c:type:`drm_plane_helper_funcs.cleanup_fb `h]jz)}(hjZGh]h!drm_plane_helper_funcs.cleanup_fb}(hj\GhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjSGhKhj,Gubh hook for more details.}(hj,GhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSGhKhj)Gubah}(h]h ]h"]h$]h&]uh1jhj Gubeh}(h]h ]h"]h$]h&]uh1jmhj(GhKhjDubjn)}(h``begin_fb_access`` Optional, called by :c:type:`drm_plane_helper_funcs.begin_fb_access `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.begin_fb_access ` hook for more details. h](jt)}(h``begin_fb_access``h]jz)}(hjGh]hbegin_fb_access}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjGubj)}(hhh]h)}(hOptional, called by :c:type:`drm_plane_helper_funcs.begin_fb_access `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.begin_fb_access ` hook for more details.h](hOptional, called by }(hjGhhhNhNubh)}(hI:c:type:`drm_plane_helper_funcs.begin_fb_access `h]jz)}(hjGh]h&drm_plane_helper_funcs.begin_fb_access}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjGubh(. Please read the documentation for the }(hjGhhhNhNubh)}(hI:c:type:`drm_plane_helper_funcs.begin_fb_access `h]jz)}(hjGh]h&drm_plane_helper_funcs.begin_fb_access}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjGhKhjGubh hook for more details.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhKhjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjGhKhjDubjn)}(h``end_fb_access`` Optional, called by :c:type:`drm_plane_helper_funcs.end_fb_access `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.end_fb_access ` hook for more details. h](jt)}(h``end_fb_access``h]jz)}(hjHh]h end_fb_access}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj Hubj)}(hhh]h)}(hOptional, called by :c:type:`drm_plane_helper_funcs.end_fb_access `. Please read the documentation for the :c:type:`drm_plane_helper_funcs.end_fb_access ` hook for more details.h](hOptional, called by }(hj,HhhhNhNubh)}(hG:c:type:`drm_plane_helper_funcs.end_fb_access `h]jz)}(hj6Hh]h$drm_plane_helper_funcs.end_fb_access}(hj8HhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4Hubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj,Hubh(. Please read the documentation for the }(hj,HhhhNhNubh)}(hG:c:type:`drm_plane_helper_funcs.end_fb_access `h]jz)}(hjZHh]h$drm_plane_helper_funcs.end_fb_access}(hj\HhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhjSHhKhj,Hubh hook for more details.}(hj,HhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSHhKhj)Hubah}(h]h ]h"]h$]h&]uh1jhj Hubeh}(h]h ]h"]h$]h&]uh1jmhj(HhKhjDubjn)}(h``enable_vblank`` Optional, called by :c:type:`drm_crtc_funcs.enable_vblank `. Please read the documentation for the :c:type:`drm_crtc_funcs.enable_vblank ` hook for more details. h](jt)}(h``enable_vblank``h]jz)}(hjHh]h enable_vblank}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjHubj)}(hhh]h)}(hOptional, called by :c:type:`drm_crtc_funcs.enable_vblank `. Please read the documentation for the :c:type:`drm_crtc_funcs.enable_vblank ` hook for more details.h](hOptional, called by }(hjHhhhNhNubh)}(h7:c:type:`drm_crtc_funcs.enable_vblank `h]jz)}(hjHh]hdrm_crtc_funcs.enable_vblank}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjHubh(. Please read the documentation for the }(hjHhhhNhNubh)}(h7:c:type:`drm_crtc_funcs.enable_vblank `h]jz)}(hjHh]hdrm_crtc_funcs.enable_vblank}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhjHhKhjHubh hook for more details.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjHhKhjHubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjHhKhjDubjn)}(h``disable_vblank`` Optional, called by :c:type:`drm_crtc_funcs.disable_vblank `. Please read the documentation for the :c:type:`drm_crtc_funcs.disable_vblank ` hook for more details. h](jt)}(h``disable_vblank``h]jz)}(hjIh]hdisable_vblank}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj Iubj)}(hhh]h)}(hOptional, called by :c:type:`drm_crtc_funcs.disable_vblank `. Please read the documentation for the :c:type:`drm_crtc_funcs.disable_vblank ` hook for more details.h](hOptional, called by }(hj,IhhhNhNubh)}(h8:c:type:`drm_crtc_funcs.disable_vblank `h]jz)}(hj6Ih]hdrm_crtc_funcs.disable_vblank}(hj8IhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4Iubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj,Iubh(. Please read the documentation for the }(hj,IhhhNhNubh)}(h8:c:type:`drm_crtc_funcs.disable_vblank `h]jz)}(hjZIh]hdrm_crtc_funcs.disable_vblank}(hj\IhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhjSIhKhj,Iubh hook for more details.}(hj,IhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSIhKhj)Iubah}(h]h ]h"]h$]h&]uh1jhj Iubeh}(h]h ]h"]h$]h&]uh1jmhj(IhKhjDubjn)}(h``reset_crtc`` Optional, called by :c:type:`drm_crtc_funcs.reset `. Please read the documentation for the :c:type:`drm_crtc_funcs.reset ` hook for more details. h](jt)}(h``reset_crtc``h]jz)}(hjIh]h reset_crtc}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjIubj)}(hhh]h)}(hOptional, called by :c:type:`drm_crtc_funcs.reset `. Please read the documentation for the :c:type:`drm_crtc_funcs.reset ` hook for more details.h](hOptional, called by }(hjIhhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]jz)}(hjIh]hdrm_crtc_funcs.reset}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjIubh(. Please read the documentation for the }(hjIhhhNhNubh)}(h/:c:type:`drm_crtc_funcs.reset `h]jz)}(hjIh]hdrm_crtc_funcs.reset}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhjIhKhjIubh hook for more details.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhKhjIubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjIhKhjDubjn)}(h``duplicate_crtc_state`` Optional, called by :c:type:`drm_crtc_funcs.atomic_duplicate_state `. Please read the documentation for the :c:type:`drm_crtc_funcs.atomic_duplicate_state ` hook for more details. h](jt)}(h``duplicate_crtc_state``h]jz)}(hjJh]hduplicate_crtc_state}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj Jubj)}(hhh]h)}(hOptional, called by :c:type:`drm_crtc_funcs.atomic_duplicate_state `. Please read the documentation for the :c:type:`drm_crtc_funcs.atomic_duplicate_state ` hook for more details.h](hOptional, called by }(hj,JhhhNhNubh)}(h@:c:type:`drm_crtc_funcs.atomic_duplicate_state `h]jz)}(hj6Jh]h%drm_crtc_funcs.atomic_duplicate_state}(hj8JhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4Jubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj,Jubh(. Please read the documentation for the }(hj,JhhhNhNubh)}(h@:c:type:`drm_crtc_funcs.atomic_duplicate_state `h]jz)}(hjZJh]h%drm_crtc_funcs.atomic_duplicate_state}(hj\JhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhjSJhKhj,Jubh hook for more details.}(hj,JhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSJhKhj)Jubah}(h]h ]h"]h$]h&]uh1jhj Jubeh}(h]h ]h"]h$]h&]uh1jmhj(JhKhjDubjn)}(h``destroy_crtc_state`` Optional, called by :c:type:`drm_crtc_funcs.atomic_destroy_state `. Please read the documentation for the :c:type:`drm_crtc_funcs.atomic_destroy_state ` hook for more details. h](jt)}(h``destroy_crtc_state``h]jz)}(hjJh]hdestroy_crtc_state}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjJubj)}(hhh]h)}(hOptional, called by :c:type:`drm_crtc_funcs.atomic_destroy_state `. Please read the documentation for the :c:type:`drm_crtc_funcs.atomic_destroy_state ` hook for more details.h](hOptional, called by }(hjJhhhNhNubh)}(h>:c:type:`drm_crtc_funcs.atomic_destroy_state `h]jz)}(hjJh]h#drm_crtc_funcs.atomic_destroy_state}(hjJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjJubh(. Please read the documentation for the }(hjJhhhNhNubh)}(h>:c:type:`drm_crtc_funcs.atomic_destroy_state `h]jz)}(hjJh]h#drm_crtc_funcs.atomic_destroy_state}(hjJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhjJhKhjJubh hook for more details.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjJhKhjJubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhjJhKhjDubjn)}(h``reset_plane`` Optional, called by :c:type:`drm_plane_funcs.reset `. Please read the documentation for the :c:type:`drm_plane_funcs.reset ` hook for more details. h](jt)}(h``reset_plane``h]jz)}(hjKh]h reset_plane}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj Kubj)}(hhh]h)}(hOptional, called by :c:type:`drm_plane_funcs.reset `. Please read the documentation for the :c:type:`drm_plane_funcs.reset ` hook for more details.h](hOptional, called by }(hj,KhhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]jz)}(hj6Kh]hdrm_plane_funcs.reset}(hj8KhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4Kubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj,Kubh(. Please read the documentation for the }(hj,KhhhNhNubh)}(h1:c:type:`drm_plane_funcs.reset `h]jz)}(hjZKh]hdrm_plane_funcs.reset}(hj\KhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXKubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhjSKhKhj,Kubh hook for more details.}(hj,KhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSKhKhj)Kubah}(h]h ]h"]h$]h&]uh1jhj Kubeh}(h]h ]h"]h$]h&]uh1jmhj(KhKhjDubjn)}(h``duplicate_plane_state`` Optional, called by :c:type:`drm_plane_funcs.atomic_duplicate_state `. Please read the documentation for the :c:type:`drm_plane_funcs.atomic_duplicate_state ` hook for more details. h](jt)}(h``duplicate_plane_state``h]jz)}(hjKh]hduplicate_plane_state}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjKubj)}(hhh]h)}(hOptional, called by :c:type:`drm_plane_funcs.atomic_duplicate_state `. Please read the documentation for the :c:type:`drm_plane_funcs.atomic_duplicate_state ` hook for more details.h](hOptional, called by }(hjKhhhNhNubh)}(hB:c:type:`drm_plane_funcs.atomic_duplicate_state `h]jz)}(hjKh]h&drm_plane_funcs.atomic_duplicate_state}(hjKhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjKubh). Please read the documentation for the }(hjKhhhNhNubh)}(hB:c:type:`drm_plane_funcs.atomic_duplicate_state `h]jz)}(hjKh]h&drm_plane_funcs.atomic_duplicate_state}(hjKhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhjKhKhjKubh hook for more details.}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjKhKhjKubah}(h]h ]h"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]uh1jmhjKhKhjDubjn)}(h``destroy_plane_state`` Optional, called by :c:type:`drm_plane_funcs.atomic_destroy_state `. Please read the documentation for the :c:type:`drm_plane_funcs.atomic_destroy_state ` hook for more details.h](jt)}(h``destroy_plane_state``h]jz)}(hjLh]hdestroy_plane_state}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj Lubj)}(hhh]h)}(hOptional, called by :c:type:`drm_plane_funcs.atomic_destroy_state `. Please read the documentation for the :c:type:`drm_plane_funcs.atomic_destroy_state ` hook for more details.h](hOptional, called by }(hj,LhhhNhNubh)}(h@:c:type:`drm_plane_funcs.atomic_destroy_state `h]jz)}(hj6Lh]h$drm_plane_funcs.atomic_destroy_state}(hj8LhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4Lubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj,Lubh). Please read the documentation for the }(hj,LhhhNhNubh)}(h@:c:type:`drm_plane_funcs.atomic_destroy_state `h]jz)}(hjZLh]h$drm_plane_funcs.atomic_destroy_state}(hj\LhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXLubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_funcsuh1hhjSLhKhj,Lubh hook for more details.}(hj,LhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjSLhKhj)Lubah}(h]h ]h"]h$]h&]uh1jhj Lubeh}(h]h ]h"]h$]h&]uh1jmhj(LhKhjDubeh}(h]h ]h"]h$]h&]uh1jhhjCubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjBBhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_simple_display_pipe (C struct)c.drm_simple_display_pipehNtauh1jxhjBBhhhNhNubj)}(hhh](j)}(hdrm_simple_display_pipeh]j)}(hstruct drm_simple_display_pipeh](j)}(hjh]hstruct}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhjLhKubj)}(hdrm_simple_display_pipeh]j)}(hjLh]hdrm_simple_display_pipe}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ](jjeh"]h$]h&]jjuh1jhjLhhhjLhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjLhhhjLhKubah}(h]jLah ](jjeh"]h$]h&]jj)jhuh1jhjLhKhjLhhubj)}(hhh]h)}(hsimple display pipelineh]hsimple display pipeline}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjLhhubah}(h]h ]h"]h$]h&]uh1jhjLhhhjLhKubeh}(h]h ](jstructeh"]h$]h&]jjjj Mjj Mjjjuh1jhhhjBBhNhNubj)}(hX**Definition**:: struct drm_simple_display_pipe { struct drm_crtc crtc; struct drm_plane plane; struct drm_encoder encoder; struct drm_connector *connector; const struct drm_simple_display_pipe_funcs *funcs; }; **Members** ``crtc`` CRTC control structure ``plane`` Plane control structure ``encoder`` Encoder control structure ``connector`` Connector control structure ``funcs`` Pipeline control functions (optional)h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubh:}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjMubj@)}(hstruct drm_simple_display_pipe { struct drm_crtc crtc; struct drm_plane plane; struct drm_encoder encoder; struct drm_connector *connector; const struct drm_simple_display_pipe_funcs *funcs; };h]hstruct drm_simple_display_pipe { struct drm_crtc crtc; struct drm_plane plane; struct drm_encoder encoder; struct drm_connector *connector; const struct drm_simple_display_pipe_funcs *funcs; };}hj2Msbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjMubh)}(h **Members**h]j%)}(hjCMh]hMembers}(hjEMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAMubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjMubji)}(hhh](jn)}(h ``crtc`` CRTC control structure h](jt)}(h``crtc``h]jz)}(hjbMh]hcrtc}(hjdMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`Mubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj\Mubj)}(hhh]h)}(hCRTC control structureh]hCRTC control structure}(hj{MhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwMhKhjxMubah}(h]h ]h"]h$]h&]uh1jhj\Mubeh}(h]h ]h"]h$]h&]uh1jmhjwMhKhjYMubjn)}(h"``plane`` Plane control structure h](jt)}(h ``plane``h]jz)}(hjMh]hplane}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjMubj)}(hhh]h)}(hPlane control structureh]hPlane control structure}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKhjMubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjMhKhjYMubjn)}(h&``encoder`` Encoder control structure h](jt)}(h ``encoder``h]jz)}(hjMh]hencoder}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjMubj)}(hhh]h)}(hEncoder control structureh]hEncoder control structure}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKhjMubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjMhKhjYMubjn)}(h*``connector`` Connector control structure h](jt)}(h ``connector``h]jz)}(hj Nh]h connector}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj Nubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjNubj)}(hhh]h)}(hConnector control structureh]hConnector control structure}(hj&NhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"NhKhj#Nubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhj"NhKhjYMubjn)}(h/``funcs`` Pipeline control functions (optional)h](jt)}(h ``funcs``h]jz)}(hjFNh]hfuncs}(hjHNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjDNubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj@Nubj)}(hhh]h)}(h%Pipeline control functions (optional)h]h%Pipeline control functions (optional)}(hj_NhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhj\Nubah}(h]h ]h"]h$]h&]uh1jhj@Nubeh}(h]h ]h"]h$]h&]uh1jmhj[NhKhjYMubeh}(h]h ]h"]h$]h&]uh1jhhjMubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjBBhhhNhNubh)}(h**Description**h]j%)}(hjNh]h Description}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjBBhhubh)}(hSimple display pipeline with plane, crtc and encoder collapsed into one entity. It should be initialized by calling drm_simple_display_pipe_init().h]hSimple display pipeline with plane, crtc and encoder collapsed into one entity. It should be initialized by calling drm_simple_display_pipe_init().}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhKhjBBhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drmm_simple_encoder_alloc (C macro)c.drmm_simple_encoder_allochNtauh1jxhjBBhhhNhNubj)}(hhh](j)}(hdrmm_simple_encoder_alloch]j)}(hdrmm_simple_encoder_alloch]j)}(hdrmm_simple_encoder_alloch]j)}(hjNh]hdrmm_simple_encoder_alloc}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubah}(h]h ](jjeh"]h$]h&]jjuh1jhjNhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhM ubah}(h]h ]h"]h$]h&]jjjuh1jjjhjNhhhjNhM ubah}(h]jNah ](jjeh"]h$]h&]jj)jhuh1jhjNhM hjNhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjNhhhjNhM ubeh}(h]h ](jmacroeh"]h$]h&]jjjjNjjNjjjuh1jhhhjBBhNhNubh)}(h?``drmm_simple_encoder_alloc (dev, type, member, encoder_type)``h]jz)}(hjNh]h;drmm_simple_encoder_alloc (dev, type, member, encoder_type)}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:113: ./include/drm/drm_simple_kms_helper.hhMhjBBhhubjT=)}(h=Allocate and initialize an encoder with basic functionality. h]h)}(hUh]h Parameters}(hj@UhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj` member. After calling drm_kms_helper_poll_init() it is safe to enable interrupts and start processing hotplug events. At the same time, drivers should initialize all modeset objects such as CRTCs, encoders and connectors. To finish up the fbdev helper initialization, the drm_fb_helper_init() function is called. To probe for all attached displays and set up an initial configuration using the detected hardware, drivers should call drm_fb_helper_initial_config().h](hX#It is possible, though perhaps somewhat tricky, to implement race-free hotplug detection using the fbdev helpers. The drm_fb_helper_prepare() helper must be called first to initialize the minimum required to make hotplug detection work. Drivers also need to make sure to properly set up the }(hj?\hhhNhNubh)}(h1:c:type:`drm_mode_config.funcs `h]jz)}(hjI\h]hdrm_mode_config.funcs}(hjK\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjG\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_configuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:122: ./drivers/gpu/drm/drm_fb_helper.chK[hj?\ubhX member. After calling drm_kms_helper_poll_init() it is safe to enable interrupts and start processing hotplug events. At the same time, drivers should initialize all modeset objects such as CRTCs, encoders and connectors. To finish up the fbdev helper initialization, the drm_fb_helper_init() function is called. To probe for all attached displays and set up an initial configuration using the detected hardware, drivers should call drm_fb_helper_initial_config().}(hj?\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjf\hK[hj\hhubh)}(hX4If :c:type:`drm_framebuffer_funcs.dirty ` is set, the drm_fb_helper_{cfb,sys}_{write,fillrect,copyarea,imageblit} functions will accumulate changes and schedule :c:type:`drm_fb_helper.dirty_work ` to run right away. This worker then calls the dirty() function ensuring that it will always run in process context since the fb_*() function could be running in atomic context. If drm_fb_helper_deferred_io() is used as the deferred_io callback it will also schedule dirty_work with the damage collected from the mmap page writes.h](hIf }(hjq\hhhNhNubh)}(h=:c:type:`drm_framebuffer_funcs.dirty `h]jz)}(hj{\h]hdrm_framebuffer_funcs.dirty}(hj}\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjy\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebuffer_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:122: ./drivers/gpu/drm/drm_fb_helper.chKghjq\ubhx is set, the drm_fb_helper_{cfb,sys}_{write,fillrect,copyarea,imageblit} functions will accumulate changes and schedule }(hjq\hhhNhNubh)}(h2:c:type:`drm_fb_helper.dirty_work `h]jz)}(hj\h]hdrm_fb_helper.dirty_work}(hj\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_fb_helperuh1hhj\hKghjq\ubhXJ to run right away. This worker then calls the dirty() function ensuring that it will always run in process context since the fb_*() function could be running in atomic context. If drm_fb_helper_deferred_io() is used as the deferred_io callback it will also schedule dirty_work with the damage collected from the mmap page writes.}(hjq\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hKghj\hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_fb_helper_surface_size (C struct)c.drm_fb_helper_surface_sizehNtauh1jxhj\hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhNubj)}(hhh](j)}(hdrm_fb_helper_surface_sizeh]j)}(h!struct drm_fb_helper_surface_sizeh](j)}(hjh]hstruct}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhj\hKubj)}(hdrm_fb_helper_surface_sizeh]j)}(hj\h]hdrm_fb_helper_surface_size}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj\hhhj\hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj\hhhj\hKubah}(h]j\ah ](jjeh"]h$]h&]jj)jhuh1jhj\hKhj\hhubj)}(hhh]h)}(h-describes fbdev size and scanout surface sizeh]h-describes fbdev size and scanout surface size}(hj"]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK)hj]hhubah}(h]h ]h"]h$]h&]uh1jhj\hhhj\hKubeh}(h]h ](jstructeh"]h$]h&]jjjj:]jj:]jjjuh1jhhhj\hj\hNubj)}(hX**Definition**:: struct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; }; **Members** ``fb_width`` fbdev width ``fb_height`` fbdev height ``surface_width`` scanout buffer width ``surface_height`` scanout buffer height ``surface_bpp`` scanout buffer bpp ``surface_depth`` scanout buffer depthh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjF]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjB]ubh:}(hjB]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK-hj>]ubj@)}(hstruct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; };h]hstruct drm_fb_helper_surface_size { u32 fb_width; u32 fb_height; u32 surface_width; u32 surface_height; u32 surface_bpp; u32 surface_depth; };}hj_]sbah}(h]h ]h"]h$]h&]jjuh1j?h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK/hj>]ubh)}(h **Members**h]j%)}(hjp]h]hMembers}(hjr]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjn]ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK8hj>]ubji)}(hhh](jn)}(h``fb_width`` fbdev width h](jt)}(h ``fb_width``h]jz)}(hj]h]hfb_width}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK+hj]ubj)}(hhh]h)}(h fbdev widthh]h fbdev width}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hK+hj]ubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj]hK+hj]ubjn)}(h``fb_height`` fbdev height h](jt)}(h ``fb_height``h]jz)}(hj]h]h fb_height}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK,hj]ubj)}(hhh]h)}(h fbdev heighth]h fbdev height}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hK,hj]ubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj]hK,hj]ubjn)}(h'``surface_width`` scanout buffer width h](jt)}(h``surface_width``h]jz)}(hj^h]h surface_width}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK-hj]ubj)}(hhh]h)}(hscanout buffer widthh]hscanout buffer width}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hK-hj^ubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj^hK-hj]ubjn)}(h)``surface_height`` scanout buffer height h](jt)}(h``surface_height``h]jz)}(hj:^h]hsurface_height}(hj<^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8^ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK.hj4^ubj)}(hhh]h)}(hscanout buffer heighth]hscanout buffer height}(hjS^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjO^hK.hjP^ubah}(h]h ]h"]h$]h&]uh1jhj4^ubeh}(h]h ]h"]h$]h&]uh1jmhjO^hK.hj]ubjn)}(h#``surface_bpp`` scanout buffer bpp h](jt)}(h``surface_bpp``h]jz)}(hjs^h]h surface_bpp}(hju^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjq^ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK/hjm^ubj)}(hhh]h)}(hscanout buffer bpph]hscanout buffer bpp}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hK/hj^ubah}(h]h ]h"]h$]h&]uh1jhjm^ubeh}(h]h ]h"]h$]h&]uh1jmhj^hK/hj]ubjn)}(h&``surface_depth`` scanout buffer depthh](jt)}(h``surface_depth``h]jz)}(hj^h]h surface_depth}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK/hj^ubj)}(hhh]h)}(hscanout buffer depthh]hscanout buffer depth}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK0hj^ubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jmhj^hK/hj]ubeh}(h]h ]h"]h$]h&]uh1jhhj>]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhj\hNubh)}(h**Description**h]j%)}(hj^h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK3hj\hhubh)}(hXNote that the scanout surface width/height may be larger than the fbdev width/height. In case of multiple displays, the scanout surface is sized according to the largest width/height (so it is large enough for all CRTCs to scanout). But the fbdev width/height is sized to the minimum width/ height of all the displays. This ensures that fbcon fits on the smallest of the attached displays. fb_width/fb_height is used by drm_fb_helper_fill_info() to fill out the :c:type:`fb_info.var ` structure.h](hXNote that the scanout surface width/height may be larger than the fbdev width/height. In case of multiple displays, the scanout surface is sized according to the largest width/height (so it is large enough for all CRTCs to scanout). But the fbdev width/height is sized to the minimum width/ height of all the displays. This ensures that fbcon fits on the smallest of the attached displays. fb_width/fb_height is used by drm_fb_helper_fill_info() to fill out the }(hj_hhhNhNubh)}(h:c:type:`fb_info.var `h]jz)}(hj_h]h fb_info.var}(hj_hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj _ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjfb_infouh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK0hj_ubh structure.}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,_hK0hj\hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_fb_helper_funcs (C struct)c.drm_fb_helper_funcshNtauh1jxhj\hhhj\hNubj)}(hhh](j)}(hdrm_fb_helper_funcsh]j)}(hstruct drm_fb_helper_funcsh](j)}(hjh]hstruct}(hjP_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL_hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK;ubj)}(h h]h }(hj^_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL_hhhj]_hK;ubj)}(hdrm_fb_helper_funcsh]j)}(hjJ_h]hdrm_fb_helper_funcs}(hjp_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl_ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjL_hhhj]_hK;ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjH_hhhj]_hK;ubah}(h]jC_ah ](jjeh"]h$]h&]jj)jhuh1jhj]_hK;hjE_hhubj)}(hhh]h)}(h0driver callbacks for the fbdev emulation libraryh]h0driver callbacks for the fbdev emulation library}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKChj_hhubah}(h]h ]h"]h$]h&]uh1jhjE_hhhj]_hK;ubeh}(h]h ](jstructeh"]h$]h&]jjjj_jj_jjjuh1jhhhj\hj\hNubj)}(hX**Definition**:: struct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); }; **Members** ``fb_dirty`` Driver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written. This callback is optional. Returns: 0 on success, or an error code otherwise. ``fb_restore`` Driver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback. ``fb_set_suspend`` Driver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubh:}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKGhj_ubj@)}(hstruct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); };h]hstruct drm_fb_helper_funcs { int (*fb_dirty)(struct drm_fb_helper *helper, struct drm_clip_rect *clip); void (*fb_restore)(struct drm_fb_helper *helper); void (*fb_set_suspend)(struct drm_fb_helper *helper, bool suspend); };}hj_sbah}(h]h ]h"]h$]h&]jjuh1j?h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKIhj_ubh)}(h **Members**h]j%)}(hj_h]hMembers}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKOhj_ubji)}(hhh](jn)}(h``fb_dirty`` Driver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written. This callback is optional. Returns: 0 on success, or an error code otherwise. h](jt)}(h ``fb_dirty``h]jz)}(hj_h]hfb_dirty}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKQhj_ubj)}(hhh](h)}(hDriver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written.h]hDriver callback to update the framebuffer memory. If set, fbdev emulation will invoke this callback in regular intervals after the framebuffer has been written.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKJhj`ubh)}(hThis callback is optional.h]hThis callback is optional.}(hj'`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKNhj`ubh)}(h2Returns: 0 on success, or an error code otherwise.h]h2Returns: 0 on success, or an error code otherwise.}(hj6`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKPhj`ubeh}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj`hKQhj_ubjn)}(h``fb_restore`` Driver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback. h](jt)}(h``fb_restore``h]jz)}(hjW`h]h fb_restore}(hjY`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjU`ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK^hjQ`ubj)}(hhh](h)}(hDriver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode.h]hDriver callback to restore internal fbdev state. If set, fbdev emulation will invoke this callback after restoring the display mode.}(hjp`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKXhjm`ubh)}(h&Only for i915. Do not use in new code.h]h&Only for i915. Do not use in new code.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK\hjm`ubh)}(h,TODO: Fix i915 to not require this callback.h]h,TODO: Fix i915 to not require this callback.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjl`hK^hjm`ubeh}(h]h ]h"]h$]h&]uh1jhjQ`ubeh}(h]h ]h"]h$]h&]uh1jmhjl`hK^hj_ubjn)}(hX]``fb_set_suspend`` Driver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly. Only for i915. Do not use in new code. TODO: Fix i915 to not require this callback.h](jt)}(h``fb_set_suspend``h]jz)}(hj`h]hfb_set_suspend}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKkhj`ubj)}(hhh](h)}(hDriver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly.h]hDriver callback to suspend or resume, if set, fbdev emulation will invoke this callback during suspend and resume. Driver should call fb_set_suspend() from their implementation. If not set, fbdev emulation will invoke fb_set_suspend() directly.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKehj`ubh)}(h&Only for i915. Do not use in new code.h]h&Only for i915. Do not use in new code.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKjhj`ubh)}(h,TODO: Fix i915 to not require this callback.h]h,TODO: Fix i915 to not require this callback.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKlhj`ubeh}(h]h ]h"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]uh1jmhj`hKkhj_ubeh}(h]h ]h"]h$]h&]uh1jhhj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhj\hNubh)}(h**Description**h]j%)}(hjah]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj aubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKohj\hhubh)}(hworker used during resume if the console lock is already takenh]h>worker used during resume if the console lock is already taken}(hj^dhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZdhK~hj[dubah}(h]h ]h"]h$]h&]uh1jhj?dubeh}(h]h ]h"]h$]h&]uh1jmhjZdhK~hjaubjn)}(hX6``lock`` Top-level FBDEV helper lock. This protects all internal data structures and lists, such as **connector_info** and **crtc_info**. FIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible. h](jt)}(h``lock``h]jz)}(hj~dh]hlock}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|dubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjxdubj)}(hhh](h)}(hTop-level FBDEV helper lock. This protects all internal data structures and lists, such as **connector_info** and **crtc_info**.h](h[Top-level FBDEV helper lock. This protects all internal data structures and lists, such as }(hjdhhhNhNubj%)}(h**connector_info**h]hconnector_info}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubh and }(hjdhhhNhNubj%)}(h **crtc_info**h]h crtc_info}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubh.}(hjdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjdubh)}(hFIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible.h]hFIXME: fbdev emulation locking is a mess and long term we want to protect all helper internal state with this lock as well as reduce core KMS locking as much as possible.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjdubeh}(h]h ]h"]h$]h&]uh1jhjxdubeh}(h]h ]h"]h$]h&]uh1jmhjdhKhjaubjn)}(h``delayed_hotplug`` A hotplug was received while fbdev wasn't in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again. h](jt)}(h``delayed_hotplug``h]jz)}(hjdh]hdelayed_hotplug}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjdubj)}(hhh]h)}(hA hotplug was received while fbdev wasn't in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again.h]hA hotplug was received while fbdev wasn’t in control of the DRM device, i.e. another KMS master was active. The output configuration needs to be reprobe when fbdev is in control again.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjeubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjehKhjaubjn)}(hX(``deferred_setup`` If no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually. Protected by **lock**. h](jt)}(h``deferred_setup``h]jz)}(hj%eh]hdeferred_setup}(hj'ehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#eubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjeubj)}(hhh](h)}(hIf no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually.h]hIf no outputs are connected (disconnected or unknown) the FB helper code will defer setup until at least one of the outputs shows up. This field keeps track of the status so that setup can be retried at every hotplug event until it succeeds eventually.}(hj>ehhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhj;eubh)}(hProtected by **lock**.h](h Protected by }(hjMehhhNhNubj%)}(h**lock**h]hlock}(hjUehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMeubh.}(hjMehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:ehKhj;eubeh}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhj:ehKhjaubjn)}(h``preferred_bpp`` Temporary storage for the driver's preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on. See also: **deferred_setup** h](jt)}(h``preferred_bpp``h]jz)}(hjeh]h preferred_bpp}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}eubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjyeubj)}(hhh](h)}(hTemporary storage for the driver's preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on.h]hTemporary storage for the driver’s preferred BPP setting passed to FB helper initialization. This needs to be tracked so that deferred FB helper setup can pass this on.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjeubh)}(hSee also: **deferred_setup**h](h See also: }(hjehhhNhNubj%)}(h**deferred_setup**h]hdeferred_setup}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubeh}(h]h ]h"]h$]h&]uh1hhjehKhjeubeh}(h]h ]h"]h$]h&]uh1jhjyeubeh}(h]h ]h"]h$]h&]uh1jmhjehKhjaubjn)}(h``fbdefio`` Temporary storage for the driver's FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.h](jt)}(h ``fbdefio``h]jz)}(hjeh]hfbdefio}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjeubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjeubj)}(hhh]h)}(hTemporary storage for the driver's FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.h]hTemporary storage for the driver’s FB deferred I/O handler. If the driver uses the DRM fbdev emulation layer, this is set by the core to a generic deferred I/O handler if a driver is preferring to use a shadow buffer.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjeubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjehKhjaubeh}(h]h ]h"]h$]h&]uh1jhhjaubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhj\hNubh)}(h**Description**h]j%)}(hjfh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhj\hhubh)}(hXThis is the main structure used by the fbdev helpers. Drivers supporting fbdev emulation should embedded this into their overall driver structure. Drivers must also fill out a :c:type:`struct drm_fb_helper_funcs ` with a few operations.h](hThis is the main structure used by the fbdev helpers. Drivers supporting fbdev emulation should embedded this into their overall driver structure. Drivers must also fill out a }(hj.fhhhNhNubh)}(h::c:type:`struct drm_fb_helper_funcs `h]jz)}(hj8fh]hstruct drm_fb_helper_funcs}(hj:fhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj6fubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_fb_helper_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhK~hj.fubh with a few operations.}(hj.fhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUfhK~hj\hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#DRM_FB_HELPER_DEFAULT_OPS (C macro)c.DRM_FB_HELPER_DEFAULT_OPShNtauh1jxhj\hhhj\hNubj)}(hhh](j)}(hDRM_FB_HELPER_DEFAULT_OPSh]j)}(hDRM_FB_HELPER_DEFAULT_OPSh]j)}(hDRM_FB_HELPER_DEFAULT_OPSh]j)}(hjsfh]hDRM_FB_HELPER_DEFAULT_OPS}(hj}fhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyfubah}(h]h ](jjeh"]h$]h&]jjuh1jhjufhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhjqfhhhjfhKubah}(h]jlfah ](jjeh"]h$]h&]jj)jhuh1jhjfhKhjnfhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjnfhhhjfhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjfjjfjjjuh1jhhhj\hj\hNubh)}(h``DRM_FB_HELPER_DEFAULT_OPS``h]jz)}(hjfh]hDRM_FB_HELPER_DEFAULT_OPS}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhj\hhubjT=)}(h helper define for drm drivers **Description** Helper define to register default implementations of drm_fb_helper functions. To be used in struct fb_ops of drm drivers. h](jT=)}(hhelper define for drm drivers h]h)}(hhelper define for drm driversh]hhelper define for drm drivers}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjfubah}(h]h ]h"]h$]h&]uh1jS=hjfhKhjfubh)}(h**Description**h]j%)}(hjfh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjfubh)}(hyHelper define to register default implementations of drm_fb_helper functions. To be used in struct fb_ops of drm drivers.h]hyHelper define to register default implementations of drm_fb_helper functions. To be used in struct fb_ops of drm drivers.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:125: ./include/drm/drm_fb_helper.hhKhjfubeh}(h]h ]h"]h$]h&]uh1jS=hjfhKhj\hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6drm_fb_helper_restore_fbdev_mode_unlocked (C function)+c.drm_fb_helper_restore_fbdev_mode_unlockedhNtauh1jxhj\hhhNhNubj)}(hhh](j)}(h[int drm_fb_helper_restore_fbdev_mode_unlocked (struct drm_fb_helper *fb_helper, bool force)h]j)}(hZint drm_fb_helper_restore_fbdev_mode_unlocked(struct drm_fb_helper *fb_helper, bool force)h](j)}(hinth]hint}(hj(ghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ghhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKubj)}(h h]h }(hj7ghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ghhhj6ghKubj)}(h)drm_fb_helper_restore_fbdev_mode_unlockedh]j)}(h)drm_fb_helper_restore_fbdev_mode_unlockedh]h)drm_fb_helper_restore_fbdev_mode_unlocked}(hjIghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEgubah}(h]h ](jjeh"]h$]h&]jjuh1jhj$ghhhj6ghKubj)}(h-(struct drm_fb_helper *fb_helper, bool force)h](j)}(hstruct drm_fb_helper *fb_helperh](j)}(hjh]hstruct}(hjeghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjagubj)}(h h]h }(hjrghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjagubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjgmodnameN classnameNjj)}j]j)}jjKgsb+c.drm_fb_helper_restore_fbdev_mode_unlockedasbuh1hhjagubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjagubj+)}(hj9h]h*}(hjghhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjagubj)}(h fb_helperh]h fb_helper}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjagubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj]gubj)}(h bool forceh](j)}(hjAh]hbool}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(hforceh]hforce}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj]gubeh}(h]h ]h"]h$]h&]jjuh1jhj$ghhhj6ghKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj ghhhj6ghKubah}(h]jgah ](jjeh"]h$]h&]jj)jhuh1jhj6ghKhjghhubj)}(hhh]h)}(hrestore fbdev configurationh]hrestore fbdev configuration}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhjhhhubah}(h]h ]h"]h$]h&]uh1jhjghhhj6ghKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj4hjj4hjjjuh1jhhhj\hNhNubj)}(hX**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL ``bool force`` ignore present DRM master **Description** This helper should be called from fbdev emulation's :c:type:`drm_client_funcs.restore ` callback. It ensures that the user isn't greeted with a black screen when the userspace compositor releases the display device. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j%)}(hj>hh]h Parameters}(hj@hhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj` callback. It ensures that the user isn't greeted with a black screen when the userspace compositor releases the display device.h](h6This helper should be called from fbdev emulation’s }(hjhhhhNhNubh)}(h5:c:type:`drm_client_funcs.restore `h]jz)}(hjhh]hdrm_client_funcs.restore}(hjhhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_client_funcsuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhjhubh callback. It ensures that the user isn’t greeted with a black screen when the userspace compositor releases the display device.}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjihKhj8hubh)}(h **Return**h]j%)}(hjih]hReturn}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhj8hubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj1ihhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhj8hubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_fb_helper_blank (C function)c.drm_fb_helper_blankhNtauh1jxhj\hhhNhNubj)}(hhh](j)}(h9int drm_fb_helper_blank (int blank, struct fb_info *info)h]j)}(h8int drm_fb_helper_blank(int blank, struct fb_info *info)h](j)}(hinth]hint}(hj`ihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ihhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKubj)}(h h]h }(hjoihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ihhhjnihKubj)}(hdrm_fb_helper_blankh]j)}(hdrm_fb_helper_blankh]hdrm_fb_helper_blank}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}iubah}(h]h ](jjeh"]h$]h&]jjuh1jhj\ihhhjnihKubj)}(h!(int blank, struct fb_info *info)h](j)}(h int blankh](j)}(hinth]hint}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(hblankh]hblank}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjiubj)}(hstruct fb_info *infoh](j)}(hjh]hstruct}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubh)}(hhh]j)}(hfb_infoh]hfb_info}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjimodnameN classnameNjj)}j]j)}jjisbc.drm_fb_helper_blankasbuh1hhjiubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj+)}(hj9h]h*}(hjjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjiubj)}(hinfoh]hinfo}(hj+jhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjiubeh}(h]h ]h"]h$]h&]jjuh1jhj\ihhhjnihKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjXihhhjnihKubah}(h]jSiah ](jjeh"]h$]h&]jj)jhuh1jhjnihKhjUihhubj)}(hhh]h)}(h5implementation for :c:type:`fb_ops.fb_blank `h](himplementation for }(hjUjhhhNhNubh)}(h":c:type:`fb_ops.fb_blank `h]jz)}(hj_jh]hfb_ops.fb_blank}(hjajhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj]jubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j jc.drm_fb_helper_blankasbjfb_opsuh1hhj6ghKhjUjubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhjRjhhubah}(h]h ]h"]h$]h&]uh1jhjUihhhjnihKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjjjuh1jhhhj\hNhNubj)}(hq**Parameters** ``int blank`` desired blanking state ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j%)}(hjjh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhjjubji)}(hhh](jn)}(h%``int blank`` desired blanking state h](jt)}(h ``int blank``h]jz)}(hjjh]h int blank}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhjjubj)}(hhh]h)}(hdesired blanking stateh]hdesired blanking state}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhKhjjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjjhKhjjubjn)}(h7``struct fb_info *info`` fbdev registered by the helperh](jt)}(h``struct fb_info *info``h]jz)}(hjjh]hstruct fb_info *info}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhjjubj)}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hj khhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chKhj kubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjkhKhjjubeh}(h]h ]h"]h$]h&]uh1jhhjjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_fb_helper_prepare (C function)c.drm_fb_helper_preparehNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hvoid drm_fb_helper_prepare (struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h]j)}(hvoid drm_fb_helper_prepare(struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h](j)}(hvoidh]hvoid}(hjMkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIkhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMubj)}(h h]h }(hj\khhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIkhhhj[khMubj)}(hdrm_fb_helper_prepareh]j)}(hdrm_fb_helper_prepareh]hdrm_fb_helper_prepare}(hjnkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjkubah}(h]h ](jjeh"]h$]h&]jjuh1jhjIkhhhj[khMubj)}(h{(struct drm_device *dev, struct drm_fb_helper *helper, unsigned int preferred_bpp, const struct drm_fb_helper_funcs *funcs)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjkmodnameN classnameNjj)}j]j)}jjpksbc.drm_fb_helper_prepareasbuh1hhjkubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj+)}(hj9h]h*}(hjkhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjkubj)}(hdevh]hdev}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubj)}(hstruct drm_fb_helper *helperh](j)}(hjh]hstruct}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hj lhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjlmodnameN classnameNjj)}j]jkc.drm_fb_helper_prepareasbuh1hhjkubj)}(h h]h }(hj8lhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj+)}(hj9h]h*}(hjFlhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjkubj)}(hhelperh]hhelper}(hjSlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubj)}(hunsigned int preferred_bpph](j)}(hunsignedh]hunsigned}(hjllhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhlubj)}(h h]h }(hjzlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhlubj)}(hinth]hint}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhlubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhlubj)}(h preferred_bpph]h preferred_bpp}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubj)}(h'const struct drm_fb_helper_funcs *funcsh](j)}(hjUh]hconst}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(hjh]hstruct}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubh)}(hhh]j)}(hdrm_fb_helper_funcsh]hdrm_fb_helper_funcs}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjlmodnameN classnameNjj)}j]jkc.drm_fb_helper_prepareasbuh1hhjlubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj+)}(hj9h]h*}(hj"mhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjlubj)}(hfuncsh]hfuncs}(hj/mhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubeh}(h]h ]h"]h$]h&]jjuh1jhjIkhhhj[khMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjEkhhhj[khMubah}(h]j@kah ](jjeh"]h$]h&]jj)jhuh1jhj[khMhjBkhhubj)}(hhh]h)}(hsetup a drm_fb_helper structureh]hsetup a drm_fb_helper structure}(hjYmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjVmhhubah}(h]h ]h"]h$]h&]uh1jhjBkhhhj[khMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjqmjjqmjjjuh1jhhhj\hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_fb_helper *helper`` driver-allocated fbdev helper structure to set up ``unsigned int preferred_bpp`` Preferred bits per pixel for the device. ``const struct drm_fb_helper_funcs *funcs`` pointer to structure of functions associate with this helper **Description** Sets up the bare minimum to make the framebuffer helper usable. This is useful to implement race-free initialization of the polling helpers.h](h)}(h**Parameters**h]j%)}(hj{mh]h Parameters}(hj}mhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjymubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjumubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjmh]hstruct drm_device *dev}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjmubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjmubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjmhMhjmubjn)}(hS``struct drm_fb_helper *helper`` driver-allocated fbdev helper structure to set up h](jt)}(h ``struct drm_fb_helper *helper``h]jz)}(hjmh]hstruct drm_fb_helper *helper}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjmubj)}(hhh]h)}(h1driver-allocated fbdev helper structure to set uph]h1driver-allocated fbdev helper structure to set up}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjmubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjmhMhjmubjn)}(hH``unsigned int preferred_bpp`` Preferred bits per pixel for the device. h](jt)}(h``unsigned int preferred_bpp``h]jz)}(hj nh]hunsigned int preferred_bpp}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj nubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjnubj)}(hhh]h)}(h(Preferred bits per pixel for the device.h]h(Preferred bits per pixel for the device.}(hj%nhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!nhMhj"nubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhj!nhMhjmubjn)}(hi``const struct drm_fb_helper_funcs *funcs`` pointer to structure of functions associate with this helper h](jt)}(h+``const struct drm_fb_helper_funcs *funcs``h]jz)}(hjEnh]h'const struct drm_fb_helper_funcs *funcs}(hjGnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCnubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj?nubj)}(hhh]h)}(hvoid drm_fb_helper_unprepare (struct drm_fb_helper *fb_helper)h]j)}(h=void drm_fb_helper_unprepare(struct drm_fb_helper *fb_helper)h](j)}(hvoidh]hvoid}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM=ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhjnhM=ubj)}(hdrm_fb_helper_unprepareh]j)}(hdrm_fb_helper_unprepareh]hdrm_fb_helper_unprepare}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ](jjeh"]h$]h&]jjuh1jhjnhhhjnhM=ubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j)}(hjh]hstruct}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hj ohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"omodnameN classnameNjj)}j]j)}jjnsbc.drm_fb_helper_unprepareasbuh1hhjnubj)}(h h]h }(hj@ohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj+)}(hj9h]h*}(hjNohhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjnubj)}(h fb_helperh]h fb_helper}(hj[ohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjnubah}(h]h ]h"]h$]h&]jjuh1jhjnhhhjnhM=ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjnhhhjnhM=ubah}(h]jnah ](jjeh"]h$]h&]jj)jhuh1jhjnhM=hjnhhubj)}(hhh]h)}(h"clean up a drm_fb_helper structureh]h"clean up a drm_fb_helper structure}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM=hjohhubah}(h]h ]h"]h$]h&]uh1jhjnhhhjnhM=ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjojjojjjuh1jhhhj\hNhNubj)}(h**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to set up **Description** Cleans up the framebuffer helper. Inverse of drm_fb_helper_prepare().h](h)}(h**Parameters**h]j%)}(hjoh]h Parameters}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMAhjoubji)}(hhh]jn)}(hV``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to set up h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hjoh]hstruct drm_fb_helper *fb_helper}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjoubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM>hjoubj)}(hhh]h)}(h1driver-allocated fbdev helper structure to set uph]h1driver-allocated fbdev helper structure to set up}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohM>hjoubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jmhjohM>hjoubah}(h]h ]h"]h$]h&]uh1jhhjoubh)}(h**Description**h]j%)}(hjph]h Description}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM@hjoubh)}(hECleans up the framebuffer helper. Inverse of drm_fb_helper_prepare().h]hECleans up the framebuffer helper. Inverse of drm_fb_helper_prepare().}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM?hjoubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_fb_helper_init (C function)c.drm_fb_helper_inithNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hPint drm_fb_helper_init (struct drm_device *dev, struct drm_fb_helper *fb_helper)h]j)}(hOint drm_fb_helper_init(struct drm_device *dev, struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hjFphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBphhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMIubj)}(h h]h }(hjUphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBphhhjTphMIubj)}(hdrm_fb_helper_inith]j)}(hdrm_fb_helper_inith]hdrm_fb_helper_init}(hjgphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcpubah}(h]h ](jjeh"]h$]h&]jjuh1jhjBphhhjTphMIubj)}(h9(struct drm_device *dev, struct drm_fb_helper *fb_helper)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjpmodnameN classnameNjj)}j]j)}jjipsbc.drm_fb_helper_initasbuh1hhjpubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj+)}(hj9h]h*}(hjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjpubj)}(hdevh]hdev}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj{pubj)}(hstruct drm_fb_helper *fb_helperh](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjqmodnameN classnameNjj)}j]jpc.drm_fb_helper_initasbuh1hhjpubj)}(h h]h }(hj1qhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj+)}(hj9h]h*}(hj?qhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjpubj)}(h fb_helperh]h fb_helper}(hjLqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj{pubeh}(h]h ]h"]h$]h&]jjuh1jhjBphhhjTphMIubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>phhhjTphMIubah}(h]j9pah ](jjeh"]h$]h&]jj)jhuh1jhjTphMIhj;phhubj)}(hhh]h)}(h;initialize a :c:type:`struct drm_fb_helper `h](h initialize a }(hjvqhhhNhNubh)}(h.:c:type:`struct drm_fb_helper `h]jz)}(hjqh]hstruct drm_fb_helper}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj~qubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jpc.drm_fb_helper_initasbj drm_fb_helperuh1hhj6ghKhjvqubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMIhjsqhhubah}(h]h ]h"]h$]h&]uh1jhj;phhhjTphMIubeh}(h]h ](jfunctioneh"]h$]h&]jjjjqjjqjjjuh1jhhhj\hNhNubj)}(hXO**Parameters** ``struct drm_device *dev`` drm device ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to initialize **Description** This allocates the structures for the fbdev helper with the given limits. Note that this won't yet touch the hardware (through the driver interfaces) nor register the fbdev. This is only done in drm_fb_helper_initial_config() to allow driver writes more control over the exact init sequence. Drivers must call drm_fb_helper_prepare() before calling this function. **Return** Zero if everything went ok, nonzero otherwise.h](h)}(h**Parameters**h]j%)}(hjqh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMMhjqubji)}(hhh](jn)}(h&``struct drm_device *dev`` drm device h](jt)}(h``struct drm_device *dev``h]jz)}(hjqh]hstruct drm_device *dev}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMJhjqubj)}(hhh]h)}(h drm deviceh]h drm device}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMJhjqubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjqhMJhjqubjn)}(hZ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper structure to initialize h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hjrh]hstruct drm_fb_helper *fb_helper}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMKhjrubj)}(hhh]h)}(h5driver-allocated fbdev helper structure to initializeh]h5driver-allocated fbdev helper structure to initialize}(hj-rhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)rhMKhj*rubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jmhj)rhMKhjqubeh}(h]h ]h"]h$]h&]uh1jhhjqubh)}(h**Description**h]j%)}(hjOrh]h Description}(hjQrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMrubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMMhjqubh)}(hX#This allocates the structures for the fbdev helper with the given limits. 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This must be called before releasing all resources for **fb_helper** by calling drm_fb_helper_fini().h](h)}(h**Parameters**h]j%)}(hjsh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjsubji)}(hhh]jn)}(hT``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, must not be NULL h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hjsh]hstruct drm_fb_helper *fb_helper}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjsubj)}(hhh]h)}(h/driver-allocated fbdev helper, must not be NULLh]h/driver-allocated fbdev helper, must not be NULL}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjsubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhjshMhjsubah}(h]h ]h"]h$]h&]uh1jhhjsubh)}(h**Description**h]j%)}(hjth]h Description}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjtubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjsubh)}(hA wrapper around unregister_framebuffer, to release the fb_info framebuffer device. This must be called before releasing all resources for **fb_helper** by calling drm_fb_helper_fini().h](hA wrapper around unregister_framebuffer, to release the fb_info framebuffer device. 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refdomainjreftypetype refexplicitrefwarnjj)}j]jtc.drm_fb_helper_finiasbj drm_fb_helperuh1hhj6ghKhjuubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjuhhubah}(h]h ]h"]h$]h&]uh1jhjRthhhjkthMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjYujjYujjjuh1jhhhj\hNhNubj)}(h**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL **Description** This cleans up all remaining resources associated with **fb_helper**.h](h)}(h**Parameters**h]j%)}(hjcuh]h Parameters}(hjeuhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjauubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj]uubji)}(hhh]jn)}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hjuh]hstruct drm_fb_helper *fb_helper}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h 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]h"]h$]h&]uh1jmhjwhMhj|wubeh}(h]h ]h"]h$]h&]uh1jhhj`wubh)}(h**Description**h]j%)}(hjwh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM hj`wubh)}(hThis function is used as the :c:type:`fb_deferred_io.deferred_io ` callback function for flushing the fbdev mmap writes.h](hThis function is used as the }(hjxhhhNhNubh)}(h5:c:type:`fb_deferred_io.deferred_io `h]jz)}(hjxh]hfb_deferred_io.deferred_io}(hjxhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjfb_deferred_iouh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjxubh6 callback function for flushing the fbdev mmap writes.}(hjxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj6xhMhj`wubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_fb_helper_set_suspend (C function)c.drm_fb_helper_set_suspendhNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hNvoid drm_fb_helper_set_suspend (struct drm_fb_helper *fb_helper, bool suspend)h]j)}(hMvoid drm_fb_helper_set_suspend(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hvoidh]hvoid}(hjaxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]xhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMIubj)}(h h]h }(hjpxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]xhhhjoxhMIubj)}(hdrm_fb_helper_set_suspendh]j)}(hdrm_fb_helper_set_suspendh]hdrm_fb_helper_set_suspend}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~xubah}(h]h ](jjeh"]h$]h&]jjuh1jhj]xhhhjoxhMIubj)}(h/(struct drm_fb_helper *fb_helper, bool suspend)h](j)}(hstruct drm_fb_helper *fb_helperh](j)}(hjh]hstruct}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjxmodnameN classnameNjj)}j]j)}jjxsbc.drm_fb_helper_set_suspendasbuh1hhjxubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj+)}(hj9h]h*}(hjxhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjxubj)}(h fb_helperh]h fb_helper}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubj)}(h bool suspendh](j)}(hjAh]hbool}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj yubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj yubj)}(hsuspendh]hsuspend}(hj+yhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj yubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubeh}(h]h ]h"]h$]h&]jjuh1jhj]xhhhjoxhMIubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjYxhhhjoxhMIubah}(h]jTxah ](jjeh"]h$]h&]jj)jhuh1jhjoxhMIhjVxhhubj)}(hhh]h)}(hwrapper around fb_set_suspendh]hwrapper around fb_set_suspend}(hjUyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMIhjRyhhubah}(h]h ]h"]h$]h&]uh1jhjVxhhhjoxhMIubeh}(h]h ](jfunctioneh"]h$]h&]jjjjmyjjmyjjjuh1jhhhj\hNhNubj)}(hX3**Parameters** ``struct drm_fb_helper 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If the lock isn't available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity. This function can be called multiple times with the same state since :c:type:`fb_info.state ` is checked to see if fbdev is running or not before locking. Use drm_fb_helper_set_suspend() if you need to take the lock yourself.h](h)}(h**Parameters**h]j%)}(hje{h]h Parameters}(hjg{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjc{ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMbhj_{ubji)}(hhh](jn)}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hj{h]hstruct drm_fb_helper *fb_helper}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM`hj~{ubj)}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hM`hj{ubah}(h]h ]h"]h$]h&]uh1jhj~{ubeh}(h]h ]h"]h$]h&]uh1jmhj{hM`hj{{ubjn)}(h.``bool suspend`` whether to suspend or resume h](jt)}(h``bool suspend``h]jz)}(hj{h]h bool suspend}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMahj{ubj)}(hhh]h)}(hwhether to suspend or resumeh]hwhether to suspend or resume}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMahj{ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj{hMahj{{ubeh}(h]h ]h"]h$]h&]uh1jhhj_{ubh)}(h**Description**h]j%)}(hj{h]h Description}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMchj_{ubh)}(hA wrapper around fb_set_suspend() that takes the console lock. If the lock isn't available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity.h]hA wrapper around fb_set_suspend() that takes the console lock. If the lock isn’t available on resume, a worker is tasked with waiting for the lock to become available. The console lock can be pretty contented on resume due to all the printk activity.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMbhj_{ubh)}(hThis function can be called multiple times with the same state since :c:type:`fb_info.state ` is checked to see if fbdev is running or not before locking.h](hEThis function can be called multiple times with the same state since }(hj|hhhNhNubh)}(h!:c:type:`fb_info.state `h]jz)}(hj'|h]h fb_info.state}(hj)|hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj%|ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjfb_infouh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMghj|ubh= is checked to see if fbdev is running or not before locking.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjD|hMghj_{ubh)}(hFUse drm_fb_helper_set_suspend() if you need to take the lock yourself.h]hFUse drm_fb_helper_set_suspend() if you need to take the lock yourself.}(hjO|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMjhj_{ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_fb_helper_setcmap (C function)c.drm_fb_helper_setcmaphNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hFint drm_fb_helper_setcmap (struct fb_cmap *cmap, struct fb_info *info)h]j)}(hEint drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info)h](j)}(hinth]hint}(hj~|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz|hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM^ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz|hhhj|hM^ubj)}(hdrm_fb_helper_setcmaph]j)}(hdrm_fb_helper_setcmaph]hdrm_fb_helper_setcmap}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjz|hhhj|hM^ubj)}(h,(struct fb_cmap *cmap, struct fb_info *info)h](j)}(hstruct fb_cmap *cmaph](j)}(hjh]hstruct}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubh)}(hhh]j)}(hfb_cmaph]hfb_cmap}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj|modnameN classnameNjj)}j]j)}jj|sbc.drm_fb_helper_setcmapasbuh1hhj|ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj+)}(hj9h]h*}(hj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj)}(hcmaph]hcmap}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubj)}(hstruct fb_info *infoh](j)}(hjh]hstruct}(hj-}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)}ubj)}(h h]h }(hj:}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)}ubh)}(hhh]j)}(hfb_infoh]hfb_info}(hjK}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjH}ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjM}modnameN classnameNjj)}j]j|c.drm_fb_helper_setcmapasbuh1hhj)}ubj)}(h h]h }(hji}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)}ubj+)}(hj9h]h*}(hjw}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)}ubj)}(hinfoh]hinfo}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)}ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubeh}(h]h ]h"]h$]h&]jjuh1jhjz|hhhj|hM^ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjv|hhhj|hM^ubah}(h]jq|ah ](jjeh"]h$]h&]jj)jhuh1jhj|hM^hjs|hhubj)}(hhh]h)}(h7implementation for :c:type:`fb_ops.fb_setcmap `h](himplementation for }(hj}hhhNhNubh)}(h$:c:type:`fb_ops.fb_setcmap `h]jz)}(hj}h]hfb_ops.fb_setcmap}(hj}hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j|c.drm_fb_helper_setcmapasbjfb_opsuh1hhj6ghKhj}ubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM^hj}hhubah}(h]h ]h"]h$]h&]uh1jhjs|hhhj|hM^ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj}jj}jjjuh1jhhhj\hNhNubj)}(hq**Parameters** ``struct fb_cmap *cmap`` cmap to set ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j%)}(hj}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMbhj}ubji)}(hhh](jn)}(h%``struct fb_cmap *cmap`` cmap to set h](jt)}(h``struct fb_cmap *cmap``h]jz)}(hj~h]hstruct fb_cmap *cmap}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM_hj ~ubj)}(hhh]h)}(h cmap to seth]h cmap to set}(hj,~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(~hM_hj)~ubah}(h]h ]h"]h$]h&]uh1jhj ~ubeh}(h]h ]h"]h$]h&]uh1jmhj(~hM_hj ~ubjn)}(h7``struct fb_info *info`` fbdev registered by the helperh](jt)}(h``struct fb_info *info``h]jz)}(hjL~h]hstruct fb_info *info}(hjN~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJ~ubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMahjF~ubj)}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hje~hhhNhNubah}(h]h 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arg)h](j)}(hstruct fb_info *infoh](j)}(hjh]hstruct}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubh)}(hhh]j)}(hfb_infoh]hfb_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj~sbc.drm_fb_helper_ioctlasbuh1hhj~ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~ubj)}(hinfoh]hinfo}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubj)}(hunsigned int cmdh](j)}(hunsignedh]hunsigned}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(hinth]hint}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(hcmdh]hcmd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubj)}(hunsigned long argh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hlongh]hlong}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hargh]harg}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubeh}(h]h ]h"]h$]h&]jjuh1jhj~hhhj~hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj~hhhj~hMubah}(h]j~ah ](jjeh"]h$]h&]jj)jhuh1jhj~hMhj~hhubj)}(hhh]h)}(hlegacy ioctl implementationh]hlegacy ioctl implementation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj~hhhj~hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj\hNhNubj)}(hX**Parameters** ``struct fb_info *info`` fbdev registered by the helper ``unsigned int cmd`` ioctl command ``unsigned long arg`` ioctl argument **Description** A helper to implement the standard fbdev ioctl. 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Only FBIO_WAITFORVSYNC is implemented for now.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_fb_helper_check_var (C function)c.drm_fb_helper_check_varhNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hQint drm_fb_helper_check_var (struct fb_var_screeninfo *var, struct fb_info *info)h]j)}(hPint drm_fb_helper_check_var(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hinth]hint}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhjIhMubj)}(hdrm_fb_helper_check_varh]j)}(hdrm_fb_helper_check_varh]hdrm_fb_helper_check_var}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ](jjeh"]h$]h&]jjuh1jhj7hhhjIhMubj)}(h5(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hstruct fb_var_screeninfo *varh](j)}(hjh]hstruct}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubh)}(hhh]j)}(hfb_var_screeninfoh]hfb_var_screeninfo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj^sbc.drm_fb_helper_check_varasbuh1hhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj+)}(hj9h]h*}(hjāhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjtubj)}(hvarh]hvar}(hjсhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjpubj)}(hstruct fb_info *infoh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hfb_infoh]hfb_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jc.drm_fb_helper_check_varasbuh1hhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hinfoh]hinfo}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjpubeh}(h]h ]h"]h$]h&]jjuh1jhj7hhhjIhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj3hhhjIhMubah}(h]j.ah ](jjeh"]h$]h&]jj)jhuh1jhjIhMhj0hhubj)}(hhh]h)}(h9implementation for :c:type:`fb_ops.fb_check_var `h](himplementation for }(hjkhhhNhNubh)}(h&:c:type:`fb_ops.fb_check_var `h]jz)}(hjuh]hfb_ops.fb_check_var}(hjwhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jc.drm_fb_helper_check_varasbjfb_opsuh1hhj6ghKhjkubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjhhhubah}(h]h ]h"]h$]h&]uh1jhj0hhhjIhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj\hNhNubj)}(h**Parameters** ``struct fb_var_screeninfo *var`` screeninfo to check ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubji)}(hhh](jn)}(h6``struct fb_var_screeninfo *var`` screeninfo to check h](jt)}(h!``struct fb_var_screeninfo *var``h]jz)}(hjЂh]hstruct fb_var_screeninfo *var}(hj҂hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj΂ubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjʂubj)}(hhh]h)}(hscreeninfo to checkh]hscreeninfo to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjʂubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjǂubjn)}(h7``struct fb_info *info`` fbdev registered by the helperh](jt)}(h``struct fb_info *info``h]jz)}(hj h]hstruct fb_info *info}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubj)}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjǂubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_fb_helper_set_par (C function)c.drm_fb_helper_set_parhNtauh1jxhj\hhhNhNubj)}(hhh](j)}(h0int drm_fb_helper_set_par (struct fb_info *info)h]j)}(h/int drm_fb_helper_set_par(struct fb_info *info)h](j)}(hinth]hint}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMyubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhjqhMyubj)}(hdrm_fb_helper_set_parh]j)}(hdrm_fb_helper_set_parh]hdrm_fb_helper_set_par}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj_hhhjqhMyubj)}(h(struct fb_info *info)h]j)}(hstruct fb_info *infoh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hfb_infoh]hfb_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_helper_set_parasbuh1hhjubj)}(h h]h }(hjރhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hinfoh]hinfo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj_hhhjqhMyubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj[hhhjqhMyubah}(h]jVah ](jjeh"]h$]h&]jj)jhuh1jhjqhMyhjXhhubj)}(hhh]h)}(h7implementation for :c:type:`fb_ops.fb_set_par `h](himplementation for }(hj#hhhNhNubh)}(h$:c:type:`fb_ops.fb_set_par `h]jz)}(hj-h]hfb_ops.fb_set_par}(hj/hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jڃc.drm_fb_helper_set_parasbjfb_opsuh1hhj6ghKhj#ubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMyhj hhubah}(h]h ]h"]h$]h&]uh1jhjXhhhjqhMyubeh}(h]h ](jfunctioneh"]h$]h&]jjjj_jj_jjjuh1jhhhj\hNhNubj)}(h**Parameters** ``struct fb_info *info`` fbdev registered by the helper **Description** This will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.h](h)}(h**Parameters**h]j%)}(hjih]h Parameters}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjgubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM}hjcubji)}(hhh]jn)}(h8``struct fb_info *info`` fbdev registered by the helper h](jt)}(h``struct fb_info *info``h]jz)}(hjh]hstruct fb_info *info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMzhjubj)}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMzhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMzhjubah}(h]h ]h"]h$]h&]uh1jhhjcubh)}(h**Description**h]j%)}(hjÄh]h Description}(hjńhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM|hjcubh)}(hThis will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.h]hThis will let fbcon do the mode init and is called at initialization time by the fbdev core when registering the driver, and later on through the hotplug callback.}(hjلhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chM{hjcubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_fb_helper_pan_display (C function)c.drm_fb_helper_pan_displayhNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hSint drm_fb_helper_pan_display (struct fb_var_screeninfo *var, struct fb_info *info)h]j)}(hRint drm_fb_helper_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_fb_helper_pan_displayh]j)}(hdrm_fb_helper_pan_displayh]hdrm_fb_helper_pan_display}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h5(struct fb_var_screeninfo *var, struct fb_info *info)h](j)}(hstruct fb_var_screeninfo *varh](j)}(hjh]hstruct}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubh)}(hhh]j)}(hfb_var_screeninfoh]hfb_var_screeninfo}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjemodnameN classnameNjj)}j]j)}jj+sbc.drm_fb_helper_pan_displayasbuh1hhjAubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjAubj)}(hvarh]hvar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=ubj)}(hstruct fb_info *infoh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjąhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hfb_infoh]hfb_info}(hjՅhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj҅ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjׅmodnameN classnameNjj)}j]jc.drm_fb_helper_pan_displayasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hinfoh]hinfo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h;implementation for :c:type:`fb_ops.fb_pan_display `h](himplementation for }(hj8hhhNhNubh)}(h(:c:type:`fb_ops.fb_pan_display `h]jz)}(hjBh]hfb_ops.fb_pan_display}(hjDhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jc.drm_fb_helper_pan_displayasbjfb_opsuh1hhj6ghKhj8ubeh}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj5hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjtjjtjjjuh1jhhhj\hNhNubj)}(h**Parameters** ``struct fb_var_screeninfo *var`` updated screen information ``struct fb_info *info`` fbdev registered by the helperh](h)}(h**Parameters**h]j%)}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjxubji)}(hhh](jn)}(h=``struct fb_var_screeninfo *var`` updated screen information h](jt)}(h!``struct fb_var_screeninfo *var``h]jz)}(hjh]hstruct fb_var_screeninfo *var}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubj)}(hhh]h)}(hupdated screen informationh]hupdated screen information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h7``struct fb_info *info`` fbdev registered by the helperh](jt)}(h``struct fb_info *info``h]jz)}(hjֆh]hstruct fb_info *info}(hj؆hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjԆubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjІubj)}(hhh]h)}(hfbdev registered by the helperh]hfbdev registered by the helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjІubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_fb_helper_fill_info (C function)c.drm_fb_helper_fill_infohNtauh1jxhj\hhhNhNubj)}(hhh](j)}(h~void drm_fb_helper_fill_info (struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h]j)}(h}void drm_fb_helper_fill_info(struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h](j)}(hvoidh]hvoid}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj>hMubj)}(hdrm_fb_helper_fill_infoh]j)}(hdrm_fb_helper_fill_infoh]hdrm_fb_helper_fill_info}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ](jjeh"]h$]h&]jjuh1jhj,hhhj>hMubj)}(ha(struct fb_info *info, struct drm_fb_helper *fb_helper, struct drm_fb_helper_surface_size *sizes)h](j)}(hstruct fb_info *infoh](j)}(hjh]hstruct}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubh)}(hhh]j)}(hfb_infoh]hfb_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjSsbc.drm_fb_helper_fill_infoasbuh1hhjiubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjiubj)}(hinfoh]hinfo}(hjƇhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubj)}(hstruct drm_fb_helper *fb_helperh](j)}(hjh]hstruct}(hj߇hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjۇubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjۇubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_helper_fill_infoasbuh1hhjۇubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjۇubj+)}(hj9h]h*}(hj)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjۇubj)}(h fb_helperh]h fb_helper}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjۇubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubj)}(h(struct drm_fb_helper_surface_size *sizesh](j)}(hjh]hstruct}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubh)}(hhh]j)}(hdrm_fb_helper_surface_sizeh]hdrm_fb_helper_surface_size}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjomodnameN classnameNjj)}j]jc.drm_fb_helper_fill_infoasbuh1hhjKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjKubj)}(hsizesh]hsizes}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubeh}(h]h ]h"]h$]h&]jjuh1jhj,hhhj>hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj(hhhj>hMubah}(h]j#ah ](jjeh"]h$]h&]jj)jhuh1jhj>hMhj%hhubj)}(hhh]h)}(hinitializes fbdev informationh]hinitializes fbdev information}(hjЈhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj͈hhubah}(h]h ]h"]h$]h&]uh1jhj%hhhj>hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj\hNhNubj)}(hXc**Parameters** ``struct fb_info *info`` fbdev instance to set up ``struct drm_fb_helper *fb_helper`` fb helper instance to use as template ``struct drm_fb_helper_surface_size *sizes`` describes fbdev size and scanout surface size **Description** Sets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in :c:type:`drm_fb_helper.fb `. Drivers should call this (or their equivalent setup code) from their :c:type:`drm_driver.fbdev_probe ` callback after having allocated the fbdev backing storage framebuffer.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubji)}(hhh](jn)}(h2``struct fb_info *info`` fbdev instance to set up h](jt)}(h``struct fb_info *info``h]jz)}(hjh]hstruct fb_info *info}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj ubj)}(hhh]h)}(hfbdev instance to set uph]hfbdev instance to set up}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj&hMhjubjn)}(hJ``struct drm_fb_helper *fb_helper`` fb helper instance to use as template h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hjJh]hstruct drm_fb_helper *fb_helper}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjDubj)}(hhh]h)}(h%fb helper instance to use as templateh]h%fb helper instance to use as template}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj`ubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jmhj_hMhjubjn)}(h[``struct drm_fb_helper_surface_size *sizes`` describes fbdev size and scanout surface size h](jt)}(h,``struct drm_fb_helper_surface_size *sizes``h]jz)}(hjh]h(struct drm_fb_helper_surface_size *sizes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj}ubj)}(hhh]h)}(h-describes fbdev size and scanout surface sizeh]h-describes fbdev size and scanout surface size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubh)}(hSets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in :c:type:`drm_fb_helper.fb `.h](h|Sets up the variable and fixed fbdev metainformation from the given fb helper instance and the drm framebuffer allocated in }(hjԉhhhNhNubh)}(h*:c:type:`drm_fb_helper.fb `h]jz)}(hjމh]hdrm_fb_helper.fb}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj܉ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_fb_helperuh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjԉubh.}(hjԉhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hDrivers should call this (or their equivalent setup code) from their :c:type:`drm_driver.fbdev_probe ` callback after having allocated the fbdev backing storage framebuffer.h](hEDrivers should call this (or their equivalent setup code) from their }(hjhhhNhNubh)}(h-:c:type:`drm_driver.fbdev_probe `h]jz)}(hjh]hdrm_driver.fbdev_probe}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_driveruh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjubhG callback after having allocated the fbdev backing storage framebuffer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_fb_helper_initial_config (C function)c.drm_fb_helper_initial_confighNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hBint drm_fb_helper_initial_config (struct drm_fb_helper *fb_helper)h]j)}(hAint drm_fb_helper_initial_config(struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhjfhMubj)}(hdrm_fb_helper_initial_configh]j)}(hdrm_fb_helper_initial_configh]hdrm_fb_helper_initial_config}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ](jjeh"]h$]h&]jjuh1jhjThhhjfhMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj{sbc.drm_fb_helper_initial_configasbuh1hhjubj)}(h h]h }(hjӊhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h fb_helperh]h fb_helper}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjThhhjfhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjPhhhjfhMubah}(h]jKah ](jjeh"]h$]h&]jj)jhuh1jhjfhMhjMhhubj)}(hhh]h)}(h,setup a sane initial connector configurationh]h,setup a sane initial connector configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjMhhhjfhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj0jj0jjjuh1jhhhj\hNhNubj)}(hXV**Parameters** ``struct drm_fb_helper *fb_helper`` fb_helper device struct **Description** Scans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store. Note that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces. This function will call down into the :c:type:`drm_driver.fbdev_probe ` callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure. HANG DEBUGGING: When you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up. Standard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option. The other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option. **Return** Zero if everything went ok, nonzero otherwise.h](h)}(h**Parameters**h]j%)}(hj:h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubji)}(hhh]jn)}(h<``struct drm_fb_helper *fb_helper`` fb_helper device struct h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hjYh]hstruct drm_fb_helper *fb_helper}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjSubj)}(hhh]h)}(hfb_helper device structh]hfb_helper device struct}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jmhjnhMhjPubah}(h]h ]h"]h$]h&]uh1jhhj4ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(hScans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store.h]hScans the CRTCs and connectors and tries to put together an initial setup. At the moment, this is a cloned configuration across all heads with a new framebuffer object as the backing store.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(huNote that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces.h]huNote that this also registers the fbdev and so allows userspace to call into the driver through the fbdev interfaces.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(hX>This function will call down into the :c:type:`drm_driver.fbdev_probe ` callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure.h](h&This function will call down into the }(hjȋhhhNhNubh)}(h-:c:type:`drm_driver.fbdev_probe `h]jz)}(hjҋh]hdrm_driver.fbdev_probe}(hjԋhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjЋubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_driveruh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjȋubh callback to let the driver allocate and initialize the fbdev info structure and the drm framebuffer used to back the fbdev. drm_fb_helper_fill_info() is provided as a helper to setup simple default values for the fbdev info structure.}(hjȋhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj4ubh)}(hHANG DEBUGGING:h]hHANG DEBUGGING:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(hXNWhen you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up.h]hXNWhen you have fbcon support built-in or already loaded, this function will do a full modeset to setup the fbdev console. Due to locking misdesign in the VT/fbdev subsystem that entire modeset sequence has to be done while holding console_lock. Until console_unlock is called no dmesg lines will be sent out to consoles, not even serial console. This means when your driver crashes, you will see absolutely nothing else but a system stuck in this function, with no further output. Any kind of printk() you place within your own driver or in the drm core modeset code will also never show up.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(hStandard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option.h]hStandard debug practice is to run the fbcon setup without taking the console_lock as a hack, to be able to see backtraces and crashes on the serial line. This can be done by setting the fb.lockless_register_fb=1 kernel cmdline option.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(hThe other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option.h]hThe other option is to just disable fbdev emulation since very likely the first modeset from userspace will crash in the same way, and is even easier to debug. This can be done by setting the drm_kms_helper.fbdev_emulation=0 kernel cmdline option.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(h **Return**h]j%)}(hj8h]hReturn}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubh)}(h.Zero if everything went ok, nonzero otherwise.h]h.Zero if everything went ok, nonzero otherwise.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_helper_hotplug_event (C function)c.drm_fb_helper_hotplug_eventhNtauh1jxhj\hhhNhNubj)}(hhh](j)}(hAint drm_fb_helper_hotplug_event (struct drm_fb_helper *fb_helper)h]j)}(h@int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)h](j)}(hinth]hint}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyhhhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyhhhjhMubj)}(hdrm_fb_helper_hotplug_eventh]j)}(hdrm_fb_helper_hotplug_eventh]hdrm_fb_helper_hotplug_event}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjyhhhjhMubj)}(h!(struct drm_fb_helper *fb_helper)h]j)}(hstruct drm_fb_helper *fb_helperh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjnjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_fb_helperh]h drm_fb_helper}(hj،hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjՌubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjڌmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_helper_hotplug_eventasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h fb_helperh]h fb_helper}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjyhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjuhhhjhMubah}(h]jpah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjrhhubj)}(hhh]h)}(hOrespond to a hotplug notification by probing all the outputs attached to the fbh]hOrespond to a hotplug notification by probing all the outputs attached to the fb}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhj:hhubah}(h]h ]h"]h$]h&]uh1jhjrhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjUjjUjjjuh1jhhhj\hNhNubj)}(hX**Parameters** ``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL **Description** Scan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration. Called at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver's hotplug interrupt). Note that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events. **Return** 0 on success and a non-zero error code otherwise.h](h)}(h**Parameters**h]j%)}(hj_h]h Parameters}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjYubji)}(hhh]jn)}(hO``struct drm_fb_helper *fb_helper`` driver-allocated fbdev helper, can be NULL h](jt)}(h#``struct drm_fb_helper *fb_helper``h]jz)}(hj~h]hstruct drm_fb_helper *fb_helper}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjxubj)}(hhh]h)}(h*driver-allocated fbdev helper, can be NULLh]h*driver-allocated fbdev helper, can be NULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjuubah}(h]h ]h"]h$]h&]uh1jhhjYubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjYubh)}(hScan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration.h]hScan the connectors attached to the fb_helper and try to put together a setup after notification of a change in output configuration.}(hjύhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjYubh)}(hCalled at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver's hotplug interrupt).h]hCalled at runtime, takes the mode config locks to be able to check/change the modeset configuration. Must be run from process context (which usually means either the output polling work or a work item launched from the driver’s hotplug interrupt).}(hjލhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjYubh)}(hNote that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events.h]hNote that drivers may call this even before calling drm_fb_helper_initial_config but only after drm_fb_helper_init. This allows for a race-free fbcon setup and will make sure that the fbdev emulation will not miss any hotplug events.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjYubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjYubh)}(h10 on success and a non-zero error code otherwise.h]h10 on success and a non-zero error code otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhd/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:128: ./drivers/gpu/drm/drm_fb_helper.chMhjYubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj\hhhNhNubeh}(h] fbdev-helper-functions-referenceah ]h"] fbdev helper functions referenceah$]h&]uh1hhhhhhhhKxubh)}(hhh](h)}(h!format Helper Functions Referenceh]h!format Helper Functions Reference}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hhhhhKubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_format_conv_state_init (C function)c.drm_format_conv_state_inithNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hEvoid drm_format_conv_state_init (struct drm_format_conv_state *state)h]j)}(hDvoid drm_format_conv_state_init(struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhhjjhKubj)}(hdrm_format_conv_state_inith]j)}(hdrm_format_conv_state_inith]hdrm_format_conv_state_init}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ](jjeh"]h$]h&]jjuh1jhjXhhhjjhKubj)}(h%(struct drm_format_conv_state *state)h]j)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_format_conv_state_initasbuh1hhjubj)}(h h]h }(hj׎hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjXhhhjjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjThhhjjhKubah}(h]jOah ](jjeh"]h$]h&]jj)jhuh1jhjjhKhjQhhubj)}(hhh]h)}(h"Initialize format-conversion stateh]h"Initialize format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjQhhhjjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj4jj4jjjuh1jhhhj2hNhNubj)}(h**Parameters** ``struct drm_format_conv_state *state`` The state to initialize **Description** Clears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.h](h)}(h**Parameters**h]j%)}(hj>h]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKhj8ubji)}(hhh]jn)}(h@``struct drm_format_conv_state *state`` The state to initialize h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hj]h]h#struct drm_format_conv_state *state}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKhjWubj)}(hhh]h)}(hThe state to initializeh]hThe state to initialize}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhKhjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjrhKhjTubah}(h]h ]h"]h$]h&]uh1jhhj8ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKhj8ubh)}(hjClears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.h]hjClears all fields in struct drm_format_conv_state. The state will be empty with no preallocated resources.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_format_conv_state_copy (C function)c.drm_format_conv_state_copyhNtauh1jxhj2hhhNhNubj)}(hhh](j)}(htvoid drm_format_conv_state_copy (struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h]j)}(hsvoid drm_format_conv_state_copy(struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h](j)}(hvoidh]hvoid}(hjݏhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjُhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK*ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjُhhhjhK*ubj)}(hdrm_format_conv_state_copyh]j)}(hdrm_format_conv_state_copyh]hdrm_format_conv_state_copy}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjُhhhjhK*ubj)}(hT(struct drm_format_conv_state *state, const struct drm_format_conv_state *old_state)h](j)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj:modnameN classnameNjj)}j]j)}jjsbc.drm_format_conv_state_copyasbuh1hhjubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjfhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h-const struct drm_format_conv_state *old_stateh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjŐhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjǐmodnameN classnameNjj)}j]jTc.drm_format_conv_state_copyasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h old_stateh]h old_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjُhhhjhK*ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjՏhhhjhK*ubah}(h]jЏah ](jjeh"]h$]h&]jj)jhuh1jhjhK*hjҏhhubj)}(hhh]h)}(hCopy format-conversion stateh]hCopy format-conversion state}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK*hj%hhubah}(h]h ]h"]h$]h&]uh1jhjҏhhhjhK*ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj@jj@jjjuh1jhhhj2hNhNubj)}(h**Parameters** ``struct drm_format_conv_state *state`` Destination state ``const struct drm_format_conv_state *old_state`` Source state **Description** Copies format-conversion state from **old_state** to **state**; except for temporary storage.h](h)}(h**Parameters**h]j%)}(hjJh]h Parameters}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK.hjDubji)}(hhh](jn)}(h:``struct drm_format_conv_state *state`` Destination state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjih]h#struct drm_format_conv_state *state}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK+hjcubj)}(hhh]h)}(hDestination stateh]hDestination state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hK+hjubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhj~hK+hj`ubjn)}(h?``const struct drm_format_conv_state *old_state`` Source state h](jt)}(h1``const struct drm_format_conv_state *old_state``h]jz)}(hjh]h-const struct drm_format_conv_state *old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK,hjubj)}(hhh]h)}(h Source stateh]h Source state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK,hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK,hj`ubeh}(h]h ]h"]h$]h&]uh1jhhjDubh)}(h**Description**h]j%)}(hjݑh]h Description}(hjߑhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjۑubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK.hjDubh)}(h]Copies format-conversion state from **old_state** to **state**; except for temporary storage.h](h$Copies format-conversion state from }(hjhhhNhNubj%)}(h **old_state**h]h old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh to }(hjhhhNhNubj%)}(h **state**h]hstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh; except for temporary storage.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK-hjDubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_format_conv_state_reserve (C function)c.drm_format_conv_state_reservehNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hhvoid * drm_format_conv_state_reserve (struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h]j)}(hfvoid *drm_format_conv_state_reserve(struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h](j)}(hvoidh]hvoid}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK?ubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhjThK?ubj+)}(hj9h]h*}(hjchhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBhhhjThK?ubj)}(hdrm_format_conv_state_reserveh]j)}(hdrm_format_conv_state_reserveh]hdrm_format_conv_state_reserve}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ](jjeh"]h$]h&]jjuh1jhjBhhhjThK?ubj)}(hC(struct drm_format_conv_state *state, size_t new_size, gfp_t flags)h](j)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjvsbc.drm_format_conv_state_reserveasbuh1hhjubj)}(h h]h }(hjΒhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjܒhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hsize_t new_sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jʒc.drm_format_conv_state_reserveasbuh1hhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hnew_sizeh]hnew_size}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h gfp_t flagsh](h)}(hhh]j)}(hgfp_th]hgfp_t}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjOmodnameN classnameNjj)}j]jʒc.drm_format_conv_state_reserveasbuh1hhjFubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(hflagsh]hflags}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjBhhhjThK?ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>hhhjThK?ubah}(h]j9ah ](jjeh"]h$]h&]jj)jhuh1jhjThK?hj;hhubj)}(hhh]h)}(h'Allocates storage for format conversionh]h'Allocates storage for format conversion}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK?hjhhubah}(h]h ]h"]h$]h&]uh1jhj;hhhjThK?ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hX**Parameters** ``struct drm_format_conv_state *state`` The format-conversion state ``size_t new_size`` The minimum allocation size ``gfp_t flags`` Flags for kmalloc() **Description** Allocates at least **new_size** bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It's best to collect all memory requirements of a format conversion and call this function once to allocate the range. **Return** A pointer to the allocated memory range, or NULL otherwise.h](h)}(h**Parameters**h]j%)}(hjœh]h Parameters}(hjǓhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjÓubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKChjubji)}(hhh](jn)}(hD``struct drm_format_conv_state *state`` The format-conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK@hjޓubj)}(hhh]h)}(hThe format-conversion stateh]hThe format-conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK@hjubah}(h]h ]h"]h$]h&]uh1jhjޓubeh}(h]h ]h"]h$]h&]uh1jmhjhK@hjۓubjn)}(h0``size_t new_size`` The minimum allocation size h](jt)}(h``size_t new_size``h]jz)}(hjh]hsize_t new_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKAhjubj)}(hhh]h)}(hThe minimum allocation sizeh]hThe minimum allocation size}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hKAhj3ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj2hKAhjۓubjn)}(h$``gfp_t flags`` Flags for kmalloc() h](jt)}(h``gfp_t flags``h]jz)}(hjVh]h gfp_t flags}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjTubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKBhjPubj)}(hhh]h)}(hFlags for kmalloc()h]hFlags for kmalloc()}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhKBhjlubah}(h]h ]h"]h$]h&]uh1jhjPubeh}(h]h ]h"]h$]h&]uh1jmhjkhKBhjۓubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKDhjubh)}(hXAllocates at least **new_size** bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It's best to collect all memory requirements of a format conversion and call this function once to allocate the range.h](hAllocates at least }(hjhhhNhNubj%)}(h **new_size**h]hnew_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh bytes and returns a pointer to the memory range. After calling this function, previously returned memory blocks are invalid. It’s best to collect all memory requirements of a format conversion and call this function once to allocate the range.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKChjubh)}(h **Return**h]j%)}(hjʔh]hReturn}(hj̔hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjȔubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKHhjubh)}(h;A pointer to the allocated memory range, or NULL otherwise.h]h;A pointer to the allocated memory range, or NULL otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKIhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_format_conv_state_release (C function)c.drm_format_conv_state_releasehNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hHvoid drm_format_conv_state_release (struct drm_format_conv_state *state)h]j)}(hGvoid drm_format_conv_state_release(struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKcubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhjhKcubj)}(hdrm_format_conv_state_releaseh]j)}(hdrm_format_conv_state_releaseh]hdrm_format_conv_state_release}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhjhKcubj)}(h%(struct drm_format_conv_state *state)h]j)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjlmodnameN classnameNjj)}j]j)}jj2sbc.drm_format_conv_state_releaseasbuh1hhjHubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjHubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjDubah}(h]h ]h"]h$]h&]jjuh1jhj hhhjhKcubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKcubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKchjhhubj)}(hhh]h)}(h%Releases an format-conversion storageh]h%Releases an format-conversion storage}(hjϕhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKchj̕hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKcubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hX1**Parameters** ``struct drm_format_conv_state *state`` The format-conversion state **Description** Releases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKghjubji)}(hhh]jn)}(hD``struct drm_format_conv_state *state`` The format-conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKdhj ubj)}(hhh]h)}(hThe format-conversion stateh]hThe format-conversion state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hKdhj&ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj%hKdhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjKh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKfhjubh)}(hReleases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.h]hReleases the memory range references by the format-conversion state. After this call, all pointers to the memory are invalid. Prefer drm_format_conv_state_init() for cleaning up and unloading a driver.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chKehjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_fb_clip_offset (C function)c.drm_fb_clip_offsethNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hwunsigned int drm_fb_clip_offset (unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h]j)}(hvunsigned int drm_fb_clip_offset(unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chK{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhK{ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhK{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhK{ubj)}(hdrm_fb_clip_offseth]j)}(hdrm_fb_clip_offseth]hdrm_fb_clip_offset}(hj͖hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɖubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhK{ubj)}(hW(unsigned int pitch, const struct drm_format_info *format, const struct drm_rect *clip)h](j)}(hunsigned int pitchh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpitchh]hpitch}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h$const struct drm_format_info *formath](j)}(hjUh]hconst}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(hjh]hstruct}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_format_infoh]hdrm_format_info}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}jjϖsbc.drm_fb_clip_offsetasbuh1hhj6ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hformath]hformat}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjǗhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj×ubj)}(h h]h }(hjԗhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj×ubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj×ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj×ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_clip_offsetasbuh1hhj×ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj×ubj+)}(hj9h]h*}(hj,hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj×ubj)}(hcliph]hclip}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj×ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhK{ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhK{ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhK{hjhhubj)}(hhh]h)}(h``struct iosys_map *dst`` Array of RGB332 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hj?h]hstruct iosys_map *dst}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM hj9ubj)}(hhh]h)}(h#Array of RGB332 destination buffersh]h#Array of RGB332 destination buffers}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThM hjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhjThM hj6ubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjxh]hconst unsigned int *dst_pitch}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjrubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj6ubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hjĨh]hconst struct iosys_map *src}(hjƨhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj¨ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjݨhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj٨hMhjڨubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj٨hMhj6ubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj6ubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hj6h]hconst struct drm_rect *clip}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj0ubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMhjLubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhjKhMhj6ubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjoh]h#struct drm_format_conv_state *state}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjiubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj6ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjȩhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjکhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hVDrivers can use this function for RGB332 devices that don't support XRGB8888 natively.h]hXDrivers can use this function for RGB332 devices that don’t support XRGB8888 natively.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_fb_xrgb8888_to_rgb565 (C function)c.drm_fb_xrgb8888_to_rgb565hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_rgb565 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_rgb565(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM3ubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhhjuhM3ubj)}(hdrm_fb_xrgb8888_to_rgb565h]j)}(hdrm_fb_xrgb8888_to_rgb565h]hdrm_fb_xrgb8888_to_rgb565}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjchhhjuhM3ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjªhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjĪmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjihhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjȫhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjūubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjʫmodnameN classnameNjj)}j]jުc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjUmodnameN classnameNjj)}j]jުc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjͬhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjެhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj۬ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jުc.drm_fb_xrgb8888_to_rgb565asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjPmodnameN classnameNjj)}j]jުc.drm_fb_xrgb8888_to_rgb565asbuh1hhj,ubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj+)}(hj9h]h*}(hjzhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj,ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjchhhjuhM3ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj_hhhjuhM3ubah}(h]jZah ](jjeh"]h$]h&]jj)jhuh1jhjuhM3hj\hhubj)}(hhh]h)}(h&Convert XRGB8888 to RGB565 clip bufferh]h&Convert XRGB8888 to RGB565 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM3hjhhubah}(h]h ]h"]h$]h&]uh1jhj\hhhjuhM3ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjɭjjɭjjjuh1jhhhj2hNhNubj)}(hXi**Parameters** ``struct iosys_map *dst`` Array of RGB565 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB565 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j%)}(hjӭh]h Parameters}(hjխhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjѭubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM7hjͭubji)}(hhh](jn)}(h>``struct iosys_map *dst`` Array of RGB565 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM4hjubj)}(hhh]h)}(h#Array of RGB565 destination buffersh]h#Array of RGB565 destination buffers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM4hjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hj+h]hconst unsigned int *dst_pitch}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM6hj%ubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjDhhhNhNubj%)}(h**dst**h]hdst}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjDubh9; can be NULL if scanlines are stored next to each other.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM5hjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj@hM6hjubjn)}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hjwh]hconst struct iosys_map *src}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM7hjqubj)}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjhM7hjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM8hjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjɮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjŮhM8hjƮubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjŮhM8hjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM9hjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM9hjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hj"h]h#struct drm_format_conv_state *state}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM:hjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hM:hj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj7hM:hjubeh}(h]h ]h"]h$]h&]uh1jhhjͭubh)}(h**Description**h]j%)}(hj]h]h Description}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM<hjͭubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjshhhNhNubj%)}(h**dst**h]hdst}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubh, }(hjshhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubh and }(hjshhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjshhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM;hjͭubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjʯhhhNhNubj%)}(h**dst**h]hdst}(hjүhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjʯubh2 (i.e. the destination is at the top-left corner).}(hjʯhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMAhjͭubh)}(hVDrivers can use this function for RGB565 devices that don't support XRGB8888 natively.h]hXDrivers can use this function for RGB565 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMDhjͭubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_xrgb8888_to_rgb565be (C function)c.drm_fb_xrgb8888_to_rgb565behNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_rgb565be (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_rgb565be(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM[ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj(hM[ubj)}(hdrm_fb_xrgb8888_to_rgb565beh]j)}(hdrm_fb_xrgb8888_to_rgb565beh]hdrm_fb_xrgb8888_to_rgb565be}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj(hM[ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]j)}jj=sbc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjSubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjɰhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŰubj)}(h h]h }(hjְhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŰubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŰubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŰubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŰubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŰubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjŰubj)}(h dst_pitchh]h dst_pitch}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŰubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(hjh]hstruct}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj}modnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgb565beasbuh1hhj>ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj>ubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjͱhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɱubj)}(h h]h }(hjڱhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɱubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɱubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɱubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjɱubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɱubj+)}(hj9h]h*}(hj2hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjɱubj)}(hfbh]hfb}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɱubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj)}(hjh]hstruct}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgb565beasbuh1hhjTubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjTubj)}(hcliph]hclip}(hjʲhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߲ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߲ubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgb565beasbuh1hhj߲ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߲ubj+)}(hj9h]h*}(hj-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj߲ubj)}(hstateh]hstate}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj߲ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjOubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj(hM[ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj(hM[ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj(hM[hjhhubj)}(hhh]h)}(hubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj]hhhNhNubj%)}(h**dst**h]hdst}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubh9; can be NULL if scanlines are stored next to each other.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jmhjYhMhjubjn)}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjɿh]h const struct drm_framebuffer *fb}(hj˿hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjǿubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjÿubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj޿hMhj߿ubah}(h]h ]h"]h$]h&]uh1jhjÿubeh}(h]h ]h"]h$]h&]uh1jmhj޿hMhjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hj;h]h#struct drm_format_conv_state *state}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj5ubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMhjQubah}(h]h ]h"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]uh1jmhjPhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjvh]h Description}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjtubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hDrivers can use this function for ARGB1555 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ARGB1555 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_xrgb8888_to_rgba5551 (C function)c.drm_fb_xrgb8888_to_rgba5551hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_rgba5551 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_rgba5551(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhjAhMubj)}(hdrm_fb_xrgb8888_to_rgba5551h]j)}(hdrm_fb_xrgb8888_to_rgba5551h]hdrm_fb_xrgb8888_to_rgba5551}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ](jjeh"]h$]h&]jjuh1jhj/hhhjAhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjVsbc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjlubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjlubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(hjh]hstruct}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjWubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjKhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_rgba5551asbuh1hhjubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjFhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubeh}(h]h ]h"]h$]h&]jjuh1jhj/hhhjAhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhjAhMubah}(h]j&ah ](jjeh"]h$]h&]jj)jhuh1jhjAhMhj(hhubj)}(hhh]h)}(h(Convert XRGB8888 to RGBA5551 clip bufferh]h(Convert XRGB8888 to RGBA5551 clip buffer}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjzhhubah}(h]h ]h"]h$]h&]uh1jhj(hhhjAhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hXx**Parameters** ``struct iosys_map *dst`` Array of RGBA5551 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGBA5551 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubji)}(hhh](jn)}(h@``struct iosys_map *dst`` Array of RGBA5551 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(h%Array of RGBA5551 destination buffersh]h%Array of RGBA5551 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjubjn)}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hjCh]hconst struct iosys_map *src}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj=ubj)}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMhjYubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhjXhMhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hj|h]h const struct drm_framebuffer *fb}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjvubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj)h]h Description}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hj?hhhNhNubj%)}(h**dst**h]hdst}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubh, }(hj?hhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubh and }(hj?hhhNhNubj%)}(h**src**h]hsrc}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj?hhhNhNubj%)}(h**fb**h]hfb}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hDrivers can use this function for RGBA5551 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for RGBA5551 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_fb_xrgb8888_to_rgb888 (C function)c.drm_fb_xrgb8888_to_rgb888hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_rgb888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_rgb888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_fb_xrgb8888_to_rgb888h]j)}(hdrm_fb_xrgb8888_to_rgb888h]hdrm_fb_xrgb8888_to_rgb888}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjCmodnameN classnameNjj)}j]j)}jj sbc.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj)}(h h]h }(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjohhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]hstruct}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjImodnameN classnameNjj)}j]j]c.drm_fb_xrgb8888_to_rgb888asbuh1hhj ubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjshhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j]c.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]hstruct}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_modnameN classnameNjj)}j]j]c.drm_fb_xrgb8888_to_rgb888asbuh1hhj ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j]c.drm_fb_xrgb8888_to_rgb888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h&Convert XRGB8888 to RGB888 clip bufferh]h&Convert XRGB8888 to RGB888 clip buffer}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj-hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjHjjHjjjuh1jhhhj2hNhNubj)}(hXj**Parameters** ``struct iosys_map *dst`` Array of RGB888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for RGB888 devices that don't natively support XRGB8888.h](h)}(h**Parameters**h]j%)}(hjRh]h Parameters}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjLubji)}(hhh](jn)}(h>``struct iosys_map *dst`` Array of RGB888 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjqh]hstruct iosys_map *dst}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjoubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjkubj)}(hhh]h)}(h#Array of RGB888 destination buffersh]h#Array of RGB888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjhubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjhubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjhubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hj/h]h const struct drm_framebuffer *fb}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj)ubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMhjEubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhjDhMhjhubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjhh]hconst struct drm_rect *clip}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjbubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj~ubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jmhj}hMhjhubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjhubeh}(h]h ]h"]h$]h&]uh1jhhjLubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjLubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjLubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjIhhhNhNubj%)}(h**dst**h]hdst}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubh2 (i.e. the destination is at the top-left corner).}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjLubh)}(hVDrivers can use this function for RGB888 devices that don't natively support XRGB8888.h]hXDrivers can use this function for RGB888 devices that don’t natively support XRGB8888.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM hjLubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_fb_xrgb8888_to_bgr888 (C function)c.drm_fb_xrgb8888_to_bgr888hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_bgr888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_bgr888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM"ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM"ubj)}(hdrm_fb_xrgb8888_to_bgr888h]j)}(hdrm_fb_xrgb8888_to_bgr888h]hdrm_fb_xrgb8888_to_bgr888}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM"ubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj"hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(hunsignedh]hunsigned}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjDubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hjh]hstruct}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjHubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjHubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhjubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj<hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgr888asbuh1hhj^ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj^ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM"ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM"ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM"hjhhubj)}(hhh]h)}(h&Convert XRGB8888 to BGR888 clip bufferh]h&Convert XRGB8888 to BGR888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM"hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM"ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hXj**Parameters** ``struct iosys_map *dst`` Array of BGR888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for BGR888 devices that don't natively support XRGB8888.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM&hjubji)}(hhh](jn)}(h>``struct iosys_map *dst`` Array of BGR888 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hj$h]hstruct iosys_map *dst}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM#hjubj)}(hhh]h)}(h#Array of BGR888 destination buffersh]h#Array of BGR888 destination buffers}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hM#hj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj9hM#hjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hj]h]hconst unsigned int *dst_pitch}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM%hjWubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjvhhhNhNubj%)}(h**dst**h]hdst}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjvubh9; can be NULL if scanlines are stored next to each other.}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM$hjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjrhM%hjubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM&hjubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM&hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM&hjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM'hjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM'hjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM(hjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM(hj1ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj0hM(hjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjTh]h#struct drm_format_conv_state *state}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM)hjNubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihM)hjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjihM)hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM+hjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM*hjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM0hjubh)}(hVDrivers can use this function for BGR888 devices that don't natively support XRGB8888.h]hXDrivers can use this function for BGR888 devices that don’t natively support XRGB8888.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM3hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_xrgb8888_to_argb8888 (C function)c.drm_fb_xrgb8888_to_argb8888hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_argb8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_argb8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMJubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhjZhMJubj)}(hdrm_fb_xrgb8888_to_argb8888h]j)}(hdrm_fb_xrgb8888_to_argb8888h]hdrm_fb_xrgb8888_to_argb8888}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubah}(h]h ](jjeh"]h$]h&]jjuh1jhjHhhhjZhMJubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjosbc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjNhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjpubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjpubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj:modnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjdhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj5modnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_argb8888asbuh1hhjubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj_hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjHhhhjZhMJubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjDhhhjZhMJubah}(h]j?ah ](jjeh"]h$]h&]jj)jhuh1jhjZhMJhjAhhubj)}(hhh]h)}(h(Convert XRGB8888 to ARGB8888 clip bufferh]h(Convert XRGB8888 to ARGB8888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMJhjhhubah}(h]h ]h"]h$]h&]uh1jhjAhhhjZhMJubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hXx**Parameters** ``struct iosys_map *dst`` Array of ARGB8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMNhjubji)}(hhh](jn)}(h@``struct iosys_map *dst`` Array of ARGB8888 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMKhjubj)}(hhh]h)}(h%Array of ARGB8888 destination buffersh]h%Array of ARGB8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMKhjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMMhj ubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj)hhhNhNubj%)}(h**dst**h]hdst}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj)ubh9; can be NULL if scanlines are stored next to each other.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMLhj&ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj%hMMhjubjn)}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hj\h]hconst struct iosys_map *src}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMNhjVubj)}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMNhjrubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjqhMNhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMOhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMOhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMOhjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMPhjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMPhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMPhjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMQhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMQhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjBh]h Description}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj@ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMShjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjXhhhNhNubj%)}(h**dst**h]hdst}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubh, }(hjXhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubh and }(hjXhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjXhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMRhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMXhjubh)}(hDrivers can use this function for ARGB8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ARGB8888 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM[hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_xrgb8888_to_abgr8888 (C function)c.drm_fb_xrgb8888_to_abgr8888hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_abgr8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_abgr8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMrubj)}(hdrm_fb_xrgb8888_to_abgr8888h]j)}(hdrm_fb_xrgb8888_to_abgr8888h]hdrm_fb_xrgb8888_to_abgr8888}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMrubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\modnameN classnameNjj)}j]j)}jj"sbc.drm_fb_xrgb8888_to_abgr8888asbuh1hhj8ubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj8ubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(hjh]hstruct}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjbmodnameN classnameNjj)}j]jvc.drm_fb_xrgb8888_to_abgr8888asbuh1hhj#ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj#ubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jvc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(hjh]hstruct}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjxmodnameN classnameNjj)}j]jvc.drm_fb_xrgb8888_to_abgr8888asbuh1hhj9ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj9ubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jvc.drm_fb_xrgb8888_to_abgr8888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hMrubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hMrubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMrhjhhubj)}(hhh]h)}(h(Convert XRGB8888 to ABGR8888 clip bufferh]h(Convert XRGB8888 to ABGR8888 clip buffer}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMrhjFhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMrubeh}(h]h ](jfunctioneh"]h$]h&]jjjjajjajjjuh1jhhhj2hNhNubj)}(hXx**Parameters** ``struct iosys_map *dst`` Array of ABGR8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ABGR8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h](h)}(h**Parameters**h]j%)}(hjkh]h Parameters}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMvhjeubji)}(hhh](jn)}(h@``struct iosys_map *dst`` Array of ABGR8888 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMshjubj)}(hhh]h)}(h%Array of ABGR8888 destination buffersh]h%Array of ABGR8888 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMshjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMshjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMuhjubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMthjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMuhjubjn)}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMvhj ubj)}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMvhj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hMvhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjHh]h const struct drm_framebuffer *fb}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMwhjBubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMwhj^ubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jmhj]hMwhjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMxhj{ubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMxhjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhjhMxhjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMyhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMyhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMyhjubeh}(h]h ]h"]h$]h&]uh1jhhjeubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM{hjeubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hj hhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh, }(hj hhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh and }(hj hhhNhNubj%)}(h**src**h]hsrc}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj hhhNhNubj%)}(h**fb**h]hfb}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMzhjeubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjbhhhNhNubj%)}(h**dst**h]hdst}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjbubh2 (i.e. the destination is at the top-left corner).}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjeubh)}(hDrivers can use this function for ABGR8888 devices that don't support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.h]hDrivers can use this function for ABGR8888 devices that don’t support XRGB8888 natively. It sets an opaque alpha channel as part of the conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjeubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_xrgb8888_to_xbgr8888 (C function)c.drm_fb_xrgb8888_to_xbgr8888hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_xbgr8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_xbgr8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_fb_xrgb8888_to_xbgr8888h]j)}(hdrm_fb_xrgb8888_to_xbgr8888h]hdrm_fb_xrgb8888_to_xbgr8888}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj;hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(hunsignedh]hunsigned}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj]ubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)c.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)c.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjaubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j)c.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjUhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)c.drm_fb_xrgb8888_to_xbgr8888asbuh1hhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjwubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h(Convert XRGB8888 to XBGR8888 clip bufferh]h(Convert XRGB8888 to XBGR8888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hX=**Parameters** ``struct iosys_map *dst`` Array of XBGR8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for XBGR8888 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubji)}(hhh](jn)}(h@``struct iosys_map *dst`` Array of XBGR8888 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hj=h]hstruct iosys_map *dst}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj7ubj)}(hhh]h)}(h%Array of XBGR8888 destination buffersh]h%Array of XBGR8888 destination buffers}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhMhjSubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jmhjRhMhj4ubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjvh]hconst unsigned int *dst_pitch}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjtubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjpubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj4ubjn)}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj4ubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj4ubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hj4h]hconst struct drm_rect *clip}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj.ubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhjIhMhj4ubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjmh]h#struct drm_format_conv_state *state}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjgubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj4ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXDrivers can use this function for XBGR8888 devices that don't support XRGB8888 natively.h]hZDrivers can use this function for XBGR8888 devices that don’t support XRGB8888 natively.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_xrgb8888_to_bgrx8888 (C function)c.drm_fb_xrgb8888_to_bgrx8888hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_bgrx8888 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_bgrx8888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjahhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjahhhjshMubj)}(hdrm_fb_xrgb8888_to_bgrx8888h]j)}(hdrm_fb_xrgb8888_to_bgrx8888h]hdrm_fb_xrgb8888_to_bgrx8888}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjahhhjshMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjghhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjSmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjNmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_bgrx8888asbuh1hhj*ubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj+)}(hj9h]h*}(hjxhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj*ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjahhhjshMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj]hhhjshMubah}(h]jXah ](jjeh"]h$]h&]jj)jhuh1jhjshMhjZhhubj)}(hhh]h)}(h(Convert XRGB8888 to BGRX8888 clip bufferh]h(Convert XRGB8888 to BGRX8888 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjZhhhjshMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hX=**Parameters** ``struct iosys_map *dst`` Array of BGRX8888 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for BGRX8888 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubji)}(hhh](jn)}(h@``struct iosys_map *dst`` Array of BGRX8888 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(h%Array of BGRX8888 destination buffersh]h%Array of BGRX8888 destination buffers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hj)h]hconst unsigned int *dst_pitch}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj#ubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjBhhhNhNubj%)}(h**dst**h]hdst}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubh9; can be NULL if scanlines are stored next to each other.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj>hMhjubjn)}(h@``const struct iosys_map *src`` Array of XRGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hjuh]hconst struct iosys_map *src}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjoubj)}(hhh]h)}(hArray of XRGB8888 source bufferh]hArray of XRGB8888 source buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hj h]h#struct drm_format_conv_state *state}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj[h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjqhhhNhNubj%)}(h**dst**h]hdst}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubh, }(hjqhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubh and }(hjqhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjqhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubh)}(hXDrivers can use this function for BGRX8888 devices that don't support XRGB8888 natively.h]hZDrivers can use this function for BGRX8888 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_fb_xrgb8888_to_xrgb2101010 (C function) c.drm_fb_xrgb8888_to_xrgb2101010hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_xrgb2101010 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_xrgb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj&hMubj)}(hdrm_fb_xrgb8888_to_xrgb2101010h]j)}(hdrm_fb_xrgb8888_to_xrgb2101010h]hdrm_fb_xrgb8888_to_xrgb2101010}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj&hMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}jj;sb c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjQubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjQubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(hjh]hstruct}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{modnameN classnameNjj)}j]j c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhj<ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj<ubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjRubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjRubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_fb_xrgb8888_to_xrgb2101010asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj&hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj&hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj&hMhj hhubj)}(hhh]h)}(h+Convert XRGB8888 to XRGB2101010 clip bufferh]h+Convert XRGB8888 to XRGB2101010 clip buffer}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj_hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj&hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjzjjzjjjuh1jhhhj2hNhNubj)}(hXt**Parameters** ``struct iosys_map *dst`` Array of XRGB2101010 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for XRGB2101010 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj~ubji)}(hhh](jn)}(hC``struct iosys_map *dst`` Array of XRGB2101010 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(h(Array of XRGB2101010 destination buffersh]h(Array of XRGB2101010 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hj(h]hconst struct iosys_map *src}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj"ubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj>ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj=hMhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjah]h const struct drm_framebuffer *fb}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj[ubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhjwubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhjvhMhjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhj~ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj~ubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hj$hhhNhNubj%)}(h**dst**h]hdst}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubh, }(hj$hhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubh and }(hj$hhhNhNubj%)}(h**src**h]hsrc}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj$hhhNhNubj%)}(h**fb**h]hfb}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj~ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hj{hhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubh2 (i.e. the destination is at the top-left corner).}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj~ubh)}(h[Drivers can use this function for XRGB2101010 devices that don't support XRGB8888 natively.h]h]Drivers can use this function for XRGB2101010 devices that don’t support XRGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj~ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_fb_xrgb8888_to_argb2101010 (C function) c.drm_fb_xrgb8888_to_argb2101010hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_argb2101010 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_argb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_fb_xrgb8888_to_argb2101010h]j)}(hdrm_fb_xrgb8888_to_argb2101010h]hdrm_fb_xrgb8888_to_argb2101010}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj(modnameN classnameNjj)}j]j)}jjsb c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjThhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjvubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]jB c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjXhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jB c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjzubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjzubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDmodnameN classnameNjj)}j]jB c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjnhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jB c.drm_fb_xrgb8888_to_argb2101010asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h+Convert XRGB8888 to ARGB2101010 clip bufferh]h+Convert XRGB8888 to ARGB2101010 clip buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj-jj-jjjuh1jhhhj2hNhNubj)}(hXD**Parameters** ``struct iosys_map *dst`` Array of ARGB2101010 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB2101010 devices that don't support XRGB8888 natively.h](h)}(h**Parameters**h]j%)}(hj7h]h Parameters}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj1ubji)}(hhh](jn)}(hC``struct iosys_map *dst`` Array of ARGB2101010 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjVh]hstruct iosys_map *dst}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjTubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjPubj)}(hhh]h)}(h(Array of ARGB2101010 destination buffersh]h(Array of ARGB2101010 destination buffers}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjlubah}(h]h ]h"]h$]h&]uh1jhjPubeh}(h]h ]h"]h$]h&]uh1jmhjkhMhjMubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjMubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjMubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj*ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj)hMhjMubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjMh]hconst struct drm_rect *clip}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjGubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjcubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjbhMhjMubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM hjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjMubeh}(h]h ]h"]h$]h&]uh1jhhj1ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM"hj1ubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM!hj1ubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hj.hhhNhNubj%)}(h**dst**h]hdst}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubh2 (i.e. the destination is at the top-left corner).}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM'hj1ubh)}(h[Drivers can use this function for ARGB2101010 devices that don't support XRGB8888 natively.h]h]Drivers can use this function for ARGB2101010 devices that don’t support XRGB8888 natively.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM*hj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_fb_xrgb8888_to_gray8 (C function)c.drm_fb_xrgb8888_to_gray8hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_gray8 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_gray8(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjhMBubj)}(hdrm_fb_xrgb8888_to_gray8h]j)}(hdrm_fb_xrgb8888_to_gray8h]hdrm_fb_xrgb8888_to_gray8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjzhhhjhMBubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(hunsignedh]hunsigned}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(hinth]hint}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)ubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(hjh]hstruct}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjlmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray8asbuh1hhj-ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-ubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj!hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjgmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray8asbuh1hhjCubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjCubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjzhhhjhMBubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjvhhhjhMBubah}(h]jqah ](jjeh"]h$]h&]jj)jhuh1jhjhMBhjshhubj)}(hhh]h)}(hConvert XRGB8888 to grayscaleh]hConvert XRGB8888 to grayscale}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMBhjhhubah}(h]h ]h"]h$]h&]uh1jhjshhhjhMBubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hX**Parameters** ``struct iosys_map *dst`` Array of 8-bit grayscale destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). DRM doesn't have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don't support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMFhjubji)}(hhh](jn)}(hG``struct iosys_map *dst`` Array of 8-bit grayscale destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hj h]hstruct iosys_map *dst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMChjubj)}(hhh]h)}(h,Array of 8-bit grayscale destination buffersh]h,Array of 8-bit grayscale destination buffers}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMChjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjBh]hconst unsigned int *dst_pitch}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMEhj<ubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj[hhhNhNubj%)}(h**dst**h]hdst}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubh9; can be NULL if scanlines are stored next to each other.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMDhjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jmhjWhMEhjubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMFhjubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMFhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjh]h const struct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMGhjubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMGhjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMHhjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMHhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMHhjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hj9h]h#struct drm_format_conv_state *state}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMIhj3ubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhMIhjOubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jmhjNhMIhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjth]h Description}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMKhjubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMJhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMPhjubh)}(hXDRM doesn't have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don't support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.h]hXDRM doesn’t have native monochrome or grayscale support. Drivers can use this function for grayscale devices that don’t support XRGB8888 natively.Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. Monochrome drivers will use the most significant bit, where 1 means foreground color and 0 background color. ITU BT.601 is being used for the RGB -> luma (brightness) conversion.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMShjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_fb_argb8888_to_argb4444 (C function)c.drm_fb_argb8888_to_argb4444hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_argb8888_to_argb4444 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_argb8888_to_argb4444(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMnubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhj?hMnubj)}(hdrm_fb_argb8888_to_argb4444h]j)}(hdrm_fb_argb8888_to_argb4444h]hdrm_fb_argb8888_to_argb4444}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubah}(h]h ](jjeh"]h$]h&]jjuh1jhj-hhhj?hMnubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjTsbc.drm_fb_argb8888_to_argb4444asbuh1hhjjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjjubj)}(hdsth]hdst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(hjh]hstruct}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_argb8888_to_argb4444asbuh1hhjUubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjUubj)}(hsrch]hsrc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_argb8888_to_argb4444asbuh1hhjubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjIhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_argb8888_to_argb4444asbuh1hhjkubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjkubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_argb8888_to_argb4444asbuh1hhjubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjDhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubeh}(h]h ]h"]h$]h&]jjuh1jhj-hhhj?hMnubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj)hhhj?hMnubah}(h]j$ah ](jjeh"]h$]h&]jj)jhuh1jhj?hMnhj&hhubj)}(hhh]h)}(h(Convert ARGB8888 to ARGB4444 clip bufferh]h(Convert ARGB8888 to ARGB4444 clip buffer}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMnhjxhhubah}(h]h ]h"]h$]h&]uh1jhj&hhhj?hMnubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj2hNhNubj)}(hX=**Parameters** ``struct iosys_map *dst`` Array of ARGB4444 destination buffers ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of ARGB8888 source buffer ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). Drivers can use this function for ARGB4444 devices that don't support ARGB8888 natively.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMrhjubji)}(hhh](jn)}(h@``struct iosys_map *dst`` Array of ARGB4444 destination buffers h](jt)}(h``struct iosys_map *dst``h]jz)}(hjh]hstruct iosys_map *dst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMohjubj)}(hhh]h)}(h%Array of ARGB4444 destination buffersh]h%Array of ARGB4444 destination buffers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMohjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMohjubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMqhjubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMphj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMqhjubjn)}(h@``const struct iosys_map *src`` Array of ARGB8888 source buffer h](jt)}(h``const struct iosys_map *src``h]jz)}(hjAh]hconst struct iosys_map *src}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMrhj;ubj)}(hhh]h)}(hArray of ARGB8888 source bufferh]hArray of ARGB8888 source buffer}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhMrhjWubah}(h]h ]h"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]uh1jmhjVhMrhjubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hjzh]h const struct drm_framebuffer *fb}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMshjtubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMshjubah}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jmhjhMshjubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjh]hconst struct drm_rect *clip}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMthjubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMthjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMthjubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMuhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMuhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj'h]h Description}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMwhjubh)}(hX_This function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. The parameters }(hj=hhhNhNubj%)}(h**dst**h]hdst}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubh, }(hj=hhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubh and }(hj=hhhNhNubj%)}(h**src**h]hsrc}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj=hhhNhNubj%)}(h**fb**h]hfb}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMvhjubh)}(hbThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner).h](h)This function does not apply clipping on }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 (i.e. the destination is at the top-left corner).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM|hjubh)}(hXDrivers can use this function for ARGB4444 devices that don't support ARGB8888 natively.h]hZDrivers can use this function for ARGB4444 devices that don’t support ARGB8888 natively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_fb_xrgb8888_to_mono (C function)c.drm_fb_xrgb8888_to_monohNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_mono (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_mono(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_fb_xrgb8888_to_monoh]j)}(hdrm_fb_xrgb8888_to_monoh]hdrm_fb_xrgb8888_to_mono}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjAmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_xrgb8888_to_monoasbuh1hhjubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjmhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjGmodnameN classnameNjj)}j]j[c.drm_fb_xrgb8888_to_monoasbuh1hhjubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjqhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j[c.drm_fb_xrgb8888_to_monoasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj]modnameN classnameNjj)}j]j[c.drm_fb_xrgb8888_to_monoasbuh1hhjubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j[c.drm_fb_xrgb8888_to_monoasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hConvert XRGB8888 to monochromeh]hConvert XRGB8888 to monochrome}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj+hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjFjjFjjjuh1jhhhj2hNhNubj)}(hX**Parameters** ``struct iosys_map *dst`` Array of monochrome destination buffers (0=black, 1=white) ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle. DRM doesn't have native monochrome support. Drivers can use this function for monochrome devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format. This function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.h](h)}(h**Parameters**h]j%)}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjJubji)}(hhh](jn)}(hU``struct iosys_map *dst`` Array of monochrome destination buffers (0=black, 1=white) h](jt)}(h``struct iosys_map *dst``h]jz)}(hjoh]hstruct iosys_map *dst}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjiubj)}(hhh]h)}(h:Array of monochrome destination buffers (0=black, 1=white)h]h:Array of monochrome destination buffers (0=black, 1=white)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjfubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjh]hconst unsigned int *dst_pitch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh9; can be NULL if scanlines are stored next to each other.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjfubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hjh]hconst struct iosys_map *src}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjfubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hj-h]h const struct drm_framebuffer *fb}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj'ubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjCubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhjBhMhjfubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hjfh]hconst struct drm_rect *clip}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj`ubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMhj|ubah}(h]h ]h"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]uh1jmhj{hMhjfubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hjh]h#struct drm_format_conv_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjfubeh}(h]h ]h"]h$]h&]uh1jhhjJubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjJubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hjhhhNhNubj%)}(h**dst**h]hdst}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, }(hjhhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**src**h]hsrc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hjhhhNhNubj%)}(h**fb**h]hfb}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjJubh)}(hXThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.h](h)This function does not apply clipping on }(hjGhhhNhNubj%)}(h**dst**h]hdst}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjGubhX (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the first bit (LSB) in the first byte of the monochrome destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjJubh)}(hXDRM doesn't have native monochrome support. Drivers can use this function for monochrome devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h]hX DRM doesn’t have native monochrome support. Drivers can use this function for monochrome devices that don’t support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjJubh)}(hThis function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.h]hThis function uses drm_fb_xrgb8888_to_gray8() to convert to grayscale and then the result is converted from grayscale to monochrome.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_fb_xrgb8888_to_gray2 (C function)c.drm_fb_xrgb8888_to_gray2hNtauh1jxhj2hhhNhNubj)}(hhh](j)}(hvoid drm_fb_xrgb8888_to_gray2 (struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h]j)}(hvoid drm_fb_xrgb8888_to_gray2(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_fb_xrgb8888_to_gray2h]j)}(hdrm_fb_xrgb8888_to_gray2h]hdrm_fb_xrgb8888_to_gray2}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, struct drm_format_conv_state *state)h](j)}(hstruct iosys_map *dsth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsth]hdst}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int *dst_pitchh](j)}(hjUh]hconst}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(hunsignedh]hunsigned}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjQubj)}(h dst_pitchh]h dst_pitch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct iosys_map *srch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hsrch]hsrc}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const struct drm_framebuffer *fbh](j)}(hjUh]hconst}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(hjh]hstruct}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjUubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjUubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjIhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcliph]hclip}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_format_conv_state *stateh](j)}(hjh]hstruct}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_fb_xrgb8888_to_gray2asbuh1hhjkubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjkubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hConvert XRGB8888 to gray2h]hConvert XRGB8888 to gray2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj2hNhNubj)}(hXu**Parameters** ``struct iosys_map *dst`` Array of gray2 destination buffer ``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. ``const struct iosys_map *src`` Array of XRGB8888 source buffers ``const struct drm_framebuffer *fb`` DRM framebuffer ``const struct drm_rect *clip`` Clip rectangle area to copy ``struct drm_format_conv_state *state`` Transform and conversion state **Description** This function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index. This function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle. DRM doesn't have native gray2 support. Drivers can use this function for gray2 devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubji)}(hhh](jn)}(h<``struct iosys_map *dst`` Array of gray2 destination buffer h](jt)}(h``struct iosys_map *dst``h]jz)}(hj1 h]hstruct iosys_map *dst}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj+ ubj)}(hhh]h)}(h!Array of gray2 destination bufferh]h!Array of gray2 destination buffer}(hjJ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjF hMhjG ubah}(h]h ]h"]h$]h&]uh1jhj+ ubeh}(h]h ]h"]h$]h&]uh1jmhjF hMhj( ubjn)}(h``const unsigned int *dst_pitch`` Array of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other. h](jt)}(h!``const unsigned int *dst_pitch``h]jz)}(hjj h]hconst unsigned int *dst_pitch}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjh ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhjd ubj)}(hhh]h)}(hArray of numbers of bytes between the start of two consecutive scanlines within **dst**; can be NULL if scanlines are stored next to each other.h](hPArray of numbers of bytes between the start of two consecutive scanlines within }(hj hhhNhNubj%)}(h**dst**h]hdst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh9; can be NULL if scanlines are stored next to each other.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubah}(h]h ]h"]h$]h&]uh1jhjd ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj( ubjn)}(hA``const struct iosys_map *src`` Array of XRGB8888 source buffers h](jt)}(h``const struct iosys_map *src``h]jz)}(hj h]hconst struct iosys_map *src}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubj)}(hhh]h)}(h Array of XRGB8888 source buffersh]h Array of XRGB8888 source buffers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj( ubjn)}(h5``const struct drm_framebuffer *fb`` DRM framebuffer h](jt)}(h$``const struct drm_framebuffer *fb``h]jz)}(hj h]h const struct drm_framebuffer *fb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubj)}(hhh]h)}(hDRM framebufferh]hDRM framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj( ubjn)}(h<``const struct drm_rect *clip`` Clip rectangle area to copy h](jt)}(h``const struct drm_rect *clip``h]jz)}(hj( h]hconst struct drm_rect *clip}(hj* hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj& ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj" ubj)}(hhh]h)}(hClip rectangle area to copyh]hClip rectangle area to copy}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj= hMhj> ubah}(h]h ]h"]h$]h&]uh1jhj" ubeh}(h]h ]h"]h$]h&]uh1jmhj= hMhj( ubjn)}(hG``struct drm_format_conv_state *state`` Transform and conversion state h](jt)}(h'``struct drm_format_conv_state *state``h]jz)}(hja h]h#struct drm_format_conv_state *state}(hjc hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj[ ubj)}(hhh]h)}(hTransform and conversion stateh]hTransform and conversion state}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjv hMhjw ubah}(h]h ]h"]h$]h&]uh1jhj[ ubeh}(h]h ]h"]h$]h&]uh1jmhjv hMhj( ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubh)}(hXThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters **dst**, **dst_pitch** and **src** refer to arrays. Each array must have at least as many entries as there are planes in **fb**'s format. Each entry stores the value for the format's respective color plane at the same index.h](hThis function copies parts of a framebuffer to display memory and converts the color format during the process. Destination and framebuffer formats must match. The parameters }(hj hhhNhNubj%)}(h**dst**h]hdst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh, }(hj hhhNhNubj%)}(h **dst_pitch**h]h dst_pitch}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh and }(hj hhhNhNubj%)}(h**src**h]hsrc}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubhW refer to arrays. Each array must have at least as many entries as there are planes in }(hj hhhNhNubj%)}(h**fb**h]hfb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubhe’s format. Each entry stores the value for the format’s respective color plane at the same index.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubh)}(hXThis function does not apply clipping on **dst** (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.h](h)This function does not apply clipping on }(hj hhhNhNubj%)}(h**dst**h]hdst}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubhX (i.e. the destination is at the top-left corner). The first pixel (upper left corner of the clip rectangle) will be converted and copied to the two first bits (LSB) in the first byte of the gray2 destination buffer. If the caller requires that the first pixel in a byte must be located at an x-coordinate that is a multiple of 8, then the caller must take care itself of supplying a suitable clip rectangle.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chMhj ubh)}(hDRM doesn't have native gray2 support. Drivers can use this function for gray2 devices that don't support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.h]hXDRM doesn’t have native gray2 support. Drivers can use this function for gray2 devices that don’t support XRGB8888 natively. Such drivers can announce the commonly supported XR24 format to userspace and use this function to convert to the native format.}(hj* hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:134: ./drivers/gpu/drm/drm_format_helper.chM$hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj2hhhNhNubeh}(h]!format-helper-functions-referenceah ]h"]!format helper functions referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h*Framebuffer DMA Helper Functions Referenceh]h*Framebuffer DMA Helper Functions Reference}(hjK hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjH hhhhhKubh)}(hDProvides helper functions for creating a DMA-contiguous framebuffer.h]hDProvides helper functions for creating a DMA-contiguous framebuffer.}(hjY hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:140: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjH hhubh)}(hX+Depending on the platform, the buffers may be physically non-contiguous and mapped through an IOMMU or a similar mechanism, or allocated from physically-contiguous memory (using, for instance, CMA or a pool of memory reserved at early boot). This is handled behind the scenes by the DMA mapping API.h]hX+Depending on the platform, the buffers may be physically non-contiguous and mapped through an IOMMU or a similar mechanism, or allocated from physically-contiguous memory (using, for instance, CMA or a pool of memory reserved at early boot). This is handled behind the scenes by the DMA mapping API.}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:140: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjH hhubh)}(hdrm_gem_fb_create() is used in the :c:type:`drm_mode_config_funcs.fb_create ` callback function to create a DMA-contiguous framebuffer.h](h#drm_gem_fb_create() is used in the }(hjw hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jz)}(hj h]hdrm_mode_config_funcs.fb_create}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:140: ./drivers/gpu/drm/drm_fb_dma_helper.chK"hjw ubh: callback function to create a DMA-contiguous framebuffer.}(hjw hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hK"hjH hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_fb_dma_get_gem_obj (C function)c.drm_fb_dma_get_gem_objhNtauh1jxhjH hhhNhNubj)}(hhh](j)}(hcstruct drm_gem_dma_object * drm_fb_dma_get_gem_obj (struct drm_framebuffer *fb, unsigned int plane)h]j)}(hastruct drm_gem_dma_object *drm_fb_dma_get_gem_obj(struct drm_framebuffer *fb, unsigned int plane)h](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK)ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hK)ubh)}(hhh]j)}(hdrm_gem_dma_objecth]hdrm_gem_dma_object}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jdrm_fb_dma_get_gem_objsbc.drm_fb_dma_get_gem_objasbuh1hhj hhhj hK)ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hK)ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj hhhj hK)ubj)}(hdrm_fb_dma_get_gem_objh]j)}(hj h]hdrm_fb_dma_get_gem_obj}(hj! hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hK)ubj)}(h0(struct drm_framebuffer *fb, unsigned int plane)h](j)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hj< hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8 ubj)}(h h]h }(hjI hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8 ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjZ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\ modnameN classnameNjj)}j]j c.drm_fb_dma_get_gem_objasbuh1hhj8 ubj)}(h h]h }(hjx hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8 ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj8 ubj)}(hfbh]hfb}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8 ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4 ubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hplaneh]hplane}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4 ubeh}(h]h ]h"]h$]h&]jjuh1jhj hhhj hK)ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hK)ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hK)hj hhubj)}(hhh]h)}(h"Get DMA GEM object for framebufferh]h"Get DMA GEM object for framebuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK)hj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hK)ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj& jj& jjjuh1jhhhjH hNhNubj)}(h**Parameters** ``struct drm_framebuffer *fb`` The framebuffer ``unsigned int plane`` Which plane **Description** Return the DMA GEM object for given framebuffer. This function will usually be called from the CRTC callback functions.h](h)}(h**Parameters**h]j%)}(hj0 h]h Parameters}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj. ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK-hj* ubji)}(hhh](jn)}(h/``struct drm_framebuffer *fb`` The framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hjO h]hstruct drm_framebuffer *fb}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjM ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK*hjI ubj)}(hhh]h)}(hThe framebufferh]hThe framebuffer}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjd hK*hje ubah}(h]h ]h"]h$]h&]uh1jhjI ubeh}(h]h ]h"]h$]h&]uh1jmhjd hK*hjF ubjn)}(h#``unsigned int plane`` Which plane h](jt)}(h``unsigned int plane``h]jz)}(hj h]hunsigned int plane}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK+hj ubj)}(hhh]h)}(h Which planeh]h Which plane}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK+hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hK+hjF ubeh}(h]h ]h"]h$]h&]uh1jhhj* ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK-hj* ubh)}(h0Return the DMA GEM object for given framebuffer.h]h0Return the DMA GEM object for given framebuffer.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK,hj* ubh)}(hFThis function will usually be called from the CRTC callback functions.h]hFThis function will usually be called from the CRTC callback functions.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK.hj* ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjH hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_fb_dma_get_gem_addr (C function)c.drm_fb_dma_get_gem_addrhNtauh1jxhjH hhhNhNubj)}(hhh](j)}(hrdma_addr_t drm_fb_dma_get_gem_addr (struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h]j)}(hqdma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h](h)}(hhh]j)}(h dma_addr_th]h dma_addr_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_fb_dma_get_gem_addrsbc.drm_fb_dma_get_gem_addrasbuh1hhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK?ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj;hK?ubj)}(hdrm_fb_dma_get_gem_addrh]j)}(hj8h]hdrm_fb_dma_get_gem_addr}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj;hK?ubj)}(hO(struct drm_framebuffer *fb, struct drm_plane_state *state, unsigned int plane)h](j)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j6c.drm_fb_dma_get_gem_addrasbuh1hhjeubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjaubj)}(hstruct drm_plane_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j6c.drm_fb_dma_get_gem_addrasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjaubj)}(hunsigned int planeh](j)}(hunsignedh]hunsigned}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjaubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj;hK?ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj;hK?ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj;hK?hj hhubj)}(hhh]h)}(hGet DMA (bus) address for framebuffer, for pixel formats where values are grouped in blocks this will get you the beginning of the blockh]hGet DMA (bus) address for framebuffer, for pixel formats where values are grouped in blocks this will get you the beginning of the block}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chK?hjhhubah}(h]h ]h"]h$]h&]uh1jhj hhhj;hK?ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjH hNhNubj)}(hX2**Parameters** ``struct drm_framebuffer *fb`` The framebuffer ``struct drm_plane_state *state`` Which state of drm plane ``unsigned int plane`` Which plane Return the DMA GEM address for given framebuffer. **Description** This function will usually be called from the PLANE callback functions.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKChjubji)}(hhh](jn)}(h/``struct drm_framebuffer *fb`` The framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKBhjubj)}(hhh]h)}(hThe framebufferh]hThe framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKBhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKBhjubjn)}(h;``struct drm_plane_state *state`` Which state of drm plane h](jt)}(h!``struct drm_plane_state *state``h]jz)}(hj%h]hstruct drm_plane_state *state}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKChjubj)}(hhh]h)}(hWhich state of drm planeh]hWhich state of drm plane}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hKChj;ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj:hKChjubjn)}(hU``unsigned int plane`` Which plane Return the DMA GEM address for given framebuffer. h](jt)}(h``unsigned int plane``h]jz)}(hj^h]hunsigned int plane}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKEhjXubj)}(hhh]h)}(h=Which plane Return the DMA GEM address for given framebuffer.h]h=Which plane Return the DMA GEM address for given framebuffer.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKDhjtubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jmhjshKEhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKGhjubh)}(hGThis function will usually be called from the PLANE callback functions.h]hGThis function will usually be called from the PLANE callback functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKFhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjH hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_fb_dma_sync_non_coherent (C function)c.drm_fb_dma_sync_non_coherenthNtauh1jxhjH hhhNhNubj)}(hhh](j)}(h|void drm_fb_dma_sync_non_coherent (struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h]j)}(h{void drm_fb_dma_sync_non_coherent(struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKpubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKpubj)}(hdrm_fb_dma_sync_non_coherenth]j)}(hdrm_fb_dma_sync_non_coherenth]hdrm_fb_dma_sync_non_coherent}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKpubj)}(hZ(struct drm_device *drm, struct drm_plane_state *old_state, struct drm_plane_state *state)h](j)}(hstruct drm_device *drmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j)}jjsbc.drm_fb_dma_sync_non_coherentasbuh1hhjubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdrmh]hdrm}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h!struct drm_plane_state *old_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jVc.drm_fb_dma_sync_non_coherentasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h old_stateh]h old_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_plane_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jVc.drm_fb_dma_sync_non_coherentasbuh1hhjubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjHhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKpubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKpubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKphjhhubj)}(hhh]h)}(h.Sync GEM object to non-coherent backing memoryh]h.Sync GEM object to non-coherent backing memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKphj|hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKpubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjH hNhNubj)}(hX**Parameters** ``struct drm_device *drm`` DRM device ``struct drm_plane_state *old_state`` Old plane state ``struct drm_plane_state *state`` New plane state **Description** This function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane's .atomic_update ensures that all the data in the backing memory have been written to RAM.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKthjubji)}(hhh](jn)}(h&``struct drm_device *drm`` DRM device h](jt)}(h``struct drm_device *drm``h]jz)}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKrhjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKrhjubjn)}(h6``struct drm_plane_state *old_state`` Old plane state h](jt)}(h%``struct drm_plane_state *old_state``h]jz)}(hjh]h!struct drm_plane_state *old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKshjubj)}(hhh]h)}(hOld plane stateh]hOld plane state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKshjubjn)}(h2``struct drm_plane_state *state`` New plane state h](jt)}(h!``struct drm_plane_state *state``h]jz)}(hj2h]hstruct drm_plane_state *state}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKthj,ubj)}(hhh]h)}(hNew plane stateh]hNew plane state}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKthjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhjGhKthjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjmh]h Description}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjkubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKvhjubh)}(hThis function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane's .atomic_update ensures that all the data in the backing memory have been written to RAM.h]hThis function can be used by drivers that use damage clips and have DMA GEM objects backed by non-coherent memory. Calling this function in a plane’s .atomic_update ensures that all the data in the backing memory have been written to RAM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKuhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjH hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_fb_dma_get_scanout_buffer (C function)c.drm_fb_dma_get_scanout_bufferhNtauh1jxhjH hhhNhNubj)}(hhh](j)}(hZint drm_fb_dma_get_scanout_buffer (struct drm_plane *plane, struct drm_scanout_buffer *sb)h]j)}(hYint drm_fb_dma_get_scanout_buffer(struct drm_plane *plane, struct drm_scanout_buffer *sb)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_fb_dma_get_scanout_bufferh]j)}(hdrm_fb_dma_get_scanout_bufferh]hdrm_fb_dma_get_scanout_buffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h8(struct drm_plane *plane, struct drm_scanout_buffer *sb)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_fb_dma_get_scanout_bufferasbuh1hhjubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj;hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hplaneh]hplane}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_scanout_buffer *sbh](j)}(hjh]hstruct}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubh)}(hhh]j)}(hdrm_scanout_bufferh]hdrm_scanout_buffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)c.drm_fb_dma_get_scanout_bufferasbuh1hhj]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj]ubj)}(hsbh]hsb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h)Provide a scanout buffer in case of panich]h)Provide a scanout buffer in case of panic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjH hNhNubj)}(hX**Parameters** ``struct drm_plane *plane`` DRM primary plane ``struct drm_scanout_buffer *sb`` scanout buffer for the panic handler **Return** 0 or negative error code **Description** Generic get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won't call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won't get displayed.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubji)}(hhh](jn)}(h.``struct drm_plane *plane`` DRM primary plane h](jt)}(h``struct drm_plane *plane``h]jz)}(hj#h]hstruct drm_plane *plane}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubj)}(hhh]h)}(hDRM primary planeh]hDRM primary plane}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hKhj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj8hKhjubjn)}(hG``struct drm_scanout_buffer *sb`` scanout buffer for the panic handler h](jt)}(h!``struct drm_scanout_buffer *sb``h]jz)}(hj\h]hstruct drm_scanout_buffer *sb}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjVubj)}(hhh]h)}(h$scanout buffer for the panic handlerh]h$scanout buffer for the panic handler}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhKhjrubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjqhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(h0 or negative error codeh]h0 or negative error code}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:143: ./drivers/gpu/drm/drm_fb_dma_helper.chKhjubh)}(hGeneric get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. It won't call vmap in the panic context, so the driver should make sure the primary plane is vmapped, otherwise the panic screen won't get displayed.h]hGeneric get_scanout_buffer() implementation, for drivers that uses the drm_fb_dma_helper. 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]jah"]h$]h&]uh1jhjfubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(hplaneh]hplane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj|hhhjhK,ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjxhhhjhK,ubah}(h]jsah ](jjeh"]h$]h&]jj)jhuh1jhjhK,hjuhhubj)}(hhh]h)}(h&Get GEM object backing the framebufferh]h&Get GEM object backing the framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK,hjhhubah}(h]h ]h"]h$]h&]uh1jhjuhhhjhK,ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXN**Parameters** ``struct drm_framebuffer *fb`` Framebuffer ``unsigned int plane`` Plane index **Description** No additional reference is taken beyond the one that the :c:type:`drm_frambuffer` already holds. **Return** Pointer to :c:type:`drm_gem_object` for the given framebuffer and plane index or NULL if it does not exist.h](h)}(h**Parameters**h]j%)}(hjh]h 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index}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hK.hj\ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj[hK.hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK0hjubh)}(h`No additional reference is taken beyond the one that the :c:type:`drm_frambuffer` already holds.h](h9No additional reference is taken beyond the one that the }(hjhhhNhNubh)}(h:c:type:`drm_frambuffer`h]jz)}(hjh]hdrm_frambuffer}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_frambufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK/hjubh already holds.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK/hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK2hjubh)}(hkPointer to :c:type:`drm_gem_object` for the given framebuffer and plane index or NULL if it does not exist.h](h Pointer to }(hjhhhNhNubh)}(h:c:type:`drm_gem_object`h]jz)}(hjh]hdrm_gem_object}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_gem_objectuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK3hjubhH for the given framebuffer and plane index or NULL if it does not exist.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK3hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_gem_fb_destroy (C function)c.drm_gem_fb_destroyhNtauh1jxhjhhhNhNubj)}(hhh](j)}(h4void drm_gem_fb_destroy (struct drm_framebuffer *fb)h]j)}(h3void drm_gem_fb_destroy(struct drm_framebuffer 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Drivers can use this as their :c:type:`drm_framebuffer_funcs->destroy ` callback.h](hrFrees a GEM backed framebuffer with its backing buffer(s) and the structure itself. Drivers can use this as their }(hjhhhNhNubh)}(h@:c:type:`drm_framebuffer_funcs->destroy `h]jz)}(hjh]hdrm_framebuffer_funcs->destroy}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chK_hjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK_hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_gem_fb_create_handle (C function)c.drm_gem_fb_create_handlehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hfint drm_gem_fb_create_handle (struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h]j)}(heint drm_gem_fb_create_handle(struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKqubj)}(hdrm_gem_fb_create_handleh]j)}(hdrm_gem_fb_create_handleh]hdrm_gem_fb_create_handle}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKqubj)}(hI(struct drm_framebuffer *fb, struct drm_file *file, unsigned int *handle)h](j)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj4modnameN classnameNjj)}j]j)}jjsbc.drm_gem_fb_create_handleasbuh1hhjubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj`hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hstruct drm_file *fileh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_fileh]hdrm_file}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jNc.drm_gem_fb_create_handleasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfileh]hfile}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hunsigned int *handleh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hhandleh]hhandle}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKqubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKqubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKqhjhhubj)}(hhh]h)}(h(Create handle for GEM backed framebufferh]h(Create handle for GEM backed framebuffer}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKqhjbhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKqubeh}(h]h ](jfunctioneh"]h$]h&]jjjj}jj}jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_framebuffer *fb`` Framebuffer ``struct drm_file *file`` DRM file to register the handle for ``unsigned int *handle`` Pointer to return the created handle **Description** This function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their :c:type:`drm_framebuffer_funcs->create_handle ` callback. The GETFB IOCTL calls into this callback. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKuhjubji)}(hhh](jn)}(h+``struct drm_framebuffer *fb`` Framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hjh]hstruct drm_framebuffer *fb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKrhjubj)}(hhh]h)}(h Framebufferh]h Framebuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKrhjubjn)}(h>``struct drm_file *file`` DRM file to register the handle for h](jt)}(h``struct drm_file *file``h]jz)}(hjh]hstruct drm_file *file}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKshjubj)}(hhh]h)}(h#DRM file to register the handle forh]h#DRM file to register the handle for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKshjubjn)}(h>``unsigned int *handle`` Pointer to return the created handle h](jt)}(h``unsigned int *handle``h]jz)}(hjh]hunsigned int *handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKthjubj)}(hhh]h)}(h$Pointer to return the created handleh]h$Pointer to return the created handle}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKthj.ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj-hKthjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjSh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKvhjubh)}(hThis function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their :c:type:`drm_framebuffer_funcs->create_handle ` callback. The GETFB IOCTL calls into this callback.h](hiThis function creates a handle for the GEM object backing the framebuffer. Drivers can use this as their }(hjihhhNhNubh)}(hF:c:type:`drm_framebuffer_funcs->create_handle `h]jz)}(hjsh]h$drm_framebuffer_funcs->create_handle}(hjuhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKuhjiubh4 callback. The GETFB IOCTL calls into this callback.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKuhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKyhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKzhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_gem_fb_init_with_funcs (C function)c.drm_gem_fb_init_with_funcshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hint drm_gem_fb_init_with_funcs (struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h]j)}(hint drm_gem_fb_init_with_funcs(struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_gem_fb_init_with_funcsh]j)}(hdrm_gem_fb_init_with_funcsh]hdrm_gem_fb_init_with_funcs}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h(struct drm_device *dev, struct drm_framebuffer *fb, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]j)}jjsbc.drm_gem_fb_init_with_funcsasbuh1hhjubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjkhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jYc.drm_gem_fb_init_with_funcsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_file *fileh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_fileh]hdrm_file}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]jYc.drm_gem_fb_init_with_funcsasbuh1hhjubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjKhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfileh]hfile}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h"const struct drm_format_info *infoh](j)}(hjUh]hconst}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(hdrm_format_infoh]hdrm_format_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jYc.drm_gem_fb_init_with_funcsasbuh1hhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(hinfoh]hinfo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj$ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj5 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7 modnameN classnameNjj)}j]jYc.drm_gem_fb_init_with_funcsasbuh1hhjubj)}(h h]h }(hjS hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hja hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmode_cmdh]hmode_cmd}(hjn hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h)const struct drm_framebuffer_funcs *funcsh](j)}(hjUh]hconst}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_framebuffer_funcsh]hdrm_framebuffer_funcs}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jYc.drm_gem_fb_init_with_funcsasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hfuncsh]hfuncs}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(hHelper function for implementing :c:type:`drm_mode_config_funcs.fb_create ` callback in cases when the driver allocates a subclass of struct drm_framebufferh](h!Helper function for implementing }(hj#!hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jz)}(hj-!h]hdrm_mode_config_funcs.fb_create}(hj/!hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj+!ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jYc.drm_gem_fb_init_with_funcsasbjdrm_mode_config_funcsuh1hhjhK,hj#!ubhQ callback in cases when the driver allocates a subclass of struct drm_framebuffer}(hj#!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj !hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjc!jjc!jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_framebuffer *fb`` framebuffer object ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object **Description** This function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting. **Return** Zero or a negative error code.h](h)}(h**Parameters**h]j%)}(hjm!h]h Parameters}(hjo!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjk!ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjg!ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj!h]hstruct drm_device *dev}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj!ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hKhj!ubjn)}(h2``struct drm_framebuffer *fb`` framebuffer object h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hj!h]hstruct drm_framebuffer *fb}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj!ubj)}(hhh]h)}(hframebuffer objecth]hframebuffer object}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hKhj!ubjn)}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](jt)}(h``struct drm_file *file``h]jz)}(hj!h]hstruct drm_file *file}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj!ubj)}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hKhj"ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj"hKhj!ubjn)}(h@``const struct drm_format_info *info`` pixel format information h](jt)}(h&``const struct drm_format_info *info``h]jz)}(hj7"h]h"const struct drm_format_info *info}(hj9"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5"ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj1"ubj)}(hhh]h)}(hpixel format informationh]hpixel format information}(hjP"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjL"hKhjM"ubah}(h]h ]h"]h$]h&]uh1jhj1"ubeh}(h]h ]h"]h$]h&]uh1jmhjL"hKhj!ubjn)}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](jt)}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jz)}(hjp"h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hjr"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjn"ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjj"ubj)}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hKhj"ubah}(h]h ]h"]h$]h&]uh1jhjj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hKhj!ubjn)}(h_``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object h](jt)}(h-``const struct drm_framebuffer_funcs *funcs``h]jz)}(hj"h]h)const struct drm_framebuffer_funcs *funcs}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj"ubj)}(hhh]h)}(h0vtable to be used for the new framebuffer objecth]h0vtable to be used for the new framebuffer object}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hKhj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hKhj!ubeh}(h]h ]h"]h$]h&]uh1jhhjg!ubh)}(h**Description**h]j%)}(hj"h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjg!ubh)}(hXThis function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting.h](h!This function can be used to set }(hj"hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jz)}(hj#h]hdrm_framebuffer_funcs}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj"ubhk for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don’t need to change }(hj"hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jz)}(hj(#h]hdrm_framebuffer_funcs}(hj*#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&#ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebuffer_funcsuh1hhj!#hKhj"ubh. The function does buffer size validation. The buffer size validation is for a general case, though, so users should pay attention to the checks being appropriate for them or, at least, non-conflicting.}(hj"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!#hKhjg!ubh)}(h **Return**h]j%)}(hjQ#h]hReturn}(hjS#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjO#ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjg!ubh)}(hZero or a negative error code.h]hZero or a negative error code.}(hjg#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjg!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_gem_fb_create_with_funcs (C function)c.drm_gem_fb_create_with_funcshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hstruct drm_framebuffer * drm_gem_fb_create_with_funcs (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h]j)}(hstruct drm_framebuffer *drm_gem_fb_create_with_funcs(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hjh]hstruct}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhj#hKubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj#modnameN classnameNjj)}j]j)}jdrm_gem_fb_create_with_funcssbc.drm_gem_fb_create_with_funcsasbuh1hhj#hhhj#hKubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhj#hKubj+)}(hj9h]h*}(hj#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj#hhhj#hKubj)}(hdrm_gem_fb_create_with_funcsh]j)}(hj#h]hdrm_gem_fb_create_with_funcs}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj#hhhj#hKubj)}(h(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, const struct drm_framebuffer_funcs *funcs)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj $ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj $ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj.$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0$modnameN classnameNjj)}j]j#c.drm_gem_fb_create_with_funcsasbuh1hhj $ubj)}(h h]h }(hjL$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj $ubj+)}(hj9h]h*}(hjZ$hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj $ubj)}(hdevh]hdev}(hjg$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj $ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(hstruct drm_file *fileh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|$ubh)}(hhh]j)}(hdrm_fileh]hdrm_file}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj$modnameN classnameNjj)}j]j#c.drm_gem_fb_create_with_funcsasbuh1hhj|$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|$ubj+)}(hj9h]h*}(hj$hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|$ubj)}(hfileh]hfile}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(h"const struct drm_format_info *infoh](j)}(hjUh]hconst}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(hjh]hstruct}(hj %hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubh)}(hhh]j)}(hdrm_format_infoh]hdrm_format_info}(hj)%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+%modnameN classnameNjj)}j]j#c.drm_gem_fb_create_with_funcsasbuh1hhj$ubj)}(h h]h }(hjG%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj+)}(hj9h]h*}(hjU%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj$ubj)}(hinfoh]hinfo}(hjb%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j)}(hjUh]hconst}(hj{%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw%ubj)}(hjh]hstruct}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw%ubh)}(hhh]j)}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj%modnameN classnameNjj)}j]j#c.drm_gem_fb_create_with_funcsasbuh1hhjw%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw%ubj+)}(hj9h]h*}(hj%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjw%ubj)}(hmode_cmdh]hmode_cmd}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(h)const struct drm_framebuffer_funcs *funcsh](j)}(hjUh]hconst}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj)}(hjh]hstruct}(hj!&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj)}(h h]h }(hj.&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubh)}(hhh]j)}(hdrm_framebuffer_funcsh]hdrm_framebuffer_funcs}(hj?&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<&ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjA&modnameN classnameNjj)}j]j#c.drm_gem_fb_create_with_funcsasbuh1hhj&ubj)}(h h]h }(hj]&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj+)}(hj9h]h*}(hjk&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj&ubj)}(hfuncsh]hfuncs}(hjx&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubeh}(h]h ]h"]h$]h&]jjuh1jhj#hhhj#hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj#hhhj#hKubah}(h]j#ah ](jjeh"]h$]h&]jj)jhuh1jhj#hKhj#hhubj)}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hj&hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jz)}(hj&h]hdrm_mode_config_funcs.fb_create}(hj&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j#c.drm_gem_fb_create_with_funcsasbjdrm_mode_config_funcsuh1hhjhK,hj&ubh callback}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj&hhubah}(h]h ]h"]h$]h&]uh1jhj#hhhj#hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj&jj&jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object **Description** This function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j%)}(hj&h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj&ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj 'h]hstruct drm_device *dev}(hj 'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj 'ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj'ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj$'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 'hKhj!'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhj 'hKhj'ubjn)}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](jt)}(h``struct drm_file *file``h]jz)}(hjD'h]hstruct drm_file *file}(hjF'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjB'ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj>'ubj)}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj]'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjY'hKhjZ'ubah}(h]h ]h"]h$]h&]uh1jhj>'ubeh}(h]h ]h"]h$]h&]uh1jmhjY'hKhj'ubjn)}(h@``const struct drm_format_info *info`` pixel format information h](jt)}(h&``const struct drm_format_info *info``h]jz)}(hj}'h]h"const struct drm_format_info *info}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{'ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhjw'ubj)}(hhh]h)}(hpixel format informationh]hpixel format information}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hKhj'ubah}(h]h ]h"]h$]h&]uh1jhjw'ubeh}(h]h ]h"]h$]h&]uh1jmhj'hKhj'ubjn)}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](jt)}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jz)}(hj'h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj'ubj)}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hKhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhj'hKhj'ubjn)}(h_``const struct drm_framebuffer_funcs *funcs`` vtable to be used for the new framebuffer object h](jt)}(h-``const struct drm_framebuffer_funcs *funcs``h]jz)}(hj'h]h)const struct drm_framebuffer_funcs *funcs}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj'ubj)}(hhh]h)}(h0vtable to be used for the new framebuffer objecth]h0vtable to be used for the new framebuffer object}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hKhj(ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhj(hKhj'ubeh}(h]h ]h"]h$]h&]uh1jhhj&ubh)}(h**Description**h]j%)}(hj*(h]h Description}(hj,(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj((ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj&ubh)}(hThis function can be used to set :c:type:`drm_framebuffer_funcs` for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don't need to change :c:type:`drm_framebuffer_funcs`. The function does buffer size validation.h](h!This function can be used to set }(hj@(hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jz)}(hjJ(h]hdrm_framebuffer_funcs}(hjL(hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjH(ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebuffer_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj@(ubhk for drivers that need custom framebuffer callbacks. Use drm_gem_fb_create() if you don’t need to change }(hj@(hhhNhNubh)}(h:c:type:`drm_framebuffer_funcs`h]jz)}(hjn(h]hdrm_framebuffer_funcs}(hjp(hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjl(ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebuffer_funcsuh1hhjg(hKhj@(ubh+. The function does buffer size validation.}(hj@(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjg(hKhj&ubh)}(h **Return**h]j%)}(hj(h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj&ubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hj(hhhNhNubh)}(h:c:type:`drm_framebuffer`h]jz)}(hj(h]hdrm_framebuffer}(hj(hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj(ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chKhj(ubh+ on success or an error pointer on failure.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(hKhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_gem_fb_create (C function)c.drm_gem_fb_createhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hstruct drm_framebuffer * drm_gem_fb_create (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h]j)}(hstruct drm_framebuffer *drm_gem_fb_create(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hjh]hstruct}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj)}(h h]h }(hj )hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhj )hMubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj )modnameN classnameNjj)}j]j)}jdrm_gem_fb_createsbc.drm_gem_fb_createasbuh1hhj(hhhj )hMubj)}(h h]h }(hj?)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhj )hMubj+)}(hj9h]h*}(hjM)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj(hhhj )hMubj)}(hdrm_gem_fb_createh]j)}(hj<)h]hdrm_gem_fb_create}(hj^)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ)ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj(hhhj )hMubj)}(h|(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjy)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju)ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j:)c.drm_gem_fb_createasbuh1hhju)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju)ubj+)}(hj9h]h*}(hj)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hju)ubj)}(hdevh]hdev}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjq)ubj)}(hstruct drm_file *fileh](j)}(hjh]hstruct}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubh)}(hhh]j)}(hdrm_fileh]hdrm_file}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj *modnameN classnameNjj)}j]j:)c.drm_gem_fb_createasbuh1hhj)ubj)}(h h]h }(hj%*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj+)}(hj9h]h*}(hj3*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)ubj)}(hfileh]hfile}(hj@*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjq)ubj)}(h"const struct drm_format_info *infoh](j)}(hjUh]hconst}(hjY*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjU*ubj)}(h h]h }(hjf*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjU*ubj)}(hjh]hstruct}(hjt*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjU*ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjU*ubh)}(hhh]j)}(hdrm_format_infoh]hdrm_format_info}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]j:)c.drm_gem_fb_createasbuh1hhjU*ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjU*ubj+)}(hj9h]h*}(hj*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjU*ubj)}(hinfoh]hinfo}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjU*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjq)ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j)}(hjUh]hconst}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(hjh]hstruct}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj +hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j:)c.drm_gem_fb_createasbuh1hhj*ubj)}(h h]h }(hj;+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj+)}(hj9h]h*}(hjI+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj*ubj)}(hmode_cmdh]hmode_cmd}(hjV+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjq)ubeh}(h]h ]h"]h$]h&]jjuh1jhj(hhhj )hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj(hhhj )hMubah}(h]j(ah ](jjeh"]h$]h&]jj)jhuh1jhj )hMhj(hhubj)}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hj+hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jz)}(hj+h]hdrm_mode_config_funcs.fb_create}(hj+hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j:)c.drm_gem_fb_createasbjdrm_mode_config_funcsuh1hhjhK,hj+ubh callback}(hj+hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj}+hhubah}(h]h ]h"]h$]h&]uh1jhj(hhhj )hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request **Description** This function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. If your hardware has special alignment or pitch requirements these should be checked before calling this function. The function does buffer size validation. Use drm_gem_fb_create_with_dirty() if you need framebuffer flushing. Drivers can use this as their :c:type:`drm_mode_config_funcs.fb_create ` callback. The ADDFB2 IOCTL calls into this callback. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j%)}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj+ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hj+ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj+h]hstruct drm_device *dev}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj+ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhj+hMhj+ubjn)}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](jt)}(h``struct drm_file *file``h]jz)}(hj",h]hstruct drm_file *file}(hj$,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ,ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj,ubj)}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj;,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7,hMhj8,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhj7,hMhj+ubjn)}(h@``const struct drm_format_info *info`` pixel format information h](jt)}(h&``const struct drm_format_info *info``h]jz)}(hj[,h]h"const struct drm_format_info *info}(hj],hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjY,ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hjU,ubj)}(hhh]h)}(hpixel format informationh]hpixel format information}(hjt,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjp,hM hjq,ubah}(h]h ]h"]h$]h&]uh1jhjU,ubeh}(h]h ]h"]h$]h&]uh1jmhjp,hM hj+ubjn)}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](jt)}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jz)}(hj,h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hj,ubj)}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hM hj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhj,hM hj+ubeh}(h]h ]h"]h$]h&]uh1jhhj+ubh)}(h**Description**h]j%)}(hj,h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM hj+ubh)}(hThis function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer.h](h` callback. The ADDFB2 IOCTL calls into this callback.h](hDrivers can use this as their }(hj&-hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jz)}(hj0-h]hdrm_mode_config_funcs.fb_create}(hj2-hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj.-ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj&-ubh5 callback. The ADDFB2 IOCTL calls into this callback.}(hj&-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjM-hMhj+ubh)}(h **Return**h]j%)}(hjZ-h]hReturn}(hj\-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX-ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj+ubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hjp-hhhNhNubh)}(h:c:type:`drm_framebuffer`h]jz)}(hjz-h]hdrm_framebuffer}(hj|-hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjx-ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjp-ubh+ on success or an error pointer on failure.}(hjp-hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj-hMhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_gem_fb_create_with_dirty (C function)c.drm_gem_fb_create_with_dirtyhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hstruct drm_framebuffer * drm_gem_fb_create_with_dirty (struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h]j)}(hstruct drm_framebuffer *drm_gem_fb_create_with_dirty(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hjh]hstruct}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM,ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhj-hM,ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj-modnameN classnameNjj)}j]j)}jdrm_gem_fb_create_with_dirtysbc.drm_gem_fb_create_with_dirtyasbuh1hhj-hhhj-hM,ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhj-hM,ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-hhhj-hM,ubj)}(hdrm_gem_fb_create_with_dirtyh]j)}(hj-h]hdrm_gem_fb_create_with_dirty}(hj!.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj-hhhj-hM,ubj)}(h|(struct drm_device *dev, struct drm_file *file, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj<.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8.ubj)}(h h]h }(hjI.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8.ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjZ.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\.modnameN classnameNjj)}j]j-c.drm_gem_fb_create_with_dirtyasbuh1hhj8.ubj)}(h h]h }(hjx.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8.ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj8.ubj)}(hdevh]hdev}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4.ubj)}(hstruct drm_file *fileh](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hdrm_fileh]hdrm_file}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j-c.drm_gem_fb_create_with_dirtyasbuh1hhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj.ubj)}(hfileh]hfile}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4.ubj)}(h"const struct drm_format_info *infoh](j)}(hjUh]hconst}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj)/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(hjh]hstruct}(hj7/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hjD/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(hdrm_format_infoh]hdrm_format_info}(hjU/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjR/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjW/modnameN classnameNjj)}j]j-c.drm_gem_fb_create_with_dirtyasbuh1hhj/ubj)}(h h]h }(hjs/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj)}(hinfoh]hinfo}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4.ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j)}(hjUh]hconst}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/modnameN classnameNjj)}j]j-c.drm_gem_fb_create_with_dirtyasbuh1hhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj+)}(hj9h]h*}(hj 0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj)}(hmode_cmdh]hmode_cmd}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4.ubeh}(h]h ]h"]h$]h&]jjuh1jhj-hhhj-hM,ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj-hhhj-hM,ubah}(h]j-ah ](jjeh"]h$]h&]jj)jhuh1jhj-hM,hj-hhubj)}(hhh]h)}(hbHelper function for the :c:type:`drm_mode_config_funcs.fb_create ` callbackh](hHelper function for the }(hjC0hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jz)}(hjM0h]hdrm_mode_config_funcs.fb_create}(hjO0hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjK0ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j-c.drm_gem_fb_create_with_dirtyasbjdrm_mode_config_funcsuh1hhjhK,hjC0ubh callback}(hjC0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM,hj@0hhubah}(h]h ]h"]h$]h&]uh1jhj-hhhj-hM,ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj0jj0jjjuh1jhhhjhNhNubj)}(hXU**Parameters** ``struct drm_device *dev`` DRM device ``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request **Description** This function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. drm_atomic_helper_dirtyfb() is used for the dirty callback giving framebuffer flushing through the atomic machinery. Use drm_gem_fb_create() if you don't need the dirty callback. The function does buffer size validation. Drivers should also call drm_plane_enable_fb_damage_clips() on all planes to enable userspace to use damage clips also with the ATOMIC IOCTL. Drivers can use this as their :c:type:`drm_mode_config_funcs.fb_create ` callback. The ADDFB2 IOCTL calls into this callback. **Return** Pointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h)}(h**Parameters**h]j%)}(hj0h]h Parameters}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM0hj0ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj0h]hstruct drm_device *dev}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM.hj0ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM.hj0ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhj0hM.hj0ubjn)}(hX``struct drm_file *file`` DRM file that holds the GEM handle(s) backing the framebuffer h](jt)}(h``struct drm_file *file``h]jz)}(hj0h]hstruct drm_file *file}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM/hj0ubj)}(hhh]h)}(h=DRM file that holds the GEM handle(s) backing the framebufferh]h=DRM file that holds the GEM handle(s) backing the framebuffer}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM/hj0ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhj0hM/hj0ubjn)}(h@``const struct drm_format_info *info`` pixel format information h](jt)}(h&``const struct drm_format_info *info``h]jz)}(hj1h]h"const struct drm_format_info *info}(hj 1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM0hj1ubj)}(hhh]h)}(hpixel format informationh]hpixel format information}(hj71hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj31hM0hj41ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhj31hM0hj0ubjn)}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](jt)}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jz)}(hjW1h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hjY1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjU1ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM1hjQ1ubj)}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hjp1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjl1hM1hjm1ubah}(h]h ]h"]h$]h&]uh1jhjQ1ubeh}(h]h ]h"]h$]h&]uh1jmhjl1hM1hj0ubeh}(h]h ]h"]h$]h&]uh1jhhj0ubh)}(h**Description**h]j%)}(hj1h]h Description}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM3hj0ubh)}(hXThis function creates a new framebuffer object described by :c:type:`drm_mode_fb_cmd2`. This description includes handles for the buffer(s) backing the framebuffer. drm_atomic_helper_dirtyfb() is used for the dirty callback giving framebuffer flushing through the atomic machinery. Use drm_gem_fb_create() if you don't need the dirty callback. The function does buffer size validation.h](h` callback. The ADDFB2 IOCTL calls into this callback.h](hDrivers can use this as their }(hj1hhhNhNubh)}(hA:c:type:`drm_mode_config_funcs.fb_create `h]jz)}(hj1h]hdrm_mode_config_funcs.fb_create}(hj1hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM<hj1ubh5 callback. The ADDFB2 IOCTL calls into this callback.}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj2hM<hj0ubh)}(h **Return**h]j%)}(hj2h]hReturn}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM?hj0ubh)}(hQPointer to a :c:type:`drm_framebuffer` on success or an error pointer on failure.h](h Pointer to a }(hj32hhhNhNubh)}(h:c:type:`drm_framebuffer`h]jz)}(hj=2h]hdrm_framebuffer}(hj?2hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj;2ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_framebufferuh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM@hj32ubh+ on success or an error pointer on failure.}(hj32hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZ2hM@hj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_gem_fb_vmap (C function)c.drm_gem_fb_vmaphNtauh1jxhjhhhNhNubj)}(hhh](j)}(h_int drm_gem_fb_vmap (struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h]j)}(h^int drm_gem_fb_vmap(struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h](j)}(hinth]hint}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhj2hMNubj)}(hdrm_gem_fb_vmaph]j)}(hdrm_gem_fb_vmaph]hdrm_gem_fb_vmap}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj2hhhj2hMNubj)}(hK(struct drm_framebuffer *fb, struct iosys_map *map, struct iosys_map *data)h](j)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj2modnameN classnameNjj)}j]j)}jj2sbc.drm_gem_fb_vmapasbuh1hhj2ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj+)}(hj9h]h*}(hj3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj2ubj)}(hfbh]hfb}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubj)}(hstruct iosys_map *maph](j)}(hjh]hstruct}(hj43hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj03ubj)}(h h]h }(hjA3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj03ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjR3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO3ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjT3modnameN classnameNjj)}j]j2c.drm_gem_fb_vmapasbuh1hhj03ubj)}(h h]h }(hjp3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj03ubj+)}(hj9h]h*}(hj~3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj03ubj)}(hmaph]hmap}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj03ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubj)}(hstruct iosys_map *datah](j)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj3modnameN classnameNjj)}j]j2c.drm_gem_fb_vmapasbuh1hhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj+)}(hj9h]h*}(hj3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3ubj)}(hdatah]hdata}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubeh}(h]h ]h"]h$]h&]jjuh1jhj2hhhj2hMNubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj}2hhhj2hMNubah}(h]jx2ah ](jjeh"]h$]h&]jj)jhuh1jhj2hMNhjz2hhubj)}(hhh]h)}(h2maps all framebuffer BOs into kernel address spaceh]h2maps all framebuffer BOs into kernel address space}(hj%4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNhj"4hhubah}(h]h ]h"]h$]h&]uh1jhjz2hhhj2hMNubeh}(h]h ](jfunctioneh"]h$]h&]jjjj=4jj=4jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``struct iosys_map *map`` returns the mapping's address for each BO ``struct iosys_map *data`` returns the data address for each BO, can be NULL **Description** This function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically. Callers that want to access a BO's stored data should pass **data**. The argument returns the addresses of the data stored in each BO. This is different from **map** if the framebuffer's offsets field is non-zero. Both, **map** and **data**, must each refer to arrays with at least fb->format->num_planes elements. See drm_gem_fb_vunmap() for unmapping. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j%)}(hjG4h]h Parameters}(hjI4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjE4ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMRhjA4ubji)}(hhh](jn)}(h/``struct drm_framebuffer *fb`` the framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hjf4h]hstruct drm_framebuffer *fb}(hjh4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjd4ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMOhj`4ubj)}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{4hMOhj|4ubah}(h]h ]h"]h$]h&]uh1jhj`4ubeh}(h]h ]h"]h$]h&]uh1jmhj{4hMOhj]4ubjn)}(hD``struct iosys_map *map`` returns the mapping's address for each BO h](jt)}(h``struct iosys_map *map``h]jz)}(hj4h]hstruct iosys_map *map}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMPhj4ubj)}(hhh]h)}(h)returns the mapping's address for each BOh]h+returns the mapping’s address for each BO}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMPhj4ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhj4hMPhj]4ubjn)}(hM``struct iosys_map *data`` returns the data address for each BO, can be NULL h](jt)}(h``struct iosys_map *data``h]jz)}(hj4h]hstruct iosys_map *data}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMQhj4ubj)}(hhh]h)}(h1returns the data address for each BO, can be NULLh]h1returns the data address for each BO, can be NULL}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMQhj4ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhj4hMQhj]4ubeh}(h]h ]h"]h$]h&]uh1jhhjA4ubh)}(h**Description**h]j%)}(hj5h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMShjA4ubh)}(hThis function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically.h]hThis function maps all buffer objects of the given framebuffer into kernel address space and stores them in struct iosys_map. If the mapping operation fails for one of the BOs, the function unmaps the already established mappings automatically.}(hj)5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMRhjA4ubh)}(hCallers that want to access a BO's stored data should pass **data**. The argument returns the addresses of the data stored in each BO. This is different from **map** if the framebuffer's offsets field is non-zero.h](h=Callers that want to access a BO’s stored data should pass }(hj85hhhNhNubj%)}(h**data**h]hdata}(hj@5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj85ubh[. The argument returns the addresses of the data stored in each BO. This is different from }(hj85hhhNhNubj%)}(h**map**h]hmap}(hjR5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj85ubh2 if the framebuffer’s offsets field is non-zero.}(hj85hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMWhjA4ubh)}(hdBoth, **map** and **data**, must each refer to arrays with at least fb->format->num_planes elements.h](hBoth, }(hjk5hhhNhNubj%)}(h**map**h]hmap}(hjs5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjk5ubh and }(hjk5hhhNhNubj%)}(h**data**h]hdata}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjk5ubhJ, must each refer to arrays with at least fb->format->num_planes elements.}(hjk5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM[hjA4ubh)}(h&See drm_gem_fb_vunmap() for unmapping.h]h&See drm_gem_fb_vunmap() for unmapping.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM^hjA4ubh)}(h **Return**h]j%)}(hj5h]hReturn}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chM`hjA4ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMahjA4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_gem_fb_vunmap (C function)c.drm_gem_fb_vunmaphNtauh1jxhjhhhNhNubj)}(hhh](j)}(hJvoid drm_gem_fb_vunmap (struct drm_framebuffer *fb, struct iosys_map *map)h]j)}(hIvoid drm_gem_fb_vunmap(struct drm_framebuffer *fb, struct iosys_map *map)h](j)}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhj6hMubj)}(hdrm_gem_fb_vunmaph]j)}(hdrm_gem_fb_vunmaph]hdrm_gem_fb_vunmap}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj5hhhj6hMubj)}(h3(struct drm_framebuffer *fb, struct iosys_map *map)h](j)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hj16hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-6ubj)}(h h]h }(hj>6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-6ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjO6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQ6modnameN classnameNjj)}j]j)}jj6sbc.drm_gem_fb_vunmapasbuh1hhj-6ubj)}(h h]h }(hjo6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-6ubj+)}(hj9h]h*}(hj}6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-6ubj)}(hfbh]hfb}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)6ubj)}(hstruct iosys_map *maph](j)}(hjh]hstruct}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj6modnameN classnameNjj)}j]jk6c.drm_gem_fb_vunmapasbuh1hhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hj6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hmaph]hmap}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)6ubeh}(h]h ]h"]h$]h&]jjuh1jhj5hhhj6hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj5hhhj6hMubah}(h]j5ah ](jjeh"]h$]h&]jj)jhuh1jhj6hMhj5hhubj)}(hhh]h)}(h0unmaps framebuffer BOs from kernel address spaceh]h0unmaps framebuffer BOs from kernel address space}(hj$7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj!7hhubah}(h]h ]h"]h$]h&]uh1jhj5hhhj6hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj<7jj<7jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``struct iosys_map *map`` mapping addresses as returned by drm_gem_fb_vmap() **Description** This function unmaps all buffer objects of the given framebuffer. See drm_gem_fb_vmap() for more information.h](h)}(h**Parameters**h]j%)}(hjF7h]h Parameters}(hjH7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjD7ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj@7ubji)}(hhh](jn)}(h/``struct drm_framebuffer *fb`` the framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hje7h]hstruct drm_framebuffer *fb}(hjg7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjc7ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj_7ubj)}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj~7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz7hMhj{7ubah}(h]h ]h"]h$]h&]uh1jhj_7ubeh}(h]h ]h"]h$]h&]uh1jmhjz7hMhj\7ubjn)}(hM``struct iosys_map *map`` mapping addresses as returned by drm_gem_fb_vmap() h](jt)}(h``struct iosys_map *map``h]jz)}(hj7h]hstruct iosys_map *map}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj7ubj)}(hhh]h)}(h2mapping addresses as returned by drm_gem_fb_vmap()h]h2mapping addresses as returned by drm_gem_fb_vmap()}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj7ubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jmhj7hMhj\7ubeh}(h]h ]h"]h$]h&]uh1jhhj@7ubh)}(h**Description**h]j%)}(hj7h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj@7ubh)}(hAThis function unmaps all buffer objects of the given framebuffer.h]hAThis function unmaps all buffer objects of the given framebuffer.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj@7ubh)}(h+See drm_gem_fb_vmap() for more information.h]h+See drm_gem_fb_vmap() for more information.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj@7ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_gem_fb_begin_cpu_access (C function)c.drm_gem_fb_begin_cpu_accesshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hYint drm_gem_fb_begin_cpu_access (struct drm_framebuffer *fb, enum dma_data_direction dir)h]j)}(hXint drm_gem_fb_begin_cpu_access(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hinth]hint}(hj-8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)8hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj)}(h h]h }(hj<8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)8hhhj;8hMubj)}(hdrm_gem_fb_begin_cpu_accessh]j)}(hdrm_gem_fb_begin_cpu_accessh]hdrm_gem_fb_begin_cpu_access}(hjN8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ8ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj)8hhhj;8hMubj)}(h9(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf8ubj)}(h h]h }(hjw8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf8ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj8modnameN classnameNjj)}j]j)}jjP8sbc.drm_gem_fb_begin_cpu_accessasbuh1hhjf8ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf8ubj+)}(hj9h]h*}(hj8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjf8ubj)}(hfbh]hfb}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf8ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjb8ubj)}(henum dma_data_direction dirh](j)}(henumh]henum}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubh)}(hhh]j)}(hdma_data_directionh]hdma_data_direction}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj8modnameN classnameNjj)}j]j8c.drm_gem_fb_begin_cpu_accessasbuh1hhj8ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj)}(hdirh]hdir}(hj'9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjb8ubeh}(h]h ]h"]h$]h&]jjuh1jhj)8hhhj;8hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj%8hhhj;8hMubah}(h]j 8ah ](jjeh"]h$]h&]jj)jhuh1jhj;8hMhj"8hhubj)}(hhh]h)}(h*prepares GEM buffer objects for CPU accessh]h*prepares GEM buffer objects for CPU access}(hjQ9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjN9hhubah}(h]h ]h"]h$]h&]uh1jhj"8hhhj;8hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjji9jji9jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``enum dma_data_direction dir`` access mode **Description** Prepares a framebuffer's GEM buffer objects for CPU access. This function must be called before accessing the BO data within the kernel. For imported BOs, the function calls dma_buf_begin_cpu_access(). See drm_gem_fb_end_cpu_access() for signalling the end of CPU access. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j%)}(hjs9h]h Parameters}(hju9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjq9ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjm9ubji)}(hhh](jn)}(h/``struct drm_framebuffer *fb`` the framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hj9h]hstruct drm_framebuffer *fb}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj9ubj)}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhj9hMhj9ubjn)}(h,``enum dma_data_direction dir`` access mode h](jt)}(h``enum dma_data_direction dir``h]jz)}(hj9h]henum dma_data_direction dir}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj9ubj)}(hhh]h)}(h access modeh]h access mode}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj9ubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhj9hMhj9ubeh}(h]h ]h"]h$]h&]uh1jhhjm9ubh)}(h**Description**h]j%)}(hj:h]h Description}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjm9ubh)}(hPrepares a framebuffer's GEM buffer objects for CPU access. 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For imported BOs, the function calls dma_buf_begin_cpu_access().}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjm9ubh)}(hESee drm_gem_fb_end_cpu_access() for signalling the end of CPU access.h]hESee drm_gem_fb_end_cpu_access() for signalling the end of CPU access.}(hj+:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjm9ubh)}(h **Return**h]j%)}(hj<:h]hReturn}(hj>:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj::ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjm9ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hjR:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhjm9ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_gem_fb_end_cpu_access (C function)c.drm_gem_fb_end_cpu_accesshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hXvoid drm_gem_fb_end_cpu_access (struct drm_framebuffer *fb, enum dma_data_direction dir)h]j)}(hWvoid drm_gem_fb_end_cpu_access(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hvoidh]hvoid}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}:hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}:hhhj:hMubj)}(hdrm_gem_fb_end_cpu_accessh]j)}(hdrm_gem_fb_end_cpu_accessh]hdrm_gem_fb_end_cpu_access}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj}:hhhj:hMubj)}(h9(struct drm_framebuffer *fb, enum dma_data_direction dir)h](j)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj:modnameN classnameNjj)}j]j)}jj:sbc.drm_gem_fb_end_cpu_accessasbuh1hhj:ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj+)}(hj9h]h*}(hj ;hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:ubj)}(hfbh]hfb}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj:ubj)}(henum dma_data_direction dirh](j)}(hj8h]henum}(hj0;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,;ubj)}(h h]h }(hj=;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,;ubh)}(hhh]j)}(hdma_data_directionh]hdma_data_direction}(hjN;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjK;ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjP;modnameN classnameNjj)}j]j:c.drm_gem_fb_end_cpu_accessasbuh1hhj,;ubj)}(h h]h }(hjl;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,;ubj)}(hdirh]hdir}(hjz;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj:ubeh}(h]h ]h"]h$]h&]jjuh1jhj}:hhhj:hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjy:hhhj:hMubah}(h]jt:ah ](jjeh"]h$]h&]jj)jhuh1jhj:hMhjv:hhubj)}(hhh]h)}(h/signals end of CPU access to GEM buffer objectsh]h/signals end of CPU access to GEM buffer objects}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj;hhubah}(h]h ]h"]h$]h&]uh1jhjv:hhhj:hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj;jj;jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_framebuffer *fb`` the framebuffer ``enum dma_data_direction dir`` access mode **Description** Signals the end of CPU access to the given framebuffer's GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access(). See also drm_gem_fb_begin_cpu_access().h](h)}(h**Parameters**h]j%)}(hj;h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj;ubji)}(hhh](jn)}(h/``struct drm_framebuffer *fb`` the framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hj;h]hstruct drm_framebuffer *fb}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj;ubj)}(hhh]h)}(hthe framebufferh]hthe framebuffer}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]uh1jmhj;hMhj;ubjn)}(h,``enum dma_data_direction dir`` access mode h](jt)}(h``enum dma_data_direction dir``h]jz)}(hj<h]henum dma_data_direction dir}(hj <hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj<ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj<ubj)}(hhh]h)}(h access modeh]h access mode}(hj7<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3<hMhj4<ubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jmhj3<hMhj;ubeh}(h]h ]h"]h$]h&]uh1jhhj;ubh)}(h**Description**h]j%)}(hjY<h]h Description}(hj[<hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjW<ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj;ubh)}(hSignals the end of CPU access to the given framebuffer's GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access().h]hSignals the end of CPU access to the given framebuffer’s GEM buffer objects. This function must be paired with a corresponding call to drm_gem_fb_begin_cpu_access(). For imported BOs, the function calls dma_buf_end_cpu_access().}(hjo<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj;ubh)}(h'See also drm_gem_fb_begin_cpu_access().h]h'See also drm_gem_fb_begin_cpu_access().}(hj~<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMhj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_gem_fb_afbc_init (C function)c.drm_gem_fb_afbc_inithNtauh1jxhjhhhNhNubj)}(hhh](j)}(hint drm_gem_fb_afbc_init (struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h]j)}(hint drm_gem_fb_afbc_init(struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h](j)}(hinth]hint}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMEubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<hhhj<hMEubj)}(hdrm_gem_fb_afbc_inith]j)}(hdrm_gem_fb_afbc_inith]hdrm_gem_fb_afbc_init}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj<hhhj<hMEubj)}(h(struct drm_device *dev, const struct drm_format_info *info, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_afbc_framebuffer *afbc_fb)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj =modnameN classnameNjj)}j]j)}jj<sbc.drm_gem_fb_afbc_initasbuh1hhj<ubj)}(h h]h }(hj(=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj+)}(hj9h]h*}(hj6=hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj<ubj)}(hdevh]hdev}(hjC=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj<ubj)}(h"const struct drm_format_info *infoh](j)}(hjUh]hconst}(hj\=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX=ubj)}(h h]h }(hji=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX=ubj)}(hjh]hstruct}(hjw=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX=ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX=ubh)}(hhh]j)}(hdrm_format_infoh]hdrm_format_info}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj=modnameN classnameNjj)}j]j$=c.drm_gem_fb_afbc_initasbuh1hhjX=ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX=ubj+)}(hj9h]h*}(hj=hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjX=ubj)}(hinfoh]hinfo}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjX=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj<ubj)}(h'const struct drm_mode_fb_cmd2 *mode_cmdh](j)}(hjUh]hconst}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(hjh]hstruct}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(hdrm_mode_fb_cmd2h]hdrm_mode_fb_cmd2}(hj >hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj">modnameN classnameNjj)}j]j$=c.drm_gem_fb_afbc_initasbuh1hhj=ubj)}(h h]h }(hj>>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj+)}(hj9h]h*}(hjL>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=ubj)}(hmode_cmdh]hmode_cmd}(hjY>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj<ubj)}(h$struct drm_afbc_framebuffer *afbc_fbh](j)}(hjh]hstruct}(hjr>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn>ubh)}(hhh]j)}(hdrm_afbc_framebufferh]hdrm_afbc_framebuffer}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj>modnameN classnameNjj)}j]j$=c.drm_gem_fb_afbc_initasbuh1hhjn>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn>ubj+)}(hj9h]h*}(hj>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjn>ubj)}(hafbc_fbh]hafbc_fb}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj<ubeh}(h]h ]h"]h$]h&]jjuh1jhj<hhhj<hMEubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj<hhhj<hMEubah}(h]j<ah ](jjeh"]h$]h&]jj)jhuh1jhj<hMEhj<hhubj)}(hhh]h)}(huHelper function for drivers using afbc to fill and validate all the afbc-specific struct drm_afbc_framebuffer membersh]huHelper function for drivers using afbc to fill and validate all the afbc-specific struct drm_afbc_framebuffer members}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMEhj>hhubah}(h]h ]h"]h$]h&]uh1jhj<hhhj<hMEubeh}(h]h ](jfunctioneh"]h$]h&]jjjj ?jj ?jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device ``const struct drm_format_info *info`` pixel format information ``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request ``struct drm_afbc_framebuffer *afbc_fb`` afbc framebuffer **Description** This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller's responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful. **Return** Zero on success or a negative error value on failure.h](h)}(h**Parameters**h]j%)}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMIhj?ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj4?h]hstruct drm_device *dev}(hj6?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2?ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMIhj.?ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjM?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI?hMIhjJ?ubah}(h]h ]h"]h$]h&]uh1jhj.?ubeh}(h]h ]h"]h$]h&]uh1jmhjI?hMIhj+?ubjn)}(h@``const struct drm_format_info *info`` pixel format information h](jt)}(h&``const struct drm_format_info *info``h]jz)}(hjm?h]h"const struct drm_format_info *info}(hjo?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjk?ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMKhjg?ubj)}(hhh]h)}(hpixel format informationh]hpixel format information}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMKhj?ubah}(h]h ]h"]h$]h&]uh1jhjg?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMKhj+?ubjn)}(he``const struct drm_mode_fb_cmd2 *mode_cmd`` Metadata from the userspace framebuffer creation request h](jt)}(h+``const struct drm_mode_fb_cmd2 *mode_cmd``h]jz)}(hj?h]h'const struct drm_mode_fb_cmd2 *mode_cmd}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMLhj?ubj)}(hhh]h)}(h8Metadata from the userspace framebuffer creation requesth]h8Metadata from the userspace framebuffer creation request}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMLhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMLhj+?ubjn)}(h:``struct drm_afbc_framebuffer *afbc_fb`` afbc framebuffer h](jt)}(h(``struct drm_afbc_framebuffer *afbc_fb``h]jz)}(hj?h]h$struct drm_afbc_framebuffer *afbc_fb}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMMhj?ubj)}(hhh]h)}(hafbc framebufferh]hafbc framebuffer}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMMhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMMhj+?ubeh}(h]h ]h"]h$]h&]uh1jhhj?ubh)}(h**Description**h]j%)}(hj@h]h Description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj@ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMOhj?ubh)}(hX1This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller's responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful.h]hX3This function can be used by drivers which support afbc to complete the preparation of struct drm_afbc_framebuffer. It must be called after allocating the said struct and calling drm_gem_fb_init_with_funcs(). It is caller’s responsibility to put afbc_fb->base.obj objects in case the call is unsuccessful.}(hj0@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMNhj?ubh)}(h **Return**h]j%)}(hjA@h]hReturn}(hjC@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?@ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMThj?ubh)}(h5Zero on success or a negative error value on failure.h]h5Zero on success or a negative error value on failure.}(hjW@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:152: ./drivers/gpu/drm/drm_gem_framebuffer_helper.chMUhj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjr:)}(h.. _drm_bridges:h]h}(h]h ]h"]h$]h&]j}: drm-bridgesuh1jq:hKhjhhhhubeh}(h] framebuffer-gem-helper-referenceah ]h"] framebuffer gem helper referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hBridgesh]hBridges}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hhhhhKubh)}(h:c:type:`struct drm_bridge ` represents a device that hangs on to an encoder. These are handy when a regular :c:type:`drm_encoder` entity isn't enough to represent the entire encoder chain.h](h)}(h(:c:type:`struct drm_bridge `h]jz)}(hj@h]hstruct drm_bridge}(hj@hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:163: ./drivers/gpu/drm/drm_bridge.chK,hj@ubhQ represents a device that hangs on to an encoder. These are handy when a regular }(hj@hhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hj@h]h drm_encoder}(hj@hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hhj@hK,hj@ubh= entity isn’t enough to represent the entire encoder chain.}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj@hK,hj@hhubh)}(hA bridge is always attached to a single :c:type:`drm_encoder` at a time, but can be either connected to it directly, or through a chain of bridges::h](h(A bridge is always attached to a single }(hj@hhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hj@h]h drm_encoder}(hj@hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:163: ./drivers/gpu/drm/drm_bridge.chK0hj@ubhV at a time, but can be either connected to it directly, or through a chain of bridges:}(hj@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjAhK0hj@hhubj@)}(h1[ CRTC ---> ] Encoder ---> Bridge A ---> Bridge Bh]h1[ CRTC ---> ] Encoder ---> Bridge A ---> Bridge B}hj%Asbah}(h]h ]h"]h$]h&]jjuh1j?ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:163: ./drivers/gpu/drm/drm_bridge.chK3hj@hhubh)}(hXHere, the output of the encoder feeds to bridge A, and that furthers feeds to bridge B. Bridge chains can be arbitrarily long, and shall be fully linear: Chaining multiple bridges to the output of a bridge, or the same bridge to the output of different bridges, is not supported.h]hXHere, the output of the encoder feeds to bridge A, and that furthers feeds to bridge B. Bridge chains can be arbitrarily long, and shall be fully linear: Chaining multiple bridges to the output of a bridge, or the same bridge to the output of different bridges, is not supported.}(hj4AhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:163: ./drivers/gpu/drm/drm_bridge.chK5hj@hhubh)}(hX :c:type:`drm_bridge`, like :c:type:`drm_panel`, aren't :c:type:`drm_mode_object` entities like planes, CRTCs, encoders or connectors and hence are not visible to userspace. They just provide additional hooks to get the desired output at the end of the encoder chain.h](h)}(h:c:type:`drm_bridge`h]jz)}(hjIAh]h drm_bridge}(hjKAhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGAubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:163: ./drivers/gpu/drm/drm_bridge.chK:hjCAubh, like }(hjCAhhhNhNubh)}(h:c:type:`drm_panel`h]jz)}(hjmAh]h drm_panel}(hjoAhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjkAubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_paneluh1hhjfAhK:hjCAubh , aren’t }(hjCAhhhNhNubh)}(h:c:type:`drm_mode_object`h]jz)}(hjAh]hdrm_mode_object}(hjAhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_objectuh1hhjfAhK:hjCAubh entities like planes, CRTCs, encoders or connectors and hence are not visible to userspace. They just provide additional hooks to get the desired output at the end of the encoder chain.}(hjCAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjfAhK:hj@hhubeh}(h]id1ah ]h"]h$]jw;ah&]uh1hhj@hhhhhKjy;Kubh)}(hhh](h)}(hDisplay Driver Integrationh]hDisplay Driver Integration}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhhhhhKubh)}(hXDisplay drivers are responsible for linking encoders with the first bridge in the chains. This is done by acquiring the appropriate bridge with devm_drm_of_get_bridge(). Once acquired, the bridge shall be attached to the encoder with a call to drm_bridge_attach().h]hXDisplay drivers are responsible for linking encoders with the first bridge in the chains. This is done by acquiring the appropriate bridge with devm_drm_of_get_bridge(). Once acquired, the bridge shall be attached to the encoder with a call to drm_bridge_attach().}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:169: ./drivers/gpu/drm/drm_bridge.chKChjAhhubh)}(hBridges are responsible for linking themselves with the next bridge in the chain, if any. This is done the same way as for encoders, with the call to drm_bridge_attach() occurring in the :c:type:`drm_bridge_funcs.attach ` operation.h](hBridges are responsible for linking themselves with the next bridge in the chain, if any. This is done the same way as for encoders, with the call to drm_bridge_attach() occurring in the }(hjAhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]jz)}(hjAh]hdrm_bridge_funcs.attach}(hjAhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:169: ./drivers/gpu/drm/drm_bridge.chKHhjAubh operation.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhKHhjAhhubh)}(hX>Once these links are created, the bridges can participate along with encoder functions to perform mode validation and fixup (through drm_bridge_chain_mode_valid() and drm_atomic_bridge_chain_check()), mode setting (through drm_bridge_chain_mode_set()), enable (through drm_atomic_bridge_chain_pre_enable() and drm_atomic_bridge_chain_enable()) and disable (through drm_atomic_bridge_chain_disable() and drm_atomic_bridge_chain_post_disable()). Those functions call the corresponding operations provided in :c:type:`drm_bridge_funcs` in sequence for all bridges in the chain.h](hXOnce these links are created, the bridges can participate along with encoder functions to perform mode validation and fixup (through drm_bridge_chain_mode_valid() and drm_atomic_bridge_chain_check()), mode setting (through drm_bridge_chain_mode_set()), enable (through drm_atomic_bridge_chain_pre_enable() and drm_atomic_bridge_chain_enable()) and disable (through drm_atomic_bridge_chain_disable() and drm_atomic_bridge_chain_post_disable()). Those functions call the corresponding operations provided in }(hjBhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jz)}(hjBh]hdrm_bridge_funcs}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:169: ./drivers/gpu/drm/drm_bridge.chKLhjBubh* in sequence for all bridges in the chain.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7BhKLhjAhhubh)}(hXFor display drivers that use the atomic helpers drm_atomic_helper_check_modeset(), drm_atomic_helper_commit_modeset_enables() and drm_atomic_helper_commit_modeset_disables() (either directly in hand-rolled commit check and commit tail handlers, or through the higher-level drm_atomic_helper_check() and drm_atomic_helper_commit_tail() or drm_atomic_helper_commit_tail_rpm() helpers), this is done transparently and requires no intervention from the driver. For other drivers, the relevant DRM bridge chain functions shall be called manually.h]hXFor display drivers that use the atomic helpers drm_atomic_helper_check_modeset(), drm_atomic_helper_commit_modeset_enables() and drm_atomic_helper_commit_modeset_disables() (either directly in hand-rolled commit check and commit tail handlers, or through the higher-level drm_atomic_helper_check() and drm_atomic_helper_commit_tail() or drm_atomic_helper_commit_tail_rpm() helpers), this is done transparently and requires no intervention from the driver. For other drivers, the relevant DRM bridge chain functions shall be called manually.}(hjBBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:169: ./drivers/gpu/drm/drm_bridge.chKVhjAhhubh)}(hXlBridges also participate in implementing the :c:type:`drm_connector` at the end of the bridge chain. Display drivers may use the drm_bridge_connector_init() helper to create the :c:type:`drm_connector`, or implement it manually on top of the connector-related operations exposed by the bridge (see the overview documentation of bridge operations for more details).h](h-Bridges also participate in implementing the }(hjQBhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hj[Bh]h drm_connector}(hj]BhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjYBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:169: ./drivers/gpu/drm/drm_bridge.chK`hjQBubhn at the end of the bridge chain. Display drivers may use the drm_bridge_connector_init() helper to create the }(hjQBhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjBh]h drm_connector}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj}Bubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjxBhK`hjQBubh, or implement it manually on top of the connector-related operations exposed by the bridge (see the overview documentation of bridge operations for more details).}(hjQBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxBhK`hjAhhubeh}(h]display-driver-integrationah ]h"]display driver integrationah$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(h"Special Care with MIPI-DSI bridgesh]h"Special Care with MIPI-DSI bridges}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhhhhhKubh)}(hThe interaction between the bridges and other frameworks involved in the probing of the upstream driver and the bridge driver can be challenging. Indeed, there's multiple cases that needs to be considered:h]hThe interaction between the bridges and other frameworks involved in the probing of the upstream driver and the bridge driver can be challenging. Indeed, there’s multiple cases that needs to be considered:}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKjhjBhhubh)}(hhh](h)}(hXThe upstream driver doesn't use the component framework and isn't a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn't probed. h]h)}(hXThe upstream driver doesn't use the component framework and isn't a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn't probed.h]hX The upstream driver doesn’t use the component framework and isn’t a MIPI-DSI host. In this case, the bridge driver will probe at some point and the upstream driver should try to probe again by returning EPROBE_DEFER as long as the bridge driver hasn’t probed.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKohjBubah}(h]h ]h"]h$]h&]uh1hhjBubh)}(hXThe upstream driver doesn't use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it's assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the :c:type:`mipi_dsi_host_ops.attach ` and :c:type:`mipi_dsi_host_ops.detach ` operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its :c:type:`mipi_dsi_host_ops.attach ` hook. h]h)}(hXThe upstream driver doesn't use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it's assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the :c:type:`mipi_dsi_host_ops.attach ` and :c:type:`mipi_dsi_host_ops.detach ` operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its :c:type:`mipi_dsi_host_ops.attach ` hook.h](hXThe upstream driver doesn’t use the component framework, but is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. In this case, the bridge device is a child of the display device and when it will probe it’s assured that the display device (and MIPI-DSI host) is present. The upstream driver will be assured that the bridge driver is connected between the }(hjBhhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.attach `h]jz)}(hjBh]hmipi_dsi_host_ops.attach}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dsi_host_opsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKthjBubh and }(hjBhhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.detach `h]jz)}(hjCh]hmipi_dsi_host_ops.detach}(hjChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dsi_host_opsuh1hhjChKthjBubh| operations. Therefore, it must run mipi_dsi_host_register() in its probe function, and then run drm_bridge_attach() in its }(hjBhhhNhNubh)}(h6:c:type:`mipi_dsi_host_ops.attach `h]jz)}(hj?Ch]hmipi_dsi_host_ops.attach}(hjAChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj=Cubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dsi_host_opsuh1hhjChKthjBubh hook.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChKthjBubah}(h]h ]h"]h$]h&]uh1hhjBubh)}(hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks. h]h)}(hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks.h]hThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses the MIPI-DCS commands to be controlled. This is the same situation than above, and can run mipi_dsi_host_register() in either its probe or bind hooks.}(hjpChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKhjlCubah}(h]h ]h"]h$]h&]uh1hhjBubh)}(hXXThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there's no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe. h]h)}(hXWThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there's no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe.h]hXYThe upstream driver uses the component framework and is a MIPI-DSI host. The bridge device uses a separate bus (such as I2C) to be controlled. In this case, there’s no correlation between the probe of the bridge and upstream drivers, so care must be taken to avoid an endless EPROBE_DEFER loop, with each driver waiting for the other to probe.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKhjCubah}(h]h &]h"]h$]h&]uh1hhjBubeh}(h]h ]h"]h$]h&]j8j4uh1hhjBhKohjBhhubh)}(hThe ideal pattern to cover the last item (and all the others in the MIPI-DSI host driver case) is to split the operations like this:h]hThe ideal pattern to cover the last item (and all the others in the MIPI-DSI host driver case) is to split the operations like this:}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKhjBhhubh)}(hhh](h)}(hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver's bind can be called. h]h)}(hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver's bind can be called.h]hThe MIPI-DSI host driver must run mipi_dsi_host_register() in its probe hook. It will make sure that the MIPI-DSI host sticks around, and that the driver’s bind can be called.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKhjCubah}(h]h ]h"]h$]h&]uh1hhjCubh)}(hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional. h]h)}(hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional.h]hIn its probe hook, the bridge driver must try to find its MIPI-DSI host, register as a MIPI-DSI device and attach the MIPI-DSI device to its host. The bridge driver is now functional.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKhjCubah}(h]h ]h"]h$]h&]uh1hhjCubh)}(hIn its :c:type:`struct mipi_dsi_host_ops `.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it. h]h)}(hIn its :c:type:`struct mipi_dsi_host_ops `.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it.h](hIn its }(hjChhhNhNubh)}(h6:c:type:`struct mipi_dsi_host_ops `h]jz)}(hjCh]hstruct mipi_dsi_host_ops}(hjChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dsi_host_opsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKhjCubh.attach hook, the MIPI-DSI host can now add its component. Its bind hook will now be called and since the bridge driver is attached and registered, we can now look for and attach it.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhKhjCubah}(h]h ]h"]h$]h&]uh1hhjCubeh}(h]h ]h"]h$]h&]j8j4uh1hhjChKhjBhhubh)}(hAt this point, we're now certain that both the upstream driver and the bridge driver are functional and we can't have a deadlock-like situation when probing.h]hAt this point, we’re now certain that both the upstream driver and the bridge driver are functional and we can’t have a deadlock-like situation when probing.}(hj*DhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:175: ./drivers/gpu/drm/drm_bridge.chKhjBhhubeh}(h]"special-care-with-mipi-dsi-bridgesah ]h"]"special care with mipi-dsi bridgesah$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(hBridge Operationsh]hBridge Operations}(hjDDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjADhhhhhKubh)}(hX&Bridge drivers expose operations through the :c:type:`drm_bridge_funcs` structure. The DRM internals (atomic and CRTC helpers) use the helpers defined in drm_bridge.c to call bridge operations. Those operations are divided in three big categories to support different parts of the bridge usage.h](h-Bridge drivers expose operations through the }(hjRDhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jz)}(hj\Dh]hdrm_bridge_funcs}(hj^DhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjZDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMWhjRDubh structure. The DRM internals (atomic and CRTC helpers) use the helpers defined in drm_bridge.c to call bridge operations. Those operations are divided in three big categories to support different parts of the bridge usage.}(hjRDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjyDhMWhjADhhubh)}(hhh](h)}(hXJThe encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the :c:type:`drm_encoder_helper_funcs` operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically. The enable and disable operations are split in :c:type:`drm_bridge_funcs.pre_enable `, :c:type:`drm_bridge_funcs.enable `, :c:type:`drm_bridge_funcs.disable ` and :c:type:`drm_bridge_funcs.post_disable ` to provide finer-grained control. Bridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic\_), in which case they shall also implement the atomic state bookkeeping operations (:c:type:`drm_bridge_funcs.atomic_duplicate_state `, :c:type:`drm_bridge_funcs.atomic_destroy_state ` and :c:type:`drm_bridge_funcs.reset `). Mixing atomic and non-atomic versions of the operations is not supported. h](h)}(hX>The encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the :c:type:`drm_encoder_helper_funcs` operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically.h](hpThe encoder-related operations support control of the bridges in the chain, and are roughly counterparts to the }(hjDhhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]jz)}(hjDh]hdrm_encoder_helper_funcs}(hjDhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chM\hjDubh operations. They are used by the legacy CRTC and the atomic modeset helpers to perform mode validation, fixup and setting, and enable and disable the bridge automatically.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhM\hjDubh)}(hX5The enable and disable operations are split in :c:type:`drm_bridge_funcs.pre_enable `, :c:type:`drm_bridge_funcs.enable `, :c:type:`drm_bridge_funcs.disable ` and :c:type:`drm_bridge_funcs.post_disable ` to provide finer-grained control.h](h/The enable and disable operations are split in }(hjDhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.pre_enable `h]jz)}(hjDh]hdrm_bridge_funcs.pre_enable}(hjDhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMbhjDubh, }(hjDhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.enable `h]jz)}(hjDh]hdrm_bridge_funcs.enable}(hjDhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjDhMbhjDubh, }(hjDhhhNhNubh)}(h5:c:type:`drm_bridge_funcs.disable `h]jz)}(hjEh]hdrm_bridge_funcs.disable}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj Eubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjDhMbhjDubh and }(hjDhhhNhNubh)}(h::c:type:`drm_bridge_funcs.post_disable `h]jz)}(hj1Eh]hdrm_bridge_funcs.post_disable}(hj3EhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj/Eubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjDhMbhjDubh" to provide finer-grained control.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhMbhjDubh)}(hXBridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic\_), in which case they shall also implement the atomic state bookkeeping operations (:c:type:`drm_bridge_funcs.atomic_duplicate_state `, :c:type:`drm_bridge_funcs.atomic_destroy_state ` and :c:type:`drm_bridge_funcs.reset `). Mixing atomic and non-atomic versions of the operations is not supported.h](hBridge drivers may implement the legacy version of those operations, or the atomic version (prefixed with atomic_), in which case they shall also implement the atomic state bookkeeping operations (}(hjXEhhhNhNubh)}(hD:c:type:`drm_bridge_funcs.atomic_duplicate_state `h]jz)}(hjbEh]h'drm_bridge_funcs.atomic_duplicate_state}(hjdEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj`Eubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMghjXEubh, }(hjXEhhhNhNubh)}(hB:c:type:`drm_bridge_funcs.atomic_destroy_state `h]jz)}(hjEh]h%drm_bridge_funcs.atomic_destroy_state}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjEhMghjXEubh and }(hjXEhhhNhNubh)}(h3:c:type:`drm_bridge_funcs.reset `h]jz)}(hjEh]hdrm_bridge_funcs.reset}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjEhMghjXEubhL). Mixing atomic and non-atomic versions of the operations is not supported.}(hjXEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhMghjDubeh}(h]h ]h"]h$]h&]uh1hhjDubh)}(hXThe bus format negotiation operations :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` and :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers. h]h)}(hXThe bus format negotiation operations :c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts ` and :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers.h](h&The bus format negotiation operations }(hjEhhhNhNubh)}(hH:c:type:`drm_bridge_funcs.atomic_get_output_bus_fmts `h]jz)}(hjEh]h+drm_bridge_funcs.atomic_get_output_bus_fmts}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMnhjEubh and }(hjEhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]jz)}(hjFh]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hj FhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMnhjEubhX allow bridge drivers to negotiate the formats transmitted between bridges in the chain when multiple formats are supported. Negotiation for formats is performed transparently for display drivers by the atomic modeset helpers. Only atomic versions of those operations exist, bridge drivers that need to implement them shall thus also implement the atomic version of the encoder-related operations. This feature is not supported by the legacy CRTC helpers.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhMnhjEubah}(h]h ]h"]h$]h&]uh1hhjDubh)}(hX The connector-related operations support implementing a :c:type:`drm_connector` based on a chain of bridges. DRM bridges traditionally create a :c:type:`drm_connector` for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the :c:type:`drm_connector` to be handled by a single bridge, which doesn't always match the hardware architecture. To simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of :c:type:`drm_connector` and instead expose :c:type:`drm_bridge_funcs` operations to support an externally-implemented :c:type:`drm_connector`. Those operations are :c:type:`drm_bridge_funcs.detect `, :c:type:`drm_bridge_funcs.get_modes `, :c:type:`drm_bridge_funcs.get_edid `, :c:type:`drm_bridge_funcs.hpd_notify `, :c:type:`drm_bridge_funcs.hpd_enable ` and :c:type:`drm_bridge_funcs.hpd_disable `. When implemented, display drivers shall create a :c:type:`drm_connector` instance for each chain of bridges, and implement those connector instances based on the bridge connector operations. Bridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the :c:type:`drm_bridge_funcs.get_edid ` shall be implemented. This however doesn't mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the :c:type:`drm_bridge.ops ` flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the :c:type:`drm_bridge.ops ` flags for all supported operations. A flag shall only be set if the corresponding :c:type:`drm_bridge_funcs` operation is implemented, but an implemented operation doesn't necessarily imply that the corresponding flag will be set. Display drivers shall use the :c:type:`drm_bridge.ops ` flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const :c:type:`drm_bridge_funcs` instance in bridge drivers, improving security by storing function pointers in read-only memory. In order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their :c:type:`drm_bridge_funcs.attach ` handler when the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model. h](h)}(hXThe connector-related operations support implementing a :c:type:`drm_connector` based on a chain of bridges. DRM bridges traditionally create a :c:type:`drm_connector` for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the :c:type:`drm_connector` to be handled by a single bridge, which doesn't always match the hardware architecture.h](h8The connector-related operations support implementing a }(hj9FhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjCFh]h drm_connector}(hjEFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMyhj9FubhA based on a chain of bridges. DRM bridges traditionally create a }(hj9FhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjgFh]h drm_connector}(hjiFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjeFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhj`FhMyhj9Fubh for bridges meant to be used at the end of the chain. This puts additional burden on bridge drivers, especially for bridges that may be used in the middle of a chain or at the end of it. Furthermore, it requires all operations of the }(hj9FhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjFh]h drm_connector}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhj`FhMyhj9FubhZ to be handled by a single bridge, which doesn’t always match the hardware architecture.}(hj9FhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`FhMyhj5Fubh)}(hXJTo simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of :c:type:`drm_connector` and instead expose :c:type:`drm_bridge_funcs` operations to support an externally-implemented :c:type:`drm_connector`. Those operations are :c:type:`drm_bridge_funcs.detect `, :c:type:`drm_bridge_funcs.get_modes `, :c:type:`drm_bridge_funcs.get_edid `, :c:type:`drm_bridge_funcs.hpd_notify `, :c:type:`drm_bridge_funcs.hpd_enable ` and :c:type:`drm_bridge_funcs.hpd_disable `. When implemented, display drivers shall create a :c:type:`drm_connector` instance for each chain of bridges, and implement those connector instances based on the bridge connector operations.h](hTo simplify bridge drivers and make the connector implementation more flexible, a new model allows bridges to unconditionally skip creation of }(hjFhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjFh]h drm_connector}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMhjFubh and instead expose }(hjFhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jz)}(hjFh]hdrm_bridge_funcs}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMhjFubh1 operations to support an externally-implemented }(hjFhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjGh]h drm_connector}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjFhMhjFubh. Those operations are }(hjFhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.detect `h]jz)}(hj%Gh]hdrm_bridge_funcs.detect}(hj'GhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj#Gubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMhjFubh, }(hjFhhhNhNubh)}(h7:c:type:`drm_bridge_funcs.get_modes `h]jz)}(hjHGh]hdrm_bridge_funcs.get_modes}(hjJGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMhjFubh, }(hjFhhhNhNubh)}(h6:c:type:`drm_bridge_funcs.get_edid `h]jz)}(hjkGh]hdrm_bridge_funcs.get_edid}(hjmGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjiGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMhjFubh, }hjFsbh)}(h8:c:type:`drm_bridge_funcs.hpd_notify `h]jz)}(hjGh]hdrm_bridge_funcs.hpd_notify}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMhjFubh, }hjFsbh)}(h8:c:type:`drm_bridge_funcs.hpd_enable `h]jz)}(hjGh]hdrm_bridge_funcs.hpd_enable}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMhjFubh and }(hjFhhhNhNubh)}(h9:c:type:`drm_bridge_funcs.hpd_disable `h]jz)}(hjGh]hdrm_bridge_funcs.hpd_disable}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjFhMhjFubh3. When implemented, display drivers shall create a }(hjFhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjGh]h drm_connector}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjFhMhjFubhv instance for each chain of bridges, and implement those connector instances based on the bridge connector operations.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjFhMhj5Fubh)}(hXBridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the :c:type:`drm_bridge_funcs.get_edid ` shall be implemented. This however doesn't mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the :c:type:`drm_bridge.ops ` flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the :c:type:`drm_bridge.ops ` flags for all supported operations. A flag shall only be set if the corresponding :c:type:`drm_bridge_funcs` operation is implemented, but an implemented operation doesn't necessarily imply that the corresponding flag will be set. Display drivers shall use the :c:type:`drm_bridge.ops ` flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const :c:type:`drm_bridge_funcs` instance in bridge drivers, improving security by storing function pointers in read-only memory.h](hBridge drivers shall implement the connector-related operations for all the features that the bridge hardware support. For instance, if a bridge supports reading EDID, the }(hjHhhhNhNubh)}(h6:c:type:`drm_bridge_funcs.get_edid `h]jz)}(hj(Hh]hdrm_bridge_funcs.get_edid}(hj*HhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&Hubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMhjHubhX shall be implemented. This however doesn’t mean that the DDC lines are wired to the bridge on a particular platform, as they could also be connected to an I2C controller of the SoC. Support for the connector-related operations on the running platform is reported through the }(hjHhhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]jz)}(hjLHh]hdrm_bridge.ops}(hjNHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjEHhMhjHubh flags. Bridge drivers shall detect which operations they can support on the platform (usually this information is provided by ACPI or DT), and set the }(hjHhhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]jz)}(hjoHh]hdrm_bridge.ops}(hjqHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjmHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjEHhMhjHubhS flags for all supported operations. A flag shall only be set if the corresponding }(hjHhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jz)}(hjHh]hdrm_bridge_funcs}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjEHhMhjHubh operation is implemented, but an implemented operation doesn’t necessarily imply that the corresponding flag will be set. Display drivers shall use the }(hjHhhhNhNubh)}(h%:c:type:`drm_bridge.ops `h]jz)}(hjHh]hdrm_bridge.ops}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjEHhMhjHubhz flags to decide which bridge to delegate a connector operation to. This mechanism allows providing a single static const }(hjHhhhNhNubh)}(h:c:type:`drm_bridge_funcs`h]jz)}(hjHh]hdrm_bridge_funcs}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjEHhMhjHubha instance in bridge drivers, improving security by storing function pointers in read-only memory.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEHhMhj5Fubh)}(hXIn order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their :c:type:`drm_bridge_funcs.attach ` handler when the ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model.h](hXoIn order to ease transition, bridge drivers may support both the old and new models by making connector creation optional and implementing the connected-related bridge operations. Connector creation is then controlled by the flags argument to the drm_bridge_attach() function. Display drivers that support the new model and create connectors themselves shall set the }(hjHhhhNhNubjz)}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubhX  flag, and bridge drivers shall then skip connector creation. For intermediate bridges in the chain, the flag shall be passed to the drm_bridge_attach() call for the downstream bridge. Bridge drivers that implement the new model only shall return an error from their }(hjHhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]jz)}(hjIh]hdrm_bridge_funcs.attach}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:181: ./drivers/gpu/drm/drm_bridge.chMhjHubh handler when the }(hjHhhhNhNubjz)}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hj=IhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubh flag is not set. New display drivers should use the new model, and convert the bridge drivers they use if needed, in order to gradually transition to the new model.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8IhMhj5Fubeh}(h]h ]h"]h$]h&]uh1hhjDubeh}(h]h ]h"]h$]h&]j8j4uh1hhjDhM\hjADhhubeh}(h]bridge-operationsah ]h"]bridge operationsah$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(hBridge Connector Helperh]hBridge Connector Helper}(hjlIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjiIhhhhhKubh)}(hXDThe DRM bridge connector helper object provides a DRM connector implementation that wraps a chain of :c:type:`struct drm_bridge `. The connector operations are fully implemented based on the operations of the bridges in the chain, and don't require any intervention from the display controller driver at runtime.h](heThe DRM bridge connector helper object provides a DRM connector implementation that wraps a chain of }(hjzIhhhNhNubh)}(h(:c:type:`struct drm_bridge `h]jz)}(hjIh]hstruct drm_bridge}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/display/drm_bridge_connector.chKhjzIubh. The connector operations are fully implemented based on the operations of the bridges in the chain, and don’t require any intervention from the display controller driver at runtime.}(hjzIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhKhjiIhhubh)}(hXHTo use the helper, display controller drivers create a bridge connector with a call to drm_bridge_connector_init(). This associates the newly created connector with the chain of bridges passed to the function and registers it with the DRM device. At that point the connector becomes fully usable, no further operation is needed.h]hXHTo use the helper, display controller drivers create a bridge connector with a call to drm_bridge_connector_init(). This associates the newly created connector with the chain of bridges passed to the function and registers it with the DRM device. At that point the connector becomes fully usable, no further operation is needed.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/display/drm_bridge_connector.chK$hjiIhhubh)}(hXThe DRM bridge connector operations are implemented based on the operations provided by the bridges in the chain. Each connector operation is delegated to the bridge closest to the connector (at the end of the chain) that provides the relevant functionality.h]hXThe DRM bridge connector operations are implemented based on the operations provided by the bridges in the chain. Each connector operation is delegated to the bridge closest to the connector (at the end of the chain) that provides the relevant functionality.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/display/drm_bridge_connector.chK*hjiIhhubh)}(hX:To make use of this helper, all bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach flag (none of the bridges shall create a DRM connector directly).h](hZTo make use of this helper, all bridges in the chain shall report bridge operation flags (}(hjIhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjIh]hdrm_bridge->ops}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:187: ./drivers/gpu/drm/display/drm_bridge_connector.chK/hjIubh) and bridge output type (}(hjIhhhNhNubh)}(h':c:type:`drm_bridge->type `h]jz)}(hjIh]hdrm_bridge->type}(hjIhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjIhK/hjIubhy), as well as the DRM_BRIDGE_ATTACH_NO_CONNECTOR attach flag (none of the bridges shall create a DRM connector directly).}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhK/hjiIhhubeh}(h]bridge-connector-helperah ]h"]bridge connector helperah$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(hBridge Helper Referenceh]hBridge Helper Reference}(hj*JhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'JhhhhhKubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_attach_flags (C enum)c.drm_bridge_attach_flagshNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hdrm_bridge_attach_flagsh]j)}(henum drm_bridge_attach_flagsh](j)}(hj8h]henum}(hjQJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMJhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKubj)}(h h]h }(hj_JhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMJhhhj^JhKubj)}(hdrm_bridge_attach_flagsh]j)}(hjKJh]hdrm_bridge_attach_flags}(hjqJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmJubah}(h]h ](jjeh"]h$]h&]jjuh1jhjMJhhhj^JhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjIJhhhj^JhKubah}(h]jDJah ](jjeh"]h$]h&]jj)jhuh1jhj^JhKhjFJhhubj)}(hhh]h)}(h>Flags for :c:type:`drm_bridge_funcs.attach `h](h Flags for }(hjJhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.attach `h]jz)}(hjJh]hdrm_bridge_funcs.attach}(hjJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j)}jjKJsbc.drm_bridge_attach_flagsasbjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjJubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhK3hjJhhubah}(h]h ]h"]h$]h&]uh1jhjFJhhhj^JhKubeh}(h]h ](jenumeh"]h$]h&]jjjjJjjJjjjuh1jhhhj'JhNhNubj)}(hx**Constants** ``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` When this flag is set the bridge shall not create a drm_connector.h](h)}(h **Constants**h]j%)}(hjJh]h Constants}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhK7hjJubji)}(hhh]jn)}(he``DRM_BRIDGE_ATTACH_NO_CONNECTOR`` When this flag is set the bridge shall not create a drm_connector.h](jt)}(h"``DRM_BRIDGE_ATTACH_NO_CONNECTOR``h]jz)}(hjJh]hDRM_BRIDGE_ATTACH_NO_CONNECTOR}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhK:hjJubj)}(hhh]h)}(hBWhen this flag is set the bridge shall not create a drm_connector.h]hBWhen this flag is set the bridge shall not create a drm_connector.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhK:hjKubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhjKhK:hjJubah}(h]h ]h"]h$]h&]uh1jhhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge_funcs (C struct)c.drm_bridge_funcshNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hdrm_bridge_funcsh]j)}(hstruct drm_bridge_funcsh](j)}(hjh]hstruct}(hjTKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPKhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhK@ubj)}(h h]h }(hjbKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPKhhhjaKhK@ubj)}(hdrm_bridge_funcsh]j)}(hjNKh]hdrm_bridge_funcs}(hjtKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpKubah}(h]h ](jjeh"]h$]h&]jjuh1jhjPKhhhjaKhK@ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjLKhhhjaKhK@ubah}(h]jGKah ](jjeh"]h$]h&]jj)jhuh1jhjaKhK@hjIKhhubj)}(hhh]h)}(hdrm_bridge control functionsh]hdrm_bridge control functions}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhK>hjKhhubah}(h]h ]h"]h$]h&]uh1jhjIKhhhjaKhK@ubeh}(h]h ](jstructeh"]h$]h&]jjjjKjjKjjjuh1jhhhj'JhNhNubj)}(hXC|**Definition**:: struct drm_bridge_funcs { int (*attach)(struct drm_bridge *bridge, struct drm_encoder *encoder, enum drm_bridge_attach_flags flags); void (*destroy)(struct drm_bridge *bridge); void (*detach)(struct drm_bridge *bridge); enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*disable)(struct drm_bridge *bridge); void (*post_disable)(struct drm_bridge *bridge); void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); void (*pre_enable)(struct drm_bridge *bridge); void (*enable)(struct drm_bridge *bridge); void (*atomic_pre_enable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_disable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_atomic_state *state); struct drm_bridge_state *(*atomic_duplicate_state)(struct drm_bridge *bridge); void (*atomic_destroy_state)(struct drm_bridge *bridge, struct drm_bridge_state *state); u32 *(*atomic_get_output_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts); u32 *(*atomic_get_input_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts); int (*atomic_check)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); struct drm_bridge_state *(*atomic_reset)(struct drm_bridge *bridge); enum drm_connector_status (*detect)(struct drm_bridge *bridge, struct drm_connector *connector); int (*get_modes)(struct drm_bridge *bridge, struct drm_connector *connector); const struct drm_edid *(*edid_read)(struct drm_bridge *bridge, struct drm_connector *connector); void (*hpd_notify)(struct drm_bridge *bridge, struct drm_connector *connector, enum drm_connector_status status); void (*hpd_enable)(struct drm_bridge *bridge); void (*hpd_disable)(struct drm_bridge *bridge); enum drm_mode_status (*hdmi_tmds_char_rate_valid)(const struct drm_bridge *bridge, const struct drm_display_mode *mode, unsigned long long tmds_rate); int (*hdmi_clear_avi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_avi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdmi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdmi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdr_drm_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdr_drm_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_spd_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_spd_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_audio_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_audio_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*hdmi_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); int (*hdmi_cec_init)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_cec_enable)(struct drm_bridge *bridge, bool enable); int (*hdmi_cec_log_addr)(struct drm_bridge *bridge, u8 logical_addr); int (*hdmi_cec_transmit)(struct drm_bridge *bridge, u8 attempts, u32 signal_free_time, struct cec_msg *msg); int (*dp_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*dp_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); void (*debugfs_init)(struct drm_bridge *bridge, struct dentry *root); }; **Members** ``attach`` This callback is invoked whenever our bridge is being attached to a :c:type:`drm_encoder`. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*). The **attach** callback is optional. RETURNS: Zero on success, error code on failure. ``destroy`` This callback is invoked when the bridge is about to be deallocated. The **destroy** callback is optional. ``detach`` This callback is invoked whenever our bridge is being detached from a :c:type:`drm_encoder`. The **detach** callback is optional. ``mode_valid`` This callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). The **mode_valid** callback is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup**. RETURNS: drm_mode_status Enum ``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration. The mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. ``disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_disable `. ``post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **post_disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_post_disable `. ``mode_set`` This callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called. The adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges. For atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `. NOTE: This is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation. ``pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **pre_enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_pre_enable `. ``enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_enable `. ``atomic_pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **atomic_pre_enable** callback is optional. ``atomic_enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **atomic_enable** callback is optional. ``atomic_disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **atomic_disable** callback is optional. ``atomic_post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **atomic_post_disable** callback is optional. ``atomic_duplicate_state`` Duplicate the current bridge state object (which is guaranteed to be non-NULL). The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook. RETURNS: A valid drm_bridge_state object or NULL if the allocation fails. ``atomic_destroy_state`` Destroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `. The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook. ``atomic_get_output_bus_fmts`` Return the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). This method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise. ``atomic_get_input_bus_fmts`` Return the supported bus formats on the input end of a bridge for a specific output bus format. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0. This method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format. Bridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...) Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately. ``atomic_check`` This method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly. :c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge). This method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. If drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain. RETURNS: zero if the check passed, a negative error code otherwise. ``atomic_reset`` Reset the bridge to a predefined state (or retrieve its current state) and return a :c:type:`drm_bridge_state` object matching this state. This function is called at attach time. The atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook. Note that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...). 1. The reset operation happens when the bridge is attached, not when drm_mode_config_reset() is called 2. It's meant to be used exclusively on bridges that have been converted to the ATOMIC API RETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise. ``detect`` Check if anything is attached to the bridge output. This callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `. RETURNS: drm_connector_status indicating the bridge output status. ``get_modes`` Fill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add(). The **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage. RETURNS: The number of modes added by calling drm_mode_probed_add(). ``edid_read`` Read the EDID data of the connected display. The **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented. The caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage. RETURNS: An edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free(). ``hpd_notify`` Notify the bridge of hot plug detection. This callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges. ``hpd_enable`` Enable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. ``hpd_disable`` Disable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. ``hdmi_tmds_char_rate_valid`` Check whether a particular TMDS character rate is supported by the driver. This callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. Returns: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. ``hdmi_clear_avi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_avi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_hdmi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_hdmi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_hdr_drm_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_hdr_drm_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_spd_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_spd_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. ``hdmi_clear_audio_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. ``hdmi_write_audio_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. ``hdmi_audio_startup`` Called when ASoC starts an audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_prepare`` Configures HDMI-encoder for audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_shutdown`` Shut down the audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_audio_mute_stream`` Mute/unmute HDMI audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_init`` Initialize CEC part of the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_enable`` Enable or disable the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_log_addr`` Set the logical address of the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``hdmi_cec_transmit`` Transmit the message using the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_startup`` Called when ASoC starts a DisplayPort audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_prepare`` Configures DisplayPort audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_shutdown`` Shut down the DisplayPort audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``dp_audio_mute_stream`` Mute/unmute DisplayPort audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise ``debugfs_init`` Allows bridges to create bridge-specific debugfs files.kh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubh:}(hjKhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKBhjKubj@)}(hXstruct drm_bridge_funcs { int (*attach)(struct drm_bridge *bridge, struct drm_encoder *encoder, enum drm_bridge_attach_flags flags); void (*destroy)(struct drm_bridge *bridge); void (*detach)(struct drm_bridge *bridge); enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*disable)(struct drm_bridge *bridge); void (*post_disable)(struct drm_bridge *bridge); void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); void (*pre_enable)(struct drm_bridge *bridge); void (*enable)(struct drm_bridge *bridge); void (*atomic_pre_enable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_disable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_atomic_state *state); struct drm_bridge_state *(*atomic_duplicate_state)(struct drm_bridge *bridge); void (*atomic_destroy_state)(struct drm_bridge *bridge, struct drm_bridge_state *state); u32 *(*atomic_get_output_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts); u32 *(*atomic_get_input_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts); int (*atomic_check)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); struct drm_bridge_state *(*atomic_reset)(struct drm_bridge *bridge); enum drm_connector_status (*detect)(struct drm_bridge *bridge, struct drm_connector *connector); int (*get_modes)(struct drm_bridge *bridge, struct drm_connector *connector); const struct drm_edid *(*edid_read)(struct drm_bridge *bridge, struct drm_connector *connector); void (*hpd_notify)(struct drm_bridge *bridge, struct drm_connector *connector, enum drm_connector_status status); void (*hpd_enable)(struct drm_bridge *bridge); void (*hpd_disable)(struct drm_bridge *bridge); enum drm_mode_status (*hdmi_tmds_char_rate_valid)(const struct drm_bridge *bridge, const struct drm_display_mode *mode, unsigned long long tmds_rate); int (*hdmi_clear_avi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_avi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdmi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdmi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdr_drm_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdr_drm_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_spd_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_spd_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_audio_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_audio_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*hdmi_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); int (*hdmi_cec_init)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_cec_enable)(struct drm_bridge *bridge, bool enable); int (*hdmi_cec_log_addr)(struct drm_bridge *bridge, u8 logical_addr); int (*hdmi_cec_transmit)(struct drm_bridge *bridge, u8 attempts, u32 signal_free_time, struct cec_msg *msg); int (*dp_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*dp_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); void (*debugfs_init)(struct drm_bridge *bridge, struct dentry *root); };h]hXstruct drm_bridge_funcs { int (*attach)(struct drm_bridge *bridge, struct drm_encoder *encoder, enum drm_bridge_attach_flags flags); void (*destroy)(struct drm_bridge *bridge); void (*detach)(struct drm_bridge *bridge); enum drm_mode_status (*mode_valid)(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); bool (*mode_fixup)(struct drm_bridge *bridge, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); void (*disable)(struct drm_bridge *bridge); void (*post_disable)(struct drm_bridge *bridge); void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); void (*pre_enable)(struct drm_bridge *bridge); void (*enable)(struct drm_bridge *bridge); void (*atomic_pre_enable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_enable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_disable)(struct drm_bridge *bridge, struct drm_atomic_state *state); void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_atomic_state *state); struct drm_bridge_state *(*atomic_duplicate_state)(struct drm_bridge *bridge); void (*atomic_destroy_state)(struct drm_bridge *bridge, struct drm_bridge_state *state); u32 *(*atomic_get_output_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts); u32 *(*atomic_get_input_bus_fmts)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts); int (*atomic_check)(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); struct drm_bridge_state *(*atomic_reset)(struct drm_bridge *bridge); enum drm_connector_status (*detect)(struct drm_bridge *bridge, struct drm_connector *connector); int (*get_modes)(struct drm_bridge *bridge, struct drm_connector *connector); const struct drm_edid *(*edid_read)(struct drm_bridge *bridge, struct drm_connector *connector); void (*hpd_notify)(struct drm_bridge *bridge, struct drm_connector *connector, enum drm_connector_status status); void (*hpd_enable)(struct drm_bridge *bridge); void (*hpd_disable)(struct drm_bridge *bridge); enum drm_mode_status (*hdmi_tmds_char_rate_valid)(const struct drm_bridge *bridge, const struct drm_display_mode *mode, unsigned long long tmds_rate); int (*hdmi_clear_avi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_avi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdmi_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdmi_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_hdr_drm_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_hdr_drm_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_spd_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_spd_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_clear_audio_infoframe)(struct drm_bridge *bridge); int (*hdmi_write_audio_infoframe)(struct drm_bridge *bridge, const u8 *buffer, size_t len); int (*hdmi_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*hdmi_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); int (*hdmi_cec_init)(struct drm_bridge *bridge, struct drm_connector *connector); int (*hdmi_cec_enable)(struct drm_bridge *bridge, bool enable); int (*hdmi_cec_log_addr)(struct drm_bridge *bridge, u8 logical_addr); int (*hdmi_cec_transmit)(struct drm_bridge *bridge, u8 attempts, u32 signal_free_time, struct cec_msg *msg); int (*dp_audio_startup)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_prepare)(struct drm_bridge *bridge, struct drm_connector *connector, struct hdmi_codec_daifmt *fmt, struct hdmi_codec_params *hparms); void (*dp_audio_shutdown)(struct drm_bridge *bridge, struct drm_connector *connector); int (*dp_audio_mute_stream)(struct drm_bridge *bridge, struct drm_connector *connector, bool enable, int direction); void (*debugfs_init)(struct drm_bridge *bridge, struct dentry *root); };}hjKsbah}(h]h ]h"]h$]h&]jjuh1j?h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKDhjKubh)}(h **Members**h]j%)}(hjKh]hMembers}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKyhjKubji)}(hhh](jn)}(hX``attach`` This callback is invoked whenever our bridge is being attached to a :c:type:`drm_encoder`. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*). The **attach** callback is optional. RETURNS: Zero on success, error code on failure. h](jt)}(h ``attach``h]jz)}(hjLh]hattach}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKKhjKubj)}(hhh](h)}(hThis callback is invoked whenever our bridge is being attached to a :c:type:`drm_encoder`. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*).h](hDThis callback is invoked whenever our bridge is being attached to a }(hjLhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hj&Lh]h drm_encoder}(hj(LhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj$Lubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKChjLubh[. The flags argument tunes the behaviour of the attach operation (see DRM_BRIDGE_ATTACH_*).}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjCLhKChjLubh)}(h$The **attach** callback is optional.h](hThe }(hjNLhhhNhNubj%)}(h **attach**h]hattach}(hjVLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNLubh callback is optional.}(hjNLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKGhjLubh)}(hRETURNS:h]hRETURNS:}(hjoLhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKIhjLubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hj~LhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhKKhjLubeh}(h]h ]h"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]uh1jmhjLhKKhjKubjn)}(hx``destroy`` This callback is invoked when the bridge is about to be deallocated. The **destroy** callback is optional. h](jt)}(h ``destroy``h]jz)}(hjLh]hdestroy}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKVhjLubj)}(hhh](h)}(hDThis callback is invoked when the bridge is about to be deallocated.h]hDThis callback is invoked when the bridge is about to be deallocated.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKShjLubh)}(h%The **destroy** callback is optional.h](hThe }(hjLhhhNhNubj%)}(h **destroy**h]hdestroy}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLubh callback is optional.}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjLhKVhjLubeh}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhjLhKVhjKubjn)}(h``detach`` This callback is invoked whenever our bridge is being detached from a :c:type:`drm_encoder`. The **detach** callback is optional. h](jt)}(h ``detach``h]jz)}(hjLh]hdetach}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhK`hjLubj)}(hhh](h)}(h\This callback is invoked whenever our bridge is being detached from a :c:type:`drm_encoder`.h](hFThis callback is invoked whenever our bridge is being detached from a }(hjMhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjMh]h drm_encoder}(hjMhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhK]hjMubh.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8MhK]hjMubh)}(h$The **detach** callback is optional.h](hThe }(hjCMhhhNhNubj%)}(h **detach**h]hdetach}(hjKMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjCMubh callback is optional.}(hjCMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj MhK`hjMubeh}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhj MhK`hjKubjn)}(hX?``mode_valid`` This callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed. This hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset(). The **mode_valid** callback is optional. NOTE: Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup**. RETURNS: drm_mode_status Enum h](jt)}(h``mode_valid``h]jz)}(hjuMh]h mode_valid}(hjwMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsMubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjoMubj)}(hhh](h)}(hXThis callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.h]hXThis callback is used to check if a specific mode is valid in this bridge. This should be implemented if the bridge has some sort of restriction in the modes it can display. For example, a given bridge may be responsible to set a clock value. If the clock can not produce all the values for the available modes then this callback can be used to restrict the number of modes to only the ones that can be displayed.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKghjMubh)}(hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().h]hThis hook is used by the probe helpers to filter the mode list in drm_helper_probe_single_connector_modes(), and it is used by the atomic helpers to validate modes supplied by userspace in drm_atomic_helper_check_modeset().}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKohjMubh)}(h(The **mode_valid** callback is optional.h](hThe }(hjMhhhNhNubj%)}(h**mode_valid**h]h mode_valid}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubh callback is optional.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKthjMubh)}(hNOTE:h]hNOTE:}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKvhjMubh)}(hX^Since this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in **mode_fixup**.h](hXOSince this function is both called from the check phase of an atomic commit, and the mode validation in the probe paths it is not allowed to look at anything else but the passed-in mode, and validate it against configuration-invariant hardware constraints. Any further limits which depend upon the configuration can only be checked in }(hjMhhhNhNubj%)}(h**mode_fixup**h]h mode_fixup}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubh.}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKxhjMubh)}(hRETURNS:h]hRETURNS:}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjMubh)}(hdrm_mode_status Enumh]hdrm_mode_status Enum}(hj NhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhKhjMubeh}(h]h ]h"]h$]h&]uh1jhjoMubeh}(h]h ]h"]h$]h&]uh1jmhjMhKhjKubjn)}(hXS``mode_fixup`` This callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details. This is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration. The mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. NOTE: This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter. Also beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**. RETURNS: True if an acceptable configuration is possible, false if the modeset operation should be rejected. h](jt)}(h``mode_fixup``h]jz)}(hj,Nh]h mode_fixup}(hj.NhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*Nubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhj&Nubj)}(hhh](h)}(hXThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final :c:type:`drm_connector` or the next :c:type:`drm_bridge`. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also :c:type:`drm_crtc_state.adjusted_mode ` for more details.h](hThis callback is used to validate and adjust a mode. The parameter mode is the display mode that should be fed to the next element in the display chain, either the final }(hjENhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjONh]h drm_connector}(hjQNhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjMNubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjENubh or the next }(hjENhhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjsNh]h drm_bridge}(hjuNhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjqNubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjlNhKhjENubh. The parameter adjusted_mode is the input mode the bridge requires. It can be modified by this callback and does not need to match mode. See also }(hjENhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jz)}(hjNh]hdrm_crtc_state.adjusted_mode}(hjNhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhjlNhKhjENubh for more details.}(hjENhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjlNhKhjBNubh)}(hThis is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration.h]hThis is the only hook that allows a bridge to reject a modeset. If this function passes all other callbacks must succeed for this configuration.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjBNubh)}(hThe mode_fixup callback is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided.h](h%The mode_fixup callback is optional. }(hjNhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]jz)}(hjNh]hdrm_bridge_funcs.mode_fixup()}(hjNhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjNubh is not called when }(hjNhhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jz)}(hjNh]hdrm_bridge_funcs.atomic_check()}(hjNhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjNhKhjNubh8 is implemented, so only one of them should be provided.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNhKhjBNubh)}(hNOTE:h]hNOTE:}(hj!OhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjBNubh)}(hX>This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace's request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in **state** parameter.h](hX,This function is called in the check phase of atomic modesets, which can be aborted for any reason (including on userspace’s request to just check whether a configuration would be possible). Drivers MUST NOT touch any persistent state (hardware or software) or data structures except the passed in }(hj0OhhhNhNubj%)}(h **state**h]hstate}(hj8OhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0Oubh parameter.}(hj0OhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjBNubh)}(hXNAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in :c:type:`drm_connector.modes `. To ensure that modes are filtered consistently put any bridge constraints and limits checks into **mode_valid**.h](hAlso beware that userspace can request its own custom modes, neither core nor helpers filter modes to the list of probe modes reported by the GETCONNECTOR IOCTL and stored in }(hjQOhhhNhNubh)}(h-:c:type:`drm_connector.modes `h]jz)}(hj[Oh]hdrm_connector.modes}(hj]OhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjYOubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjQOubhc. To ensure that modes are filtered consistently put any bridge constraints and limits checks into }(hjQOhhhNhNubj%)}(h**mode_valid**h]h mode_valid}(hj}OhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQOubh.}(hjQOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxOhKhjBNubh)}(hRETURNS:h]hRETURNS:}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjBNubh)}(hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.h]hcTrue if an acceptable configuration is possible, false if the modeset operation should be rejected.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjBNubeh}(h]h ]h"]h$]h&]uh1jhj&Nubeh}(h]h ]h"]h$]h&]uh1jmhjANhKhjKubjn)}(hX?``disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_disable `. h](jt)}(h ``disable``h]jz)}(hjOh]hdisable}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjOubj)}(hhh](h)}(hXThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjOhhhNhNubj%)}(h **disable**h]hdisable}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjOubh& vfunc. If the preceding element is a }(hjOhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjOh]h drm_encoder}(hjOhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjOubh it’s called right before the }(hjOhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jz)}(hjPh]h drm_encoder_helper_funcs.disable}(hj PhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjPhKhjOubh, }(hjOhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.prepare `h]jz)}(hjAPh]h drm_encoder_helper_funcs.prepare}(hjCPhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj?Pubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjPhKhjOubh or }(hjOhhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jz)}(hjdPh]hdrm_encoder_helper_funcs.dpms}(hjfPhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjbPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjPhKhjOubh hook.}(hjOhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhKhjOubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjOubh)}(h%The **disable** callback is optional.h](hThe }(hjPhhhNhNubj%)}(h **disable**h]hdisable}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubh callback is optional.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjOubh)}(hNOTE:h]hNOTE:}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjOubh)}(hsThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_disable `.h](h6This is deprecated, do not use! New drivers shall use }(hjPhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.atomic_disable `h]jz)}(hjPh]hdrm_bridge_funcs.atomic_disable}(hjPhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjPubh.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjPhKhjOubeh}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhjOhKhjKubjn)}(hXb``post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **post_disable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_post_disable `. h](jt)}(h``post_disable``h]jz)}(hjQh]h post_disable}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj Qubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjQubj)}(hhh](h)}(hXThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.disable `, :c:type:`drm_encoder_helper_funcs.prepare ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hj'QhhhNhNubj%)}(h**post_disable**h]h post_disable}(hj/QhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'Qubh) function. If the preceding element is a }(hj'QhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjCQh]h drm_encoder}(hjEQhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAQubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhj'Qubh+ it’s called right after the encoder’s }(hj'QhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.disable `h]jz)}(hjgQh]h drm_encoder_helper_funcs.disable}(hjiQhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjeQubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhj`QhKhj'Qubh, }(hj'QhhhNhNubh)}(hE:c:type:`drm_encoder_helper_funcs.prepare `h]jz)}(hjQh]h drm_encoder_helper_funcs.prepare}(hjQhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhj`QhKhj'Qubh or }(hj'QhhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jz)}(hjQh]hdrm_encoder_helper_funcs.dpms}(hjQhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhj`QhKhj'Qubh hook.}(hj'QhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`QhKhj$Qubh)}(hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.h]hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhj$Qubh)}(h*The **post_disable** callback is optional.h](hThe }(hjQhhhNhNubj%)}(h**post_disable**h]h post_disable}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubh callback is optional.}(hjQhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhj$Qubh)}(hNOTE:h]hNOTE:}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhj$Qubh)}(hxThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_post_disable `.h](h6This is deprecated, do not use! New drivers shall use }(hjRhhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_post_disable `h]jz)}(hjRh]h$drm_bridge_funcs.atomic_post_disable}(hjRhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjRubh.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj:RhKhj$Qubeh}(h]h ]h"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]uh1jmhj#QhKhjKubjn)}(hX2``mode_set`` This callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called. The adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges. For atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `. NOTE: This is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation. h](jt)}(h ``mode_set``h]jz)}(hjWRh]hmode_set}(hjYRhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjURubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjQRubj)}(hhh](h)}(hXThis callback should set the given mode on the bridge. It is called after the **mode_set** callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be :c:type:`drm_encoder_helper_funcs.mode_set `. The display pipe (i.e. clocks and timing signals) is off when this function is called.h](hNThis callback should set the given mode on the bridge. It is called after the }(hjpRhhhNhNubj%)}(h **mode_set**h]hmode_set}(hjxRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpRubh callback for the preceding element in the display pipeline has been called already. If the bridge is the first element then this would be }(hjpRhhhNhNubh)}(hF:c:type:`drm_encoder_helper_funcs.mode_set `h]jz)}(hjRh]h!drm_encoder_helper_funcs.mode_set}(hjRhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjpRubhY. The display pipe (i.e. clocks and timing signals) is off when this function is called.}(hjpRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhKhjmRubh)}(hXThe adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges.h]hXThe adjusted_mode parameter is the mode output by the CRTC for the first bridge in the chain. It can be different from the mode parameter that contains the desired mode for the connector at the end of the bridges chain, for instance when the first bridge in the chain performs scaling. The adjusted mode is mostly useful for the first bridge in the chain and is likely irrelevant for the other bridges.}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjmRubh)}(hsFor atomic drivers the adjusted_mode is the mode stored in :c:type:`drm_crtc_state.adjusted_mode `.h](h;For atomic drivers the adjusted_mode is the mode stored in }(hjRhhhNhNubh)}(h7:c:type:`drm_crtc_state.adjusted_mode `h]jz)}(hjRh]hdrm_crtc_state.adjusted_mode}(hjRhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjRubh.}(hjRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhKhjmRubh)}(hNOTE:h]hNOTE:}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjmRubh)}(hThis is deprecated, do not use! New drivers shall set their mode in the :c:type:`drm_bridge_funcs.atomic_enable ` operation.h](hHThis is deprecated, do not use! New drivers shall set their mode in the }(hjShhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]jz)}(hjSh]hdrm_bridge_funcs.atomic_enable}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj Subah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjSubh operation.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+ShKhjmRubeh}(h]h ]h"]h$]h&]uh1jhjQRubeh}(h]h ]h"]h$]h&]uh1jmhjlRhKhjKubjn)}(hX``pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **pre_enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_pre_enable `. h](jt)}(h``pre_enable``h]jz)}(hjHSh]h pre_enable}(hjJShhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjFSubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjBSubj)}(hhh](h)}(hXThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjaShhhNhNubj%)}(h**pre_enable**h]h pre_enable}(hjiShhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjaSubh) function. If the preceding element is a }(hjaShhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hj}Sh]h drm_encoder}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj{Subah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhKhjaSubh, it’s called right before the encoder’s }(hjaShhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.enable `h]jz)}(hjSh]hdrm_encoder_helper_funcs.enable}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjSubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjShKhjaSubh, }(hjaShhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.commit `h]jz)}(hjSh]hdrm_encoder_helper_funcs.commit}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjSubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjShKhjaSubh or }(hjaShhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jz)}(hjSh]hdrm_encoder_helper_funcs.dpms}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjSubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjShKhjaSubh hook.}(hjaShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShKhj^Subh)}(hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.h]hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj^Subh)}(h(The **pre_enable** callback is optional.h](hThe }(hjThhhNhNubj%)}(h**pre_enable**h]h pre_enable}(hj%ThhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubh callback is optional.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM hj^Subh)}(hNOTE:h]hNOTE:}(hj>ThhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM hj^Subh)}(hvThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_pre_enable `.h](h6This is deprecated, do not use! New drivers shall use }(hjMThhhNhNubh)}(h?:c:type:`drm_bridge_funcs.atomic_pre_enable `h]jz)}(hjWTh]h"drm_bridge_funcs.atomic_pre_enable}(hjYThhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjUTubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjMTubh.}(hjMThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjtThMhj^Subeh}(h]h ]h"]h$]h&]uh1jhjBSubeh}(h]h ]h"]h$]h&]uh1jmhj]ShMhjKubjn)}(hX``enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **enable** callback is optional. NOTE: This is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_enable `. h](jt)}(h ``enable``h]jz)}(hjTh]henable}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjTubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM)hjTubj)}(hhh](h)}(hX This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.enable `, :c:type:`drm_encoder_helper_funcs.commit ` or :c:type:`drm_encoder_helper_funcs.dpms ` hook.h](hThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjThhhNhNubj%)}(h **enable**h]henable}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubh) function. If the preceding element is a }(hjThhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjTh]h drm_encoder}(hjThhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjTubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjTubh+ it’s called right after the encoder’s }(hjThhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.enable `h]jz)}(hjTh]hdrm_encoder_helper_funcs.enable}(hjThhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjTubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjThMhjTubh, }(hjThhhNhNubh)}(hD:c:type:`drm_encoder_helper_funcs.commit `h]jz)}(hj Uh]hdrm_encoder_helper_funcs.commit}(hjUhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj Uubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjThMhjTubh or }(hjThhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jz)}(hj0Uh]hdrm_encoder_helper_funcs.dpms}(hj2UhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj.Uubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjThMhjTubh hook.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjThMhjTubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.}(hjWUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjTubh)}(h$The **enable** callback is optional.h](hThe }(hjfUhhhNhNubj%)}(h **enable**h]henable}(hjnUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfUubh callback is optional.}(hjfUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM$hjTubh)}(hNOTE:h]hNOTE:}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM&hjTubh)}(hrThis is deprecated, do not use! New drivers shall use :c:type:`drm_bridge_funcs.atomic_enable `.h](h6This is deprecated, do not use! New drivers shall use }(hjUhhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]jz)}(hjUh]hdrm_bridge_funcs.atomic_enable}(hjUhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjUubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM(hjUubh.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhM(hjTubeh}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jmhjThM)hjKubjn)}(hX``atomic_pre_enable`` This callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called. The **atomic_pre_enable** callback is optional. h](jt)}(h``atomic_pre_enable``h]jz)}(hjUh]hatomic_pre_enable}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjUubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM<hjUubj)}(hhh](h)}(hXThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_pre_enable** or **pre_enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right before the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook.h](hThis callback should enable the bridge. It is called right before the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjUhhhNhNubj%)}(h**atomic_pre_enable**h]hatomic_pre_enable}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubh or }(hjUhhhNhNubj%)}(h**pre_enable**h]h pre_enable}(hj VhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubh) function. If the preceding element is a }(hjUhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hj!Vh]h drm_encoder}(hj#VhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM0hjUubh, it’s called right before the encoder’s }(hjUhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jz)}(hjEVh]h&drm_encoder_helper_funcs.atomic_enable}(hjGVhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCVubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhj>VhM0hjUubh hook.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>VhM0hjUubh)}(hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.h]hThe display pipe (i.e. clocks and timing signals) feeding this bridge will not yet be running when this callback is called. The bridge must not enable the display link feeding the next bridge in the chain (if there is one) when this callback is called.}(hjlVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM7hjUubh)}(h/The **atomic_pre_enable** callback is optional.h](hThe }(hj{VhhhNhNubj%)}(h**atomic_pre_enable**h]hatomic_pre_enable}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{Vubh callback is optional.}(hj{VhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhM<hjUubeh}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jmhjUhM<hjKubjn)}(hX``atomic_enable`` This callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one. The **atomic_enable** callback is optional. h](jt)}(h``atomic_enable``h]jz)}(hjVh]h atomic_enable}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMPhjVubj)}(hhh](h)}(hXThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_enable** or **enable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_enable ` hook.[h](hThis callback should enable the bridge. It is called right after the preceding element in the display pipe is enabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjVhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubh or }(hjVhhhNhNubj%)}(h **enable**h]henable}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubh) function. If the preceding element is a }(hjVhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjVh]h drm_encoder}(hjVhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMDhjVubh+ it’s called right after the encoder’s }(hjVhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jz)}(hjWh]h&drm_encoder_helper_funcs.atomic_enable}(hjWhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjWhMDhjVubh hook.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjWhMDhjVubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called. This callback must enable the display link feeding the next bridge in the chain if there is one.}(hj?WhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMKhjVubh)}(h+The **atomic_enable** callback is optional.h](hThe }(hjNWhhhNhNubj%)}(h**atomic_enable**h]h atomic_enable}(hjVWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNWubh callback is optional.}(hjNWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVhMPhjVubeh}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjVhMPhjKubjn)}(hXa``atomic_disable`` This callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called. The **atomic_disable** callback is optional. h](jt)}(h``atomic_disable``h]jz)}(hjWh]hatomic_disable}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~Wubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMahjzWubj)}(hhh](h)}(hXThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called before that bridge's **atomic_disable** or **disable** vfunc. If the preceding element is a :c:type:`drm_encoder` it's called right before the :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook.h](hThis callback should disable the bridge. It is called right before the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called before that bridge’s }(hjWhhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubh or }(hjWhhhNhNubj%)}(h **disable**h]hdisable}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubh& vfunc. If the preceding element is a }(hjWhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjWh]h drm_encoder}(hjWhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMWhjWubh it’s called right before the }(hjWhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jz)}(hjWh]h'drm_encoder_helper_funcs.atomic_disable}(hjWhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjWhMWhjWubh hook.}(hjWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjWhMWhjWubh)}(hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.h]hThe bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is still running when this callback is called.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM^hjWubh)}(h,The **atomic_disable** callback is optional.h](hThe }(hj!XhhhNhNubj%)}(h**atomic_disable**h]hatomic_disable}(hj)XhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!Xubh callback is optional.}(hj!XhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjWhMahjWubeh}(h]h ]h"]h$]h&]uh1jhjzWubeh}(h]h ]h"]h$]h&]uh1jmhjWhMahjKubjn)}(hX``atomic_post_disable`` This callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook. The bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called. The **atomic_post_disable** callback is optional. h](jt)}(h``atomic_post_disable``h]jz)}(hjSXh]hatomic_post_disable}(hjUXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjQXubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMthjMXubj)}(hhh](h)}(hXThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it's called after that bridge's **atomic_post_disable** or **post_disable** function. If the preceding element is a :c:type:`drm_encoder` it's called right after the encoder's :c:type:`drm_encoder_helper_funcs.atomic_disable ` hook.h](hThis callback should disable the bridge. It is called right after the preceding element in the display pipe is disabled. If the preceding element is a bridge this means it’s called after that bridge’s }(hjlXhhhNhNubj%)}(h**atomic_post_disable**h]hatomic_post_disable}(hjtXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlXubh or }(hjlXhhhNhNubj%)}(h**post_disable**h]h post_disable}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlXubh) function. If the preceding element is a }(hjlXhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjXh]h drm_encoder}(hjXhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMihjlXubh+ it’s called right after the encoder’s }(hjlXhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jz)}(hjXh]h'drm_encoder_helper_funcs.atomic_disable}(hjXhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjXhMihjlXubh hook.}(hjlXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXhMihjiXubh)}(hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.h]hThe bridge must assume that the display pipe (i.e. clocks and timing signals) feeding it is no longer running when this callback is called.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMphjiXubh)}(h1The **atomic_post_disable** callback is optional.h](hThe }(hjXhhhNhNubj%)}(h**atomic_post_disable**h]hatomic_post_disable}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubh callback is optional.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhXhMthjiXubeh}(h]h ]h"]h$]h&]uh1jhjMXubeh}(h]h ]h"]h$]h&]uh1jmhjhXhMthjKubjn)}(hX``atomic_duplicate_state`` Duplicate the current bridge state object (which is guaranteed to be non-NULL). The atomic_duplicate_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_duplicate_state() helper function shall be used to implement this hook. RETURNS: A valid drm_bridge_state object or NULL if the allocation fails. h](jt)}(h``atomic_duplicate_state``h]jz)}(hj&Yh]hatomic_duplicate_state}(hj(YhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$Yubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj Yubj)}(hhh](h)}(hODuplicate the current bridge state object (which is guaranteed to be non-NULL).h]hODuplicate the current bridge state object (which is guaranteed to be non-NULL).}(hj?YhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM|hj`. The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook. h](jt)}(h``atomic_destroy_state``h]jz)}(hjYh]hatomic_destroy_state}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjYubj)}(hhh](h)}(hDestroy a bridge state object previously allocated by :c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `.h](h6Destroy a bridge state object previously allocated by }(hjYhhhNhNubh)}(hH:c:type:`drm_bridge_funcs.atomic_duplicate_state\(\) `h]jz)}(hjYh]h)drm_bridge_funcs.atomic_duplicate_state()}(hjYhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjYubh.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMhjYubh)}(hX$The atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook.h](hThe atomic_destroy_state hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don’t subclass }(hjYhhhNhNubh)}(h:c:type:`drm_bridge_state`h]jz)}(hjYh]hdrm_bridge_state}(hjYhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjYubhd, the drm_atomic_helper_bridge_destroy_state() helper function shall be used to implement this hook.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZhMhjYubeh}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jmhjYhMhjKubjn)}(hXi``atomic_get_output_bus_fmts`` Return the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). This method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise. h](jt)}(h``atomic_get_output_bus_fmts``h]jz)}(hj0Zh]hatomic_get_output_bus_fmts}(hj2ZhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.Zubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj*Zubj)}(hhh](h)}(hXReturn the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works).h]hXReturn the supported bus formats on the output end of a bridge. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_output_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works).}(hjIZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjFZubh)}(hXThis method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in :c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `.bus_formats[0] if :c:type:`drm_connector.display_info `.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise.h](hThis method is only called on the last element of the bridge chain as part of the bus format negotiation process that happens in }(hjXZhhhNhNubh)}(h:c:type:`drm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info `h]jz)}(hjbZh]hdrm_atomic_bridge_chain_select_bus_fmts`(). This method is optional. When not implemented, the core will fall back to :c:type:`drm_connector.display_info}(hjdZhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj`Zubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjXZubh.bus_formats[0] if }(hjXZhhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]jz)}(hjZh]hdrm_connector.display_info}(hjZhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjZhMhjXZubh:.num_bus_formats > 0, or to MEDIA_BUS_FMT_FIXED otherwise.}(hjXZhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjZhMhjFZubeh}(h]h ]h"]h$]h&]uh1jhj*Zubeh}(h]h ]h"]h$]h&]uh1jmhjEZhMhjKubjn)}(hXL``atomic_get_input_bus_fmts`` Return the supported bus formats on the input end of a bridge for a specific output bus format. The returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0. This method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format. Bridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...) Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately. h](jt)}(h``atomic_get_input_bus_fmts``h]jz)}(hjZh]hatomic_get_input_bus_fmts}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjZubj)}(hhh](h)}(h_Return the supported bus formats on the input end of a bridge for a specific output bus format.h]h_Return the supported bus formats on the input end of a bridge for a specific output bus format.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjZubh)}(hXThe returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0.h]hXThe returned array must be allocated with kmalloc() and will be freed by the caller. If the allocation fails, NULL should be returned. num_input_fmts must be set to the returned array size. Formats listed in the returned array should be listed in decreasing preference order (the core will try all formats until it finds one that works). When the format is not supported NULL should be returned and num_input_fmts should be set to 0.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjZubh)}(hXThis method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format.h]hXThis method is called on all elements of the bridge chain as part of the bus format negotiation process that happens in drm_atomic_bridge_chain_select_bus_fmts(). This method is optional. When not implemented, the core will bypass bus format negotiation on this element of the bridge without failing, and the previous element in the chain will be passed MEDIA_BUS_FMT_FIXED as its output bus format.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjZubh)}(hXVBridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, :c:type:`drm_display_mode`, :c:type:`drm_display_info`, ...)h](hXBridge drivers that need to support being linked to bridges that are not supporting bus format negotiation should handle the output_fmt == MEDIA_BUS_FMT_FIXED case appropriately, by selecting a sensible default value or extracting this information from somewhere else (FW property, }(hj[hhhNhNubh)}(h:c:type:`drm_display_mode`h]jz)}(hj[h]hdrm_display_mode}(hj[hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj [ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_display_modeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj[ubh, }(hj[hhhNhNubh)}(h:c:type:`drm_display_info`h]jz)}(hj3[h]hdrm_display_info}(hj5[hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj1[ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_display_infouh1hhj,[hMhj[ubh, ...)}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj,[hMhjZubh)}(hX0Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately.h]hX0Note: Even if input format selection on the first bridge has no impact on the negotiation process (bus format negotiation stops once we reach the first element of the chain), drivers are expected to return accurate input formats as the input format may be used to configure the CRTC output appropriately.}(hjZ[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjZubeh}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jmhjZhMhjKubjn)}(hXg``atomic_check`` This method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly. :c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge). This method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided. If drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain. RETURNS: zero if the check passed, a negative error code otherwise. h](jt)}(h``atomic_check``h]jz)}(hj{[h]h atomic_check}(hj}[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjy[ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhju[ubj)}(hhh](h)}(hThis method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly.h]hThis method is responsible for checking bridge state correctness. It can also check the state of the surrounding components in chain to make sure the whole pipeline can work properly.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj[ubh)}(h:c:type:`drm_bridge_funcs.atomic_check\(\) ` hooks are called in reverse order (from the last to the first bridge).h](h)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jz)}(hj[h]hdrm_bridge_funcs.atomic_check()}(hj[hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj[ubhG hooks are called in reverse order (from the last to the first bridge).}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubh)}(hThis method is optional. :c:type:`drm_bridge_funcs.mode_fixup\(\) ` is not called when :c:type:`drm_bridge_funcs.atomic_check\(\) ` is implemented, so only one of them should be provided.h](hThis method is optional. }(hj[hhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]jz)}(hj[h]hdrm_bridge_funcs.mode_fixup()}(hj[hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj[ubh is not called when }(hj[hhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jz)}(hj[h]hdrm_bridge_funcs.atomic_check()}(hj\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhj[hMhj[ubh8 is implemented, so only one of them should be provided.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubh)}(hXIf drivers need to tweak :c:type:`drm_bridge_state.input_bus_cfg `.flags or :c:type:`drm_bridge_state.output_bus_cfg `.flags it should happen in this function. By default the :c:type:`drm_bridge_state.output_bus_cfg `.flags field is set to the next bridge :c:type:`drm_bridge_state.input_bus_cfg `.flags value or :c:type:`drm_connector.display_info `.bus_flags if the bridge is the last element in the chain.h](hIf drivers need to tweak }(hj&\hhhNhNubh)}(h;:c:type:`drm_bridge_state.input_bus_cfg `h]jz)}(hj0\h]hdrm_bridge_state.input_bus_cfg}(hj2\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj.\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj&\ubh .flags or }(hj&\hhhNhNubh)}(h<:c:type:`drm_bridge_state.output_bus_cfg `h]jz)}(hjT\h]hdrm_bridge_state.output_bus_cfg}(hjV\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjR\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_stateuh1hhjM\hMhj&\ubh9.flags it should happen in this function. By default the }(hj&\hhhNhNubh)}(h<:c:type:`drm_bridge_state.output_bus_cfg `h]jz)}(hjw\h]hdrm_bridge_state.output_bus_cfg}(hjy\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhju\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_stateuh1hhjM\hMhj&\ubh'.flags field is set to the next bridge }(hj&\hhhNhNubh)}(h;:c:type:`drm_bridge_state.input_bus_cfg `h]jz)}(hj\h]hdrm_bridge_state.input_bus_cfg}(hj\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_stateuh1hhjM\hMhj&\ubh.flags value or }(hj&\hhhNhNubh)}(h4:c:type:`drm_connector.display_info `h]jz)}(hj\h]hdrm_connector.display_info}(hj\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjM\hMhj&\ubh:.bus_flags if the bridge is the last element in the chain.}(hj&\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjM\hMhj[ubh)}(hCRETURNS: zero if the check passed, a negative error code otherwise.h]hCRETURNS: zero if the check passed, a negative error code otherwise.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj[ubeh}(h]h ]h"]h$]h&]uh1jhju[ubeh}(h]h ]h"]h$]h&]uh1jmhj[hMhjKubjn)}(hX``atomic_reset`` Reset the bridge to a predefined state (or retrieve its current state) and return a :c:type:`drm_bridge_state` object matching this state. This function is called at attach time. The atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook. Note that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...). 1. The reset operation happens when the bridge is attached, not when drm_mode_config_reset() is called 2. It's meant to be used exclusively on bridges that have been converted to the ATOMIC API RETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise. h](jt)}(h``atomic_reset``h]jz)}(hj]h]h atomic_reset}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj\ubj)}(hhh](h)}(hReset the bridge to a predefined state (or retrieve its current state) and return a :c:type:`drm_bridge_state` object matching this state. This function is called at attach time.h](hTReset the bridge to a predefined state (or retrieve its current state) and return a }(hj]hhhNhNubh)}(h:c:type:`drm_bridge_state`h]jz)}(hj(]h]hdrm_bridge_state}(hj*]hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&]ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj]ubhD object matching this state. This function is called at attach time.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjE]hMhj]ubh)}(hXThe atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don't subclass :c:type:`drm_bridge_state`, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook.h](hThe atomic_reset hook is mandatory if the bridge implements any of the atomic hooks, and should be left unassigned otherwise. For bridges that don’t subclass }(hjP]hhhNhNubh)}(h:c:type:`drm_bridge_state`h]jz)}(hjZ]h]hdrm_bridge_state}(hj\]hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjX]ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_stateuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjP]ubh\, the drm_atomic_helper_bridge_reset() helper function shall be used to implement this hook.}(hjP]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjw]hMhj]ubh)}(hNote that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...).h]hNote that the atomic_reset() semantics is not exactly matching the reset() semantics found on other components (connector, plane, ...).}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj]ubjCH)}(hhh](h)}(hcThe reset operation happens when the bridge is attached, not when drm_mode_config_reset() is calledh]h)}(hcThe reset operation happens when the bridge is attached, not when drm_mode_config_reset() is calledh]hcThe reset operation happens when the bridge is attached, not when drm_mode_config_reset() is called}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM hj]ubah}(h]h ]h"]h$]h&]uh1hhj]ubh)}(hXIt's meant to be used exclusively on bridges that have been converted to the ATOMIC API h]h)}(hWIt's meant to be used exclusively on bridges that have been converted to the ATOMIC APIh]hYIt’s meant to be used exclusively on bridges that have been converted to the ATOMIC API}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM hj]ubah}(h]h ]h"]h$]h&]uh1hhj]ubeh}(h]h ]h"]h$]h&]j?Jj@JjAJhjBJjCJuh1jBHhj]ubh)}(huRETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise.h]huRETURNS: A valid drm_bridge_state object in case of success, an ERR_PTR() giving the reason of the failure otherwise.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj]ubeh}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jmhj]hMhjKubjn)}(hX``detect`` Check if anything is attached to the bridge output. This callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `. RETURNS: drm_connector_status indicating the bridge output status. h](jt)}(h ``detect``h]jz)}(hj]h]hdetect}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM hj]ubj)}(hhh](h)}(h3Check if anything is attached to the bridge output.h]h3Check if anything is attached to the bridge output.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj^ubh)}(hThis callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional, if not implemented the bridge will be considered as always having a component attached to its output. Bridges that implement this callback shall set the DRM_BRIDGE_OP_DETECT flag in their }(hj^hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hj^h]hdrm_bridge->ops}(hj!^hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj^ubh.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj<^hMhj^ubh)}(hRETURNS:h]hRETURNS:}(hjG^hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj^ubh)}(h9drm_connector_status indicating the bridge output status.h]h9drm_connector_status indicating the bridge output status.}(hjV^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hM hj^ubeh}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj^hM hjKubjn)}(hX``get_modes`` Fill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add(). The **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage. RETURNS: The number of modes added by calling drm_mode_probed_add(). h](jt)}(h ``get_modes``h]jz)}(hjv^h]h get_modes}(hjx^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjt^ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM9hjp^ubj)}(hhh](h)}(hhFill all modes currently valid for the sink into the :c:type:`drm_connector` with drm_mode_probed_add().h](h5Fill all modes currently valid for the sink into the }(hj^hhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hj^h]h drm_connector}(hj^hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM(hj^ubh with drm_mode_probed_add().}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hM(hj^ubh)}(hXThe **get_modes** callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave **get_modes** unimplemented and implement the :c:type:`drm_bridge_funcs->edid_read ` callback instead.h](hThe }(hj^hhhNhNubj%)}(h **get_modes**h]h get_modes}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubh callback is mostly intended to support non-probeable displays such as many fixed panels. Bridges that support reading EDID shall leave }(hj^hhhNhNubj%)}(h **get_modes**h]h get_modes}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubh! unimplemented and implement the }(hj^hhhNhNubh)}(h8:c:type:`drm_bridge_funcs->edid_read `h]jz)}(hj^h]hdrm_bridge_funcs->edid_read}(hj^hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM+hj^ubh callback instead.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj _hM+hj^ubh)}(hThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their :c:type:`drm_bridge->ops `.h](heThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_MODES flag in their }(hj_hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hj!_h]hdrm_bridge->ops}(hj#_hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM0hj_ubh.}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>_hM0hj^ubh)}(hThe connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage.h]hThe connector parameter shall be used for the sole purpose of filling modes, and shall not be stored internally by bridge drivers for future usage.}(hjI_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM3hj^ubh)}(hRETURNS:h]hRETURNS:}(hjX_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM7hj^ubh)}(h;The number of modes added by calling drm_mode_probed_add().h]h;The number of modes added by calling drm_mode_probed_add().}(hjg_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hM9hj^ubeh}(h]h ]h"]h$]h&]uh1jhjp^ubeh}(h]h ]h"]h$]h&]uh1jmhj^hM9hjKubjn)}(hX``edid_read`` Read the EDID data of the connected display. The **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented. The caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output. This callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `. The connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage. RETURNS: An edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free(). h](jt)}(h ``edid_read``h]jz)}(hj_h]h edid_read}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMXhj_ubj)}(hhh](h)}(h,Read the EDID data of the connected display.h]h,Read the EDID data of the connected display.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMAhj_ubh)}(hThe **edid_read** callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the **get_modes** callback unimplemented.h](hThe }(hj_hhhNhNubj%)}(h **edid_read**h]h edid_read}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubh callback is the preferred way of reporting mode information for a display connected to the bridge output. Bridges that support reading EDID shall implement this callback and leave the }(hj_hhhNhNubj%)}(h **get_modes**h]h get_modes}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubh callback unimplemented.}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMChj_ubh)}(hThe caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output.h]hThe caller of this operation shall first verify the output connection status and refrain from reading EDID from a disconnected output.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMHhj_ubh)}(hThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their :c:type:`drm_bridge->ops `.h](hdThis callback is optional. Bridges that implement it shall set the DRM_BRIDGE_OP_EDID flag in their }(hj_hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hj_h]hdrm_bridge->ops}(hj_hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMLhj_ubh.}(hj_hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`hMLhj_ubh)}(hThe connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage.h]hThe connector parameter shall be used for the sole purpose of EDID retrieval, and shall not be stored internally by bridge drivers for future usage.}(hj#`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMOhj_ubh)}(hRETURNS:h]hRETURNS:}(hj2`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMShj_ubh)}(hAn edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free().h]hAn edid structure newly allocated with drm_edid_alloc() or returned from drm_edid_read() family of functions on success, or NULL otherwise. The caller is responsible for freeing the returned edid structure with drm_edid_free().}(hjA`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMUhj_ubeh}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj_hMXhjKubjn)}(hX``hpd_notify`` Notify the bridge of hot plug detection. This callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges. h](jt)}(h``hpd_notify``h]jz)}(hjb`h]h hpd_notify}(hjd`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj``ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMehj\`ubj)}(hhh](h)}(h(Notify the bridge of hot plug detection.h]h(Notify the bridge of hot plug detection.}(hj{`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM`hjx`ubh)}(hThis callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges.h]hThis callback is optional, it may be implemented by bridges that need to be notified of display connection or disconnection for internal reasons. One use case is to reset the internal state of CEC controllers for HDMI bridges.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMbhjx`ubeh}(h]h ]h"]h$]h&]uh1jhj\`ubeh}(h]h ]h"]h$]h&]uh1jmhjw`hMehjKubjn)}(hX``hpd_enable`` Enable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hpd_enable``h]jz)}(hj`h]h hpd_enable}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMvhj`ubj)}(hhh](h)}(hEnable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with **hpd_disable**.h](hEnable hot plug detection. From now on the bridge shall call drm_bridge_hpd_notify() each time a change is detected in the output connection status, until hot plug detection gets disabled with }(hj`hhhNhNubj%)}(h**hpd_disable**h]h hpd_disable}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubh.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMnhj`ubh)}(hXThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_disable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the }(hj`hhhNhNubj%)}(h**hpd_disable**h]h hpd_disable}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubh6 callback and set the DRM_BRIDGE_OP_HPD flag in their }(hj`hhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjah]hdrm_bridge->ops}(hjahhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMshj`ubh.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahMshj`ubeh}(h]h ]h"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]uh1jmhj`hMvhjKubjn)}(hX``hpd_disable`` Disable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs. This callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hpd_disable``h]jz)}(hj;ah]h hpd_disable}(hj=ahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9aubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj5aubj)}(hhh](h)}(hDisable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs.h]hDisable hot plug detection. Once this function returns the bridge shall not call drm_bridge_hpd_notify() when a change in the output connection status occurs.}(hjTahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM}hjQaubh)}(hXThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the **hpd_enable** callback and set the DRM_BRIDGE_OP_HPD flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and shall only be implemented by bridges that support hot-plug notification without polling. Bridges that implement it shall also implement the }(hjcahhhNhNubj%)}(h**hpd_enable**h]h hpd_enable}(hjkahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjcaubh6 callback and set the DRM_BRIDGE_OP_HPD flag in their }(hjcahhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjah]hdrm_bridge->ops}(hjahhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj}aubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjcaubh.}(hjcahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahMhjQaubeh}(h]h ]h"]h$]h&]uh1jhj5aubeh}(h]h ]h"]h$]h&]uh1jmhjPahMhjKubjn)}(hX``hdmi_tmds_char_rate_valid`` Check whether a particular TMDS character rate is supported by the driver. This callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. Returns: Either :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `. h](jt)}(h``hdmi_tmds_char_rate_valid``h]jz)}(hjah]hhdmi_tmds_char_rate_valid}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjaubj)}(hhh](h)}(hJCheck whether a particular TMDS character rate is supported by the driver.h]hJCheck whether a particular TMDS character rate is supported by the driver.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjaubh)}(hThis callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional and should only be implemented by the bridges that take part in the HDMI connector implementation. Bridges that implement it shall set the DRM_BRIDGE_OP_HDMI flag in their }(hjahhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjah]hdrm_bridge->ops}(hjahhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjaubh.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjbhMhjaubh)}(hReturns:h]hReturns:}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjaubh)}(hEither :c:type:`drm_mode_status.MODE_OK ` or one of the failure reasons in :c:type:`enum drm_mode_status `.h](hEither }(hj"bhhhNhNubh)}(h3:c:type:`drm_mode_status.MODE_OK `h]jz)}(hj,bh]hdrm_mode_status.MODE_OK}(hj.bhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj*bubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_statusuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj"bubh" or one of the failure reasons in }(hj"bhhhNhNubh)}(h0:c:type:`enum drm_mode_status `h]jz)}(hjPbh]henum drm_mode_status}(hjRbhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjNbubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_statusuh1hhjIbhMhj"bubh.}(hj"bhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIbhMhjaubeh}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jmhjahMhjKubjn)}(h``hdmi_clear_avi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_clear_avi_infoframe``h]jz)}(hjbh]hhdmi_clear_avi_infoframe}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjbubj)}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjbubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hjbhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjbh]hdrm_bridge->ops}(hjbhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjbubh.}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjbhMhjbubeh}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jmhjbhMhjKubjn)}(h``hdmi_write_avi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_write_avi_infoframe``h]jz)}(hjbh]hhdmi_write_avi_infoframe}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjbubj)}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj cubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hjchhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hj'ch]hdrm_bridge->ops}(hj)chhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj%cubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjcubh.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDchMhj cubeh}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jmhj chMhjKubjn)}(h``hdmi_clear_hdmi_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_clear_hdmi_infoframe``h]jz)}(hjach]hhdmi_clear_hdmi_infoframe}(hjcchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_cubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj[cubj)}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjzchhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjwcubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hjchhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjch]hdrm_bridge->ops}(hjchhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjcubh.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchMhjwcubeh}(h]h ]h"]h$]h&]uh1jhj[cubeh}(h]h ]h"]h$]h&]uh1jmhjvchMhjKubjn)}(h``hdmi_write_hdmi_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_write_hdmi_infoframe``h]jz)}(hjch]hhdmi_write_hdmi_infoframe}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjcubj)}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjcubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their :c:type:`drm_bridge->ops `.h](hnThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI flag in their }(hjchhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjch]hdrm_bridge->ops}(hjdhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjcubh.}(hjchhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjdhMhjcubeh}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhjchMhjKubjn)}(hX ``hdmi_clear_hdr_drm_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](jt)}(h ``hdmi_clear_hdr_drm_infoframe``h]jz)}(hj9dh]hhdmi_clear_hdr_drm_infoframe}(hj;dhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7dubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj3dubj)}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjRdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjOdubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their }(hjadhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjkdh]hdrm_bridge->ops}(hjmdhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjidubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjadubh.}(hjadhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjdhMhjOdubeh}(h]h ]h"]h$]h&]uh1jhj3dubeh}(h]h ]h"]h$]h&]uh1jmhjNdhMhjKubjn)}(h``hdmi_write_hdr_drm_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](jt)}(h ``hdmi_write_hdr_drm_infoframe``h]jz)}(hjdh]hhdmi_write_hdr_drm_infoframe}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjdubj)}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjdubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME flag in their }(hjdhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjdh]hdrm_bridge->ops}(hjdhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjdubh.}(hjdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjdhMhjdubeh}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjdhMhjKubjn)}(hX``hdmi_clear_spd_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_clear_spd_infoframe``h]jz)}(hjeh]hhdmi_clear_spd_infoframe}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjeubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj eubj)}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hj*ehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj'eubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](h|This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their }(hj9ehhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjCeh]hdrm_bridge->ops}(hjEehhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAeubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj9eubh.}(hj9ehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`ehMhj'eubeh}(h]h ]h"]h$]h&]uh1jhj eubeh}(h]h ]h"]h$]h&]uh1jmhj&ehMhjKubjn)}(h``hdmi_write_spd_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_write_spd_infoframe``h]jz)}(hj}eh]hhdmi_write_spd_infoframe}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{eubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjweubj)}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjeubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their :c:type:`drm_bridge->ops `.h](h|This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME flag in their }(hjehhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjeh]hdrm_bridge->ops}(hjehhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjeubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjeubh.}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjehMhjeubeh}(h]h ]h"]h$]h&]uh1jhjweubeh}(h]h ]h"]h$]h&]uh1jmhjehMhjKubjn)}(h``hdmi_clear_audio_infoframe`` This callback clears the infoframes in the hardware during commit. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_clear_audio_infoframe``h]jz)}(hjeh]hhdmi_clear_audio_infoframe}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjeubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjeubj)}(hhh](h)}(hBThis callback clears the infoframes in the hardware during commit.h]hBThis callback clears the infoframes in the hardware during commit.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjeubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `.h](htThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their }(hjfhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjfh]hdrm_bridge->ops}(hjfhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjfubh.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj8fhMhjeubeh}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjehMhjKubjn)}(h``hdmi_write_audio_infoframe`` Program the infoframe into the hardware. This callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `. h](jt)}(h``hdmi_write_audio_infoframe``h]jz)}(hjUfh]hhdmi_write_audio_infoframe}(hjWfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjSfubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjOfubj)}(hhh](h)}(h(Program the infoframe into the hardware.h]h(Program the infoframe into the hardware.}(hjnfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkfubh)}(hThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their :c:type:`drm_bridge->ops `.h](htThis callback is optional but it must be implemented by bridges that set the DRM_BRIDGE_OP_HDMI_AUDIO flag in their }(hj}fhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjfh]hdrm_bridge->ops}(hjfhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}fubh.}(hj}fhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjfhMhjkfubeh}(h]h ]h"]h$]h&]uh1jhjOfubeh}(h]h ]h"]h$]h&]uh1jmhjjfhMhjKubjn)}(hX``hdmi_audio_startup`` Called when ASoC starts an audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_audio_startup``h]jz)}(hjfh]hhdmi_audio_startup}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjfubj)}(hhh](h)}(h.Called when ASoC starts an audio stream setup.h]h.Called when ASoC starts an audio stream setup.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM hjfubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjfhhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubh flag in their }(hjfhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjgh]hdrm_bridge->ops}(hjghhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjfubh.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"ghMhjfubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj-ghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjfubeh}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjfhMhjKubjn)}(hXG``hdmi_audio_prepare`` Configures HDMI-encoder for audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_audio_prepare``h]jz)}(hjNgh]hhdmi_audio_prepare}(hjPghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLgubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM"hjHgubj)}(hhh](h)}(hVConfigures HDMI-encoder for audio stream. Can be called multiple times for each setup.h]hVConfigures HDMI-encoder for audio stream. Can be called multiple times for each setup.}(hjgghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjdgubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjvghhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj~ghhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjvgubh flag in their }(hjvghhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjgh]hdrm_bridge->ops}(hjghhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjvgubh.}(hjvghhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjghMhjdgubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM!hjdgubeh}(h]h ]h"]h$]h&]uh1jhjHgubeh}(h]h ]h"]h$]h&]uh1jmhjcghM"hjKubjn)}(hX ``hdmi_audio_shutdown`` Shut down the audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_audio_shutdown``h]jz)}(hjgh]hhdmi_audio_shutdown}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM1hjgubj)}(hhh](h)}(hShut down the audio stream.h]hShut down the audio stream.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM+hjgubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjhhhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj hhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhubh flag in their }(hjhhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjhh]hdrm_bridge->ops}(hj!hhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM-hjhubh.}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_audio_mute_stream``h]jz)}(hjhhh]hhdmi_audio_mute_stream}(hjjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfhubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM?hjbhubj)}(hhh](h)}(hMute/unmute HDMI audio stream.h]hMute/unmute HDMI audio stream.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM9hj~hubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjhhhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhubh flag in their }(hjhhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjhh]hdrm_bridge->ops}(hjhhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM;hjhubh.}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhhM;hj~hubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM>hj~hubeh}(h]h ]h"]h$]h&]uh1jhjbhubeh}(h]h ]h"]h$]h&]uh1jmhj}hhM?hjKubjn)}(hX``hdmi_cec_init`` Initialize CEC part of the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_cec_init``h]jz)}(hjhh]h hdmi_cec_init}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMOhjhubj)}(hhh](h)}(h"Initialize CEC part of the bridge.h]h"Initialize CEC part of the bridge.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMHhj iubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjihhhNhNubj%)}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj%ihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubh flag in their }(hjihhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hj9ih]hdrm_bridge->ops}(hj;ihhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj7iubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMJhjiubh.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjVihMJhj iubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjaihhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMNhj iubeh}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jmhj ihMOhjKubjn)}(hX$``hdmi_cec_enable`` Enable or disable the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_cec_enable``h]jz)}(hjih]hhdmi_cec_enable}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM^hj|iubj)}(hhh](h)}(h4Enable or disable the CEC adapter inside the bridge.h]h4Enable or disable the CEC adapter inside the bridge.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMWhjiubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjihhhNhNubj%)}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubh flag in their }(hjihhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjih]hdrm_bridge->ops}(hjihhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjiubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMYhjiubh.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjihMYhjiubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM]hjiubeh}(h]h ]h"]h$]h&]uh1jhj|iubeh}(h]h ]h"]h$]h&]uh1jmhjihM^hjKubjn)}(hX/``hdmi_cec_log_addr`` Set the logical address of the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_cec_log_addr``h]jz)}(hjjh]hhdmi_cec_log_addr}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj jubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMlhj jubj)}(hhh](h)}(h=Set the logical address of the CEC adapter inside the bridge.h]h=Set the logical address of the CEC adapter inside the bridge.}(hj(jhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMehj%jubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hj7jhhhNhNubj%)}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hj?jhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7jubh flag in their }(hj7jhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjSjh]hdrm_bridge->ops}(hjUjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMghj7jubh.}(hj7jhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjpjhMghj%jubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj{jhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMkhj%jubeh}(h]h ]h"]h$]h&]uh1jhj jubeh}(h]h ]h"]h$]h&]uh1jmhj$jhMlhjKubjn)}(hX/``hdmi_cec_transmit`` Transmit the message using the CEC adapter inside the bridge. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``hdmi_cec_transmit``h]jz)}(hjjh]hhdmi_cec_transmit}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMzhjjubj)}(hhh](h)}(h=Transmit the message using the CEC adapter inside the bridge.h]h=Transmit the message using the CEC adapter inside the bridge.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMshjjubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_HDMI_CEC_ADAPTER** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjjhhhNhNubj%)}(h"**DRM_BRIDGE_OP_HDMI_CEC_ADAPTER**h]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjubh flag in their }(hjjhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjjh]hdrm_bridge->ops}(hjjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMuhjjubh.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjjhMuhjjubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMyhjjubeh}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjjhMzhjKubjn)}(hX"``dp_audio_startup`` Called when ASoC starts a DisplayPort audio stream setup. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``dp_audio_startup``h]jz)}(hj)kh]hdp_audio_startup}(hj+khhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'kubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj#kubj)}(hhh](h)}(h9Called when ASoC starts a DisplayPort audio stream setup.h]h9Called when ASoC starts a DisplayPort audio stream setup.}(hjBkhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj?kubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjQkhhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjYkhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQkubh flag in their }(hjQkhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjmkh]hdrm_bridge->ops}(hjokhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjkkubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjQkubh.}(hjQkhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjkhMhj?kubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj?kubeh}(h]h ]h"]h$]h&]uh1jhj#kubeh}(h]h ]h"]h$]h&]uh1jmhj>khMhjKubjn)}(hX>``dp_audio_prepare`` Configures DisplayPort audio stream. Can be called multiple times for each setup. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``dp_audio_prepare``h]jz)}(hjkh]hdp_audio_prepare}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubj)}(hhh](h)}(hQConfigures DisplayPort audio stream. Can be called multiple times for each setup.h]hQConfigures DisplayPort audio stream. Can be called multiple times for each setup.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjkhhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjkubh flag in their }(hjkhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjkh]hdrm_bridge->ops}(hjkhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubh.}(hjkhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjlhMhjkubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hj"lhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubeh}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjkhMhjKubjn)}(hX``dp_audio_shutdown`` Shut down the DisplayPort audio stream. This callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``dp_audio_shutdown``h]jz)}(hjClh]hdp_audio_shutdown}(hjElhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAlubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj=lubj)}(hhh](h)}(h'Shut down the DisplayPort audio stream.h]h'Shut down the DisplayPort audio stream.}(hj\lhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjYlubh)}(hThis callback is optional but it must be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hMThis callback is optional but it must be implemented by bridges that set the }(hjklhhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjslhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjklubh flag in their }(hjklhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjlh]hdrm_bridge->ops}(hjlhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjklubh.}(hjklhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjlhMhjYlubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjYlubeh}(h]h ]h"]h$]h&]uh1jhj=lubeh}(h]h ]h"]h$]h&]uh1jmhjXlhMhjKubjn)}(hX``dp_audio_mute_stream`` Mute/unmute DisplayPort audio stream. This callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `. Returns: 0 on success, a negative error code otherwise h](jt)}(h``dp_audio_mute_stream``h]jz)}(hjlh]hdp_audio_mute_stream}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjlubj)}(hhh](h)}(h%Mute/unmute DisplayPort audio stream.h]h%Mute/unmute DisplayPort audio stream.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjlubh)}(hThis callback is optional, it can be implemented by bridges that set the **DRM_BRIDGE_OP_DP_AUDIO** flag in their :c:type:`drm_bridge->ops `.h](hIThis callback is optional, it can be implemented by bridges that set the }(hjlhhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubh flag in their }(hjlhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjmh]hdrm_bridge->ops}(hjmhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjlubh.}(hjlhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1mhMhjlubh)}(h6Returns: 0 on success, a negative error code otherwiseh]h6Returns: 0 on success, a negative error code otherwise}(hjbus_flags `. ``setup_time_ps`` Defines the time in picoseconds the input data lines must be stable before the clock edge. ``hold_time_ps`` Defines the time in picoseconds taken for the bridge to sample the input signal after the clock edge. ``dual_link`` True if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubh:}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjnubj@)}(hxstruct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; };h]hxstruct drm_bridge_timings { u32 input_bus_flags; u32 setup_time_ps; u32 hold_time_ps; bool dual_link; };}hj6nsbah}(h]h ]h"]h$]h&]jjuh1j?h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjnubh)}(h **Members**h]j%)}(hjGnh]hMembers}(hjInhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEnubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjnubji)}(hhh](jn)}(h``input_bus_flags`` Tells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `. h](jt)}(h``input_bus_flags``h]jz)}(hjfnh]hinput_bus_flags}(hjhnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdnubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj`nubj)}(hhh]h)}(hTells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also :c:type:`drm_display_info->bus_flags `.h](hyTells what additional settings for the pixel data on the bus this bridge requires (like pixel signal polarity). See also }(hjnhhhNhNubh)}(h8:c:type:`drm_display_info->bus_flags `h]jz)}(hjnh]hdrm_display_info->bus_flags}(hjnhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_display_infouh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjnubh.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjnhMhj|nubah}(h]h ]h"]h$]h&]uh1jhj`nubeh}(h]h ]h"]h$]h&]uh1jmhj{nhMhj]nubjn)}(hm``setup_time_ps`` Defines the time in picoseconds the input data lines must be stable before the clock edge. h](jt)}(h``setup_time_ps``h]jz)}(hjnh]h setup_time_ps}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjnubj)}(hhh]h)}(hZDefines the time in picoseconds the input data lines must be stable before the clock edge.h]hZDefines the time in picoseconds the input data lines must be stable before the clock edge.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjnubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjnhMhj]nubjn)}(hw``hold_time_ps`` Defines the time in picoseconds taken for the bridge to sample the input signal after the clock edge. h](jt)}(h``hold_time_ps``h]jz)}(hjnh]h hold_time_ps}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjnubj)}(hhh]h)}(heDefines the time in picoseconds taken for the bridge to sample the input signal after the clock edge.h]heDefines the time in picoseconds taken for the bridge to sample the input signal after the clock edge.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjoubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjohMhj]nubjn)}(h``dual_link`` True if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h](jt)}(h ``dual_link``h]jz)}(hj7oh]h dual_link}(hj9ohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5oubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj1oubj)}(hhh]h)}(hTrue if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.h]hTrue if the bus operates in dual-link mode. The exact meaning is dependent on the bus type. For LVDS buses, this indicates that even- and odd-numbered pixels are received on separate links.}(hjPohhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjMoubah}(h]h ]h"]h$]h&]uh1jhj1oubeh}(h]h ]h"]h$]h&]uh1jmhjLohMhj]nubeh}(h]h ]h"]h$]h&]uh1jhhjnubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge_ops (C enum)c.drm_bridge_opshNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hdrm_bridge_opsh]j)}(henum drm_bridge_opsh](j)}(hj8h]henum}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhjohMubj)}(hdrm_bridge_opsh]j)}(hjoh]hdrm_bridge_ops}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubah}(h]h ](jjeh"]h$]h&]jjuh1jhjohhhjohMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjohhhjohMubah}(h]joah ](jjeh"]h$]h&]jj)jhuh1jhjohMhjohhubj)}(hhh]h)}(h-Bitmask of operations supported by the bridgeh]h-Bitmask of operations supported by the bridge}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjohhubah}(h]h ]h"]h$]h&]uh1jhjohhhjohMubeh}(h]h ](jenumeh"]h$]h&]jjjjojjojjjuh1jhhhj'JhNhNubj)}(hX**Constants** ``DRM_BRIDGE_OP_DETECT`` The bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback. ``DRM_BRIDGE_OP_EDID`` The bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback. ``DRM_BRIDGE_OP_HPD`` The bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically. ``DRM_BRIDGE_OP_MODES`` The bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback. ``DRM_BRIDGE_OP_HDMI`` The bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. ``DRM_BRIDGE_OP_HDMI_AUDIO`` The bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag. ``DRM_BRIDGE_OP_DP_AUDIO`` The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag. ``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER`` The bridge requires CEC notifier to be present. ``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER`` The bridge requires CEC adapter to be present. ``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks. ``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](h)}(h **Constants**h]j%)}(hjoh]h Constants}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjoubji)}(hhh](jn)}(h``DRM_BRIDGE_OP_DETECT`` The bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback. h](jt)}(h``DRM_BRIDGE_OP_DETECT``h]jz)}(hjph]hDRM_BRIDGE_OP_DETECT}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjpubj)}(hhh]h)}(hThe bridge can detect displays connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->detect ` callback.h](hgThe bridge can detect displays connected to its output. Bridges that set this flag shall implement the }(hj-phhhNhNubh)}(h5:c:type:`drm_bridge_funcs->detect `h]jz)}(hj7ph]hdrm_bridge_funcs->detect}(hj9phhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj5pubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj-pubh callback.}(hj-phhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjTphMhj*pubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhj)phMhj pubjn)}(h``DRM_BRIDGE_OP_EDID`` The bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback. h](jt)}(h``DRM_BRIDGE_OP_EDID``h]jz)}(hjqph]hDRM_BRIDGE_OP_EDID}(hjsphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjopubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkpubj)}(hhh]h)}(hThe bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->edid_read ` callback.h](hxThe bridge can retrieve the EDID of the display connected to its output. Bridges that set this flag shall implement the }(hjphhhNhNubh)}(h8:c:type:`drm_bridge_funcs->edid_read `h]jz)}(hjph]hdrm_bridge_funcs->edid_read}(hjphhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjpubh callback.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjphMhjpubah}(h]h ]h"]h$]h&]uh1jhjkpubeh}(h]h ]h"]h$]h&]uh1jmhjphMhj pubjn)}(hXX``DRM_BRIDGE_OP_HPD`` The bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically. h](jt)}(h``DRM_BRIDGE_OP_HPD``h]jz)}(hjph]hDRM_BRIDGE_OP_HPD}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjpubj)}(hhh]h)}(hXAThe bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->hpd_enable ` and :c:type:`drm_bridge_funcs->hpd_disable ` callbacks if they support enabling and disabling hot-plug detection dynamically.h](hxThe bridge can detect hot-plug and hot-unplug without requiring polling. Bridges that set this flag shall implement the }(hjphhhNhNubh)}(h9:c:type:`drm_bridge_funcs->hpd_enable `h]jz)}(hjph]hdrm_bridge_funcs->hpd_enable}(hjphhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjpubh and }(hjphhhNhNubh)}(h::c:type:`drm_bridge_funcs->hpd_disable `h]jz)}(hjqh]hdrm_bridge_funcs->hpd_disable}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjqhMhjpubhQ callbacks if they support enabling and disabling hot-plug detection dynamically.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhMhjpubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhjphMhj pubjn)}(hX.``DRM_BRIDGE_OP_MODES`` The bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback. h](jt)}(h``DRM_BRIDGE_OP_MODES``h]jz)}(hjNqh]hDRM_BRIDGE_OP_MODES}(hjPqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLqubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjHqubj)}(hhh]h)}(hXThe bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by **DRM_BRIDGE_OP_EDID**. Bridges that set this flag shall implement the :c:type:`drm_bridge_funcs->get_modes ` callback.h](hThe bridge can retrieve the modes supported by the display at its output. This does not include reading EDID which is separately covered by }(hjgqhhhNhNubj%)}(h**DRM_BRIDGE_OP_EDID**h]hDRM_BRIDGE_OP_EDID}(hjoqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjgqubh1. Bridges that set this flag shall implement the }(hjgqhhhNhNubh)}(h8:c:type:`drm_bridge_funcs->get_modes `h]jz)}(hjqh]hdrm_bridge_funcs->get_modes}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjgqubh callback.}(hjgqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhMhjdqubah}(h]h ]h"]h$]h&]uh1jhjHqubeh}(h]h ]h"]h$]h&]uh1jmhjcqhMhj pubjn)}(hXh``DRM_BRIDGE_OP_HDMI`` The bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. h](jt)}(h``DRM_BRIDGE_OP_HDMI``h]jz)}(hjqh]hDRM_BRIDGE_OP_HDMI}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjqubj)}(hhh](h)}(hXThe bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the :c:type:`drm_bridge_funcs->clear_avi_infoframe `, :c:type:`drm_bridge_funcs->write_avi_infoframe `, :c:type:`drm_bridge_funcs->clear_hdmi_infoframe ` and :c:type:`drm_bridge_funcs->write_hdmi_infoframe ` callbacks.h](hThe bridge provides HDMI connector operations, including infoframes support. Bridges that set this flag must provide HDMI-related information and implement the }(hjqhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->clear_avi_infoframe `h]jz)}(hjqh]h%drm_bridge_funcs->clear_avi_infoframe}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjqubh, }(hjqhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->write_avi_infoframe `h]jz)}(hjrh]h%drm_bridge_funcs->write_avi_infoframe}(hjrhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjqhMhjqubh, }hjqsbh)}(hC:c:type:`drm_bridge_funcs->clear_hdmi_infoframe `h]jz)}(hj'rh]h&drm_bridge_funcs->clear_hdmi_infoframe}(hj)rhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj%rubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjqhMhjqubh and }(hjqhhhNhNubh)}(hC:c:type:`drm_bridge_funcs->write_hdmi_infoframe `h]jz)}(hjJrh]h&drm_bridge_funcs->write_hdmi_infoframe}(hjLrhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHrubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjqhMhjqubh callbacks.}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjqhMhjqubh)}(hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers.h]hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers.}(hjqrhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjqubeh}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjqhMhj pubjn)}(hX ``DRM_BRIDGE_OP_HDMI_AUDIO`` The bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag. h](jt)}(h``DRM_BRIDGE_OP_HDMI_AUDIO``h]jz)}(hjrh]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubj)}(hhh](h)}(hXThe bridge provides HDMI audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->hdmi_audio_prepare ` and :c:type:`drm_bridge_funcs->hdmi_audio_shutdown ` callbacks. If the bridge implements **DRM_BRIDGE_OP_HDMI**, it also must implement :c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe ` callbacks.h](hYThe bridge provides HDMI audio operations. Bridges that set this flag must implement the }(hjrhhhNhNubh)}(hA:c:type:`drm_bridge_funcs->hdmi_audio_prepare `h]jz)}(hjrh]h$drm_bridge_funcs->hdmi_audio_prepare}(hjrhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubh and }(hjrhhhNhNubh)}(hB:c:type:`drm_bridge_funcs->hdmi_audio_shutdown `h]jz)}(hjrh]h%drm_bridge_funcs->hdmi_audio_shutdown}(hjrhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjrhMhjrubh% callbacks. If the bridge implements }(hjrhhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubh, it also must implement }(hjrhhhNhNubh)}(hI:c:type:`drm_bridge_funcs->hdmi_write_audio_infoframe `h]jz)}(hjsh]h,drm_bridge_funcs->hdmi_write_audio_infoframe}(hjshhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj subah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjrhMhjrubh and }hjrsbh)}(hJ:c:type:`drm_bridge_funcs->hdmi_cleaer_audio_infoframe `h]jz)}(hj1sh]h-drm_bridge_funcs->hdmi_cleaer_audio_infoframe}(hj3shhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj/subah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjrhMhjrubh callbacks.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjrhMhjrubh)}(hXNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_DP_AUDIO** if there is a bridge that sets this flag.h](hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets }(hjXshhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj`shhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXsubh* if there is a bridge that sets this flag.}(hjXshhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubeh}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jmhjrhMhj pubjn)}(hX$``DRM_BRIDGE_OP_DP_AUDIO`` The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks. Note: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag. h](jt)}(h``DRM_BRIDGE_OP_DP_AUDIO``h]jz)}(hjsh]hDRM_BRIDGE_OP_DP_AUDIO}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM+hjsubj)}(hhh](h)}(hThe bridge provides DisplayPort audio operations. Bridges that set this flag must implement the :c:type:`drm_bridge_funcs->dp_audio_prepare ` and :c:type:`drm_bridge_funcs->dp_audio_shutdown ` callbacks.h](h`The bridge provides DisplayPort audio operations. Bridges that set this flag must implement the }(hjshhhNhNubh)}(h?:c:type:`drm_bridge_funcs->dp_audio_prepare `h]jz)}(hjsh]h"drm_bridge_funcs->dp_audio_prepare}(hjshhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM"hjsubh and }(hjshhhNhNubh)}(h@:c:type:`drm_bridge_funcs->dp_audio_shutdown `h]jz)}(hjsh]h#drm_bridge_funcs->dp_audio_shutdown}(hjshhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjshM"hjsubh callbacks.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjshM"hjsubh)}(hXNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets **DRM_BRIDGE_OP_HDMI_AUDIO** if there is a bridge that sets this flag.h](hNote: currently there can be at most one bridge in a chain that sets this bit. This is to simplify corresponding glue code in connector drivers. Also it is not possible to have a bridge in the chain that sets }(hjshhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubh* if there is a bridge that sets this flag.}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM'hjsubeh}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhjshM+hj pubjn)}(hT``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER`` The bridge requires CEC notifier to be present. h](jt)}(h#``DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER``h]jz)}(hj,th]hDRM_BRIDGE_OP_HDMI_CEC_NOTIFIER}(hj.thhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*tubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM/hj&tubj)}(hhh]h)}(h/The bridge requires CEC notifier to be present.h]h/The bridge requires CEC notifier to be present.}(hjEthhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM.hjBtubah}(h]h ]h"]h$]h&]uh1jhj&tubeh}(h]h ]h"]h$]h&]uh1jmhjAthM/hj pubjn)}(hR``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER`` The bridge requires CEC adapter to be present. h](jt)}(h"``DRM_BRIDGE_OP_HDMI_CEC_ADAPTER``h]jz)}(hjfth]hDRM_BRIDGE_OP_HDMI_CEC_ADAPTER}(hjhthhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdtubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM3hj`tubj)}(hhh]h)}(h.The bridge requires CEC adapter to be present.h]h.The bridge requires CEC adapter to be present.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM2hj|tubah}(h]h ]h"]h$]h&]uh1jhj`tubeh}(h]h ]h"]h$]h&]uh1jmhj{thM3hj pubjn)}(h``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks. h](jt)}(h(``DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME``h]jz)}(hjth]h$DRM_BRIDGE_OP_HDMI_HDR_DRM_INFOFRAME}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjtubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM8hjtubj)}(hhh]h)}(hThe bridge supports :c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe ` callbacks.h](hThe bridge supports }(hjthhhNhNubh)}(hK:c:type:`drm_bridge_funcs->hdmi_write_hdr_drm_infoframe `h]jz)}(hjth]h.drm_bridge_funcs->hdmi_write_hdr_drm_infoframe}(hjthhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjtubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM6hjtubh and }(hjthhhNhNubh)}(hK:c:type:`drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe `h]jz)}(hjth]h.drm_bridge_funcs->hdmi_clear_hdr_drm_infoframe}(hjthhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjtubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjthM6hjtubh callbacks.}(hjthhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjthM6hjtubah}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jmhjthM8hj pubjn)}(h``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME`` The bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](jt)}(h$``DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME``h]jz)}(hj uh]h DRM_BRIDGE_OP_HDMI_SPD_INFOFRAME}(hj"uhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM<hjuubj)}(hhh]h)}(hThe bridge supports :c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe ` and :c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe ` callbacks.h](hThe bridge supports }(hj9uhhhNhNubh)}(hG:c:type:`drm_bridge_funcs->hdmi_write_spd_infoframe `h]jz)}(hjCuh]h*drm_bridge_funcs->hdmi_write_spd_infoframe}(hjEuhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAuubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM;hj9uubh and }(hj9uhhhNhNubh)}(hG:c:type:`drm_bridge_funcs->hdmi_clear_spd_infoframe `h]jz)}(hjguh]h*drm_bridge_funcs->hdmi_clear_spd_infoframe}(hjiuhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjeuubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhj`uhM;hj9uubh callbacks.}(hj9uhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`uhM;hj6uubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jmhj5uhM<hj pubeh}(h]h ]h"]h$]h&]uh1jhhjoubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge (C struct) c.drm_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h drm_bridgeh]j)}(hstruct drm_bridgeh](j)}(hjh]hstruct}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMBubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuhhhjuhMBubj)}(h drm_bridgeh]j)}(hjuh]h drm_bridge}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ](jjeh"]h$]h&]jjuh1jhjuhhhjuhMBubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjuhhhjuhMBubah}(h]juah ](jjeh"]h$]h&]jj)jhuh1jhjuhMBhjuhhubj)}(hhh]h)}(h$central DRM bridge control structureh]h$central DRM bridge control structure}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMJhjuhhubah}(h]h ]h"]h$]h&]uh1jhjuhhhjuhMBubeh}(h]h ](jstructeh"]h$]h&]jjjjvjjvjjjuh1jhhhj'JhNhNubj)}(hX**Definition**:: struct drm_bridge { struct drm_private_obj base; struct drm_device *dev; struct drm_encoder *encoder; struct list_head chain_node; struct device_node *of_node; struct list_head list; const struct drm_bridge_timings *timings; const struct drm_bridge_funcs *funcs; void *container; struct kref refcount; bool unplugged; void *driver_private; enum drm_bridge_ops ops; int type; bool interlace_allowed; bool ycbcr_420_allowed; bool pre_enable_prev_first; bool support_hdcp; struct i2c_adapter *ddc; const char *vendor; const char *product; unsigned int supported_formats; unsigned int max_bpc; struct device *hdmi_cec_dev; struct device *hdmi_audio_dev; int hdmi_audio_max_i2s_playback_channels; u64 hdmi_audio_i2s_formats; unsigned int hdmi_audio_spdif_playback : 1; int hdmi_audio_dai_port; const char *hdmi_cec_adapter_name; u8 hdmi_cec_available_las; struct mutex hpd_mutex; void (*hpd_cb)(void *data, enum drm_connector_status status); void *hpd_data; struct drm_bridge *next_bridge; }; **Members** ``base`` inherit from :c:type:`drm_private_object` ``dev`` DRM device this bridge belongs to ``encoder`` encoder to which this bridge is connected ``chain_node`` used to form a bridge chain ``of_node`` device node pointer to the bridge ``list`` to keep track of all added bridges ``timings`` the timing specification for the bridge, if any (may be NULL) ``funcs`` control functions ``container`` Pointer to the private driver struct embedding this **struct** drm_bridge. ``refcount`` reference count of users referencing this bridge. ``unplugged`` Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug(). ``driver_private`` pointer to the bridge driver's internal context ``ops`` bitmask of operations supported by the bridge ``type`` Type of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display. ``interlace_allowed`` Indicate that the bridge can handle interlaced modes. ``ycbcr_420_allowed`` Indicate that the bridge can handle YCbCr 420 output. ``pre_enable_prev_first`` The bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral. ``support_hdcp`` Indicate that the bridge supports HDCP. ``ddc`` Associated I2C adapter for DDC access, if any. ``vendor`` Vendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. ``product`` Name of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. ``supported_formats`` Bitmask of **hdmi_colorspace** listing supported output formats. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. ``max_bpc`` Maximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. ``hdmi_cec_dev`` device to be used as a containing device for CEC functions. ``hdmi_audio_dev`` device to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set. ``hdmi_audio_max_i2s_playback_channels`` maximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. ``hdmi_audio_i2s_formats`` supported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. ``hdmi_audio_spdif_playback`` set if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. ``hdmi_audio_dai_port`` sound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used. ``hdmi_cec_adapter_name`` the name of the adapter to register ``hdmi_cec_available_las`` number of logical addresses, CEC_MAX_LOG_ADDRS if unset ``hpd_mutex`` Protects the **hpd_cb** and **hpd_data** fields. ``hpd_cb`` Hot plug detection callback, registered with drm_bridge_hpd_enable(). ``hpd_data`` Private data passed to the Hot plug detection callback **hpd_cb**. ``next_bridge`` Pointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj&vhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"vubh:}(hj"vhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMNhjvubj@)}(hXgstruct drm_bridge { struct drm_private_obj base; struct drm_device *dev; struct drm_encoder *encoder; struct list_head chain_node; struct device_node *of_node; struct list_head list; const struct drm_bridge_timings *timings; const struct drm_bridge_funcs *funcs; void *container; struct kref refcount; bool unplugged; void *driver_private; enum drm_bridge_ops ops; int type; bool interlace_allowed; bool ycbcr_420_allowed; bool pre_enable_prev_first; bool support_hdcp; struct i2c_adapter *ddc; const char *vendor; const char *product; unsigned int supported_formats; unsigned int max_bpc; struct device *hdmi_cec_dev; struct device *hdmi_audio_dev; int hdmi_audio_max_i2s_playback_channels; u64 hdmi_audio_i2s_formats; unsigned int hdmi_audio_spdif_playback : 1; int hdmi_audio_dai_port; const char *hdmi_cec_adapter_name; u8 hdmi_cec_available_las; struct mutex hpd_mutex; void (*hpd_cb)(void *data, enum drm_connector_status status); void *hpd_data; struct drm_bridge *next_bridge; };h]hXgstruct drm_bridge { struct drm_private_obj base; struct drm_device *dev; struct drm_encoder *encoder; struct list_head chain_node; struct device_node *of_node; struct list_head list; const struct drm_bridge_timings *timings; const struct drm_bridge_funcs *funcs; void *container; struct kref refcount; bool unplugged; void *driver_private; enum drm_bridge_ops ops; int type; bool interlace_allowed; bool ycbcr_420_allowed; bool pre_enable_prev_first; bool support_hdcp; struct i2c_adapter *ddc; const char *vendor; const char *product; unsigned int supported_formats; unsigned int max_bpc; struct device *hdmi_cec_dev; struct device *hdmi_audio_dev; int hdmi_audio_max_i2s_playback_channels; u64 hdmi_audio_i2s_formats; unsigned int hdmi_audio_spdif_playback : 1; int hdmi_audio_dai_port; const char *hdmi_cec_adapter_name; u8 hdmi_cec_available_las; struct mutex hpd_mutex; void (*hpd_cb)(void *data, enum drm_connector_status status); void *hpd_data; struct drm_bridge *next_bridge; };}hj?vsbah}(h]h ]h"]h$]h&]jjuh1j?h]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMPhjvubh)}(h **Members**h]j%)}(hjPvh]hMembers}(hjRvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNvubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMvhjvubji)}(hhh](jn)}(h3``base`` inherit from :c:type:`drm_private_object` h](jt)}(h``base``h]jz)}(hjovh]hbase}(hjqvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmvubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMNhjivubj)}(hhh]h)}(h)inherit from :c:type:`drm_private_object`h](h inherit from }(hjvhhhNhNubh)}(h:c:type:`drm_private_object`h]jz)}(hjvh]hdrm_private_object}(hjvhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_private_objectuh1hhjvhMNhjvubeh}(h]h ]h"]h$]h&]uh1hhjvhMNhjvubah}(h]h ]h"]h$]h&]uh1jhjivubeh}(h]h ]h"]h$]h&]uh1jmhjvhMNhjfvubjn)}(h*``dev`` DRM device this bridge belongs to h](jt)}(h``dev``h]jz)}(hjvh]hdev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMPhjvubj)}(hhh]h)}(h!DRM device this bridge belongs toh]h!DRM device this bridge belongs to}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMPhjvubah}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]uh1jmhjvhMPhjfvubjn)}(h6``encoder`` encoder to which this bridge is connected h](jt)}(h ``encoder``h]jz)}(hjwh]hencoder}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMRhjvubj)}(hhh]h)}(h)encoder to which this bridge is connectedh]h)encoder to which this bridge is connected}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMRhjwubah}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]uh1jmhjwhMRhjfvubjn)}(h+``chain_node`` used to form a bridge chain h](jt)}(h``chain_node``h]jz)}(hj9wh]h chain_node}(hj;whhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7wubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMThj3wubj)}(hhh]h)}(hused to form a bridge chainh]hused to form a bridge chain}(hjRwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNwhMThjOwubah}(h]h ]h"]h$]h&]uh1jhj3wubeh}(h]h ]h"]h$]h&]uh1jmhjNwhMThjfvubjn)}(h.``of_node`` device node pointer to the bridge h](jt)}(h ``of_node``h]jz)}(hjrwh]hof_node}(hjtwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpwubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMVhjlwubj)}(hhh]h)}(h!device node pointer to the bridgeh]h!device node pointer to the bridge}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMVhjwubah}(h]h ]h"]h$]h&]uh1jhjlwubeh}(h]h ]h"]h$]h&]uh1jmhjwhMVhjfvubjn)}(h,``list`` to keep track of all added bridges h](jt)}(h``list``h]jz)}(hjwh]hlist}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMXhjwubj)}(hhh]h)}(h"to keep track of all added bridgesh]h"to keep track of all added bridges}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMXhjwubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjwhMXhjfvubjn)}(hJ``timings`` the timing specification for the bridge, if any (may be NULL) h](jt)}(h ``timings``h]jz)}(hjwh]htimings}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM[hjwubj)}(hhh]h)}(h=the timing specification for the bridge, if any (may be NULL)h]h=the timing specification for the bridge, if any (may be NULL)}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhM[hjwubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjwhM[hjfvubjn)}(h``funcs`` control functions h](jt)}(h ``funcs``h]jz)}(hjxh]hfuncs}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM`hjxubj)}(hhh]h)}(hcontrol functionsh]hcontrol functions}(hj6xhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2xhM`hj3xubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhj2xhM`hjfvubjn)}(hY``container`` Pointer to the private driver struct embedding this **struct** drm_bridge. h](jt)}(h ``container``h]jz)}(hjVxh]h container}(hjXxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjTxubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMehjPxubj)}(hhh]h)}(hJPointer to the private driver struct embedding this **struct** drm_bridge.h](h4Pointer to the private driver struct embedding this }(hjoxhhhNhNubj%)}(h **struct**h]hstruct}(hjwxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoxubh drm_bridge.}(hjoxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMdhjlxubah}(h]h ]h"]h$]h&]uh1jhjPxubeh}(h]h ]h"]h$]h&]uh1jmhjkxhMehjfvubjn)}(h?``refcount`` reference count of users referencing this bridge. h](jt)}(h ``refcount``h]jz)}(hjxh]hrefcount}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMjhjxubj)}(hhh]h)}(h1reference count of users referencing this bridge.h]h1reference count of users referencing this bridge.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMjhjxubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjxhMjhjfvubjn)}(hm``unplugged`` Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug(). h](jt)}(h ``unplugged``h]jz)}(hjxh]h unplugged}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMphjxubj)}(hhh]h)}(h^Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug().h]h^Flag to tell if the bridge has been unplugged. See drm_bridge_enter() and drm_bridge_unplug().}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMohjxubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjxhMphjfvubjn)}(hC``driver_private`` pointer to the bridge driver's internal context h](jt)}(h``driver_private``h]jz)}(hjyh]hdriver_private}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMvhjyubj)}(hhh]h)}(h/pointer to the bridge driver's internal contexth]h1pointer to the bridge driver’s internal context}(hj.yhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*yhMvhj+yubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhj*yhMvhjfvubjn)}(h6``ops`` bitmask of operations supported by the bridge h](jt)}(h``ops``h]jz)}(hjNyh]hops}(hjPyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLyubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMxhjHyubj)}(hhh]h)}(h-bitmask of operations supported by the bridgeh]h-bitmask of operations supported by the bridge}(hjgyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjcyhMxhjdyubah}(h]h ]h"]h$]h&]uh1jhjHyubeh}(h]h ]h"]h$]h&]uh1jmhjcyhMxhjfvubjn)}(h``type`` Type of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display. h](jt)}(h``type``h]jz)}(hjyh]htype}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM}hjyubj)}(hhh]h)}(hType of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display.h]hType of the connection at the bridge output (DRM_MODE_CONNECTOR_*). For bridges at the end of this chain this identifies the type of connected display.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM{hjyubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjyhM}hjfvubjn)}(hL``interlace_allowed`` Indicate that the bridge can handle interlaced modes. h](jt)}(h``interlace_allowed``h]jz)}(hjyh]hinterlace_allowed}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjyubj)}(hhh]h)}(h5Indicate that the bridge can handle interlaced modes.h]h5Indicate that the bridge can handle interlaced modes.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjyubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjyhMhjfvubjn)}(hL``ycbcr_420_allowed`` Indicate that the bridge can handle YCbCr 420 output. h](jt)}(h``ycbcr_420_allowed``h]jz)}(hjyh]hycbcr_420_allowed}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjyubj)}(hhh]h)}(h5Indicate that the bridge can handle YCbCr 420 output.h]h5Indicate that the bridge can handle YCbCr 420 output.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjzubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjzhMhjfvubjn)}(hX``pre_enable_prev_first`` The bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral. h](jt)}(h``pre_enable_prev_first``h]jz)}(hj5zh]hpre_enable_prev_first}(hj7zhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3zubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj/zubj)}(hhh]h)}(hThe bridge requires that the prev bridge **pre_enable** function is called before its **pre_enable**, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral.h](h)The bridge requires that the prev bridge }(hjNzhhhNhNubj%)}(h**pre_enable**h]h pre_enable}(hjVzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNzubh function is called before its }(hjNzhhhNhNubj%)}(h**pre_enable**h]h pre_enable}(hjhzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNzubh, and conversely for post_disable. This is most frequently a requirement for DSI devices which need the host to be initialised before the peripheral.}(hjNzhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjKzubah}(h]h ]h"]h$]h&]uh1jhj/zubeh}(h]h ]h"]h$]h&]uh1jmhjJzhMhjfvubjn)}(h9``support_hdcp`` Indicate that the bridge supports HDCP. h](jt)}(h``support_hdcp``h]jz)}(hjzh]h support_hdcp}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjzubj)}(hhh]h)}(h'Indicate that the bridge supports HDCP.h]h'Indicate that the bridge supports HDCP.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhjzhMhjfvubjn)}(h7``ddc`` Associated I2C adapter for DDC access, if any. h](jt)}(h``ddc``h]jz)}(hjzh]hddc}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjzubj)}(hhh]h)}(h.Associated I2C adapter for DDC access, if any.h]h.Associated I2C adapter for DDC access, if any.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhjzubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhjzhMhjfvubjn)}(h``vendor`` Vendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. h](jt)}(h ``vendor``h]jz)}(hj{h]hvendor}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjzubj)}(hhh]h)}(huVendor of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set.h](hWVendor of the product to be used for the SPD InfoFrame generation. This is required if }(hj{hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hj&{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubh is set.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj{ubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhj{hMhjfvubjn)}(h``product`` Name of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set. h](jt)}(h ``product``h]jz)}(hjQ{h]hproduct}(hjS{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjO{ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjK{ubj)}(hhh]h)}(hsName of the product to be used for the SPD InfoFrame generation. This is required if **DRM_BRIDGE_OP_HDMI** is set.h](hUName of the product to be used for the SPD InfoFrame generation. This is required if }(hjj{hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hjr{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjj{ubh is set.}(hjj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjg{ubah}(h]h ]h"]h$]h&]uh1jhjK{ubeh}(h]h ]h"]h$]h&]uh1jmhjf{hMhjfvubjn)}(h``supported_formats`` Bitmask of **hdmi_colorspace** listing supported output formats. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. h](jt)}(h``supported_formats``h]jz)}(hj{h]hsupported_formats}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj{ubj)}(hhh]h)}(hxBitmask of **hdmi_colorspace** listing supported output formats. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set.h](h Bitmask of }(hj{hhhNhNubj%)}(h**hdmi_colorspace**h]hhdmi_colorspace}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubh< listing supported output formats. This is only relevant if }(hj{hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubh is set.}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj{ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj{hMhjfvubjn)}(h``max_bpc`` Maximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set. h](jt)}(h ``max_bpc``h]jz)}(hj{h]hmax_bpc}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj{ubj)}(hhh]h)}(hMaximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if **DRM_BRIDGE_OP_HDMI** is set.h](hjMaximum bits per char the HDMI bridge supports. Allowed values are 8, 10 and 12. This is only relevant if }(hj|hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI**h]hDRM_BRIDGE_OP_HDMI}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh is set.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj|ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMhjfvubjn)}(hM``hdmi_cec_dev`` device to be used as a containing device for CEC functions. h](jt)}(h``hdmi_cec_dev``h]jz)}(hjG|h]h hdmi_cec_dev}(hjI|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjE|ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjA|ubj)}(hhh]h)}(h;device to be used as a containing device for CEC functions.h]h;device to be used as a containing device for CEC functions.}(hj`|hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj]|ubah}(h]h ]h"]h$]h&]uh1jhjA|ubeh}(h]h ]h"]h$]h&]uh1jmhj\|hMhjfvubjn)}(h``hdmi_audio_dev`` device to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set. h](jt)}(h``hdmi_audio_dev``h]jz)}(hj|h]hhdmi_audio_dev}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj{|ubj)}(hhh]h)}(hdevice to be used as a parent for the HDMI Codec if either of **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO** is set.h](h>device to be used as a parent for the HDMI Codec if either of }(hj|hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh or }(hj|hhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh is set.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj|ubah}(h]h ]h"]h$]h&]uh1jhj{|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMhjfvubjn)}(h``hdmi_audio_max_i2s_playback_channels`` maximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](jt)}(h(``hdmi_audio_max_i2s_playback_channels``h]jz)}(hj|h]h$hdmi_audio_max_i2s_playback_channels}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj|ubj)}(hhh]h)}(hkmaximum number of playback I2S channels for the **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](h0maximum number of playback I2S channels for the }(hj|hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh or }(hj|hhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMhjfvubjn)}(h``hdmi_audio_i2s_formats`` supported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](jt)}(h``hdmi_audio_i2s_formats``h]jz)}(hj=}h]hhdmi_audio_i2s_formats}(hj?}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;}ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj7}ubj)}(hhh]h)}(hsupported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](hsupported I2S formats, optional. The default is to allow all formats supported by the corresponding I2S bus driver. This is only used for bridges setting }(hjV}hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj^}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjV}ubh or }(hjV}hhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hjp}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjV}ubh.}(hjV}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjS}ubah}(h]h ]h"]h$]h&]uh1jhj7}ubeh}(h]h ]h"]h$]h&]uh1jmhjR}hMhjfvubjn)}(h``hdmi_audio_spdif_playback`` set if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**. h](jt)}(h``hdmi_audio_spdif_playback``h]jz)}(hj}h]hhdmi_audio_spdif_playback}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubj)}(hhh]h)}(hkset if this bridge has S/PDIF playback port for **DRM_BRIDGE_OP_HDMI_AUDIO** or **DRM_BRIDGE_OP_DP_AUDIO**.h](h0set if this bridge has S/PDIF playback port for }(hj}hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubh or }(hj}hhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubh.}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhj}hMhjfvubjn)}(h``hdmi_audio_dai_port`` sound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used. h](jt)}(h``hdmi_audio_dai_port``h]jz)}(hj}h]hhdmi_audio_dai_port}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubj)}(hhh]h)}(hosound DAI port for either of **DRM_BRIDGE_OP_HDMI_AUDIO** and **DRM_BRIDGE_OP_DP_AUDIO**, -1 if it is not used.h](hsound DAI port for either of }(hj~hhhNhNubj%)}(h**DRM_BRIDGE_OP_HDMI_AUDIO**h]hDRM_BRIDGE_OP_HDMI_AUDIO}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubh and }(hj~hhhNhNubj%)}(h**DRM_BRIDGE_OP_DP_AUDIO**h]hDRM_BRIDGE_OP_DP_AUDIO}(hj,~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubh, -1 if it is not used.}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj~ubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhjfvubjn)}(h>``hdmi_cec_adapter_name`` the name of the adapter to register h](jt)}(h``hdmi_cec_adapter_name``h]jz)}(hjW~h]hhdmi_cec_adapter_name}(hjY~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjU~ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjQ~ubj)}(hhh]h)}(h#the name of the adapter to registerh]h#the name of the adapter to register}(hjp~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjl~hMhjm~ubah}(h]h ]h"]h$]h&]uh1jhjQ~ubeh}(h]h ]h"]h$]h&]uh1jmhjl~hMhjfvubjn)}(hS``hdmi_cec_available_las`` number of logical addresses, CEC_MAX_LOG_ADDRS if unset h](jt)}(h``hdmi_cec_available_las``h]jz)}(hj~h]hhdmi_cec_available_las}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj~ubj)}(hhh]h)}(h7number of logical addresses, CEC_MAX_LOG_ADDRS if unseth]h7number of logical addresses, CEC_MAX_LOG_ADDRS if unset}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhj~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhjfvubjn)}(h?``hpd_mutex`` Protects the **hpd_cb** and **hpd_data** fields. h](jt)}(h ``hpd_mutex``h]jz)}(hj~h]h hpd_mutex}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj~ubj)}(hhh]h)}(h0Protects the **hpd_cb** and **hpd_data** fields.h](h Protects the }(hj~hhhNhNubj%)}(h **hpd_cb**h]hhpd_cb}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubh and }(hj~hhhNhNubj%)}(h **hpd_data**h]hhpd_data}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubh fields.}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj~hMhj~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhjfvubjn)}(hQ``hpd_cb`` Hot plug detection callback, registered with drm_bridge_hpd_enable(). h](jt)}(h ``hpd_cb``h]jz)}(hj&h]hhpd_cb}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj ubj)}(hhh]h)}(hEHot plug detection callback, registered with drm_bridge_hpd_enable().h]hEHot plug detection callback, registered with drm_bridge_hpd_enable().}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj;hMhjfvubjn)}(hP``hpd_data`` Private data passed to the Hot plug detection callback **hpd_cb**. h](jt)}(h ``hpd_data``h]jz)}(hj`h]hhpd_data}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjZubj)}(hhh]h)}(hBPrivate data passed to the Hot plug detection callback **hpd_cb**.h](h7Private data passed to the Hot plug detection callback }(hjyhhhNhNubj%)}(h **hpd_cb**h]hhpd_cb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyubh.}(hjyhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjvubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jmhjuhMhjfvubjn)}(hX``next_bridge`` Pointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h](jt)}(h``next_bridge``h]jz)}(hjh]h next_bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(hXPointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.h]hXPointer to the following bridge, automatically put when this bridge is freed (i.e. at destroy time). This is for drivers needing to store a pointer to the next bridge in the chain, and ensures any code still holding a reference to this bridge after its removal cannot use-after-free the next bridge. Any other bridge pointers stored by the driver must be put in the .destroy callback by driver code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjfvubeh}(h]h ]h"]h$]h&]uh1jhhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdevm_drm_bridge_alloc (C macro)c.devm_drm_bridge_allochNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hdevm_drm_bridge_alloch]j)}(hdevm_drm_bridge_alloch]j)}(hdevm_drm_bridge_alloch]j)}(hjh]hdevm_drm_bridge_alloc}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jmacroeh"]h$]h&]jjjj6jj6jjjuh1jhhhj'JhNhNubh)}(h4``devm_drm_bridge_alloc (dev, type, member, funcs)``h]jz)}(hj<h]h0devm_drm_bridge_alloc (dev, type, member, funcs)}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj'JhhubjT=)}(h!Allocate and initialize a bridge h]h)}(h Allocate and initialize a bridgeh]h Allocate and initialize a bridge}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjRubah}(h]h ]h"]h$]h&]uh1jS=hjdhMhj'Jhhubj)}(hX**Parameters** ``dev`` struct device of the bridge device ``type`` the type of the struct which contains struct :c:type:`drm_bridge` ``member`` the name of the :c:type:`drm_bridge` within **type** ``funcs`` callbacks for this bridge **Description** The reference count of the returned bridge is initialized to 1. This reference will be automatically dropped via devm (by calling drm_bridge_put()) when **dev** is removed. **Return** Pointer to new bridge, or ERR_PTR on failure.h](h)}(h**Parameters**h]j%)}(hjqh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubji)}(hhh](jn)}(h+``dev`` struct device of the bridge device h](jt)}(h``dev``h]jz)}(hjh]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(h"struct device of the bridge deviceh]h"struct device of the bridge device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hK``type`` the type of the struct which contains struct :c:type:`drm_bridge` h](jt)}(h``type``h]jz)}(hjɀh]htype}(hjˀhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjǀubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjÀubj)}(hhh]h)}(hAthe type of the struct which contains struct :c:type:`drm_bridge`h](h-the type of the struct which contains struct }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjހhMhjubeh}(h]h ]h"]h$]h&]uh1hhjހhMhj߀ubah}(h]h ]h"]h$]h&]uh1jhjÀube1h}(h]h ]h"]h$]h&]uh1jmhjހhMhjubjn)}(h@``member`` the name of the :c:type:`drm_bridge` within **type** h](jt)}(h ``member``h]jz)}(hj!h]hmember}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(h4the name of the :c:type:`drm_bridge` within **type**h](hthe name of the }(hj:hhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjDh]h drm_bridge}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhj6hMhj:ubh within }(hj:hhhNhNubj%)}(h**type**h]htype}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubeh}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj6hMhjubjn)}(h$``funcs`` callbacks for this bridge h](jt)}(h ``funcs``h]jz)}(hjh]hfuncs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(hcallbacks for this bridgeh]hcallbacks for this bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjkubh)}(h**Description**h]j%)}(hjƁh]h Description}(hjȁhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjāubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubh)}(hThe reference count of the returned bridge is initialized to 1. This reference will be automatically dropped via devm (by calling drm_bridge_put()) when **dev** is removed.h](hThe reference count of the returned bridge is initialized to 1. This reference will be automatically dropped via devm (by calling drm_bridge_put()) when }(hj܁hhhNhNubj%)}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj܁ubh is removed.}(hj܁hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubh)}(h-Pointer to new bridge, or ERR_PTR on failure.h]h-Pointer to new bridge, or ERR_PTR on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_bridge_get_current_state (C function)c.drm_bridge_get_current_statehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hRstruct drm_bridge_state * drm_bridge_get_current_state (struct drm_bridge *bridge)h]j)}(hPstruct drm_bridge_state *drm_bridge_get_current_state(struct drm_bridge *bridge)h](j)}(hjh]hstruct}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMAubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhjQhMAubh)}(hhh]j)}(hdrm_bridge_stateh]hdrm_bridge_state}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjemodnameN classnameNjj)}j]j)}jdrm_bridge_get_current_statesbc.drm_bridge_get_current_stateasbuh1hhj@hhhjQhMAubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhjQhMAubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@hhhjQhMAubj)}(hdrm_bridge_get_current_stateh]j)}(hjh]hdrm_bridge_get_current_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@hhhjQhMAubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj˂hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hj܂hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjقubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjނmodnameN classnameNjj)}j]jc.drm_bridge_get_current_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj@hhhjQhMAubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj<hhhjQhMAubah}(h]j7ah ](jjeh"]h$]h&]jj)jhuh1jhjQhMAhj9hhubj)}(hhh]h)}(hGet the current bridge stateh]hGet the current bridge state}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMAhj<hhubah}(h]h ]h"]h$]h&]uh1jhj9hhhjQhMAubeh}(h]h ](jfunctioneh"]h$]h&]jjjjWjjWjjjuh1jhhhj'JhNhNubj)}(h**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** This function must be called with the modeset lock held. The current bridge state, or NULL if there is none.h](h)}(h**Parameters**h]j%)}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMEhj[ubji)}(hhh]jn)}(h,``struct drm_bridge *bridge`` bridge object h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMBhjzubj)}(hhh]h)}(h bridge objecth]h bridge object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMBhjubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhjhMBhjwubah}(h]h ]h"]h$]h&]uh1jhhj[ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMDhj[ubh)}(h8This function must be called with the modeset lock held.h]h8This function must be called with the modeset lock held.}(hjуhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMChj[ubh)}(h3The current bridge state, or NULL if there is none.h]h3The current bridge state, or NULL if there is none.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMFhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_bridge_get_next_bridge (C function)c.drm_bridge_get_next_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hJstruct drm_bridge * drm_bridge_get_next_bridge (struct drm_bridge *bridge)h]j)}(hHstruct drm_bridge *drm_bridge_get_next_bridge(struct drm_bridge *bridge)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhjhMaubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]j)}jdrm_bridge_get_next_bridgesbc.drm_bridge_get_next_bridgeasbuh1hhj hhhjhMaubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhjhMaubj+)}(hj9h]h*}(hj]hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj hhhjhMaubj)}(hdrm_bridge_get_next_bridgeh]j)}(hjLh]hdrm_bridge_get_next_bridge}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhjhMaubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jJc.drm_bridge_get_next_bridgeasbuh1hhjubj)}(h h]h }(hjńhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjӄhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj hhhjhMaubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMaubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMahjhhubj)}(hhh]h)}(h Get the next bridge in the chainh]h Get the next bridge in the chain}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMahjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMaubeh}(h]h ](jfunctioneh"]h$]h&]jjjj"jj"jjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** The caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified. The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the next bridge in the chain after **bridge**, or NULL if **bridge** is the last.h](h)}(h**Parameters**h]j%)}(hj,h]h Parameters}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMehj&ubji)}(hhh]jn)}(h,``struct drm_bridge *bridge`` bridge object h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjKh]hstruct drm_bridge *bridge}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMbhjEubj)}(hhh]h)}(h bridge objecth]h bridge object}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMbhjaubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhj`hMbhjBubah}(h]h ]h"]h$]h&]uh1jhhj&ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMdhj&ubh)}(hThe caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified.h](h3The caller is responsible of having a reference to }(hjhhhNhNubj%)}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhJ via drm_bridge_get() or equivalent. This function leaves the refcount of }(hjhhhNhNubj%)}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh unmodified.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMchj&ubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjυhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMghj&ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjޅubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMjhj&ubh)}(hQthe next bridge in the chain after **bridge**, or NULL if **bridge** is the last.h](h#the next bridge in the chain after }(hjhhhNhNubj%)}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh , or NULL if }(hjhhhNhNubj%)}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is the last.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMkhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_bridge_get_prev_bridge (C function)c.drm_bridge_get_prev_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hJstruct drm_bridge * drm_bridge_get_prev_bridge (struct drm_bridge *bridge)h]j)}(hHstruct drm_bridge *drm_bridge_get_prev_bridge(struct drm_bridge *bridge)h](j)}(hjh]hstruct}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMxubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEhhhjVhMxubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjjmodnameN classnameNjj)}j]j)}jdrm_bridge_get_prev_bridgesbc.drm_bridge_get_prev_bridgeasbuh1hhjEhhhjVhMxubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEhhhjVhMxubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjEhhhjVhMxubj)}(hdrm_bridge_get_prev_bridgeh]j)}(hjh]hdrm_bridge_get_prev_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjEhhhjVhMxubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjÆhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjІhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjކubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_bridge_get_prev_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjEhhhjVhMxubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjAhhhjVhMxubah}(h]j<ah ](jjeh"]h$]h&]jj)jhuh1jhjVhMxhj>hhubj)}(hhh]h)}(h$Get the previous bridge in the chainh]h$Get the previous bridge in the chain}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMxhjAhhubah}(h]h ]h"]h$]h&]uh1jhj>hhhjVhMxubeh}(h]h ](jfunctioneh"]h$]h&]jjjj\jj\jjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** The caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified. The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the previous bridge in the chain, or NULL if **bridge** is the first.h](h)}(h**Parameters**h]j%)}(hjfh]h Parameters}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM|hj`ubji)}(hhh]jn)}(h,``struct drm_bridge *bridge`` bridge object h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMyhjubj)}(hhh]h)}(h bridge objecth]h bridge object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMyhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMyhj|ubah}(h]h ]h"]h$]h&]uh1jhhj`ubh)}(h**Description**h]j%)}(hjh]h Description}(hj‡hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM{hj`ubh)}(hThe caller is responsible of having a reference to **bridge** via drm_bridge_get() or equivalent. This function leaves the refcount of **bridge** unmodified.h](h3The caller is responsible of having a reference to }(hjևhhhNhNubj%)}(h **bridge**h]hbridge}(hjއhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjևubhJ via drm_bridge_get() or equivalent. This function leaves the refcount of }(hjևhhhNhNubj%)}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjևubh unmodified.}(hjևhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMzhj`ubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhM~hj`ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj`ubh)}(hEthe previous bridge in the chain, or NULL if **bridge** is the first.h](h-the previous bridge in the chain, or NULL if }(hj0hhhNhNubj%)}(h **bridge**h]hbridge}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubh is the first.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj`ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_bridge_chain_get_first_bridge (C function)#c.drm_bridge_chain_get_first_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hSstruct drm_bridge * drm_bridge_chain_get_first_bridge (struct drm_encoder *encoder)h]j)}(hQstruct drm_bridge *drm_bridge_chain_get_first_bridge(struct drm_encoder *encoder)h](j)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhj~hMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j!drm_bridge_chain_get_first_bridgesb#c.drm_bridge_chain_get_first_bridgeasbuh1hhjmhhhj~hMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhj~hMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmhhhj~hMubj)}(h!drm_bridge_chain_get_first_bridgeh]j)}(hjh]h!drm_bridge_chain_get_first_bridge}(hjЈhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̈ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjmhhhj~hMubj)}(h(struct drm_encoder *encoder)h]j)}(hstruct drm_encoder *encoderh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_encoderh]h drm_encoder}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j#c.drm_bridge_chain_get_first_bridgeasbuh1hhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hencoderh]hencoder}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjmhhhj~hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjihhhj~hMubah}(h]jdah ](jjeh"]h$]h&]jj)jhuh1jhj~hMhjfhhubj)}(hhh]h)}(h!Get the first bridge in the chainh]h!Get the first bridge in the chain}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjihhubah}(h]h ]h"]h$]h&]uh1jhjfhhhj~hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_encoder *encoder`` encoder object **Description** The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the first bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubji)}(hhh]jn)}(h/``struct drm_encoder *encoder`` encoder object h](jt)}(h``struct drm_encoder *encoder``h]jz)}(hjh]hstruct drm_encoder *encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(hencoder objecth]hencoder object}(hjƉhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj‰hMhjÉubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj‰hMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubh)}(hSthe first bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h*the first bridge in the chain, or NULL if }(hj%hhhNhNubj%)}(h **encoder**h]hencoder}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubh has no bridge attached to it.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_bridge_chain_get_last_bridge (C function)"c.drm_bridge_chain_get_last_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hRstruct drm_bridge * drm_bridge_chain_get_last_bridge (struct drm_encoder *encoder)h]j)}(hPstruct drm_bridge *drm_bridge_chain_get_last_bridge(struct drm_encoder *encoder)h](j)}(hjh]hstruct}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhjshMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j drm_bridge_chain_get_last_bridgesb"c.drm_bridge_chain_get_last_bridgeasbuh1hhjbhhhjshMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhjshMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjbhhhjshMubj)}(h drm_bridge_chain_get_last_bridgeh]j)}(hjh]h drm_bridge_chain_get_last_bridge}(hjŊhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjbhhhjshMubj)}(h(struct drm_encoder *encoder)h]j)}(hstruct drm_encoder *encoderh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj܊ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj܊ubh)}(hhh]j)}(h drm_encoderh]h drm_encoder}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j"c.drm_bridge_chain_get_last_bridgeasbuh1hhj܊ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj܊ubj+)}(hj9h]h*}(hj*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj܊ubj)}(hencoderh]hencoder}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj܊ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj؊ubah}(h]h ]h"]h$]h&]jjuh1jhjbhhhjshMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj^hhhjshMubah}(h]jYah ](jjeh"]h$]h&]jj)jhuh1jhjshMhj[hhubj)}(hhh]h)}(h Get the last bridge in the chainh]h Get the last bridge in the chain}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj^hhubah}(h]h ]h"]h$]h&]uh1jhj[hhhjshMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjyjjyjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_encoder *encoder`` encoder object **Description** The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** the last bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubji)}(hhh]jn)}(h/``struct drm_encoder *encoder`` encoder object h](jt)}(h``struct drm_encoder *encoder``h]jz)}(hjh]hstruct drm_encoder *encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(hencoder objecth]hencoder object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhj}ubh)}(h**Description**h]j%)}(hj݋h]h Description}(hjߋhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjۋubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubh)}(hRthe last bridge in the chain, or NULL if **encoder** has no bridge attached to it.h](h)the last bridge in the chain, or NULL if }(hjhhhNhNubj%)}(h **encoder**h]hencoder}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh has no bridge attached to it.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_bridge_get_next_bridge_and_put (C function)$c.drm_bridge_get_next_bridge_and_puthNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hRstruct drm_bridge * drm_bridge_get_next_bridge_and_put (struct drm_bridge *bridge)h]j)}(hPstruct drm_bridge *drm_bridge_get_next_bridge_and_put(struct drm_bridge *bridge)h](j)}(hjh]hstruct}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhjhhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj|modnameN classnameNjj)}j]j)}j"drm_bridge_get_next_bridge_and_putsb$c.drm_bridge_get_next_bridge_and_putasbuh1hhjWhhhjhhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhjhhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjWhhhjhhMubj)}(h"drm_bridge_get_next_bridge_and_puth]j)}(hjh]h"drm_bridge_get_next_bridge_and_put}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjWhhhjhhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjՌhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjьubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjьubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j$c.drm_bridge_get_next_bridge_and_putasbuh1hhjьubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjьubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjьubj)}(hbridgeh]hbridge}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjьubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj͌ubah}(h]h ]h"]h$]h&]jjuh1jhjWhhhjhhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjShhhjhhMubah}(h]jNah ](jjeh"]h$]h&]jj)jhuh1jhjhhMhjPhhubj)}(hhh]h)}(h5Get the next bridge in the chain and put the previoush]h5Get the next bridge in the chain and put the previous}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjShhubah}(h]h ]h"]h$]h&]uh1jhjPhhhjhhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjnjjnjjjuh1jhhhj'JhNhNubj)}(h**Parameters** ``struct drm_bridge *bridge`` bridge object **Description** Same as drm_bridge_get_next_bridge() but additionally puts the **bridge**. **Return** the next bridge in the chain after **bridge**, or NULL if **bridge** is the last.h](h)}(h**Parameters**h]j%)}(hjxh]h Parameters}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjvubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubji)}(hhh]jn)}(h,``struct drm_bridge *bridge`` bridge object h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(h bridge objecth]h bridge object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjrubh)}(h**Description**h]j%)}(hjҍh]h Description}(hjԍhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjЍubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubh)}(hJSame as drm_bridge_get_next_bridge() but additionally puts the **bridge**.h](h?Same as drm_bridge_get_next_bridge() but additionally puts the }(hjhhhNhNubj%)}(h **bridge**h]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubh)}(h **Return**h]j%)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubh)}(hQthe next bridge in the chain after **bridge**, or NULL if **bridge** is the last.h](h#the next bridge in the chain after }(hj!hhhNhNubj%)}(h **bridge**h]hbridge}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!ubh , or NULL if }(hj!hhhNhNubj%)}(h **bridge**h]hbridge}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!ubh is the last.}(hj!hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjrubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_for_each_bridge_in_chain_scoped (C macro)%c.drm_for_each_bridge_in_chain_scopedhNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h#drm_for_each_bridge_in_chain_scopedh]j)}(h#drm_for_each_bridge_in_chain_scopedh]j)}(h#drm_for_each_bridge_in_chain_scopedh]j)}(hjnh]h#drm_for_each_bridge_in_chain_scoped}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ](jjeh"]h$]h&]jjuh1jhjphhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhjlhhhjhMubah}(h]jgah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjihhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjihhhjhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubh)}(h9``drm_for_each_bridge_in_chain_scoped (encoder, bridge)``h]jz)}(hjh]h5drm_for_each_bridge_in_chain_scoped (encoder, bridge)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj'JhhubjT=)}(h0iterate over all bridges attached to an encoder h]h)}(h/iterate over all bridges attached to an encoderh]h/iterate over all bridges attached to an encoder}(hjĎhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubah}(h]h ]h"]h$]h&]uh1jS=hjҎhMhj'Jhhubj)}(hX**Parameters** ``encoder`` the encoder to iterate bridges on ``bridge`` a bridge pointer updated to point to the current bridge at each iteration **Description** Iterate over all bridges present in the bridge chain attached to **encoder**. Automatically gets/puts the bridge reference while iterating, and puts the reference even if returning or breaking in the middle of the loop.h](h)}(h**Parameters**h]j%)}(hjߎh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjݎubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjَubji)}(hhh](jn)}(h.``encoder`` the encoder to iterate bridges on h](jt)}(h ``encoder``h]jz)}(hjh]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(h!the encoder to iterate bridges onh]h!the encoder to iterate bridges on}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hU``bridge`` a bridge pointer updated to point to the current bridge at each iteration h](jt)}(h ``bridge``h]jz)}(hj7h]hbridge}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj1ubj)}(hhh]h)}(hIa bridge pointer updated to point to the current bridge at each iterationh]hIa bridge pointer updated to point to the current bridge at each iteration}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjMubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhjLhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjَubh)}(h**Description**h]j%)}(hjsh]h Description}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjَubh)}(hMIterate over all bridges present in the bridge chain attached to **encoder**.h](hAIterate over all bridges present in the bridge chain attached to }(hjhhhNhNubj%)}(h **encoder**h]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjَubh)}(hAutomatically gets/puts the bridge reference while iterating, and puts the reference even if returning or breaking in the middle of the loop.h]hAutomatically gets/puts the bridge reference while iterating, and puts the reference even if returning or breaking in the middle of the loop.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjَubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_for_each_bridge_in_chain_from (C macro)#c.drm_for_each_bridge_in_chain_fromhNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h!drm_for_each_bridge_in_chain_fromh]j)}(h!drm_for_each_bridge_in_chain_fromh]j)}(h!drm_for_each_bridge_in_chain_fromh]j)}(hjӏh]h!drm_for_each_bridge_in_chain_from}(hjݏhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjُubah}(h]h ](jjeh"]h$]h&]jjuh1jhjՏhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhjяhhhjhMubah}(h]j̏ah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjΏhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjΏhhhjhMubeh}(h]h ](jmacroeh"]h$]h&]jjjj jj jjjuh1jhhhj'JhNhNubh)}(h<``drm_for_each_bridge_in_chain_from (first_bridge, bridge)``h]jz)}(hjh]h8drm_for_each_bridge_in_chain_from (first_bridge, bridge)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj'JhhubjT=)}(h8iterate over all bridges starting from the given bridge h]h)}(h7iterate over all bridges starting from the given bridgeh]h7iterate over all bridges starting from the given bridge}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj%ubah}(h]h ]h"]h$]h&]uh1jS=hj7hMhj'Jhhubj)}(hX**Parameters** ``first_bridge`` the bridge to start from ``bridge`` a bridge pointer updated to point to the current bridge at each iteration **Description** Iterate over all bridges in the encoder chain starting from **first_bridge**, included. Automatically gets/puts the bridge reference while iterating, and puts the reference even if returning or breaking in the middle of the loop.h](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj>ubji)}(hhh](jn)}(h*``first_bridge`` the bridge to start from h](jt)}(h``first_bridge``h]jz)}(hjch]h first_bridge}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj]ubj)}(hhh]h)}(hthe bridge to start fromh]hthe bridge to start from}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjZubjn)}(hU``bridge`` a bridge pointer updated to point to the current bridge at each iteration h](jt)}(h ``bridge``h]jz)}(hjh]hbridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubj)}(hhh]h)}(hIa bridge pointer updated to point to the current bridge at each iterationh]hIa bridge pointer updated to point to the current bridge at each iteration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjZubeh}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hjؐh]h Description}(hjڐhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj֐ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj>ubh)}(hWIterate over all bridges in the encoder chain starting from **first_bridge**, included.h](hubh)}(hAutomatically gets/puts the bridge reference while iterating, and puts the reference even if returning or breaking in the middle of the loop.h]hAutomatically gets/puts the bridge reference while iterating, and puts the reference even if returning or breaking in the middle of the loop.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:194: ./include/drm/drm_bridge.hhMhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge_enter (C function)c.drm_bridge_enterhNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h;bool drm_bridge_enter (struct drm_bridge *bridge, int *idx)h]j)}(h:bool drm_bridge_enter(struct drm_bridge *bridge, int *idx)h](j)}(hjAh]hbool}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhjKhKubj)}(hdrm_bridge_enterh]j)}(hdrm_bridge_enterh]hdrm_bridge_enter}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ](jjeh"]h$]h&]jjuh1jhj:hhhjKhKubj)}(h%(struct drm_bridge *bridge, int *idx)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj`sbc.drm_bridge_enterasbuh1hhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj+)}(hj9h]h*}(hjƑhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjvubj)}(hbridgeh]hbridge}(hjӑhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjrubj)}(hint *idxh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hidxh]hidx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjrubeh}(h]h ]h"]h$]h&]jjuh1jhj:hhhjKhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj6hhhjKhKubah}(h]j1ah ](jjeh"]h$]h&]jj)jhuh1jhjKhKhj3hhubj)}(hhh]h)}(h!Enter DRM bridge critical sectionh]h!Enter DRM bridge critical section}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhj<hhubah}(h]h ]h"]h$]h&]uh1jhj3hhhjKhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjWjjWjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` DRM bridge ``int *idx`` Pointer to index that will be passed to the matching drm_bridge_exit() **Description** This function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested. **Return** True if it is OK to enter the section, false otherwise.h](h)}(h**Parameters**h]j%)}(hjah]h Parameters}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhj[ubji)}(hhh](jn)}(h)``struct drm_bridge *bridge`` DRM bridge h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjzubj)}(hhh]h)}(h DRM bridgeh]h DRM bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjwubjn)}(hT``int *idx`` Pointer to index that will be passed to the matching drm_bridge_exit() h](jt)}(h ``int *idx``h]jz)}(hjh]hint *idx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubj)}(hhh]h)}(hFPointer to index that will be passed to the matching drm_bridge_exit()h]hFPointer to index that will be passed to the matching drm_bridge_exit()}(hjҒhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjΒhKhjϒubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjΒhKhjwubeh}(h]h ]h"]h$]h&]uh1jhhj[ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhj[ubh)}(hThis function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested.h]hThis function marks and protects the beginning of a section that should not be entered after the bridge has been unplugged. The section end is marked with drm_bridge_exit(). Calls to this function can be nested.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhj[ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhj[ubh)}(h7True if it is OK to enter the section, false otherwise.h]h7True if it is OK to enter the section, false otherwise.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge_exit (C function)c.drm_bridge_exithNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hvoid drm_bridge_exit (int idx)h]j)}(hvoid drm_bridge_exit(int idx)h](j)}(hvoidh]hvoid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhjnhKubj)}(hdrm_bridge_exith]j)}(hdrm_bridge_exith]hdrm_bridge_exit}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj\hhhjnhKubj)}(h (int idx)h]j)}(hint idxh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hidxh]hidx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj\hhhjnhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjXhhhjnhKubah}(h]jSah ](jjeh"]h$]h&]jj)jhuh1jhjnhKhjUhhubj)}(hhh]h)}(h Exit DRM bridge critical sectionh]h Exit DRM bridge critical section}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjUhhhjnhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(h**Parameters** ``int idx`` index returned by drm_bridge_enter() **Description** This function marks the end of a section that should not be entered after the bridge has been unplugged.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubji)}(hhh]jn)}(h1``int idx`` index returned by drm_bridge_enter() h](jt)}(h ``int idx``h]jz)}(hj$h]hint idx}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubj)}(hhh]h)}(h$index returned by drm_bridge_enter()h]h$index returned by drm_bridge_enter()}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hKhj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj9hKhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubh)}(hhThis function marks the end of a section that should not be entered after the bridge has been unplugged.h]hhThis function marks the end of a section that should not be entered after the bridge has been unplugged.}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge_unplug (C function)c.drm_bridge_unplughNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h2void drm_bridge_unplug (struct drm_bridge *bridge)h]j)}(h1void drm_bridge_unplug(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_bridge_unplugh]j)}(hdrm_bridge_unplugh]hdrm_bridge_unplug}(hjŔhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݔubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݔubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjǔsbc.drm_bridge_unplugasbuh1hhjݔubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݔubj+)}(hj9h]h*}(hj-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjݔubj)}(hbridgeh]hbridge}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݔubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjٔubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h0declare a DRM bridge was unplugged and remove ith]h0declare a DRM bridge was unplugged and remove it}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjahhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj|jj|jjjuh1jhhhj'JhNhNubj)}(hXK**Parameters** ``struct drm_bridge *bridge`` DRM bridge **Description** This tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner. Also unregisters the bridge.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubji)}(hhh]jn)}(h)``struct drm_bridge *bridge`` DRM bridge h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubj)}(hhh]h)}(h DRM bridgeh]h DRM bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjޕubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubh)}(hThis tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner.h]hThis tells the bridge has been physically unplugged and no operations on device resources must be done anymore. Entry-points can use drm_bridge_enter() and drm_bridge_exit() to protect device resources in a race free manner.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubh)}(hAlso unregisters the bridge.h]hAlso unregisters the bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge_get (C function)c.drm_bridge_gethNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h>struct drm_bridge * drm_bridge_get (struct drm_bridge *bridge)h]j)}(h)}(h*not*h]hnot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j%>hjubh7 be balanced with a drm_bridge_detach() in driver code.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj=ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj=ubh)}(h&Zero on success, error code on failureh]h&Zero on success, error code on failure}(hjĢhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_bridge_chain_mode_valid (C function)c.drm_bridge_chain_mode_validhNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(henum drm_mode_status drm_bridge_chain_mode_valid (struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode)h]j)}(henum drm_mode_status drm_bridge_chain_mode_valid(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode)h](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(hdrm_mode_statush]hdrm_mode_status}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_bridge_chain_mode_validsbc.drm_bridge_chain_mode_validasbuh1hhjhhhjhMubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_bridge_chain_mode_validh]j)}(hj0h]hdrm_bridge_chain_mode_valid}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(he(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j.c.drm_bridge_chain_mode_validasbuh1hhj\ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj\ubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjXubj)}(h#const struct drm_display_info *infoh](j)}(hjUh]hconst}(hjУhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̣ubj)}(h h]h }(hjݣhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̣ubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̣ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̣ubh)}(hhh]j)}(hdrm_display_infoh]hdrm_display_info}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j.c.drm_bridge_chain_mode_validasbuh1hhj̣ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̣ubj+)}(hj9h]h*}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj̣ubj)}(hinfoh]hinfo}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̣ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjXubj)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(hjh]hstruct}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j.c.drm_bridge_chain_mode_validasbuh1hhjWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjWubj)}(hmodeh]hmode}(hjͤhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjXubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h;validate the mode against all bridges in the encoder chain.h]h;validate the mode against all bridges in the encoder chain.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``const struct drm_display_info *info`` display info against which the mode shall be validated ``const struct drm_display_mode *mode`` desired mode to be validated **Description** Calls :c:type:`drm_bridge_funcs.mode_valid ` for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code. **Note** the bridge passed should be the one closest to the encoder. **Return** MODE_OK on success, drm_mode_status Enum error code on failureh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hj8h]hstruct drm_bridge *bridge}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj6ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj2ubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhMhjNubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jmhjMhMhj/ubjn)}(h_``const struct drm_display_info *info`` display info against which the mode shall be validated h](jt)}(h'``const struct drm_display_info *info``h]jz)}(hjqh]h#const struct drm_display_info *info}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjoubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjkubj)}(hhh]h)}(h6display info against which the mode shall be validatedh]h6display info against which the mode shall be validated}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj/ubjn)}(hE``const struct drm_display_mode *mode`` desired mode to be validated h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hjh]h#const struct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hdesired mode to be validatedh]hdesired mode to be validated}(hjåhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj/ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hCalls :c:type:`drm_bridge_funcs.mode_valid ` for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code.h](hCalls }(hjhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jz)}(hjh]hdrm_bridge_funcs.mode_valid}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh for all the bridges in the encoder chain, starting from the first bridge to the last. If at least one bridge does not accept the mode the function returns the error code.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"hMhjubh)}(h**Note**h]j%)}(hj/h]hNote}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h;the bridge passed should be the one closest to the encoder.h]h;the bridge passed should be the one closest to the encoder.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Return**h]j%)}(hjVh]hReturn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h>MODE_OK on success, drm_mode_status Enum error code on failureh]h>MODE_OK on success, drm_mode_status Enum error code on failure}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_bridge_chain_mode_set (C function)c.drm_bridge_chain_mode_sethNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hvoid drm_bridge_chain_mode_set (struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h]j)}(hvoid drm_bridge_chain_mode_set(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_bridge_chain_mode_seth]j)}(hdrm_bridge_chain_mode_seth]hdrm_bridge_chain_mode_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hn(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjئhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԦubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԦubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_bridge_chain_mode_setasbuh1hhjԦubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԦubj+)}(hj9h]h*}(hj$hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjԦubj)}(hbridgeh]hbridge}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԦubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjЦubj)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(hjh]hstruct}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_bridge_chain_mode_setasbuh1hhjFubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjFubj)}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjЦubj)}(h,const struct drm_display_mode *adjusted_modeh](j)}(hjUh]hconst}(hjէhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѧubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѧubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѧubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѧubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_bridge_chain_mode_setasbuh1hhjѧubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѧubj+)}(hj9h]h*}(hj:hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjѧubj)}(h adjusted_modeh]h adjusted_mode}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѧubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjЦubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h6set proposed mode for all bridges in the encoder chainh]h6set proposed mode for all bridges in the encoder chain}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjnhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``const struct drm_display_mode *mode`` desired mode to be set for the encoder chain ``const struct drm_display_mode *adjusted_mode`` updated mode that works for this encoder chain **Description** Calls :c:type:`drm_bridge_funcs.mode_set ` op for all the bridges in the encoder chain, starting from the first bridge to the last. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj˨hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjǨhMhjȨubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjǨhMhjubjn)}(hU``const struct drm_display_mode *mode`` desired mode to be set for the encoder chain h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hjh]h#const struct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(h,desired mode to be set for the encoder chainh]h,desired mode to be set for the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h```const struct drm_display_mode *adjusted_mode`` updated mode that works for this encoder chain h](jt)}(h0``const struct drm_display_mode *adjusted_mode``h]jz)}(hj$h]h,const struct drm_display_mode *adjusted_mode}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(h.updated mode that works for this encoder chainh]h.updated mode that works for this encoder chain}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hMhj:ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj9hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj_h]h Description}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hCalls :c:type:`drm_bridge_funcs.mode_set ` op for all the bridges in the encoder chain, starting from the first bridge to the last.h](hCalls }(hjuhhhNhNubh)}(h6:c:type:`drm_bridge_funcs.mode_set `h]jz)}(hjh]hdrm_bridge_funcs.mode_set}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjuubhY op for all the bridges in the encoder chain, starting from the first bridge to the last.}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h**Note**h]j%)}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_atomic_bridge_chain_disable (C function)!c.drm_atomic_bridge_chain_disablehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h`void drm_atomic_bridge_chain_disable (struct drm_bridge *bridge, struct drm_atomic_state *state)h]j)}(h_void drm_atomic_bridge_chain_disable(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_atomic_bridge_chain_disableh]j)}(hdrm_atomic_bridge_chain_disableh]hdrm_atomic_bridge_chain_disable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h;(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjKmodnameN classnameNjj)}j]j)}jjsb!c.drm_atomic_bridge_chain_disableasbuh1hhj'ubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj+)}(hj9h]h*}(hjwhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj'ubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj#ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]je!c.drm_atomic_bridge_chain_disableasbuh1hhjubj)}(h h]h }(hj٪hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj#ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h)disables all bridges in the encoder chainh]h)disables all bridges in the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj6jj6jjjuh1jhhhj'JhNhNubj)}(hX2**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_state *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_disable ` (falls back on :c:type:`drm_bridge_funcs.disable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_disable ` **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j%)}(hj@h]h Parameters}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj:ubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hj_h]hstruct drm_bridge *bridge}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjYubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jmhjthMhjVubjn)}(h@``struct drm_atomic_state *state`` atomic state being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjVubeh}(h]h ]h"]h$]h&]uh1jhhj:ubh)}(h**Description**h]j%)}(hjӫh]h Description}(hjիhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjѫubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj:ubh)}(hXNCalls :c:type:`drm_bridge_funcs.atomic_disable ` (falls back on :c:type:`drm_bridge_funcs.disable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_disable `h](hCalls }(hjhhhNhNubh)}(h<:c:type:`drm_bridge_funcs.atomic_disable `h]jz)}(hjh]hdrm_bridge_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh (falls back on }(hjhhhNhNubh)}(h5:c:type:`drm_bridge_funcs.disable `h]jz)}(hjh]hdrm_bridge_funcs.disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjhMhjubh{) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hjhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jz)}(hj:h]h'drm_encoder_helper_funcs.atomic_disable}(hj<hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhj:ubh)}(h**Note**h]j%)}(hj_h]hNote}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj:ubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_atomic_bridge_chain_post_disable (C function)&c.drm_atomic_bridge_chain_post_disablehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hevoid drm_atomic_bridge_chain_post_disable (struct drm_bridge *bridge, struct drm_atomic_state *state)h]j)}(hdvoid drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM#ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM#ubj)}(h$drm_atomic_bridge_chain_post_disableh]j)}(h$drm_atomic_bridge_chain_post_disableh]h$drm_atomic_bridge_chain_post_disable}(hjŬhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM#ubj)}(h;(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݬubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݬubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjǬsb&c.drm_atomic_bridge_chain_post_disableasbuh1hhjݬubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݬubj+)}(hj9h]h*}(hj-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjݬubj)}(hbridgeh]hbridge}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݬubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj٬ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjsmodnameN classnameNjj)}j]j&c.drm_atomic_bridge_chain_post_disableasbuh1hhjOubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjOubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj٬ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM#ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM#ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM#hjhhubj)}(hhh]h)}(h:cleans up after disabling all bridges in the encoder chainh]h:cleans up after disabling all bridges in the encoder chain}(hjԭhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM#hjѭhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM#ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_state *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_post_disable ` (falls back on :c:type:`drm_bridge_funcs.post_disable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_disable ` If a bridge sets **pre_enable_prev_first**, then the **post_disable** for that bridge will be called before the previous one to reverse the **pre_enable** calling direction. **Example** Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **post_disable** order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM'hjubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM%hjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hM%hj+ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj*hM%hj ubjn)}(h@``struct drm_atomic_state *state`` atomic state being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjNh]hstruct drm_atomic_state *state}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM&hjHubj)}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchM&hjdubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjchM&hj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM(hjubh)}(hXZCalls :c:type:`drm_bridge_funcs.atomic_post_disable ` (falls back on :c:type:`drm_bridge_funcs.post_disable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_disable `h](hCalls }(hjhhhNhNubh)}(hA:c:type:`drm_bridge_funcs.atomic_post_disable `h]jz)}(hjh]h$drm_bridge_funcs.atomic_post_disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM'hjubh (falls back on }(hjhhhNhNubh)}(h::c:type:`drm_bridge_funcs.post_disable `h]jz)}(hjͮh]hdrm_bridge_funcs.post_disable}(hjϮhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjˮubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjƮhM'hjubh}) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing }(hjhhhNhNubh)}(hL:c:type:`drm_encoder_helper_funcs.atomic_disable `h]jz)}(hjh]h'drm_encoder_helper_funcs.atomic_disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjƮhM'hjubeh}(h]h ]h"]h$]h&]uh1hhjƮhM'hjubh)}(hIf a bridge sets **pre_enable_prev_first**, then the **post_disable** for that bridge will be called before the previous one to reverse the **pre_enable** calling direction.h](hIf a bridge sets }(hjhhhNhNubj%)}(h**pre_enable_prev_first**h]hpre_enable_prev_first}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh , then the }(hjhhhNhNubj%)}(h**post_disable**h]h post_disable}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhG for that bridge will be called before the previous one to reverse the }(hjhhhNhNubj%)}(h**pre_enable**h]h pre_enable}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh calling direction.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM,hjubh)}(h **Example**h]j%)}(hjZh]hExample}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM0hjubh)}(h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge Eh]h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM1hjubh)}(hWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **post_disable** order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.h](hLWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting }(hjhhhNhNubj%)}(h**post_disable**h]h post_disable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhB order would be, Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM3hjubh)}(h**Note**h]j%)}(hjh]hNote}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM7hjubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM8hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_atomic_bridge_chain_pre_enable (C function)$c.drm_atomic_bridge_chain_pre_enablehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hcvoid drm_atomic_bridge_chain_pre_enable (struct drm_bridge *bridge, struct drm_atomic_state *state)h]j)}(hbvoid drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h"drm_atomic_bridge_chain_pre_enableh]j)}(h"drm_atomic_bridge_chain_pre_enableh]h"drm_atomic_bridge_chain_pre_enable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h;(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDmodnameN classnameNjj)}j]j)}jj sb$c.drm_atomic_bridge_chain_pre_enableasbuh1hhj ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hbridgeh]hbridge}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j^$c.drm_atomic_bridge_chain_pre_enableasbuh1hhjubj)}(h h]h }(hjҰhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj߯hhhjhMubah}(h]jگah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjܯhhubj)}(hhh]h)}(h6prepares for enabling all bridges in the encoder chainh]h6prepares for enabling all bridges in the encoder chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjܯhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj/jj/jjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_state *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_pre_enable ` (falls back on :c:type:`drm_bridge_funcs.pre_enable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_enable ` If a bridge sets **pre_enable_prev_first**, then the pre_enable for the prev bridge will be called before pre_enable of this bridge. **Example** Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **pre_enable** order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B. **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j%)}(hj9h]h Parameters}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjXh]hstruct drm_bridge *bridge}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjRubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhMhjnubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jmhjmhMhjOubjn)}(h@``struct drm_atomic_state *state`` atomic state being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjOubeh}(h]h ]h"]h$]h&]uh1jhhj3ubh)}(h**Description**h]j%)}(hj̱h]h Description}(hjαhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjʱubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubh)}(hXSCalls :c:type:`drm_bridge_funcs.atomic_pre_enable ` (falls back on :c:type:`drm_bridge_funcs.pre_enable `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_enable `h](hCalls }(hjhhhNhNubh)}(h?:c:type:`drm_bridge_funcs.atomic_pre_enable `h]jz)}(hjh]h"drm_bridge_funcs.atomic_pre_enable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh (falls back on }(hjhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.pre_enable `h]jz)}(hjh]hdrm_bridge_funcs.pre_enable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhj hMhjubh{) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hjhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jz)}(hj3h]h&drm_encoder_helper_funcs.atomic_enable}(hj5hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhj hMhjubeh}(h]h ]h"]h$]h&]uh1hhj hMhj3ubh)}(hIf a bridge sets **pre_enable_prev_first**, then the pre_enable for the prev bridge will be called before pre_enable of this bridge.h](hIf a bridge sets }(hjVhhhNhNubj%)}(h**pre_enable_prev_first**h]hpre_enable_prev_first}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubhZ, then the pre_enable for the prev bridge will be called before pre_enable of this bridge.}(hjVhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubh)}(h **Example**h]j%)}(hjyh]hExample}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubh)}(h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge Eh]h@Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubh)}(hWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting **pre_enable** order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.h](hLWith pre_enable_prev_first flag enable in Bridge B, D, E then the resulting }(hjhhhNhNubj%)}(h**pre_enable**h]h pre_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhB order would be, Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubh)}(h**Note**h]j%)}(hjh]hNote}(hjòhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjײhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_atomic_bridge_chain_enable (C function) c.drm_atomic_bridge_chain_enablehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h_void drm_atomic_bridge_chain_enable (struct drm_bridge *bridge, struct drm_atomic_state *state)h]j)}(h^void drm_atomic_bridge_chain_enable(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_atomic_bridge_chain_enableh]j)}(hdrm_atomic_bridge_chain_enableh]hdrm_atomic_bridge_chain_enable}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h;(struct drm_bridge *bridge, struct drm_atomic_state *state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjcmodnameN classnameNjj)}j]j)}jj)sb c.drm_atomic_bridge_chain_enableasbuh1hhj?ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj?ubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj³hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjӳhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjгubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjճmodnameN classnameNjj)}j]j} c.drm_atomic_bridge_chain_enableasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h(enables all bridges in the encoder chainh]h(enables all bridges in the encoder chain}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj3hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjNjjNjjjuh1jhhhj'JhNhNubj)}(hX1**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_atomic_state *state`` atomic state being committed **Description** Calls :c:type:`drm_bridge_funcs.atomic_enable ` (falls back on :c:type:`drm_bridge_funcs.enable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_enable ` **Note** the bridge passed should be the one closest to the encoderh](h)}(h**Parameters**h]j%)}(hjXh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjRubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjwh]hstruct drm_bridge *bridge}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjqubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjnubjn)}(h@``struct drm_atomic_state *state`` atomic state being committed h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hatomic state being committedh]hatomic state being committed}(hjɴhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjŴhMhjƴubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjŴhMhjnubeh}(h]h ]h"]h$]h&]uh1jhhjRubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjRubh)}(hXMCalls :c:type:`drm_bridge_funcs.atomic_enable ` (falls back on :c:type:`drm_bridge_funcs.enable `) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing :c:type:`drm_encoder_helper_funcs.atomic_enable `h](hCalls }(hjhhhNhNubh)}(h;:c:type:`drm_bridge_funcs.atomic_enable `h]jz)}(hj h]hdrm_bridge_funcs.atomic_enable}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh (falls back on }(hjhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.enable `h]jz)}(hj/h]hdrm_bridge_funcs.enable}(hj1hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhj(hMhjubh}) op for all the bridges in the encoder chain, starting from the first bridge to the last. These are called after completing }(hjhhhNhNubh)}(hK:c:type:`drm_encoder_helper_funcs.atomic_enable `h]jz)}(hjRh]h&drm_encoder_helper_funcs.atomic_enable}(hjThhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhj(hMhjubeh}(h]h ]h"]h$]h&]uh1hhj(hMhjRubh)}(h**Note**h]j%)}(hjwh]hNote}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjuubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjRubh)}(h:the bridge passed should be the one closest to the encoderh]h:the bridge passed should be the one closest to the encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjRubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_atomic_bridge_chain_check (C function)c.drm_atomic_bridge_chain_checkhNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hint drm_atomic_bridge_chain_check (struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h]j)}(hint drm_atomic_bridge_chain_check(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hj˵hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjʵhMubj)}(hdrm_atomic_bridge_chain_checkh]j)}(hdrm_atomic_bridge_chain_checkh]hdrm_atomic_bridge_chain_check}(hjݵhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjٵubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjʵhMubj)}(hf(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjߵsbc.drm_atomic_bridge_chain_checkasbuh1hhjubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjEhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h!struct drm_crtc_state *crtc_stateh](j)}(hjh]hstruct}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j3c.drm_atomic_bridge_chain_checkasbuh1hhjgubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjgubj)}(h crtc_stateh]h crtc_state}(hj¶hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h&struct drm_connector_state *conn_stateh](j)}(hjh]hstruct}(hj۶hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׶ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׶ubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j3c.drm_atomic_bridge_chain_checkasbuh1hhj׶ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׶ubj+)}(hj9h]h*}(hj%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj׶ubj)}(h conn_stateh]h conn_state}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׶ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjʵhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjʵhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjʵhMhjhhubj)}(hhh]h)}(h&Do an atomic check on the bridge chainh]h&Do an atomic check on the bridge chain}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjYhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjʵhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjtjjtjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_crtc_state *crtc_state`` new CRTC state ``struct drm_connector_state *conn_state`` new connector state **Description** First trigger a bus format negotiation before calling :c:type:`drm_bridge_funcs.atomic_check\(\) ` (falls back on :c:type:`drm_bridge_funcs.mode_fixup\(\) `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` **Return** 0 on success, a negative error code on failureh](h)}(h**Parameters**h]j%)}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjxubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h5``struct drm_crtc_state *crtc_state`` new CRTC state h](jt)}(h%``struct drm_crtc_state *crtc_state``h]jz)}(hjַh]h!struct drm_crtc_state *crtc_state}(hjطhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjԷubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjзubj)}(hhh]h)}(hnew CRTC stateh]hnew CRTC state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjзubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h?``struct drm_connector_state *conn_state`` new connector state h](jt)}(h*``struct drm_connector_state *conn_state``h]jz)}(hjh]h&struct drm_connector_state *conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj ubj)}(hhh]h)}(hnew connector stateh]hnew connector state}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjxubh)}(h**Description**h]j%)}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjxubh)}(hXFirst trigger a bus format negotiation before calling :c:type:`drm_bridge_funcs.atomic_check\(\) ` (falls back on :c:type:`drm_bridge_funcs.mode_fixup\(\) `) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling :c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h](h6First trigger a bus format negotiation before calling }(hj`hhhNhNubh)}(h>:c:type:`drm_bridge_funcs.atomic_check\(\) `h]jz)}(hjjh]hdrm_bridge_funcs.atomic_check()}(hjlhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj`ubh (falls back on }(hj`hhhNhNubh)}(h<:c:type:`drm_bridge_funcs.mode_fixup\(\) `h]jz)}(hjh]hdrm_bridge_funcs.mode_fixup()}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjhMhj`ubh{) op for all the bridges in the encoder chain, starting from the last bridge to the first. These are called before calling }(hj`hhhNhNubh)}(hN:c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h]jz)}(hjh]h'drm_encoder_helper_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjhMhj`ubeh}(h]h ]h"]h$]h&]uh1hhjhMhjxubh)}(h **Return**h]j%)}(hjָh]hReturn}(hjظhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjԸubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjxubh)}(h.0 on success, a negative error code on failureh]h.0 on success, a negative error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_bridge_detect (C function)c.drm_bridge_detecthNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hhenum drm_connector_status drm_bridge_detect (struct drm_bridge *bridge, struct drm_connector *connector)h]j)}(hgenum drm_connector_status drm_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM,ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj(hM,ubh)}(hhh]j)}(hdrm_connector_statush]hdrm_connector_status}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j)}jdrm_bridge_detectsbc.drm_bridge_detectasbuh1hhjhhhj(hM,ubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj(hM,ubj)}(hdrm_bridge_detecth]j)}(hjXh]hdrm_bridge_detect}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj(hM,ubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jVc.drm_bridge_detectasbuh1hhjubj)}(h h]h }(hjĹhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjҹhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hj߹hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jVc.drm_bridge_detectasbuh1hhjubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjBhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj(hM,ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj(hM,ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj(hM,hjhhubj)}(hhh]h)}(h2check if anything is attached to the bridge outputh]h2check if anything is attached to the bridge output}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM,hjvhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj(hM,ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` attached connector **Description** If the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call :c:type:`drm_bridge_funcs.detect ` for the bridge and return the connection status. Otherwise return connector_status_unknown. **Return** The detection status on success, or connector_status_unknown if the bridge doesn't support output detection.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM0hjubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM-hjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjӺhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjϺhM-hjкubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjϺhM-hjubjn)}(h7``struct drm_connector *connector`` attached connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM.hjubj)}(hhh]h)}(hattached connectorh]hattached connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM.hj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM.hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj.h]h Description}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM0hjubh)}(hIf the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call :c:type:`drm_bridge_funcs.detect ` for the bridge and return the connection status. Otherwise return connector_status_unknown.h](hgIf the bridge supports output detection, as reported by the DRM_BRIDGE_OP_DETECT bridge ops flag, call }(hjDhhhNhNubh)}(h4:c:type:`drm_bridge_funcs.detect `h]jz)}(hjNh]hdrm_bridge_funcs.detect}(hjPhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM/hjDubh\ for the bridge and return the connection status. Otherwise return connector_status_unknown.}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjkhM/hjubh)}(h **Return**h]j%)}(hjxh]hReturn}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjvubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM4hjubh)}(hlThe detection status on success, or connector_status_unknown if the bridge doesn't support output detection.h]hnThe detection status on success, or connector_status_unknown if the bridge doesn’t support output detection.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM5hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_bridge_get_modes (C function)c.drm_bridge_get_modeshNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hUint drm_bridge_get_modes (struct drm_bridge *bridge, struct drm_connector *connector)h]j)}(hTint drm_bridge_get_modes(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMDubj)}(h h]h }(hj̻hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj˻hMDubj)}(hdrm_bridge_get_modesh]j)}(hdrm_bridge_get_modesh]hdrm_bridge_get_modes}(hj޻hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjڻubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj˻hMDubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_bridge_get_modesasbuh1hhjubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjFhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j4c.drm_bridge_get_modesasbuh1hhjhubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhubj)}(h connectorh]h connector}(hjühhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj˻hMDubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj˻hMDubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj˻hMDhjhhubj)}(hhh]h)}(hBfill all modes currently valid for the sink into the **connector**h](h5fill all modes currently valid for the sink into the }(hjhhhNhNubj%)}(h **connector**h]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMDhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj˻hMDubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` the connector to fill with modes **Description** If the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call :c:type:`drm_bridge_funcs.get_modes ` to fill the connector with all valid modes and return the number of modes added. Otherwise return 0. **Return** The number of modes added to the connector.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMHhjubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hj<h]hstruct drm_bridge *bridge}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMFhj6ubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQhMFhjRubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jmhjQhMFhj3ubjn)}(hE``struct drm_connector *connector`` the connector to fill with modes h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjuh]hstruct drm_connector *connector}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMGhjoubj)}(hhh]h)}(h the connector to fill with modesh]h the connector to fill with modes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jmhjhMGhj3ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMIhjubh)}(hXIf the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call :c:type:`drm_bridge_funcs.get_modes ` to fill the connector with all valid modes and return the number of modes added. Otherwise return 0.h](hlIf the bridge supports output modes retrieval, as reported by the DRM_BRIDGE_OP_MODES bridge ops flag, call }(hjƽhhhNhNubh)}(h7:c:type:`drm_bridge_funcs.get_modes `h]jz)}(hjнh]hdrm_bridge_funcs.get_modes}(hjҽhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjνubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMHhjƽubhe to fill the connector with all valid modes and return the number of modes added. Otherwise return 0.}(hjƽhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMHhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMMhjubh)}(h+The number of modes added to the connector.h]h+The number of modes added to the connector.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMNhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_bridge_edid_read (C function)c.drm_bridge_edid_readhNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hiconst struct drm_edid * drm_bridge_edid_read (struct drm_bridge *bridge, struct drm_connector *connector)h]j)}(hgconst struct drm_edid *drm_bridge_edid_read(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hjUh]hconst}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM\ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhjLhM\ubj)}(hjh]hstruct}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhjLhM\ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhjLhM\ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{modnameN classnameNjj)}j]j)}jdrm_bridge_edid_readsbc.drm_bridge_edid_readasbuh1hhj;hhhjLhM\ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhjLhM\ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;hhhjLhM\ubj)}(hdrm_bridge_edid_readh]j)}(hjh]hdrm_bridge_edid_read}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj;hhhjLhM\ubj)}(h<(struct drm_bridge *bridge, struct drm_connector *connector)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjԾhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjоubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjоubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_bridge_edid_readasbuh1hhjоubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjоubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjоubj)}(hbridgeh]hbridge}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjоubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj̾ubj)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjdmodnameN classnameNjj)}j]jc.drm_bridge_edid_readasbuh1hhj@ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj̾ubeh}(h]h ]h"]h$]h&]jjuh1jhj;hhhjLhM\ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj7hhhjLhM\ubah}(h]j2ah ](jjeh"]h$]h&]jj)jhuh1jhjLhM\hj4hhubj)}(hhh]h)}(h+read the EDID data of the connected displayh]h+read the EDID data of the connected display}(hjſhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM\hj¿hhubah}(h]h ]h"]h$]h&]uh1jhj4hhhjLhM\ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjݿjjݿjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``struct drm_connector *connector`` the connector to read EDID for **Description** If the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call :c:type:`drm_bridge_funcs.edid_read ` to get the EDID and return it. Otherwise return NULL. **Return** The retrieved EDID on success, or NULL otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM`hjubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM]hjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM]hjubjn)}(hC``struct drm_connector *connector`` the connector to read EDID for h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj?h]hstruct drm_connector *connector}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM^hj9ubj)}(hhh]h)}(hthe connector to read EDID forh]hthe connector to read EDID for}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThM^hjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhjThM^hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjzh]h Description}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM`hjubh)}(hIf the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call :c:type:`drm_bridge_funcs.edid_read ` to get the EDID and return it. Otherwise return NULL.h](hjIf the bridge supports output EDID retrieval, as reported by the DRM_BRIDGE_OP_EDID bridge ops flag, call }(hjhhhNhNubh)}(h7:c:type:`drm_bridge_funcs.edid_read `h]jz)}(hjh]hdrm_bridge_funcs.edid_read}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM_hjubh6 to get the EDID and return it. Otherwise return NULL.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM_hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMchjubh)}(h1The retrieved EDID on success, or NULL otherwise.h]h1The retrieved EDID on success, or NULL otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMdhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_bridge_hpd_enable (C function)c.drm_bridge_hpd_enablehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h|void drm_bridge_hpd_enable (struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h]j)}(h{void drm_bridge_hpd_enable(struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMrubj)}(hdrm_bridge_hpd_enableh]j)}(hdrm_bridge_hpd_enableh]hdrm_bridge_hpd_enable}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMrubj)}(ha(struct drm_bridge *bridge, void (*cb)(void *data, enum drm_connector_status status), void *data)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjfmodnameN classnameNjj)}j]j)}jj,sbc.drm_bridge_hpd_enableasbuh1hhjBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubj)}(h8void (*cb)(void *data, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(h(h]h(}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcbh]hcb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(h)h]h)}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj+)}(hjh]h(}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdatah]hdata}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(h,h]h,}(hjOhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hj8h]henum}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_connector_statush]hdrm_connector_status}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_bridge_hpd_enableasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hstatush]hstatus}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hjh]h)}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubj)}(h void *datah](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdatah]hdata}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMrubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMrubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMrhjhhubj)}(hhh]h)}(h(enable hot plug detection for the bridgeh]h(enable hot plug detection for the bridge}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMrhj+hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMrubeh}(h]h ](jfunctioneh"]h$]h&]jjjjFjjFjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``void (*cb)(void *data, enum drm_connector_status status)`` hot-plug detection callback ``void *data`` data to be passed to the hot-plug detection callback **Description** Call :c:type:`drm_bridge_funcs.hpd_enable ` if implemented and register the given **cb** and **data** as hot plug notification callback. From now on the **cb** will be called with **data** when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable(). Hot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set. Only one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.h](h)}(h**Parameters**h]j%)}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMvhjJubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjoh]hstruct drm_bridge *bridge}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMshjiubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMshjubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jmhjhMshjfubjn)}(hY``void (*cb)(void *data, enum drm_connector_status status)`` hot-plug detection callback h](jt)}(h<``void (*cb)(void *data, enum drm_connector_status status)``h]jz)}(hjh]h8void (*cb)(void *data, enum drm_connector_status status)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMthjubj)}(hhh]h)}(hhot-plug detection callbackh]hhot-plug detection callback}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMthjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMthjfubjn)}(hD``void *data`` data to be passed to the hot-plug detection callback h](jt)}(h``void *data``h]jz)}(hjh]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMuhjubj)}(hhh]h)}(h4data to be passed to the hot-plug detection callbackh]h4data to be passed to the hot-plug detection callback}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMuhjfubeh}(h]h ]h"]h$]h&]uh1jhhjJubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMwhjJubh)}(hXOCall :c:type:`drm_bridge_funcs.hpd_enable ` if implemented and register the given **cb** and **data** as hot plug notification callback. From now on the **cb** will be called with **data** when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable().h](hCall }(hj2hhhNhNubh)}(h8:c:type:`drm_bridge_funcs.hpd_enable `h]jz)}(hj<h]hdrm_bridge_funcs.hpd_enable}(hj>hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMvhj2ubh' if implemented and register the given }(hj2hhhNhNubj%)}(h**cb**h]hcb}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubh and }(hj2hhhNhNubj%)}(h**data**h]hdata}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubh4 as hot plug notification callback. From now on the }(hj2hhhNhNubj%)}(h**cb**h]hcb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubh will be called with }(hj2hhhNhNubj%)}(h**data**h]hdata}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubh when an output status change is detected by the bridge, until hot plug notification gets disabled with drm_bridge_hpd_disable().}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYhMvhjJubh)}(hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h]hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM{hjJubh)}(hOnly one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.h]hOnly one hot plug detection callback can be registered at a time, it is an error to call this function when hot plug detection is already enabled for the bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chM~hjJubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_bridge_hpd_disable (C function)c.drm_bridge_hpd_disablehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h7void drm_bridge_hpd_disable (struct drm_bridge *bridge)h]j)}(h6void drm_bridge_hpd_disable(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_bridge_hpd_disableh]j)}(hdrm_bridge_hpd_disableh]hdrm_bridge_hpd_disable}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjGmodnameN classnameNjj)}j]j)}jj sbc.drm_bridge_hpd_disableasbuh1hhj#ubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj+)}(hj9h]h*}(hjshhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj#ubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h)disable hot plug detection for the bridgeh]h)disable hot plug detection for the bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure **Description** Call :c:type:`drm_bridge_funcs.hpd_disable ` if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs. Hot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubji)}(hhh]jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj&h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hXCall :c:type:`drm_bridge_funcs.hpd_disable ` if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs.h](hCall }(hj<hhhNhNubh)}(h9:c:type:`drm_bridge_funcs.hpd_disable `h]jz)}(hjFh]hdrm_bridge_funcs.hpd_disable}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj<ubh if implemented and unregister the hot plug detection callback previously registered with drm_bridge_hpd_enable(). Once this function returns the callback will not be called by the bridge when an output status change occurs.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchMhjubh)}(hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.h]hHot plug detection is supported only if the DRM_BRIDGE_OP_HPD flag is set in bridge->ops. This function shall not be called when the flag is not set.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_bridge_hpd_notify (C function)c.drm_bridge_hpd_notifyhNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hXvoid drm_bridge_hpd_notify (struct drm_bridge *bridge, enum drm_connector_status status)h]j)}(hWvoid drm_bridge_hpd_notify(struct drm_bridge *bridge, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_bridge_hpd_notifyh]j)}(hdrm_bridge_hpd_notifyh]hdrm_bridge_hpd_notify}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h=(struct drm_bridge *bridge, enum drm_connector_status status)h](j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_bridge_hpd_notifyasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h enum drm_connector_status statush](j)}(hj8h]henum}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(hdrm_connector_statush]hdrm_connector_status}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjlmodnameN classnameNjj)}j]jc.drm_bridge_hpd_notifyasbuh1hhjHubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hstatush]hstatus}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h notify hot plug detection eventsh]h notify hot plug detection events}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct drm_bridge *bridge`` bridge control structure ``enum drm_connector_status status`` output connection status **Description** Bridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable(). This function shall be called in a context that can sleep.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubji)}(hhh](jn)}(h7``struct drm_bridge *bridge`` bridge control structure h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(hbridge control structureh]hbridge control structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h>``enum drm_connector_status status`` output connection status h](jt)}(h$``enum drm_connector_status status``h]jz)}(hj:h]h enum drm_connector_status status}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj4ubj)}(hhh]h)}(houtput connection statush]houtput connection status}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhjOhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hBridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable().h]hBridge drivers shall call this function to report hot plug events when they detect a change in the output status, when hot plug detection has been enabled by drm_bridge_hpd_enable().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h:This function shall be called in a context that can sleep.h]h:This function shall be called in a context that can sleep.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'of_drm_find_and_get_bridge (C function)c.of_drm_find_and_get_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hGstruct drm_bridge * of_drm_find_and_get_bridge (struct device_node *np)h]j)}(hEstruct drm_bridge *of_drm_find_and_get_bridge(struct device_node *np)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jof_drm_find_and_get_bridgesbc.of_drm_find_and_get_bridgeasbuh1hhjhhhjhMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hof_drm_find_and_get_bridgeh]j)}(hjh]hof_drm_find_and_get_bridge}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct device_node *np)h]j)}(hstruct device_node *nph](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubh)}(hhh]j)}(h device_nodeh]h device_node}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjcmodnameN classnameNjj)}j]jc.of_drm_find_and_get_bridgeasbuh1hhj?ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj?ubj)}(hnph]hnp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hJfind the bridge corresponding to the device node in the global bridge listh]hJfind the bridge corresponding to the device node in the global bridge list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(h**Parameters** ``struct device_node *np`` device node **Description** The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it. **Return** drm_bridge control struct on success, NULL on failureh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubji)}(hhh]jn)}(h'``struct device_node *np`` device node h](jt)}(h``struct device_node *np``h]jz)}(hjh]hstruct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(h device nodeh]h device node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj@h]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.h]h[The refcount of the returned bridge is incremented. Use drm_bridge_put() when done with it.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h **Return**h]j%)}(hjgh]hReturn}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h5drm_bridge control struct on success, NULL on failureh]h5drm_bridge control struct on success, NULL on failure}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jof_drm_find_bridge (C function)c.of_drm_find_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(h?struct drm_bridge * of_drm_find_bridge (struct device_node *np)h]j)}(h=struct drm_bridge *of_drm_find_bridge(struct device_node *np)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jof_drm_find_bridgesbc.of_drm_find_bridgeasbuh1hhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hof_drm_find_bridgeh]j)}(hjh]hof_drm_find_bridge}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct device_node *np)h]j)}(hstruct device_node *nph](j)}(hjh]hstruct}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubh)}(hhh]j)}(h device_nodeh]h device_node}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjFmodnameN classnameNjj)}j]jc.of_drm_find_bridgeasbuh1hhj"ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj+)}(hj9h]h*}(hjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj"ubj)}(hnph]hnp}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hJfind the bridge corresponding to the device node in the global bridge listh]hJfind the bridge corresponding to the device node in the global bridge list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj'JhNhNubj)}(hX@**Parameters** ``struct device_node *np`` device node **Description** This function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting. The bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of: - get a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer - not call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced - again, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do **Return** drm_bridge control struct on success, NULL on failureh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubji)}(hhh]jn)}(h'``struct device_node *np`` device node h](jt)}(h``struct device_node *np``h]jz)}(hjh]hstruct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(h device nodeh]h device node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj#h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!ubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hdThis function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting.h]hdThis function is deprecated. Convert to of_drm_find_and_get_bridge() instead for proper refcounting.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hThe bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of:h]hThe bridge returned by this function is not refcounted. This is dangerous because the bridge might be deallocated even before the caller has a chance to use it. To use this function you have to do one of:}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(hhh](h)}(hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer h]h)}(hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointerh]hget a reference with drm_bridge_get() as soon as possible to minimize the race window, and then drm_bridge_put() when no longer using the pointer}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjZubah}(h]h ]h"]h$]h&]uh1hhjWubh)}(hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced h]h)}(hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introducedh]hnot call drm_bridge_get() or drm_bridge_put() at all, which used to be the correct practice before dynamic bridge lifetime was introduced}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjsubah}(h]h ]h"]h$]h&]uh1hhjWubh)}(hSagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do h]h)}(hRagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to doh]hRagain, convert to of_drm_find_and_get_bridge(), which is the only safe thing to do}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubah}(h]h ]h"]h$]h&]uh1hhjWubeh}(h]h ]h"]h$]h&]j8j4uh1hhjlhMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubh)}(h5drm_bridge control struct on success, NULL on failureh]h5drm_bridge control struct on success, NULL on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j devm_drm_put_bridge (C function)c.devm_drm_put_bridgehNtauh1jxhj'JhhhNhNubj)}(hhh](j)}(hHvoid devm_drm_put_bridge (struct device *dev, struct drm_bridge *bridge)h]j)}(hGvoid devm_drm_put_bridge(struct device *dev, struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdevm_drm_put_bridgeh]j)}(hdevm_drm_put_bridgeh]hdevm_drm_put_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h/(struct device *dev, struct drm_bridge *bridge)h](j)}(hstruct device *devh](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubh)}(hhh]j)}(hdeviceh]hdevice}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjOmodnameN classnameNjj)}j]j)}jjsbc.devm_drm_put_bridgeasbuh1hhj+ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj+)}(hj9h]h*}(hj{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj+ubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubj)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jic.devm_drm_put_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj'ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h,Release a bridge reference obtained via devmh]h,Release a bridge reference obtained via devm}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhj'JhNhNubj)}(hX**Parameters** ``struct device *dev`` device that got the bridge via devm ``struct drm_bridge *bridge`` pointer to a struct drm_bridge obtained via devm **Description** Same as drm_bridge_put() for bridge pointers obtained via devm functions such as devm_drm_bridge_alloc(). This function is a temporary workaround and MUST NOT be used. Manual handling of bridge lifetime is inherently unsafe.h](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj>ubji)}(hhh](jn)}(h;``struct device *dev`` device that got the bridge via devm h](jt)}(h``struct device *dev``h]jz)}(hjch]hstruct device *dev}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj]ubj)}(hhh]h)}(h#device that got the bridge via devmh]h#device that got the bridge via devm}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjZubjn)}(hO``struct drm_bridge *bridge`` pointer to a struct drm_bridge obtained via devm h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhjubj)}(hhh]h)}(h0pointer to a struct drm_bridge obtained via devmh]h0pointer to a struct drm_bridge obtained via devm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjZubeh}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj>ubh)}(hiSame as drm_bridge_put() for bridge pointers obtained via devm functions such as devm_drm_bridge_alloc().h]hiSame as drm_bridge_put() for bridge pointers obtained via devm functions such as devm_drm_bridge_alloc().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj>ubh)}(hvThis function is a temporary workaround and MUST NOT be used. Manual handling of bridge lifetime is inherently unsafe.h]hvThis function is a temporary workaround and MUST NOT be used. Manual handling of bridge lifetime is inherently unsafe.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:197: ./drivers/gpu/drm/drm_bridge.chMhj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj'JhhhNhNubeh}(h]bridge-helper-referenceah ]h"]bridge helper referenceah$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(hMIPI-DSI bridge operationh]hMIPI-DSI bridge operation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hDSI host interfaces are expected to be implemented as bridges rather than encoders, however there are a few aspects of their operation that need to be defined in order to provide a consistent interface.h]hDSI host interfaces are expected to be implemented as bridges rather than encoders, however there are a few aspects of their operation that need to be defined in order to provide a consistent interface.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:203: ./drivers/gpu/drm/drm_bridge.chKhjhhubh)}(hXgA DSI host should keep the PHY powered down until the pre_enable operation is called. All lanes are in an undefined idle state up to this point, and it must not be assumed that it is LP-11. pre_enable should initialise the PHY, set the data lanes to LP-11, and the clock lane to either LP-11 or HS depending on the mode_flag ``MIPI_DSI_CLOCK_NON_CONTINUOUS``.h](hXEA DSI host should keep the PHY powered down until the pre_enable operation is called. All lanes are in an undefined idle state up to this point, and it must not be assumed that it is LP-11. pre_enable should initialise the PHY, set the data lanes to LP-11, and the clock lane to either LP-11 or HS depending on the mode_flag }(hj:hhhNhNubjz)}(h!``MIPI_DSI_CLOCK_NON_CONTINUOUS``h]hMIPI_DSI_CLOCK_NON_CONTINUOUS}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:ubh.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:203: ./drivers/gpu/drm/drm_bridge.chKhjhhubh)}(hX^Ordinarily the downstream bridge DSI peripheral pre_enable will have been called before the DSI host. If the DSI peripheral requires LP-11 and/or the clock lane to be in HS mode prior to pre_enable, then it can set the :c:type:`pre_enable_prev_first` flag to request the pre_enable (and post_disable) order to be altered to enable the DSI host first.h](hOrdinarily the downstream bridge DSI peripheral pre_enable will have been called before the DSI host. If the DSI peripheral requires LP-11 and/or the clock lane to be in HS mode prior to pre_enable, then it can set the }(hj[hhhNhNubh)}(h:c:type:`pre_enable_prev_first`h]jz)}(hjeh]hpre_enable_prev_first}(hjghhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjpre_enable_prev_firstuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:203: ./drivers/gpu/drm/drm_bridge.chKhj[ubhd flag to request the pre_enable (and post_disable) order to be altered to enable the DSI host first.}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjhhubh)}(hEither the CRTC being enabled, or the DSI host enable operation should switch the host to actively transmitting video on the data lanes.h]hEither the CRTC being enabled, or the DSI host enable operation should switch the host to actively transmitting video on the data lanes.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:203: ./drivers/gpu/drm/drm_bridge.chKhjhhubh)}(hXThe reverse also applies. The DSI host disable operation or stopping the CRTC should stop transmitting video, and the data lanes should return to the LP-11 state. The DSI host :c:type:`post_disable` operation should disable the PHY. If the :c:type:`pre_enable_prev_first` flag is set, then the DSI peripheral's bridge :c:type:`post_disable` will be called before the DSI host's post_disable.h](hThe reverse also applies. The DSI host disable operation or stopping the CRTC should stop transmitting video, and the data lanes should return to the LP-11 state. The DSI host }(hjhhhNhNubh)}(h:c:type:`post_disable`h]jz)}(hjh]h post_disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj post_disableuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:203: ./drivers/gpu/drm/drm_bridge.chKhjubh* operation should disable the PHY. If the }(hjhhhNhNubh)}(h:c:type:`pre_enable_prev_first`h]jz)}(hjh]hpre_enable_prev_first}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjpre_enable_prev_firstuh1hhjhKhjubh1 flag is set, then the DSI peripheral’s bridge }(hjhhhNhNubh)}(h:c:type:`post_disable`h]jz)}(hjh]h post_disable}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj post_disableuh1hhjhKhjubh5 will be called before the DSI host’s post_disable.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjhhubh)}(hWhilst it is valid to call :c:type:`host_transfer` prior to pre_enable or after post_disable, the exact state of the lanes is undefined at this point. The DSI host should initialise the interface, transmit the data, and then disable the interface again.h](hWhilst it is valid to call }(hjhhhNhNubh)}(h:c:type:`host_transfer`h]jz)}(hjh]h host_transfer}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj host_transferuh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:203: ./drivers/gpu/drm/drm_bridge.chKhjubh prior to pre_enable or after post_disable, the exact state of the lanes is undefined at this point. The DSI host should initialise the interface, transmit the data, and then disable the interface again.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hKhjhhubh)}(hUltra Low Power State (ULPS) is not explicitly supported by DRM. If implemented, it therefore needs to be handled entirely within the DSI Host driver.h]hUltra Low Power State (ULPS) is not explicitly supported by DRM. If implemented, it therefore needs to be handled entirely within the DSI Host driver.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:203: ./drivers/gpu/drm/drm_bridge.chKhjhhubeh}(h]mipi-dsi-bridge-operationah ]h"]mipi-dsi bridge operationah$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(h!Bridge Connector Helper Referenceh]h!Bridge Connector Helper Reference}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hhhhhKubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_bridge_connector_init (C function)c.drm_bridge_connector_inithNtauh1jxhj]hhhNhNubj)}(hhh](j)}(hfstruct drm_connector * drm_bridge_connector_init (struct drm_device *drm, struct drm_encoder *encoder)h]j)}(hdstruct drm_connector *drm_bridge_connector_init(struct drm_device *drm, struct drm_encoder *encoder)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_bridge_connector_initsbc.drm_bridge_connector_initasbuh1hhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrm_bridge_connector_inith]j)}(hjh]hdrm_bridge_connector_init}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h5(struct drm_device *drm, struct drm_encoder *encoder)h](j)}(hstruct drm_device *drmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]jc.drm_bridge_connector_initasbuh1hhjubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjKhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdrmh]hdrm}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_encoder *encoderh](j)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(h drm_encoderh]h drm_encoder}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_bridge_connector_initasbuh1hhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(hencoderh]hencoder}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jzah ](jjeh"]h$]h&]jj)jhuh1jhjhMhj|hhubj)}(hhh]h)}(h-Initialise a connector for a chain of bridgesh]h-Initialise a connector for a chain of bridges}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj|hhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj]hNhNubj)}(hX**Parameters** ``struct drm_device *drm`` the DRM device ``struct drm_encoder *encoder`` the encoder where the bridge chain starts **Description** Allocate, initialise and register a :c:type:`drm_bridge_connector` with the **drm** device. The connector is associated with a chain of bridges that starts at the **encoder**. All bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), and none of them may create a DRM connector directly. Returns a pointer to the new connector on success, or a negative error pointer otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubji)}(hhh](jn)}(h*``struct drm_device *drm`` the DRM device h](jt)}(h``struct drm_device *drm``h]jz)}(hj3h]hstruct drm_device *drm}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chMhj-ubj)}(hhh]h)}(hthe DRM deviceh]hthe DRM device}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjIubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jmhjHhMhj*ubjn)}(hJ``struct drm_encoder *encoder`` the encoder where the bridge chain starts h](jt)}(h``struct drm_encoder *encoder``h]jz)}(hjlh]hstruct drm_encoder *encoder}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]uh1jshs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjfubj)}(hhh]h)}(h)the encoder where the bridge chain startsh]h)the encoder where the bridge chain starts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj*ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubh)}(hXAllocate, initialise and register a :c:type:`drm_bridge_connector` with the **drm** device. The connector is associated with a chain of bridges that starts at the **encoder**. All bridges in the chain shall report bridge operation flags (:c:type:`drm_bridge->ops `) and bridge output type (:c:type:`drm_bridge->type `), and none of them may create a DRM connector directly.h](h$Allocate, initialise and register a }(hjhhhNhNubh)}(h:c:type:`drm_bridge_connector`h]jz)}(hjh]hdrm_bridge_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_connectoruh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chMhjubh with the }(hjhhhNhNubj%)}(h**drm**h]hdrm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhP device. The connector is associated with a chain of bridges that starts at the }(hjhhhNhNubj%)}(h **encoder**h]hencoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh@. All bridges in the chain shall report bridge operation flags (}(hjhhhNhNubh)}(h&:c:type:`drm_bridge->ops `h]jz)}(hjh]hdrm_bridge->ops}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjhMhjubh) and bridge output type (}(hjhhhNhNubh)}(h':c:type:`drm_bridge->type `h]jz)}(hj2h]hdrm_bridge->type}(hj4hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hhjhMhjubh8), and none of them may create a DRM connector directly.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hYReturns a pointer to the new connector on success, or a negative error pointer otherwise.h]hYReturns a pointer to the new connector on success, or a negative error pointer otherwise.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:210: ./drivers/gpu/drm/display/drm_bridge_connector.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj]hhhNhNubeh}(h]!bridge-connector-helper-referenceah ]h"]!bridge connector helper referenceah$]h&]uh1hhj@hhhhhKubh)}(hhh](h)}(hPanel-Bridge Helper Referenceh]hPanel-Bridge Helper Reference}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhhhhhKubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_bridge_is_panel (C function)c.drm_bridge_is_panelhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(h:bool drm_bridge_is_panel (const struct drm_bridge *bridge)h]j)}(h9bool drm_bridge_is_panel(const struct drm_bridge *bridge)h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_bridge_is_panelh]j)}(hdrm_bridge_is_panelh]hdrm_bridge_is_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h!(const struct drm_bridge *bridge)h]j)}(hconst struct drm_bridge *bridgeh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_bridge_is_panelasbuh1hhjubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjDhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbridgeh]hbridge}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h)Checks if a drm_bridge is a panel_bridge.h]h)Checks if a drm_bridge is a panel_bridge.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjxhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(h**Parameters** ``const struct drm_bridge *bridge`` The drm_bridge to be checked. **Description** Returns true if the bridge is a panel bridge, or false otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubji)}(hhh]jn)}(hB``const struct drm_bridge *bridge`` The drm_bridge to be checked. h](jt)}(h#``const struct drm_bridge *bridge``h]jz)}(hjh]hconst struct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubj)}(hhh]h)}(hThe drm_bridge to be checked.h]hThe drm_bridge to be checked.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hAReturns true if the bridge is a panel bridge, or false otherwise.h]hAReturns true if the bridge is a panel bridge, or false otherwise.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_panel_bridge_add (C function)c.drm_panel_bridge_addhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(hBstruct drm_bridge * drm_panel_bridge_add (struct drm_panel *panel)h]j)}(h@struct drm_bridge *drm_panel_bridge_add(struct drm_panel *panel)h](j)}(hjh]hstruct}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhjIhKubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj]modnameN classnameNjj)}j]j)}jdrm_panel_bridge_addsbc.drm_panel_bridge_addasbuh1hhj8hhhjIhKubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhjIhKubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj8hhhjIhKubj)}(hdrm_panel_bridge_addh]j)}(hjyh]hdrm_panel_bridge_add}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj8hhhjIhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jwc.drm_panel_bridge_addasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj8hhhjIhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj4hhhjIhKubah}(h]j/ah ](jjeh"]h$]h&]jj)jhuh1jhjIhKhj1hhubj)}(hhh]h)}(h~Creates a :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](h Creates a }(hj7hhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjAh]h drm_bridge}(hjChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jwc.drm_panel_bridge_addasbj drm_bridgeuh1hhjhKhj7ubh and }(hj7hhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjih]h drm_connector}(hjkhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj]j drm_connectoruh1hhjhKhj7ubh0 that just calls the appropriate functions from }(hj7hhhNhNubh)}(h:c:type:`drm_panel`h]jz)}(hjh]h drm_panel}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj]j drm_paneluh1hhjhKhj7ubh.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhj4hhubah}(h]h ]h"]h$]h&]uh1jhj1hhhjIhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(hX;**Parameters** ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** For drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they're now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it. The connector type is set to **panel->connector_type**, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL). See devm_drm_panel_bridge_add() for an automatically managed version of this function.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubji)}(hhh]jn)}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](jt)}(h``struct drm_panel *panel``h]jz)}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubj)}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hXFor drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they're now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it.h]hXFor drivers converting from directly using drm_panel: The expected usage pattern is that during either encoder module probe or DSI host attach, a drm_panel will be looked up through drm_of_find_panel_or_bridge(). drm_panel_bridge_add() is used to wrap that panel in the new bridge, and the result can then be passed to drm_bridge_attach(). The drm_panel_prepare() and related functions can be dropped from the encoder driver (they’re now called by the KMS helpers before calling into the encoder), along with connector creation. When done with the bridge (after drm_mode_config_cleanup() if the bridge has already been attached), then drm_panel_bridge_remove() to free it.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hThe connector type is set to **panel->connector_type**, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL).h](hThe connector type is set to }(hjFhhhNhNubj%)}(h**panel->connector_type**h]hpanel->connector_type}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubh, which must be set to a known type. Calling this function with a panel whose connector type is DRM_MODE_CONNECTOR_Unknown will return ERR_PTR(-EINVAL).}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chKhjubh)}(hVSee devm_drm_panel_bridge_add() for an automatically managed version of this function.h]hVSee devm_drm_panel_bridge_add() for an automatically managed version of this function.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_panel_bridge_add_typed (C function)c.drm_panel_bridge_add_typedhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(h\struct drm_bridge * drm_panel_bridge_add_typed (struct drm_panel *panel, u32 connector_type)h]j)}(hZstruct drm_bridge *drm_panel_bridge_add_typed(struct drm_panel *panel, u32 connector_type)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_panel_bridge_add_typedsbc.drm_panel_bridge_add_typedasbuh1hhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrm_panel_bridge_add_typedh]j)}(hjh]hdrm_panel_bridge_add_typed}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h-(struct drm_panel *panel, u32 connector_type)h](j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]jc.drm_panel_bridge_add_typedasbuh1hhj ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjZhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hpanelh]hpanel}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu32 connector_typeh](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_panel_bridge_add_typedasbuh1hhj|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(hconnector_typeh]hconnector_type}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h[Creates a :c:type:`drm_bridge` and :c:type:`drm_connector` with an explicit connector type.h](h Creates a }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jc.drm_panel_bridge_add_typedasbj drm_bridgeuh1hhjhKhjubh and }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hj h]h drm_connector}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhKhjubh! with an explicit connector type.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj<jj<jjjuh1jhhhjwhNhNubj)}(hX**Parameters** ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. ``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) **Description** This is just like drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel. This function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h](h)}(h**Parameters**h]j%)}(hjFh]h Parameters}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjDubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhj@ubji)}(hhh](jn)}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](jt)}(h``struct drm_panel *panel``h]jz)}(hjeh]hstruct drm_panel *panel}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhj_ubj)}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhj{ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhjzhMhj\ubjn)}(hA``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) h](jt)}(h``u32 connector_type``h]jz)}(hjh]hu32 connector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(h)The connector type (DRM_MODE_CONNECTOR_*)h]h)The connector type (DRM_MODE_CONNECTOR_*)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj\ubeh}(h]h ]h"]h$]h&]uh1jhhj@ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhj@ubh)}(hThis is just like drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel.h](hKThis is just like drm_panel_bridge_add(), but forces the connector type to }(hjhhhNhNubj%)}(h**connector_type**h]hconnector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh' instead of infering it from the panel.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhj@ubh)}(hThis function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h]hThis function is deprecated and should not be used in new drivers. Use drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don’t report a connector type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhj@ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_panel_bridge_remove (C function)c.drm_panel_bridge_removehNtauh1jxhjwhhhNhNubj)}(hhh](j)}(h8void drm_panel_bridge_remove (struct drm_bridge *bridge)h]j)}(h7void drm_panel_bridge_remove(struct drm_bridge *bridge)h](j)}(hvoidh]hvoid}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM7ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhjMhM7ubj)}(hdrm_panel_bridge_removeh]j)}(hdrm_panel_bridge_removeh]hdrm_panel_bridge_remove}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj;hhhjMhM7ubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjbsbc.drm_panel_bridge_removeasbuh1hhjxubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjxubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjtubah}(h]h ]h"]h$]h&]jjuh1jhj;hhhjMhM7ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj7hhhjMhM7ubah}(h]j2ah ](jjeh"]h$]h&]jj)jhuh1jhjMhM7hj4hhubj)}(hhh]h)}(hEUnregisters and frees a drm_bridge created by drm_panel_bridge_add().h]hEUnregisters and frees a drm_bridge created by drm_panel_bridge_add().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM7hjhhubah}(h]h ]h"]h$]h&]uh1jhj4hhhjMhM7ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(hK**Parameters** ``struct drm_bridge *bridge`` The drm_bridge being freed.h](h)}(h**Parameters**h]j%)}(hj!h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM;hjubji)}(hhh]jn)}(h9``struct drm_bridge *bridge`` The drm_bridge being freed.h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hj@h]hstruct drm_bridge *bridge}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM=hj:ubj)}(hhh]h)}(hThe drm_bridge being freed.h]hThe drm_bridge being freed.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM:hjVubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhjUhM=hj7ubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_panel_bridge_set_orientation (C function)"c.drm_panel_bridge_set_orientationhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(haint drm_panel_bridge_set_orientation (struct drm_connector *connector, struct drm_bridge *bridge)h]j)}(h`int drm_panel_bridge_set_orientation(struct drm_connector *connector, struct drm_bridge *bridge)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMQubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMQubj)}(h drm_panel_bridge_set_orientationh]j)}(h drm_panel_bridge_set_orientationh]h drm_panel_bridge_set_orientation}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMQubj)}(h<(struct drm_connector *connector, struct drm_bridge *bridge)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb"c.drm_panel_bridge_set_orientationasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjimodnameN classnameNjj)}j]j"c.drm_panel_bridge_set_orientationasbuh1hhjEubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjEubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMQubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMQubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMQhjhhubj)}(hhh]h)}(h^Set the connector's panel orientation from the bridge that can be transformed to panel bridge.h]h`Set the connector’s panel orientation from the bridge that can be transformed to panel bridge.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMQhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMQubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(h**Parameters** ``struct drm_connector *connector`` The connector to be set panel orientation. ``struct drm_bridge *bridge`` The drm_bridge to be transformed to panel bridge. **Description** Returns 0 on success, negative errno on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMUhjubji)}(hhh](jn)}(hO``struct drm_connector *connector`` The connector to be set panel orientation. h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj h]hstruct drm_connector *connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMThjubj)}(hhh]h)}(h*The connector to be set panel orientation.h]h*The connector to be set panel orientation.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMThj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMThjubjn)}(hP``struct drm_bridge *bridge`` The drm_bridge to be transformed to panel bridge. h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjDh]hstruct drm_bridge *bridge}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMUhj>ubj)}(hhh]h)}(h1The drm_bridge to be transformed to panel bridge.h]h1The drm_bridge to be transformed to panel bridge.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMUhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jmhjYhMUhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMWhjubh)}(h0Returns 0 on success, negative errno on failure.h]h0Returns 0 on success, negative errno on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMVhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&devm_drm_panel_bridge_add (C function)c.devm_drm_panel_bridge_addhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(h[struct drm_bridge * devm_drm_panel_bridge_add (struct device *dev, struct drm_panel *panel)h]j)}(hYstruct drm_bridge *devm_drm_panel_bridge_add(struct device *dev, struct drm_panel *panel)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMpubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMpubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdevm_drm_panel_bridge_addsbc.devm_drm_panel_bridge_addasbuh1hhjhhhjhMpubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMpubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMpubj)}(hdevm_drm_panel_bridge_addh]j)}(hjh]hdevm_drm_panel_bridge_add}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMpubj)}(h-(struct device *dev, struct drm_panel *panel)h](j)}(hstruct device *devh](j)}(hjh]hstruct}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubh)}(hhh]j)}(hdeviceh]hdevice}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj^modnameN classnameNjj)}j]jc.devm_drm_panel_bridge_addasbuh1hhj:ubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:ubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubj)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.devm_drm_panel_bridge_addasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMpubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMpubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMphjhhubj)}(hhh]h)}(hCreates a managed :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](hCreates a managed }(hj/hhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hj9h]h drm_bridge}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]jc.devm_drm_panel_bridge_addasbj drm_bridgeuh1hhjhKhj/ubh and }(hj/hhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjah]h drm_connector}(hjchhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjUj drm_connectoruh1hhjhKhj/ubh0 that just calls the appropriate functions from }(hj/hhhNhNubh)}(h:c:type:`drm_panel`h]jz)}(hjh]h drm_panel}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjUj drm_paneluh1hhjhKhj/ubh.}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMphj,hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMpubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(hX1**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** This is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is unbound.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMthjubji)}(hhh](jn)}(h<``struct device *dev`` device to tie the bridge lifetime to h](jt)}(h``struct device *dev``h]jz)}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMrhjubj)}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMrhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMrhjubjn)}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](jt)}(h``struct drm_panel *panel``h]jz)}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMshjubj)}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hMshj-ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj,hMshjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjRh]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMuhjubh)}(hThis is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is unbound.h](hoThis is the managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when }(hjhhhhNhNubj%)}(h**dev**h]hdev}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhubh is unbound.}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMthjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,devm_drm_panel_bridge_add_typed (C function)!c.devm_drm_panel_bridge_add_typedhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(hustruct drm_bridge * devm_drm_panel_bridge_add_typed (struct device *dev, struct drm_panel *panel, u32 connector_type)h]j)}(hsstruct drm_bridge *devm_drm_panel_bridge_add_typed(struct device *dev, struct drm_panel *panel, u32 connector_type)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdevm_drm_panel_bridge_add_typedsb!c.devm_drm_panel_bridge_add_typedasbuh1hhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdevm_drm_panel_bridge_add_typedh]j)}(hjh]hdevm_drm_panel_bridge_add_typed}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hA(struct device *dev, struct drm_panel *panel, u32 connector_type)h](j)}(hstruct device *devh](j)}(hjh]hstruct}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdeviceh]hdevice}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjCmodnameN classnameNjj)}j]j!c.devm_drm_panel_bridge_add_typedasbuh1hhjubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjmhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.devm_drm_panel_bridge_add_typedasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu32 connector_typeh](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.devm_drm_panel_bridge_add_typedasbuh1hhjubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hconnector_typeh]hconnector_type}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hcCreates a managed :c:type:`drm_bridge` and :c:type:`drm_connector` with an explicit connector type.h](hCreates a managed }(hj\hhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjfh]h drm_bridge}(hjhhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j!c.devm_drm_panel_bridge_add_typedasbj drm_bridgeuh1hhjhKhj\ubh and }(hj\hhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhKhj\ubh! with an explicit connector type.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjYhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(hX3**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. ``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) **Description** This is just like devm_drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel. This function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubji)}(hhh](jn)}(h<``struct device *dev`` device to tie the bridge lifetime to h](jt)}(h``struct device *dev``h]jz)}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](jt)}(h``struct drm_panel *panel``h]jz)}(hj!h]hstruct drm_panel *panel}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj7ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj6hMhjubjn)}(hA``u32 connector_type`` The connector type (DRM_MODE_CONNECTOR_*) h](jt)}(h``u32 connector_type``h]jz)}(hjZh]hu32 connector_type}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjTubj)}(hhh]h)}(h)The connector type (DRM_MODE_CONNECTOR_*)h]h)The connector type (DRM_MODE_CONNECTOR_*)}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMhjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jmhjohMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis is just like devm_drm_panel_bridge_add(), but forces the connector type to **connector_type** instead of infering it from the panel.h](hPThis is just like devm_drm_panel_bridge_add(), but forces the connector type to }(hjhhhNhNubj%)}(h**connector_type**h]hconnector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh' instead of infering it from the panel.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don't report a connector type.h]hThis function is deprecated and should not be used in new drivers. Use devm_drm_panel_bridge_add() instead, and fix panel drivers as necessary if they don’t report a connector type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drmm_panel_bridge_add (C function)c.drmm_panel_bridge_addhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(h[struct drm_bridge * drmm_panel_bridge_add (struct drm_device *drm, struct drm_panel *panel)h]j)}(hYstruct drm_bridge *drmm_panel_bridge_add(struct drm_device *drm, struct drm_panel *panel)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrmm_panel_bridge_addsbc.drmm_panel_bridge_addasbuh1hhjhhhjhMubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjIhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrmm_panel_bridge_addh]j)}(hj8h]hdrmm_panel_bridge_add}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h1(struct drm_device *drm, struct drm_panel *panel)h](j)}(hstruct drm_device *drmh](j)}(hjh]hstruct}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j6c.drmm_panel_bridge_addasbuh1hhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjqubj)}(hdrmh]hdrm}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j6c.drmm_panel_bridge_addasbuh1hhjubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hCreates a DRM-managed :c:type:`drm_bridge` and :c:type:`drm_connector` that just calls the appropriate functions from :c:type:`drm_panel`.h](hCreates a DRM-managed }(hjfhhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjph]h drm_bridge}(hjrhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j6c.drmm_panel_bridge_addasbj drm_bridgeuh1hhjhKhjfubh and }(hjfhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhKhjfubh0 that just calls the appropriate functions from }(hjfhhhNhNubh)}(h:c:type:`drm_panel`h]jz)}(hjh]h drm_panel}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_paneluh1hhjhKhjfubh.}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjchhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(hX@**Parameters** ``struct drm_device *drm`` DRM device to tie the bridge lifetime to ``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. **Description** This is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is cleaned up.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubji)}(hhh](jn)}(hD``struct drm_device *drm`` DRM device to tie the bridge lifetime to h](jt)}(h``struct drm_device *drm``h]jz)}(hjh]hstruct drm_device *drm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(h(DRM device to tie the bridge lifetime toh]h(DRM device to tie the bridge lifetime to}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj*hMhj ubjn)}(hL``struct drm_panel *panel`` The drm_panel being wrapped. Must be non-NULL. h](jt)}(h``struct drm_panel *panel``h]jz)}(hjNh]hstruct drm_panel *panel}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjHubj)}(hhh]h)}(h/The drm_panel being wrapped. Must be non-NULL.h]h/The drm_panel being wrapped. Must be non-NULL.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjdubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjchMhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hThis is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when **dev** is cleaned up.h](hsThis is the DRM-managed version of drm_panel_bridge_add() which automatically calls drm_panel_bridge_remove() when }(hjhhhNhNubj%)}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is cleaned up.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_panel_bridge_connector (C function)c.drm_panel_bridge_connectorhNtauh1jxhjwhhhNhNubj)}(hhh](j)}(hMstruct drm_connector * drm_panel_bridge_connector (struct drm_bridge *bridge)h]j)}(hKstruct drm_connector *drm_panel_bridge_connector(struct drm_bridge *bridge)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_panel_bridge_connectorsbc.drm_panel_bridge_connectorasbuh1hhjhhhjhMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrm_panel_bridge_connectorh]j)}(hjh]hdrm_panel_bridge_connector}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_bridge *bridge)h]j)}(hstruct drm_bridge *bridgeh](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjzmodnameN classnameNjj)}j]jc.drm_panel_bridge_connectorasbuh1hhjVubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjVubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h)return the connector for the panel bridgeh]h)return the connector for the panel bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(h**Parameters** ``struct drm_bridge *bridge`` The drm_bridge. **Description** drm_panel_bridge creates the connector. This function gives external access to the connector. **Return** Pointer to drm_connectorh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubji)}(hhh]jn)}(h.``struct drm_bridge *bridge`` The drm_bridge. h](jt)}(h``struct drm_bridge *bridge``h]jz)}(hjh]hstruct drm_bridge *bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(hThe drm_bridge.h]hThe drm_bridge.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMhj2ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj1hMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjWh]h Description}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(h]drm_panel_bridge creates the connector. This function gives external access to the connector.h]h]drm_panel_bridge creates the connector. This function gives external access to the connector.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(h **Return**h]j%)}(hj~h]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hPointer to drm_connectorh]hPointer to drm_connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#devm_drm_of_get_bridge (C function)c.devm_drm_of_get_bridgehNtauh1jxhjwhhhNhNubj)}(hhh](j)}(hostruct drm_bridge * devm_drm_of_get_bridge (struct device *dev, struct device_node *np, u32 port, u32 endpoint)h]j)}(hmstruct drm_bridge *devm_drm_of_get_bridge(struct device *dev, struct device_node *np, u32 port, u32 endpoint)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdevm_drm_of_get_bridgesbc.devm_drm_of_get_bridgeasbuh1hhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdevm_drm_of_get_bridgeh]j)}(hjh]hdevm_drm_of_get_bridge}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hD(struct device *dev, struct device_node *np, u32 port, u32 endpoint)h](j)}(hstruct device *devh](j)}(hjh]hstruct}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(hdeviceh]hdevice}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj]modnameN classnameNjj)}j]jc.devm_drm_of_get_bridgeasbuh1hhj9ubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj9ubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubj)}(hstruct device_node *nph](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.devm_drm_of_get_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hnph]hnp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubj)}(hu32 porth](h)}(hhh]j)}(hu32h]hu32}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]jc.devm_drm_of_get_bridgeasbuh1hhjubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hporth]hport}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubj)}(h u32 endpointh](h)}(hhh]j)}(hu32h]hu32}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjjmodnameN classnameNjj)}j]jc.devm_drm_of_get_bridgeasbuh1hhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(hendpointh]hendpoint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hReturn next bridge in the chainh]hReturn next bridge in the chain}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjwhNhNubj)}(hX**Parameters** ``struct device *dev`` device to tie the bridge lifetime to ``struct device_node *np`` device tree node containing encoder output ports ``u32 port`` port in the device tree node ``u32 endpoint`` endpoint in the device tree node **Description** Given a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected. Returns a pointer to the bridge if successful, or an error pointer otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubji)}(hhh](jn)}(h<``struct device *dev`` device to tie the bridge lifetime to h](jt)}(h``struct device *dev``h]jz)}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hL``struct device_node *np`` device tree node containing encoder output ports h](jt)}(h``struct device_node *np``h]jz)}(hj8h]hstruct device_node *np}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj6ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhj2ubj)}(hhh]h)}(h0device tree node containing encoder output portsh]h0device tree node containing encoder output ports}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhMhjNubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jmhjMhMhjubjn)}(h*``u32 port`` port in the device tree node h](jt)}(h ``u32 port``h]jz)}(hjqh]hu32 port}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjoubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjkubj)}(hhh]h)}(hport in the device tree nodeh]hport in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h2``u32 endpoint`` endpoint in the device tree node h](jt)}(h``u32 endpoint``h]jz)}(hjh]h u32 endpoint}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(h endpoint in the device tree nodeh]h endpoint in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hGiven a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.h]hGiven a DT node’s port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubh)}(hMReturns a pointer to the bridge if successful, or an error pointer otherwise.h]hMReturns a pointer to the bridge if successful, or an error pointer otherwise.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrmm_of_get_bridge (C function)c.drmm_of_get_bridgehNtauh1jxhjwhhhNhNubj)}(hhh](j)}(hostruct drm_bridge * drmm_of_get_bridge (struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h]j)}(hmstruct drm_bridge *drmm_of_get_bridge(struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h](j)}(hjh]hstruct}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhjFhMubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]j)}jdrmm_of_get_bridgesbc.drmm_of_get_bridgeasbuh1hhj5hhhjFhMubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhjFhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj5hhhjFhMubj)}(hdrmm_of_get_bridgeh]j)}(hjvh]hdrmm_of_get_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj5hhhjFhMubj)}(hH(struct drm_device *drm, struct device_node *np, u32 port, u32 endpoint)h](j)}(hstruct drm_device *drmh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jtc.drmm_of_get_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdrmh]hdrm}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct device_node *nph](j)}(hjh]hstruct}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjCmodnameN classnameNjj)}j]jtc.drmm_of_get_bridgeasbuh1hhjubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjmhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hnph]hnp}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu32 porth](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jtc.drmm_of_get_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h u32 endpointh](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jtc.drmm_of_get_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hendpointh]hendpoint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj5hhhjFhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj1hhhjFhMubah}(h]j,ah ](jjeh"]h$]h&]jj)jhuh1jhjFhMhj.hhubj)}(hhh]h)}(hReturn next bridge in the chainh]hReturn next bridge in the chain}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhj1hhubah}(h]h ]h"]h$]h&]uh1jhj.hhhjFhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjLjjLjjjuh1jhhhjwhNhNubj)}(hX+**Parameters** ``struct drm_device *drm`` device to tie the bridge lifetime to ``struct device_node *np`` device tree node containing encoder output ports ``u32 port`` port in the device tree node ``u32 endpoint`` endpoint in the device tree node **Description** Given a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected. Returns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.h](h)}(h**Parameters**h]j%)}(hjVh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM hjPubji)}(hhh](jn)}(h@``struct drm_device *drm`` device to tie the bridge lifetime to h](jt)}(h``struct drm_device *drm``h]jz)}(hjuh]hstruct drm_device *drm}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjoubj)}(hhh]h)}(h$device to tie the bridge lifetime toh]h$device to tie the bridge lifetime to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjlubjn)}(hL``struct device_node *np`` device tree node containing encoder output ports h](jt)}(h``struct device_node *np``h]jz)}(hjh]hstruct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjubj)}(hhh]h)}(h0device tree node containing encoder output portsh]h0device tree node containing encoder output ports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjlubjn)}(h*``u32 port`` port in the device tree node h](jt)}(h ``u32 port``h]jz)}(hjh]hu32 port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM hjubj)}(hhh]h)}(hport in the device tree nodeh]hport in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjlubjn)}(h2``u32 endpoint`` endpoint in the device tree node h](jt)}(h``u32 endpoint``h]jz)}(hj h]h u32 endpoint}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM hjubj)}(hhh]h)}(h endpoint in the device tree nodeh]h endpoint in the device tree node}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hM hj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hM hjlubeh}(h]h ]h"]h$]h&]uh1jhhjPubh)}(h**Description**h]j%)}(hj[h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM hjPubh)}(hGiven a DT node's port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.h]hGiven a DT node’s port and endpoint number, finds the connected node and returns the associated bridge if any, or creates and returns a drm panel bridge instance if a panel is connected.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chM hjPubh)}(hZReturns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.h]hZReturns a drmm managed pointer to the bridge if successful, or an error pointer otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:216: ./drivers/gpu/drm/bridge/panel.chMhjPubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjwhhhNhNubjr:)}(h.. _drm_panel_helper:h]h}(h]h ]h"]h$]h&]j}:drm-panel-helperuh1jq:hKhjwhhhhubeh}(h]panel-bridge-helper-referenceah ]h"]panel-bridge helper referenceah$]h&]uh1hhj@hhhhhKubeh}(h](bridgesjw@eh ]h"](bridges drm_bridgeseh$]h&]uh1hhhhhhhhKj>B}jjm@sj@B}jw@jm@subh)}(hhh](h)}(hPanel Helper Referenceh]hPanel Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe DRM panel helpers allow drivers to register panel objects with a central registry and provide functions to retrieve those panels in display drivers.h]hThe DRM panel helpers allow drivers to register panel objects with a central registry and provide functions to retrieve those panels in display drivers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:224: ./drivers/gpu/drm/drm_panel.chK&hjhhubh)}(hFor easy integration into drivers using the :c:type:`drm_bridge` infrastructure please take look at drm_panel_bridge_add() and devm_drm_panel_bridge_add().h](h,For easy integration into drivers using the }(hjhhhNhNubh)}(h:c:type:`drm_bridge`h]jz)}(hjh]h drm_bridge}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_bridgeuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:224: ./drivers/gpu/drm/drm_panel.chK*hjubh[ infrastructure please take look at drm_panel_bridge_add() and devm_drm_panel_bridge_add().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK*hjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_panel_funcs (C struct)c.drm_panel_funcshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hdrm_panel_funcsh]j)}(hstruct drm_panel_funcsh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj,hKubj)}(hdrm_panel_funcsh]j)}(hjh]hdrm_panel_funcs}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj,hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj,hKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj,hKhjhhubj)}(hhh]h)}(h#perform operations on a given panelh]h#perform operations on a given panel}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK,hj^hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj,hKubeh}(h]h ](jstructeh"]h$]h&]jjjjyjjyjjjuh1jhhhjhNhNubj)}(hXl**Definition**:: struct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); }; **Members** ``prepare`` Turn on panel and perform set up. This function is optional. ``enable`` Enable panel (turn on back light, etc.). This function is optional. ``disable`` Disable panel (turn off back light, etc.). This function is optional. ``unprepare`` Turn off panel. This function is optional. ``get_modes`` Add modes to the connector that the panel is attached to and returns the number of modes added. This function is mandatory. ``get_orientation`` Return the panel orientation set by device tree or EDID. This function is optional. ``get_timings`` Copy display timings into the provided array and return the number of display timings available. This function is optional. ``debugfs_init`` Allows panels to create panels-specific debugfs files.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK0hj}ubj@)}(hXstruct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); };h]hXstruct drm_panel_funcs { int (*prepare)(struct drm_panel *panel); int (*enable)(struct drm_panel *panel); int (*disable)(struct drm_panel *panel); int (*unprepare)(struct drm_panel *panel); int (*get_modes)(struct drm_panel *panel, struct drm_connector *connector); enum drm_panel_orientation (*get_orientation)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); void (*debugfs_init)(struct drm_panel *panel, struct dentry *root); };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK2hj}ubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK=hj}ubji)}(hhh](jn)}(hJ``prepare`` Turn on panel and perform set up. This function is optional. h](jt)}(h ``prepare``h]jz)}(hjh]hprepare}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKNhjubj)}(hhh](h)}(h!Turn on panel and perform set up.h]h!Turn on panel and perform set up.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKLhjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKNhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKNhjubjn)}(hP``enable`` Enable panel (turn on back light, etc.). This function is optional. h](jt)}(h ``enable``h]jz)}(hjh]henable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKWhjubj)}(hhh](h)}(h(Enable panel (turn on back light, etc.).h]h(Enable panel (turn on back light, etc.).}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKUhj,ubh)}(hThis function is optional.h]hThis function is optional.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKWhj,ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj+hKWhjubjn)}(hS``disable`` Disable panel (turn off back light, etc.). This function is optional. h](jt)}(h ``disable``h]jz)}(hj^h]hdisable}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK`hjXubj)}(hhh](h)}(h*Disable panel (turn off back light, etc.).h]h*Disable panel (turn off back light, etc.).}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK^hjtubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshK`hjtubeh}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jmhjshK`hjubjn)}(h:``unprepare`` Turn off panel. This function is optional. h](jt)}(h ``unprepare``h]jz)}(hjh]h unprepare}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKihjubj)}(hhh](h)}(hTurn off panel.h]hTurn off panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKghjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKihjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKihjubjn)}(h``get_modes`` Add modes to the connector that the panel is attached to and returns the number of modes added. This function is mandatory. h](jt)}(h ``get_modes``h]jz)}(hjh]h get_modes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKshjubj)}(hhh](h)}(h_Add modes to the connector that the panel is attached to and returns the number of modes added.h]h_Add modes to the connector that the panel is attached to and returns the number of modes added.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKphjubh)}(hThis function is mandatory.h]hThis function is mandatory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKshjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKshjubjn)}(hi``get_orientation`` Return the panel orientation set by device tree or EDID. This function is optional. h](jt)}(h``get_orientation``h]jz)}(hj6h]hget_orientation}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK}hj0ubj)}(hhh](h)}(h8Return the panel orientation set by device tree or EDID.h]h8Return the panel orientation set by device tree or EDID.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK{hjLubh)}(hThis function is optional.h]hThis function is optional.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhK}hjLubeh}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhjKhK}hjubjn)}(h``get_timings`` Copy display timings into the provided array and return the number of display timings available. This function is optional. h](jt)}(h``get_timings``h]jz)}(hj~h]h get_timings}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjxubj)}(hhh](h)}(h`Copy display timings into the provided array and return the number of display timings available.h]h`Copy display timings into the provided array and return the number of display timings available.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubh)}(hThis function is optional.h]hThis function is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(hG``debugfs_init`` Allows panels to create panels-specific debugfs files.h](jt)}(h``debugfs_init``h]jz)}(hjh]h debugfs_init}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubj)}(hhh]h)}(h6Allows panels to create panels-specific debugfs files.h]h6Allows panels to create panels-specific debugfs files.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhhj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjhhubh)}(hX9The .prepare() function is typically called before the display controller starts to transmit video data. Panel drivers can use this to turn the panel on and wait for it to become ready. If additional configuration is required (via a control bus such as I2C, SPI or DSI for example) this is a good time to do that.h]hX9The .prepare() function is typically called before the display controller starts to transmit video data. Panel drivers can use this to turn the panel on and wait for it to become ready. If additional configuration is required (via a control bus such as I2C, SPI or DSI for example) this is a good time to do that.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK-hjhhubh)}(hXAfter the display controller has started transmitting video data, it's safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Some panels require a certain amount of time or frames before the image is displayed. This function is responsible for taking this into account before enabling the backlight to avoid visual glitches.h]hXAfter the display controller has started transmitting video data, it’s safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Some panels require a certain amount of time or frames before the image is displayed. This function is responsible for taking this into account before enabling the backlight to avoid visual glitches.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK3hjhhubh)}(hXBefore stopping video transmission from the display controller it can be necessary to turn off the panel to avoid visual glitches. This is done in the .disable() function. Analogously to .enable() this typically involves turning off the backlight and waiting for some time to make sure no image is visible on the panel. It is then safe for the display controller to cease transmission of video data.h]hXBefore stopping video transmission from the display controller it can be necessary to turn off the panel to avoid visual glitches. This is done in the .disable() function. Analogously to .enable() this typically involves turning off the backlight and waiting for some time to make sure no image is visible on the panel. It is then safe for the display controller to cease transmission of video data.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhK:hjhhubh)}(hTo save power when no video data is transmitted, a driver can power down the panel. This is the job of the .unprepare() function.h]hTo save power when no video data is transmitted, a driver can power down the panel. This is the job of the .unprepare() function.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKAhjhhubh)}(hBacklight can be handled automatically if configured using drm_panel_of_backlight() or drm_panel_dp_aux_backlight(). Then the driver does not need to implement the functionality to enable/disable backlight.h]hBacklight can be handled automatically if configured using drm_panel_of_backlight() or drm_panel_dp_aux_backlight(). Then the driver does not need to implement the functionality to enable/disable backlight.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKDhjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_panel (C struct) c.drm_panelhNtauh1jxhjhhhNhNubj)}(hhh](j)}(h drm_panelh]j)}(hstruct drm_panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKKubj)}(h drm_panelh]j)}(hj}h]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj{hhhjhKKubah}(h]jvah ](jjeh"]h$]h&]jj)jhuh1jhjhKKhjxhhubj)}(hhh]h)}(hDRM panel objecth]hDRM panel object}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjhhubah}(h]h ]h"]h$]h&]uh1jhjxhhhjhKKubeh}(h]h ](jstructeh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXq**Definition**:: struct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; }; **Members** ``dev`` Parent device of the panel. ``backlight`` Backlight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it. ``funcs`` Operations that can be performed on the panel. ``connector_type`` Type of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type. ``list`` Panel entry in registry. ``followers`` A list of struct drm_panel_follower dependent on this panel. ``follower_lock`` Lock for followers list. ``prepare_prev_first`` The previous controller should be prepared first, before the prepare for the panel is called. This is largely required for DSI panels where the DSI host controller should be initialised to LP-11 before the panel is powered up. ``prepared`` If true then the panel has been prepared. ``enabled`` If true then the panel has been enabled. ``container`` Pointer to the private driver struct embedding this **struct** drm_panel. ``refcount`` reference count of users referencing this panel.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubj@)}(hXbstruct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; };h]hXbstruct drm_panel { struct device *dev; struct backlight_device *backlight; const struct drm_panel_funcs *funcs; int connector_type; struct list_head list; struct list_head followers; struct mutex follower_lock; bool prepare_prev_first; bool prepared; bool enabled; void *container; struct kref refcount; };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?h\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubji)}(hhh](jn)}(h$``dev`` Parent device of the panel. h](jt)}(h``dev``h]jz)}(hj2h]hdev}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhj,ubj)}(hhh]h)}(hParent device of the panel.h]hParent device of the panel.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhKhjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhjGhKhj)ubjn)}(h``backlight`` Backlight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it. h](jt)}(h ``backlight``h]jz)}(hjkh]h backlight}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjeubj)}(hhh]h)}(hBacklight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it.h]hBacklight device, used to turn on backlight after the call to enable(), and to turn off backlight before the call to disable(). backlight is set by drm_panel_of_backlight() or drm_panel_dp_aux_backlight() and drivers shall not assign it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj)ubjn)}(h9``funcs`` Operations that can be performed on the panel. h](jt)}(h ``funcs``h]jz)}(hjh]hfuncs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubj)}(hhh]h)}(h.Operations that can be performed on the panel.h]h.Operations that can be performed on the panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj)ubjn)}(h``connector_type`` Type of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type. h](jt)}(h``connector_type``h]jz)}(hjh]hconnector_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubj)}(hhh]h)}(hType of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type.h]hType of the panel as a DRM_MODE_CONNECTOR_* value. This is used to initialise the drm_connector corresponding to the panel with the correct connector type.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj)ubjn)}(h"``list`` Panel entry in registry. h](jt)}(h``list``h]jz)}(hjh]hlist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjubj)}(hhh]h)}(hPanel entry in registry.h]hPanel entry in registry.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj.ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj-hKhj)ubjn)}(hK``followers`` A list of struct drm_panel_follower dependent on this panel. h](jt)}(h ``followers``h]jz)}(hjQh]h followers}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jsh\/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:227: ./include/drm/drm_panel.hhKhjKubj)}(hhh]h)}(hhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKkhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_unprepare (C function)c.drm_panel_unpreparehNtauh1jxhjhhhNhNubj)}(hhh](j)}(h2void drm_panel_unprepare (struct drm_panel *panel)h]j)}(h1void drm_panel_unprepare(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhhj{hKubj)}(hdrm_panel_unprepareh]j)}(hdrm_panel_unprepareh]hdrm_panel_unprepare}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjihhhj{hKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_panel_unprepareasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjihhhj{hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjehhhj{hKubah}(h]j`ah ](jjeh"]h$]h&]jj)jhuh1jhj{hKhjbhhubj)}(hhh]h)}(hpower off a panelh]hpower off a panel}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhj*hhubah}(h]h ]h"]h$]h&]uh1jhjbhhhj{hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjEjjEjjjuh1jhhhjhNhNubj)}(hXH**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will completely power off a panel (assert the panel's reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().h](h)}(h**Parameters**h]j%)}(hjOh]h Parameters}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjIubji)}(hhh]jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hjnh]hstruct drm_panel *panel}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjhubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjeubah}(h]h ]h"]h$]h&]uh1jhhjIubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjIubh)}(hCalling this function will completely power off a panel (assert the panel's reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().h]hXCalling this function will completely power off a panel (assert the panel’s reset, turn off power supplies, ...). After this function has completed, it is usually no longer possible to communicate with the panel until another call to drm_panel_prepare().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjIubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_panel_enable (C function)c.drm_panel_enablehNtauh1jxhjhhhNhNubj)}(hhh](j)}(h/void drm_panel_enable (struct drm_panel *panel)h]j)}(h.void drm_panel_enable(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_panel_enableh]j)}(hdrm_panel_enableh]hdrm_panel_enable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjKmodnameN classnameNjj)}j]j)}jjsbc.drm_panel_enableasbuh1hhj'ubj)}(h h]h }(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj+)}(hj9h]h*}(hjwhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj'ubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj#ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(henable a panelh]henable a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXy**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjubji)}(hhh]jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj*h]h Description}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjubh)}(hX/Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.h]hX/Calling this function will cause the panel display drivers to be turned on and the backlight to be enabled. Content will be visible on screen after this call completes. This function cannot fail (as it is called from the enable call chain). There will always be a call to drm_panel_disable() afterwards.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_panel_disable (C function)c.drm_panel_disablehNtauh1jxhjhhhNhNubj)}(hhh](j)}(h0void drm_panel_disable (struct drm_panel *panel)h]j)}(h/void drm_panel_disable(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkhhhj}hMubj)}(hdrm_panel_disableh]j)}(hdrm_panel_disableh]hdrm_panel_disable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjkhhhj}hMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_panel_disableasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjkhhhj}hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjghhhj}hMubah}(h]jbah ](jjeh"]h$]h&]jj)jhuh1jhj}hMhjdhhubj)}(hhh]h)}(hdisable a panelh]hdisable a panel}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj,hhubah}(h]h ]h"]h$]h&]uh1jhjdhhhj}hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjGjjGjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This will typically turn off the panel's backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.h](h)}(h**Parameters**h]j%)}(hjQh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjOubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjKubji)}(hhh]jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hjph]hstruct drm_panel *panel}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjjubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjgubah}(h]h ]h"]h$]h&]uh1jhhjKubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjKubh)}(hThis will typically turn off the panel's backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.h]hThis will typically turn off the panel’s backlight or disable the display drivers. For smart panels it should still be possible to communicate with the integrated circuitry via any command bus after this call.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjKubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_panel_get_modes (C function)c.drm_panel_get_modeshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hRint drm_panel_get_modes (struct drm_panel *panel, struct drm_connector *connector)h]j)}(hQint drm_panel_get_modes(struct drm_panel *panel, struct drm_connector *connector)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM>ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM>ubj)}(hdrm_panel_get_modesh]j)}(hdrm_panel_get_modesh]hdrm_panel_get_modes}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM>ubj)}(h:(struct drm_panel *panel, struct drm_connector *connector)h](j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjMmodnameN classnameNjj)}j]j)}jjsbc.drm_panel_get_modesasbuh1hhj)ubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj+)}(hj9h]h*}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)ubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj%ubj)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jgc.drm_panel_get_modesasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj%ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM>ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM>ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM>hjhhubj)}(hhh]h)}(h,probe the available display modes of a panelh]h,probe the available display modes of a panel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM>hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM>ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj8jj8jjjuh1jhhhjhNhNubj)}(hXH**Parameters** ``struct drm_panel *panel`` DRM panel ``struct drm_connector *connector`` DRM connector **Description** The modes probed from the panel are automatically added to the connector that the panel is attached to. **Return** The number of modes available from the panel on success, or 0 on failure (no modes).h](h)}(h**Parameters**h]j%)}(hjBh]h Parameters}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj@ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMBhj<ubji)}(hhh](jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hjah]hstruct drm_panel *panel}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM?hj[ubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhM?hjwubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhjvhM?hjXubjn)}(h2``struct drm_connector *connector`` DRM connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM@hjubj)}(hhh]h)}(h DRM connectorh]h DRM connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM@hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM@hjXubeh}(h]h ]h"]h$]h&]uh1jhhj<ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMBhj<ubh)}(hgThe modes probed from the panel are automatically added to the connector that the panel is attached to.h]hgThe modes probed from the panel are automatically added to the connector that the panel is attached to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMAhj<ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMDhj<ubh)}(hTThe number of modes available from the panel on success, or 0 on failure (no modes).h]hTThe number of modes available from the panel on success, or 0 on failure (no modes).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMEhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_panel_get (C function)c.drm_panel_gethNtauh1jxhjhhhNhNubj)}(hhh](j)}(h:struct drm_panel * drm_panel_get (struct drm_panel *panel)h]j)}(h8struct drm_panel *drm_panel_get(struct drm_panel *panel)h](j)}(hjh]hstruct}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMbubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhjNhMbubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjbmodnameN classnameNjj)}j]j)}j drm_panel_getsbc.drm_panel_getasbuh1hhj=hhhjNhMbubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhjNhMbubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=hhhjNhMbubj)}(h drm_panel_geth]j)}(hj~h]h drm_panel_get}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj=hhhjNhMbubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j|c.drm_panel_getasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj=hhhjNhMbubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj9hhhjNhMbubah}(h]j4ah ](jjeh"]h$]h&]jj)jhuh1jhjNhMbhj6hhubj)}(hhh]h)}(hAcquire a panel referenceh]hAcquire a panel reference}(hj< hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMbhj9 hhubah}(h]h ]h"]h$]h&]uh1jhj6hhhjNhMbubeh}(h]h ](jfunctioneh"]h$]h&]jjjjT jjT jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This function increments the panel's refcount. **Return** Pointer to **panel**h](h)}(h**Parameters**h]j%)}(hj^ h]h Parameters}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj\ ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMfhjX ubji)}(hhh]jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hj} h]hstruct drm_panel *panel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMchjw ubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMchj ubah}(h]h ]h"]h$]h&]uh1jhjw ubeh}(h]h ]h"]h$]h&]uh1jmhj hMchjt ubah}(h]h ]h"]h$]h&]uh1jhhjX ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMehjX ubh)}(h.This function increments the panel's refcount.h]h0This function increments the panel’s refcount.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMdhjX ubh)}(h **Return**h]j%)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMfhjX ubh)}(hPointer to **panel**h](h Pointer to }(hj hhhNhNubj%)}(h **panel**h]hpanel}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMfhjX ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_panel_put (C function)c.drm_panel_puthNtauh1jxhjhhhNhNubj)}(hhh](j)}(h,void drm_panel_put (struct drm_panel *panel)h]j)}(h+void drm_panel_put(struct drm_panel *panel)h](j)}(hvoidh]hvoid}(hj2 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj. hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMuubj)}(h h]h }(hjA hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj. hhhj@ hMuubj)}(h drm_panel_puth]j)}(h drm_panel_puth]h drm_panel_put}(hjS hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj. hhhj@ hMuubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjo hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk ubj)}(h h]h }(hj| hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk ubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jjU sbc.drm_panel_putasbuh1hhjk ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjk ubj)}(hpanelh]hpanel}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjg ubah}(h]h ]h"]h$]h&]jjuh1jhj. hhhj@ hMuubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj* hhhj@ hMuubah}(h]j% ah ](jjeh"]h$]h&]jj)jhuh1jhj@ hMuhj' hhubj)}(hhh]h)}(hRelease a panel referenceh]hRelease a panel reference}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMuhj hhubah}(h]h ]h"]h$]h&]uh1jhj' hhhj@ hMuubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_panel *panel`` DRM panel **Description** This function decrements the panel's reference count and frees the object if the reference count drops to zero.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMyhj ubji)}(hhh]jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hj3 h]hstruct drm_panel *panel}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1 ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMvhj- ubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hjL hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjH hMvhjI ubah}(h]h ]h"]h$]h&]uh1jhj- ubeh}(h]h ]h"]h$]h&]uh1jmhjH hMvhj* ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjn h]h Description}(hjp hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjl ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMxhj ubh)}(hoThis function decrements the panel's reference count and frees the object if the reference count drops to zero.h]hqThis function decrements the panel’s reference count and frees the object if the reference count drops to zero.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMwhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jof_drm_find_panel (C function)c.of_drm_find_panelhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hCstruct drm_panel * of_drm_find_panel (const struct device_node *np)h]j)}(hAstruct drm_panel *of_drm_find_panel(const struct device_node *np)h](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jof_drm_find_panelsbc.of_drm_find_panelasbuh1hhj hhhj hMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj hhhj hMubj)}(hof_drm_find_panelh]j)}(hj h]hof_drm_find_panel}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hMubj)}(h(const struct device_node *np)h]j)}(hconst struct device_node *nph](j)}(hjUh]hconst}(hj- hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubj)}(h h]h }(hj: hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubj)}(hjh]hstruct}(hjH hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubj)}(h h]h }(hjU hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubh)}(hhh]j)}(h device_nodeh]h device_node}(hjf hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjc ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjh modnameN classnameNjj)}j]j c.of_drm_find_panelasbuh1hhj) ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj) ubj)}(hnph]hnp}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj) ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj% ubah}(h]h ]h"]h$]h&]jjuh1jhj hhh j hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhj hhubj)}(hhh]h)}(h(look up a panel using a device tree nodeh]h(look up a panel using a device tree node}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjhNhNubj)}(hX[**Parameters** ``const struct device_node *np`` device tree node of the panel **Description** Searches the set of registered panels for one that matches the given device tree node. If a matching panel is found, return a pointer to it. Possible error codes returned by this function: - EPROBE_DEFER: the panel device has not been probed yet, and the caller should retry later - ENODEV: the device is not available (status != "okay" or "ok") **Return** A pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubji)}(hhh]jn)}(h?``const struct device_node *np`` device tree node of the panel h](jt)}(h ``const struct device_node *np``h]jz)}(hj h]hconst struct device_node *np}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubj)}(hhh]h)}(hdevice tree node of the panelh]hdevice tree node of the panel}(hj# hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjE h]h Description}(hjG hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjC ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(hSearches the set of registered panels for one that matches the given device tree node. If a matching panel is found, return a pointer to it.h]hSearches the set of registered panels for one that matches the given device tree node. If a matching panel is found, return a pointer to it.}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(h/Possible error codes returned by this function:h]h/Possible error codes returned by this function:}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(hhh](h)}(hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry laterh]h)}(hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry laterh]hYEPROBE_DEFER: the panel device has not been probed yet, and the caller should retry later}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj| ubah}(h]h ]h"]h$]h&]uh1hhjy ubh)}(h?ENODEV: the device is not available (status != "okay" or "ok") h]h)}(h>ENODEV: the device is not available (status != "okay" or "ok")h]hFENODEV: the device is not available (status != “okay” or “ok”)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubah}(h]h ]h"]h$]h&]uh1hhjy ubeh}(h]h ]h"]h$]h&]j8j4uh1hhj hMhj ubh)}(h **Return**h]j%)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubh)}(hA pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.h]hA pointer to the panel registered for the specified device tree node or an ERR_PTR() if no panel matching the device tree node can be found.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)of_drm_get_panel_orientation (C function)c.of_drm_get_panel_orientationhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hhint of_drm_get_panel_orientation (const struct device_node *np, enum drm_panel_orientation *orientation)h]j)}(hgint of_drm_get_panel_orientation(const struct device_node *np, enum drm_panel_orientation *orientation)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hof_drm_get_panel_orientationh]j)}(hof_drm_get_panel_orientationh]hof_drm_get_panel_orientation}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hMubj)}(hG(const struct device_node *np, enum drm_panel_orientation *orientation)h](j)}(hconst struct device_node *nph](j)}(hjUh]hconst}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj)}(hjh]hstruct}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubh)}(hhh]j)}(h device_nodeh]h device_node}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjsmodnameN classnameNjj)}j]j)}jjsbc.of_drm_get_panel_orientationasbuh1hhj4ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj4ubj)}(hnph]hnp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj0ubj)}(h'enum drm_panel_orientation *orientationh](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_panel_orientationh]hdrm_panel_orientation}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.of_drm_get_panel_orientationasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h orientationh]h orientation}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj0ubeh}(h]h ]h"]h$]h&]jjuh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhj hhubj)}(hhh]h)}(h[look up the orientation of the panel through the "rotation" binding from a device tree nodeh]h_look up the orientation of the panel through the “rotation” binding from a device tree node}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjChhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj^jj^jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``const struct device_node *np`` device tree node of the panel ``enum drm_panel_orientation *orientation`` orientation enum to be filled in **Description** Looks up the rotation of a panel in the device tree. The orientation of the panel is expressed as a property name "rotation" in the device tree. The rotation in the device tree is counter clockwise. **Return** 0 when a valid rotation value (0, 90, 180, or 270) is read or the rotation property doesn't exist. Return a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjhh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjbubji)}(hhh](jn)}(h?``const struct device_node *np`` device tree node of the panel h](jt)}(h ``const struct device_node *np``h]jz)}(hjh]hconst struct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubj)}(hhh]h)}(hdevice tree node of the panelh]hdevice tree node of the panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj~ubjn)}(hM``enum drm_panel_orientation *orientation`` orientation enum to be filled in h](jt)}(h+``enum drm_panel_orientation *orientation``h]jz)}(hjh]h'enum drm_panel_orientation *orientation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubj)}(hhh]h)}(h orientation enum to be filled inh]h orientation enum to be filled in}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj~ubeh}(h]h ]h"]h$]h&]uh1jhhjbubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjbubh)}(hLooks up the rotation of a panel in the device tree. The orientation of the panel is expressed as a property name "rotation" in the device tree. The rotation in the device tree is counter clockwise.h]hLooks up the rotation of a panel in the device tree. The orientation of the panel is expressed as a property name “rotation” in the device tree. The rotation in the device tree is counter clockwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjbubh)}(h **Return**h]j%)}(hj"h]hReturn}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjbubh)}(h0 when a valid rotation value (0, 90, 180, or 270) is read or the rotation property doesn't exist. Return a negative error code on failure.h]h0 when a valid rotation value (0, 90, 180, or 270) is read or the rotation property doesn’t exist. Return a negative error code on failure.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_is_panel_follower (C function)c.drm_is_panel_followerhNtauh1jxhjhhhNhNubj)}(hhh](j)}(h/bool drm_is_panel_follower (struct device *dev)h]j)}(h.bool drm_is_panel_follower(struct device *dev)h](j)}(hjAh]hbool}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM*ubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhhjthM*ubj)}(hdrm_is_panel_followerh]j)}(hdrm_is_panel_followerh]hdrm_is_panel_follower}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjchhhjthM*ubj)}(h(struct device *dev)h]j)}(hstruct device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_is_panel_followerasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjchhhjthM*ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj_hhhjthM*ubah}(h]jZah ](jjeh"]h$]h&]jj)jhuh1jhjthM*hj\hhubj)}(hhh]h)}(h'Check if the device is a panel followerh]h'Check if the device is a panel follower}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM*hj#hhubah}(h]h ]h"]h$]h&]uh1jhj\hhhjthM*ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj>jj>jjjuh1jhhhjhNhNubj)}(hXa**Parameters** ``struct device *dev`` The 'struct device' to check **Description** This checks to see if a device needs to be power sequenced together with a panel using the panel follower API. The "panel" property of the follower points to the panel to be followed. **Return** true if we should be power sequenced with a panel; false otherwise.h](h)}(h**Parameters**h]j%)}(hjHh]h Parameters}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM.hjBubji)}(hhh]jn)}(h4``struct device *dev`` The 'struct device' to check h](jt)}(h``struct device *dev``h]jz)}(hjgh]hstruct device *dev}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjeubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM+hjaubj)}(hhh]h)}(hThe 'struct device' to checkh]h The ‘struct device’ to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hM+hj}ubah}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jmhj|hM+hj^ubah}(h]h ]h"]h$]h&]uh1jhhjBubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM-hjBubh)}(hnThis checks to see if a device needs to be power sequenced together with a panel using the panel follower API.h]hnThis checks to see if a device needs to be power sequenced together with a panel using the panel follower API.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM,hjBubh)}(hHThe "panel" property of the follower points to the panel to be followed.h]hLThe “panel” property of the follower points to the panel to be followed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM/hjBubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM1hjBubh)}(hCtrue if we should be power sequenced with a panel; false otherwise.h]hCtrue if we should be power sequenced with a panel; false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM2hjBubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_panel_add_follower (C function)c.drm_panel_add_followerhNtauh1jxhjhhhNhNubj)}(hhh](j)}(h]int drm_panel_add_follower (struct device *follower_dev, struct drm_panel_follower *follower)h]j)}(h\int drm_panel_add_follower(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM@ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj+hM@ubj)}(hdrm_panel_add_followerh]j)}(hdrm_panel_add_followerh]hdrm_panel_add_follower}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj+hM@ubj)}(hB(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hstruct device *follower_devh](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubh)}(hhh]j)}(hdeviceh]hdevice}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjzmodnameN classnameNjj)}j]j)}jj@sbc.drm_panel_add_followerasbuh1hhjVubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjVubj)}(h follower_devh]h follower_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRubj)}(h#struct drm_panel_follower *followerh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_panel_followerh]hdrm_panel_follower}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_panel_add_followerasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfollowerh]hfollower}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj+hM@ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj+hM@ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj+hM@hjhhubj)}(hhh]h)}(h)Register something to follow panel state.h]h)Register something to follow panel state.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM@hjJhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj+hM@ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjejjejjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct device *follower_dev`` The 'struct device' for the follower. ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** A panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It's primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel. If a follower is added to a panel that's already been prepared/enabled, the follower's prepared/enabled callback is called right away. The "panel" property of the follower points to the panel to be followed. **Return** 0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.h](h)}(h**Parameters**h]j%)}(hjoh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMDhjiubji)}(hhh](jn)}(hF``struct device *follower_dev`` The 'struct device' for the follower. h](jt)}(h``struct device *follower_dev``h]jz)}(hjh]hstruct device *follower_dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMAhjubj)}(hhh]h)}(h%The 'struct device' for the follower.h]h)The ‘struct device’ for the follower.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMAhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMAhjubjn)}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](jt)}(h'``struct drm_panel_follower *follower``h]jz)}(hjh]h#struct drm_panel_follower *follower}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMBhjubj)}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMBhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMBhjubeh}(h]h ]h"]h$]h&]uh1jhhjiubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMDhjiubh)}(hXA panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It's primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel.h]hX!A panel follower is called right after preparing/enabling the panel and right before unpreparing/disabling the panel. It’s primary intention is to power on an associated touchscreen, though it could be used for any similar devices. Multiple devices are allowed the follow the same panel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMChjiubh)}(hIf a follower is added to a panel that's already been prepared/enabled, the follower's prepared/enabled callback is called right away.h]hIf a follower is added to a panel that’s already been prepared/enabled, the follower’s prepared/enabled callback is called right away.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMHhjiubh)}(hHThe "panel" property of the follower points to the panel to be followed.h]hLThe “panel” property of the follower points to the panel to be followed.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMKhjiubh)}(h **Return**h]j%)}(hjGh]hReturn}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMMhjiubh)}(h0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.h]h0 or an error code. Note that -ENODEV means that we detected that follower_dev is not actually following a panel. The caller may choose to ignore this return value if following a panel is optional.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMNhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_panel_remove_follower (C function)c.drm_panel_remove_followerhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hDvoid drm_panel_remove_follower (struct drm_panel_follower *follower)h]j)}(hCvoid drm_panel_remove_follower(struct drm_panel_follower *follower)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMvubj)}(hdrm_panel_remove_followerh]j)}(hdrm_panel_remove_followerh]hdrm_panel_remove_follower}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMvubj)}(h%(struct drm_panel_follower *follower)h]j)}(h#struct drm_panel_follower *followerh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_panel_followerh]hdrm_panel_follower}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_panel_remove_followerasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfollowerh]hfollower}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMvubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMvubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMvhjhhubj)}(hhh]h)}(h!Reverse drm_panel_add_follower().h]h!Reverse drm_panel_add_follower().}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMvhjIhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMvubeh}(h]h ](jfunctioneh"]h$]h&]jjjjdjjdjjjuh1jhhhjhNhNubj)}(hX@**Parameters** ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** Undo drm_panel_add_follower(). This includes calling the follower's unpreparing/disabling function if we're removed from a panel that's currently prepared/enabled. **Return** 0 or an error code.h](h)}(h**Parameters**h]j%)}(hjnh]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMzhjhubji)}(hhh]jn)}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](jt)}(h'``struct drm_panel_follower *follower``h]jz)}(hjh]h#struct drm_panel_follower *follower}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMwhjubj)}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMwhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMwhjubah}(h]h ]h"]h$]h&]uh1jhhjhubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMyhjhubh)}(hUndo drm_panel_add_follower(). This includes calling the follower's unpreparing/disabling function if we're removed from a panel that's currently prepared/enabled.h]hUndo drm_panel_add_follower(). This includes calling the follower’s unpreparing/disabling function if we’re removed from a panel that’s currently prepared/enabled.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMxhjhubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM|hjhubh)}(h0 or an error code.h]h0 or an error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chM}hjhubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(devm_drm_panel_add_follower (C function)c.devm_drm_panel_add_followerhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hbint devm_drm_panel_add_follower (struct device *follower_dev, struct drm_panel_follower *follower)h]j)}(haint devm_drm_panel_add_follower(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hinth]hint}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMubj)}(h h]h }(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhjBhMubj)}(hdevm_drm_panel_add_followerh]j)}(hdevm_drm_panel_add_followerh]hdevm_drm_panel_add_follower}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubah}(h]h ](jjeh"]h$]h&]jjuh1jhj0hhhjBhMubj)}(hB(struct device *follower_dev, struct drm_panel_follower *follower)h](j)}(hstruct device *follower_devh](j)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjWsbc.devm_drm_panel_add_followerasbuh1hhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(h follower_devh]h follower_dev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjiubj)}(h#struct drm_panel_follower *followerh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_panel_followerh]hdrm_panel_follower}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.devm_drm_panel_add_followerasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hfollowerh]hfollower}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjiubeh}(h]h ]h"]h$]h&]jjuh1jhj0hhhjBhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj,hhhjBhMubah}(h]j'ah ](jjeh"]h$]h&]jj)jhuh1jhjBhMhj)hhubj)}(hhh]h)}(h(devm version of drm_panel_add_follower()h]h(devm version of drm_panel_add_follower()}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjahhubah}(h]h ]h"]h$]h&]uh1jhj)hhhjBhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj|jj|jjjuh1jhhhjhNhNubj)}(hX1**Parameters** ``struct device *follower_dev`` The 'struct device' for the follower. ``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. **Description** Handles calling drm_panel_remove_follower() using devm on the follower_dev. **Return** 0 or an error code.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubji)}(hhh](jn)}(hF``struct device *follower_dev`` The 'struct device' for the follower. h](jt)}(h``struct device *follower_dev``h]jz)}(hjh]hstruct device *follower_dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubj)}(hhh]h)}(h%The 'struct device' for the follower.h]h)The ‘struct device’ for the follower.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hX``struct drm_panel_follower *follower`` The panel follower descriptor for the follower. h](jt)}(h'``struct drm_panel_follower *follower``h]jz)}(hjh]h#struct drm_panel_follower *follower}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubj)}(hhh]h)}(h/The panel follower descriptor for the follower.h]h/The panel follower descriptor for the follower.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubh)}(hKHandles calling drm_panel_remove_follower() using devm on the follower_dev.h]hKHandles calling drm_panel_remove_follower() using devm on the follower_dev.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubh)}(h **Return**h]j%)}(hj@h]hReturn}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubh)}(h0 or an error code.h]h0 or an error code.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_panel_of_backlight (C function)c.drm_panel_of_backlighthNtauh1jxhjhhhNhNubj)}(hhh](j)}(h4int drm_panel_of_backlight (struct drm_panel *panel)h]j)}(h3int drm_panel_of_backlight(struct drm_panel *panel)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_panel_of_backlighth]j)}(hdrm_panel_of_backlighth]hdrm_panel_of_backlight}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_panel *panel)h]j)}(hstruct drm_panel *panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_panel_of_backlightasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj}hhhjhMubah}(h]jxah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjzhhubj)}(hhh]h)}(h'use backlight device node for backlighth]h'use backlight device node for backlight}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjBhhubah}(h]h ]h"]h$]h&]uh1jhjzhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj]jj]jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_panel *panel`` DRM panel **Description** Use this function to enable backlight handling if your panel uses device tree and has a backlight phandle. When the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) ` When the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `. A typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. drm_panel_of_backlight() must be called after the call to drm_panel_init(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjgh]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjaubji)}(hhh]jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hjh]hstruct drm_panel *panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj}ubah}(h]h ]h"]h$]h&]uh1jhhjaubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjaubh)}(hjUse this function to enable backlight handling if your panel uses device tree and has a backlight phandle.h]hjUse this function to enable backlight handling if your panel uses device tree and has a backlight phandle.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjaubh)}(hWhen the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) `h](hOWhen the panel is enabled backlight will be enabled after a successful call to }(hjhhhNhNubh)}(h6:c:type:`drm_panel_funcs.enable\(\) `h]jz)}(hjh]hdrm_panel_funcs.enable()}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_panel_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubeh}(h]h ]h"]h$]h&]uh1hhj hMhjaubh)}(hWhen the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `.h](hIWhen the panel is disabled backlight will be disabled before the call to }(hjhhhNhNubh)}(h7:c:type:`drm_panel_funcs.disable\(\) `h]jz)}(hjh]hdrm_panel_funcs.disable()}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_panel_funcsuh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hMhjaubh)}(hXA typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. drm_panel_of_backlight() must be called after the call to drm_panel_init().h]hXA typical implementation for a panel driver supporting device tree will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. drm_panel_of_backlight() must be called after the call to drm_panel_init().}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjaubh)}(h **Return**h]j%)}(hjWh]hReturn}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjaubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:230: ./drivers/gpu/drm/drm_panel.chMhjaubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_get_panel_orientation_quirk (C function)!c.drm_get_panel_orientation_quirkhNtauh1jxhjhhhNhNubj)}(hhh](j)}(h;int drm_get_panel_orientation_quirk (int width, int height)h]j)}(h:int drm_get_panel_orientation_quirk(int width, int height)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_get_panel_orientation_quirkh]j)}(hdrm_get_panel_orientation_quirkh]hdrm_get_panel_orientation_quirk}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(int width, int height)h](j)}(h int widthh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hwidthh]hwidth}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h int heighth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hheighth]hheight}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h"Check for panel orientation quirksh]h"Check for panel orientation quirks}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjQhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjljjljjjuh1jhhhjhNhNubj)}(hX **Parameters** ``int width`` width in pixels of the panel ``int height`` height in pixels of the panel **Description** This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry. Note this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module. **Return** A DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.h](h)}(h**Parameters**h]j%)}(hjvh]h Parameters}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjtubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM hjpubji)}(hhh](jn)}(h+``int width`` width in pixels of the panel h](jt)}(h ``int width``h]jz)}(hjh]h int width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjubj)}(hhh]h)}(hwidth in pixels of the panelh]hwidth in pixels of the panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h-``int height`` height in pixels of the panel h](jt)}(h``int height``h]jz)}(hjh]h int height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjubj)}(hhh]h)}(hheight in pixels of the panelh]hheight in pixels of the panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjpubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM hjpubh)}(hX?This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry.h]hX?This function checks for platform specific (e.g. DMI based) quirks providing info on panel_orientation for systems where this cannot be probed from the hard-/firm-ware. To avoid false-positive this function takes the panel resolution as argument and checks that against the resolution expected by the quirk-table entry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chMhjpubh)}(hNote this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module.h]hNote this function is also used outside of the drm-subsys, by for example the efifb code. Because of this this function gets compiled into its own kernel-module when built as a module.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM%hjpubh)}(h **Return**h]j%)}(hj?h]hReturn}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM)hjpubh)}(hA DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.h]hA DRM_MODE_PANEL_ORIENTATION_* value if there is a quirk for this system, or DRM_MODE_PANEL_ORIENTATION_UNKNOWN if there is no quirk.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhs/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:233: ./drivers/gpu/drm/drm_panel_orientation_quirks.chM*hjpubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_get_panel_backlight_quirk (C function)c.drm_get_panel_backlight_quirkhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hdconst struct drm_panel_backlight_quirk * drm_get_panel_backlight_quirk (const struct drm_edid *edid)h]j)}(hbconst struct drm_panel_backlight_quirk *drm_get_panel_backlight_quirk(const struct drm_edid *edid)h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKyubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKyubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKyubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKyubh)}(hhh]j)}(hdrm_panel_backlight_quirkh]hdrm_panel_backlight_quirk}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_get_panel_backlight_quirksbc.drm_get_panel_backlight_quirkasbuh1hhjhhhjhKyubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKyubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhKyubj)}(hdrm_get_panel_backlight_quirkh]j)}(hjh]hdrm_get_panel_backlight_quirk}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKyubj)}(h(const struct drm_edid *edid)h]j)}(hconst struct drm_edid *edidh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjTmodnameN classnameNjj)}j]jc.drm_get_panel_backlight_quirkasbuh1hhjubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj~hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hedidh]hedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKyubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj|hhhjhKyubah}(h]jwah ](jjeh"]h$]h&]jj)jhuh1jhjhKyhjyhhubj)}(hhh]h)}(h Get backlight quirks for a panelh]h Get backlight quirks for a panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKyhjhhubah}(h]h ]h"]h$]h&]uh1jhjyhhhjhKyubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``const struct drm_edid *edid`` EDID of the panel to check **Description** This function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources. **Return** a drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chK}hjubji)}(hhh]jn)}(h;``const struct drm_edid *edid`` EDID of the panel to check h](jt)}(h``const struct drm_edid *edid``h]jz)}(hjh]hconst struct drm_edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKzhjubj)}(hhh]h)}(hEDID of the panel to checkh]hEDID of the panel to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKzhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hKzhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj1h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chK|hjubh)}(hThis function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources.h]hThis function checks for platform specific (e.g. DMI based) quirks providing info on the minimum backlight brightness for systems where this cannot be probed correctly from the hard-/firm-ware and other sources.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chK{hjubh)}(h **Return**h]j%)}(hjXh]hReturn}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubh)}(hTa drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.h]hTa drm_panel_backlight_quirk struct if a quirk was found, otherwise an error pointer.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhq/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:236: ./drivers/gpu/drm/drm_panel_backlight_quirks.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h](panel-helper-referencejeh ]h"](panel helper referencedrm_panel_helpereh$]h&]uh1hhhhhhhhKj>B}jjsj@B}jjsubh)}(hhh](h)}(h#Panel Self Refresh Helper Referenceh]h#Panel Self Refresh Helper Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXThis helper library provides an easy way for drivers to leverage the atomic framework to implement panel self refresh (SR) support. Drivers are responsible for initializing and cleaning up the SR helpers on load/unload (see :c:type:`drm_self_refresh_helper_init`/:c:type:`drm_self_refresh_helper_cleanup`). The connector is responsible for setting :c:type:`drm_connector_state.self_refresh_aware ` to true at runtime if it is SR-aware (meaning it knows how to initiate self refresh on the panel).h](hThis helper library provides an easy way for drivers to leverage the atomic framework to implement panel self refresh (SR) support. Drivers are responsible for initializing and cleaning up the SR helpers on load/unload (see }(hjhhhNhNubh)}(h&:c:type:`drm_self_refresh_helper_init`h]jz)}(hjh]hdrm_self_refresh_helper_init}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_self_refresh_helper_inituh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:242: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjubh/}(hjhhhNhNubh)}(h):c:type:`drm_self_refresh_helper_cleanup`h]jz)}(hjh]hdrm_self_refresh_helper_cleanup}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_self_refresh_helper_cleanupuh1hhjhKhjubh,). The connector is responsible for setting }(hjhhhNhNubh)}(hF:c:type:`drm_connector_state.self_refresh_aware `h]jz)}(hjh]h&drm_connector_state.self_refresh_aware}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_stateuh1hhjhKhjubhc to true at runtime if it is SR-aware (meaning it knows how to initiate self refresh on the panel).}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjhhubh)}(hXOnce a crtc has enabled SR using :c:type:`drm_self_refresh_helper_init`, the helpers will monitor activity and call back into the driver to enable/disable SR as appropriate. The best way to think about this is that it's a DPMS on/off request with :c:type:`drm_crtc_state.self_refresh_active ` set in crtc state that tells you to disable/enable SR on the panel instead of power-cycling it.h](h!Once a crtc has enabled SR using }(hjhhhNhNubh)}(h&:c:type:`drm_self_refresh_helper_init`h]jz)}(hj"h]hdrm_self_refresh_helper_init}(hj$hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_self_refresh_helper_inituh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:242: ./drivers/gpu/drm/drm_self_refresh_helper.chK!hjubh, the helpers will monitor activity and call back into the driver to enable/disable SR as appropriate. The best way to think about this is that it’s a DPMS on/off request with }(hjhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]jz)}(hjFh]h"drm_crtc_state.self_refresh_active}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhj?hK!hjubh` set in crtc state that tells you to disable/enable SR on the panel instead of power-cycling it.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj?hK!hjhhubh)}(hX9During SR, drivers may choose to fully disable their crtc/encoder/bridge hardware (in which case no driver changes are necessary), or they can inspect :c:type:`drm_crtc_state.self_refresh_active ` if they want to enter low power mode without full disable (in case full disable/enable is too slow).h](hDuring SR, drivers may choose to fully disable their crtc/encoder/bridge hardware (in which case no driver changes are necessary), or they can inspect }(hjmhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]jz)}(hjwh]h"drm_crtc_state.self_refresh_active}(hjyhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:242: ./drivers/gpu/drm/drm_self_refresh_helper.chK'hjmubhe if they want to enter low power mode without full disable (in case full disable/enable is too slow).}(hjmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK'hjhhubh)}(hSR will be deactivated if there are any atomic updates affecting the pipe that is in SR mode. If a crtc is driving multiple connectors, all connectors must be SR aware and all will enter/exit SR mode at the same time.h]hSR will be deactivated if there are any atomic updates affecting the pipe that is in SR mode. If a crtc is driving multiple connectors, all connectors must be SR aware and all will enter/exit SR mode at the same time.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:242: ./drivers/gpu/drm/drm_self_refresh_helper.chK,hjhhubh)}(hIf the crtc and connector are SR aware, but the panel connected does not support it (or is otherwise unable to enter SR), the driver should fail atomic_check when :c:type:`drm_crtc_state.self_refresh_active ` is true.h](hIf the crtc and connector are SR aware, but the panel connected does not support it (or is otherwise unable to enter SR), the driver should fail atomic_check when }(hjhhhNhNubh)}(h=:c:type:`drm_crtc_state.self_refresh_active `h]jz)}(hjh]h"drm_crtc_state.self_refresh_active}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:242: ./drivers/gpu/drm/drm_self_refresh_helper.chK0hjubh is true.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK0hjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5drm_self_refresh_helper_update_avg_times (C function)*c.drm_self_refresh_helper_update_avg_timeshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hvoid drm_self_refresh_helper_update_avg_times (struct drm_atomic_state *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h]j)}(hvoid drm_self_refresh_helper_update_avg_times(struct drm_atomic_state *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hKubj)}(h(drm_self_refresh_helper_update_avg_timesh]j)}(h(drm_self_refresh_helper_update_avg_timesh]h(drm_self_refresh_helper_update_avg_times}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hKubj)}(ha(struct drm_atomic_state *state, unsigned int commit_time_ms, unsigned int new_self_refresh_mask)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj6 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubj)}(h h]h }(hjC hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjT hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQ ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjV modnameN classnameNjj)}j]j)}jj sb*c.drm_self_refresh_helper_update_avg_timesasbuh1hhj2 ubj)}(h h]h }(hjt hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj2 ubj)}(hstateh]hstate}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj. ubj)}(hunsigned int commit_time_msh](j)}(hunsignedh]hunsigned}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hcommit_time_msh]hcommit_time_ms}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj. ubj)}(h"unsigned int new_self_refresh_maskh](j)}(hunsignedh]hunsigned}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hinth]hint}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj#!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hnew_self_refresh_maskh]hnew_self_refresh_mask}(hj1!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj. ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hKhjhhubj)}(hhh]h)}(h!Updates a crtc's SR time averagesh]h#Updates a crtc’s SR time averages}(hj[!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjX!hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjs!jjs!jjjuh1jhhhjhNhNubj)}(hXj**Parameters** ``struct drm_atomic_state *state`` the state which has just been applied to hardware ``unsigned int commit_time_ms`` the amount of time in ms that this commit took to complete ``unsigned int new_self_refresh_mask`` bitmask of crtc's that have self_refresh_active in new state **Description** Called after :c:type:`drm_mode_config_funcs.atomic_commit_tail `, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.h](h)}(h**Parameters**h]j%)}(hj}!h]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{!ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjw!ubji)}(hhh](jn)}(hU``struct drm_atomic_state *state`` the state which has just been applied to hardware h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj!h]hstruct drm_atomic_state *state}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj!ubj)}(hhh]h)}(h1the state which has just been applied to hardwareh]h1the state which has just been applied to hardware}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hKhj!ubjn)}(h[``unsigned int commit_time_ms`` the amount of time in ms that this commit took to complete h](jt)}(h``unsigned int commit_time_ms``h]jz)}(hj!h]hunsigned int commit_time_ms}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj!ubj)}(hhh]h)}(h:the amount of time in ms that this commit took to completeh]h:the amount of time in ms that this commit took to complete}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKhj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hKhj!ubjn)}(hd``unsigned int new_self_refresh_mask`` bitmask of crtc's that have self_refresh_active in new state h](jt)}(h&``unsigned int new_self_refresh_mask``h]jz)}(hj"h]h"unsigned int new_self_refresh_mask}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj "ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj"ubj)}(hhh]h)}(hbitmask of crtc’s that have self_refresh_active in new state}(hj'"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj$"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj#"hKhj!ubeh}(h]h ]h"]h$]h&]uh1jhhjw!ubh)}(h**Description**h]j%)}(hjJ"h]h Description}(hjL"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjH"ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjw!ubh)}(hX*Called after :c:type:`drm_mode_config_funcs.atomic_commit_tail `, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.h](h Called after }(hj`"hhhNhNubh)}(hJ:c:type:`drm_mode_config_funcs.atomic_commit_tail `h]jz)}(hjj"h]h(drm_mode_config_funcs.atomic_commit_tail}(hjl"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjh"ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj`"ubh, this function will update the average entry/exit self refresh times on self refresh transitions. These averages will be used when calculating how long to delay before entering self refresh mode after activity.}(hj`"hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj"hKhjw!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0drm_self_refresh_helper_alter_state (C function)%c.drm_self_refresh_helper_alter_statehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hIvoid drm_self_refresh_helper_alter_state (struct drm_atomic_state *state)h]j)}(hHvoid drm_self_refresh_helper_alter_state(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhj"hKubj)}(h#drm_self_refresh_helper_alter_stateh]j)}(h#drm_self_refresh_helper_alter_stateh]h#drm_self_refresh_helper_alter_state}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj"hhhj"hKubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj #hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj #ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj#modnameN classnameNjj)}j]j)}jj"sb%c.drm_self_refresh_helper_alter_stateasbuh1hhj"ubj)}(h h]h }(hj-#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj+)}(hj9h]h*}(hj;#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj"ubj)}(hstateh]hstate}(hjH#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"ubah}(h]h ]h"]h$]h&]jjuh1jhj"hhhj"hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj"hhhj"hKubah}(h]j"ah ](jjeh"]h$]h&]jj)jhuh1jhj"hKhj"hhubj)}(hhh]h)}(h#Alters the atomic state for SR exith]h#Alters the atomic state for SR exit}(hjr#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhjo#hhubah}(h]h ]h"]h$]h&]uh1jhj"hhhj"hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj#jj#jjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` the state currently being checked **Description** Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we're giving it another. However in order to keep self refresh entirely hidden from userspace, this is required. At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.h](h)}(h**Parameters**h]j%)}(hj#h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj#ubji)}(hhh]jn)}(hE``struct drm_atomic_state *state`` the state currently being checked h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj#h]hstruct drm_atomic_state *state}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj#ubj)}(hhh]h)}(h!the state currently being checkedh]h!the state currently being checked}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKhj#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj#hKhj#ubah}(h]h ]h"]h$]h&]uh1jhhj#ubh)}(h**Description**h]j%)}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj#ubh)}(hX8Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we're giving it another. However in order to keep self refresh entirely hidden from userspace, this is required.h]hX:Called at the end of atomic check. This function checks the state for flags incompatible with self refresh exit and changes them. This is a bit disingenuous since userspace is expecting one thing and we’re giving it another. However in order to keep self refresh entirely hidden from userspace, this is required.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj#ubh)}(h`At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.h]h`At the end, we queue up the self refresh entry work so we can enter PSR after the desired delay.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_self_refresh_helper_init (C function)c.drm_self_refresh_helper_inithNtauh1jxhjhhhNhNubj)}(hhh](j)}(h8int drm_self_refresh_helper_init (struct drm_crtc *crtc)h]j)}(h7int drm_self_refresh_helper_init(struct drm_crtc *crtc)h](j)}(hinth]hint}(hjB$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>$hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKubj)}(h h]h }(hjQ$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>$hhhjP$hKubj)}(hdrm_self_refresh_helper_inith]j)}(hdrm_self_refresh_helper_inith]hdrm_self_refresh_helper_init}(hjc$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_$ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj>$hhhjP$hKubj)}(h(struct drm_crtc *crtc)h]j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{$ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj$modnameN classnameNjj)}j]j)}jje$sbc.drm_self_refresh_helper_initasbuh1hhj{$ubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{$ubj+)}(hj9h]h*}(hj$hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj{$ubj)}(hcrtch]hcrtc}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjw$ubah}(h]h ]h"]h$]h&]jjuh1jhj>$hhhjP$hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj:$hhhjP$hKubah}(h]j5$ah ](jjeh"]h$]h&]jj)jhuh1jhjP$hKhj7$hhubj)}(hhh]h)}(h+Initializes self refresh helpers for a crtch]h+Initializes self refresh helpers for a crtc}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj$hhubah}(h]h ]h"]h$]h&]uh1jhj7$hhhjP$hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj%jj%jjjuh1jhhhjhNhNubj)}(h**Parameters** ``struct drm_crtc *crtc`` the crtc which supports self refresh supported displays **Description** Returns zero if successful or -errno on failureh](h)}(h**Parameters**h]j%)}(hj$%h]h Parameters}(hj&%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"%ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj%ubji)}(hhh]jn)}(hR``struct drm_crtc *crtc`` the crtc which supports self refresh supported displays h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjC%h]hstruct drm_crtc *crtc}(hjE%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjA%ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj=%ubj)}(hhh]h)}(h7the crtc which supports self refresh supported displaysh]h7the crtc which supports self refresh supported displays}(hj\%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjX%hKhjY%ubah}(h]h ]h"]h$]h&]uh1jhj=%ubeh}(h]h ]h"]h$]h&]uh1jmhjX%hKhj:%ubah}(h]h ]h"]h$]h&]uh1jhhj%ubh)}(h**Description**h]j%)}(hj~%h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|%ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj%ubh)}(h/Returns zero if successful or -errno on failureh]h/Returns zero if successful or -errno on failure}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chKhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_self_refresh_helper_cleanup (C function)!c.drm_self_refresh_helper_cleanuphNtauh1jxhjhhhNhNubj)}(hhh](j)}(h&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj+)}(hj9h]h*}(hjL&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj%ubj)}(hcrtch]hcrtc}(hjY&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj%ubah}(h]h ]h"]h$]h&]jjuh1jhj%hhhj%hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj%hhhj%hM ubah}(h]j%ah ](jjeh"]h$]h&]jj)jhuh1jhj%hM hj%hhubj)}(hhh]h)}(h)Cleans up self refresh helpers for a crtch]h)Cleans up self refresh helpers for a crtc}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chM hj&hhubah}(h]h ]h"]h$]h&]uh1jhj%hhhj%hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj&jj&jjjuh1jhhhjhNhNubj)}(h?**Parameters** ``struct drm_crtc *crtc`` the crtc to cleanuph](h)}(h**Parameters**h]j%)}(hj&h]h Parameters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chMhj&ubji)}(hhh]jn)}(h-``struct drm_crtc *crtc`` the crtc to cleanuph](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj&h]hstruct drm_crtc *crtc}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chMhj&ubj)}(hhh]h)}(hthe crtc to cleanuph]hthe crtc to cleanup}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:245: ./drivers/gpu/drm/drm_self_refresh_helper.chM hj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jmhj&hMhj&ubah}(h]h ]h"]h$]h&]uh1jhhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h]#panel-self-refresh-helper-referenceah ]h"]#panel self refresh helper referenceah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hHDMI Atomic State Helpersh]hHDMI Atomic State Helpers}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 'hhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hj!'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hhhhhKubh)}(h_These functions contain an implementation of the HDMI specification in the form of KMS helpers.h]h_These functions contain an implementation of the HDMI specification in the form of KMS helpers.}(hj/'hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:254: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhj'hhubh)}(hoIt contains TMDS character rate computation, automatic selection of output formats, infoframes generation, etc.h]hoIt contains TMDS character rate computation, automatic selection of output formats, infoframes generation, etc.}(hj>'hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:254: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhj'hhubh)}(hhh](h)}(hInfoframes Complianceh]hInfoframes Compliance}(hjP'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjM'hNhNubh)}(hvDrivers using the helpers will expose the various infoframes generated according to the HDMI specification in debugfs.h]hvDrivers using the helpers will expose the various infoframes generated according to the HDMI specification in debugfs.}(hj^'hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:254: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhjM'ubh)}(hCompliance can then be tested using ``edid-decode`` from the ``v4l-utils`` project (https://git.linuxtv.org/v4l-utils.git/). A sample run would look like:h](h$Compliance can then be tested using }(hjm'hhhNhNubjz)}(h``edid-decode``h]h edid-decode}(hju'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjm'ubh from the }(hjm'hhhNhNubjz)}(h ``v4l-utils``h]h v4l-utils}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjm'ubh project (}(hjm'hhhNhNubh reference)}(h&https://git.linuxtv.org/v4l-utils.git/h]h&https://git.linuxtv.org/v4l-utils.git/}(hj'hhhNhNubah}(h]h ]h"]h$]h&]refurij'uh1j'hjm'ubh ). A sample run would look like:}(hjm'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:254: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chKhjM'ubj@)}(hX$# edid-decode \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/avi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdmi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/spd \ /sys/class/drm/card1-HDMI-A-1/edid \ -c edid-decode (hex): 00 ff ff ff ff ff ff 00 1e 6d f4 5b 1e ef 06 00 07 20 01 03 80 2f 34 78 ea 24 05 af 4f 42 ab 25 0f 50 54 21 08 00 d1 c0 61 40 45 40 01 01 01 01 01 01 01 01 01 01 98 d0 00 40 a1 40 d4 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 fd 00 3b 3d 1e b2 31 00 0a 20 20 20 20 20 20 00 00 00 fc 00 4c 47 20 53 44 51 48 44 0a 20 20 20 20 00 00 00 ff 00 32 30 37 4e 54 52 4c 44 43 34 33 30 0a 01 46 02 03 42 72 23 09 07 07 4d 01 03 04 90 12 13 1f 22 5d 5e 5f 60 61 83 01 00 00 6d 03 0c 00 10 00 b8 3c 20 00 60 01 02 03 67 d8 5d c4 01 78 80 03 e3 0f 00 18 e2 00 6a e3 05 c0 00 e6 06 05 01 52 52 51 11 5d 00 a0 a0 40 29 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c3 ---------------- Block 0, Base EDID: EDID Structure Version & Revision: 1.3 Vendor & Product Identification: Manufacturer: GSM Model: 23540 Serial Number: 454430 (0x0006ef1e) Made in: week 7 of 2022 Basic Display Parameters & Features: Digital display Maximum image size: 47 cm x 52 cm Gamma: 2.20 DPMS levels: Standby Suspend Off RGB color display First detailed timing is the preferred timing Color Characteristics: Red : 0.6835, 0.3105 Green: 0.2587, 0.6679 Blue : 0.1445, 0.0585 White: 0.3134, 0.3291 Established Timings I & II: DMT 0x04: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz Standard Timings: DMT 0x52: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz Detailed Timing Descriptors: DTD 1: 2560x2880 59.966580 Hz 8:9 185.417 kHz 534.000000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 240 Hpol P Vfront 3 Vsync 10 Vback 199 Vpol N Display Range Limits: Monitor ranges (GTF): 59-61 Hz V, 30-178 kHz H, max dotclock 490 MHz Display Product Name: 'LG SDQHD' Display Product Serial Number: '207NTRLDC430' Extension blocks: 1 Checksum: 0x46 ---------------- Block 1, CTA-861 Extension Block: Revision: 3 Basic audio support Supports YCbCr 4:4:4 Supports YCbCr 4:2:2 Native detailed modes: 2 Audio Data Block: Linear PCM: Max channels: 2 Supported sample rates (kHz): 48 44.1 32 Supported sample sizes (bits): 24 20 16 Video Data Block: VIC 1: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz VIC 3: 720x480 59.940060 Hz 16:9 31.469 kHz 27.000000 MHz VIC 4: 1280x720 60.000000 Hz 16:9 45.000 kHz 74.250000 MHz VIC 16: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz (native) VIC 18: 720x576 50.000000 Hz 16:9 31.250 kHz 27.000000 MHz VIC 19: 1280x720 50.000000 Hz 16:9 37.500 kHz 74.250000 MHz VIC 31: 1920x1080 50.000000 Hz 16:9 56.250 kHz 148.500000 MHz VIC 34: 1920x1080 30.000000 Hz 16:9 33.750 kHz 74.250000 MHz VIC 93: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz VIC 94: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz VIC 95: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Speaker Allocation Data Block: FL/FR - Front Left/Right Vendor-Specific Data Block (HDMI), OUI 00-0C-03: Source physical address: 1.0.0.0 Supports_AI DC_36bit DC_30bit DC_Y444 Maximum TMDS clock: 300 MHz Extended HDMI video details: HDMI VICs: HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Version: 1 Maximum TMDS Character Rate: 600 MHz SCDC Present Supports 12-bits/component Deep Color 4:2:0 Pixel Encoding Supports 10-bits/component Deep Color 4:2:0 Pixel Encoding YCbCr 4:2:0 Capability Map Data Block: VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Video Capability Data Block: YCbCr quantization: No Data RGB quantization: Selectable (via AVI Q) PT scan behavior: Always Underscanned IT scan behavior: Always Underscanned CE scan behavior: Always Underscanned Colorimetry Data Block: BT2020YCC BT2020RGB HDR Static Metadata Data Block: Electro optical transfer functions: Traditional gamma - SDR luminance range SMPTE ST2084 Supported static metadata descriptors: Static metadata type 1 Desired content max luminance: 82 (295.365 cd/m^2) Desired content max frame-average luminance: 82 (295.365 cd/m^2) Desired content min luminance: 81 (0.298 cd/m^2) Detailed Timing Descriptors: DTD 2: 2560x2880 29.986961 Hz 8:9 87.592 kHz 238.250000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 80 Hpol P Vfront 3 Vsync 10 Vback 28 Vpol N Checksum: 0xc3 Unused space in Extension Block: 43 bytes ---------------- edid-decode 1.29.0-5346 edid-decode SHA: c363e9aa6d70 2025-03-11 11:41:18 Warnings: Block 1, CTA-861 Extension Block: IT Video Formats are overscanned by default, but normally this should be underscanned. Video Data Block: VIC 1 and the first DTD are not identical. Is this intended? Video Data Block: All VICs are in ascending order, and the first (preferred) VIC <= 4, is that intended? Video Capability Data Block: Set Selectable YCbCr Quantization to avoid interop issues. Video Capability Data Block: S_PT is equal to S_IT and S_CE, so should be set to 0 instead. Colorimetry Data Block: Set the sRGB colorimetry bit to avoid interop issues. Display Product Serial Number is set, so the Serial Number in the Base EDID should be 0. EDID: Base EDID: Some timings are out of range of the Monitor Ranges: Vertical Freq: 24.000 - 60.317 Hz (Monitor: 59.000 - 61.000 Hz) Horizontal Freq: 31.250 - 185.416 kHz (Monitor: 30.000 - 178.000 kHz) Maximum Clock: 594.000 MHz (Monitor: 490.000 MHz) Failures: Block 1, CTA-861 Extension Block: Video Capability Data Block: IT video formats are always underscanned, but bit 7 of Byte 3 of the CTA-861 Extension header is set to overscanned. EDID: CTA-861: Native progressive timings are a mix of several resolutions. EDID conformity: FAIL ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio' was empty. ================ edid-decode InfoFrame (hex): 82 02 0d 31 12 28 04 00 00 00 00 00 00 00 00 00 00 ---------------- HDMI InfoFrame Checksum: 0x31 AVI InfoFrame Version: 2 Length: 13 Y: Color Component Sample Format: RGB A: Active Format Information Present: Yes B: Bar Data Present: Bar Data not present S: Scan Information: Composed for an underscanned display C: Colorimetry: No Data M: Picture Aspect Ratio: 16:9 R: Active Portion Aspect Ratio: 8 ITC: IT Content: No Data EC: Extended Colorimetry: xvYCC601 Q: RGB Quantization Range: Limited Range SC: Non-Uniform Picture Scaling: No Known non-uniform scaling YQ: YCC Quantization Range: Limited Range CN: IT Content Type: Graphics PR: Pixel Data Repetition Count: 0 Line Number of End of Top Bar: 0 Line Number of Start of Bottom Bar: 0 Pixel Number of End of Left Bar: 0 Pixel Number of Start of Right Bar: 0 ---------------- AVI InfoFrame conformity: PASS ================ edid-decode InfoFrame (hex): 81 01 05 49 03 0c 00 20 01 ---------------- HDMI InfoFrame Checksum: 0x49 Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 Version: 1 Length: 5 HDMI Video Format: HDMI_VIC is present HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz ---------------- Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 conformity: PASS ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm' was empty. ================ edid-decode InfoFrame (hex): 83 01 19 93 42 72 6f 61 64 63 6f 6d 56 69 64 65 6f 63 6f 72 65 00 00 00 00 00 00 00 09 ---------------- HDMI InfoFrame Checksum: 0x93 Source Product Description InfoFrame Version: 1 Length: 25 Vendor Name: 'Broadcom' Product Description: 'Videocore' Source Information: PC general ---------------- Source Product Description InfoFrame conformity: PASSh]hX$# edid-decode \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/avi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdmi \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm \ -I /sys/kernel/debug/dri/1/HDMI-A-1/infoframes/spd \ /sys/class/drm/card1-HDMI-A-1/edid \ -c edid-decode (hex): 00 ff ff ff ff ff ff 00 1e 6d f4 5b 1e ef 06 00 07 20 01 03 80 2f 34 78 ea 24 05 af 4f 42 ab 25 0f 50 54 21 08 00 d1 c0 61 40 45 40 01 01 01 01 01 01 01 01 01 01 98 d0 00 40 a1 40 d4 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 fd 00 3b 3d 1e b2 31 00 0a 20 20 20 20 20 20 00 00 00 fc 00 4c 47 20 53 44 51 48 44 0a 20 20 20 20 00 00 00 ff 00 32 30 37 4e 54 52 4c 44 43 34 33 30 0a 01 46 02 03 42 72 23 09 07 07 4d 01 03 04 90 12 13 1f 22 5d 5e 5f 60 61 83 01 00 00 6d 03 0c 00 10 00 b8 3c 20 00 60 01 02 03 67 d8 5d c4 01 78 80 03 e3 0f 00 18 e2 00 6a e3 05 c0 00 e6 06 05 01 52 52 51 11 5d 00 a0 a0 40 29 b0 30 20 3a 00 d1 0b 12 00 00 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c3 ---------------- Block 0, Base EDID: EDID Structure Version & Revision: 1.3 Vendor & Product Identification: Manufacturer: GSM Model: 23540 Serial Number: 454430 (0x0006ef1e) Made in: week 7 of 2022 Basic Display Parameters & Features: Digital display Maximum image size: 47 cm x 52 cm Gamma: 2.20 DPMS levels: Standby Suspend Off RGB color display First detailed timing is the preferred timing Color Characteristics: Red : 0.6835, 0.3105 Green: 0.2587, 0.6679 Blue : 0.1445, 0.0585 White: 0.3134, 0.3291 Established Timings I & II: DMT 0x04: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz Standard Timings: DMT 0x52: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz DMT 0x10: 1024x768 60.003840 Hz 4:3 48.363 kHz 65.000000 MHz DMT 0x09: 800x600 60.316541 Hz 4:3 37.879 kHz 40.000000 MHz Detailed Timing Descriptors: DTD 1: 2560x2880 59.966580 Hz 8:9 185.417 kHz 534.000000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 240 Hpol P Vfront 3 Vsync 10 Vback 199 Vpol N Display Range Limits: Monitor ranges (GTF): 59-61 Hz V, 30-178 kHz H, max dotclock 490 MHz Display Product Name: 'LG SDQHD' Display Product Serial Number: '207NTRLDC430' Extension blocks: 1 Checksum: 0x46 ---------------- Block 1, CTA-861 Extension Block: Revision: 3 Basic audio support Supports YCbCr 4:4:4 Supports YCbCr 4:2:2 Native detailed modes: 2 Audio Data Block: Linear PCM: Max channels: 2 Supported sample rates (kHz): 48 44.1 32 Supported sample sizes (bits): 24 20 16 Video Data Block: VIC 1: 640x480 59.940476 Hz 4:3 31.469 kHz 25.175000 MHz VIC 3: 720x480 59.940060 Hz 16:9 31.469 kHz 27.000000 MHz VIC 4: 1280x720 60.000000 Hz 16:9 45.000 kHz 74.250000 MHz VIC 16: 1920x1080 60.000000 Hz 16:9 67.500 kHz 148.500000 MHz (native) VIC 18: 720x576 50.000000 Hz 16:9 31.250 kHz 27.000000 MHz VIC 19: 1280x720 50.000000 Hz 16:9 37.500 kHz 74.250000 MHz VIC 31: 1920x1080 50.000000 Hz 16:9 56.250 kHz 148.500000 MHz VIC 34: 1920x1080 30.000000 Hz 16:9 33.750 kHz 74.250000 MHz VIC 93: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz VIC 94: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz VIC 95: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Speaker Allocation Data Block: FL/FR - Front Left/Right Vendor-Specific Data Block (HDMI), OUI 00-0C-03: Source physical address: 1.0.0.0 Supports_AI DC_36bit DC_30bit DC_Y444 Maximum TMDS clock: 300 MHz Extended HDMI video details: HDMI VICs: HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Version: 1 Maximum TMDS Character Rate: 600 MHz SCDC Present Supports 12-bits/component Deep Color 4:2:0 Pixel Encoding Supports 10-bits/component Deep Color 4:2:0 Pixel Encoding YCbCr 4:2:0 Capability Map Data Block: VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz Video Capability Data Block: YCbCr quantization: No Data RGB quantization: Selectable (via AVI Q) PT scan behavior: Always Underscanned IT scan behavior: Always Underscanned CE scan behavior: Always Underscanned Colorimetry Data Block: BT2020YCC BT2020RGB HDR Static Metadata Data Block: Electro optical transfer functions: Traditional gamma - SDR luminance range SMPTE ST2084 Supported static metadata descriptors: Static metadata type 1 Desired content max luminance: 82 (295.365 cd/m^2) Desired content max frame-average luminance: 82 (295.365 cd/m^2) Desired content min luminance: 81 (0.298 cd/m^2) Detailed Timing Descriptors: DTD 2: 2560x2880 29.986961 Hz 8:9 87.592 kHz 238.250000 MHz (465 mm x 523 mm) Hfront 48 Hsync 32 Hback 80 Hpol P Vfront 3 Vsync 10 Vback 28 Vpol N Checksum: 0xc3 Unused space in Extension Block: 43 bytes ---------------- edid-decode 1.29.0-5346 edid-decode SHA: c363e9aa6d70 2025-03-11 11:41:18 Warnings: Block 1, CTA-861 Extension Block: IT Video Formats are overscanned by default, but normally this should be underscanned. Video Data Block: VIC 1 and the first DTD are not identical. Is this intended? Video Data Block: All VICs are in ascending order, and the first (preferred) VIC <= 4, is that intended? Video Capability Data Block: Set Selectable YCbCr Quantization to avoid interop issues. Video Capability Data Block: S_PT is equal to S_IT and S_CE, so should be set to 0 instead. Colorimetry Data Block: Set the sRGB colorimetry bit to avoid interop issues. Display Product Serial Number is set, so the Serial Number in the Base EDID should be 0. EDID: Base EDID: Some timings are out of range of the Monitor Ranges: Vertical Freq: 24.000 - 60.317 Hz (Monitor: 59.000 - 61.000 Hz) Horizontal Freq: 31.250 - 185.416 kHz (Monitor: 30.000 - 178.000 kHz) Maximum Clock: 594.000 MHz (Monitor: 490.000 MHz) Failures: Block 1, CTA-861 Extension Block: Video Capability Data Block: IT video formats are always underscanned, but bit 7 of Byte 3 of the CTA-861 Extension header is set to overscanned. EDID: CTA-861: Native progressive timings are a mix of several resolutions. EDID conformity: FAIL ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/audio' was empty. ================ edid-decode InfoFrame (hex): 82 02 0d 31 12 28 04 00 00 00 00 00 00 00 00 00 00 ---------------- HDMI InfoFrame Checksum: 0x31 AVI InfoFrame Version: 2 Length: 13 Y: Color Component Sample Format: RGB A: Active Format Information Present: Yes B: Bar Data Present: Bar Data not present S: Scan Information: Composed for an underscanned display C: Colorimetry: No Data M: Picture Aspect Ratio: 16:9 R: Active Portion Aspect Ratio: 8 ITC: IT Content: No Data EC: Extended Colorimetry: xvYCC601 Q: RGB Quantization Range: Limited Range SC: Non-Uniform Picture Scaling: No Known non-uniform scaling YQ: YCC Quantization Range: Limited Range CN: IT Content Type: Graphics PR: Pixel Data Repetition Count: 0 Line Number of End of Top Bar: 0 Line Number of Start of Bottom Bar: 0 Pixel Number of End of Left Bar: 0 Pixel Number of Start of Right Bar: 0 ---------------- AVI InfoFrame conformity: PASS ================ edid-decode InfoFrame (hex): 81 01 05 49 03 0c 00 20 01 ---------------- HDMI InfoFrame Checksum: 0x49 Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 Version: 1 Length: 5 HDMI Video Format: HDMI_VIC is present HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz ---------------- Vendor-Specific InfoFrame (HDMI), OUI 00-0C-03 conformity: PASS ================ InfoFrame of '/sys/kernel/debug/dri/1/HDMI-A-1/infoframes/hdr_drm' was empty. ================ edid-decode InfoFrame (hex): 83 01 19 93 42 72 6f 61 64 63 6f 6d 56 69 64 65 6f 63 6f 72 65 00 00 00 00 00 00 00 09 ---------------- HDMI InfoFrame Checksum: 0x93 Source Product Description InfoFrame Version: 1 Length: 25 Vendor Name: 'Broadcom' Product Description: 'Videocore' Source Information: PC general ---------------- Source Product Description InfoFrame conformity: PASS}hj'sbah}(h]h ]h"]h$]h&]jjj j bashj }uh1j?ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:254: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chK hjM'ubeh}(h]infoframes-complianceah ]h"]infoframes complianceah$]h&]uh1hhj'hhhNhNubh)}(hhh](h)}(hTestingh]hTesting}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hNhNubh)}(hAThe helpers have unit testing and can be tested using kunit with:h]hAThe helpers have unit testing and can be tested using kunit with:}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:254: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM)hj'ubj@)}(h$ ./tools/testing/kunit/kunit.py run \ --kunitconfig=drivers/gpu/drm/tests \ drm_atomic_helper_connector_hdmi_*h]h$ ./tools/testing/kunit/kunit.py run \ --kunitconfig=drivers/gpu/drm/tests \ drm_atomic_helper_connector_hdmi_*}hj'sbah}(h]h ]h"]h$]h&]jjj j bashj }uh1j?ht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:254: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM+hj'ubeh}(h]testingah ]h"]testingah$]h&]uh1hhj'hhhNhNubeh}(h]id2ah ]h"]h$]overviewah&]uh1hhj 'hhhhhKjy;Kubh)}(hhh](h)}(hFunctions Referenceh]hFunctions Reference}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hhhhhMubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5__drm_atomic_helper_connector_hdmi_reset (C function)*c.__drm_atomic_helper_connector_hdmi_resethNtauh1jxhj(hhhNhNubj)}(hhh](j)}(h{void __drm_atomic_helper_connector_hdmi_reset (struct drm_connector *connector, struct drm_connector_state *new_conn_state)h]j)}(hzvoid __drm_atomic_helper_connector_hdmi_reset(struct drm_connector *connector, struct drm_connector_state *new_conn_state)h](j)}(hvoidh]hvoid}(hj9(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5(hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM5ubj)}(h h]h }(hjH(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5(hhhjG(hM5ubj)}(h(__drm_atomic_helper_connector_hdmi_reseth]j)}(h(__drm_atomic_helper_connector_hdmi_reseth]h(__drm_atomic_helper_connector_hdmi_reset}(hjZ(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV(ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj5(hhhjG(hM5ubj)}(hM(struct drm_connector *connector, struct drm_connector_state *new_conn_state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjv(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr(ubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr(ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj(modnameN classnameNjj)}j]j)}jj\(sb*c.__drm_atomic_helper_connector_hdmi_resetasbuh1hhjr(ubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr(ubj+)}(hj9h]h*}(hj(hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjr(ubj)}(h connectorh]h connector}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjn(ubj)}(h*struct drm_connector_state *new_conn_stateh](j)}(hjh]hstruct}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j(*c.__drm_atomic_helper_connector_hdmi_resetasbuh1hhj(ubj)}(h h]h }(hj$)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj+)}(hj9h]h*}(hj2)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj(ubj)}(hnew_conn_stateh]hnew_conn_state}(hj?)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjn(ubeh}(h]h ]h"]h$]h&]jjuh1jhj5(hhhjG(hM5ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj1(hhhjG(hM5ubah}(h]j,(ah ](jjeh"]h$]h&]jj)jhuh1jhjG(hM5hj.(hhubj)}(hhh]h)}(h6Initializes all HDMI **drm_connector_state** resourcesh](hInitializes all HDMI }(hji)hhhNhNubj%)}(h**drm_connector_state**h]hdrm_connector_state}(hjq)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hji)ubh resources}(hji)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM5hjf)hhubah}(h]h ]h"]h$]h&]uh1jhj.(hhhjG(hM5ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj)jj)jjjuh1jhhhj(hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` DRM connector ``struct drm_connector_state *new_conn_state`` connector state to reset **Description** Initializes all HDMI resources from a **drm_connector_state** without actually allocating it. This is useful for HDMI drivers, in combination with __drm_atomic_helper_connector_reset() or drm_atomic_helper_connector_reset().h](h)}(h**Parameters**h]j%)}(hj)h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj)ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM9hj)ubji)}(hhh](jn)}(h2``struct drm_connector *connector`` DRM connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj)h]hstruct drm_connector *connector}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM6hj)ubj)}(hhh]h)}(h DRM connectorh]h DRM connector}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hM6hj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhj)hM6hj)ubjn)}(hH``struct drm_connector_state *new_conn_state`` connector state to reset h](jt)}(h.``struct drm_connector_state *new_conn_state``h]jz)}(hj)h]h*struct drm_connector_state *new_conn_state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM7hj)ubj)}(hhh]h)}(hconnector state to reseth]hconnector state to reset}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj *hM7hj *ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhj *hM7hj)ubeh}(h]h ]h"]h$]h&]uh1jhhj)ubh)}(h**Description**h]j%)}(hj0*h]h Description}(hj2*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.*ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM9hj)ubh)}(hInitializes all HDMI resources from a **drm_connector_state** without actually allocating it. This is useful for HDMI drivers, in combination with __drm_atomic_helper_connector_reset() or drm_atomic_helper_connector_reset().h](h&Initializes all HDMI resources from a }(hjF*hhhNhNubj%)}(h**drm_connector_state**h]hdrm_connector_state}(hjN*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjF*ubh without actually allocating it. This is useful for HDMI drivers, in combination with __drm_atomic_helper_connector_reset() or drm_atomic_helper_connector_reset().}(hjF*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM8hj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_atomic_helper_connector_hdmi_check (C function)(c.drm_atomic_helper_connector_hdmi_checkhNtauh1jxhj(hhhNhNubj)}(hhh](j)}(hlint drm_atomic_helper_connector_hdmi_check (struct drm_connector *connector, struct drm_atomic_state *state)h]j)}(hkint drm_atomic_helper_connector_hdmi_check(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hinth]hint}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM;ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhhj*hM;ubj)}(h&drm_atomic_helper_connector_hdmi_checkh]j)}(h&drm_atomic_helper_connector_hdmi_checkh]h&drm_atomic_helper_connector_hdmi_check}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj*hhhj*hM;ubj)}(hA(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]j)}jj*sb(c.drm_atomic_helper_connector_hdmi_checkasbuh1hhj*ubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj*ubj)}(h connectorh]h connector}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj*ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj6+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2+ubj)}(h h]h }(hjC+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2+ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjT+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQ+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjV+modnameN classnameNjj)}j]j*(c.drm_atomic_helper_connector_hdmi_checkasbuh1hhj2+ubj)}(h h]h }(hjr+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2+ubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj2+ubj)}(hstateh]hstate}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj*ubeh}(h]h ]h"]h$]h&]jjuh1jhj*hhhj*hM;ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj*hhhj*hM;ubah}(h]jz*ah ](jjeh"]h$]h&]jj)jhuh1jhj*hM;hj|*hhubj)}(hhh]h)}(h+Helper to check HDMI connector atomic stateh]h+Helper to check HDMI connector atomic state}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM;hj+hhubah}(h]h ]h"]h$]h&]uh1jhj|*hhhj*hM;ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhj(hNhNubj)}(hXn**Parameters** ``struct drm_connector *connector`` DRM Connector ``struct drm_atomic_state *state`` the DRM State object **Description** Provides a default connector state check handler for HDMI connectors. Checks that a desired connector update is valid, and updates various fields of derived state. **Return** Zero on success, or an errno code otherwise.h](h)}(h**Parameters**h]j%)}(hj+h]h Parameters}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj+ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM?hj+ubji)}(hhh](jn)}(h2``struct drm_connector *connector`` DRM Connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj+h]hstruct drm_connector *connector}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM<hj+ubj)}(hhh]h)}(h DRM Connectorh]h DRM Connector}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ,hM<hj,ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhj ,hM<hj+ubjn)}(h8``struct drm_atomic_state *state`` the DRM State object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj1,h]hstruct drm_atomic_state *state}(hj3,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/,ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM=hj+,ubj)}(hhh]h)}(hthe DRM State objecth]hthe DRM State object}(hjJ,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjF,hM=hjG,ubah}(h]h ]h"]h$]h&]uh1jhj+,ubeh}(h]h ]h"]h$]h&]uh1jmhjF,hM=hj+ubeh}(h]h ]h"]h$]h&]uh1jhhj+ubh)}(h**Description**h]j%)}(hjl,h]h Description}(hjn,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjj,ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM?hj+ubh)}(hProvides a default connector state check handler for HDMI connectors. Checks that a desired connector update is valid, and updates various fields of derived state.h]hProvides a default connector state check handler for HDMI connectors. Checks that a desired connector update is valid, and updates various fields of derived state.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chM>hj+ubh)}(h **Return**h]j%)}(hj,h]hReturn}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMBhj+ubh)}(h,Zero on success, or an errno code otherwise.h]h,Zero on success, or an errno code otherwise.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMChj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_hdmi_connector_mode_valid (C function)c.drm_hdmi_connector_mode_validhNtauh1jxhj(hhhNhNubj)}(hhh](j)}(hyenum drm_mode_status drm_hdmi_connector_mode_valid (struct drm_connector *connector, const struct drm_display_mode *mode)h]j)}(hxenum drm_mode_status drm_hdmi_connector_mode_valid(struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(hj8h]henum}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMpubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj,hMpubh)}(hhh]j)}(hdrm_mode_statush]hdrm_mode_status}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj,modnameN classnameNjj)}j]j)}jdrm_hdmi_connector_mode_validsbc.drm_hdmi_connector_mode_validasbuh1hhj,hhhj,hMpubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj,hMpubj)}(hdrm_hdmi_connector_mode_validh]j)}(hj-h]hdrm_hdmi_connector_mode_valid}(hj*-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&-ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj,hhhj,hMpubj)}(hF(struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjE-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA-ubj)}(h h]h }(hjR-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA-ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjc-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`-ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetje-modnameN classnameNjj)}j]j-c.drm_hdmi_connector_mode_validasbuh1hhjA-ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA-ubj+)}(hj9h]h*}(hj-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjA-ubj)}(h connectorh]h connector}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjA-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=-ubj)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(hjh]hstruct}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj-modnameN classnameNjj)}j]j-c.drm_hdmi_connector_mode_validasbuh1hhj-ubj)}(h h]h }(hj .hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-ubj)}(hmodeh]hmode}(hj'.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=-ubeh}(h]h ]h"]h$]h&]jjuh1jhj,hhhj,hMpubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj,hhhj,hMpubah}(h]j,ah ](jjeh"]h$]h&]jj)jhuh1jhj,hMphj,hhubj)}(hhh]h)}(h)Check if mode is valid for HDMI connectorh]h)Check if mode is valid for HDMI connector}(hjQ.hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMphjN.hhubah}(h]h ]h"]h$]h&]uh1jhj,hhhj,hMpubeh}(h]h ](jfunctioneh"]h$]h&]jjjji.jji.jjjuh1jhhhj(hNhNubj)}(h**Parameters** ``struct drm_connector *connector`` DRM connector to validate the mode ``const struct drm_display_mode *mode`` Display mode to validate **Description** Generic .mode_valid implementation for HDMI connectors.h](h)}(h**Parameters**h]j%)}(hjs.h]h Parameters}(hju.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjq.ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMthjm.ubji)}(hhh](jn)}(hG``struct drm_connector *connector`` DRM connector to validate the mode h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj.h]hstruct drm_connector *connector}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMqhj.ubj)}(hhh]h)}(h"DRM connector to validate the modeh]h"DRM connector to validate the mode}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMqhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhj.hMqhj.ubjn)}(hA``const struct drm_display_mode *mode`` Display mode to validate h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hj.h]h#const struct drm_display_mode *mode}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMrhj.ubj)}(hhh]h)}(hDisplay mode to validateh]hDisplay mode to validate}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hMrhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhj.hMrhj.ubeh}(h]h ]h"]h$]h&]uh1jhhjm.ubh)}(h**Description**h]j%)}(hj/h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMthjm.ubh)}(h7Generic .mode_valid implementation for HDMI connectors.h]h7Generic .mode_valid implementation for HDMI connectors.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMshjm.ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j?drm_atomic_helper_connector_hdmi_update_infoframes (C function)4c.drm_atomic_helper_connector_hdmi_update_infoframeshNtauh1jxhj(hhhNhNubj)}(hhh](j)}(hxint drm_atomic_helper_connector_hdmi_update_infoframes (struct drm_connector *connector, struct drm_atomic_state *state)h]j)}(hwint drm_atomic_helper_connector_hdmi_update_infoframes(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hinth]hint}(hjK/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG/hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMubj)}(h h]h }(hjZ/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjG/hhhjY/hMubj)}(h2drm_atomic_helper_connector_hdmi_update_infoframesh]j)}(h2drm_atomic_helper_connector_hdmi_update_infoframesh]h2drm_atomic_helper_connector_hdmi_update_infoframes}(hjl/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjh/ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjG/hhhjY/hMubj)}(hA(struct drm_connector *connector, struct drm_atomic_state *state)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/modnameN classnameNjj)}j]j)}jjn/sb4c.drm_atomic_helper_connector_hdmi_update_infoframesasbuh1hhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj)}(h connectorh]h connector}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]j/4c.drm_atomic_helper_connector_hdmi_update_infoframesasbuh1hhj/ubj)}(h h]h }(hj60hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj+)}(hj9h]h*}(hjD0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj)}(hstateh]hstate}(hjQ0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/ubeh}(h]h ]h"]h$]h&]jjuh1jhjG/hhhjY/hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjC/hhhjY/hMubah}(h]j>/ah ](jjeh"]h$]h&]jj)jhuh1jhjY/hMhj@/hhubj)}(hhh]h)}(hUpdate the Infoframesh]hUpdate the Infoframes}(hj{0hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjx0hhubah}(h]h ]h"]h$]h&]uh1jhj@/hhhjY/hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj0jj0jjjuh1jhhhj(hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector ``struct drm_atomic_state *state`` The HDMI connector state to generate the infoframe from **Description** This function is meant for HDMI connector drivers to write their infoframes. It will typically be used in a **drm_connector_helper_funcs.atomic_enable** implementation. **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j%)}(hj0h]h Parameters}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj0ubji)}(hhh](jn)}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj0h]hstruct drm_connector *connector}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj0ubj)}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhj0hMhj0ubjn)}(h[``struct drm_atomic_state *state`` The HDMI connector state to generate the infoframe from h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj0h]hstruct drm_atomic_state *state}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj0ubj)}(hhh]h)}(h7The HDMI connector state to generate the infoframe fromh]h7The HDMI connector state to generate the infoframe from}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 1hMhj 1ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhj 1hMhj0ubeh}(h]h ]h"]h$]h&]uh1jhhj0ubh)}(h**Description**h]j%)}(hj01h]h Description}(hj21hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.1ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj0ubh)}(hThis function is meant for HDMI connector drivers to write their infoframes. It will typically be used in a **drm_connector_helper_funcs.atomic_enable** implementation.h](hlThis function is meant for HDMI connector drivers to write their infoframes. It will typically be used in a }(hjF1hhhNhNubj%)}(h,**drm_connector_helper_funcs.atomic_enable**h]h(drm_connector_helper_funcs.atomic_enable}(hjN1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjF1ubh implementation.}(hjF1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj0ubh)}(h **Return**h]j%)}(hji1h]hReturn}(hjk1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjg1ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj0ubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jDdrm_atomic_helper_connector_hdmi_update_audio_infoframe (C function)9c.drm_atomic_helper_connector_hdmi_update_audio_infoframehNtauh1jxhj(hhhNhNubj)}(hhh](j)}(hint drm_atomic_helper_connector_hdmi_update_audio_infoframe (struct drm_connector *connector, struct hdmi_audio_infoframe *frame)h]j)}(hint drm_atomic_helper_connector_hdmi_update_audio_infoframe(struct drm_connector *connector, struct hdmi_audio_infoframe *frame)h](j)}(hinth]hint}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhj1hMubj)}(h7drm_atomic_helper_connector_hdmi_update_audio_infoframeh]j)}(h7drm_atomic_helper_connector_hdmi_update_audio_infoframeh]h7drm_atomic_helper_connector_hdmi_update_audio_infoframe}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj1hhhj1hMubj)}(hE(struct drm_connector *connector, struct hdmi_audio_infoframe *frame)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj 2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj 2modnameN classnameNjj)}j]j)}jj1sb9c.drm_atomic_helper_connector_hdmi_update_audio_infoframeasbuh1hhj1ubj)}(h h]h }(hj)2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj+)}(hj9h]h*}(hj72hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj1ubj)}(h connectorh]h connector}(hjD2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj1ubj)}(h"struct hdmi_audio_infoframe *frameh](j)}(hjh]hstruct}(hj]2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjY2ubj)}(h h]h }(hjj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjY2ubh)}(hhh]j)}(hhdmi_audio_infoframeh]hhdmi_audio_infoframe}(hj{2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjx2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj}2modnameN classnameNjj)}j]j%29c.drm_atomic_helper_connector_hdmi_update_audio_infoframeasbuh1hhjY2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjY2ubj+)}(hj9h]h*}(hj2hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjY2ubj)}(hframeh]hframe}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjY2ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj1ubeh}(h]h ]h"]h$]h&]jjuh1jhj1hhhj1hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj1hhhj1hMubah}(h]j1ah ](jjeh"]h$]h&]jj)jhuh1jhj1hMhj1hhubj)}(hhh]h)}(hUpdate the Audio Infoframeh]hUpdate the Audio Infoframe}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj2hhubah}(h]h ]h"]h$]h&]uh1jhj1hhhj1hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj2jj2jjjuh1jhhhj(hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector ``struct hdmi_audio_infoframe *frame`` A pointer to the audio infoframe to write **Description** This function is meant for HDMI connector drivers to update their audio infoframe. It will typically be used in one of the ALSA hooks (most likely prepare). **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j%)}(hj3h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj2ubji)}(hhh](jn)}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj3h]hstruct drm_connector *connector}(hj!3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj3ubj)}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj83hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj43hMhj53ubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jmhj43hMhj3ubjn)}(hQ``struct hdmi_audio_infoframe *frame`` A pointer to the audio infoframe to write h](jt)}(h&``struct hdmi_audio_infoframe *frame``h]jz)}(hjX3h]h"struct hdmi_audio_infoframe *frame}(hjZ3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjV3ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhjR3ubj)}(hhh]h)}(h)A pointer to the audio infoframe to writeh]h)A pointer to the audio infoframe to write}(hjq3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjm3hMhjn3ubah}(h]h ]h"]h$]h&]uh1jhjR3ubeh}(h]h ]h"]h$]h&]uh1jmhjm3hMhj3ubeh}(h]h ]h"]h$]h&]uh1jhhj2ubh)}(h**Description**h]j%)}(hj3h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj2ubh)}(hThis function is meant for HDMI connector drivers to update their audio infoframe. It will typically be used in one of the ALSA hooks (most likely prepare).h]hThis function is meant for HDMI connector drivers to update their audio infoframe. It will typically be used in one of the ALSA hooks (most likely prepare).}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj2ubh)}(h **Return**h]j%)}(hj3h]hReturn}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj2ubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jCdrm_atomic_helper_connector_hdmi_clear_audio_infoframe (C function)8c.drm_atomic_helper_connector_hdmi_clear_audio_infoframehNtauh1jxhj(hhhNhNubj)}(hhh](j)}(h\int drm_atomic_helper_connector_hdmi_clear_audio_infoframe (struct drm_connector *connector)h]j)}(h[int drm_atomic_helper_connector_hdmi_clear_audio_infoframe(struct drm_connector *connector)h](j)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMAubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhj 4hMAubj)}(h6drm_atomic_helper_connector_hdmi_clear_audio_infoframeh]j)}(h6drm_atomic_helper_connector_hdmi_clear_audio_infoframeh]h6drm_atomic_helper_connector_hdmi_clear_audio_infoframe}(hj 4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj3hhhj 4hMAubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj<4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj84ubj)}(h h]h }(hjI4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj84ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjZ4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\4modnameN classnameNjj)}j]j)}jj"4sb8c.drm_atomic_helper_connector_hdmi_clear_audio_infoframeasbuh1hhj84ubj)}(h h]h }(hjz4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj84ubj+)}(hj9h]h*}(hj4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj84ubj)}(h connectorh]h connector}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj84ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj44ubah}(h]h ]h"]h$]h&]jjuh1jhj3hhhj 4hMAubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj3hhhj 4hMAubah}(h]j3ah ](jjeh"]h$]h&]jj)jhuh1jhj 4hMAhj3hhubj)}(hhh]h)}(h Stop sending the Audio Infoframeh]h Stop sending the Audio Infoframe}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMAhj4hhubah}(h]h ]h"]h$]h&]uh1jhj3hhhj 4hMAubeh}(h]h ](jfunctioneh"]h$]h&]jjjj4jj4jjjuh1jhhhj(hNhNubj)}(hX@**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector **Description** This function is meant for HDMI connector drivers to stop sending their audio infoframe. It will typically be used in one of the ALSA hooks (most likely shutdown). **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j%)}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMEhj4ubji)}(hhh]jn)}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj5h]hstruct drm_connector *connector}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMBhj4ubj)}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMBhj5ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhj5hMBhj4ubah}(h]h ]h"]h$]h&]uh1jhhj4ubh)}(h**Description**h]j%)}(hj;5h]h Description}(hj=5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj95ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMDhj4ubh)}(hThis function is meant for HDMI connector drivers to stop sending their audio infoframe. It will typically be used in one of the ALSA hooks (most likely shutdown).h]hThis function is meant for HDMI connector drivers to stop sending their audio infoframe. It will typically be used in one of the ALSA hooks (most likely shutdown).}(hjQ5hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMChj4ubh)}(h **Return**h]j%)}(hjb5h]hReturn}(hjd5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`5ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMGhj4ubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hjx5hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMHhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5drm_atomic_helper_connector_hdmi_hotplug (C function)*c.drm_atomic_helper_connector_hdmi_hotplughNtauh1jxhj(hhhNhNubj)}(hhh](j)}(hqvoid drm_atomic_helper_connector_hdmi_hotplug (struct drm_connector *connector, enum drm_connector_status status)h]j)}(hpvoid drm_atomic_helper_connector_hdmi_hotplug(struct drm_connector *connector, enum drm_connector_status status)h](j)}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5hhhj5hMubj)}(h(drm_atomic_helper_connector_hdmi_hotplugh]j)}(h(drm_atomic_helper_connector_hdmi_hotplugh]h(drm_atomic_helper_connector_hdmi_hotplug}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj5hhhj5hMubj)}(hC(struct drm_connector *connector, enum drm_connector_status status)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj6modnameN classnameNjj)}j]j)}jj5sb*c.drm_atomic_helper_connector_hdmi_hotplugasbuh1hhj5ubj)}(h h]h }(hj"6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj+)}(hj9h]h*}(hj06hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj5ubj)}(h connectorh]h connector}(hj=6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubj)}(h enum drm_connector_status statush](j)}(hj8h]henum}(hjV6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjR6ubj)}(h h]h }(hjc6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjR6ubh)}(hhh]j)}(hdrm_connector_statush]hdrm_connector_status}(hjt6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjv6modnameN classnameNjj)}j]j6*c.drm_atomic_helper_connector_hdmi_hotplugasbuh1hhjR6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjR6ubj)}(hstatush]hstatus}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjR6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubeh}(h]h ]h"]h$]h&]jjuh1jhj5hhhj5hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj5hhhj5hMubah}(h]j5ah ](jjeh"]h$]h&]jj)jhuh1jhj5hMhj5hhubj)}(hhh]h)}(h/Handle the hotplug event for the HDMI connectorh]h/Handle the hotplug event for the HDMI connector}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj6hhubah}(h]h ]h"]h$]h&]uh1jhj5hhhj5hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj6jj6jjjuh1jhhhj(hNhNubj)}(hX **Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector ``enum drm_connector_status status`` Connection status **Description** This function should be called as a part of the .detect() / .detect_ctx() callbacks for all status changes.h](h)}(h**Parameters**h]j%)}(hj6h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj6ubji)}(hhh](jn)}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj 7h]hstruct drm_connector *connector}(hj 7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj 7ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj7ubj)}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj$7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 7hMhj!7ubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jmhj 7hMhj7ubjn)}(h7``enum drm_connector_status status`` Connection status h](jt)}(h$``enum drm_connector_status status``h]jz)}(hjD7h]h enum drm_connector_status status}(hjF7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjB7ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj>7ubj)}(hhh]h)}(hConnection statush]hConnection status}(hj]7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjY7hMhjZ7ubah}(h]h ]h"]h$]h&]uh1jhj>7ubeh}(h]h ]h"]h$]h&]uh1jmhjY7hMhj7ubeh}(h]h ]h"]h$]h&]uh1jhhj6ubh)}(h**Description**h]j%)}(hj7h]h Description}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}7ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj6ubh)}(hkThis function should be called as a part of the .detect() / .detect_ctx() callbacks for all status changes.h]hkThis function should be called as a part of the .detect() / .detect_ctx() callbacks for all status changes.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj6ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_atomic_helper_connector_hdmi_force (C function)(c.drm_atomic_helper_connector_hdmi_forcehNtauh1jxhj(hhhNhNubj)}(hhh](j)}(hMvoid drm_atomic_helper_connector_hdmi_force (struct drm_connector *connector)h]j)}(hLvoid drm_atomic_helper_connector_hdmi_force(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhj7hMubj)}(h&drm_atomic_helper_connector_hdmi_forceh]j)}(h&drm_atomic_helper_connector_hdmi_forceh]h&drm_atomic_helper_connector_hdmi_force}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj7hhhj7hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!8modnameN classnameNjj)}j]j)}jj7sb(c.drm_atomic_helper_connector_hdmi_forceasbuh1hhj7ubj)}(h h]h }(hj?8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj+)}(hj9h]h*}(hjM8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj7ubj)}(h connectorh]h connector}(hjZ8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7ubah}(h]h ]h"]h$]h&]jjuh1jhj7hhhj7hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj7hhhj7hMubah}(h]j7ah ](jjeh"]h$]h&]jj)jhuh1jhj7hMhj7hhubj)}(hhh]h)}(h3HDMI Connector implementation of the force callbackh]h3HDMI Connector implementation of the force callback}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj8hhubah}(h]h ]h"]h$]h&]uh1jhj7hhhj7hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj8jj8jjjuh1jhhhj(hNhNubj)}(hXS**Parameters** ``struct drm_connector *connector`` A pointer to the HDMI connector **Description** This function implements the .force() callback for the HDMI connectors. It can either be used directly as the callback or should be called from within the .force() callback implementation to maintain the HDMI-specific connector's data.h](h)}(h**Parameters**h]j%)}(hj8h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj8ubji)}(hhh]jn)}(hD``struct drm_connector *connector`` A pointer to the HDMI connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj8h]hstruct drm_connector *connector}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jsht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj8ubj)}(hhh]h)}(hA pointer to the HDMI connectorh]hA pointer to the HDMI connector}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jmhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1jhhj8ubh)}(h**Description**h]j%)}(hj9h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj8ubh)}(hThis function implements the .force() callback for the HDMI connectors. It can either be used directly as the callback or should be called from within the .force() callback implementation to maintain the HDMI-specific connector's data.h]hThis function implements the .force() callback for the HDMI connectors. It can either be used directly as the callback or should be called from within the .force() callback implementation to maintain the HDMI-specific connector’s data.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hht/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:260: ./drivers/gpu/drm/display/drm_hdmi_state_helper.chMhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj(hhhNhNubeh}(h]functions-referenceah ]h"]h$]functions referenceah&]uh1hhj 'hhhhhMjy;Kubeh}(h]hdmi-atomic-state-helpersah ]h"]hdmi atomic state helpersah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hHDCP Helper Functions Referenceh]hHDCP Helper Functions Reference}(hj?9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<9hhhhhMubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_hdcp_check_ksvs_revoked (C function)c.drm_hdcp_check_ksvs_revokedhNtauh1jxhj<9hhhNhNubj)}(hhh](j)}(hUint drm_hdcp_check_ksvs_revoked (struct drm_device *drm_dev, u8 *ksvs, u32 ksv_count)h]j)}(hTint drm_hdcp_check_ksvs_revoked(struct drm_device *drm_dev, u8 *ksvs, u32 ksv_count)h](j)}(hinth]hint}(hjf9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjb9hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMubj)}(h h]h }(hju9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjb9hhhjt9hMubj)}(hdrm_hdcp_check_ksvs_revokedh]j)}(hdrm_hdcp_check_ksvs_revokedh]hdrm_hdcp_check_ksvs_revoked}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjb9hhhjt9hMubj)}(h5(struct drm_device *drm_dev, u8 *ksvs, u32 ksv_count)h](j)}(hstruct drm_device *drm_devh](j)}(hjh]hstruct}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9modnameN classnameNjj)}j]j)}jj9sbc.drm_hdcp_check_ksvs_revokedasbuh1hhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj+)}(hj9h]h*}(hj9hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj9ubj)}(hdrm_devh]hdrm_dev}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9ubj)}(hu8 *ksvsh](h)}(hhh]j)}(hu8h]hu8}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj:modnameN classnameNjj)}j]j9c.drm_hdcp_check_ksvs_revokedasbuh1hhj:ubj)}(h h]h }(hj6:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj+)}(hj9h]h*}(hjD:hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:ubj)}(hksvsh]hksvs}(hjQ:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9ubj)}(h u32 ksv_counth](h)}(hhh]j)}(hu32h]hu32}(hjm:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjo:modnameN classnameNjj)}j]j9c.drm_hdcp_check_ksvs_revokedasbuh1hhjf:ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf:ubj)}(h ksv_counth]h ksv_count}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjf:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9ubeh}(h]h ]h"]h$]h&]jjuh1jhjb9hhhjt9hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj^9hhhjt9hMubah}(h]jY9ah ](jjeh"]h$]h&]jj)jhuh1jhjt9hMhj[9hhubj)}(hhh]h)}(h#Check the revoked status of the IDsh]h#Check the revoked status of the IDs}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:hhubah}(h]h ]h"]h$]h&]uh1jhj[9hhhjt9hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhj<9hNhNubj)}(hXq**Parameters** ``struct drm_device *drm_dev`` drm_device for which HDCP revocation check is requested ``u8 *ksvs`` List of KSVs (HDCP receiver IDs) ``u32 ksv_count`` KSV count passed in through **ksvs** **Description** This function reads the HDCP System renewability Message(SRM Table) from userspace as a firmware and parses it for the revoked HDCP KSVs(Receiver IDs) detected by DCP LLC. Once the revoked KSVs are known, revoked state of the KSVs in the list passed in by display drivers are decided and response is sent. SRM should be presented in the name of "display_hdcp_srm.bin". Format of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdf **Return** Count of the revoked KSVs or -ve error number in case of the failure.h](h)}(h**Parameters**h]j%)}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:ubji)}(hhh](jn)}(hW``struct drm_device *drm_dev`` drm_device for which HDCP revocation check is requested h](jt)}(h``struct drm_device *drm_dev``h]jz)}(hj;h]hstruct drm_device *drm_dev}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:ubj)}(hhh]h)}(h7drm_device for which HDCP revocation check is requestedh]h7drm_device for which HDCP revocation check is requested}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhj;hMhj:ubjn)}(h.``u8 *ksvs`` List of KSVs (HDCP receiver IDs) h](jt)}(h ``u8 *ksvs``h]jz)}(hj=;h]hu8 *ksvs}(hj?;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;;ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj7;ubj)}(hhh]h)}(h List of KSVs (HDCP receiver IDs)h]h List of KSVs (HDCP receiver IDs)}(hjV;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjR;hMhjS;ubah}(h]h ]h"]h$]h&]uh1jhj7;ubeh}(h]h ]h"]h$]h&]uh1jmhjR;hMhj:ubjn)}(h7``u32 ksv_count`` KSV count passed in through **ksvs** h](jt)}(h``u32 ksv_count``h]jz)}(hjv;h]h u32 ksv_count}(hjx;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjt;ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjp;ubj)}(hhh]h)}(h$KSV count passed in through **ksvs**h](hKSV count passed in through }(hj;hhhNhNubj%)}(h**ksvs**h]hksvs}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubeh}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1jhjp;ubeh}(h]h ]h"]h$]h&]uh1jmhj;hMhj:ubeh}(h]h ]h"]h$]h&]uh1jhhj:ubh)}(h**Description**h]j%)}(hj;h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chM hj:ubh)}(hX1This function reads the HDCP System renewability Message(SRM Table) from userspace as a firmware and parses it for the revoked HDCP KSVs(Receiver IDs) detected by DCP LLC. Once the revoked KSVs are known, revoked state of the KSVs in the list passed in by display drivers are decided and response is sent.h]hX1This function reads the HDCP System renewability Message(SRM Table) from userspace as a firmware and parses it for the revoked HDCP KSVs(Receiver IDs) detected by DCP LLC. Once the revoked KSVs are known, revoked state of the KSVs in the list passed in by display drivers are decided and response is sent.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:ubh)}(h>SRM should be presented in the name of "display_hdcp_srm.bin".h]hBSRM should be presented in the name of “display_hdcp_srm.bin”.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:ubh)}(hXFormat of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification https://www.digital-cp.com/sites/default/files/specifications/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdfh](hFormat of the SRM table, that userspace needs to write into the binary file, is defined at: 1. Renewability chapter on 55th page of HDCP 1.4 specification }(hj;hhhNhNubj')}(h=https://www.digital-cp.com/sites/default/files/specificationsh]h=https://www.digital-cp.com/sites/default/files/specifications}(hj;hhhNhNubah}(h]h ]h"]h$]h&]refurij;uh1j'hj;ubho/HDCP``20Specification````20Rev1_4_Secure``.pdf 2. Renewability chapter on 63rd page of HDCP 2.2 specification }(hj;hhhNhNubj')}(h=https://www.digital-cp.com/sites/default/files/specificationsh]h=https://www.digital-cp.com/sites/default/files/specifications}(hj<hhhNhNubah}(h]h ]h"]h$]h&]refurij<uh1j'hj;ubhA/HDCP``20on````20HDMI````20Specification````20Rev2_2_Final1``.pdf}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:ubh)}(h **Return**h]j%)}(hj*<h]hReturn}(hj,<hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(<ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:ubh)}(hECount of the revoked KSVs or -ve error number in case of the failure.h]hECount of the revoked KSVs or -ve error number in case of the failure.}(hj@<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j=drm_connector_attach_content_protection_property (C function)2c.drm_connector_attach_content_protection_propertyhNtauh1jxhj<9hhhNhNubj)}(hhh](j)}(hnint drm_connector_attach_content_protection_property (struct drm_connector *connector, bool hdcp_content_type)h]j)}(hmint drm_connector_attach_content_protection_property(struct drm_connector *connector, bool hdcp_content_type)h](j)}(hinth]hint}(hjo<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk<hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMFubj)}(h h]h }(hj~<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjk<hhhj}<hMFubj)}(h0drm_connector_attach_content_protection_propertyh]j)}(h0drm_connector_attach_content_protection_propertyh]h0drm_connector_attach_content_protection_property}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjk<hhhj}<hMFubj)}(h9(struct drm_connector *connector, bool hdcp_content_type)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j)}jj<sb2c.drm_connector_attach_content_protection_propertyasbuh1hhj<ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj+)}(hj9h]h*}(hj<hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj<ubj)}(h connectorh]h connector}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj<ubj)}(hbool hdcp_content_typeh](j)}(hjAh]hbool}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hj+=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(hhdcp_content_typeh]hhdcp_content_type}(hj9=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj<ubeh}(h]h ]h"]h$]h&]jjuh1jhjk<hhhj}<hMFubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjg<hhhj}<hMFubah}(h]jb<ah ](jjeh"]h$]h&]jj)jhuh1jhj}<hMFhjd<hhubj)}(hhh]h)}(h"attach content protection propertyh]h"attach content protection property}(hjc=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMFhj`=hhubah}(h]h ]h"]h$]h&]uh1jhjd<hhhj}<hMFubeh}(h]h ](jfunctioneh"]h$]h&]jjjj{=jj{=jjjuh1jhhhj<9hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` connector to attach CP property on. ``bool hdcp_content_type`` is HDCP Content Type property needed for connector **Description** This is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP. When hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector. This property is used for sending the protected content's stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel. Content type will be used during the HDCP 2.2 authentication. Content type will be set to :c:type:`drm_connector_state.hdcp_content_type `. The content protection will be set to :c:type:`drm_connector_state.content_protection ` When kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector. **Return** Zero on success, negative errno on failure.h](h)}(h**Parameters**h]j%)}(hj=h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMJhj=ubji)}(hhh](jn)}(hH``struct drm_connector *connector`` connector to attach CP property on. h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj=h]hstruct drm_connector *connector}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMIhj=ubj)}(hhh]h)}(h#connector to attach CP property on.h]h#connector to attach CP property on.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMIhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhj=hMIhj=ubjn)}(hN``bool hdcp_content_type`` is HDCP Content Type property needed for connector h](jt)}(h``bool hdcp_content_type``h]jz)}(hj=h]hbool hdcp_content_type}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMJhj=ubj)}(hhh]h)}(h2is HDCP Content Type property needed for connectorh]h2is HDCP Content Type property needed for connector}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMJhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhj=hMJhj=ubeh}(h]h ]h"]h$]h&]uh1jhhj=ubh)}(h**Description**h]j%)}(hj>h]h Description}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMLhj=ubh)}(hThis is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP.h]hThis is used to add support for content protection on select connectors. Content Protection is intentionally vague to allow for different underlying technologies, however it is most implemented by HDCP.}(hj.>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMKhj=ubh)}(hWhen hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector.h]hWhen hdcp_content_type is true enum property called HDCP Content Type is created (if it is not already) and attached to the connector.}(hj=>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMOhj=ubh)}(hThis property is used for sending the protected content's stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel.h]hThis property is used for sending the protected content’s stream type from userspace to kernel on selected connectors. Protected content provider will decide their type of their content and declare the same to kernel.}(hjL>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMRhj=ubh)}(hContent type will be used during the HDCP 2.2 authentication. Content type will be set to :c:type:`drm_connector_state.hdcp_content_type `.h](hZContent type will be used during the HDCP 2.2 authentication. Content type will be set to }(hj[>hhhNhNubh)}(hE:c:type:`drm_connector_state.hdcp_content_type `h]jz)}(hje>h]h%drm_connector_state.hdcp_content_type}(hjg>hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjc>ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMVhj[>ubh.}(hj[>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>hMVhj=ubh)}(hlThe content protection will be set to :c:type:`drm_connector_state.content_protection `h](h&The content protection will be set to }(hj>hhhNhNubh)}(hF:c:type:`drm_connector_state.content_protection `h]jz)}(hj>h]h&drm_connector_state.content_protection}(hj>hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jy6hj>ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_stateuh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMYhj>ubeh}(h]h ]h"]h$]h&]uh1hhj>hMYhj=ubh)}(hWhen kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector.h]hWhen kernel triggered content protection state change like DESIRED->ENABLED and ENABLED->DESIRED, will use drm_hdcp_update_content_protection() to update the content protection state of a connector.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chM[hj=ubh)}(h **Return**h]j%)}(hj>h]hReturn}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chM_hj=ubh)}(h+Zero on success, negative errno on failure.h]h+Zero on success, negative errno on failure.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chM`hj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_hdcp_update_content_protection (C function)$c.drm_hdcp_update_content_protectionhNtauh1jxhj<9hhhNhNubj)}(hhh](j)}(hRvoid drm_hdcp_update_content_protection (struct drm_connector *connector, u64 val)h]j)}(hQvoid drm_hdcp_update_content_protection(struct drm_connector *connector, u64 val)h](j)}(hvoidh]hvoid}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ?hhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMubj)}(h h]h }(hj ?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ?hhhj?hMubj)}(h"drm_hdcp_update_content_protectionh]j)}(h"drm_hdcp_update_content_protectionh]h"drm_hdcp_update_content_protection}(hj2?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.?ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj ?hhhj?hMubj)}(h*(struct drm_connector *connector, u64 val)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjN?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ?ubj)}(h h]h }(hj[?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ?ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjl?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjn?modnameN classnameNjj)}j]j)}jj4?sb$c.drm_hdcp_update_content_protectionasbuh1hhjJ?ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ?ubj+)}(hj9h]h*}(hj?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjJ?ubj)}(h connectorh]h connector}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJ?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjF?ubj)}(hu64 valh](h)}(hhh]j)}(hu64h]hu64}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]j?$c.drm_hdcp_update_content_protectionasbuh1hhj?ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj)}(hvalh]hval}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjF?ubeh}(h]h ]h"]h$]h&]jjuh1jhj ?hhhj?hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj ?hhhj?hMubah}(h]j?ah ](jjeh"]h$]h&]jj)jhuh1jhj?hMhj?hhubj)}(hhh]h)}(h3Updates the content protection state of a connectorh]h3Updates the content protection state of a connector}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj@hhubah}(h]h ]h"]h$]h&]uh1jhj?hhhj?hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj1@jj1@jjjuh1jhhhj<9hNhNubj)}(hXz**Parameters** ``struct drm_connector *connector`` drm_connector on which content protection state needs an update ``u64 val`` New state of the content protection property **Description** This function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector's state and generate an uevent to notify the userspace.h](h)}(h**Parameters**h]j%)}(hj;@h]h Parameters}(hj=@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9@ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj5@ubji)}(hhh](jn)}(hd``struct drm_connector *connector`` drm_connector on which content protection state needs an update h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjZ@h]hstruct drm_connector *connector}(hj\@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjX@ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhjT@ubj)}(hhh]h)}(h?drm_connector on which content protection state needs an updateh]h?drm_connector on which content protection state needs an update}(hjs@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjo@hMhjp@ubah}(h]h ]h"]h$]h&]uh1jhjT@ubeh}(h]h ]h"]h$]h&]uh1jmhjo@hMhjQ@ubjn)}(h9``u64 val`` New state of the content protection property h](jt)}(h ``u64 val``h]jz)}(hj@h]hu64 val}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj@ubj)}(hhh]h)}(h,New state of the content protection propertyh]h,New state of the content protection property}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhj@ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj@hMhjQ@ubeh}(h]h ]h"]h$]h&]uh1jhhj5@ubh)}(h**Description**h]j%)}(hj@h]h Description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj@ubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj5@ubh)}(hXThis function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector's state and generate an uevent to notify the userspace.h]hXThis function can be used by display drivers, to update the kernel triggered content protection state changes of a drm_connector such as DESIRED->ENABLED and ENABLED->DESIRED. No uevent for DESIRED->UNDESIRED or ENABLED->UNDESIRED, as userspace is triggering such state change and kernel performs it without fail.This function update the new state of the property into the connector’s state and generate an uevent to notify the userspace.}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:266: ./drivers/gpu/drm/display/drm_hdcp_helper.chMhj5@ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj<9hhhNhNubeh}(h]hdcp-helper-functions-referenceah ]h"]hdcp helper functions referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h'Display Port Helper Functions Referenceh]h'Display Port Helper Functions Reference}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhhhhhMubh)}(hThese functions contain some common logic and helpers at various abstraction levels to deal with Display Port sink devices and related things like DP aux channel transfers, EDID reading over DP aux channels, decoding certain DPCD blocks, ...h]hThese functions contain some common logic and helpers at various abstraction levels to deal with Display Port sink devices and related things like DP aux channel transfers, EDID reading over DP aux channels, decoding certain DPCD blocks, ...}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:272: ./drivers/gpu/drm/display/drm_dp_helper.chKDhjAhhubh)}(hThe DisplayPort AUX channel is an abstraction to allow generic, driver- independent access to AUX functionality. Drivers can take advantage of this by filling in the fields of the drm_dp_aux structure.h]hThe DisplayPort AUX channel is an abstraction to allow generic, driver- independent access to AUX functionality. Drivers can take advantage of this by filling in the fields of the drm_dp_aux structure.}(hj"AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:272: ./drivers/gpu/drm/display/drm_dp_helper.chMChjAhhubh)}(hTransactions are described using a hardware-independent drm_dp_aux_msg structure, which is passed into a driver's .transfer() implementation. Both native and I2C-over-AUX transactions are supported.h]hTransactions are described using a hardware-independent drm_dp_aux_msg structure, which is passed into a driver’s .transfer() implementation. Both native and I2C-over-AUX transactions are supported.}(hj1AhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:272: ./drivers/gpu/drm/display/drm_dp_helper.chMGhjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdp_sdp_header (C struct)c.dp_sdp_headerhNtauh1jxhjAhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhNubj)}(hhh](j)}(h dp_sdp_headerh]j)}(hstruct dp_sdp_headerh](j)}(hjh]hstruct}(hjZAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVAhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhKubj)}(h h]h }(hjhAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVAhhhjgAhKubj)}(h dp_sdp_headerh]j)}(hjTAh]h dp_sdp_header}(hjzAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvAubah}(h]h ](jjeh"]h$]h&]jjuh1jhjVAhhhjgAhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjRAhhhjgAhKubah}(h]jLAah ](jjeh"]h$]h&]jj)jhuh1jhjgAhKhjOAhhubj)}(hhh]h)}(hDP secondary data packet headerh]hDP secondary data packet header}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjAhhubah}(h]h ]h"]h$]h&]uh1jhjOAhhhjgAhKubeh}(h]h ](jstructeh"]h$]h&]jjjjAjjAjjjuh1jhhhjAhjNAhNubj)}(hX0**Definition**:: struct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; }; **Members** ``HB0`` Secondary Data Packet ID ``HB1`` Secondary Data Packet Type ``HB2`` Secondary Data Packet Specific header, Byte 0 ``HB3`` Secondary Data packet Specific header, Byte 1h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubh:}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjAubj@)}(hIstruct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; };h]hIstruct dp_sdp_header { u8 HB0; u8 HB1; u8 HB2; u8 HB3; };}hjAsbah}(h]h ]h"]h$]h&]jjuh1j?ha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjAubh)}(h **Members**h]j%)}(hjAh]hMembers}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjAubji)}(hhh](jn)}(h!``HB0`` Secondary Data Packet ID h](jt)}(h``HB0``h]jz)}(hj Bh]hHB0}(hj BhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjBubj)}(hhh]h)}(hSecondary Data Packet IDh]hSecondary Data Packet ID}(hj"BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jmhjBhMhjBubjn)}(h#``HB1`` Secondary Data Packet Type h](jt)}(h``HB1``h]jz)}(hjBBh]hHB1}(hjDBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@Bubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjFhMhjDubeh}(h]h ]h"]h$]h&]uh1jhhjDubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhjNAhNubh)}(h**Description**h]j%)}(hjlFh]h Description}(hjnFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjFubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjAhhubh)}(hThis enum is used to indicate DP VSC SDP Pixel encoding formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis enum is used to indicate DP VSC SDP Pixel encoding formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdp_colorimetry (C enum)c.dp_colorimetryhNtauh1jxhjAhhhjNAhNubj)}(hhh](j)}(hdp_colorimetryh]j)}(henum dp_colorimetryh](j)}(hj8h]henum}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhjFhMubj)}(hdp_colorimetryh]j)}(hjFh]hdp_colorimetry}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ](jjeh"]h$]h&]jjuh1jhjFhhhjFhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjFhhhjFhMubah}(h]jFah ](jjeh"]h$]h&]jj)jhuh1jhjFhMhjFhhubj)}(hhh]h)}(hdrm DP Colorimetry formatsh]hdrm DP Colorimetry formats}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjFhhubah}(h]h ]h"]h$]h&]uh1jhjFhhhjFhMubeh}(h]h ](jenumeh"]h$]h&]jjjjGjjGjjjuh1jhhhjAhjNAhNubj)}(hX **Constants** ``DP_COLORIMETRY_DEFAULT`` sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format ``DP_COLORIMETRY_RGB_WIDE_FIXED`` RGB wide gamut fixed point colorimetry format ``DP_COLORIMETRY_BT709_YCC`` ITU-R BT.709 colorimetry format ``DP_COLORIMETRY_RGB_WIDE_FLOAT`` RGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format ``DP_COLORIMETRY_XVYCC_601`` xvYCC601 colorimetry format ``DP_COLORIMETRY_OPRGB`` OpRGB colorimetry format ``DP_COLORIMETRY_XVYCC_709`` xvYCC709 colorimetry format ``DP_COLORIMETRY_DCI_P3_RGB`` DCI-P3 (SMPTE RP 431-2) colorimetry format ``DP_COLORIMETRY_SYCC_601`` sYCC601 colorimetry format ``DP_COLORIMETRY_RGB_CUSTOM`` RGB Custom Color Profile colorimetry format ``DP_COLORIMETRY_OPYCC_601`` opYCC601 colorimetry format ``DP_COLORIMETRY_BT2020_RGB`` ITU-R BT.2020 R' G' B' colorimetry format ``DP_COLORIMETRY_BT2020_CYCC`` ITU-R BT.2020 Y'c C'bc C'rc colorimetry format ``DP_COLORIMETRY_BT2020_YCC`` ITU-R BT.2020 Y' C'b C'r colorimetry formath](h)}(h **Constants**h]j%)}(hjGh]h Constants}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj Gubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjGubji)}(hhh](jn)}(hS``DP_COLORIMETRY_DEFAULT`` sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format h](jt)}(h``DP_COLORIMETRY_DEFAULT``h]jz)}(hj-Gh]hDP_COLORIMETRY_DEFAULT}(hj/GhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+Gubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhj'Gubj)}(hhh]h)}(h7sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry formath]h7sRGB (IEC 61966-2-1) or ITU-R BT.601 colorimetry format}(hjFGhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjCGubah}(h]h ]h"]h$]h&]uh1jhj'Gubeh}(h]h ]h"]h$]h&]uh1jmhjBGhMhj$Gubjn)}(hP``DP_COLORIMETRY_RGB_WIDE_FIXED`` RGB wide gamut fixed point colorimetry format h](jt)}(h!``DP_COLORIMETRY_RGB_WIDE_FIXED``h]jz)}(hjgGh]hDP_COLORIMETRY_RGB_WIDE_FIXED}(hjiGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjeGubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjaGubj)}(hhh]h)}(h-RGB wide gamut fixed point colorimetry formath]h-RGB wide gamut fixed point colorimetry format}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|GhMhj}Gubah}(h]h ]h"]h$]h&]uh1jhjaGubeh}(h]h ]h"]h$]h&]uh1jmhj|GhMhj$Gubjn)}(h=``DP_COLORIMETRY_BT709_YCC`` ITU-R BT.709 colorimetry format h](jt)}(h``DP_COLORIMETRY_BT709_YCC``h]jz)}(hjGh]hDP_COLORIMETRY_BT709_YCC}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM hjGubj)}(hhh]h)}(hITU-R BT.709 colorimetry formath]hITU-R BT.709 colorimetry format}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM hjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjGhM hj$Gubjn)}(hk``DP_COLORIMETRY_RGB_WIDE_FLOAT`` RGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format h](jt)}(h!``DP_COLORIMETRY_RGB_WIDE_FLOAT``h]jz)}(hjGh]hDP_COLORIMETRY_RGB_WIDE_FLOAT}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjGubj)}(hhh]h)}(hHRGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry formath]hHRGB wide gamut floating point (scRGB (IEC 61966-2-2)) colorimetry format}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjGubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjGhMhj$Gubjn)}(h9``DP_COLORIMETRY_XVYCC_601`` xvYCC601 colorimetry format h](jt)}(h``DP_COLORIMETRY_XVYCC_601``h]jz)}(hjHh]hDP_COLORIMETRY_XVYCC_601}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhj Hubj)}(hhh]h)}(hxvYCC601 colorimetry formath]hxvYCC601 colorimetry format}(hj,HhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(HhMhj)Hubah}(h]h ]h"]h$]h&]uh1jhj Hubeh}(h]h ]h"]h$]h&]uh1jmhj(HhMhj$Gubjn)}(h2``DP_COLORIMETRY_OPRGB`` OpRGB colorimetry format h](jt)}(h``DP_COLORIMETRY_OPRGB``h]jz)}(hjLHh]hDP_COLORIMETRY_OPRGB}(hjNHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJHubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjFHubj)}(hhh]h)}(hOpRGB colorimetry formath]hOpRGB colorimetry format}(hjeHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjaHhMhjbHubah}(h]h ]h"]h$]h&]uh1jhjFHubeh}(h]h ]h"]h$]h&]uh1jmhjaHhMhj$Gubjn)}(h9``DP_COLORIMETRY_XVYCC_709`` xvYCC709 colorimetry format h](jt)}(h``DP_COLORIMETRY_XVYCC_709``h]jz)}(hjHh]hDP_COLORIMETRY_XVYCC_709}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjHubj)}(hhh]h)}(hxvYCC709 colorimetry formath]hxvYCC709 colorimetry format}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjHubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjHhMhj$Gubjn)}(hI``DP_COLORIMETRY_DCI_P3_RGB`` DCI-P3 (SMPTE RP 431-2) colorimetry format h](jt)}(h``DP_COLORIMETRY_DCI_P3_RGB``h]jz)}(hjHh]hDP_COLORIMETRY_DCI_P3_RGB}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjHubj)}(hhh]h)}(h*DCI-P3 (SMPTE RP 431-2) colorimetry formath]h*DCI-P3 (SMPTE RP 431-2) colorimetry format}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjHubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjHhMhj$Gubjn)}(h7``DP_COLORIMETRY_SYCC_601`` sYCC601 colorimetry format h](jt)}(h``DP_COLORIMETRY_SYCC_601``h]jz)}(hjHh]hDP_COLORIMETRY_SYCC_601}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjHubj)}(hhh]h)}(hsYCC601 colorimetry formath]hsYCC601 colorimetry format}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj IhMhj Iubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhj IhMhj$Gubjn)}(hJ``DP_COLORIMETRY_RGB_CUSTOM`` RGB Custom Color Profile colorimetry format h](jt)}(h``DP_COLORIMETRY_RGB_CUSTOM``h]jz)}(hj0Ih]hDP_COLORIMETRY_RGB_CUSTOM}(hj2IhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.Iubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM!hj*Iubj)}(hhh]h)}(h+RGB Custom Color Profile colorimetry formath]h+RGB Custom Color Profile colorimetry format}(hjIIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEIhM!hjFIubah}(h]h ]h"]h$]h&]uh1jhj*Iubeh}(h]h ]h"]h$]h&]uh1jmhjEIhM!hj$Gubjn)}(h9``DP_COLORIMETRY_OPYCC_601`` opYCC601 colorimetry format h](jt)}(h``DP_COLORIMETRY_OPYCC_601``h]jz)}(hjiIh]hDP_COLORIMETRY_OPYCC_601}(hjkIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgIubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM$hjcIubj)}(hhh]h)}(hopYCC601 colorimetry formath]hopYCC601 colorimetry format}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~IhM$hjIubah}(h]h ]h"]h$]h&]uh1jhjcIubeh}(h]h ]h"]h$]h&]uh1jmhj~IhM$hj$Gubjn)}(hH``DP_COLORIMETRY_BT2020_RGB`` ITU-R BT.2020 R' G' B' colorimetry format h](jt)}(h``DP_COLORIMETRY_BT2020_RGB``h]jz)}(hjIh]hDP_COLORIMETRY_BT2020_RGB}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM'hjIubj)}(hhh]h)}(h)ITU-R BT.2020 R' G' B' colorimetry formath]h/ITU-R BT.2020 R’ G’ B’ colorimetry format}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhM'hjIubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjIhM'hj$Gubjn)}(hN``DP_COLORIMETRY_BT2020_CYCC`` ITU-R BT.2020 Y'c C'bc C'rc colorimetry format h](jt)}(h``DP_COLORIMETRY_BT2020_CYCC``h]jz)}(hjIh]hDP_COLORIMETRY_BT2020_CYCC}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM*hjIubj)}(hhh]h)}(h.ITU-R BT.2020 Y'c C'bc C'rc colorimetry formath]h4ITU-R BT.2020 Y’c C’bc C’rc colorimetry format}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhM*hjIubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjIhM*hj$Gubjn)}(hI``DP_COLORIMETRY_BT2020_YCC`` ITU-R BT.2020 Y' C'b C'r colorimetry formath](jt)}(h``DP_COLORIMETRY_BT2020_YCC``h]jz)}(hjJh]hDP_COLORIMETRY_BT2020_YCC}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM,hjJubj)}(hhh]h)}(h+ITU-R BT.2020 Y' C'b C'r colorimetry formath]h1ITU-R BT.2020 Y’ C’b C’r colorimetry format}(hj-JhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM-hj*Jubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhj)JhM,hj$Gubeh}(h]h ]h"]h$]h&]uh1jhhjGubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhjNAhNubh)}(h**Description**h]j%)}(hjWJh]h Description}(hjYJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUJubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM/hjAhhubh)}(hThis enum is used to indicate DP VSC SDP Colorimetry formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] and a name of enum member follows enum drm_colorimetry definition.h]hThis enum is used to indicate DP VSC SDP Colorimetry formats. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] and a name of enum member follows enum drm_colorimetry definition.}(hjmJhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMhjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdp_dynamic_range (C enum)c.dp_dynamic_rangehNtauh1jxhjAhhhjNAhNubj)}(hhh](j)}(hdp_dynamic_rangeh]j)}(henum dp_dynamic_rangeh](j)}(hj8h]henum}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhjJhMubj)}(hdp_dynamic_rangeh]j)}(hjJh]hdp_dynamic_range}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ](jjeh"]h$]h&]jjuh1jhjJhhhjJhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjJhhhjJhMubah}(h]jJah ](jjeh"]h$]h&]jj)jhuh1jhjJhMhjJhhubj)}(hhh]h)}(hdrm DP Dynamic Rangeh]hdrm DP Dynamic Range}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM&hjJhhubah}(h]h ]h"]h$]h&]uh1jhjJhhhjJhMubeh}(h]h ](jenumeh"]h$]h&]jjjjJjjJjjjuh1jhhhjAhjNAhNubj)}(h[**Constants** ``DP_DYNAMIC_RANGE_VESA`` VESA range ``DP_DYNAMIC_RANGE_CTA`` CTA rangeh](h)}(h **Constants**h]j%)}(hjJh]h Constants}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM*hjJubji)}(hhh](jn)}(h%``DP_DYNAMIC_RANGE_VESA`` VESA range h](jt)}(h``DP_DYNAMIC_RANGE_VESA``h]jz)}(hjKh]hDP_DYNAMIC_RANGE_VESA}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM-hjKubj)}(hhh]h)}(h VESA rangeh]h VESA range}(hj1KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-KhM-hj.Kubah}(h]h ]h"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]uh1jmhj-KhM-hjKubjn)}(h"``DP_DYNAMIC_RANGE_CTA`` CTA rangeh](jt)}(h``DP_DYNAMIC_RANGE_CTA``h]jz)}(hjQKh]hDP_DYNAMIC_RANGE_CTA}(hjSKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOKubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM/hjKKubj)}(hhh]h)}(h CTA rangeh]h CTA range}(hjjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM0hjgKubah}(h]h ]h"]h$]h&]uh1jhjKKubeh}(h]h ]h"]h$]h&]uh1jmhjfKhM/hjKubeh}(h]h ]h"]h$]h&]uh1jhhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhjNAhNubh)}(h**Description**h]j%)}(hjKh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM2hjAhhubh)}(hThis enum is used to indicate DP VSC SDP Dynamic Range. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis enum is used to indicate DP VSC SDP Dynamic Range. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM'hjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdp_content_type (C enum)c.dp_content_typehNtauh1jxhjAhhhjNAhNubj)}(hhh](j)}(hdp_content_typeh]j)}(henum dp_content_typeh](j)}(hj8h]henum}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM.ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKhhhjKhM.ubj)}(hdp_content_typeh]j)}(hjKh]hdp_content_type}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubah}(h]h ](jjeh"]h$]h&]jjuh1jhjKhhhjKhM.ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjKhhhjKhM.ubah}(h]jKah ](jjeh"]h$]h&]jj)jhuh1jhjKhM.hjKhhubj)}(hhh]h)}(hdrm DP Content Typeh]hdrm DP Content Type}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM5hjLhhubah}(h]h ]h"]h$]h&]uh1jhjKhhhjKhM.ubeh}(h]h ](jenumeh"]h$]h&]jjjj,Ljj,Ljjjuh1jhhhjAhjNAhNubj)}(h**Constants** ``DP_CONTENT_TYPE_NOT_DEFINED`` Not defined type ``DP_CONTENT_TYPE_GRAPHICS`` Graphics type ``DP_CONTENT_TYPE_PHOTO`` Photo type ``DP_CONTENT_TYPE_VIDEO`` Video type ``DP_CONTENT_TYPE_GAME`` Game typeh](h)}(h **Constants**h]j%)}(hj6Lh]h Constants}(hj8LhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4Lubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM9hj0Lubji)}(hhh](jn)}(h1``DP_CONTENT_TYPE_NOT_DEFINED`` Not defined type h](jt)}(h``DP_CONTENT_TYPE_NOT_DEFINED``h]jz)}(hjULh]hDP_CONTENT_TYPE_NOT_DEFINED}(hjWLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjSLubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM<hjOLubj)}(hhh]h)}(hNot defined typeh]hNot defined type}(hjnLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjLhM<hjkLubah}(h]h ]h"]h$]h&]uh1jhjOLubeh}(h]h ]h"]h$]h&]uh1jmhjjLhM<hjLLubjn)}(h+``DP_CONTENT_TYPE_GRAPHICS`` Graphics type h](jt)}(h``DP_CONTENT_TYPE_GRAPHICS``h]jz)}(hjLh]hDP_CONTENT_TYPE_GRAPHICS}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM?hjLubj)}(hhh]h)}(h Graphics typeh]h Graphics type}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhM?hjLubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhjLhM?hjLLubjn)}(h%``DP_CONTENT_TYPE_PHOTO`` Photo type h](jt)}(h``DP_CONTENT_TYPE_PHOTO``h]jz)}(hjLh]hDP_CONTENT_TYPE_PHOTO}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMBhjLubj)}(hhh]h)}(h Photo typeh]h Photo type}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhMBhjLubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhjLhMBhjLLubjn)}(h%``DP_CONTENT_TYPE_VIDEO`` Video type h](jt)}(h``DP_CONTENT_TYPE_VIDEO``h]jz)}(hjMh]hDP_CONTENT_TYPE_VIDEO}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMEhjLubj)}(hhh]h)}(h Video typeh]h Video type}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhMEhjMubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhjMhMEhjLLubjn)}(h"``DP_CONTENT_TYPE_GAME`` Game typeh](jt)}(h``DP_CONTENT_TYPE_GAME``h]jz)}(hj9Mh]hDP_CONTENT_TYPE_GAME}(hj;MhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7Mubah}(h]h ]h"]h$]h&]uh1jsha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMGhj3Mubj)}(hhh]h)}(h Game typeh]h Game type}(hjRMhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMHhjOMubah}(h]h ]h"]h$]h&]uh1jhj3Mubeh}(h]h ]h"]h$]h&]uh1jmhjNMhMGhjLLubeh}(h]h ]h"]h$]h&]uh1jhhj0Lubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhjNAhNubh)}(h**Description**h]j%)}(hj|Mh]h Description}(hj~MhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzMubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhMJhjAhhubh)}(hThis enum is used to indicate DP VSC SDP Content Types. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] CTA-861-G defines content types and expected processing by a sink deviceh]hThis enum is used to indicate DP VSC SDP Content Types. It is based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] CTA-861-G defines content types and expected processing by a sink device}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hha/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:275: ./include/drm/display/drm_dp.hhM6hjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_vsc_sdp (C struct)c.drm_dp_vsc_sdphNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hdrm_dp_vsc_sdph]j)}(hstruct drm_dp_vsc_sdph](j)}(hjh]hstruct}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMhhhjMhKubj)}(hdrm_dp_vsc_sdph]j)}(hjMh]hdrm_dp_vsc_sdp}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ](jjeh"]h$]h&]jjuh1jhjMhhhjMhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjMhhhjMhKubah}(h]jMah ](jjeh"]h$]h&]jj)jhuh1jhjMhKhjMhhubj)}(hhh]h)}(hdrm DP VSC SDPh]hdrm DP VSC SDP}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKLhjMhhubah}(h]h ]h"]h$]h&]uh1jhjMhhhjMhKubeh}(h]h ](jstructeh"]h$]h&]jjjjNjjNjjjuh1jhhhjAhNhNubj)}(hX**Definition**:: struct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; }; **Members** ``sdp_type`` secondary-data packet type ``revision`` revision number ``length`` number of valid data bytes ``pixelformat`` pixel encoding format ``colorimetry`` colorimetry format ``bpc`` bit per color ``dynamic_range`` dynamic range information ``content_type`` CTA-861-G defines content types and expected processing by a sink deviceh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj NhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubh:}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKPhjNubj@)}(hXstruct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; };h]hXstruct drm_dp_vsc_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; enum dp_pixelformat pixelformat; enum dp_colorimetry colorimetry; int bpc; enum dp_dynamic_range dynamic_range; enum dp_content_type content_type; };}hj9Nsbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKRhjNubh)}(h **Members**h]j%)}(hjJNh]hMembers}(hjLNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhK]hjNubji)}(hhh](jn)}(h(``sdp_type`` secondary-data packet type h](jt)}(h ``sdp_type``h]jz)}(hjiNh]hsdp_type}(hjkNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgNubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKShjcNubj)}(hhh]h)}(hsecondary-data packet typeh]hsecondary-data packet type}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~NhKShjNubah}(h]h ]h"]h$]h&]uh1jhjcNubeh}(h]h ]h"]h$]h&]uh1jmhj~NhKShj`Nubjn)}(h``revision`` revision number h](jt)}(h ``revision``h]jz)}(hjNh]hrevision}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKThjNubj)}(hhh]h)}(hrevision numberh]hrevision number}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKThjNubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjNhKThj`Nubjn)}(h&``length`` number of valid data bytes h](jt)}(h ``length``h]jz)}(hjNh]hlength}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKUhjNubj)}(hhh]h)}(hnumber of valid data bytesh]hnumber of valid data bytes}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhKUhjNubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjNhKUhj`Nubjn)}(h&``pixelformat`` pixel encoding format h](jt)}(h``pixelformat``h]jz)}(hjOh]h pixelformat}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKVhjOubj)}(hhh]h)}(hpixel encoding formath]hpixel encoding format}(hj-OhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)OhKVhj*Oubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhj)OhKVhj`Nubjn)}(h#``colorimetry`` colorimetry format h](jt)}(h``colorimetry``h]jz)}(hjMOh]h colorimetry}(hjOOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKOubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKWhjGOubj)}(hhh]h)}(hcolorimetry formath]hcolorimetry format}(hjfOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbOhKWhjcOubah}(h]h ]h"]h$]h&]uh1jhjGOubeh}(h]h ]h"]h$]h&]uh1jmhjbOhKWhj`Nubjn)}(h``bpc`` bit per color h](jt)}(h``bpc``h]jz)}(hjOh]hbpc}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKXhjOubj)}(hhh]h)}(h bit per colorh]h bit per color}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKXhjOubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhjOhKXhj`Nubjn)}(h,``dynamic_range`` dynamic range information h](jt)}(h``dynamic_range``h]jz)}(hjOh]h dynamic_range}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKYhjOubj)}(hhh]h)}(hdynamic range informationh]hdynamic range information}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKYhjOubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhjOhKYhj`Nubjn)}(hY``content_type`` CTA-861-G defines content types and expected processing by a sink deviceh](jt)}(h``content_type``h]jz)}(hjOh]h content_type}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKYhjOubj)}(hhh]h)}(hHCTA-861-G defines content types and expected processing by a sink deviceh]hHCTA-861-G defines content types and expected processing by a sink device}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKZhjPubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhj PhKYhj`Nubeh}(h]h ]h"]h$]h&]uh1jhhjNubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubh)}(h**Description**h]j%)}(hj;Ph]h Description}(hj=PhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9Pubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhK]hjAhhubh)}(hThis structure represents a DP VSC SDP of drm It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]h]hThis structure represents a DP VSC SDP of drm It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and [Table 2-117: VSC SDP Payload for DB16 through DB18]}(hjQPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKMhjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_as_sdp (C struct)c.drm_dp_as_sdphNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h drm_dp_as_sdph]j)}(hstruct drm_dp_as_sdph](j)}(hjh]hstruct}(hjyPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuPhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.huhKTubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuPhhhjPhKTubj)}(h drm_dp_as_sdph]j)}(hjsPh]h drm_dp_as_sdp}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ](jjeh"]h$]h&]jjuh1jhjuPhhhjPhKTubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjqPhhhjPhKTubah}(h]jlPah ](jjeh"]h$]h&]jj)jhuh1jhjPhKThjnPhhubj)}(hhh]h)}(hdrm DP Adaptive Sync SDPh]hdrm DP Adaptive Sync SDP}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKghjPhhubah}(h]h ]h"]h$]h&]uh1jhjnPhhhjPhKTubeh}(h]h ](jstructeh"]h$]h&]jjjjPjjPjjjuh1jhhhjAhNhNubj)}(hX**Definition**:: struct drm_dp_as_sdp { unsigned char sdp_type; unsigned char revision; unsigned char length; int vtotal; int target_rr; int duration_incr_ms; int duration_decr_ms; bool target_rr_divider; enum operation_mode mode; }; **Members** ``sdp_type`` Secondary-data packet type ``revision`` Revision Number ``length`` Number of valid data bytes ``vtotal`` Minimum Vertical Vtotal ``target_rr`` Target Refresh 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]h"]h$]h&]uh1jmhjRhKuhjQubjn)}(h%``mode`` Adaptive Sync Operation Modeh](jt)}(h``mode``h]jz)}(hjRh]hmode}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKuhjRubj)}(hhh]h)}(hAdaptive Sync Operation Modeh]hAdaptive Sync Operation Mode}(hj ShhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKvhjSubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jmhjShKuhjQubeh}(h]h ]h"]h$]h&]uh1jhhjPubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubh)}(h**Description**h]j%)}(hj3Sh]h Description}(hj5ShhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1Subah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhKyhjAhhubh)}(hThis structure represents a DP AS SDP of drm It is based on DP 2.1 spec [Table 2-126: Adaptive-Sync SDP Header Bytes] and [Table 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./include/drm/display/drm_dp_helper.hhM*hjVubji)}(hhh]jn)}(hB``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]`` The DPCD to check h](jt)}(h/``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]``h]jz)}(hjVh]h+const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjVubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM'hjVubj)}(hhh]h)}(hThe DPCD to checkh]hThe DPCD to check}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhM'hjVubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjVhM'hjVubah}(h]h ]h"]h$]h&]uh1jhhjVubh)}(h**Description**h]j%)}(hj Wh]h Description}(hj WhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj Wubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM)hjVubh)}(hNote that currently this function will return ``false`` for panels which support various DPCD backlight features but which require the brightness be set through PWM, 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indicates that VESA backlight controls are supported, }(hjZWhhhNhNubjz)}(h ``false``h]hfalse}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZWubh otherwise}(hjZWhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM-hjVubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_is_uhbr_rate (C function)c.drm_dp_is_uhbr_ratehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h(bool drm_dp_is_uhbr_rate (int link_rate)h]j)}(h'bool drm_dp_is_uhbr_rate(int link_rate)h](j)}(hjAh]hbool}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM7ubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhjWhM7ubj)}(hdrm_dp_is_uhbr_rateh]j)}(hdrm_dp_is_uhbr_rateh]hdrm_dp_is_uhbr_rate}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ](jjeh"]h$]h&]jjuh1jhjWhhhjWhM7ubj)}(h(int link_rate)h]j)}(h int link_rateh](j)}(hinth]hint}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h link_rateh]h link_rate}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjWubah}(h]h ]h"]h$]h&]jjuh1jhjWhhhjWhM7ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjWhhhjWhM7ubah}(h]jWah ](jjeh"]h$]h&]jj)jhuh1jhjWhM7hjWhhubj)}(hhh]h)}(h Determine if a link rate is UHBRh]h Determine if a link rate is UHBR}(hj=XhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM7hj:Xhhubah}(h]h ]h"]h$]h&]uh1jhjWhhhjWhM7ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjUXjjUXjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``int link_rate`` link rate in 10kbits/s units **Description** Determine if the provided link rate is an UHBR rate. **Return** ``True`` if **link_rate** is an UHBR rate.h](h)}(h**Parameters**h]j%)}(hj_Xh]h Parameters}(hjaXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]Xubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM;hjYXubji)}(hhh]jn)}(h/``int link_rate`` link rate in 10kbits/s units h](jt)}(h``int link_rate``h]jz)}(hj~Xh]h int link_rate}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|Xubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM8hjxXubj)}(hhh]h)}(hlink rate in 10kbits/s unitsh]hlink rate in 10kbits/s units}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhM8hjXubah}(h]h ]h"]h$]h&]uh1jhjxXubeh}(h]h ]h"]h$]h&]uh1jmhjXhM8hjuXubah}(h]h ]h"]h$]h&]uh1jhhjYXubh)}(h**Description**h]j%)}(hjXh]h Description}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM:hjYXubh)}(h4Determine if the provided link rate is an UHBR rate.h]h4Determine if the provided link rate is an UHBR rate.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM9hjYXubh)}(h **Return**h]j%)}(hjXh]hReturn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM;hjYXubh)}(h*``True`` if **link_rate** is an UHBR rate.h](jz)}(h``True``h]hTrue}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXubh if }(hjXhhhNhNubj%)}(h **link_rate**h]h link_rate}(hj YhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubh is an UHBR rate.}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM<hjYXubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_aux_msg (C struct)c.drm_dp_aux_msghNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hdrm_dp_aux_msgh]j)}(hstruct drm_dp_aux_msgh](j)}(hjh]hstruct}(hjEYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAYhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMAubj)}(h h]h }(hjSYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAYhhhjRYhMAubj)}(hdrm_dp_aux_msgh]j)}(hj?Yh]hdrm_dp_aux_msg}(hjeYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaYubah}(h]h ](jjeh"]h$]h&]jjuh1jhjAYhhhjRYhMAubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj=YhhhjRYhMAubah}(h]j8Yah ](jjeh"]h$]h&]jj)jhuh1jhjRYhMAhj:Yhhubj)}(hhh]h)}(h#DisplayPort AUX channel transactionh]h#DisplayPort AUX channel transaction}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMHhjYhhubah}(h]h ]h"]h$]h&]uh1jhj:YhhhjRYhMAubeh}(h]h ](jstructeh"]h$]h&]jjjjYjjYjjjuh1jhhhjAhNhNubj)}(hX**Definition**:: struct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; }; **Members** ``address`` address of the (first) register to access ``request`` contains the type of transaction (see DP_AUX_* macros) ``reply`` upon completion, contains the reply type of the transaction ``buffer`` pointer to a transmission or reception buffer ``size`` size of **buffer**h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubh:}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMLhjYubj@)}(hustruct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; };h]hustruct drm_dp_aux_msg { unsigned int address; u8 request; u8 reply; void *buffer; size_t size; };}hjYsbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMNhjYubh)}(h **Members**h]j%)}(hjYh]hMembers}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMVhjYubji)}(hhh](jn)}(h6``address`` address of the (first) register to access h](jt)}(h ``address``h]jz)}(hjYh]haddress}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMJhjYubj)}(hhh]h)}(h)address of the (first) register to accessh]h)address of the (first) register to access}(hj ZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ZhMJhj Zubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jmhj ZhMJhjYubjn)}(hC``request`` contains the type of transaction (see DP_AUX_* macros) h](jt)}(h ``request``h]jz)}(hj-Zh]hrequest}(hj/ZhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+Zubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMKhj'Zubj)}(hhh]h)}(h6contains the type of transaction (see DP_AUX_* macros)h]h6contains the type of transaction (see DP_AUX_* macros)}(hjFZhhhNhNubah}(h]h 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]jah"]h$]h&]uh1jhj<[hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMTubj)}(h h]h }(hjN[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<[hhhjM[hMTubj)}(hdrm_dp_aux_cech]j)}(hj:[h]hdrm_dp_aux_cec}(hj`[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\[ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj<[hhhjM[hMTubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj8[hhhjM[hMTubah}(h]j3[ah ](jjeh"]h$]h&]jj)jhuh1jhjM[hMThj5[hhubj)}(hhh]h)}(h"DisplayPort CEC-Tunneling-over-AUXh]h"DisplayPort CEC-Tunneling-over-AUX}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM\hj[hhubah}(h]h ]h"]h$]h&]uh1jhj5[hhhjM[hMTubeh}(h]h ](jstructeh"]h$]h&]jjjj[jj[jjjuh1jhhhjAhNhNubj)}(hX**Definition**:: struct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; }; **Members** ``lock`` mutex protecting this struct ``adap`` the CEC adapter for CEC-Tunneling-over-AUX support. ``connector`` the connector this CEC adapter is associated with ``unregister_work`` unregister the CEC adapterh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubh:}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM`hj[ubj@)}(hstruct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; };h]hstruct drm_dp_aux_cec { struct mutex lock; struct cec_adapter *adap; struct drm_connector *connector; struct delayed_work unregister_work; };}hj[sbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMbhj[ubh)}(h **Members**h]j%)}(hj[h]hMembers}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMihj[ubji)}(hhh](jn)}(h&``lock`` mutex protecting this struct h](jt)}(h``lock``h]jz)}(hj[h]hlock}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM^hj[ubj)}(hhh]h)}(hmutex protecting this structh]hmutex protecting this struct}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hM^hj\ubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhj\hM^hj[ubjn)}(h=``adap`` the CEC adapter for CEC-Tunneling-over-AUX support. h](jt)}(h``adap``h]jz)}(hj(\h]hadap}(hj*\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj&\ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM_hj"\ubj)}(hhh]h)}(h3the CEC adapter for CEC-Tunneling-over-AUX support.h]h3the CEC adapter for CEC-Tunneling-over-AUX support.}(hjA\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=\hM_hj>\ubah}(h]h ]h"]h$]h&]uh1jhj"\ubeh}(h]h ]h"]h$]h&]uh1jmhj=\hM_hj[ubjn)}(h@``connector`` the connector this CEC adapter is associated with h](jt)}(h ``connector``h]jz)}(hja\h]h connector}(hjc\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_\ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM`hj[\ubj)}(hhh]h)}(h1the connector this CEC adapter is associated withh]h1the connector this CEC adapter is associated with}(hjz\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjv\hM`hjw\ubah}(h]h ]h"]h$]h&]uh1jhj[\ubeh}(h]h ]h"]h$]h&]uh1jmhjv\hM`hj[ubjn)}(h.``unregister_work`` unregister the CEC adapterh](jt)}(h``unregister_work``h]jz)}(hj\h]hunregister_work}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM`hj\ubj)}(hhh]h)}(hunregister the CEC adapterh]hunregister the CEC adapter}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMahj\ubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jmhj\hM`hj[ubeh}(h]h ]h"]h$]h&]uh1jhhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_aux (C struct) c.drm_dp_auxhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h drm_dp_auxh]j)}(hstruct drm_dp_auxh](j)}(hjh]hstruct}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMgubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhj]hMgubj)}(h drm_dp_auxh]j)}(hj\h]h drm_dp_aux}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj\hhhj]hMgubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj\hhhj]hMgubah}(h]j\ah ](jjeh"]h$]h&]jj)jhuh1jhj]hMghj\hhubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj6]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMjhj3]hhubah}(h]h ]h"]h$]h&]uh1jhj\hhhj]hMgubeh}(h]h ](jstructeh"]h$]h&]jjjjN]jjN]jjjuh1jhhhjAhNhNubj)}(hXD**Definition**:: struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; }; **Members** ``name`` user-visible name of this AUX channel and the I2C-over-AUX adapter. It's also used to specify the name of the I2C adapter. If set to ``NULL``, dev_name() of **dev** will be used. ``ddc`` I2C adapter that can be used for I2C-over-AUX communication ``dev`` pointer to struct device that is the parent for this AUX channel. ``drm_dev`` pointer to the :c:type:`drm_device` that owns this AUX channel. Beware, this may be ``NULL`` before drm_dp_aux_register() has been called. It should be set to the :c:type:`drm_device` that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it's perfectly fine to set this field later so long as it's assigned before calling drm_dp_aux_register(). ``crtc`` backpointer to the crtc that is currently using this AUX channel ``hw_mutex`` internal mutex used for locking transfers. Note that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access. ``crc_work`` worker that captures CRCs for each frame ``crc_count`` counter of captured frame CRCs ``transfer`` transfers a message representing a single AUX transaction. This is a hardware-specific implementation of how transactions are executed that the drivers must provide. A pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure. Helpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure. The **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case. Also note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected: - If the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. - If we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. ``wait_hpd_asserted`` wait for HPD to be asserted This is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly. If a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated. This function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions. This function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log. The semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep. NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted. ``i2c_nack_count`` Counts I2C NACKs, used for DP validation. ``i2c_defer_count`` Counts I2C DEFERs, used for DP validation. ``cec`` struct containing fields used for CEC-Tunneling-over-AUX. ``is_remote`` Is this AUX CH actually using sideband messaging. ``powered_down`` If true then the remote endpoint is powered down. ``no_zero_sized`` If the hw can't use zero sized transfers (NVIDIA) ``dpcd_probe_disabled`` If probing before a DPCD access is disabled.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjZ]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjV]ubh:}(hjV]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMnhjR]ubj@)}(hX>struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; };h]hX>struct drm_dp_aux { const char *name; struct i2c_adapter ddc; struct device *dev; struct drm_device *drm_dev; struct drm_crtc *crtc; struct mutex hw_mutex; struct work_struct crc_work; u8 crc_count; ssize_t (*transfer)(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg); int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us); unsigned i2c_nack_count; unsigned i2c_defer_count; struct drm_dp_aux_cec cec; bool is_remote; bool powered_down; bool no_zero_sized; bool dpcd_probe_disabled; };}hjs]sbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMphjR]ubh)}(h **Members**h]j%)}(hj]h]hMembers}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjR]ubji)}(hhh](jn)}(h``name`` user-visible name of this AUX channel and the I2C-over-AUX adapter. It's also used to specify the name of the I2C adapter. If set to ``NULL``, dev_name() of **dev** will be used. h](jt)}(h``name``h]jz)}(hj]h]hname}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM}hj]ubj)}(hhh](h)}(hCuser-visible name of this AUX channel and the I2C-over-AUX adapter.h]hCuser-visible name of this AUX channel and the I2C-over-AUX adapter.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMyhj]ubh)}(hnIt's also used to specify the name of the I2C adapter. If set to ``NULL``, dev_name() of **dev** will be used.h](hCIt’s also used to specify the name of the I2C adapter. If set to }(hj]hhhNhNubjz)}(h``NULL``h]hNULL}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubh, dev_name() of }(hj]hhhNhNubj%)}(h**dev**h]hdev}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubh will be used.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM|hj]ubeh}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj]hM}hj]ubjn)}(hD``ddc`` I2C adapter that can be used for I2C-over-AUX communication h](jt)}(h``ddc``h]jz)}(hj^h]hddc}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj ^ubj)}(hhh]h)}(h;I2C adapter that can be used for I2C-over-AUX communicationh]h;I2C adapter that can be used for I2C-over-AUX communication}(hj)^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj&^ubah}(h]h ]h"]h$]h&]uh1jhj ^ubeh}(h]h ]h"]h$]h&]uh1jmhj%^hMhj]ubjn)}(hJ``dev`` pointer to struct device that is the parent for this AUX channel. h](jt)}(h``dev``h]jz)}(hjJ^h]hdev}(hjL^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjH^ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjD^ubj)}(hhh]h)}(hApointer to struct device that is the parent for this AUX channel.h]hApointer to struct device that is the parent for this AUX channel.}(hjc^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj`^ubah}(h]h ]h"]h$]h&]uh1jhjD^ubeh}(h]h ]h"]h$]h&]uh1jmhj_^hMhj]ubjn)}(hX``drm_dev`` pointer to the :c:type:`drm_device` that owns this AUX channel. Beware, this may be ``NULL`` before drm_dp_aux_register() has been called. It should be set to the :c:type:`drm_device` that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it's perfectly fine to set this field later so long as it's assigned before calling drm_dp_aux_register(). h](jt)}(h ``drm_dev``h]jz)}(hj^h]hdrm_dev}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj~^ubj)}(hhh](h)}(hpointer to the :c:type:`drm_device` that owns this AUX channel. Beware, this may be ``NULL`` before drm_dp_aux_register() has been called.h](hpointer to the }(hj^hhhNhNubh)}(h:c:type:`drm_device`h]jz)}(hj^h]h drm_device}(hj^hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj^ubh1 that owns this AUX channel. Beware, this may be }(hj^hhhNhNubjz)}(h``NULL``h]hNULL}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubh. before drm_dp_aux_register() has been called.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj^hMhj^ubh)}(hX It should be set to the :c:type:`drm_device` that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it's perfectly fine to set this field later so long as it's assigned before calling drm_dp_aux_register().h](hIt should be set to the }(hj^hhhNhNubh)}(h:c:type:`drm_device`h]jz)}(hj^h]h drm_device}(hj^hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj^ubh that will be using this AUX channel as early as possible. For many graphics drivers this should happen before drm_dp_aux_init(), however it’s perfectly fine to set this field later so long as it’s assigned before calling drm_dp_aux_register().}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_hMhj^ubeh}(h]h ]h"]h$]h&]uh1jhj~^ubeh}(h]h ]h"]h$]h&]uh1jmhj^hMhj]ubjn)}(hJ``crtc`` backpointer to the crtc that is currently using this AUX channel h](jt)}(h``crtc``h]jz)}(hj%_h]hcrtc}(hj'_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#_ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj_ubj)}(hhh]h)}(h@backpointer to the crtc that is currently using this AUX channelh]h@backpointer to the crtc that is currently using this AUX channel}(hj>_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj;_ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj:_hMhj]ubjn)}(h``hw_mutex`` internal mutex used for locking transfers. Note that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access. h](jt)}(h ``hw_mutex``h]jz)}(hj__h]hhw_mutex}(hja_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]_ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjY_ubj)}(hhh](h)}(h*internal mutex used for locking transfers.h]h*internal mutex used for locking transfers.}(hjx_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhju_ubh)}(hNote that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access.h]hNote that if the underlying hardware is shared among multiple channels, the driver needs to do additional locking to prevent concurrent access.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhju_ubeh}(h]h ]h"]h$]h&]uh1jhjY_ubeh}(h]h ]h"]h$]h&]uh1jmhjt_hMhj]ubjn)}(h6``crc_work`` worker that captures CRCs for each frame h](jt)}(h ``crc_work``h]jz)}(hj_h]hcrc_work}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj_ubj)}(hhh]h)}(h(worker that captures CRCs for each frameh]h(worker that captures CRCs for each frame}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj_ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj_hMhj]ubjn)}(h-``crc_count`` counter of captured frame CRCs h](jt)}(h ``crc_count``h]jz)}(hj_h]h crc_count}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj_ubj)}(hhh]h)}(hcounter of captured frame CRCsh]hcounter of captured frame CRCs}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj_ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj_hMhj]ubjn)}(hXJ``transfer`` transfers a message representing a single AUX transaction. This is a hardware-specific implementation of how transactions are executed that the drivers must provide. A pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure. Helpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure. The **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case. Also note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected: - If the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. - If we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. h](jt)}(h ``transfer``h]jz)}(hj`h]htransfer}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj`ubj)}(hhh](h)}(h:transfers a message representing a single AUX transaction.h]h:transfers a message representing a single AUX transaction.}(hj3`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj0`ubh)}(hjThis is a hardware-specific implementation of how transactions are executed that the drivers must provide.h]hjThis is a hardware-specific implementation of how transactions are executed that the drivers must provide.}(hjB`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj0`ubh)}(hA pointer to a :c:type:`drm_dp_aux_msg` structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure.h](hA pointer to a }(hjQ`hhhNhNubh)}(h:c:type:`drm_dp_aux_msg`h]jz)}(hj[`h]hdrm_dp_aux_msg}(hj]`hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjY`ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_aux_msguh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjQ`ubh structure describing the transaction is passed into this function. Upon success, the implementation should return the number of payload bytes that were transferred, or a negative error-code on failure.}(hjQ`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjx`hMhj0`ubh)}(hHelpers will propagate these errors, with the exception of the ``-EBUSY`` error, which causes a transaction to be retried. On a short, helpers will return ``-EPROTO`` to make it simpler to check for failure.h](h?Helpers will propagate these errors, with the exception of the }(hj`hhhNhNubjz)}(h ``-EBUSY``h]h-EBUSY}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubhR error, which causes a transaction to be retried. On a short, helpers will return }(hj`hhhNhNubjz)}(h ``-EPROTO``h]h-EPROTO}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubh) to make it simpler to check for failure.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj0`ubh)}(hThe **transfer\(\)** function must only modify the reply field of the :c:type:`drm_dp_aux_msg` structure. The retry logic and i2c helpers assume this is the case.h](hThe }(hj`hhhNhNubj%)}(h**transfer\(\)**h]h transfer()}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubh2 function must only modify the reply field of the }(hj`hhhNhNubh)}(h:c:type:`drm_dp_aux_msg`h]jz)}(hj`h]hdrm_dp_aux_msg}(hj`hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_aux_msguh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj`ubhD structure. The retry logic and i2c helpers assume this is the case.}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj`hMhj0`ubh)}(hAlso note that this callback can be called no matter the state **dev** is in and also no matter what state the panel is in. It's expected:h](h?Also note that this callback can be called no matter the state }(hj`hhhNhNubj%)}(h**dev**h]hdev}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubhF is in and also no matter what state the panel is in. It’s expected:}(hj`hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj0`ubh)}(hhh](h)}(hkIf the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer. h]h)}(hjIf the **dev** providing the AUX bus is currently unpowered then it will power itself up for the transfer.h](hIf the }(hj"ahhhNhNubj%)}(h**dev**h]hdev}(hj*ahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"aubh\ providing the AUX bus is currently unpowered then it will power itself up for the transfer.}(hj"ahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubah}(h]h ]h"]h$]h&]uh1hhjaubh)}(hXIf we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel. h]h)}(hXIf we're on eDP (using a drm_panel) and the panel is not in a state where it can respond (it's not powered or it's in a low power state) then this function may return an error, but not crash. It's up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel.h]hX&If we’re on eDP (using a drm_panel) and the panel is not in a state where it can respond (it’s not powered or it’s in a low power state) then this function may return an error, but not crash. It’s up to the caller of this code to make sure that the panel is powered on if getting an error back is not OK. If a drm_panel driver is initiating a DP AUX transfer it may power itself up however it wants. All other code should ensure that the pre_enable() bridge chain (which eventually calls the drm_panel prepare function) has powered the panel.}(hjMahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjIaubah}(h]h ]h"]h$]h&]uh1hhjaubeh}(h]h ]h"]h$]h&]j8j4uh1hhjBahMhj0`ubeh}(h]h ]h"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]uh1jmhj/`hMhj]ubjn)}(hXl``wait_hpd_asserted`` wait for HPD to be asserted This is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly. If a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated. This function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions. This function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log. The semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep. NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted. h](jt)}(h``wait_hpd_asserted``h]jz)}(hjzah]hwait_hpd_asserted}(hj|ahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxaubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjtaubj)}(hhh](h)}(hwait for HPD to be assertedh]hwait for HPD to be asserted}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubh)}(hXThis is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we're not using the AUX controller's HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly.h]hXThis is mainly useful for eDP panels drivers to wait for an eDP panel to finish powering on. It is optional for DP AUX controllers to implement this function. It is required for DP AUX endpoints (panel drivers) to call this function after powering up but before doing AUX transfers unless the DP AUX endpoint driver knows that we’re not using the AUX controller’s HPD. One example of the panel driver not needing to call this is if HPD is hooked up to a GPIO that the panel driver can read directly.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubh)}(hIf a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller's built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated.h]hIf a DP AUX controller does not implement this function then it may still support eDP panels that use the AUX controller’s built-in HPD signal by implementing a long wait for HPD in the transfer() callback, though this is deprecated.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubh)}(hXThis function will efficiently wait for the HPD signal to be asserted. The `wait_us` parameter that is passed in says that we know that the HPD signal is expected to be asserted within `wait_us` microseconds. This function could wait for longer than `wait_us` if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions.h](hKThis function will efficiently wait for the HPD signal to be asserted. The }(hjahhhNhNubhtitle_reference)}(h `wait_us`h]hwait_us}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jahjaubhe parameter that is passed in says that we know that the HPD signal is expected to be asserted within }(hjahhhNhNubja)}(h `wait_us`h]hwait_us}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jahjaubh8 microseconds. This function could wait for longer than }(hjahhhNhNubja)}(h `wait_us`h]hwait_us}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jahjaubh if the logic in the DP controller has a long debouncing time. The important thing is that if this function returns success that the DP controller is ready to send AUX transactions.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubh)}(hThis function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn't asserted. This function should not print timeout errors to the log.h]hThis function returns 0 if HPD was asserted or -ETIMEDOUT if time expired and HPD wasn’t asserted. This function should not print timeout errors to the log.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubh)}(hThe semantics of this function are designed to match the readx_poll_timeout() function. That means a `wait_us` of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep.h](heThe semantics of this function are designed to match the readx_poll_timeout() function. That means a }(hjbhhhNhNubja)}(h `wait_us`h]hwait_us}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jahjbubhP of 0 means to wait forever. Like readx_poll_timeout(), this function may sleep.}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubh)}(hX@NOTE: this function specifically reports the state of the HPD pin that's associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted.h]hXBNOTE: this function specifically reports the state of the HPD pin that’s associated with the DP AUX channel. This is different from the HPD concept in much of the rest of DRM which is more about physical presence of a display. For eDP, for instance, a display is assumed always present even if the HPD pin is deasserted.}(hj7bhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjaubeh}(h]h ]h"]h$]h&]uh1jhjtaubeh}(h]h ]h"]h$]h&]uh1jmhjahMhj]ubjn)}(h=``i2c_nack_count`` Counts I2C NACKs, used for DP validation. h](jt)}(h``i2c_nack_count``h]jz)}(hjXbh]hi2c_nack_count}(hjZbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjVbubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjRbubj)}(hhh]h)}(h)Counts I2C NACKs, used for DP validation.h]h)Counts I2C NACKs, used for DP validation.}(hjqbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmbhMhjnbubah}(h]h ]h"]h$]h&]uh1jhjRbubeh}(h]h ]h"]h$]h&]uh1jmhjmbhMhj]ubjn)}(h?``i2c_defer_count`` Counts I2C DEFERs, used for DP validation. h](jt)}(h``i2c_defer_count``h]jz)}(hjbh]hi2c_defer_count}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM hjbubj)}(hhh]h)}(h*Counts I2C DEFERs, used for DP validation.h]h*Counts I2C DEFERs, used for DP validation.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhM hjbubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jmhjbhM hj]ubjn)}(hB``cec`` struct containing fields used for CEC-Tunneling-over-AUX. h](jt)}(h``cec``h]jz)}(hjbh]hcec}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjbubj)}(hhh]h)}(h9struct containing fields used for CEC-Tunneling-over-AUX.h]h9struct containing fields used for CEC-Tunneling-over-AUX.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjbubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jmhjbhMhj]ubjn)}(h@``is_remote`` Is this AUX CH actually using sideband messaging. h](jt)}(h ``is_remote``h]jz)}(hjch]h is_remote}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjbubj)}(hhh]h)}(h1Is this AUX CH actually using sideband messaging.h]h1Is this AUX CH actually using sideband messaging.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jmhjchMhj]ubjn)}(hC``powered_down`` If true then the remote endpoint is powered down. h](jt)}(h``powered_down``h]jz)}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:cubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj6cubj)}(hhh]h)}(h1If true then the remote endpoint is powered down.h]h1If true then the remote endpoint is powered down.}(hjUchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjQchMhjRcubah}(h]h ]h"]h$]h&]uh1jhj6cubeh}(h]h ]h"]h$]h&]uh1jmhjQchMhj]ubjn)}(hD``no_zero_sized`` If the hw can't use zero sized transfers (NVIDIA) h](jt)}(h``no_zero_sized``h]jz)}(hjuch]h no_zero_sized}(hjwchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjscubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjocubj)}(hhh]h)}(h1If the hw can't use zero sized transfers (NVIDIA)h]h3If the hw can’t use zero sized transfers (NVIDIA)}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1jhjocubeh}(h]h ]h"]h$]h&]uh1jmhjchMhj]ubjn)}(hD``dpcd_probe_disabled`` If probing before a DPCD access is disabled.h](jt)}(h``dpcd_probe_disabled``h]jz)}(hjch]hdpcd_probe_disabled}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM hjcubj)}(hhh]h)}(h,If probing before a DPCD access is disabled.h]h,If probing before a DPCD access is disabled.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM!hjcubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhjchM hj]ubeh}(h]h ]h"]h$]h&]uh1jhhjR]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubh)}(h**Description**h]j%)}(hjch]h Description}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjcubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM$hjAhhubh)}(hXRAn AUX channel can also be used to transport I2C messages to a sink. A typical application of that is to access an EDID that's present in the sink device. The **transfer\(\)** function can also be used to execute such transactions. The drm_dp_aux_register() function registers an I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers should call drm_dp_aux_unregister() to remove the I2C adapter. The I2C adapter uses long transfers by default; if a partial response is received, the adapter will drop down to the size given by the partial response for this transaction only.h](hAn AUX channel can also be used to transport I2C messages to a sink. A typical application of that is to access an EDID that’s present in the sink device. The }(hjdhhhNhNubj%)}(h**transfer\(\)**h]h transfer()}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubhX function can also be used to execute such transactions. The drm_dp_aux_register() function registers an I2C adapter that can be passed to drm_probe_ddc(). Upon removal, drivers should call drm_dp_aux_unregister() to remove the I2C adapter. The I2C adapter uses long transfers by default; if a partial response is received, the adapter will drop down to the size given by the partial response for this transaction only.}(hjdhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMkhjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_dpcd_readb (C function)c.drm_dp_dpcd_readbhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hSssize_t drm_dp_dpcd_readb (struct drm_dp_aux *aux, unsigned int offset, u8 *valuep)h]j)}(hRssize_t drm_dp_dpcd_readb(struct drm_dp_aux *aux, unsigned int offset, u8 *valuep)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjDdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAdubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjFdmodnameN classnameNjj)}j]j)}jdrm_dp_dpcd_readbsbc.drm_dp_dpcd_readbasbuh1hhj=dhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM.ubj)}(h h]h }(hjfdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=dhhhjedhM.ubj)}(hdrm_dp_dpcd_readbh]j)}(hjbdh]hdrm_dp_dpcd_readb}(hjxdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtdubah}(h]h ](jjeh"]h$]h&]jjuh1jhj=dhhhjedhM.ubj)}(h9(struct drm_dp_aux *aux, unsigned int offset, u8 *valuep)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjdmodnameN classnameNjj)}j]j`dc.drm_dp_dpcd_readbasbuh1hhjdubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj+)}(hj9h]h*}(hjdhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjdubj)}(hauxh]haux}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj)}(h h]h }(hj-ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj)}(hoffseth]hoffset}(hj;ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubj)}(h u8 *valueph](h)}(hhh]j)}(hu8h]hu8}(hjWehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjYemodnameN classnameNjj)}j]j`dc.drm_dp_dpcd_readbasbuh1hhjPeubj)}(h h]h }(hjuehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPeubj+)}(hj9h]h*}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjPeubj)}(hvalueph]hvaluep}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubeh}(h]h ]h"]h$]h&]jjuh1jhj=dhhhjedhM.ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj9dhhhjedhM.ubah}(h]j4dah ](jjeh"]h$]h&]jj)jhuh1jhjedhM.hj6dhhubj)}(hhh]h)}(h read a single byte from the DPCDh]h read a single byte from the DPCD}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM.hjehhubah}(h]h ]h"]h$]h&]uh1jhj6dhhhjedhM.ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjejjejjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned int offset`` address of the register to read ``u8 *valuep`` location where the value of the register will be stored **Description** Returns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.h](h)}(h**Parameters**h]j%)}(hjeh]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM2hjeubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjeh]hstruct drm_dp_aux *aux}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjeubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM/hjeubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhM/hjfubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjfhM/hjeubjn)}(h8``unsigned int offset`` address of the register to read h](jt)}(h``unsigned int offset``h]jz)}(hj4fh]hunsigned int offset}(hj6fhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2fubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM0hj.fubj)}(hhh]h)}(haddress of the register to readh]haddress of the register to read}(hjMfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIfhM0hjJfubah}(h]h ]h"]h$]h&]uh1jhj.fubeh}(h]h ]h"]h$]h&]uh1jmhjIfhM0hjeubjn)}(hG``u8 *valuep`` location where the value of the register will be stored h](jt)}(h``u8 *valuep``h]jz)}(hjmfh]h u8 *valuep}(hjofhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkfubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM1hjgfubj)}(hhh]h)}(h7location where the value of the register will be storedh]h7location where the value of the register will be stored}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhM1hjfubah}(h]h ]h"]h$]h&]uh1jhjgfubeh}(h]h ]h"]h$]h&]uh1jmhjfhM1hjeubeh}(h]h ]h"]h$]h&]uh1jhhjeubh)}(h**Description**h]j%)}(hjfh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM3hjeubh)}(hReturns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.h]hReturns the number of bytes transferred (1) on success, or a negative error code on failure. In most of the cases you should be using drm_dp_dpcd_read_byte() instead.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM2hjeubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_dp_dpcd_read_data (C function)c.drm_dp_dpcd_read_datahNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hbint drm_dp_dpcd_read_data (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j)}(haint drm_dp_dpcd_read_data(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hinth]hint}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM>ubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfhhhjfhM>ubj)}(hdrm_dp_dpcd_read_datah]j)}(hdrm_dp_dpcd_read_datah]hdrm_dp_dpcd_read_data}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj gubah}(h]h ](jjeh"]h$]h&]jjuh1jhjfhhhjfhM>ubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj*ghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubj)}(h h]h }(hj7ghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjHghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEgubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjJgmodnameN classnameNjj)}j]j)}jjgsbc.drm_dp_dpcd_read_dataasbuh1hhj&gubj)}(h h]h }(hjhghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubj+)}(hj9h]h*}(hjvghhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj&gubj)}(hauxh]haux}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&gubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"gubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(hinth]hint}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(hoffseth]hoffset}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"gubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubj+)}(hj9h]h*}(hj hhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjgubj)}(hbufferh]hbuffer}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"gubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hj2hhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj4hmodnameN classnameNjj)}j]jdgc.drm_dp_dpcd_read_dataasbuh1hhj+hubj)}(h h]h }(hjPhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hubj)}(hsizeh]hsize}(hj^hhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"gubeh}(h]h ]h"]h$]h&]jjuh1jhjfhhhjfhM>ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjfhhhjfhM>ubah}(h]jfah ](jjeh"]h$]h&]jj)jhuh1jhjfhM>hjfhhubj)}(hhh]h)}(h$read a series of bytes from the DPCDh]h$read a series of bytes from the DPCD}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM>hjhhhubah}(h]h ]h"]h$]h&]uh1jhjfhhhjfhM>ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjhjjhjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to read ``void *buffer`` buffer to store the register values ``size_t size`` number of bytes in **buffer** **Description** Returns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h](h)}(h**Parameters**h]j%)}(hjhh]h Parameters}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMBhjhubji)}(hhh](jn)}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjhh]hstruct drm_dp_aux *aux}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM?hjhubj)}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhM?hjhubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jmhjhhM?hjhubjn)}(h@``unsigned int offset`` address of the (first) register to read h](jt)}(h``unsigned int offset``h]jz)}(hjih]hunsigned int offset}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM@hjhubj)}(hhh]h)}(h'address of the (first) register to readh]h'address of the (first) register to read}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihM@hjiubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jmhjihM@hjhubjn)}(h5``void *buffer`` buffer to store the register values h](jt)}(h``void *buffer``h]jz)}(hj;ih]h void *buffer}(hj=ihhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9iubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMAhj5iubj)}(hhh]h)}(h#buffer to store the register valuesh]h#buffer to store the register values}(hjTihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPihMAhjQiubah}(h]h ]h"]h$]h&]uh1jhj5iubeh}(h]h ]h"]h$]h&]uh1jmhjPihMAhjhubjn)}(h.``size_t size`` number of bytes in **buffer** h](jt)}(h``size_t size``h]jz)}(hjtih]h size_t size}(hjvihhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjriubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMBhjniubj)}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjihhhNhNubj%)}(h **buffer**h]hbuffer}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubeh}(h]h ]h"]h$]h&]uh1hhjihMBhjiubah}(h]h ]h"]h$]h&]uh1jhjniubeh}(h]h ]h"]h$]h&]uh1jmhjihMBhjhubeh}(h]h ]h"]h$]h&]uh1jhhjhubh)}(h**Description**h]j%)}(hjih]h Description}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMDhjhubh)}(hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. 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Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMChjhubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_dp_dpcd_write_data (C function)c.drm_dp_dpcd_write_datahNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hcint drm_dp_dpcd_write_data (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j)}(hbint drm_dp_dpcd_write_data(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hinth]hint}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMlubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhhjjhMlubj)}(hdrm_dp_dpcd_write_datah]j)}(hdrm_dp_dpcd_write_datah]hdrm_dp_dpcd_write_data}(hj#jhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjihhhjjhMlubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj?jhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;jubj)}(h h]h }(hjLjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;jubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj]jhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_jmodnameN classnameNjj)}j]j)}jj%jsbc.drm_dp_dpcd_write_dataasbuh1hhj;jubj)}(h h]h }(hj}jhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;jubj+)}(hj9h]h*}(hjjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;jubj)}(hauxh]haux}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;jubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7jubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(hinth]hint}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(hoffseth]hoffset}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7jubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj+)}(hj9h]h*}(hjkhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjjubj)}(hbufferh]hbuffer}(hj+khhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7jubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjGkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDkubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjIkmodnameN classnameNjj)}j]jyjc.drm_dp_dpcd_write_dataasbuh1hhj@kubj)}(h h]h }(hjekhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@kubj)}(hsizeh]hsize}(hjskhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@kubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7jubeh}(h]h ]h"]h$]h&]jjuh1jhjihhhjjhMlubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjihhhjjhMlubah}(h]jiah ](jjeh"]h$]h&]jj)jhuh1jhjjhMlhjihhubj)}(hhh]h)}(h#write a series of bytes to the DPCDh]h#write a series of bytes to the DPCD}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMlhjkhhubah}(h]h ]h"]h$]h&]uh1jhjihhhjjhMlubeh}(h]h ](jfunctioneh"]h$]h&]jjjjkjjkjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to write ``void *buffer`` buffer containing the values to write ``size_t size`` number of bytes in **buffer** **Description** Returns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h](h)}(h**Parameters**h]j%)}(hjkh]h Parameters}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjkubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMphjkubji)}(hhh](jn)}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjkh]hstruct drm_dp_aux *aux}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMmhjkubj)}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMmhjkubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjkhMmhjkubjn)}(hA``unsigned int offset`` address of the (first) register to write h](jt)}(h``unsigned int offset``h]jz)}(hjlh]hunsigned int offset}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMnhjlubj)}(hhh]h)}(h(address of the (first) register to writeh]h(address of the (first) register to write}(hj0lhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,lhMnhj-lubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhj,lhMnhjkubjn)}(h7``void *buffer`` buffer containing the values to write h](jt)}(h``void *buffer``h]jz)}(hjPlh]h void *buffer}(hjRlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjNlubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMohjJlubj)}(hhh]h)}(h%buffer containing the values to writeh]h%buffer containing the values to write}(hjilhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjelhMohjflubah}(h]h ]h"]h$]h&]uh1jhjJlubeh}(h]h ]h"]h$]h&]uh1jmhjelhMohjkubjn)}(h.``size_t size`` number of bytes in **buffer** h](jt)}(h``size_t size``h]jz)}(hjlh]h size_t size}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMphjlubj)}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjlhhhNhNubj%)}(h **buffer**h]hbuffer}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubeh}(h]h ]h"]h$]h&]uh1hhjlhMphjlubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhjlhMphjkubeh}(h]h ]h"]h$]h&]uh1jhhjkubh)}(h**Description**h]j%)}(hjlh]h Description}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMrhjkubh)}(hXReturns zero (0) on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. 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Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMqhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_dpcd_writeb (C function)c.drm_dp_dpcd_writebhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hRssize_t drm_dp_dpcd_writeb (struct drm_dp_aux *aux, unsigned int offset, u8 value)h]j)}(hQssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux, unsigned int offset, u8 value)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmmodnameN classnameNjj)}j]j)}jdrm_dp_dpcd_writebsbc.drm_dp_dpcd_writebasbuh1hhjmhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMubj)}(h h]h }(hjqh]h Parameters}(hj@qhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhjwubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjwhM?hjvubjn)}(h``DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC`` The device applies HBLANK expansion for some modes, but this requires enabling DSC. h](jt)}(h/``DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC``h]jz)}(hjwh]h+DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMChjwubj)}(hhh]h)}(hSThe device applies HBLANK expansion for some modes, but this requires enabling DSC.h]hSThe device applies HBLANK expansion for some modes, but this requires enabling DSC.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMBhjwubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjwhMChjvubjn)}(hX ``DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT`` The device doesn't support DSC decompression at the maximum DSC pixel throughput and compressed bpp it indicates via its DPCD DSC capabilities. The compressed bpp must be limited above a device specific DSC pixel throughput.h](jt)}(h*``DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT``h]jz)}(hjwh]h&DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMHhjwubj)}(hhh]h)}(hThe device doesn't support DSC decompression at the maximum DSC pixel throughput and compressed bpp it indicates via its DPCD DSC capabilities. The compressed bpp must be limited above a device specific DSC pixel throughput.h]hThe device doesn’t support DSC decompression at the maximum DSC pixel throughput and compressed bpp it indicates via its DPCD DSC capabilities. The compressed bpp must be limited above a device specific DSC pixel throughput.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMFhjxubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjxhMHhjvubeh}(h]h ]h"]h$]h&]uh1jhhj{vubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubh)}(h**Description**h]j%)}(hj?xh]h Description}(hjAxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=xubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMKhjAhhubh)}(hDisplay Port sink and branch devices in the wild have a variety of bugs, try to collect them here. The quirks are shared, but it's up to the drivers to implement workarounds for them.h]hDisplay Port sink and branch devices in the wild have a variety of bugs, try to collect them here. The quirks are shared, but it’s up to the drivers to implement workarounds for them.}(hjUxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM'hjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_has_quirk (C function)c.drm_dp_has_quirkhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hObool drm_dp_has_quirk (const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)h]j)}(hNbool drm_dp_has_quirk(const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)h](j)}(hjAh]hbool}(hj}xhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyxhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMdubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyxhhhjxhMdubj)}(hdrm_dp_has_quirkh]j)}(hdrm_dp_has_quirkh]hdrm_dp_has_quirk}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ](jjeh"]h$]h&]jjuh1jhjyxhhhjxhMdubj)}(h9(const struct drm_dp_desc *desc, enum drm_dp_quirk quirk)h](j)}(hconst struct drm_dp_desc *desch](j)}(hjUh]hconst}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(hjh]hstruct}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubh)}(hhh]j)}(h drm_dp_desch]h drm_dp_desc}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjxmodnameN classnameNjj)}j]j)}jjxsbc.drm_dp_has_quirkasbuh1hhjxubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj+)}(hj9h]h*}(hj yhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjxubj)}(hdesch]hdesc}(hj-yhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubj)}(henum drm_dp_quirk quirkh](j)}(hj8h]henum}(hjFyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjByubj)}(h h]h }(hjSyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjByubh)}(hhh]j)}(h drm_dp_quirkh]h drm_dp_quirk}(hjdyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjayubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjfymodnameN classnameNjj)}j]jyc.drm_dp_has_quirkasbuh1hhjByubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjByubj)}(hquirkh]hquirk}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjByubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubeh}(h]h ]h"]h$]h&]jjuh1jhjyxhhhjxhMdubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjuxhhhjxhMdubah}(h]jpxah ](jjeh"]h$]h&]jj)jhuh1jhjxhMdhjrxhhubj)}(hhh]h)}(h(does the DP device have a specific quirkh]h(does the DP device have a specific quirk}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMdhjyhhubah}(h]h ]h"]h$]h&]uh1jhjrxhhhjxhMdubeh}(h]h ](jfunctioneh"]h$]h&]jjjjyjjyjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const struct drm_dp_desc *desc`` Device descriptor filled by drm_dp_read_desc() ``enum drm_dp_quirk quirk`` Quirk to query for **Description** Return true if DP device identified by **desc** has **quirk**.h](h)}(h**Parameters**h]j%)}(hjyh]h Parameters}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhhjyubji)}(hhh](jn)}(hR``const struct drm_dp_desc *desc`` Device descriptor filled by drm_dp_read_desc() h](jt)}(h"``const struct drm_dp_desc *desc``h]jz)}(hjyh]hconst struct drm_dp_desc *desc}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMehjyubj)}(hhh]h)}(h.Device descriptor filled by drm_dp_read_desc()h]h.Device descriptor filled by drm_dp_read_desc()}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMehjzubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjzhMehjyubjn)}(h/``enum drm_dp_quirk quirk`` Quirk to query for h](jt)}(h``enum drm_dp_quirk quirk``h]jz)}(hj4zh]henum drm_dp_quirk quirk}(hj6zhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2zubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMfhj.zubj)}(hhh]h)}(hQuirk to query forh]hQuirk to query for}(hjMzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIzhMfhjJzubah}(h]h ]h"]h$]h&]uh1jhj.zubeh}(h]h ]h"]h$]h&]uh1jmhjIzhMfhjyubeh}(h]h ]h"]h$]h&]uh1jhhjyubh)}(h**Description**h]j%)}(hjozh]h Description}(hjqzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmzubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhhjyubh)}(h>Return true if DP device identified by **desc** has **quirk**.h](h'Return true if DP device identified by }(hjzhhhNhNubj%)}(h**desc**h]hdesc}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubh has }(hjzhhhNhNubj%)}(h **quirk**h]hquirk}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubh.}(hjzhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMghjyubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_edp_backlight_info (C struct)c.drm_edp_backlight_infohNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hdrm_edp_backlight_infoh]j)}(hstruct drm_edp_backlight_infoh](j)}(hjh]hstruct}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMlubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjzhMlubj)}(hdrm_edp_backlight_infoh]j)}(hjzh]hdrm_edp_backlight_info}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubah}(h]h ](jjeh"]h$]h&]jjuh1jhjzhhhjzhMlubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjzhhhjzhMlubah}(h]jzah ](jjeh"]h$]h&]jj)jhuh1jhjzhMlhjzhhubj)}(hhh]h)}(h Probed eDP backlight info structh]h Probed eDP backlight info struct}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMqhj{hhubah}(h]h ]h"]h$]h&]uh1jhjzhhhjzhMlubeh}(h]h ](jstructeh"]h$]h&]jjjj2{jj2{jjjuh1jhhhjAhNhNubj)}(hX**Definition**:: struct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; }; **Members** ``pwmgen_bit_count`` The pwmgen bit count ``pwm_freq_pre_divider`` The PWM frequency pre-divider value being used for this backlight, if any ``max`` The maximum backlight level that may be set ``lsb_reg_used`` Do we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register? ``aux_enable`` Does the panel support the AUX enable cap? ``aux_set`` Does the panel support setting the brightness through AUX? ``luminance_set`` Does the panel support setting the brightness through AUX using luminance values?h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj>{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:{ubh:}(hj:{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMuhj6{ubj@)}(hstruct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; };h]hstruct drm_edp_backlight_info { u8 pwmgen_bit_count; u8 pwm_freq_pre_divider; u32 max; bool lsb_reg_used : 1; bool aux_enable : 1; bool aux_set : 1; bool luminance_set : 1; };}hjW{sbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMwhj6{ubh)}(h **Members**h]j%)}(hjh{h]hMembers}(hjj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjf{ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj6{ubji)}(hhh](jn)}(h*``pwmgen_bit_count`` The pwmgen bit count h](jt)}(h``pwmgen_bit_count``h]jz)}(hj{h]hpwmgen_bit_count}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMshj{ubj)}(hhh]h)}(hThe pwmgen bit counth]hThe pwmgen bit count}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMshj{ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj{hMshj~{ubjn)}(hc``pwm_freq_pre_divider`` The PWM frequency pre-divider value being used for this backlight, if any h](jt)}(h``pwm_freq_pre_divider``h]jz)}(hj{h]hpwm_freq_pre_divider}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMthj{ubj)}(hhh]h)}(hIThe PWM frequency pre-divider value being used for this backlight, if anyh]hIThe PWM frequency pre-divider value being used for this backlight, if any}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hMthj{ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj{hMthj~{ubjn)}(h4``max`` The maximum backlight level that may be set h](jt)}(h``max``h]jz)}(hj{h]hmax}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMuhj{ubj)}(hhh]h)}(h+The maximum backlight level that may be seth]h+The maximum backlight level that may be set}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMuhj|ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMuhj~{ubjn)}(hZ``lsb_reg_used`` Do we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register? h](jt)}(h``lsb_reg_used``h]jz)}(hj2|h]h lsb_reg_used}(hj4|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0|ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMvhj,|ubj)}(hhh]h)}(hHDo we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register?h]hHDo we also write values to the DP_EDP_BACKLIGHT_BRIGHTNESS_LSB register?}(hjK|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjG|hMvhjH|ubah}(h]h ]h"]h$]h&]uh1jhj,|ubeh}(h]h ]h"]h$]h&]uh1jmhjG|hMvhj~{ubjn)}(h:``aux_enable`` Does the panel support the AUX enable cap? h](jt)}(h``aux_enable``h]jz)}(hjk|h]h aux_enable}(hjm|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhji|ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMwhje|ubj)}(hhh]h)}(h*Does the panel support the AUX enable cap?h]h*Does the panel support the AUX enable cap?}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMwhj|ubah}(h]h ]h"]h$]h&]uh1jhje|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMwhj~{ubjn)}(hG``aux_set`` Does the panel support setting the brightness through AUX? h](jt)}(h ``aux_set``h]jz)}(hj|h]haux_set}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMxhj|ubj)}(hhh]h)}(h:Does the panel support setting the brightness through AUX?h]h:Does the panel support setting the brightness through AUX?}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMxhj|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMxhj~{ubjn)}(hc``luminance_set`` Does the panel support setting the brightness through AUX using luminance values?h](jt)}(h``luminance_set``h]jz)}(hj|h]h luminance_set}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMxhj|ubj)}(hhh]h)}(hQDoes the panel support setting the brightness through AUX using luminance values?h]hQDoes the panel support setting the brightness through AUX using luminance values?}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMyhj|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMxhj~{ubeh}(h]h ]h"]h$]h&]uh1jhhj6{ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubh)}(h**Description**h]j%)}(hj }h]h Description}(hj"}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhM|hjAhhubh)}(hvThis structure contains various data about an eDP backlight, which can be populated by using drm_edp_backlight_init().h]hvThis structure contains various data about an eDP backlight, which can be populated by using drm_edp_backlight_init().}(hj6}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMyhjAhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_dp_phy_test_params (C struct)c.drm_dp_phy_test_paramshNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hdrm_dp_phy_test_paramsh]j)}(hstruct drm_dp_phy_test_paramsh](j)}(hjh]hstruct}(hj^}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ}hhhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMubj)}(h h]h }(hjl}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ}hhhjk}hMubj)}(hdrm_dp_phy_test_paramsh]j)}(hjX}h]hdrm_dp_phy_test_params}(hj~}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz}ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZ}hhhjk}hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjV}hhhjk}hMubah}(h]jQ}ah ](jjeh"]h$]h&]jj)jhuh1jhjk}hMhjS}hhubj)}(hhh]h)}(hDP Phy Compliance parametersh]hDP Phy Compliance parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj}hhubah}(h]h ]h"]h$]h&]uh1jhjS}hhhjk}hMubeh}(h]h ](jstructeh"]h$]h&]jjjj}jj}jjjuh1jhhhjAhNhNubj)}(hX]**Definition**:: struct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; }; **Members** ``link_rate`` Requested Link rate from DPCD 0x219 ``num_lanes`` Number of lanes requested by sing through DPCD 0x220 ``phy_pattern`` DP Phy test pattern from DPCD 0x248 ``hbr2_reset`` DP HBR2_COMPLIANCE_SCRAMBLER_RESET from DCPD 0x24A and 0x24B ``custom80`` DP Test_80BIT_CUSTOM_PATTERN from DPCDs 0x250 through 0x259 ``enhanced_frame_cap`` flag for enhanced frame capability.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubh:}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj}ubj@)}(hstruct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; };h]hstruct drm_dp_phy_test_params { int link_rate; u8 num_lanes; u8 phy_pattern; u8 hbr2_reset[2]; u8 custom80[10]; bool enhanced_frame_cap; };}hj}sbah}(h]h ]h"]h$]h&]jjuh1j?hh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj}ubh)}(h **Members**h]j%)}(hj}h]hMembers}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hhh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj}ubji)}(hhh](jn)}(h2``link_rate`` Requested Link rate from DPCD 0x219 h](jt)}(h ``link_rate``h]jz)}(hj ~h]h link_rate}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ~ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj~ubj)}(hhh]h)}(h#Requested Link rate from DPCD 0x219h]h#Requested Link rate from DPCD 0x219}(hj&~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"~hMhj#~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj"~hMhj~ubjn)}(hC``num_lanes`` Number of lanes requested by sing through DPCD 0x220 h](jt)}(h ``num_lanes``h]jz)}(hjF~h]h num_lanes}(hjH~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjD~ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj@~ubj)}(hhh]h)}(h4Number of lanes requested by sing through DPCD 0x220h]h4Number of lanes requested by sing through DPCD 0x220}(hj_~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[~hMhj\~ubah}(h]h ]h"]h$]h&]uh1jhj@~ubeh}(h]h ]h"]h$]h&]uh1jmhj[~hMhj~ubjn)}(h4``phy_pattern`` DP Phy test pattern from DPCD 0x248 h](jt)}(h``phy_pattern``h]jz)}(hj~h]h phy_pattern}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}~ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhjy~ubj)}(hhh]h)}(h#DP Phy test pattern from DPCD 0x248h]h#DP Phy test pattern from DPCD 0x248}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhj~ubah}(h]h ]h"]h$]h&]uh1jhjy~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhj~ubjn)}(hL``hbr2_reset`` DP HBR2_COMPLIANCE_SCRAMBLER_RESET from DCPD 0x24A and 0x24B h](jt)}(h``hbr2_reset``h]jz)}(hj~h]h hbr2_reset}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jshh/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:278: ./include/drm/display/drm_dp_helper.hhMhj~ubj)}(hhh]h)}(h", or "" on errors. The returned string is always non-NULL and valid. **Return** Name of the DP PHY.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubji)}(hhh]jn)}(h1``enum drm_dp_phy dp_phy`` The DP PHY identifier h](jt)}(h``enum drm_dp_phy dp_phy``h]jz)}(hjh]henum drm_dp_phy dp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hThe DP PHY identifierh]hThe DP PHY identifier}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhj{ubh)}(h**Description**h]j%)}(hjۀh]h Description}(hj݀hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjـubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubh)}(hGiven the **dp_phy**, get a user friendly name of the DP PHY, either "DPRX" or "LTTPR ", or "" on errors. The returned string is always non-NULL and valid.h](h Given the }(hjhhhNhNubj%)}(h **dp_phy**h]hdp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, get a user friendly name of the DP PHY, either “DPRX” or “LTTPR ”, or “” on errors. The returned string is always non-NULL and valid.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubh)}(hName of the DP PHY.h]hName of the DP PHY.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_lttpr_wake_timeout_setup (C function)!c.drm_dp_lttpr_wake_timeout_setuphNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hTvoid drm_dp_lttpr_wake_timeout_setup (struct drm_dp_aux *aux, bool transparent_mode)h]j)}(hSvoid drm_dp_lttpr_wake_timeout_setup(struct drm_dp_aux *aux, bool transparent_mode)h](j)}(hvoidh]hvoid}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhjghMubj)}(hdrm_dp_lttpr_wake_timeout_setuph]j)}(hdrm_dp_lttpr_wake_timeout_setuph]hdrm_dp_lttpr_wake_timeout_setup}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ](jjeh"]h$]h&]jjuh1jhjUhhhjghMubj)}(h/(struct drm_dp_aux *aux, bool transparent_mode)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj|sb!c.drm_dp_lttpr_wake_timeout_setupasbuh1hhjubj)}(h h]h }(hjԁhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hbool transparent_modeh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(htransparent_modeh]htransparent_mode}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjUhhhjghMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjQhhhjghMubah}(h]jLah ](jjeh"]h$]h&]jj)jhuh1jhjghMhjNhhubj)}(hhh]h)}(h'Grant extended time for sink to wake uph]h'Grant extended time for sink to wake up}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjJhhubah}(h]h ]h"]h$]h&]uh1jhjNhhhjghMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjejjejjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``bool transparent_mode`` This is true if lttpr is in transparent mode **Description** This function checks if the sink needs any extended wake time, if it does it grants this request. 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If this function is not called all Aux transactions are expected to take a default of 1ms before they throw an error.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjiubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_dpcd_probe (C function)c.drm_dp_dpcd_probehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hCint drm_dp_dpcd_probe (struct drm_dp_aux *aux, unsigned int offset)h]j)}(hBint drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset)h](j)}(hinth]hint}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjChhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjChhhjUhMubj)}(hdrm_dp_dpcd_probeh]j)}(hdrm_dp_dpcd_probeh]hdrm_dp_dpcd_probe}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ](jjeh"]h$]h&]jjuh1jhjChhhjUhMubj)}(h-(struct drm_dp_aux *aux, unsigned int offset)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjjsbc.drm_dp_dpcd_probeasbuh1hhjubj)}(h h]h }(hjƒhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjЃhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hj݃hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubeh}(h]h ]h"]h$]h&]jjuh1jhjChhhjUhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj?hhhjUhMubah}(h]j:ah ](jjeh"]h$]h&]jj)jhuh1jhjUhMhj<hhubj)}(hhh]h)}(h4probe a given DPCD address with a 1-byte read accessh]h4probe a given DPCD address with a 1-byte read access}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjUhhubah}(h]h ]h"]h$]h&]uh1jhj<hhhjUhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjpjjpjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST) ``unsigned int offset`` address of the register to probe **Description** Probe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value. Returns 0 if the read access suceeded, or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjtubji)}(hhh](jn)}(h9``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST) h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hDisplayPort AUX channel (SST)h]hDisplayPort AUX channel (SST)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h9``unsigned int offset`` address of the register to probe h](jt)}(h``unsigned int offset``h]jz)}(hj҄h]hunsigned int offset}(hjԄhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjЄubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj̄ubj)}(hhh]h)}(h address of the register to probeh]h address of the register to probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj̄ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjtubh)}(h**Description**h]j%)}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjtubh)}(hProbe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value.h]hProbe the provided DPCD address by reading 1 byte from it. The function can be used to trigger some side-effect the read access has, like waking up the sink, without the need for the read-out value.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjtubh)}(hKReturns 0 if the read access suceeded, or a negative error code on failure.h]hKReturns 0 if the read access suceeded, or a negative error code on failure.}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjtubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_dpcd_set_powered (C function)c.drm_dp_dpcd_set_poweredhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hCvoid drm_dp_dpcd_set_powered (struct drm_dp_aux *aux, bool powered)h]j)}(hBvoid drm_dp_dpcd_set_powered(struct drm_dp_aux *aux, bool powered)h](j)}(hvoidh]hvoid}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]hhhjohMubj)}(hdrm_dp_dpcd_set_poweredh]j)}(hdrm_dp_dpcd_set_poweredh]hdrm_dp_dpcd_set_powered}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj]hhhjohMubj)}(h&(struct drm_dp_aux *aux, bool powered)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_dpcd_set_poweredasbuh1hhjubj)}(h h]h }(hj܅hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool poweredh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hpoweredh]hpowered}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj]hhhjohMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjYhhhjohMubah}(h]jTah ](jjeh"]h$]h&]jj)jhuh1jhjohMhjVhhubj)}(hhh]h)}(h$Set whether the DP device is poweredh]h$Set whether the DP device is powered}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRhhubah}(h]h ]h"]h$]h&]uh1jhjVhhhjohMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjmjjmjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op. ``bool powered`` true if powered; false if not **Description** If the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out. If this function is never called then a device defaults to being powered.h](h)}(h**Parameters**h]j%)}(hjwh]h Parameters}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjuubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjqubji)}(hhh](jn)}(h``struct drm_dp_aux *aux`` DisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op. h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hdDisplayPort AUX channel; for convenience it's OK to pass NULL here and the function will be a no-op.h]hfDisplayPort AUX channel; for convenience it’s OK to pass NULL here and the function will be a no-op.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h/``bool powered`` true if powered; false if not h](jt)}(h``bool powered``h]jz)}(hjІh]h bool powered}(hj҆hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjΆubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjʆubj)}(hhh]h)}(htrue if powered; false if noth]htrue if powered; false if not}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjʆubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjqubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjqubh)}(hIf the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out.h]hIf the endpoint device on the DP AUX bus is known to be powered down then this function can be called to make future transfers fail immediately instead of needing to time out.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjqubh)}(hIIf this function is never called then a device defaults to being powered.h]hIIf this function is never called then a device defaults to being powered.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjqubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_dp_dpcd_set_probe (C function)c.drm_dp_dpcd_set_probehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h@void drm_dp_dpcd_set_probe (struct drm_dp_aux *aux, bool enable)h]j)}(h?void drm_dp_dpcd_set_probe(struct drm_dp_aux *aux, bool enable)h](j)}(hvoidh]hvoid}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhjmhMubj)}(hdrm_dp_dpcd_set_probeh]j)}(hdrm_dp_dpcd_set_probeh]hdrm_dp_dpcd_set_probe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj[hhhjmhMubj)}(h%(struct drm_dp_aux *aux, bool enable)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_dpcd_set_probeasbuh1hhjubj)}(h h]h }(hjڇhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool enableh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(henableh]henable}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj[hhhjmhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjWhhhjmhMubah}(h]jRah ](jjeh"]h$]h&]jj)jhuh1jhjmhMhjThhubj)}(hhh]h)}(h0Set whether a probing before DPCD access is doneh]h0Set whether a probing before DPCD access is done}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjPhhubah}(h]h ]h"]h$]h&]uh1jhjThhhjmhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjkjjkjjjuh1jhhhjAhNhNubj)}(hv**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable`` Enable the probing if requiredh](h)}(h**Parameters**h]j%)}(hjuh]h Parameters}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjoubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h.``bool enable`` Enable the probing if requiredh](jt)}(h``bool enable``h]jz)}(hj͈h]h bool enable}(hjψhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjˈubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjLjubj)}(hhh]h)}(hEnable the probing if requiredh]hEnable the probing if required}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubah}(h]h ]h"]h$]h&]uh1jhjLjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjoubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_dpcd_read (C function)c.drm_dp_dpcd_readhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hassize_t drm_dp_dpcd_read (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j)}(h`ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](h)}(hhh]j)}(hssize_th]hssize_t}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj,modnameN classnameNjj)}j]j)}jdrm_dp_dpcd_readsbc.drm_dp_dpcd_readasbuh1hhj#hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhjKhMubj)}(hdrm_dp_dpcd_readh]j)}(hjHh]hdrm_dp_dpcd_read}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ](jjeh"]h$]h&]jjuh1jhj#hhhjKhMubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jFc.drm_dp_dpcd_readasbuh1hhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj+)}(hj9h]h*}(hjÉhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjuubj)}(hauxh]haux}(hjЉhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjVhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hbufferh]hbuffer}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jFc.drm_dp_dpcd_readasbuh1hhjxubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubeh}(h]h ]h"]h$]h&]jjuh1jhj#hhhjKhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjKhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjKhMhjhhubj)}(hhh]h)}(h$read a series of bytes from the DPCDh]h$read a series of bytes from the DPCD}(hjՊhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjҊhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjKhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to read ``void *buffer`` buffer to store the register values ``size_t size`` number of bytes in **buffer** **Description** Returns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller. In most of the cases you want to use drm_dp_dpcd_read_data() instead.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubji)}(hhh](jn)}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hMhj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj+hMhj ubjn)}(h@``unsigned int offset`` address of the (first) register to read h](jt)}(h``unsigned int offset``h]jz)}(hjOh]hunsigned int offset}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjIubj)}(hhh]h)}(h'address of the (first) register to readh]h'address of the (first) register to read}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjeubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjdhMhj ubjn)}(h5``void *buffer`` buffer to store the register values h](jt)}(h``void *buffer``h]jz)}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h#buffer to store the register valuesh]h#buffer to store the register values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj ubjn)}(h.``size_t size`` number of bytes in **buffer** h](jt)}(h``size_t size``h]jz)}(hjh]h size_t size}(hjËhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjڋhhhNhNubj%)}(h **buffer**h]hbuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjڋubeh}(h]h ]h"]h$]h&]uh1hhj֋hMhj׋ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj֋hMhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.h]hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hEIn most of the cases you want to use drm_dp_dpcd_read_data() instead.h]hEIn most of the cases you want to use drm_dp_dpcd_read_data() instead.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_dpcd_write (C function)c.drm_dp_dpcd_writehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hbssize_t drm_dp_dpcd_write (struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h]j)}(hassize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjcmodnameN classnameNjj)}j]j)}jdrm_dp_dpcd_writesbc.drm_dp_dpcd_writeasbuh1hhjZhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhjhMubj)}(hdrm_dp_dpcd_writeh]j)}(hjh]hdrm_dp_dpcd_write}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZhhhjhMubj)}(hH(struct drm_dp_aux *aux, unsigned int offset, void *buffer, size_t size)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjΌhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjˌubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjЌmodnameN classnameNjj)}j]j}c.drm_dp_dpcd_writeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hunsigned int offseth](j)}(hunsignedh]hunsigned}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmubj)}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j}c.drm_dp_dpcd_writeasbuh1hhjubj)}(h h]h }(hjԍhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjZhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjVhhhjhMubah}(h]jQah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjShhubj)}(hhh]h)}(h#write a series of bytes to the DPCDh]h#write a series of bytes to the DPCD}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhjShhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj$jj$jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) ``unsigned int offset`` address of the (first) register to write ``void *buffer`` buffer containing the values to write ``size_t size`` number of bytes in **buffer** **Description** Returns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. If not all bytes were transferred, this function returns -EPROTO. Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller. In most of the cases you want to use drm_dp_dpcd_write_data() instead.h](h)}(h**Parameters**h]j%)}(hj.h]h Parameters}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubji)}(hhh](jn)}(h@``struct drm_dp_aux *aux`` DisplayPort AUX channel (SST or MST) h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjMh]hstruct drm_dp_aux *aux}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjGubj)}(hhh]h)}(h$DisplayPort AUX channel (SST or MST)h]h$DisplayPort AUX channel (SST or MST)}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjcubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjbhMhjDubjn)}(hA``unsigned int offset`` address of the (first) register to write h](jt)}(h``unsigned int offset``h]jz)}(hjh]hunsigned int offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h(address of the (first) register to writeh]h(address of the (first) register to write}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjDubjn)}(h7``void *buffer`` buffer containing the values to write h](jt)}(h``void *buffer``h]jz)}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h%buffer containing the values to writeh]h%buffer containing the values to write}(hj؎hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjԎhMhjՎubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjԎhMhjDubjn)}(h.``size_t size`` number of bytes in **buffer** h](jt)}(h``size_t size``h]jz)}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hnumber of bytes in **buffer**h](hnumber of bytes in }(hjhhhNhNubj%)}(h **buffer**h]hbuffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h ]h"]h$]h&]uh1hhj hMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjDubeh}(h]h ]h"]h$]h&]uh1jhhj(ubh)}(h**Description**h]j%)}(hjAh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj(ubh)}(hXReturns the number of bytes transferred on success, or a negative error code on failure. -EIO is returned if the request was NAKed by the sink or if the retry count was exceeded. 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Errors from the underlying AUX channel transfer function, with the exception of -EBUSY (which causes the transaction to be retried), are propagated to the caller.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubh)}(hFIn most of the cases you want to use drm_dp_dpcd_write_data() instead.h]hFIn most of the cases you want to use drm_dp_dpcd_write_data() instead.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_dpcd_read_link_status (C function)c.drm_dp_dpcd_read_link_statushNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hYint drm_dp_dpcd_read_link_status (struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h]j)}(hXint drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM#ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM#ubj)}(hdrm_dp_dpcd_read_link_statush]j)}(hdrm_dp_dpcd_read_link_statush]hdrm_dp_dpcd_read_link_status}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM#ubj)}(h8(struct drm_dp_aux *aux, u8 status[DP_LINK_STATUS_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjҏhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjΏubj)}(h h]h }(hjߏhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjΏubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_dpcd_read_link_statusasbuh1hhjΏubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjΏubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjΏubj)}(hauxh]haux}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjΏubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjʏubj)}(hu8 status[DP_LINK_STATUS_SIZE]h](h)}(hhh]j)}(hu8h]hu8}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjImodnameN classnameNjj)}j]j c.drm_dp_dpcd_read_link_statusasbuh1hhj@ubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(hstatush]hstatus}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubh)}(hhh]j)}(hDP_LINK_STATUS_SIZEh]hDP_LINK_STATUS_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_dp_dpcd_read_link_statusasbuh1hhj@ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjʏubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM#ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM#ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM#hjhhubj)}(hhh]h)}(h)read DPCD link status (bytes 0x202-0x207)h]h)read DPCD link status (bytes 0x202-0x207)}(hjؐhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM#hjՐhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM#ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 status[DP_LINK_STATUS_SIZE]`` buffer to store the link status in (must be at least 6 bytes) **Description** Returns a negative error code on failure or 0 on success.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM$hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hM$hj/ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj.hM$hjubjn)}(ha``u8 status[DP_LINK_STATUS_SIZE]`` buffer to store the link status in (must be at least 6 bytes) h](jt)}(h"``u8 status[DP_LINK_STATUS_SIZE]``h]jz)}(hjRh]hu8 status[DP_LINK_STATUS_SIZE]}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM%hjLubj)}(hhh]h)}(h=buffer to store the link status in (must be at least 6 bytes)h]h=buffer to store the link status in (must be at least 6 bytes)}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghM%hjhubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhjghM%hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjubh)}(h9Returns a negative error code on failure or 0 on success.h]h9Returns a negative error code on failure or 0 on success.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM&hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_dpcd_read_phy_link_status (C function)"c.drm_dp_dpcd_read_phy_link_statushNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hzint drm_dp_dpcd_read_phy_link_status (struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h]j)}(hyint drm_dp_dpcd_read_phy_link_status(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h](j)}(hinth]hint}(hjґhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjΑhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM2ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjΑhhhjhM2ubj)}(h drm_dp_dpcd_read_phy_link_statush]j)}(h drm_dp_dpcd_read_phy_link_statush]h drm_dp_dpcd_read_phy_link_status}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjΑhhhjhM2ubj)}(hU(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy, u8 link_status[DP_LINK_STATUS_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/modnameN classnameNjj)}j]j)}jjsb"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhj ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj[hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hauxh]haux}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(henum drm_dp_phy dp_phyh](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubh)}(hhh]j)}(h drm_dp_phyh]h drm_dp_phy}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jI"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhj}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj)}(hdp_phyh]hdp_phy}(hj˒hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#u8 link_status[DP_LINK_STATUS_SIZE]h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jI"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h link_statush]h link_status}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hj!hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_LINK_STATUS_SIZEh]hDP_LINK_STATUS_SIZE}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj3modnameN classnameNjj)}j]jI"c.drm_dp_dpcd_read_phy_link_statusasbuh1hhjubj+)}(hj8Th]h]}(hjOhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjΑhhhjhM2ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjʑhhhjhM2ubah}(h]jőah ](jjeh"]h$]h&]jj)jhuh1jhjhM2hjǑhhubj)}(hhh]h)}(h,get the link status information for a DP PHYh]h,get the link status information for a DP PHY}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM2hjuhhubah}(h]h ]h"]h$]h&]uh1jhjǑhhhjhM2ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``enum drm_dp_phy dp_phy`` the DP PHY to get the link status for ``u8 link_status[DP_LINK_STATUS_SIZE]`` buffer to return the status in **Description** Fetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned **link_status** matches the DPCD register layout of the DPRX PHY link status. Returns 0 if the information was read successfully or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM6hjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM3hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjғhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjΓhM3hjϓubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjΓhM3hjubjn)}(hA``enum drm_dp_phy dp_phy`` the DP PHY to get the link status for h](jt)}(h``enum drm_dp_phy dp_phy``h]jz)}(hjh]henum drm_dp_phy dp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM4hjubj)}(hhh]h)}(h%the DP PHY to get the link status forh]h%the DP PHY to get the link status for}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM4hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM4hjubjn)}(hG``u8 link_status[DP_LINK_STATUS_SIZE]`` buffer to return the status in h](jt)}(h'``u8 link_status[DP_LINK_STATUS_SIZE]``h]jz)}(hj+h]h#u8 link_status[DP_LINK_STATUS_SIZE]}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM5hj%ubj)}(hhh]h)}(hbuffer to return the status inh]hbuffer to return the status in}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hM5hjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj@hM5hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjfh]h Description}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM7hjubh)}(hFetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned **link_status** matches the DPCD register layout of the DPRX PHY link status.h](hbFetch the AUX DPCD registers for the DPRX or an LTTPR PHY link status. The layout of the returned }(hj|hhhNhNubj%)}(h**link_status**h]h link_status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh> matches the DPCD register layout of the DPRX PHY link status.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM6hjubh)}(hWReturns 0 if the information was read successfully or a negative error code on failure.h]hWReturns 0 if the information was read successfully or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM:hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_dp_link_power_up (C function)c.drm_dp_link_power_uphNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hIint drm_dp_link_power_up (struct drm_dp_aux *aux, unsigned char revision)h]j)}(hHint drm_dp_link_power_up(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hinth]hint}(hj̔hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȔhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM]ubj)}(h h]h }(hj۔hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȔhhhjڔhM]ubj)}(hdrm_dp_link_power_uph]j)}(hdrm_dp_link_power_uph]hdrm_dp_link_power_up}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjȔhhhjڔhM]ubj)}(h0(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j)}jjsbc.drm_dp_link_power_upasbuh1hhjubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjUhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hunsigned char revisionh](j)}(hunsignedh]hunsigned}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(hrevisionh]hrevision}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjȔhhhjڔhM]ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjĔhhhjڔhM]ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjڔhM]hjhhubj)}(hhh]h)}(hpower up a DisplayPort linkh]hpower up a DisplayPort link}(hjݕhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM]hjڕhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjڔhM]ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned char revision`` DPCD revision supported on the link **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMahjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM^hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hM^hj4ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj3hM^hjubjn)}(h?``unsigned char revision`` DPCD revision supported on the link h](jt)}(h``unsigned char revision``h]jz)}(hjWh]hunsigned char revision}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjUubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM_hjQubj)}(hhh]h)}(h#DPCD revision supported on the linkh]h#DPCD revision supported on the link}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlhM_hjmubah}(h]h ]h"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]uh1jmhjlhM_hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMahjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM`hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_dp_link_power_down (C function)c.drm_dp_link_power_downhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hKint drm_dp_link_power_down (struct drm_dp_aux *aux, unsigned char revision)h]j)}(hJint drm_dp_link_power_down(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hinth]hint}(hjזhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӖhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӖhhhjhMubj)}(hdrm_dp_link_power_downh]j)}(hdrm_dp_link_power_downh]hdrm_dp_link_power_down}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjӖhhhjhMubj)}(h0(struct drm_dp_aux *aux, unsigned char revision)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj4modnameN classnameNjj)}j]j)}jjsbc.drm_dp_link_power_downasbuh1hhjubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj`hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hunsigned char revisionh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hrevisionh]hrevision}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubeh}(h]h ]h"]h$]h&]jjuh1jhjӖhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjϖhhhjhMubah}(h]jʖah ](jjeh"]h$]h&]jj)jhuh1jhjhMhj̖hhubj)}(hhh]h)}(hpower down a DisplayPort linkh]hpower down a DisplayPort link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj̖hhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``unsigned char revision`` DPCD revision supported on the link **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj)h]hstruct drm_dp_aux *aux}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj#ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj>hMhj ubjn)}(h?``unsigned char revision`` DPCD revision supported on the link h](jt)}(h``unsigned char revision``h]jz)}(hjbh]hunsigned char revision}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj\ubj)}(hhh]h)}(h#DPCD revision supported on the linkh]h#DPCD revision supported on the link}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjxubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jmhjwhMhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_dpcd_write_payload (C function)c.drm_dp_dpcd_write_payloadhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hiint drm_dp_dpcd_write_payload (struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h]j)}(hhint drm_dp_dpcd_write_payload(struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjޘhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjޘhhhjhMubj)}(hdrm_dp_dpcd_write_payloadh]j)}(hdrm_dp_dpcd_write_payloadh]hdrm_dp_dpcd_write_payload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjޘhhhjhMubj)}(hK(struct drm_dp_aux *aux, int vcpid, u8 start_time_slot, u8 time_slot_count)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]j)}jjsbc.drm_dp_dpcd_write_payloadasbuh1hhjubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjkhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h int vcpidh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hvcpidh]hvcpid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu8 start_time_sloth](h)}(hhh]j)}(hu8h]hu8}(hjəhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjƙubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj˙modnameN classnameNjj)}j]jYc.drm_dp_dpcd_write_payloadasbuh1hhj™ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj™ubj)}(hstart_time_sloth]hstart_time_slot}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj™ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu8 time_slot_counth](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jYc.drm_dp_dpcd_write_payloadasbuh1hhj ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(htime_slot_counth]htime_slot_count}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjޘhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjژhhhjhMubah}(h]j՘ah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjטhhubj)}(hhh]h)}(h2Write Virtual Channel information to payload tableh]h2Write Virtual Channel information to payload table}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjdhhubah}(h]h ]h"]h$]h&]uh1jhjטhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int vcpid`` Virtual Channel Payload ID ``u8 start_time_slot`` Starting time slot ``u8 time_slot_count`` Time slot count **Description** Write the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary. **Return** 0 on success, negative error otherwiseh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h)``int vcpid`` Virtual Channel Payload ID h](jt)}(h ``int vcpid``h]jz)}(hjh]h int vcpid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjߚubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjۚubj)}(hhh]h)}(hVirtual Channel Payload IDh]hVirtual Channel Payload ID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjۚubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h*``u8 start_time_slot`` Starting time slot h](jt)}(h``u8 start_time_slot``h]jz)}(hjh]hu8 start_time_slot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hStarting time sloth]hStarting time slot}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj0ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjubjn)}(h'``u8 time_slot_count`` Time slot count h](jt)}(h``u8 time_slot_count``h]jz)}(hjSh]hu8 time_slot_count}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjMubj)}(hhh]h)}(hTime slot counth]hTime slot count}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjhhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hqWrite the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary.h]hqWrite the Virtual Channel payload allocation table, checking the payload update status and retrying as necessary.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h&0 on success, negative error otherwiseh]h&0 on success, negative error otherwise}(hj˛hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_dpcd_clear_payload (C function)c.drm_dp_dpcd_clear_payloadhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h6int drm_dp_dpcd_clear_payload (struct drm_dp_aux *aux)h]j)}(h5int drm_dp_dpcd_clear_payload(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_dp_dpcd_clear_payloadh]j)}(hdrm_dp_dpcd_clear_payloadh]hdrm_dp_dpcd_clear_payload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjWmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_dpcd_clear_payloadasbuh1hhj3ubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3ubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h$Clear the entire VC Payload ID tableh]h$Clear the entire VC Payload ID table}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjҜjjҜjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Clear the entire VC Payload ID table. **Return** 0 on success, negative error code on errors.h](h)}(h**Parameters**h]j%)}(hjܜh]h Parameters}(hjޜhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjڜubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj֜ubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhj֜ubh)}(h**Description**h]j%)}(hj6h]h Description}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj֜ubh)}(h%Clear the entire VC Payload ID table.h]h%Clear the entire VC Payload ID table.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj֜ubh)}(h **Return**h]j%)}(hj]h]hReturn}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj֜ubh)}(h,0 on success, negative error code on errors.h]h,0 on success, negative error code on errors.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj֜ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_dpcd_poll_act_handled (C function)c.drm_dp_dpcd_poll_act_handledhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hIint drm_dp_dpcd_poll_act_handled (struct drm_dp_aux *aux, int timeout_ms)h]j)}(hHint drm_dp_dpcd_poll_act_handled(struct drm_dp_aux *aux, int timeout_ms)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_dp_dpcd_poll_act_handledh]j)}(hdrm_dp_dpcd_poll_act_handledh]hdrm_dp_dpcd_poll_act_handled}(hjÝhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h((struct drm_dp_aux *aux, int timeout_ms)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjߝhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj۝ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj۝ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjŝsbc.drm_dp_dpcd_poll_act_handledasbuh1hhj۝ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj۝ubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj۝ubj)}(hauxh]haux}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj۝ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjםubj)}(hint timeout_msh](j)}(hinth]hint}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(h timeout_msh]h timeout_ms}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjםubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hPoll for ACT handled statush]hPoll for ACT handled status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int timeout_ms`` Timeout in ms **Description** Try waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to **timeout_ms** milliseconds, defaulting to 3000 ms if 0. **Return** 0 if the ACT was handled in time, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj؞h]hstruct drm_dp_aux *aux}(hjڞhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj֞ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjҞubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjҞubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjϞubjn)}(h!``int timeout_ms`` Timeout in ms h](jt)}(h``int timeout_ms``h]jz)}(hjh]hint timeout_ms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubj)}(hhh]h)}(h Timeout in msh]h Timeout in ms}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj'ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj&hMhjϞubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjLh]h Description}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hTry waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to **timeout_ms** milliseconds, defaulting to 3000 ms if 0.h](hTry waiting for the sink to finish updating its payload table by polling for the ACT handled bit of DP_PAYLOAD_TABLE_UPDATE_STATUS for up to }(hjbhhhNhNubj%)}(h**timeout_ms**h]h timeout_ms}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjbubh* milliseconds, defaulting to 3000 ms if 0.}(hjbhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hA0 if the ACT was handled in time, negative error code on failure.h]hA0 if the ACT was handled in time, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_downstream_is_type (C function)c.drm_dp_downstream_is_typehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hcbool drm_dp_downstream_is_type (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h]j)}(hbbool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h](j)}(hjAh]hbool}(hjʟhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjƟhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM&ubj)}(h h]h }(hj؟hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjƟhhhjןhM&ubj)}(hdrm_dp_downstream_is_typeh]j)}(hdrm_dp_downstream_is_typeh]hdrm_dp_downstream_is_type}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjƟhhhjןhM&ubj)}(hD(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 type)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj&modnameN classnameNjj)}j]j)}jjsbc.drm_dp_downstream_is_typeasbuh1hhjubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hj`hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjrmodnameN classnameNjj)}j]j@c.drm_dp_downstream_is_typeasbuh1hhjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjĠhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjƠmodnameN classnameNjj)}j]j@c.drm_dp_downstream_is_typeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubhdesc_sig_literal_number)}(h4h]h4}(hj hhhNhNubah}(h]h ]mah"]h$]h&]uh1j hjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu8 typeh](h)}(hhh]j)}(hu8h]hu8}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9modnameN classnameNjj)}j]j@c.drm_dp_downstream_is_typeasbuh1hhj0ubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(htypeh]htype}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjƟhhhjןhM&ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjŸhhhjןhM&ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjןhM&hjhhubj)}(hhh]h)}(h.is the downstream facing port of certain type?h]h.is the downstream facing port of certain type?}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM&hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjןhM&ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``u8 type`` port type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``. **Description** Caveat: Only works with DPCD 1.1+ port caps. **Return** whether the downstream facing port matches the type.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM*hjubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjΡh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjСhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj̡ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM'hjȡubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM'hjubah}(h]h ]h"]h$]h&]uh1jhjȡubeh}(h]h ]h"]h$]h&]uh1jmhjhM'hjšubjn)}(h+``const u8 port_cap[4]`` port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hjh]hconst u8 port_cap[4]}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM(hjubj)}(hhh]h)}(hport capabilitiesh]hport capabilities}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM(hjšubjn)}(h``u8 type`` port type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``. h](jt)}(h ``u8 type``h]jz)}(hj@h]hu8 type}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM,hj:ubj)}(hhh]h)}(hport type to be checked. Can be: ``DP_DS_PORT_TYPE_DP``, ``DP_DS_PORT_TYPE_VGA``, ``DP_DS_PORT_TYPE_DVI``, ``DP_DS_PORT_TYPE_HDMI``, ``DP_DS_PORT_TYPE_NON_EDID``, ``DP_DS_PORT_TYPE_DP_DUALMODE`` or ``DP_DS_PORT_TYPE_WIRELESS``.h](h!port type to be checked. Can be: }(hjYhhhNhNubjz)}(h``DP_DS_PORT_TYPE_DP``h]hDP_DS_PORT_TYPE_DP}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubh, }(hjYhhhNhNubjz)}(h``DP_DS_PORT_TYPE_VGA``h]hDP_DS_PORT_TYPE_VGA}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubh, }hjYsbjz)}(h``DP_DS_PORT_TYPE_DVI``h]hDP_DS_PORT_TYPE_DVI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubh, }(hjYhhhNhNubjz)}(h``DP_DS_PORT_TYPE_HDMI``h]hDP_DS_PORT_TYPE_HDMI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubh, }hjYsbjz)}(h``DP_DS_PORT_TYPE_NON_EDID``h]hDP_DS_PORT_TYPE_NON_EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubh, }hjYsbjz)}(h``DP_DS_PORT_TYPE_DP_DUALMODE``h]hDP_DS_PORT_TYPE_DP_DUALMODE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubh or }(hjYhhhNhNubjz)}(h``DP_DS_PORT_TYPE_WIRELESS``h]hDP_DS_PORT_TYPE_WIRELESS}(hj͢hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubh.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM)hjVubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhjUhM,hjšubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM.hjubh)}(h,Caveat: Only works with DPCD 1.1+ port caps.h]h,Caveat: Only works with DPCD 1.1+ port caps.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM-hjubh)}(h **Return**h]j%)}(hj!h]hReturn}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM/hjubh)}(h4whether the downstream facing port matches the type.h]h4whether the downstream facing port matches the type.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM0hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_downstream_is_tmds (C function)c.drm_dp_downstream_is_tmdshNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h{bool drm_dp_downstream_is_tmds (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j)}(hzbool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hjAh]hbool}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM<ubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhjshM<ubj)}(hdrm_dp_downstream_is_tmdsh]j)}(hdrm_dp_downstream_is_tmdsh]hdrm_dp_downstream_is_tmds}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjbhhhjshM<ubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj£modnameN classnameNjj)}j]j)}jjsbc.drm_dp_downstream_is_tmdsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jܣc.drm_dp_downstream_is_tmdsasbuh1hhjubj+)}(hj8Th]h]}(hj*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubh)}(hhh]j)}(hu8h]hu8}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjbmodnameN classnameNjj)}j]jܣc.drm_dp_downstream_is_tmdsasbuh1hhj>ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj>ubj )}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj>ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hj̤hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȤubj)}(h h]h }(hj٤hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȤubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȤubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȤubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jܣc.drm_dp_downstream_is_tmdsasbuh1hhjȤubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȤubj+)}(hj9h]h*}(hj1hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjȤubj)}(hdrm_edidh]hdrm_edid}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȤubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjbhhhjshM<ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj^hhhjshM<ubah}(h]jYah ](jjeh"]h$]h&]jj)jhuh1jhjshM<hj[hhubj)}(hhh]h)}(h#is the downstream facing port TMDS?h]h#is the downstream facing port TMDS?}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjehhubah}(h]h ]h"]h$]h&]uh1jhj[hhhjshM<ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** whether the downstream facing port is TMDS (HDMI/DVI).h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj¥hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM=hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM=hjubjn)}(h+``const u8 port_cap[4]`` port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjܥubj)}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1jhjܥubeh}(h]h ]h"]h$]h&]uh1jmhjhM>hjubjn)}(h)``const struct drm_edid *drm_edid`` EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjubj)}(hhh]h)}(hEDIDh]hEDID}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hM?hj1ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj0hM?hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjVh]hReturn}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubh)}(h6whether the downstream facing port is TMDS (HDMI/DVI).h]h6whether the downstream facing port is TMDS (HDMI/DVI).}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_dp_send_real_edid_checksum (C function) c.drm_dp_send_real_edid_checksumhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hSbool drm_dp_send_real_edid_checksum (struct drm_dp_aux *aux, u8 real_edid_checksum)h]j)}(hRbool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux, u8 real_edid_checksum)h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM_ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM_ubj)}(hdrm_dp_send_real_edid_checksumh]j)}(hdrm_dp_send_real_edid_checksumh]hdrm_dp_send_real_edid_checksum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM_ubj)}(h/(struct drm_dp_aux *aux, u8 real_edid_checksum)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjצhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӦubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӦubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb c.drm_dp_send_real_edid_checksumasbuh1hhjӦubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӦubj+)}(hj9h]h*}(hj#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjӦubj)}(hauxh]haux}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӦubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjϦubj)}(hu8 real_edid_checksumh](h)}(hhh]j)}(hu8h]hu8}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjNmodnameN classnameNjj)}j]j c.drm_dp_send_real_edid_checksumasbuh1hhjEubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(hreal_edid_checksumh]hreal_edid_checksum}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjϦubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM_ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM_ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM_hjhhubj)}(hhh]h)}(h"send back real edid checksum valueh]h"send back real edid checksum value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM_hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM_ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 real_edid_checksum`` real edid checksum for the last block **Return** True on successh](h)}(h**Parameters**h]j%)}(hjħh]h Parameters}(hjƧhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj§ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMchjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM`hjݧubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM`hjubah}(h]h ]h"]h$]h&]uh1jhjݧubeh}(h]h ]h"]h$]h&]uh1jmhjhM`hjڧubjn)}(h@``u8 real_edid_checksum`` real edid checksum for the last block h](jt)}(h``u8 real_edid_checksum``h]jz)}(hjh]hu8 real_edid_checksum}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMahjubj)}(hhh]h)}(h%real edid checksum for the last blockh]h%real edid checksum for the last block}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hMahj2ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj1hMahjڧubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjWh]hReturn}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMchjubh)}(hTrue on successh]hTrue on success}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMchjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_dp_read_dpcd_caps (C function)c.drm_dp_read_dpcd_capshNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hQint drm_dp_read_dpcd_caps (struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j)}(hPint drm_dp_read_dpcd_caps(struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_dp_read_dpcd_capsh]j)}(hdrm_dp_read_dpcd_capsh]hdrm_dp_read_dpcd_caps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h7(struct drm_dp_aux *aux, u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj٨hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjըubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjըubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_read_dpcd_capsasbuh1hhjըubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjըubj+)}(hj9h]h*}(hj%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjըubj)}(hauxh]haux}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjըubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjѨubj)}(hu8 dpcd[DP_RECEIVER_CAP_SIZE]h](h)}(hhh]j)}(hu8h]hu8}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjPmodnameN classnameNjj)}j]jc.drm_dp_read_dpcd_capsasbuh1hhjGubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj)}(hdpcdh]hdpcd}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjGubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_read_dpcd_capsasbuh1hhjGubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjGubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjѨubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h2read DPCD caps and extended DPCD caps if availableh]h2read DPCD caps and extended DPCD caps if available}(hjߩhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjܩhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 dpcd[DP_RECEIVER_CAP_SIZE]`` Buffer to store the resulting DPCD in **Description** Attempts to read the base DPCD caps for **aux**. Additionally, this function checks for and reads the extended DPRX caps (``DP_DP13_DPCD_REV``) if present. **Return** ``0`` if the DPCD was read successfully, negative error code otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj h]hstruct drm_dp_aux *aux}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hMhjubjn)}(hH``u8 dpcd[DP_RECEIVER_CAP_SIZE]`` Buffer to store the resulting DPCD in h](jt)}(h!``u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjYh]hu8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjSubj)}(hhh]h)}(h%Buffer to store the resulting DPCD inh]h%Buffer to store the resulting DPCD in}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jmhjnhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hAttempts to read the base DPCD caps for **aux**. Additionally, this function checks for and reads the extended DPRX caps (``DP_DP13_DPCD_REV``) if present.h](h(Attempts to read the base DPCD caps for }(hjhhhNhNubj%)}(h**aux**h]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhK. Additionally, this function checks for and reads the extended DPRX caps (}(hjhhhNhNubjz)}(h``DP_DP13_DPCD_REV``h]hDP_DP13_DPCD_REV}(hjĪhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh ) if present.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h **Return**h]j%)}(hjߪh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjݪubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hG``0`` if the DPCD was read successfully, negative error code otherwise.h](jz)}(h``0``h]h0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubhB if the DPCD was read successfully, negative error code otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_read_downstream_info (C function)c.drm_dp_read_downstream_infohNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hint drm_dp_read_downstream_info (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h]j)}(hint drm_dp_read_downstream_info(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h](j)}(hinth]hint}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.hhhj@hMubj)}(hdrm_dp_read_downstream_infoh]j)}(hdrm_dp_read_downstream_infoh]hdrm_dp_read_downstream_info}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ](jjeh"]h$]h&]jjuh1jhj.hhhj@hMubj)}(hk(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjUsbc.drm_dp_read_downstream_infoasbuh1hhjkubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjkubj)}(hauxh]haux}(hjȫhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjgubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݫubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݫubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_read_downstream_infoasbuh1hhjݫubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݫubj)}(hdpcdh]hdpcd}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݫubj+)}(hj Th]h[}(hj9hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjݫubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjKmodnameN classnameNjj)}j]jc.drm_dp_read_downstream_infoasbuh1hhjݫubj+)}(hj8Th]h]}(hjghhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjݫubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjgubj)}(h,u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_read_downstream_infoasbuh1hhj{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj)}(hdownstream_portsh]hdownstream_ports}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj{ubh)}(hhh]j)}(hDP_MAX_DOWNSTREAM_PORTSh]hDP_MAX_DOWNSTREAM_PORTS}(hj̬hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɬubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjάmodnameN classnameNjj)}j]jc.drm_dp_read_downstream_infoasbuh1hhj{ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj{ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjgubeh}(h]h ]h"]h$]h&]jjuh1jhj.hhhj@hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj*hhhj@hMubah}(h]j%ah ](jjeh"]h$]h&]jj)jhuh1jhj@hMhj'hhubj)}(hhh]h)}(h+read DPCD downstream port info if availableh]h+read DPCD downstream port info if available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj'hhhj@hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the port's DPCD ``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]`` buffer to store the downstream port info in **Description** See also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc() **Return** 0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.h](h)}(h**Parameters**h]j%)}(hj5h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjTh]hstruct drm_dp_aux *aux}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjNubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMhjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjihMhjKubjn)}(hI``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the port's DPCD h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h A cached copy of the port's DPCDh]h"A cached copy of the port’s DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjKubjn)}(h]``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]`` buffer to store the downstream port info in h](jt)}(h0``u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]``h]jz)}(hjƭh]h,u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]}(hjȭhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjĭubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h+buffer to store the downstream port info inh]h+buffer to store the downstream port info in}(hj߭hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjۭhMhjܭubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjۭhMhjKubeh}(h]h ]h"]h$]h&]uh1jhhj/ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubh)}(hCSee also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc()h]hCSee also: drm_dp_downstream_max_clock() drm_dp_downstream_max_bpc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubh)}(h **Return**h]j%)}(hj(h]hReturn}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubh)}(h0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.h]h0 if either the downstream port info was read successfully or there was no downstream info to read, or a negative error code otherwise.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_dp_downstream_max_dotclock (C function) c.drm_dp_downstream_max_dotclockhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h^int drm_dp_downstream_max_dotclock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j)}(h]int drm_dp_downstream_max_dotclock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hinth]hint}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjihhhj{hMubj)}(hdrm_dp_downstream_max_dotclockh]j)}(hdrm_dp_downstream_max_dotclockh]hdrm_dp_downstream_max_dotclock}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjihhhj{hMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjȮhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŮubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjʮmodnameN classnameNjj)}j]j)}jjsb c.drm_dp_downstream_max_dotclockasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_dp_downstream_max_dotclockasbuh1hhjubj+)}(hj8Th]h]}(hj2hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubh)}(hhh]j)}(hu8h]hu8}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjjmodnameN classnameNjj)}j]j c.drm_dp_downstream_max_dotclockasbuh1hhjFubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjFubj )}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjFubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjihhhj{hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjehhhj{hMubah}(h]j`ah ](jjeh"]h$]h&]jj)jhuh1jhj{hMhjbhhubj)}(hhh]h)}(h,extract downstream facing port max dot clockh]h,extract downstream facing port max dot clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjbhhhj{hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Return** Downstream facing port max dot clock in kHz on success, or 0 if max clock not definedh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hj&h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj;hMhjubjn)}(h+``const u8 port_cap[4]`` port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hj_h]hconst u8 port_cap[4]}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjYubj)}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjuubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jmhjthMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjubh)}(hUDownstream facing port max dot clock in kHz on success, or 0 if max clock not definedh]hUDownstream facing port max dot clock in kHz on success, or 0 if max clock not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM!hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_downstream_max_tmds_clock (C function)"c.drm_dp_downstream_max_tmds_clockhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hint drm_dp_downstream_max_tmds_clock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j)}(hint drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hj߰hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj۰hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM9ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj۰hhhjhM9ubj)}(h drm_dp_downstream_max_tmds_clockh]j)}(h drm_dp_downstream_max_tmds_clockh]h drm_dp_downstream_max_tmds_clock}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj۰hhhjhM9ubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j)}jjsb"c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjvhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jV"c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjɱhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjڱhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjױubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjܱmodnameN classnameNjj)}j]jV"c.drm_dp_downstream_max_tmds_clockasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj )}(hjh]h4}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj+)}(hj8Th]h]}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(hjh]hstruct}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jV"c.drm_dp_downstream_max_tmds_clockasbuh1hhjBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBubj)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj۰hhhjhM9ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjװhhhjhM9ubah}(h]jҰah ](jjeh"]h$]h&]jj)jhuh1jhjhM9hj԰hhubj)}(hhh]h)}(h-extract downstream facing port max TMDS clockh]h-extract downstream facing port max TMDS clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM9hj߲hhubah}(h]h ]h"]h$]h&]uh1jhj԰hhhjhM9ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX$**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** HDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not definedh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hj#h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM:hjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM:hj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj8hM:hjubjn)}(h+``const u8 port_cap[4]`` port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hj\h]hconst u8 port_cap[4]}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM;hjVubj)}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhM;hjrubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjqhM;hjubjn)}(h)``const struct drm_edid *drm_edid`` EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjubj)}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM<hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM<hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjгh]hReturn}(hjҳhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjγubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubh)}(hdHDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not definedh]hdHDMI/DVI downstream facing port max TMDS clock in kHz on success, or 0 if max TMDS clock not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_downstream_min_tmds_clock (C function)"c.drm_dp_downstream_min_tmds_clockhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hint drm_dp_downstream_min_tmds_clock (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j)}(hint drm_dp_downstream_min_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMzubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj#hMzubj)}(h drm_dp_downstream_min_tmds_clockh]j)}(h drm_dp_downstream_min_tmds_clockh]h drm_dp_downstream_min_tmds_clock}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj#hMzubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubh)}(hhh]j)}(hu8h]hu8}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjrmodnameN classnameNjj)}j]j)}jj8sb"c.drm_dp_downstream_min_tmds_clockasbuh1hhjNubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjNubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j"c.drm_dp_downstream_min_tmds_clockasbuh1hhjNubj+)}(hj8Th]h]}(hjڴhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjNubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j"c.drm_dp_downstream_min_tmds_clockasbuh1hhjubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hport_caph]hport_cap}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjJhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj )}(hjh]h4}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj+)}(hj8Th]h]}(hjdhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubj)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j"c.drm_dp_downstream_min_tmds_clockasbuh1hhjxubj)}(h h]h }(hjӵhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjxubj)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj#hMzubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj#hMzubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj#hMzhj hhubj)}(hhh]h)}(h-extract downstream facing port min TMDS clockh]h-extract downstream facing port min TMDS clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMzhjhhubah}(h]h ]h"]h$]h&]uh1jhj hhhj#hMzubeh}(h]h ](jfunctioneh"]h$]h&]jjjj0jj0jjjuh1jhhhjAhNhNubj)}(hX$**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** HDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not definedh](h)}(h**Parameters**h]j%)}(hj:h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM~hj4ubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjYh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM{hjSubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhM{hjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jmhjnhM{hjPubjn)}(h+``const u8 port_cap[4]`` port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM|hjubj)}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM|hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM|hjPubjn)}(h)``const struct drm_edid *drm_edid`` EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hj˶h]hconst struct drm_edid *drm_edid}(hjͶhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjɶubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM}hjŶubj)}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM}hjubah}(h]h ]h"]h$]h&]uh1jhjŶubeh}(h]h ]h"]h$]h&]uh1jmhjhM}hjPubeh}(h]h ]h"]h$]h&]uh1jhhj4ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubh)}(hdHDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not definedh]hdHDMI/DVI downstream facing port min TMDS clock in kHz on success, or 0 if max TMDS clock not defined}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_downstream_max_bpc (C function)c.drm_dp_downstream_max_bpchNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hzint drm_dp_downstream_max_bpc (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h]j)}(hyint drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhjYhMubj)}(hdrm_dp_downstream_max_bpch]j)}(hdrm_dp_downstream_max_bpch]hdrm_dp_downstream_max_bpc}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubah}(h]h ](jjeh"]h$]h&]jjuh1jhjGhhhjYhMubj)}(h\(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], const struct drm_edid *drm_edid)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjnsbc.drm_dp_downstream_max_bpcasbuh1hhjubj)}(h h]h }(hjƷhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjԷhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j·c.drm_dp_downstream_max_bpcasbuh1hhjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubh)}(hhh]j)}(hu8h]hu8}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjHmodnameN classnameNjj)}j]j·c.drm_dp_downstream_max_bpcasbuh1hhj$ubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(hport_caph]hport_cap}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj$ubj )}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj$ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj͸hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjڸhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j·c.drm_dp_downstream_max_bpcasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdrm_edidh]hdrm_edid}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjGhhhjYhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjChhhjYhMubah}(h]j>ah ](jjeh"]h$]h&]jj)jhuh1jhjYhMhj@hhubj)}(hhh]h)}(h5extract downstream facing port max bits per componenth]h5extract downstream facing port max bits per component}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjKhhubah}(h]h ]h"]h$]h&]uh1jhj@hhhjYhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjfjjfjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities ``const struct drm_edid *drm_edid`` EDID **Return** Max bpc on success or 0 if max bpc not definedh](h)}(h**Parameters**h]j%)}(hjph]h Parameters}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjjubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hjȹh]hconst u8 port_cap[4]}(hjʹhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjƹubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj¹ubj)}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjݹhMhj޹ubah}(h]h ]h"]h$]h&]uh1jhj¹ubeh}(h]h ]h"]h$]h&]uh1jmhjݹhMhjubjn)}(h)``const struct drm_edid *drm_edid`` EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjjubh)}(h **Return**h]j%)}(hj<h]hReturn}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjjubh)}(h.Max bpc on success or 0 if max bpc not definedh]h.Max bpc on success or 0 if max bpc not defined}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_dp_downstream_420_passthrough (C function)#c.drm_dp_downstream_420_passthroughhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hbbool drm_dp_downstream_420_passthrough (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j)}(habool drm_dp_downstream_420_passthrough(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}hhhjhMubj)}(h!drm_dp_downstream_420_passthroughh]j)}(h!drm_dp_downstream_420_passthroughh]h!drm_dp_downstream_420_passthrough}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj}hhhjhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjʺhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjۺhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjغubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjݺmodnameN classnameNjj)}j]j)}jjsb#c.drm_dp_downstream_420_passthroughasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]j#c.drm_dp_downstream_420_passthroughasbuh1hhjubj+)}(hj8Th]h]}(hjEhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubh)}(hhh]j)}(hu8h]hu8}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj}modnameN classnameNjj)}j]j#c.drm_dp_downstream_420_passthroughasbuh1hhjYubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj)}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjYubj )}(hjh]h4}(hj»hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjYubj+)}(hj8Th]h]}(hjϻhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjYubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj}hhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjyhhhjhMubah}(h]jtah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjvhhubj)}(hhh]h)}(hDdetermine downstream facing port YCbCr 4:2:0 pass-through capabilityh]hDdetermine downstream facing port YCbCr 4:2:0 pass-through capability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjvhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities **Return** whether the downstream facing port can pass through YCbCr 4:2:0h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hj9h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhMhjOubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jmhjNhMhj0ubjn)}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hjrh]hconst u8 port_cap[4]}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjlubj)}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj0ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(h?whether the downstream facing port can pass through YCbCr 4:2:0h]h?whether the downstream facing port can pass through YCbCr 4:2:0}(hjühhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_dp_downstream_444_to_420_conversion (C function))c.drm_dp_downstream_444_to_420_conversionhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hhbool drm_dp_downstream_444_to_420_conversion (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j)}(hgbool drm_dp_downstream_444_to_420_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h'drm_dp_downstream_444_to_420_conversionh]j)}(h'drm_dp_downstream_444_to_420_conversionh]h'drm_dp_downstream_444_to_420_conversion}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubh)}(hhh]j)}(hu8h]hu8}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjNmodnameN classnameNjj)}j]j)}jjsb)c.drm_dp_downstream_444_to_420_conversionasbuh1hhj*ubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj)}(hdpcdh]hdpcd}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj*ubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jh)c.drm_dp_downstream_444_to_420_conversionasbuh1hhj*ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj*ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjνhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjʽubj)}(h h]h }(hj۽hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjʽubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jh)c.drm_dp_downstream_444_to_420_conversionasbuh1hhjʽubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjʽubj)}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjʽubj+)}(hj Th]h[}(hj&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjʽubj )}(hjh]h4}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjʽubj+)}(hj8Th]h]}(hj@hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjʽubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj&ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hIdetermine downstream facing port YCbCr 4:4:4->4:2:0 conversion capabilityh]hIdetermine downstream facing port YCbCr 4:4:4->4:2:0 conversion capability}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjfhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities **Return** whether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjþhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjݾubj)}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjݾubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubh)}(hCwhether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0h]hCwhether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6drm_dp_downstream_rgb_to_ycbcr_conversion (C function)+c.drm_dp_downstream_rgb_to_ycbcr_conversionhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hxbool drm_dp_downstream_rgb_to_ycbcr_conversion (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h]j)}(hwbool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h](j)}(hjAh]hbool}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_hhhjphMubj)}(h)drm_dp_downstream_rgb_to_ycbcr_conversionh]j)}(h)drm_dp_downstream_rgb_to_ycbcr_conversionh]h)drm_dp_downstream_rgb_to_ycbcr_conversion}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj_hhhjphMubj)}(hI(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4], u8 color_spc)h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjubj)}(h h]h }(hjݿhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jٿ+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjubj+)}(hj8Th]h]}(hj'hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hu8h]hu8}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_modnameN classnameNjj)}j]jٿ+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhj;ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(hport_caph]hport_cap}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubj )}(hjh]h4}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hj;ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h u8 color_spch](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jٿ+c.drm_dp_downstream_rgb_to_ycbcr_conversionasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h color_spch]h color_spc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj_hhhjphMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj[hhhjphMubah}(h]jVah ](jjeh"]h$]h&]jj)jhuh1jhjphMhjXhhubj)}(hhh]h)}(hAdetermine downstream facing port RGB->YCbCr conversion capabilityh]hAdetermine downstream facing port RGB->YCbCr conversion capability}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjXhhhjphMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhjAhNhNubj)}(hX9**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` downstream facing port capabilities ``u8 color_spc`` Colorspace for which conversion cap is sought **Return** whether the downstream facing port can convert RGB->YCbCr for a given colorspace.h](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj>ubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjch]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj]ubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjZubjn)}(h=``const u8 port_cap[4]`` downstream facing port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hjh]hconst u8 port_cap[4]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h#downstream facing port capabilitiesh]h#downstream facing port capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjZubjn)}(h?``u8 color_spc`` Colorspace for which conversion cap is sought h](jt)}(h``u8 color_spc``h]jz)}(hjh]h u8 color_spc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjubj)}(hhh]h)}(h-Colorspace for which conversion cap is soughth]h-Colorspace for which conversion cap is sought}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjZubeh}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj>ubh)}(hQwhether the downstream facing port can convert RGB->YCbCr for a given colorspace.h]hQwhether the downstream facing port can convert RGB->YCbCr for a given colorspace.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj>ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_dp_downstream_mode (C function)c.drm_dp_downstream_modehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hstruct drm_display_mode * drm_dp_downstream_mode (struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j)}(hstruct drm_display_mode *drm_dp_downstream_mode(struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hjh]hstruct}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM:ubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQhhhjbhM:ubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjvmodnameN classnameNjj)}j]j)}jdrm_dp_downstream_modesbc.drm_dp_downstream_modeasbuh1hhjQhhhjbhM:ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQhhhjbhM:ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjQhhhjbhM:ubj)}(hdrm_dp_downstream_modeh]j)}(hjh]hdrm_dp_downstream_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjQhhhjbhM:ubj)}(hS(struct drm_device *dev, const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_downstream_modeasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hu8h]hu8}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_modnameN classnameNjj)}j]jc.drm_dp_downstream_modeasbuh1hhj;ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_downstream_modeasbuh1hhj;ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_downstream_modeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hport_caph]hport_cap}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj )}(hjh]h4}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj+)}(hj8Th]h]}(hjOhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjQhhhjbhM:ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjMhhhjbhM:ubah}(h]jHah ](jjeh"]h$]h&]jj)jhuh1jhjbhM:hjJhhubj)}(hhh]h)}(h(return a mode for downstream facing porth]h(return a mode for downstream facing port}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM:hjuhhubah}(h]h ]h"]h$]h&]uh1jhjJhhhjbhM:ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hXF**Parameters** ``struct drm_device *dev`` DRM device ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Description** Provides a suitable mode for downstream facing ports without EDID. **Return** A new drm_display_mode on success or NULL on failureh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM;hjubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM;hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM;hjubjn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM<hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM<hjubjn)}(h+``const u8 port_cap[4]`` port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hj+h]hconst u8 port_cap[4]}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM=hj%ubj)}(hhh]h)}(hport capabilitiesh]hport capabilities}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hM=hjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj@hM=hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjfh]h Description}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjubh)}(hBProvides a suitable mode for downstream facing ports without EDID.h]hBProvides a suitable mode for downstream facing ports without EDID.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM>hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjubh)}(h4A new drm_display_mode on success or NULL on failureh]h4A new drm_display_mode on success or NULL on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_dp_downstream_id (C function)c.drm_dp_downstream_idhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h=int drm_dp_downstream_id (struct drm_dp_aux *aux, char id[6])h]j)}(hhjubj)}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM>hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM@hjubh)}(h&See also: drm_dp_read_sink_count_cap()h]h&See also: drm_dp_read_sink_count_cap()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM?hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMAhjubh)}(hOThe current sink count reported by **aux**, or a negative error code otherwise.h](h#The current sink count reported by }(hj(hhhNhNubj%)}(h**aux**h]haux}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubh%, or a negative error code otherwise.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMBhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_dp_remote_aux_init (C function)c.drm_dp_remote_aux_inithNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h4void drm_dp_remote_aux_init (struct drm_dp_aux *aux)h]j)}(h3void drm_dp_remote_aux_init(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhjwhM ubj)}(hdrm_dp_remote_aux_inith]j)}(hdrm_dp_remote_aux_inith]hdrm_dp_remote_aux_init}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjehhhjwhM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_remote_aux_initasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjehhhjwhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjahhhjwhM ubah}(h]j\ah ](jjeh"]h$]h&]jj)jhuh1jhjwhM hj^hhubj)}(hhh]h)}(h)minimally initialise a remote aux channelh]h)minimally initialise a remote aux channel}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj&hhubah}(h]h ]h"]h$]h&]uh1jhj^hhhjwhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjAjjAjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Used for remote aux channel in general. Merely initialize the crc work struct.h](h)}(h**Parameters**h]j%)}(hjKh]h Parameters}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjEubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjjh]hstruct drm_dp_aux *aux}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjdubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjaubah}(h]h ]h"]h$]h&]uh1jhhjEubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjEubh)}(hNUsed for remote aux channel in general. Merely initialize the crc work struct.h]hNUsed for remote aux channel in general. Merely initialize the crc work struct.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjEubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_aux_init (C function)c.drm_dp_aux_inithNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h-void drm_dp_aux_init (struct drm_dp_aux *aux)h]j)}(h,void drm_dp_aux_init(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM% ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM% ubj)}(hdrm_dp_aux_inith]j)}(hdrm_dp_aux_inith]hdrm_dp_aux_init}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM% ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjGmodnameN classnameNjj)}j]j)}jj sbc.drm_dp_aux_initasbuh1hhj#ubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj+)}(hj9h]h*}(hjshhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj#ubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM% ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM% ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM% hjhhubj)}(hhh]h)}(h#minimally initialise an aux channelh]h#minimally initialise an aux channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM% hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM% ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hXK**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** If you need to use the drm_dp_aux's i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a :c:type:`drm_connector`), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign :c:type:`drm_dp_aux.drm_dev ` as early as possible so that the :c:type:`drm_device` that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers. For devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM) hjubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM& hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM& hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM& hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj&h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM( hjubh)}(hXsIf you need to use the drm_dp_aux's i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a :c:type:`drm_connector`), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign :c:type:`drm_dp_aux.drm_dev ` as early as possible so that the :c:type:`drm_device` that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers.h](hIf you need to use the drm_dp_aux’s i2c adapter prior to registering it with the outside world, call drm_dp_aux_init() first. For drivers which are grandparents to their AUX adapters (e.g. the AUX adapter is parented by a }(hj<hhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjFh]h drm_connector}(hjHhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM' hj<ubh), you must still call drm_dp_aux_register() once the connector has been registered to allow userspace access to the auxiliary DP channel. Likewise, for such drivers you should also assign }(hj<hhhNhNubh)}(h):c:type:`drm_dp_aux.drm_dev `h]jz)}(hjjh]hdrm_dp_aux.drm_dev}(hjlhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_dp_auxuh1hhjchM' hj<ubh" as early as possible so that the }(hj<hhhNhNubh)}(h:c:type:`drm_device`h]jz)}(hjh]h drm_device}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjchM' hj<ubhb that corresponds to the AUX adapter may be mentioned in debugging output from the DRM DP helpers.}(hj<hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjchM' hjubh)}(hFor devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.h]hFor devices which use a separate platform device for their AUX adapters, this may be called as early as required by the driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM0 hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_aux_register (C function)c.drm_dp_aux_registerhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h0int drm_dp_aux_register (struct drm_dp_aux *aux)h]j)}(h/int drm_dp_aux_register(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMD ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMD ubj)}(hdrm_dp_aux_registerh]j)}(hdrm_dp_aux_registerh]hdrm_dp_aux_register}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMD ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@modnameN classnameNjj)}j]j)}jjsbc.drm_dp_aux_registerasbuh1hhjubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjlhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMD ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMD ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMD hjhhubj)}(hhh]h)}(h#initialise and register aux channelh]h#initialise and register aux channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMD hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMD ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Automatically calls drm_dp_aux_init() if this hasn't been done yet. This should only be called once the parent of **aux**, :c:type:`drm_dp_aux.dev `, is initialized. For devices which are grandparents of their AUX channels, :c:type:`drm_dp_aux.dev ` will typically be the :c:type:`drm_connector` :c:type:`device` which corresponds to **aux**. For these devices, it's advised to call drm_dp_aux_register() in :c:type:`drm_connector_funcs.late_register `, and likewise to call drm_dp_aux_unregister() in :c:type:`drm_connector_funcs.early_unregister `. Functions which don't follow this will likely Oops when ``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV`` is enabled. For devices where the AUX channel is a device that exists independently of the :c:type:`drm_device` that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a :c:type:`drm_device` has been assigned to :c:type:`drm_dp_aux.drm_dev `, and likewise to call drm_dp_aux_unregister() once the :c:type:`drm_device` should no longer be associated with the AUX channel (e.g. on bridge detach). Drivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMH hjubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chME hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhME hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhME hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMG hjubh)}(hXAutomatically calls drm_dp_aux_init() if this hasn't been done yet. This should only be called once the parent of **aux**, :c:type:`drm_dp_aux.dev `, is initialized. For devices which are grandparents of their AUX channels, :c:type:`drm_dp_aux.dev ` will typically be the :c:type:`drm_connector` :c:type:`device` which corresponds to **aux**. For these devices, it's advised to call drm_dp_aux_register() in :c:type:`drm_connector_funcs.late_register `, and likewise to call drm_dp_aux_unregister() in :c:type:`drm_connector_funcs.early_unregister `. Functions which don't follow this will likely Oops when ``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV`` is enabled.h](htAutomatically calls drm_dp_aux_init() if this hasn’t been done yet. This should only be called once the parent of }(hj5hhhNhNubj%)}(h**aux**h]haux}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubh, }(hj5hhhNhNubh)}(h%:c:type:`drm_dp_aux.dev `h]jz)}(hjQh]hdrm_dp_aux.dev}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_dp_auxuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMF hj5ubhL, is initialized. For devices which are grandparents of their AUX channels, }(hj5hhhNhNubh)}(h%:c:type:`drm_dp_aux.dev `h]jz)}(hjuh]hdrm_dp_aux.dev}(hjwhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_dp_auxuh1hhjnhMF hj5ubh will typically be the }(hj5hhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjnhMF hj5ubh }(hj5hhhNhNubh)}(h:c:type:`device`h]jz)}(hjh]hdevice}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdeviceuh1hhjnhMF hj5ubh which corresponds to }(hj5hhhNhNubj%)}(h**aux**h]haux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubhE. For these devices, it’s advised to call drm_dp_aux_register() in }(hj5hhhNhNubh)}(hA:c:type:`drm_connector_funcs.late_register `h]jz)}(hjh]h!drm_connector_funcs.late_register}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_funcsuh1hhjnhMF hj5ubh2, and likewise to call drm_dp_aux_unregister() in }(hj5hhhNhNubh)}(hD:c:type:`drm_connector_funcs.early_unregister `h]jz)}(hjh]h$drm_connector_funcs.early_unregister}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_funcsuh1hhjnhMF hj5ubh<. Functions which don’t follow this will likely Oops when }(hj5hhhNhNubjz)}(h%``CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV``h]h!CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5ubh is enabled.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjnhMF hjubh)}(hXFor devices where the AUX channel is a device that exists independently of the :c:type:`drm_device` that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a :c:type:`drm_device` has been assigned to :c:type:`drm_dp_aux.drm_dev `, and likewise to call drm_dp_aux_unregister() once the :c:type:`drm_device` should no longer be associated with the AUX channel (e.g. on bridge detach).h](hOFor devices where the AUX channel is a device that exists independently of the }(hjLhhhNhNubh)}(h:c:type:`drm_device`h]jz)}(hjVh]h drm_device}(hjXhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjTubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMP hjLubhh that uses it, such as SoCs and bridge devices, it is recommended to call drm_dp_aux_register() after a }(hjLhhhNhNubh)}(h:c:type:`drm_device`h]jz)}(hjzh]h drm_device}(hj|hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjshMP hjLubh has been assigned to }(hjLhhhNhNubh)}(h):c:type:`drm_dp_aux.drm_dev `h]jz)}(hjh]hdrm_dp_aux.drm_dev}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_dp_auxuh1hhjshMP hjLubh8, and likewise to call drm_dp_aux_unregister() once the }(hjLhhhNhNubh)}(h:c:type:`drm_device`h]jz)}(hjh]h drm_device}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjshMP hjLubhM should no longer be associated with the AUX channel (e.g. on bridge detach).}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjshMP hjubh)}(hDrivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration.h]hDrivers which need to use the aux channel before either of the two points mentioned above need to call drm_dp_aux_init() in order to use the AUX channel before registration.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMW hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM[ hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_dp_aux_unregister (C function)c.drm_dp_aux_unregisterhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h3void drm_dp_aux_unregister (struct drm_dp_aux *aux)h]j)}(h2void drm_dp_aux_unregister(struct drm_dp_aux *aux)h](j)}(hvoidh]hvoid}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM| ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!hhhj3hM| ubj)}(hdrm_dp_aux_unregisterh]j)}(hdrm_dp_aux_unregisterh]hdrm_dp_aux_unregister}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ](jjeh"]h$]h&]jjuh1jhj!hhhj3hM| ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjHsbc.drm_dp_aux_unregisterasbuh1hhj^ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj^ubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjZubah}(h]h ]h"]h$]h&]jjuh1jhj!hhhj3hM| ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj3hM| ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj3hM| hjhhubj)}(hhh]h)}(hunregister an AUX adapterh]hunregister an AUX adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM| hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj3hM| ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hD**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channelh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh]jn)}(h2``struct drm_dp_aux *aux`` DisplayPort AUX channelh](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj&h]hstruct drm_dp_aux *aux}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM} hj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj;hM hjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_dp_psr_setup_time (C function)c.drm_dp_psr_setup_timehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hGint drm_dp_psr_setup_time (const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h]j)}(hFint drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|hhhjhM ubj)}(hdrm_dp_psr_setup_timeh]j)}(hdrm_dp_psr_setup_timeh]hdrm_dp_psr_setup_time}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj|hhhjhM ubj)}(h-(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])h]j)}(h+const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_psr_setup_timeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpsr_caph]hpsr_cap}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hEDP_PSR_RECEIVER_CAP_SIZEh]hEDP_PSR_RECEIVER_CAP_SIZE}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)modnameN classnameNjj)}j]jc.drm_dp_psr_setup_timeasbuh1hhjubj+)}(hj8Th]h]}(hjEhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj|hhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjxhhhjhM ubah}(h]jsah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjuhhubj)}(hhh]h)}(hPSR setup in time usech]hPSR setup in time usec}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjkhhubah}(h]h ]h"]h$]h&]uh1jhjuhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]`` PSR capabilities from DPCD **Return** PSR setup time for the panel in microseconds, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh]jn)}(hK``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]`` PSR capabilities from DPCD h](jt)}(h/``const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h+const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hPSR capabilities from DPCDh]hPSR capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hNPSR setup time for the panel in microseconds, negative error code on failure.h]hNPSR setup time for the panel in microseconds, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_start_crc (C function)c.drm_dp_start_crchNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hDint drm_dp_start_crc (struct drm_dp_aux *aux, struct drm_crtc *crtc)h]j)}(hCint drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc)h](j)}(hinth]hint}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhj=hM ubj)}(hdrm_dp_start_crch]j)}(hdrm_dp_start_crch]hdrm_dp_start_crc}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ](jjeh"]h$]h&]jjuh1jhj+hhhj=hM ubj)}(h/(struct drm_dp_aux *aux, struct drm_crtc *crtc)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjRsbc.drm_dp_start_crcasbuh1hhjhubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubj)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_start_crcasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj(hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubeh}(h]h ]h"]h$]h&]jjuh1jhj+hhhj=hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj'hhhj=hM ubah}(h]j"ah ](jjeh"]h$]h&]jj)jhuh1jhj=hM hj$hhubj)}(hhh]h)}(hstart capture of frame CRCsh]hstart capture of frame CRCs}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj\hhubah}(h]h ]h"]h$]h&]uh1jhj$hhhj=hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjwjjwjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_crtc *crtc`` CRTC displaying the frames whose CRCs are to be captured **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj{ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hS``struct drm_crtc *crtc`` CRTC displaying the frames whose CRCs are to be captured h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h8CRTC displaying the frames whose CRCs are to be capturedh]h8CRTC displaying the frames whose CRCs are to be captured}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubeh}(h]h ]h"]h$]h&]uh1jhhj{ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj{ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_stop_crc (C function)c.drm_dp_stop_crchNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h,int drm_dp_stop_crc (struct drm_dp_aux *aux)h]j)}(h+int drm_dp_stop_crc(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhjghM ubj)}(hdrm_dp_stop_crch]j)}(hdrm_dp_stop_crch]hdrm_dp_stop_crc}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ](jjeh"]h$]h&]jjuh1jhjUhhhjghM ubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj|sbc.drm_dp_stop_crcasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjUhhhjghM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjQhhhjghM ubah}(h]jLah ](jjeh"]h$]h&]jj)jhuh1jhjghM hjNhhubj)}(hhh]h)}(hstop capture of frame CRCsh]hstop capture of frame CRCs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjNhhhjghM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj1jj1jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj;h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj5ubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjZh]hstruct drm_dp_aux *aux}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjTubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohM hjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jmhjohM hjQubah}(h]h ]h"]h$]h&]uh1jhhj5ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj5ubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_read_desc (C function)c.drm_dp_read_deschNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hWint drm_dp_read_desc (struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h]j)}(hVint drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM? ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM? ubj)}(hdrm_dp_read_desch]j)}(hdrm_dp_read_desch]hdrm_dp_read_desc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM? ubj)}(hB(struct drm_dp_aux *aux, struct drm_dp_desc *desc, bool is_branch)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7modnameN classnameNjj)}j]j)}jjsbc.drm_dp_read_descasbuh1hhjubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjchhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_dp_desc *desch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_desch]h drm_dp_desc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jQc.drm_dp_read_descasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdesch]hdesc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hbool is_branchh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h is_branchh]h is_branch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM? ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM? ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM? hjhhubj)}(hhh]h)}(h%read sink/branch descriptor from DPCDh]h%read sink/branch descriptor from DPCD}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM? hj;hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM? ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjVjjVjjjuh1jhhhjAhNhNubj)}(hXv**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_desc *desc`` Device descriptor to fill from DPCD ``bool is_branch`` true for branch devices, false for sink devices **Description** Read DPCD 0x400 (sink) or 0x500 (branch) into **desc**. Also debug log the identification. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj`h]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMC hjZubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM@ hjyubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM@ hjubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjhM@ hjvubjn)}(hA``struct drm_dp_desc *desc`` Device descriptor to fill from DPCD h](jt)}(h``struct drm_dp_desc *desc``h]jz)}(hjh]hstruct drm_dp_desc *desc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMA hjubj)}(hhh]h)}(h#Device descriptor to fill from DPCDh]h#Device descriptor to fill from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMA hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMA hjvubjn)}(hC``bool is_branch`` true for branch devices, false for sink devices h](jt)}(h``bool is_branch``h]jz)}(hjh]hbool is_branch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMB hjubj)}(hhh]h)}(h/true for branch devices, false for sink devicesh]h/true for branch devices, false for sink devices}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMB hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMB hjvubeh}(h]h ]h"]h$]h&]uh1jhhjZubh)}(h**Description**h]j%)}(hj,h]h Description}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMD hjZubh)}(hZRead DPCD 0x400 (sink) or 0x500 (branch) into **desc**. Also debug log the identification.h](h.Read DPCD 0x400 (sink) or 0x500 (branch) into }(hjBhhhNhNubj%)}(h**desc**h]hdesc}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubh$. Also debug log the identification.}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMC hjZubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMF hjZubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_dp_dump_lttpr_desc (C function)c.drm_dp_dump_lttpr_deschNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hKint drm_dp_dump_lttpr_desc (struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h]j)}(hJint drm_dp_dump_lttpr_desc(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM] ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM] ubj)}(hdrm_dp_dump_lttpr_desch]j)}(hdrm_dp_dump_lttpr_desch]hdrm_dp_dump_lttpr_desc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM] ubj)}(h0(struct drm_dp_aux *aux, enum drm_dp_phy dp_phy)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_dump_lttpr_descasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(henum drm_dp_phy dp_phyh](j)}(hj8h]henum}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(h drm_dp_phyh]h drm_dp_phy}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjamodnameN classnameNjj)}j]j c.drm_dp_dump_lttpr_descasbuh1hhj=ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(hdp_phyh]hdp_phy}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM] ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM] ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM] hjhhubj)}(hhh]h)}(h2read and dump the DPCD descriptor for an LTTPR PHYh]h2read and dump the DPCD descriptor for an LTTPR PHY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM] hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM] ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX)**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``enum drm_dp_phy dp_phy`` LTTPR PHY instance **Description** Read the DPCD LTTPR PHY descriptor for **dp_phy** and print a debug message with its details to dmesg. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMa hjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM^ hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM^ hj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hM^ hjubjn)}(h.``enum drm_dp_phy dp_phy`` LTTPR PHY instance h](jt)}(h``enum drm_dp_phy dp_phy``h]jz)}(hj/h]henum drm_dp_phy dp_phy}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hj)ubj)}(hhh]h)}(hLTTPR PHY instanceh]hLTTPR PHY instance}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhM_ hjEubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhjDhM_ hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjjh]h Description}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMa hjubh)}(hfRead the DPCD LTTPR PHY descriptor for **dp_phy** and print a debug message with its details to dmesg.h](h'Read the DPCD LTTPR PHY descriptor for }(hjhhhNhNubj%)}(h **dp_phy**h]hdp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh5 and print a debug message with its details to dmesg.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM` hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMc hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dp_dsc_sink_bpp_incr (C function)c.drm_dp_dsc_sink_bpp_incrhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hIu8 drm_dp_dsc_sink_bpp_incr (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(hHu8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_dp_dsc_sink_bpp_incrsbc.drm_dp_dsc_sink_bpp_incrasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMy ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMy ubj)}(hdrm_dp_dsc_sink_bpp_incrh]j)}(hjh]hdrm_dp_dsc_sink_bpp_incr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMy ubj)}(h-(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjBmodnameN classnameNjj)}j]jc.drm_dp_dsc_sink_bpp_incrasbuh1hhjubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdsc_dpcdh]hdsc_dpcd}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjzhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_dsc_sink_bpp_incrasbuh1hhjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMy ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMy ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMy hjhhubj)}(hhh]h)}(hGet bits per pixel incrementh]hGet bits per pixel increment}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMy hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMy ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD **Description** Returns the bpp precision supported by the DP sink.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM} hjubji)}(hhh]jn)}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](jt)}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMz hj ubj)}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hMz hj(ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj'hMz hj ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjMh]h Description}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM| hjubh)}(h3Returns the bpp precision supported by the DP sink.h]h3Returns the bpp precision supported by the DP sink.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM{ hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_dp_dsc_slice_count_to_mask (C function) c.drm_dp_dsc_slice_count_to_maskhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h4u32 drm_dp_dsc_slice_count_to_mask (int slice_count)h]j)}(h3u32 drm_dp_dsc_slice_count_to_mask(int slice_count)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_dp_dsc_slice_count_to_masksb c.drm_dp_dsc_slice_count_to_maskasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_dp_dsc_slice_count_to_maskh]j)}(hjh]hdrm_dp_dsc_slice_count_to_mask}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h(int slice_count)h]j)}(hint slice_counth](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h slice_counth]h slice_count}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h+Convert a slice count to a slice count maskh]h+Convert a slice count to a slice count mask}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj'hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjBjjBjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``int slice_count`` slice count **Description** Convert **slice_count** to a slice count mask. Returns the slice count mask.h](h)}(h**Parameters**h]j%)}(hjLh]h Parameters}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjFubji)}(hhh]jn)}(h ``int slice_count`` slice count h](jt)}(h``int slice_count``h]jz)}(hjkh]hint slice_count}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjeubj)}(hhh]h)}(h slice counth]h slice count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjbubah}(h]h ]h"]h$]h&]uh1jhhjFubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjFubh)}(h.Convert **slice_count** to a slice count mask.h](hConvert }(hjhhhNhNubj%)}(h**slice_count**h]h slice_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh to a slice count mask.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjFubh)}(hReturns the slice count mask.h]hReturns the slice count mask.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjFubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_dsc_sink_slice_count_mask (C function)"c.drm_dp_dsc_sink_slice_count_maskhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h_u32 drm_dp_dsc_sink_slice_count_mask (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h]j)}(h^u32 drm_dp_dsc_sink_slice_count_mask(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](h)}(hhh]j)}(hu32h]hu32}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j drm_dp_dsc_sink_slice_count_masksb"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj0hM ubj)}(h drm_dp_dsc_sink_slice_count_maskh]j)}(hj-h]h drm_dp_dsc_sink_slice_count_mask}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj0hM ubj)}(h:(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(hu8h]hu8}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]j+"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubh)}(hhh]j)}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j+"c.drm_dp_dsc_sink_slice_count_maskasbuh1hhjZubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubj)}(h bool is_edph](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(his_edph]his_edp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj0hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj0hM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj0hM hjhhubj)}(hhh]h)}(h+Get the mask of valid DSC sink slice countsh]h+Get the mask of valid DSC sink slice counts}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj>hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj0hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjYjjYjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` the sink's DSC DPCD capabilities ``bool is_edp`` ``true`` for an eDP sink **Description** Get the mask of supported slice counts from the sink's DSC DPCD register. **Return** Mask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn't support any slicesh](h)}(h**Parameters**h]j%)}(hjch]h Parameters}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjaubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj]ubji)}(hhh](jn)}(hQ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` the sink's DSC DPCD capabilities h](jt)}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj|ubj)}(hhh]h)}(h the sink's DSC DPCD capabilitiesh]h"the sink’s DSC DPCD capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjyubjn)}(h)``bool is_edp`` ``true`` for an eDP sink h](jt)}(h``bool is_edp``h]jz)}(hjh]h bool is_edp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h``true`` for an eDP sinkh](jz)}(h``true``h]htrue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh for an eDP sink}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjyubeh}(h]h ]h"]h$]h&]uh1jhhj]ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj]ubh)}(hIGet the mask of supported slice counts from the sink's DSC DPCD register.h]hKGet the mask of supported slice counts from the sink’s DSC DPCD register.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj]ubh)}(h **Return**h]j%)}(hj+h]hReturn}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj)ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj]ubh)}(hMask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn't support any slicesh]hMask of slice counts supported by the DSC sink: - > 0: bit#0,1,3,5..,23 set if the sink supports 1,2,4,6..,24 slices - 0: if the sink doesn’t support any slices}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_dsc_sink_max_slice_count (C function)!c.drm_dp_dsc_sink_max_slice_counthNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h]u8 drm_dp_dsc_sink_max_slice_count (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h]j)}(h\u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](h)}(hhh]j)}(hu8h]hu8}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}jdrm_dp_dsc_sink_max_slice_countsb!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjlhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhjhM ubj)}(hdrm_dp_dsc_sink_max_slice_counth]j)}(hjh]hdrm_dp_dsc_sink_max_slice_count}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjlhhhjhM ubj)}(h:(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdsc_dpcdh]hdsc_dpcd}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj,modnameN classnameNjj)}j]j!c.drm_dp_dsc_sink_max_slice_countasbuh1hhjubj+)}(hj8Th]h]}(hjHhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool is_edph](j)}(hjAh]hbool}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj)}(his_edph]his_edp}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjlhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhhjhM ubah}(h]jcah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjehhubj)}(hhh]h)}(h2Get the max slice count supported by the DSC sink.h]h2Get the max slice count supported by the DSC sink.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjehhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD ``bool is_edp`` true if its eDP, false for DP **Description** Read the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Maximum slice count supported by DSC sink or 0 its invalidh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh](jn)}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](jt)}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(h.``bool is_edp`` true if its eDP, false for DP h](jt)}(h``bool is_edp``h]jz)}(hjh]h bool is_edp}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(htrue if its eDP, false for DPh]htrue if its eDP, false for DP}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hM hj5ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj4hM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjZh]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hXRead the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the slice capabilities DPCD register from DSC sink to get the maximum slice count supported. This is used to populate the DSC parameters in the }(hjphhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jz)}(hjzh]hstruct drm_dsc_config}(hj|hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjpubhO by the driver. Driver creates an infoframe using these parameters to populate }(hjphhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]jz)}(hjh]hstruct drm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_pps_infoframeuh1hhjhM hjpubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h:Maximum slice count supported by DSC sink or 0 its invalidh]h:Maximum slice count supported by DSC sink or 0 its invalid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_dp_dsc_sink_line_buf_depth (C function) c.drm_dp_dsc_sink_line_buf_depthhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hOu8 drm_dp_dsc_sink_line_buf_depth (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(hNu8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_dp_dsc_sink_line_buf_depthsb c.drm_dp_dsc_sink_line_buf_depthasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj0hM ubj)}(hdrm_dp_dsc_sink_line_buf_depthh]j)}(hj-h]hdrm_dp_dsc_sink_line_buf_depth}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj0hM ubj)}(h-(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])h]j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(hu8h]hu8}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]j+ c.drm_dp_dsc_sink_line_buf_depthasbuh1hhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubh)}(hhh]j)}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j+ c.drm_dp_dsc_sink_line_buf_depthasbuh1hhjZubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj0hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj0hM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj0hM hjhhubj)}(hhh]h)}(h!Get the line buffer depth in bitsh]h!Get the line buffer depth in bits}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj0hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj%jj%jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD **Description** Read the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Line buffer depth supported by DSC panel or 0 its invalidh](h)}(h**Parameters**h]j%)}(hj/h]h Parameters}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj)ubji)}(hhh]jn)}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](jt)}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jz)}(hjNh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjHubj)}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchM hjdubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjchM hjEubah}(h]h ]h"]h$]h&]uh1jhhj)ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj)ubh)}(hXRead the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the DSC DPCD register to parse the line buffer depth in bits which is number of bits of precision within the decoder line buffer supported by the DSC sink. This is used to populate the DSC parameters in the }(hjhhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jz)}(hjh]hstruct drm_dsc_config}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubhO by the driver. Driver creates an infoframe using these parameters to populate }(hjhhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]jz)}(hjh]hstruct drm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_pps_infoframeuh1hhjhM hjubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hj)ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj)ubh)}(h9Line buffer depth supported by DSC panel or 0 its invalidh]h9Line buffer depth supported by DSC panel or 0 its invalid}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj)ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_dp_dsc_sink_supported_input_bpcs (C function)&c.drm_dp_dsc_sink_supported_input_bpcshNtauh1jxhjAhhhNhNubj)}(hhh](j)}(heint drm_dp_dsc_sink_supported_input_bpcs (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h]j)}(hdint drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h](j)}(hinth]hint}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhjIhM ubj)}(h$drm_dp_dsc_sink_supported_input_bpcsh]j)}(h$drm_dp_dsc_sink_supported_input_bpcsh]h$drm_dp_dsc_sink_supported_input_bpcs}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ](jjeh"]h$]h&]jjuh1jhj7hhhjIhM ubj)}(h<(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 dsc_bpc[3])h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj^sb&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjtubh)}(hhh]j)}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhjtubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjtubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjpubj)}(h u8 dsc_bpc[3]h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j&c.drm_dp_dsc_sink_supported_input_bpcsasbuh1hhjubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdsc_bpch]hdsc_bpc}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjUhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj )}(h3h]h3}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj+)}(hj8Th]h]}(hjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjpubeh}(h]h ]h"]h$]h&]jjuh1jhj7hhhjIhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj3hhhjIhM ubah}(h]j.ah ](jjeh"]h$]h&]jj)jhuh1jhjIhM hj0hhubj)}(hhh]h)}(hFGet all the input bits per component values supported by the DSC sink.h]hFGet all the input bits per component values supported by the DSC sink.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj0hhhjIhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD ``u8 dsc_bpc[3]`` An array to be filled by this helper with supported input bpcs. **Description** Read the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack() **Return** Number of input BPC values parsed from the DPCDh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh](jn)}(hK``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC capabilities from DPCD h](jt)}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDSC capabilities from DPCDh]hDSC capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hR``u8 dsc_bpc[3]`` An array to be filled by this helper with supported input bpcs. h](jt)}(h``u8 dsc_bpc[3]``h]jz)}(hjh]h u8 dsc_bpc[3]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj)}(hhh]h)}(h?An array to be filled by this helper with supported input bpcs.h]h?An array to be filled by this helper with supported input bpcs.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj)ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj(hM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjOh]h Description}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(hXRead the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the :c:type:`struct drm_dsc_config ` by the driver. Driver creates an infoframe using these parameters to populate :c:type:`struct drm_dsc_pps_infoframe `. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()h](hRead the DSC DPCD from the sink device to parse the supported bits per component values. This is used to populate the DSC parameters in the }(hjehhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jz)}(hjoh]hstruct drm_dsc_config}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_configuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjeubhO by the driver. Driver creates an infoframe using these parameters to populate }(hjehhhNhNubh)}(h>:c:type:`struct drm_dsc_pps_infoframe `h]jz)}(hjh]hstruct drm_dsc_pps_infoframe}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_pps_infoframeuh1hhjhM hjeubhg. These are sent to the sink using DSC infoframe using the helper function drm_dsc_pps_infoframe_pack()}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM$ hjubh)}(h/Number of input BPC values parsed from the DPCDh]h/Number of input BPC values parsed from the DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM% hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_dp_dsc_sink_max_slice_throughput (C function)&c.drm_dp_dsc_sink_max_slice_throughputhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hint drm_dp_dsc_sink_max_slice_throughput (const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h]j)}(h~int drm_dp_dsc_sink_max_slice_throughput(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chML ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhML ubj)}(h$drm_dp_dsc_sink_max_slice_throughputh]j)}(h$drm_dp_dsc_sink_max_slice_throughputh]h$drm_dp_dsc_sink_max_slice_throughput}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhML ubj)}(hV(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], int peak_pixel_rate, bool is_rgb_yuv444)h](j)}(h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubh)}(hhh]j)}(hu8h]hu8}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj^modnameN classnameNjj)}j]j)}jj$sb&c.drm_dp_dsc_sink_max_slice_throughputasbuh1hhj:ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj)}(hdsc_dpcdh]hdsc_dpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:ubh)}(hhh]j)}(hDP_DSC_RECEIVER_CAP_SIZEh]hDP_DSC_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jx&c.drm_dp_dsc_sink_max_slice_throughputasbuh1hhj:ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubj)}(hint peak_pixel_rateh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpeak_pixel_rateh]hpeak_pixel_rate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubj)}(hbool is_rgb_yuv444h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h is_rgb_yuv444h]h is_rgb_yuv444}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhML ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhML ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhML hjhhubj)}(hhh]h)}(h3Get a DSC sink's maximum pixel throughput per sliceh]h5Get a DSC sink’s maximum pixel throughput per slice}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chML hjUhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhML ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjpjjpjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC sink's capabilities from DPCD ``int peak_pixel_rate`` Cumulative peak pixel rate in kHz ``bool is_rgb_yuv444`` The mode is either RGB or YUV444 **Description** Return the DSC sink device's maximum pixel throughput per slice, based on the device's **dsc_dpcd** capabilities, the **peak_pixel_rate** of the transferred stream(s) and whether the output format **is_rgb_yuv444** or yuv422/yuv420. Note that **peak_pixel_rate** is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile's slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count):: @peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_count **Return** The maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.h](h)}(h**Parameters**h]j%)}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMP hjtubji)}(hhh](jn)}(hR``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]`` DSC sink's capabilities from DPCD h](jt)}(h/``const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h+const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMM hjubj)}(hhh]h)}(h!DSC sink's capabilities from DPCDh]h#DSC sink’s capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMM hjubjn)}(h:``int peak_pixel_rate`` Cumulative peak pixel rate in kHz h](jt)}(h``int peak_pixel_rate``h]jz)}(hjh]hint peak_pixel_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMN hjubj)}(hhh]h)}(h!Cumulative peak pixel rate in kHzh]h!Cumulative peak pixel rate in kHz}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMN hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMN hjubjn)}(h8``bool is_rgb_yuv444`` The mode is either RGB or YUV444 h](jt)}(h``bool is_rgb_yuv444``h]jz)}(hj h]hbool is_rgb_yuv444}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMO hjubj)}(hhh]h)}(h The mode is either RGB or YUV444h]h The mode is either RGB or YUV444}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMO hj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMO hjubeh}(h]h ]h"]h$]h&]uh1jhhjtubh)}(h**Description**h]j%)}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjDubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMQ hjtubh)}(hReturn the DSC sink device's maximum pixel throughput per slice, based on the device's **dsc_dpcd** capabilities, the **peak_pixel_rate** of the transferred stream(s) and whether the output format **is_rgb_yuv444** or yuv422/yuv420.h](h[Return the DSC sink device’s maximum pixel throughput per slice, based on the device’s }(hj\hhhNhNubj%)}(h **dsc_dpcd**h]hdsc_dpcd}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj\ubh capabilities, the }(hj\hhhNhNubj%)}(h**peak_pixel_rate**h]hpeak_pixel_rate}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj\ubh< of the transferred stream(s) and whether the output format }(hj\hhhNhNubj%)}(h**is_rgb_yuv444**h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj\ubh or yuv422/yuv420.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMP hjtubh)}(hNote that **peak_pixel_rate** is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile's slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count)::h](h Note that }(hjhhhNhNubj%)}(h**peak_pixel_rate**h]hpeak_pixel_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is the total pixel rate transferred to the same DSC/display sink. For instance to calculate a tile’s slice count of an MST multi-tiled display sink (not considering here the required rounding/alignment of slice count):}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMT hjtubj@)}(h@peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_counth]h@peak_pixel_rate = tile_pixel_rate * tile_count total_slice_count = @peak_pixel_rate / drm_dp_dsc_sink_max_slice_throughput(@peak_pixel_rate) tile_slice_count = total_slice_count / tile_count}hjsbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMY hjtubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM] hjtubh)}(hWThe maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.h]hWThe maximum pixel throughput per slice supported by the DSC sink device in kPixels/sec.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM^ hjtubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5drm_dp_dsc_branch_max_overall_throughput (C function)*c.drm_dp_dsc_branch_max_overall_throughputhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hsint drm_dp_dsc_branch_max_overall_throughput (const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h]j)}(hrint drm_dp_dsc_branch_max_overall_throughput(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj&hM ubj)}(h(drm_dp_dsc_branch_max_overall_throughputh]j)}(h(drm_dp_dsc_branch_max_overall_throughputh]h(drm_dp_dsc_branch_max_overall_throughput}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj&hM ubj)}(hF(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE], bool is_rgb_yuv444)h](j)}(h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]h](j)}(hjUh]hconst}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubh)}(hhh]j)}(hu8h]hu8}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}jj;sb*c.drm_dp_dsc_branch_max_overall_throughputasbuh1hhjQubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(hdsc_branch_dpcdh]hdsc_branch_dpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjQubh)}(hhh]j)}(hDP_DSC_BRANCH_CAP_SIZEh]hDP_DSC_BRANCH_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j*c.drm_dp_dsc_branch_max_overall_throughputasbuh1hhjQubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjQubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hbool is_rgb_yuv444h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h is_rgb_yuv444h]h is_rgb_yuv444}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj&hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj&hM ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj&hM hj hhubj)}(hhh]h)}(h0Branch device's max overall DSC pixel throughputh]h2Branch device’s max overall DSC pixel throughput}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj7hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj&hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjRjjRjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD ``bool is_rgb_yuv444`` The mode is either RGB or YUV444 **Description** Return the branch device's maximum overall DSC pixel throughput, based on the device's DPCD DSC branch capabilities, and whether the output format **is_rgb_yuv444** or yuv422/yuv420. **Return** - 0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device. - > 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h](h)}(h**Parameters**h]j%)}(hj\h]h Parameters}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjZubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjVubji)}(hhh](jn)}(hW``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD h](jt)}(h4``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]``h]jz)}(hj{h]h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjuubj)}(hhh]h)}(h!DSC branch capabilities from DPCDh]h!DSC branch capabilities from DPCD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjrubjn)}(h8``bool is_rgb_yuv444`` The mode is either RGB or YUV444 h](jt)}(h``bool is_rgb_yuv444``h]jz)}(hjh]hbool is_rgb_yuv444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h The mode is either RGB or YUV444h]h The mode is either RGB or YUV444}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjrubeh}(h]h ]h"]h$]h&]uh1jhhjVubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjVubh)}(hReturn the branch device's maximum overall DSC pixel throughput, based on the device's DPCD DSC branch capabilities, and whether the output format **is_rgb_yuv444** or yuv422/yuv420.h](hReturn the branch device’s maximum overall DSC pixel throughput, based on the device’s DPCD DSC branch capabilities, and whether the output format }(hjhhhNhNubj%)}(h**is_rgb_yuv444**h]h is_rgb_yuv444}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh or yuv422/yuv420.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjVubh)}(h **Return**h]j%)}(hj(h]hReturn}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjVubh)}(hhh](h)}(hX 0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h]ji)}(hhh]jn)}(h0: The maximum overall throughput capability is not indicated by the device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h](jt)}(hB0: The maximum overall throughput capability is not indicated byh]hB0: The maximum overall throughput capability is not indicated by}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjHubj)}(hhh]h)}(hthe device separately and it must be determined from the per-slice max throughput (see **drm_dp_dsc_branch_slice_max_throughput\(\)**) and the maximum slice count supported by the device.h](hWthe device separately and it must be determined from the per-slice max throughput (see }(hj^hhhNhNubj%)}(h.**drm_dp_dsc_branch_slice_max_throughput\(\)**h]h*drm_dp_dsc_branch_slice_max_throughput()}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubh6) and the maximum slice count supported by the device.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj[ubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjZhM hjEubah}(h]h ]h"]h$]h&]uh1jhhjAubah}(h]h ]h"]h$]h&]uh1hhj>ubh)}(ha> 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h]ji)}(hhh]jn)}(h\> 0: The maximum overall DSC pixel throughput supported by the branch device in kPixels/sec.h](jt)}(hE> 0: The maximum overall DSC pixel throughput supported by the branchh]hE> 0: The maximum overall DSC pixel throughput supported by the branch}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hdevice in kPixels/sec.h]hdevice in kPixels/sec.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhjubah}(h]h ]h"]h$]h&]uh1hhj>ubeh}(h]h ]h"]h$]h&]j8j4uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjVubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_dsc_branch_max_line_width (C function)"c.drm_dp_dsc_branch_max_line_widthhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hWint drm_dp_dsc_branch_max_line_width (const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h]j)}(hVint drm_dp_dsc_branch_max_line_width(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(h drm_dp_dsc_branch_max_line_widthh]j)}(h drm_dp_dsc_branch_max_line_widthh]h drm_dp_dsc_branch_max_line_width}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h2(const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE])h]j)}(h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]h](j)}(hjUh]hconst}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hu8h]hu8}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_modnameN classnameNjj)}j]j)}jj%sb"c.drm_dp_dsc_branch_max_line_widthasbuh1hhj;ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(hdsc_branch_dpcdh]hdsc_branch_dpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubh)}(hhh]j)}(hDP_DSC_BRANCH_CAP_SIZEh]hDP_DSC_BRANCH_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jy"c.drm_dp_dsc_branch_max_line_widthasbuh1hhj;ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h"Branch device's max DSC line widthh]h$Branch device’s max DSC line width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hXL**Parameters** ``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD **Description** Return the branch device's maximum overall DSC line width, based on the device's **dsc_branch_dpcd** capabilities. **Return** - 0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device. - ``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels). - >= 5120: The maximum line width in pixels.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubji)}(hhh]jn)}(hW``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]`` DSC branch capabilities from DPCD h](jt)}(h4``const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]``h]jz)}(hj1h]h0const u8 dsc_branch_dpcd[DP_DSC_BRANCH_CAP_SIZE]}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj+ubj)}(hhh]h)}(h!DSC branch capabilities from DPCDh]h!DSC branch capabilities from DPCD}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhM hjGubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhjFhM hj(ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjlh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubh)}(hrReturn the branch device's maximum overall DSC line width, based on the device's **dsc_branch_dpcd** capabilities.h](hUReturn the branch device’s maximum overall DSC line width, based on the device’s }(hjhhhNhNubj%)}(h**dsc_branch_dpcd**h]hdsc_branch_dpcd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh capabilities.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubh)}(hhh](h)}(h0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device.h]ji)}(hhh]jn)}(h0: The maximum line width is not indicated by the device separately and it must be determined from the maximum slice count and slice-width supported by the device.h](jt)}(h?0: The maximum line width is not indicated by the deviceh]h?0: The maximum line width is not indicated by the device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hjseparately and it must be determined from the maximum slice count and slice-width supported by the device.h]hjseparately and it must be determined from the maximum slice count and slice-width supported by the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hZ``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels).h]ji)}(hhh]jn)}(hP``-EINVAL``: The device indicates an invalid maximum line width (< 5120 pixels).h](jt)}(h?``-EINVAL``: The device indicates an invalid maximum line widthh](jz)}(h ``-EINVAL``h]h-EINVAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubh4: The device indicates an invalid maximum line width}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h(< 5120 pixels).h]h(< 5120 pixels).}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj)ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj(hM hjubah}(h]h ]h"]h$]h&]uh1jhhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h+>= 5120: The maximum line width in pixels.h]h)}(hjUh]h+>= 5120: The maximum line width in pixels.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjSubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j8j4uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_dp_read_lttpr_common_caps (C function)c.drm_dp_read_lttpr_common_capshNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hint drm_dp_read_lttpr_common_caps (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(hint drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_dp_read_lttpr_common_capsh]j)}(hdrm_dp_read_lttpr_common_capsh]hdrm_dp_read_lttpr_common_caps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h`(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_read_lttpr_common_capsasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(hu8h]hu8}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjamodnameN classnameNjj)}j]j c.drm_dp_read_lttpr_common_capsasbuh1hhj=ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=ubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_dp_read_lttpr_common_capsasbuh1hhj=ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h!u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.drm_dp_read_lttpr_common_capsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j c.drm_dp_read_lttpr_common_capsasbuh1hhjubj+)}(hj8Th]h]}(hjJhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h"read the LTTPR common capabilitiesh]h"read the LTTPR common capabilities}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjphhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hXT**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` buffer to return the capability info in **Description** Read capabilities common to all LTTPRs. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hN``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` buffer to return the capability info in h](jt)}(h%``u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jz)}(hj&h]h!u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj ubj)}(hhh]h)}(h'buffer to return the capability info inh]h'buffer to return the capability info in}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hM hj<ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj;hM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjah]h Description}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h'Read capabilities common to all LTTPRs.h]h'Read capabilities common to all LTTPRs.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_read_lttpr_phy_caps (C function)c.drm_dp_read_lttpr_phy_capshNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hint drm_dp_read_lttpr_phy_caps (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(hint drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_dp_read_lttpr_phy_capsh]j)}(hdrm_dp_read_lttpr_phy_capsh]hdrm_dp_read_lttpr_phy_caps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(hu(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE], enum drm_dp_phy dp_phy, u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_read_lttpr_phy_capsasbuh1hhjubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j,c.drm_dp_read_lttpr_phy_capsasbuh1hhj`ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj`ubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j,c.drm_dp_read_lttpr_phy_capsasbuh1hhj`ubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj`ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(henum drm_dp_phy dp_phyh](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_phyh]h drm_dp_phy}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]j,c.drm_dp_read_lttpr_phy_capsasbuh1hhjubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdp_phyh]hdp_phy}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu8 caps[DP_LTTPR_PHY_CAP_SIZE]h](h)}(hhh]j)}(hu8h]hu8}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjjmodnameN classnameNjj)}j]j,c.drm_dp_read_lttpr_phy_capsasbuh1hhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjaubh)}(hhh]j)}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j,c.drm_dp_read_lttpr_phy_capsasbuh1hhjaubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h+read the capabilities for a given LTTPR PHYh]h+read the capabilities for a given LTTPR PHY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``enum drm_dp_phy dp_phy`` LTTPR PHY to read the capabilities for ``u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` buffer to return the capability info in **Description** Read the capabilities for the given LTTPR PHY. Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj:h]hstruct drm_dp_aux *aux}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj4ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM hjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhjOhM hj1ubjn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjsh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjmubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj1ubjn)}(hB``enum drm_dp_phy dp_phy`` LTTPR PHY to read the capabilities for h](jt)}(h``enum drm_dp_phy dp_phy``h]jz)}(hjh]henum drm_dp_phy dp_phy}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h<TPR PHY to read the capabilities forh]h<TPR PHY to read the capabilities for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj1ubjn)}(hK``u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` buffer to return the capability info in h](jt)}(h"``u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]jz)}(hjh]hu8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h'buffer to return the capability info inh]h'buffer to return the capability info in}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj1ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h.Read the capabilities for the given LTTPR PHY.h]h.Read the capabilities for the given LTTPR PHY.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_lttpr_count (C function)c.drm_dp_lttpr_counthNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h@int drm_dp_lttpr_count (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h?int drm_dp_lttpr_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhjhM ubj)}(hdrm_dp_lttpr_counth]j)}(hdrm_dp_lttpr_counth]hdrm_dp_lttpr_count}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjphhhjhM ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_lttpr_countasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_lttpr_countasbuh1hhjubj+)}(hj8Th]h]}(hj9hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjphhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjlhhhjhM ubah}(h]jgah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjihhubj)}(hhh]h)}(h!get the number of detected LTTPRsh]h!get the number of detected LTTPRs}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj_hhubah}(h]h ]h"]h$]h&]uh1jhjihhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjzjjzjjjuh1jhhhjAhNhNubj)}(hXp**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Get the number of detected LTTPRs from the LTTPR common capabilities info. **Return** -ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRsh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM! hj~ubji)}(hhh]jn)}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](jt)}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jz)}(hjh]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhj~ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj~ubh)}(hJGet the number of detected LTTPRs from the LTTPR common capabilities info.h]hJGet the number of detected LTTPRs from the LTTPR common capabilities info.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj~ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM! hj~ubh)}(h-ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRsh]h-ERANGE if more than supported number (8) of LTTPRs are detected -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value otherwise the number of detected LTTPRs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM" hj~ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_lttpr_max_link_rate (C function)c.drm_dp_lttpr_max_link_ratehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hHint drm_dp_lttpr_max_link_rate (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(hGint drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM9 ubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhjXhM9 ubj)}(hdrm_dp_lttpr_max_link_rateh]j)}(hdrm_dp_lttpr_max_link_rateh]hdrm_dp_lttpr_max_link_rate}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ](jjeh"]h$]h&]jjuh1jhjFhhhjXhM9 ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjmsbc.drm_dp_lttpr_max_link_rateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_lttpr_max_link_rateasbuh1hhjubj+)}(hj8Th]h]}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjFhhhjXhM9 ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjBhhhjXhM9 ubah}(h]j=ah ](jjeh"]h$]h&]jj)jhuh1jhjXhM9 hj?hhubj)}(hhh]h)}(h1get the maximum link rate supported by all LTTPRsh]h1get the maximum link rate supported by all LTTPRs}(hj8 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM9 hj5 hhubah}(h]h ]h"]h$]h&]uh1jhj?hhhjXhM9 ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjP jjP jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Returns the maximum link rate supported by all detected LTTPRs.h](h)}(h**Parameters**h]j%)}(hjZ h]h Parameters}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM= hjT ubji)}(hhh]jn)}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](jt)}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jz)}(hjy h]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hj{ hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjw ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM: hjs ubj)}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM: hj ubah}(h]h ]h"]h$]h&]uh1jhjs ubeh}(h]h ]h"]h$]h&]uh1jmhj hM: hjp ubah}(h]h ]h"]h$]h&]uh1jhhjT ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM< hjT ubh)}(h?Returns the maximum link rate supported by all detected LTTPRs.h]h?Returns the maximum link rate supported by all detected LTTPRs.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM; hjT ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_dp_lttpr_set_transparent_mode (C function)#c.drm_dp_lttpr_set_transparent_modehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hKint drm_dp_lttpr_set_transparent_mode (struct drm_dp_aux *aux, bool enable)h]j)}(hJint drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMG ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMG ubj)}(h!drm_dp_lttpr_set_transparent_modeh]j)}(h!drm_dp_lttpr_set_transparent_modeh]h!drm_dp_lttpr_set_transparent_mode}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hMG ubj)}(h%(struct drm_dp_aux *aux, bool enable)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj6 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubj)}(h h]h }(hjC hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjT hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQ ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjV modnameN classnameNjj)}j]j)}jj sb#c.drm_dp_lttpr_set_transparent_modeasbuh1hhj2 ubj)}(h h]h }(hjt hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj2 ubj)}(hauxh]haux}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2 ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj. ubj)}(h bool enableh](j)}(hjAh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(henableh]henable}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj. ubeh}(h]h ]h"]h$]h&]jjuh1jhj hhhj hMG ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hMG ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMG hj hhubj)}(hhh]h)}(h!set the LTTPR in transparent modeh]h!set the LTTPR in transparent mode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMG hj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMG ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable`` Enable or disable transparent mode **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMK hj ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj. h]hstruct drm_dp_aux *aux}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj, ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMH hj( ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjG hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjC hMH hjD ubah}(h]h ]h"]h$]h&]uh1jhj( ubeh}(h]h ]h"]h$]h&]uh1jmhjC hMH hj% ubjn)}(h3``bool enable`` Enable or disable transparent mode h](jt)}(h``bool enable``h]jz)}(hjg h]h bool enable}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhje ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMI hja ubj)}(hhh]h)}(h"Enable or disable transparent modeh]h"Enable or disable transparent mode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj| hMI hj} ubah}(h]h ]h"]h$]h&]uh1jhja ubeh}(h]h ]h"]h$]h&]uh1jmhj| hMI hj% ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h **Return**h]j%)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMK hj ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMK hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_lttpr_init (C function)c.drm_dp_lttpr_inithNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h?int drm_dp_lttpr_init (struct drm_dp_aux *aux, int lttpr_count)h]j)}(h>int drm_dp_lttpr_init(struct drm_dp_aux *aux, int lttpr_count)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM[ ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hM[ ubj)}(hdrm_dp_lttpr_inith]j)}(hdrm_dp_lttpr_inith]hdrm_dp_lttpr_init}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hM[ ubj)}(h)(struct drm_dp_aux *aux, int lttpr_count)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj$ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj1 hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjB hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj? ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjD modnameN classnameNjj)}j]j)}jj sbc.drm_dp_lttpr_initasbuh1hhj ubj)}(h h]h }(hjb hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjp hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hauxh]haux}(hj} hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubj)}(hint lttpr_counth](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h lttpr_counth]h lttpr_count}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubeh}(h]h ]h"]h$]h&]jjuh1jhj hhhj hM[ ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hM[ ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hM[ hj hhubj)}(hhh]h)}(h5init LTTPR transparency mode according to DP standardh]h5init LTTPR transparency mode according to DP standard}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM[ hj hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hM[ ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjAhNhNubj)}(hX#**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int lttpr_count`` Number of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hj ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj h]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM\ hj ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2 hM\ hj3 ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj2 hM\ hj ubjn)}(h``int lttpr_count`` Number of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count(). h](jt)}(h``int lttpr_count``h]jz)}(hjV h]hint lttpr_count}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjT ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM_ hjP ubj)}(hhh]h)}(hNumber of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count().h]hNumber of LTTPRs. Between 0 and 8, according to DP standard. Negative error code for any non-valid number. See drm_dp_lttpr_count().}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM] hjl ubah}(h]h ]h"]h$]h&]uh1jhjP ubeh}(h]h ]h"]h$]h&]uh1jmhjk hM_ hj ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h **Return**h]j%)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMa hj ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMa hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_lttpr_max_lane_count (C function)c.drm_dp_lttpr_max_lane_counthNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hIint drm_dp_lttpr_max_lane_count (const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(hHint drm_dp_lttpr_max_lane_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hM ubj)}(hdrm_dp_lttpr_max_lane_counth]j)}(hdrm_dp_lttpr_max_lane_counth]hdrm_dp_lttpr_max_lane_count}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hM ubj)}(h)(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE])h]j)}(h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj4modnameN classnameNjj)}j]j)}jj sbc.drm_dp_lttpr_max_lane_countasbuh1hhjubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcapsh]hcaps}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjnhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_LTTPR_COMMON_CAP_SIZEh]hDP_LTTPR_COMMON_CAP_SIZE}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jNc.drm_dp_lttpr_max_lane_countasbuh1hhjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubah}(h]h ]h"]h$]h&]jjuh1jhj hhhj hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hM ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hM hj hhubj)}(hhh]h)}(h2get the maximum lane count supported by all LTTPRsh]h2get the maximum lane count supported by all LTTPRs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities **Description** Returns the maximum lane count supported by all detected LTTPRs.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh]jn)}(hF``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]`` LTTPR common capabilities h](jt)}(h+``const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]``h]jz)}(hjh]h'const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hLTTPR common capabilitiesh]hLTTPR common capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjAh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h@Returns the maximum lane count supported by all detected LTTPRs.h]h@Returns the maximum lane count supported by all detected LTTPRs.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j9drm_dp_lttpr_voltage_swing_level_3_supported (C function).c.drm_dp_lttpr_voltage_swing_level_3_supportedhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hXbool drm_dp_lttpr_voltage_swing_level_3_supported (const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(hWbool drm_dp_lttpr_voltage_swing_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(h,drm_dp_lttpr_voltage_swing_level_3_supportedh]j)}(h,drm_dp_lttpr_voltage_swing_level_3_supportedh]h,drm_dp_lttpr_voltage_swing_level_3_supported}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h&(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb.c.drm_dp_lttpr_voltage_swing_level_3_supportedasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j.c.drm_dp_lttpr_voltage_swing_level_3_supportedasbuh1hhjubj+)}(hj8Th]h]}(hjJhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj~hhhjhM ubah}(h]jyah ](jjeh"]h$]h&]jj)jhuh1jhjhM hj{hhubj)}(hhh]h)}(hcheck for LTTPR vswing3 supporth]hcheck for LTTPR vswing3 support}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjphhubah}(h]h ]h"]h$]h&]uh1jhj{hhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities **Description** Returns true if the **caps** for an LTTPR TX PHY indicate support for voltage swing level 3.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh]jn)}(h@``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities h](jt)}(h(``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]jz)}(hjh]h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hLTTPR PHY capabilitiesh]hLTTPR PHY capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h\Returns true if the **caps** for an LTTPR TX PHY indicate support for voltage swing level 3.h](hReturns true if the }(hjhhhNhNubj%)}(h**caps**h]hcaps}(hj hhhNhNubah}(h]h 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ubj)}(h+drm_dp_lttpr_pre_emphasis_level_3_supportedh]j)}(h+drm_dp_lttpr_pre_emphasis_level_3_supportedh]h+drm_dp_lttpr_pre_emphasis_level_3_supported}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubah}(h]h ](jjeh"]h$]h&]jjuh1jhjBhhhjShM ubj)}(h&(const u8 caps[DP_LTTPR_PHY_CAP_SIZE])h]j)}(h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjhsb-c.drm_dp_lttpr_pre_emphasis_level_3_supportedasbuh1hhj~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(hcapsh]hcaps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~ubh)}(hhh]j)}(hDP_LTTPR_PHY_CAP_SIZEh]hDP_LTTPR_PHY_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j-c.drm_dp_lttpr_pre_emphasis_level_3_supportedasbuh1hhj~ubj+)}(hj8Th]h]}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjzubah}(h]h ]h"]h$]h&]jjuh1jhjBhhhjShM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>hhhjShM ubah}(h]j9ah ](jjeh"]h$]h&]jj)jhuh1jhjShM hj;hhubj)}(hhh]h)}(h check for LTTPR preemph3 supporth]h check for LTTPR preemph3 support}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj0hhubah}(h]h ]h"]h$]h&]uh1jhj;hhhjShM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjKjjKjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities **Description** Returns true if the **caps** for an LTTPR TX PHY indicate support for pre-emphasis level 3.h](h)}(h**Parameters**h]j%)}(hjUh]h Parameters}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjSubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjOubji)}(hhh]jn)}(h@``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]`` LTTPR PHY capabilities h](jt)}(h(``const u8 caps[DP_LTTPR_PHY_CAP_SIZE]``h]jz)}(hjth]h$const u8 caps[DP_LTTPR_PHY_CAP_SIZE]}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjnubj)}(hhh]h)}(hLTTPR PHY capabilitiesh]hLTTPR PHY capabilities}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjkubah}(h]h ]h"]h$]h&]uh1jhhjOubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjOubh)}(h[Returns true if the **caps** for an LTTPR TX PHY indicate support for pre-emphasis level 3.h](hReturns true if the }(hjhhhNhNubj%)}(h**caps**h]hcaps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh? for an LTTPR TX PHY indicate support for pre-emphasis level 3.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjOubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_get_phy_test_pattern (C function)c.drm_dp_get_phy_test_patternhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h]int drm_dp_get_phy_test_pattern (struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h]j)}(h\int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_dp_get_phy_test_patternh]j)}(hdrm_dp_get_phy_test_patternh]hdrm_dp_get_phy_test_pattern}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h 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classnameNjj)}j]j}c.drm_dp_get_phy_test_patternasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdatah]hdata}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h(get the requested pattern from the sink.h]h(get the requested pattern from the sink.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj3hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjNjjNjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjXh]h Parameters}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjRubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjwh]hstruct drm_dp_aux *aux}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjqubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjnubjn)}(hK``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. h](jt)}(h'``struct drm_dp_phy_test_params *data``h]jz)}(hjh]h#struct drm_dp_phy_test_params *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h"DP phy compliance test parameters.h]h"DP phy compliance test parameters.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjnubeh}(h]h ]h"]h$]h&]uh1jhhjRubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjRubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjRubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_set_phy_test_pattern (C function)c.drm_dp_set_phy_test_patternhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hhint drm_dp_set_phy_test_pattern (struct drm_dp_aux *aux, struct drm_dp_phy_test_params *data, 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]jah"]h$]h&]uh1jhjiubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjiubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubj)}(h#struct drm_dp_phy_test_params *datah](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_phy_test_paramsh]hdrm_dp_phy_test_params}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_set_phy_test_patternasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdatah]hdata}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubj)}(h u8 dp_revh](h)}(hhh]j)}(hu8h]hu8}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjTmodnameN classnameNjj)}j]jc.drm_dp_set_phy_test_patternasbuh1hhjKubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(hdp_revh]hdp_rev}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubeh}(h]h ]h"]h$]h&]jjuh1jhj,hhhj>hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj(hhhj>hM ubah}(h]j#ah ](jjeh"]h$]h&]jj)jhuh1jhj>hM hj%hhubj)}(hhh]h)}(hset the pattern to the sink.h]hset the pattern to the sink.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj%hhhj>hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. ``u8 dp_rev`` DP revision to use for compliance testing **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hK``struct drm_dp_phy_test_params *data`` DP phy compliance test parameters. h](jt)}(h'``struct drm_dp_phy_test_params *data``h]jz)}(hj"h]h#struct drm_dp_phy_test_params *data}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(h"DP phy compliance test parameters.h]h"DP phy compliance test parameters.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hM hj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj7hM hjubjn)}(h8``u8 dp_rev`` DP revision to use for compliance testing h](jt)}(h ``u8 dp_rev``h]jz)}(hj[h]h u8 dp_rev}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjUubj)}(hhh]h)}(h)DP revision to use for compliance testingh]h)DP revision to use for compliance testing}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphM hjqubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jmhjphM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_as_sdp_supported (C function)c.drm_dp_as_sdp_supportedhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hZbool drm_dp_as_sdp_supported (struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h]j)}(hYbool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_dp_as_sdp_supportedh]j)}(hdrm_dp_as_sdp_supportedh]hdrm_dp_as_sdp_supported}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h=(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7modnameN classnameNjj)}j]j)}jjsbc.drm_dp_as_sdp_supportedasbuh1hhjubj)}(h h]h }(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjchhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hauxh]haux}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jQc.drm_dp_as_sdp_supportedasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jQc.drm_dp_as_sdp_supportedasbuh1hhjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h'check if adaptive sync sdp is supportedh]h'check if adaptive sync sdp is supported}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj5hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjPjjPjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data **Description** Returns true if adaptive sync sdp is supported, else returns falseh](h)}(h**Parameters**h]j%)}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjTubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjyh]hstruct drm_dp_aux *aux}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjsubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjpubjn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjpubeh}(h]h ]h"]h$]h&]uh1jhhjTubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjTubh)}(hBReturns true if adaptive sync sdp is supported, else returns falseh]hBReturns true if adaptive sync sdp is supported, else returns false}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjTubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dp_vsc_sdp_supported (C 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reftargetjmodnameN classnameNjj)}j]j)}jjTsbc.drm_dp_vsc_sdp_supportedasbuh1hhjjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjjubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_vsc_sdp_supportedasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hj8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjJmodnameN classnameNjj)}j]jc.drm_dp_vsc_sdp_supportedasbuh1hhjubj+)}(hj8Th]h]}(hjfhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubeh}(h]h ]h"]h$]h&]jjuh1jhj.hhhj?hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj*hhhj?hM ubah}(h]j%ah ](jjeh"]h$]h&]jj)jhuh1jhj?hM hj'hhubj)}(hhh]h)}(hcheck if vsc sdp is supportedh]hcheck if vsc sdp is supported}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj'hhhj?hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data **Description** Returns true if vsc sdp is supported, else returns falseh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hj h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjDh]h Description}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h8Returns true if vsc sdp is supported, else returns falseh]h8Returns true if vsc sdp is supported, else returns false}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_vsc_sdp_pack (C function)c.drm_dp_vsc_sdp_packhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hRssize_t drm_dp_vsc_sdp_pack (const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h]j)}(hQssize_t drm_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_dp_vsc_sdp_packsbc.drm_dp_vsc_sdp_packasbuh1hhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_dp_vsc_sdp_packh]j)}(hjh]hdrm_dp_vsc_sdp_pack}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h6(const struct drm_dp_vsc_sdp *vsc, struct dp_sdp *sdp)h](j)}(h const struct drm_dp_vsc_sdp *vsch](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_vsc_sdph]hdrm_dp_vsc_sdp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_vsc_sdp_packasbuh1hhjubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj@hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hvsch]hvsc}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct dp_sdp *sdph](j)}(hjh]hstruct}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubh)}(hhh]j)}(hdp_sdph]hdp_sdp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_vsc_sdp_packasbuh1hhjbubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjbubj)}(hsdph]hsdp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]j|ah ](jjeh"]h$]h&]jj)jhuh1jhjhM hj~hhubj)}(hhh]h)}(h(pack a given vsc sdp into generic dp_sdph]h(pack a given vsc sdp into generic dp_sdp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj~hhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjAhNhNubj)}(hXE**Parameters** ``const struct drm_dp_vsc_sdp *vsc`` vsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification ``struct dp_sdp *sdp`` valid handle to the generic dp_sdp which will be packed **Description** Returns length of sdp on success and error code on failureh](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubji)}(hhh](jn)}(h``const struct drm_dp_vsc_sdp *vsc`` vsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification h](jt)}(h$``const struct drm_dp_vsc_sdp *vsc``h]jz)}(hj(h]h const struct drm_dp_vsc_sdp *vsc}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj"ubj)}(hhh]h)}(hmvsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specificationh]hmvsc sdp initialized according to its purpose as defined in table 2-118 - table 2-120 in DP 1.4a specification}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj>ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj=hM hjubjn)}(hO``struct dp_sdp *sdp`` valid handle to the generic dp_sdp which will be packed h](jt)}(h``struct dp_sdp *sdp``h]jz)}(hjbh]hstruct dp_sdp *sdp}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj\ubj)}(hhh]h)}(h7valid handle to the generic dp_sdp which will be packedh]h7valid handle to the generic dp_sdp which will be packed}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhM hjxubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jmhjwhM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubh)}(h:Returns length of sdp on success and error code on failureh]h:Returns length of sdp on success and error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_get_pcon_max_frl_bw (C function)c.drm_dp_get_pcon_max_frl_bwhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hZint drm_dp_get_pcon_max_frl_bw (const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h]j)}(hYint drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM9ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM9ubj)}(hdrm_dp_get_pcon_max_frl_bwh]j)}(hdrm_dp_get_pcon_max_frl_bwh]hdrm_dp_get_pcon_max_frl_bw}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM9ubj)}(h;(const u8 dpcd[DP_RECEIVER_CAP_SIZE], const u8 port_cap[4])h](j)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]j)}jjsbc.drm_dp_get_pcon_max_frl_bwasbuh1hhjubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jYc.drm_dp_get_pcon_max_frl_bwasbuh1hhjubj+)}(hj8Th]h]}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst u8 port_cap[4]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jYc.drm_dp_get_pcon_max_frl_bwasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hport_caph]hport_cap}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj )}(hjh]h4}(hj$ hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjubj+)}(hj8Th]h]}(hj1 hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM9ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM9ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM9hjhhubj)}(hhh]h)}(hmaximum frl supported by PCONh]hmaximum frl supported by PCON}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM9hjW hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM9ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjr jjr jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data ``const u8 port_cap[4]`` port capabilities **Description** Returns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.h](h)}(h**Parameters**h]j%)}(hj| h]h Parameters}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjz ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjv ubji)}(hhh](jn)}(hG``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` DisplayPort configuration data h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hj h]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM:hj ubj)}(hhh]h)}(hDisplayPort configuration datah]hDisplayPort configuration data}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM:hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hM:hj ubjn)}(h+``const u8 port_cap[4]`` port capabilities h](jt)}(h``const u8 port_cap[4]``h]jz)}(hj h]hconst u8 port_cap[4]}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM;hj ubj)}(hhh]h)}(hport capabilitiesh]hport capabilities}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM;hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hM;hj ubeh}(h]h ]h"]h$]h&]uh1jhhjv ubh)}(h**Description**h]j%)}(hj!h]h Description}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj !ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM=hjv ubh)}(hTReturns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.h]hTReturns maximum frl bandwidth supported by PCON in GBPS, returns 0 if not supported.}(hj%!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM<hjv ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_pcon_frl_prepare (C function)c.drm_dp_pcon_frl_preparehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hOint drm_dp_pcon_frl_prepare (struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h]j)}(hNint drm_dp_pcon_frl_prepare(struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h](j)}(hinth]hint}(hjT!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP!hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM`ubj)}(h h]h }(hjc!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP!hhhjb!hM`ubj)}(hdrm_dp_pcon_frl_prepareh]j)}(hdrm_dp_pcon_frl_prepareh]hdrm_dp_pcon_frl_prepare}(hju!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq!ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjP!hhhjb!hM`ubj)}(h3(struct drm_dp_aux *aux, bool enable_frl_ready_hpd)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]j)}jjw!sbc.drm_dp_pcon_frl_prepareasbuh1hhj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj+)}(hj9h]h*}(hj!hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj!ubj)}(hauxh]haux}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubj)}(hbool enable_frl_ready_hpdh](j)}(hjAh]hbool}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(henable_frl_ready_hpdh]henable_frl_ready_hpd}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj!ubeh}(h]h ]h"]h$]h&]jjuh1jhjP!hhhjb!hM`ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjL!hhhjb!hM`ubah}(h]jG!ah ](jjeh"]h$]h&]jj)jhuh1jhjb!hM`hjI!hhubj)}(hhh]h)}(hPrepare PCON for FRL.h]hPrepare PCON for FRL.}(hjH"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM`hjE"hhubah}(h]h ]h"]h$]h&]uh1jhjI!hhhjb!hM`ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj`"jj`"jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``bool enable_frl_ready_hpd`` Configure DP_PCON_ENABLE_HPD_READY. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hjj"h]h Parameters}(hjl"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjh"ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMdhjd"ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj"h]hstruct drm_dp_aux *aux}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMahj"ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMahj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hMahj"ubjn)}(hB``bool enable_frl_ready_hpd`` Configure DP_PCON_ENABLE_HPD_READY. h](jt)}(h``bool enable_frl_ready_hpd``h]jz)}(hj"h]hbool enable_frl_ready_hpd}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMbhj"ubj)}(hhh]h)}(h#Configure DP_PCON_ENABLE_HPD_READY.h]h#Configure DP_PCON_ENABLE_HPD_READY.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hMbhj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hMbhj"ubeh}(h]h ]h"]h$]h&]uh1jhhjd"ubh)}(h**Description**h]j%)}(hj"h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMdhjd"ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMchjd"ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dp_pcon_is_frl_ready (C function)c.drm_dp_pcon_is_frl_readyhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h6bool drm_dp_pcon_is_frl_ready (struct drm_dp_aux *aux)h]j)}(h5bool drm_dp_pcon_is_frl_ready(struct drm_dp_aux *aux)h](j)}(hjAh]hbool}(hjB#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>#hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMsubj)}(h h]h }(hjP#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>#hhhjO#hMsubj)}(hdrm_dp_pcon_is_frl_readyh]j)}(hdrm_dp_pcon_is_frl_readyh]hdrm_dp_pcon_is_frl_ready}(hjb#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^#ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj>#hhhjO#hMsubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj~#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz#ubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz#ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj#modnameN classnameNjj)}j]j)}jjd#sbc.drm_dp_pcon_is_frl_readyasbuh1hhjz#ubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz#ubj+)}(hj9h]h*}(hj#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjz#ubj)}(hauxh]haux}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz#ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjv#ubah}(h]h ]h"]h$]h&]jjuh1jhj>#hhhjO#hMsubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj:#hhhjO#hMsubah}(h]j5#ah ](jjeh"]h$]h&]jj)jhuh1jhjO#hMshj7#hhubj)}(hhh]h)}(hIs PCON ready for FRLh]hIs PCON ready for FRL}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMshj#hhubah}(h]h ]h"]h$]h&]uh1jhj7#hhhjO#hMsubeh}(h]h ](jfunctioneh"]h$]h&]jjjj$jj$jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns true if success, else returns false.h](h)}(h**Parameters**h]j%)}(hj#$h]h Parameters}(hj%$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMwhj$ubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjB$h]hstruct drm_dp_aux *aux}(hjD$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@$ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMthj<$ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj[$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjW$hMthjX$ubah}(h]h ]h"]h$]h&]uh1jhj<$ubeh}(h]h ]h"]h$]h&]uh1jmhjW$hMthj9$ubah}(h]h ]h"]h$]h&]uh1jhhj$ubh)}(h**Description**h]j%)}(hj}$h]h Description}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{$ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMvhj$ubh)}(h,Returns true if success, else returns false.h]h,Returns true if success, else returns false.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMuhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_pcon_frl_configure_1 (C function)c.drm_dp_pcon_frl_configure_1hNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hWint drm_dp_pcon_frl_configure_1 (struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h]j)}(hVint drm_dp_pcon_frl_configure_1(struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h](j)}(hinth]hint}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$hhhj$hMubj)}(hdrm_dp_pcon_frl_configure_1h]j)}(hdrm_dp_pcon_frl_configure_1h]hdrm_dp_pcon_frl_configure_1}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj$hhhj$hMubj)}(h7(struct drm_dp_aux *aux, int max_frl_gbps, u8 frl_mode)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj)}(h h]h }(hj %hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj%modnameN classnameNjj)}j]j)}jj$sbc.drm_dp_pcon_frl_configure_1asbuh1hhj$ubj)}(h h]h }(hj=%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubj+)}(hj9h]h*}(hjK%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj$ubj)}(hauxh]haux}(hjX%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(hint max_frl_gbpsh](j)}(hinth]hint}(hjq%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm%ubj)}(h max_frl_gbpsh]h max_frl_gbps}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjm%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubj)}(h u8 frl_modeh](h)}(hhh]j)}(hu8h]hu8}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj%modnameN classnameNjj)}j]j9%c.drm_dp_pcon_frl_configure_1asbuh1hhj%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj)}(hfrl_modeh]hfrl_mode}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj$ubeh}(h]h ]h"]h$]h&]jjuh1jhj$hhhj$hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj$hhhj$hMubah}(h]j$ah ](jjeh"]h$]h&]jj)jhuh1jhj$hMhj$hhubj)}(hhh]h)}(h!Set HDMI LINK Configuration-Step1h]h!Set HDMI LINK Configuration-Step1}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%hhubah}(h]h ]h"]h$]h&]uh1jhj$hhhj$hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj&jj&jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int max_frl_gbps`` maximum frl bw to be configured between PCON and HDMI sink ``u8 frl_mode`` FRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hj!&h]h Parameters}(hj#&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj&ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj@&h]hstruct drm_dp_aux *aux}(hjB&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>&ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:&ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjY&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU&hMhjV&ubah}(h]h ]h"]h$]h&]uh1jhj:&ubeh}(h]h ]h"]h$]h&]uh1jmhjU&hMhj7&ubjn)}(hP``int max_frl_gbps`` maximum frl bw to be configured between PCON and HDMI sink h](jt)}(h``int max_frl_gbps``h]jz)}(hjy&h]hint max_frl_gbps}(hj{&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjw&ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjs&ubj)}(hhh]h)}(h:maximum frl bw to be configured between PCON and HDMI sinkh]h:maximum frl bw to be configured between PCON and HDMI sink}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hMhj&ubah}(h]h ]h"]h$]h&]uh1jhjs&ubeh}(h]h ]h"]h$]h&]uh1jmhj&hMhj7&ubjn)}(h``u8 frl_mode`` FRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training. h](jt)}(h``u8 frl_mode``h]jz)}(hj&h]h u8 frl_mode}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj&ubj)}(hhh]h)}(hFRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training.h]hFRL Training mode, it can be either Concurrent or Sequential. In Concurrent Mode, the FRL link bring up can be done along with DP Link training. In Sequential mode, the FRL link bring up is done prior to the DP Link training.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jmhj&hMhj7&ubeh}(h]h ]h"]h$]h&]uh1jhhj&ubh)}(h**Description**h]j%)}(hj&h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj&ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_pcon_frl_configure_2 (C function)c.drm_dp_pcon_frl_configure_2hNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hWint drm_dp_pcon_frl_configure_2 (struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h]j)}(hVint drm_dp_pcon_frl_configure_2(struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h](j)}(hinth]hint}(hj3'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/'hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjB'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/'hhhjA'hMubj)}(hdrm_dp_pcon_frl_configure_2h]j)}(hdrm_dp_pcon_frl_configure_2h]hdrm_dp_pcon_frl_configure_2}(hjT'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjP'ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj/'hhhjA'hMubj)}(h7(struct drm_dp_aux *aux, int max_frl_mask, u8 frl_type)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjp'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl'ubj)}(h h]h }(hj}'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl'ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'modnameN classnameNjj)}j]j)}jjV'sbc.drm_dp_pcon_frl_configure_2asbuh1hhjl'ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl'ubj+)}(hj9h]h*}(hj'hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjl'ubj)}(hauxh]haux}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjh'ubj)}(hint max_frl_maskh](j)}(hinth]hint}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(h max_frl_maskh]h max_frl_mask}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjh'ubj)}(h u8 frl_typeh](h)}(hhh]j)}(hu8h]hu8}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj(modnameN classnameNjj)}j]j'c.drm_dp_pcon_frl_configure_2asbuh1hhj(ubj)}(h h]h }(hj8(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj)}(hfrl_typeh]hfrl_type}(hjF(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjh'ubeh}(h]h ]h"]h$]h&]jjuh1jhj/'hhhjA'hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+'hhhjA'hMubah}(h]j&'ah ](jjeh"]h$]h&]jj)jhuh1jhjA'hMhj('hhubj)}(hhh]h)}(h"Set HDMI Link configuration Step-2h]h"Set HDMI Link configuration Step-2}(hjp(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjm(hhubah}(h]h ]h"]h$]h&]uh1jhj('hhhjA'hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj(jj(jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``int max_frl_mask`` Max FRL BW to be tried by the PCON with HDMI Sink ``u8 frl_type`` FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON. **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hj(h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj(h]hstruct drm_dp_aux *aux}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj(ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jmhj(hMhj(ubjn)}(hG``int max_frl_mask`` Max FRL BW to be tried by the PCON with HDMI Sink h](jt)}(h``int max_frl_mask``h]jz)}(hj(h]hint max_frl_mask}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj(ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubj)}(hhh]h)}(h1Max FRL BW to be tried by the PCON with HDMI Sinkh]h1Max FRL BW to be tried by the PCON with HDMI Sink}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj)ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jmhj(hMhj(ubjn)}(hX``u8 frl_type`` FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON. h](jt)}(h``u8 frl_type``h]jz)}(hj#)h]h u8 frl_type}(hj%)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!)ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj)ubj)}(hhh]h)}(hX FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON.h]hX FRL training type, can be Extended, or Normal. In Normal FRL training, the PCON tries each frl bw from the max_frl_mask starting from min, and stops when link training is successful. In Extended FRL training, all frl bw selected in the mask are trained by the PCON.}(hj<)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj9)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhj8)hMhj(ubeh}(h]h ]h"]h$]h&]uh1jhhj(ubh)}(h**Description**h]j%)}(hj_)h]h Description}(hja)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj])ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hju)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj(ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_pcon_reset_frl_config (C function)c.drm_dp_pcon_reset_frl_confighNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h9int drm_dp_pcon_reset_frl_config (struct drm_dp_aux *aux)h]j)}(h8int drm_dp_pcon_reset_frl_config(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhj)hMubj)}(hdrm_dp_pcon_reset_frl_configh]j)}(hdrm_dp_pcon_reset_frl_configh]hdrm_dp_pcon_reset_frl_config}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj)hhhj)hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]j)}jj)sbc.drm_dp_pcon_reset_frl_configasbuh1hhj)ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj+)}(hj9h]h*}(hj-*hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)ubj)}(hauxh]haux}(hj:*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubah}(h]h ]h"]h$]h&]jjuh1jhj)hhhj)hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj)hhhj)hMubah}(h]j)ah ](jjeh"]h$]h&]jj)jhuh1jhj)hMhj)hhubj)}(hhh]h)}(hRe-Set HDMI Link configuration.h]hRe-Set HDMI Link configuration.}(hjd*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhja*hhubah}(h]h ]h"]h$]h&]uh1jhj)hhhj)hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj|*jj|*jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj*ubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj*h]hstruct drm_dp_aux *aux}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj*ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhj*hMhj*ubah}(h]h ]h"]h$]h&]uh1jhhj*ubh)}(h**Description**h]j%)}(hj*h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj*ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_dp_pcon_frl_enable (C function)c.drm_dp_pcon_frl_enablehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h3int drm_dp_pcon_frl_enable (struct drm_dp_aux *aux)h]j)}(h2int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj%+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!+hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj4+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!+hhhj3+hMubj)}(hdrm_dp_pcon_frl_enableh]j)}(hdrm_dp_pcon_frl_enableh]hdrm_dp_pcon_frl_enable}(hjF+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjB+ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj!+hhhj3+hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjb+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^+ubj)}(h h]h }(hjo+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^+ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j)}jjH+sbc.drm_dp_pcon_frl_enableasbuh1hhj^+ubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^+ubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj^+ubj)}(hauxh]haux}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjZ+ubah}(h]h ]h"]h$]h&]jjuh1jhj!+hhhj3+hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhj3+hMubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1jhj3+hMhj+hhubj)}(hhh]h)}(hEnable HDMI link through FRLh]hEnable HDMI link through FRL}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj+hhubah}(h]h ]h"]h$]h&]uh1jhj+hhhj3+hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 if success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hj,h]h Parameters}(hj ,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj,ubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj&,h]hstruct drm_dp_aux *aux}(hj(,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$,ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj ,ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj?,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;,hMhj<,ubah}(h]h ]h"]h$]h&]uh1jhj ,ubeh}(h]h ]h"]h$]h&]uh1jmhj;,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhhj,ubh)}(h**Description**h]j%)}(hja,h]h Description}(hjc,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_,ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj,ubh)}(h7Returns 0 if success, else returns negative error code.h]h7Returns 0 if success, else returns negative error code.}(hjw,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj,ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_pcon_hdmi_link_active (C function)c.drm_dp_pcon_hdmi_link_activehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h:bool drm_dp_pcon_hdmi_link_active (struct drm_dp_aux *aux)h]j)}(h9bool drm_dp_pcon_hdmi_link_active(struct drm_dp_aux *aux)h](j)}(hjAh]hbool}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj,hMubj)}(hdrm_dp_pcon_hdmi_link_activeh]j)}(hdrm_dp_pcon_hdmi_link_activeh]hdrm_dp_pcon_hdmi_link_active}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj,hhhj,hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj-modnameN classnameNjj)}j]j)}jj,sbc.drm_dp_pcon_hdmi_link_activeasbuh1hhj,ubj)}(h h]h }(hj -hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj+)}(hj9h]h*}(hj.-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj,ubj)}(hauxh]haux}(hj;-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,ubah}(h]h ]h"]h$]h&]jjuh1jhj,hhhj,hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj,hhhj,hMubah}(h]j,ah ](jjeh"]h$]h&]jj)jhuh1jhj,hMhj,hhubj)}(hhh]h)}(h-check if the PCON HDMI LINK status is active.h]h-check if the PCON HDMI LINK status is active.}(hje-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjb-hhubah}(h]h ]h"]h$]h&]uh1jhj,hhhj,hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj}-jj}-jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns true if link is active else returns false.h](h)}(h**Parameters**h]j%)}(hj-h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj-h]hstruct drm_dp_aux *aux}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jmhj-hMhj-ubah}(h]h ]h"]h$]h&]uh1jhhj-ubh)}(h**Description**h]j%)}(hj-h]h Description}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubh)}(h2Returns true if link is active else returns false.h]h2Returns true if link is active else returns false.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_pcon_hdmi_link_mode (C function)c.drm_dp_pcon_hdmi_link_modehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hMint drm_dp_pcon_hdmi_link_mode (struct drm_dp_aux *aux, u8 *frl_trained_mask)h]j)}(hLint drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, u8 *frl_trained_mask)h](j)}(hinth]hint}(hj&.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj".hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj5.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj".hhhj4.hMubj)}(hdrm_dp_pcon_hdmi_link_modeh]j)}(hdrm_dp_pcon_hdmi_link_modeh]hdrm_dp_pcon_hdmi_link_mode}(hjG.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC.ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj".hhhj4.hMubj)}(h.(struct drm_dp_aux *aux, u8 *frl_trained_mask)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjc.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_.ubj)}(h h]h }(hjp.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_.ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j)}jjI.sbc.drm_dp_pcon_hdmi_link_modeasbuh1hhj_.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_.ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj_.ubj)}(hauxh]haux}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[.ubj)}(hu8 *frl_trained_maskh](h)}(hhh]j)}(hu8h]hu8}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j.c.drm_dp_pcon_hdmi_link_modeasbuh1hhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj.ubj)}(hfrl_trained_maskh]hfrl_trained_mask}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[.ubeh}(h]h ]h"]h$]h&]jjuh1jhj".hhhj4.hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj.hhhj4.hMubah}(h]j.ah ](jjeh"]h$]h&]jj)jhuh1jhj4.hMhj.hhubj)}(hhh]h)}(hget the PCON HDMI LINK MODEh]hget the PCON HDMI LINK MODE}(hj;/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj8/hhubah}(h]h ]h"]h$]h&]uh1jhj.hhhj4.hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjS/jjS/jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 *frl_trained_mask`` pointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set. **Description** Returns the link mode : TMDS or FRL on success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hj]/h]h Parameters}(hj_/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[/ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjW/ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj|/h]hstruct drm_dp_aux *aux}(hj~/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjz/ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjv/ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1jhjv/ubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjs/ubjn)}(h``u8 *frl_trained_mask`` pointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set. h](jt)}(h``u8 *frl_trained_mask``h]jz)}(hj/h]hu8 *frl_trained_mask}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubj)}(hhh]h)}(hpointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set.h]hpointer to store bitmask of the trained bw configuration. Valid only if the MODE returned is FRL. For Normal Link training mode only 1 of the bits will be set, but in case of Extended mode, more than one bits can be set.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjs/ubeh}(h]h ]h"]h$]h&]uh1jhhjW/ubh)}(h**Description**h]j%)}(hj/h]h Description}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjW/ubh)}(hQReturns the link mode : TMDS or FRL on success, else returns negative error code.h]hQReturns the link mode : TMDS or FRL on success, else returns negative error code.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjW/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_dp_pcon_hdmi_frl_link_error_count (C function)'c.drm_dp_pcon_hdmi_frl_link_error_counthNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hdvoid drm_dp_pcon_hdmi_frl_link_error_count (struct drm_dp_aux *aux, struct drm_connector *connector)h]j)}(hcvoid drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hj60hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj20hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM5ubj)}(h h]h }(hjE0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj20hhhjD0hM5ubj)}(h%drm_dp_pcon_hdmi_frl_link_error_counth]j)}(h%drm_dp_pcon_hdmi_frl_link_error_counth]h%drm_dp_pcon_hdmi_frl_link_error_count}(hjW0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjS0ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj20hhhjD0hM5ubj)}(h9(struct drm_dp_aux *aux, struct drm_connector *connector)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjs0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo0ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]j)}jjY0sb'c.drm_dp_pcon_hdmi_frl_link_error_countasbuh1hhjo0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo0ubj+)}(hj9h]h*}(hj0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjo0ubj)}(hauxh]haux}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjo0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjk0ubj)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj1modnameN classnameNjj)}j]j0'c.drm_dp_pcon_hdmi_frl_link_error_countasbuh1hhj0ubj)}(h h]h }(hj!1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj+)}(hj9h]h*}(hj/1hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj0ubj)}(h connectorh]h connector}(hj<1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjk0ubeh}(h]h ]h"]h$]h&]jjuh1jhj20hhhjD0hM5ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj.0hhhjD0hM5ubah}(h]j)0ah ](jjeh"]h$]h&]jj)jhuh1jhjD0hM5hj+0hhubj)}(hhh]h)}(hMprint the error count per lane during link failure between PCON and HDMI sinkh]hMprint the error count per lane during link failure between PCON and HDMI sink}(hjf1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM5hjc1hhubah}(h]h ]h"]h$]h&]uh1jhj+0hhhjD0hM5ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj~1jj~1jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``struct drm_connector *connector`` DRM connector code.h](h)}(h**Parameters**h]j%)}(hj1h]h Parameters}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM9hj1ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj1h]hstruct drm_dp_aux *aux}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM7hj1ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hM7hj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhj1hM7hj1ubjn)}(h7``struct drm_connector *connector`` DRM connector code.h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj1h]hstruct drm_connector *connector}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM8hj1ubj)}(hhh]h)}(hDRM connector code.h]hDRM connector code.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hM8hj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhj1hM8hj1ubeh}(h]h ]h"]h$]h&]uh1jhhj1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_pcon_pps_default (C function)c.drm_dp_pcon_pps_defaulthNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h4int drm_dp_pcon_pps_default (struct drm_dp_aux *aux)h]j)}(h3int drm_dp_pcon_pps_default(struct drm_dp_aux *aux)h](j)}(hinth]hint}(hj92hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj52hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjH2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj52hhhjG2hMubj)}(hdrm_dp_pcon_pps_defaulth]j)}(hdrm_dp_pcon_pps_defaulth]hdrm_dp_pcon_pps_default}(hjZ2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV2ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj52hhhjG2hMubj)}(h(struct drm_dp_aux *aux)h]j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjv2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr2ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj2modnameN classnameNjj)}j]j)}jj\2sbc.drm_dp_pcon_pps_defaultasbuh1hhjr2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr2ubj+)}(hj9h]h*}(hj2hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjr2ubj)}(hauxh]haux}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr2ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjn2ubah}(h]h ]h"]h$]h&]jjuh1jhj52hhhjG2hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj12hhhjG2hMubah}(h]j,2ah ](jjeh"]h$]h&]jj)jhuh1jhjG2hMhj.2hhubj)}(hhh]h)}(hOLet PCON fill the default pps parameters for DSC1.2 between PCON & HDMI2.1 sinkh]hOLet PCON fill the default pps parameters for DSC1.2 between PCON & HDMI2.1 sink}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj2hhubah}(h]h ]h"]h$]h&]uh1jhj.2hhhjG2hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj3jj3jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel **Description** Returns 0 on success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hj3h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubji)}(hhh]jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj:3h]hstruct drm_dp_aux *aux}(hj<3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj83ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj43ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjS3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjO3hMhjP3ubah}(h]h ]h"]h$]h&]uh1jhj43ubeh}(h]h ]h"]h$]h&]uh1jmhjO3hMhj13ubah}(h]h ]h"]h$]h&]uh1jhhj3ubh)}(h**Description**h]j%)}(hju3h]h Description}(hjw3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjs3ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubh)}(h7Returns 0 on success, else returns negative error code.h]h7Returns 0 on success, else returns negative error code.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_pcon_pps_override_buf (C function)c.drm_dp_pcon_pps_override_bufhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hJint drm_dp_pcon_pps_override_buf (struct drm_dp_aux *aux, u8 pps_buf[128])h]j)}(hIint drm_dp_pcon_pps_override_buf(struct drm_dp_aux *aux, u8 pps_buf[128])h](j)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhj3hMubj)}(hdrm_dp_pcon_pps_override_bufh]j)}(hdrm_dp_pcon_pps_override_bufh]hdrm_dp_pcon_pps_override_buf}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj3hhhj3hMubj)}(h)(struct drm_dp_aux *aux, u8 pps_buf[128])h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj4modnameN classnameNjj)}j]j)}jj3sbc.drm_dp_pcon_pps_override_bufasbuh1hhj3ubj)}(h h]h }(hj54hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj+)}(hj9h]h*}(hjC4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3ubj)}(hauxh]haux}(hjP4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubj)}(hu8 pps_buf[128]h](h)}(hhh]j)}(hu8h]hu8}(hjl4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhji4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjn4modnameN classnameNjj)}j]j14c.drm_dp_pcon_pps_override_bufasbuh1hhje4ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje4ubj)}(hpps_bufh]hpps_buf}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje4ubj+)}(hj Th]h[}(hj4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hje4ubj )}(h128h]h128}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1j hje4ubj+)}(hj8Th]h]}(hj4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hje4ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubeh}(h]h ]h"]h$]h&]jjuh1jhj3hhhj3hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj3hhhj3hMubah}(h]j3ah ](jjeh"]h$]h&]jj)jhuh1jhj3hMhj3hhubj)}(hhh]h)}(h3Configure PPS encoder override buffer for HDMI sinkh]h3Configure PPS encoder override buffer for HDMI sink}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj4hhubah}(h]h ]h"]h$]h&]uh1jhj3hhhj3hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj5jj5jjjuh1jhhhjAhNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` DisplayPort AUX channel ``u8 pps_buf[128]`` 128 bytes to be written into PPS buffer for HDMI sink by PCON. **Description** Returns 0 on success, else returns negative error code.h](h)}(h**Parameters**h]j%)}(hj 5h]h Parameters}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj 5ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj5ubji)}(hhh](jn)}(h3``struct drm_dp_aux *aux`` DisplayPort AUX channel h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj+5h]hstruct drm_dp_aux *aux}(hj-5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)5ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj%5ubj)}(hhh]h)}(hDisplayPort AUX channelh]hDisplayPort AUX channel}(hjD5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@5hMhjA5ubah}(h]h ]h"]h$]h&]uh1jhj%5ubeh}(h]h ]h"]h$]h&]uh1jmhj@5hMhj"5ubjn)}(hS``u8 pps_buf[128]`` 128 bytes to be written into PPS buffer for HDMI sink by PCON. h](jt)}(h``u8 pps_buf[128]``h]jz)}(hjd5h]hu8 pps_buf[128]}(hjf5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjb5ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj^5ubj)}(hhh]h)}(h>128 bytes to be written into PPS buffer for HDMI sink by PCON.h]h>128 bytes to be written into PPS buffer for HDMI sink by PCON.}(hj}5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjy5hMhjz5ubah}(h]h ]h"]h$]h&]uh1jhj^5ubeh}(h]h ]h"]h$]h&]uh1jmhjy5hMhj"5ubeh}(h]h ]h"]h$]h&]uh1jhhj5ubh)}(h**Description**h]j%)}(hj5h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj5ubh)}(h7Returns 0 on success, else returns negative error code.h]h7Returns 0 on success, else returns negative error code.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_edp_backlight_set_level (C function)c.drm_edp_backlight_set_levelhNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hlint drm_edp_backlight_set_level (struct drm_dp_aux *aux, const struct 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classnameNjj)}j]j)}jj6sbc.drm_edp_backlight_set_levelasbuh1hhj6ubj)}(h h]h }(hj_6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjm6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hauxh]haux}(hjz6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubj)}(h'const struct drm_edp_backlight_info *blh](j)}(hjUh]hconst}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(hjh]hstruct}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj6modnameN classnameNjj)}j]j[6c.drm_edp_backlight_set_levelasbuh1hhj6ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hj6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hblh]hbl}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubj)}(h u32 levelh](h)}(hhh]j)}(hu32h]hu32}(hj!7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj#7modnameN classnameNjj)}j]j[6c.drm_edp_backlight_set_levelasbuh1hhj7ubj)}(h h]h }(hj?7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(hlevelh]hlevel}(hjM7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubeh}(h]h ]h"]h$]h&]jjuh1jhj5hhhj5hM/ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj5hhhj5hM/ubah}(h]j5ah ](jjeh"]h$]h&]jj)jhuh1jhj5hM/hj5hhubj)}(hhh]h)}(h/Set the backlight level of an eDP panel via AUXh]h/Set the backlight level of an eDP panel via AUX}(hjw7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM/hjt7hhubah}(h]h ]h"]h$]h&]uh1jhj5hhhj5hM/ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj7jj7jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() ``u32 level`` The brightness level to set **Description** Sets the brightness level of an eDP panel's backlight. Note that the panel's backlight must already have been enabled by the driver by calling drm_edp_backlight_enable(). **Return** ``0`` on success, negative error code on failureh](h)}(h**Parameters**h]j%)}(hj7h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM3hj7ubji)}(hhh](jn)}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj7h]hstruct drm_dp_aux *aux}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM0hj7ubj)}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hM0hj7ubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jmhj7hM0hj7ubjn)}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](jt)}(h+``const struct drm_edp_backlight_info *bl``h]jz)}(hj7h]h'const struct drm_edp_backlight_info *bl}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM1hj7ubj)}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj 8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hM1hj8ubah}(h]h ]h"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]uh1jmhj8hM1hj7ubjn)}(h*``u32 level`` The brightness level to set h](jt)}(h ``u32 level``h]jz)}(hj*8h]h u32 level}(hj,8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj(8ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM2hj$8ubj)}(hhh]h)}(hThe brightness level to seth]hThe brightness level to set}(hjC8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?8hM2hj@8ubah}(h]h ]h"]h$]h&]uh1jhj$8ubeh}(h]h ]h"]h$]h&]uh1jmhj?8hM2hj7ubeh}(h]h ]h"]h$]h&]uh1jhhj7ubh)}(h**Description**h]j%)}(hje8h]h Description}(hjg8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjc8ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM4hj7ubh)}(hSets the brightness level of an eDP panel's backlight. Note that the panel's backlight must already have been enabled by the driver by calling drm_edp_backlight_enable().h]hSets the brightness level of an eDP panel’s backlight. Note that the panel’s backlight must already have been enabled by the driver by calling drm_edp_backlight_enable().}(hj{8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM3hj7ubh)}(h **Return**h]j%)}(hj8h]hReturn}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM6hj7ubh)}(h0``0`` on success, negative error code on failureh](jz)}(h``0``h]h0}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubh+ on success, negative error code on failure}(hj8hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM7hj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_edp_backlight_enable (C function)c.drm_edp_backlight_enablehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hoint drm_edp_backlight_enable (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h]j)}(hnint drm_edp_backlight_enable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h](j)}(hinth]hint}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8hhhj8hMubj)}(hdrm_edp_backlight_enableh]j)}(hdrm_edp_backlight_enableh]hdrm_edp_backlight_enable}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj8hhhj8hMubj)}(hR(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl, const u32 level)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hj)9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj:9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj79ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<9modnameN classnameNjj)}j]j)}jj9sbc.drm_edp_backlight_enableasbuh1hhj9ubj)}(h h]h }(hjZ9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj+)}(hj9h]h*}(hjh9hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj9ubj)}(hauxh]haux}(hju9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9ubj)}(h'const struct drm_edp_backlight_info *blh](j)}(hjUh]hconst}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(hjh]hstruct}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubh)}(hhh]j)}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9modnameN classnameNjj)}j]jV9c.drm_edp_backlight_enableasbuh1hhj9ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubj+)}(hj9h]h*}(hj9hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj9ubj)}(hblh]hbl}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9ubj)}(hconst u32 levelh](j)}(hjUh]hconst}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj)}(h h]h }(hj&:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubh)}(hhh]j)}(hu32h]hu32}(hj7:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9:modnameN classnameNjj)}j]jV9c.drm_edp_backlight_enableasbuh1hhj:ubj)}(h h]h }(hjU:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj)}(hlevelh]hlevel}(hjc:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj9ubeh}(h]h ]h"]h$]h&]jjuh1jhj8hhhj8hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj8hhhj8hMubah}(h]j8ah ](jjeh"]h$]h&]jj)jhuh1jhj8hMhj8hhubj)}(hhh]h)}(h*Enable an eDP panel's backlight using DPCDh]h,Enable an eDP panel’s backlight using DPCD}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:hhubah}(h]h ]h"]h$]h&]uh1jhj8hhhj8hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() ``const u32 level`` The initial backlight level to set via AUX, if there is one **Description** This function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc. Note that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO. **Return** ``0`` on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:ubji)}(hhh](jn)}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj:h]hstruct drm_dp_aux *aux}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:ubj)}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj:ubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhj:hMhj:ubjn)}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](jt)}(h+``const struct drm_edp_backlight_info *bl``h]jz)}(hj;h]h'const struct drm_edp_backlight_info *bl}(hj ;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj;ubj)}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj ;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj;hMhj;ubah}(h]h ]h"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]uh1jmhj;hMhj:ubjn)}(hP``const u32 level`` The initial backlight level to set via AUX, if there is one h](jt)}(h``const u32 level``h]jz)}(hj@;h]hconst u32 level}(hjB;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>;ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:;ubj)}(hhh]h)}(h;The initial backlight level to set via AUX, if there is oneh]h;The initial backlight level to set via AUX, if there is one}(hjY;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU;hMhjV;ubah}(h]h ]h"]h$]h&]uh1jhj:;ubeh}(h]h ]h"]h$]h&]uh1jmhjU;hMhj:ubeh}(h]h ]h"]h$]h&]uh1jhhj:ubh)}(h**Description**h]j%)}(hj{;h]h Description}(hj};hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjy;ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:ubh)}(hThis function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc.h]hThis function handles enabling DPCD backlight controls on a panel over DPCD, while additionally restoring any important backlight state such as the given backlight level, the brightness byte count, backlight frequency, etc.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:ubh)}(hXNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO.h](hNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, }(hj;hhhNhNubh)}(hD:c:type:`drm_edp_backlight_info.aux_enable `h]jz)}(hj;h]h!drm_edp_backlight_info.aux_enable}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj;ubh will be set to }(hj;hhhNhNubjz)}(h ``false``h]hfalse}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubhv, this function becomes a no-op, and the driver is expected to handle powering the panel on using the EDP_BL_PWR GPIO.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hMhj:ubh)}(h **Return**h]j%)}(hj;h]hReturn}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:ubh)}(h1``0`` on success, negative error code on failure.h](jz)}(h``0``h]h0}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubh, on success, negative error code on failure.}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_edp_backlight_disable (C function)c.drm_edp_backlight_disablehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h_int drm_edp_backlight_disable (struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h]j)}(h^int drm_edp_backlight_disable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h](j)}(hinth]hint}(hj9<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5<hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjH<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5<hhhjG<hMubj)}(hdrm_edp_backlight_disableh]j)}(hdrm_edp_backlight_disableh]hdrm_edp_backlight_disable}(hjZ<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV<ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj5<hhhjG<hMubj)}(hA(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hjv<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr<ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr<ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j)}jj\<sbc.drm_edp_backlight_disableasbuh1hhjr<ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr<ubj+)}(hj9h]h*}(hj<hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjr<ubj)}(hauxh]haux}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjn<ubj)}(h'const struct drm_edp_backlight_info *blh](j)}(hjUh]hconst}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(hjh]hstruct}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubh)}(hhh]j)}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj!=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj#=modnameN classnameNjj)}j]j<c.drm_edp_backlight_disableasbuh1hhj<ubj)}(h h]h }(hj?=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj+)}(hj9h]h*}(hjM=hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj<ubj)}(hblh]hbl}(hjZ=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjn<ubeh}(h]h ]h"]h$]h&]jjuh1jhj5<hhhjG<hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj1<hhhjG<hMubah}(h]j,<ah ](jjeh"]h$]h&]jj)jhuh1jhjG<hMhj.<hhubj)}(hhh]h)}(h1Disable an eDP backlight using DPCD, if supportedh]h1Disable an eDP backlight using DPCD, if supported}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=hhubah}(h]h ]h"]h$]h&]uh1jhj.<hhhjG<hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj=jj=jjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() **Description** This function handles disabling DPCD backlight controls on a panel over AUX. Note that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO. **Return** ``0`` on success or no-op, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj=h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=ubji)}(hhh](jn)}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj=h]hstruct drm_dp_aux *aux}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=ubj)}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhj=hMhj=ubjn)}(hd``const struct drm_edp_backlight_info *bl`` Backlight capability info from drm_edp_backlight_init() h](jt)}(h+``const struct drm_edp_backlight_info *bl``h]jz)}(hj=h]h'const struct drm_edp_backlight_info *bl}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=ubj)}(hhh]h)}(h7Backlight capability info from drm_edp_backlight_init()h]h7Backlight capability info from drm_edp_backlight_init()}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hMhj>ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhj>hMhj=ubeh}(h]h ]h"]h$]h&]uh1jhhj=ubh)}(h**Description**h]j%)}(hj9>h]h Description}(hj;>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7>ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=ubh)}(hLThis function handles disabling DPCD backlight controls on a panel over AUX.h]hLThis function handles disabling DPCD backlight controls on a panel over AUX.}(hjO>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=ubh)}(hXNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, :c:type:`drm_edp_backlight_info.aux_enable ` will be set to ``false``, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO.h](hNote that certain panels do not support being enabled or disabled via DPCD, but instead require that the driver handle enabling/disabling the panel through implementation-specific means using the EDP_BL_PWR GPIO. For such panels, }(hj^>hhhNhNubh)}(hD:c:type:`drm_edp_backlight_info.aux_enable `h]jz)}(hjh>h]h!drm_edp_backlight_info.aux_enable}(hjj>hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjf>ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_edp_backlight_infouh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj^>ubh will be set to }(hj^>hhhNhNubjz)}(h ``false``h]hfalse}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^>ubhw, this function becomes a no-op, and the driver is expected to handle powering the panel off using the EDP_BL_PWR GPIO.}(hj^>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>hMhj=ubh)}(h **Return**h]j%)}(hj>h]hReturn}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=ubh)}(h:``0`` on success or no-op, negative error code on failure.h](jz)}(h``0``h]h0}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubh5 on success or no-op, negative error code on failure.}(hj>hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_edp_backlight_init (C function)c.drm_edp_backlight_inithNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hint drm_edp_backlight_init (struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h]j)}(hint drm_edp_backlight_init(struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h](j)}(hinth]hint}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>hhhj?hMubj)}(hdrm_edp_backlight_inith]j)}(hdrm_edp_backlight_inith]hdrm_edp_backlight_init}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj>hhhj?hMubj)}(h(struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl, u32 max_luminance, u16 driver_pwm_freq_hz, const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE], u32 *current_level, u8 *current_mode, bool need_luminance)h](j)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj4?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0?ubj)}(h h]h }(hjA?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0?ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjR?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjT?modnameN classnameNjj)}j]j)}jj?sbc.drm_edp_backlight_initasbuh1hhj0?ubj)}(h h]h }(hjr?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0?ubj+)}(hj9h]h*}(hj?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj0?ubj)}(hauxh]haux}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubj)}(h!struct drm_edp_backlight_info *blh](j)}(hjh]hstruct}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubh)}(hhh]j)}(hdrm_edp_backlight_infoh]hdrm_edp_backlight_info}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]jn?c.drm_edp_backlight_initasbuh1hhj?ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj+)}(hj9h]h*}(hj?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj?ubj)}(hblh]hbl}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubj)}(hu32 max_luminanceh](h)}(hhh]j)}(hu32h]hu32}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@modnameN classnameNjj)}j]jn?c.drm_edp_backlight_initasbuh1hhj@ubj)}(h h]h }(hj7@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h max_luminanceh]h max_luminance}(hjE@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubj)}(hu16 driver_pwm_freq_hzh](h)}(hhh]j)}(hu16h]hu16}(hja@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^@ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjc@modnameN classnameNjj)}j]jn?c.drm_edp_backlight_initasbuh1hhjZ@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ@ubj)}(hdriver_pwm_freq_hzh]hdriver_pwm_freq_hz}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubj)}(h+const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]h](j)}(hjUh]hconst}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubh)}(hhh]j)}(hu8h]hu8}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@modnameN classnameNjj)}j]jn?c.drm_edp_backlight_initasbuh1hhj@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(hedp_dpcdh]hedp_dpcd}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj+)}(hj Th]h[}(hj@hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubh)}(hhh]j)}(hEDP_DISPLAY_CTL_CAP_SIZEh]hEDP_DISPLAY_CTL_CAP_SIZE}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Aubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjAmodnameN classnameNjj)}j]jn?c.drm_edp_backlight_initasbuh1hhj@ubj+)}(hj8Th]h]}(hj,AhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubj)}(hu32 *current_levelh](h)}(hhh]j)}(hu32h]hu32}(hjGAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDAubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjIAmodnameN classnameNjj)}j]jn?c.drm_edp_backlight_initasbuh1hhj@Aubj)}(h h]h }(hjeAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@Aubj+)}(hj9h]h*}(hjsAhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@Aubj)}(h current_levelh]h current_level}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@Aubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubj)}(hu8 *current_modeh](h)}(hhh]j)}(hu8h]hu8}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjAmodnameN classnameNjj)}j]jn?c.drm_edp_backlight_initasbuh1hhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj+)}(hj9h]h*}(hjAhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjAubj)}(h current_modeh]h current_mode}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubj)}(hbool need_luminanceh](j)}(hjAh]hbool}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(hneed_luminanceh]hneed_luminance}(hj BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,?ubeh}(h]h ]h"]h$]h&]jjuh1jhj>hhhj?hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>hhhj?hMubah}(h]j>ah ](jjeh"]h$]h&]jj)jhuh1jhj?hMhj>hhubj)}(hhh]h)}(hMProbe a display panel's TCON using the standard VESA eDP backlight interface.h]hOProbe a display panel’s TCON using the standard VESA eDP backlight interface.}(hj3BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj0Bhhubah}(h]h ]h"]h$]h&]uh1jhj>hhhj?hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjKBjjKBjjjuh1jhhhjAhNhNubj)}(hXN**Parameters** ``struct drm_dp_aux *aux`` The DP aux device to use for probing ``struct drm_edp_backlight_info *bl`` The :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlight ``u32 max_luminance`` max luminance when need luminance is set as true ``u16 driver_pwm_freq_hz`` Optional PWM frequency from the driver in hz ``const u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE]`` A cached copy of the eDP DPCD ``u32 *current_level`` Where to store the probed brightness level, if any ``u8 *current_mode`` Where to store the currently set backlight control mode ``bool need_luminance`` Tells us if a we want to manipulate backlight using luminance values **Description** Initializes a :c:type:`drm_edp_backlight_info` struct by probing **aux** for it's backlight capabilities, along with also probing the current and maximum supported brightness levels. If **driver_pwm_freq_hz** is non-zero, this will be used as the backlight frequency. Otherwise, the default frequency from the panel is used. **Return** ``0`` on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjUBh]h Parameters}(hjWBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjSBubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjOBubji)}(hhh](jn)}(h@``struct drm_dp_aux *aux`` The DP aux device to use for probing h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjtBh]hstruct drm_dp_aux *aux}(hjvBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrBubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjnBubj)}(hhh]h)}(h$The DP aux device to use for probingh]h$The DP aux device to use for probing}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1jhjnBubeh}(h]h ]h"]h$]h&]uh1jmhjBhMhjkBubjn)}(h``struct drm_edp_backlight_info *bl`` The :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlight h](jt)}(h%``struct drm_edp_backlight_info *bl``h]jz)}(hjBh]h!struct drm_edp_backlight_info *bl}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjBubj)}(hhh]h)}(hYThe :c:type:`drm_edp_backlight_info` struct to fill out with information on the backlighth](hThe }(hjBhhhNhNubh)}(h :c:type:`drm_edp_backlight_info`h]jz)}(hjBh]hdrm_edp_backlight_info}(hjBhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_edp_backlight_infouh1hhjBhMhjBubh5 struct to fill out with information on the backlight}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jmhjBhMhjkBubjn)}(hG``u32 max_luminance`` max luminance when need luminance is set as true h](jt)}(h``u32 max_luminance``h]jz)}(hj Ch]hu32 max_luminance}(hj ChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjCubj)}(hhh]h)}(h0max luminance when need luminance is set as trueh]h0max luminance when need luminance is set as true}(hj"ChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjCubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jmhjChMhjkBubjn)}(hH``u16 driver_pwm_freq_hz`` Optional PWM frequency from the driver in hz h](jt)}(h``u16 driver_pwm_freq_hz``h]jz)}(hjBCh]hu16 driver_pwm_freq_hz}(hjDChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@Cubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj` When the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `. A typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver. drm_panel_dp_aux_backlight() must be called after the call to drm_panel_init(). **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjFh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}Fubji)}(hhh](jn)}(h&``struct drm_panel *panel`` DRM panel h](jt)}(h``struct drm_panel *panel``h]jz)}(hjFh]hstruct drm_panel *panel}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjFubj)}(hhh]h)}(h DRM panelh]h DRM panel}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjFubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jmhjFhMhjFubjn)}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjFh]hstruct drm_dp_aux *aux}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjFubj)}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjFubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jmhjFhMhjFubeh}(h]h ]h"]h$]h&]uh1jhhj}Fubh)}(h**Description**h]j%)}(hjGh]h Description}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjGubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}Fubh)}(hUse this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA's standard backlight control interface.h]hUse this function to create and handle backlight if your panel supports backlight control over DP AUX channel using DPCD registers as per VESA’s standard backlight control interface.}(hj,GhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}Fubh)}(hWhen the panel is enabled backlight will be enabled after a successful call to :c:type:`drm_panel_funcs.enable\(\) `h](hOWhen the panel is enabled backlight will be enabled after a successful call to }(hj;GhhhNhNubh)}(h6:c:type:`drm_panel_funcs.enable\(\) `h]jz)}(hjEGh]hdrm_panel_funcs.enable()}(hjGGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_panel_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hj;Gubeh}(h]h ]h"]h$]h&]uh1hhjbGhM hj}Fubh)}(hWhen the panel is disabled backlight will be disabled before the call to :c:type:`drm_panel_funcs.disable\(\) `.h](hIWhen the panel is disabled backlight will be disabled before the call to }(hjiGhhhNhNubh)}(h7:c:type:`drm_panel_funcs.disable\(\) `h]jz)}(hjsGh]hdrm_panel_funcs.disable()}(hjuGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjqGubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_panel_funcsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM hjiGubh.}(hjiGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjGhM hj}Fubh)}(hA typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.h]hA typical implementation for a panel driver supporting backlight control over DP AUX will call this function at probe time. Backlight will then be handled transparently without requiring any intervention from the driver.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}Fubh)}(hOdrm_panel_dp_aux_backlight() must be called after the call to drm_panel_init().h]hOdrm_panel_dp_aux_backlight() must be called after the call to drm_panel_init().}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}Fubh)}(h **Return**h]j%)}(hjGh]hReturn}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjGubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}Fubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj}Fubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_link_symbol_cycles (C function)c.drm_dp_link_symbol_cycleshNtauh1jxhjAhhhNhNubj)}(hhh](j)}(hzint drm_dp_link_symbol_cycles (int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h]j)}(hyint drm_dp_link_symbol_cycles(int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h](j)}(hinth]hint}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMZubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhjHhMZubj)}(hdrm_dp_link_symbol_cyclesh]j)}(hdrm_dp_link_symbol_cyclesh]hdrm_dp_link_symbol_cycles}(hj!HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubah}(h]h ](jjeh"]h$]h&]jjuh1jhjGhhhjHhMZubj)}(h\(int lane_count, int pixels, int dsc_slice_count, int bpp_x16, int symbol_size, bool is_mst)h](j)}(hint lane_counth](j)}(hinth]hint}(hj=HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9Hubj)}(h h]h }(hjKHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9Hubj)}(h lane_counth]h lane_count}(hjYHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9Hubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5Hubj)}(h int pixelsh](j)}(hinth]hint}(hjrHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnHubj)}(hpixelsh]hpixels}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5Hubj)}(hint dsc_slice_counth](j)}(hinth]hint}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hdsc_slice_counth]hdsc_slice_count}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5Hubj)}(h int bpp_x16h](j)}(hinth]hint}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hbpp_x16h]hbpp_x16}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5Hubj)}(hint symbol_sizeh](j)}(hinth]hint}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubj)}(h symbol_sizeh]h symbol_size}(hj-IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5Hubj)}(h bool is_msth](j)}(hjAh]hbool}(hjFIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBIubj)}(h h]h }(hjSIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBIubj)}(his_msth]his_mst}(hjaIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBIubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5Hubeh}(h]h ]h"]h$]h&]jjuh1jhjGhhhjHhMZubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjGhhhjHhMZubah}(h]jGah ](jjeh"]h$]h&]jj)jhuh1jhjHhMZhjGhhubj)}(hhh]h)}(h0calculate the link symbol count with/without dsch]h0calculate the link symbol count with/without dsc}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMZhjIhhubah}(h]h ]h"]h$]h&]uh1jhjGhhhjHhMZubeh}(h]h ](jfunctioneh"]h$]h&]jjjjIjjIjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``int lane_count`` DP link lane count ``int pixels`` number of pixels in a scanline ``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC ``int bpp_x16`` bits per pixel in .4 binary fixed format ``int symbol_size`` DP symbol size ``bool is_mst`` ``true`` for MST and ``false`` for SST **Description** Calculate the link symbol cycles for both DSC (**dsc_slice_count** !=0) and non-DSC case (**dsc_slice_count** == 0) and return the count.h](h)}(h**Parameters**h]j%)}(hjIh]h Parameters}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM^hjIubji)}(hhh](jn)}(h&``int lane_count`` DP link lane count h](jt)}(h``int lane_count``h]jz)}(hjIh]hint lane_count}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM[hjIubj)}(hhh]h)}(hDP link lane counth]hDP link lane count}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhM[hjIubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjIhM[hjIubjn)}(h.``int pixels`` number of pixels in a scanline h](jt)}(h``int pixels``h]jz)}(hjJh]h int pixels}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM\hjIubj)}(hhh]h)}(hnumber of pixels in a scanlineh]hnumber of pixels in a scanline}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhM\hjJubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjJhM\hjIubjn)}(hD``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC h](jt)}(h``int dsc_slice_count``h]jz)}(hj>Jh]hint dsc_slice_count}(hj@JhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpixel count of the active period in one scanline of the streamh]h>pixel count of the active period in one scanline of the stream}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM{hjMubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjMhM{hjXMubjn)}(hD``int dsc_slice_count`` number of slices for DSC or '0' for non-DSC h](jt)}(h``int dsc_slice_count``h]jz)}(hjMh]hint dsc_slice_count}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM|hjMubj)}(hhh]h)}(h+number of slices for DSC or '0' for non-DSCh]h/number of slices for DSC or ‘0’ for non-DSC}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM|hjMubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjMhM|hjXMubjn)}(h8``int bpp_x16`` bits per pixel in .4 binary fixed point h](jt)}(h``int bpp_x16``h]jz)}(hj Nh]h int bpp_x16}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj Nubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM}hjNubj)}(hhh]h)}(h'bits per pixel in .4 binary fixed pointh]h'bits per pixel in .4 binary fixed point}(hj%NhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!NhM}hj"Nubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhj!NhM}hjXMubjn)}(h0``unsigned long flags`` DRM_DP_OVERHEAD_x flags h](jt)}(h``unsigned long flags``h]jz)}(hjENh]hunsigned long flags}(hjGNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCNubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chM~hj?Nubj)}(hhh]h)}(hDRM_DP_OVERHEAD_x flagsh]hDRM_DP_OVERHEAD_x flags}(hj^NhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZNhM~hj[Nubah}(h]h ]h"]h$]h&]uh1jhj?Nubeh}(h]h ]h"]h$]h&]uh1jmhjZNhM~hjXMubeh}(h]h ]h"]h$]h&]uh1jhhj 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead(). Returns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.h](h)}(h**Parameters**h]j%)}(hjbPh]h Parameters}(hjdPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`Pubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj\Pubji)}(hhh]jn)}(hA``bool is_uhbr`` Whether the link has a 128b/132b channel coding h](jt)}(h``bool is_uhbr``h]jz)}(hjPh]h bool is_uhbr}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj{Pubj)}(hhh]h)}(h/Whether the link has a 128b/132b channel codingh]h/Whether the link has a 128b/132b channel coding}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMhjPubah}(h]h ]h"]h$]h&]uh1jhj{Pubeh}(h]h ]h"]h$]h&]uh1jmhjPhMhjxPubah}(h]h ]h"]h$]h&]uh1jhhj\Pubh)}(h**Description**h]j%)}(hjPh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj\Pubh)}(hXReturn the channel coding efficiency of the given DP link type, which is either 8b/10b or 128b/132b (aka UHBR). The corresponding overhead includes the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead().h]hXReturn the channel coding efficiency of the given DP link type, which is either 8b/10b or 128b/132b (aka UHBR). The corresponding overhead includes the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead and for 128b/132b any link or PHY level control symbol insertion overhead (LLCP, FEC, PHY sync, see DP Standard v2.1 3.5.2.18). For 8b/10b the corresponding FEC overhead is BW allocation specific, included in the value returned by drm_dp_bw_overhead().}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj\Pubh)}(hHReturns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.h]hHReturns the efficiency in the 100%/coding-overhead% ratio in 1ppm units.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj\Pubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjAhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_max_dprx_data_rate (C function)c.drm_dp_max_dprx_data_ratehNtauh1jxhjAhhhNhNubj)}(hhh](j)}(h@int drm_dp_max_dprx_data_rate (int max_link_rate, int max_lanes)h]j)}(h?int drm_dp_max_dprx_data_rate(int max_link_rate, int max_lanes)h](j)}(hinth]hint}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Qhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj QhhhjQhMubj)}(hdrm_dp_max_dprx_data_rateh]j)}(hdrm_dp_max_dprx_data_rateh]hdrm_dp_max_dprx_data_rate}(hj1QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-Qubah}(h]h ](jjeh"]h$]h&]jjuh1jhj QhhhjQhMubj)}(h"(int max_link_rate, int max_lanes)h](j)}(hint max_link_rateh](j)}(hinth]hint}(hjMQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIQubj)}(h h]h }(hj[QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIQubj)}(h max_link_rateh]h max_link_rate}(hjiQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIQubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEQubj)}(h int max_lanesh](j)}(hinth]hint}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~Qubj)}(h h]h }(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~Qubj)}(h max_lanesh]h max_lanes}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~Qubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEQubeh}(h]h ]h"]h$]h&]jjuh1jhj QhhhjQhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjQhhhjQhMubah}(h]jQah ](jjeh"]h$]h&]jj)jhuh1jhjQhMhjQhhubj)}(hhh]h)}(h)Get the max data bandwidth of a DPRX sinkh]h)Get the max data bandwidth of a DPRX sink}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjQhhubah}(h]h ]h"]h$]h&]uh1jhjQhhhjQhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjQjjQjjjuh1jhhhjAhNhNubj)}(hX**Parameters** ``int max_link_rate`` max DPRX link rate in 10kbps units ``int max_lanes`` max DPRX lane count **Description** Given a link rate and lanes, get the data bandwidth. Data bandwidth is the actual payload rate, which depends on the data bandwidth efficiency and the link rate. Note that protocol layers above the DPRX link level considered here can further limit the maximum data rate. Such layers are the MST topology (with limits on the link between the source and first branch device as well as on the whole MST path until the DPRX link) and (Thunderbolt) DP tunnels - which in turn can encapsulate an MST link with its own limit - with each SST or MST encapsulated tunnel sharing the BW of a tunnel group. Returns the maximum data rate in kBps units.h](h)}(h**Parameters**h]j%)}(hjQh]h Parameters}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjQubji)}(hhh](jn)}(h9``int max_link_rate`` max DPRX link rate in 10kbps units h](jt)}(h``int max_link_rate``h]jz)}(hj Rh]hint max_link_rate}(hj RhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhjRubj)}(hhh]h)}(h"max DPRX link rate in 10kbps unitsh]h"max DPRX link rate in 10kbps units}(hj"RhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRhMhjRubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jmhjRhMhjRubjn)}(h&``int max_lanes`` max DPRX lane count h](jt)}(h``int max_lanes``h]jz)}(hjBRh]h int max_lanes}(hjDRhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@Rubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:281: ./drivers/gpu/drm/display/drm_dp_helper.chMhj``DRM_DP_DUAL_MODE_LSPCON`` Level shifter / protocol converterh](jt)}(h``DRM_DP_DUAL_MODE_LSPCON``h]jz)}(hj|[h]hDRM_DP_DUAL_MODE_LSPCON}(hj~[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjz[ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:299: ./include/drm/display/drm_dp_dual_mode_helper.hhKphjv[ubj)}(hhh]h)}(h"Level shifter / protocol converterh]h"Level shifter / protocol converter}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:299: ./include/drm/display/drm_dp_dual_mode_helper.hhKqhj[ubah}(h]h ]h"]h$]h&]uh1jhjv[ubeh}(h]h ]h"]h$]h&]uh1jmhj[hKphjZubeh}(h]h ]h"]h$]h&]uh1jhhjZubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj XhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_dp_dual_mode_read (C function)c.drm_dp_dual_mode_readhNtauh1jxhj XhhhNhNubj)}(hhh](j)}(hassize_t drm_dp_dual_mode_read (struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h]j)}(h`ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](h)}(hhh]j)}(hssize_th]hssize_t}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj[modnameN classnameNjj)}j]j)}jdrm_dp_dual_mode_readsbc.drm_dp_dual_mode_readasbuh1hhj[hhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK3ubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[hhhj[hK3ubj)}(hdrm_dp_dual_mode_readh]j)}(hj[h]hdrm_dp_dual_mode_read}(hj \hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj \ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj[hhhj[hK3ubj)}(hC(struct i2c_adapter *adapter, u8 offset, void *buffer, size_t size)h](j)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hj(\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$\ubj)}(h h]h }(hj5\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$\ubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjF\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjC\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjH\modnameN classnameNjj)}j]j[c.drm_dp_dual_mode_readasbuh1hhj$\ubj)}(h h]h }(hjd\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$\ubj+)}(hj9h]h*}(hjr\hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj$\ubj)}(hadapterh]hadapter}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj \ubj)}(h u8 offseth](h)}(hhh]j)}(hu8h]hu8}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\modnameN classnameNjj)}j]j[c.drm_dp_dual_mode_readasbuh1hhj\ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj)}(hoffseth]hoffset}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj \ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj+)}(hj9h]h*}(hj\hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj\ubj)}(hbufferh]hbuffer}(hj ]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj \ubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hj%]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"]ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj']modnameN classnameNjj)}j]j[c.drm_dp_dual_mode_readasbuh1hhj]ubj)}(h h]h }(hjC]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(hsizeh]hsize}(hjQ]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj \ubeh}(h]h ]h"]h$]h&]jjuh1jhj[hhhj[hK3ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj[hhhj[hK3ubah}(h]j[ah ](jjeh"]h$]h&]jj)jhuh1jhj[hK3hj[hhubj)}(hhh]h)}(h.Read from the DP dual mode adaptor register(s)h]h.Read from the DP dual mode adaptor register(s)}(hj{]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK3hjx]hhubah}(h]h ]h"]h$]h&]uh1jhj[hhhj[hK3ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj]jj]jjjuh1jhhhj XhNhNubj)}(hX`**Parameters** ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus ``u8 offset`` register offset ``void *buffer`` buffer for return data ``size_t size`` size of the buffer **Description** Reads **size** bytes from the DP dual mode adaptor registers starting at **offset**. **Return** 0 on success, negative error code on failureh](h)}(h**Parameters**h]j%)}(hj]h]h Parameters}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK7hj]ubji)}(hhh](jn)}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hj]h]hstruct i2c_adapter *adapter}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK4hj]ubj)}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hK4hj]ubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj]hK4hj]ubjn)}(h``u8 offset`` register offset h](jt)}(h ``u8 offset``h]jz)}(hj]h]h u8 offset}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK5hj]ubj)}(hhh]h)}(hregister offseth]hregister offset}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj ^hK5hj ^ubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhj ^hK5hj]ubjn)}(h(``void *buffer`` buffer for return data h](jt)}(h``void *buffer``h]jz)}(hj.^h]h void *buffer}(hj0^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,^ubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK6hj(^ubj)}(hhh]h)}(hbuffer for return datah]hbuffer for return data}(hjG^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjC^hK6hjD^ubah}(h]h ]h"]h$]h&]uh1jhj(^ubeh}(h]h ]h"]h$]h&]uh1jmhjC^hK6hj]ubjn)}(h#``size_t size`` size of the buffer h](jt)}(h``size_t size``h]jz)}(hjg^h]h size_t size}(hji^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhje^ubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK7hja^ubj)}(hhh]h)}(hsize of the bufferh]hsize of the buffer}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|^hK7hj}^ubah}(h]h ]h"]h$]h&]uh1jhja^ubeh}(h]h ]h"]h$]h&]uh1jmhj|^hK7hj]ubeh}(h]h ]h"]h$]h&]uh1jhhj]ubh)}(h**Description**h]j%)}(hj^h]h Description}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK9hj]ubh)}(hTReads **size** bytes from the DP dual mode adaptor registers starting at **offset**.h](hReads }(hj^hhhNhNubj%)}(h**size**h]hsize}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubh; bytes from the DP dual mode adaptor registers starting at }(hj^hhhNhNubj%)}(h **offset**h]hoffset}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubh.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK8hj]ubh)}(h **Return**h]j%)}(hj^h]hReturn}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chK;hj]ubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjOchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLcubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQcmodnameN classnameNjj)}j]jbc.drm_dp_dual_mode_detectasbuh1hhjcubj)}(h h]h }(hjmchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj+)}(hj9h]h*}(hj{chhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjcubj)}(hdevh]hdev}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjcubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjcmodnameN classnameNjj)}j]jbc.drm_dp_dual_mode_detectasbuh1hhjcubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubj+)}(hj9h]h*}(hjchhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjcubj)}(hadapterh]hadapter}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjcubeh}(h]h ]h"]h$]h&]jjuh1jhjbhhhjbhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjbhhhjbhKubah}(h]jbah ](jjeh"]h$]h&]jj)jhuh1jhjbhKhjbhhubj)}(hhh]h)}(h!Identify the DP dual mode adaptorh]h!Identify the DP dual mode adaptor}(hj"dhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhjdhhubah}(h]h ]h"]h$]h&]uh1jhjbhhhjbhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:djj:djjjuh1jhhhj XhNhNubj)}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus **Description** Attempt to identify the type of the DP dual mode adaptor used. Note that when the answer is **DRM_DP_DUAL_MODE_UNKNOWN** it's not certain whether we're dealing with a native HDMI port or a type 1 DVI dual mode adaptor. The driver will have to use some other hardware/driver specific mechanism to make that distinction. **Return** The type of the DP dual mode adaptor usedh](h)}(h**Parameters**h]j%)}(hjDdh]h Parameters}(hjFdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBdubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj>dubji)}(hhh](jn)}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](jt)}(h ``const struct drm_device *dev``h]jz)}(hjcdh]hconst struct drm_device *dev}(hjedhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjadubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj]dubj)}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jz)}(hjdh]h drm_device}(hjdhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjxdhKhj|dubh to use}(hj|dhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxdhKhjydubah}(h]h ]h"]h$]h&]uh1jhj]dubeh}(h]h ]h"]h$]h&]uh1jmhjxdhKhjZdubjn)}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjdh]hstruct i2c_adapter *adapter}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhjdubj)}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhKhjdubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjdhKhjZdubeh}(h]h ]h"]h$]h&]uh1jhhj>dubh)}(h**Description**h]j%)}(hjdh]h Description}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj>dubh)}(h>Attempt to identify the type of the DP dual mode adaptor used.h]h>Attempt to identify the type of the DP dual mode adaptor used.}(hj ehhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj>dubh)}(hNote that when the answer is **DRM_DP_DUAL_MODE_UNKNOWN** it's not certain whether we're dealing with a native HDMI port or a type 1 DVI dual mode adaptor. The driver will have to use some other hardware/driver specific mechanism to make that distinction.h](hNote that when the answer is }(hjehhhNhNubj%)}(h**DRM_DP_DUAL_MODE_UNKNOWN**h]hDRM_DP_DUAL_MODE_UNKNOWN}(hj#ehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubh it’s not certain whether we’re dealing with a native HDMI port or a type 1 DVI dual mode adaptor. The driver will have to use some other hardware/driver specific mechanism to make that distinction.}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj>dubh)}(h **Return**h]j%)}(hj>eh]hReturn}(hj@ehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubh)}(h)The type of the DP dual mode adaptor usedh]h)The type of the DP dual mode adaptor used}(hjTehhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chKhj>dubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj XhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_dual_mode_max_tmds_clock (C function)!c.drm_dp_dual_mode_max_tmds_clockhNtauh1jxhj XhhhNhNubj)}(hhh](j)}(hint drm_dp_dual_mode_max_tmds_clock (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h]j)}(hint drm_dp_dual_mode_max_tmds_clock(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h](j)}(hinth]hint}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhjehMubj)}(hdrm_dp_dual_mode_max_tmds_clockh]j)}(hdrm_dp_dual_mode_max_tmds_clockh]hdrm_dp_dual_mode_max_tmds_clock}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ](jjeh"]h$]h&]jjuh1jhjehhhjehMubj)}(h\(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter)h](j)}(hconst struct drm_device *devh](j)}(hjUh]hconst}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(hjh]hstruct}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjemodnameN classnameNjj)}j]j)}jjesb!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhjeubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj+)}(hj9h]h*}(hj'fhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubj)}(hdevh]hdev}(hj4fhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubj)}(henum drm_dp_dual_mode_type typeh](j)}(hj8h]henum}(hjMfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIfubj)}(h h]h }(hjZfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIfubh)}(hhh]j)}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hjkfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhfubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmfmodnameN classnameNjj)}j]jf!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhjIfubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIfubj)}(htypeh]htype}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIfubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjfmodnameN classnameNjj)}j]jf!c.drm_dp_dual_mode_max_tmds_clockasbuh1hhjfubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj+)}(hj9h]h*}(hjfhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjfubj)}(hadapterh]hadapter}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubeh}(h]h ]h"]h$]h&]jjuh1jhjehhhjehMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj{ehhhjehMubah}(h]jveah ](jjeh"]h$]h&]jj)jhuh1jhjehMhjxehhubj)}(hhh]h)}(h'Max TMDS clock for DP dual mode adaptorh]h'Max TMDS clock for DP dual mode adaptor}(hj1ghhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj.ghhubah}(h]h ]h"]h$]h&]uh1jhjxehhhjehMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjIgjjIgjjjuh1jhhhj XhNhNubj)}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus **Description** Determine the max TMDS clock the adaptor supports based on the type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK register (on type2 adaptors). As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume a 165 MHz limit based on the specification. **Return** Maximum supported TMDS clock rate for the DP dual mode adaptor in kHz.h](h)}(h**Parameters**h]j%)}(hjSgh]h Parameters}(hjUghhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQgubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hjMgubji)}(hhh](jn)}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](jt)}(h ``const struct drm_device *dev``h]jz)}(hjrgh]hconst struct drm_device *dev}(hjtghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpgubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjlgubj)}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jz)}(hjgh]h drm_device}(hjghhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjghMhjgubh to use}(hjghhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjghMhjgubah}(h]h ]h"]h$]h&]uh1jhjlgubeh}(h]h ]h"]h$]h&]uh1jmhjghMhjigubjn)}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](jt)}(h#``enum drm_dp_dual_mode_type type``h]jz)}(hjgh]henum drm_dp_dual_mode_type type}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjgubj)}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghMhjgubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjghMhjigubjn)}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjhh]hstruct i2c_adapter *adapter}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM hjgubj)}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhM hjhubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjhhM hjigubeh}(h]h ]h"]h$]h&]uh1jhhjMgubh)}(h**Description**h]j%)}(hj>hh]h Description}(hj@hhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](jt)}(h#``enum drm_dp_dual_mode_type type``h]jz)}(hj2kh]henum drm_dp_dual_mode_type type}(hj4khhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0kubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM4hj,kubj)}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjKkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGkhM4hjHkubah}(h]h ]h"]h$]h&]uh1jhj,kubeh}(h]h ]h"]h$]h&]uh1jmhjGkhM4hjjubjn)}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjkkh]hstruct i2c_adapter *adapter}(hjmkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjikubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM5hjekubj)}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhM5hjkubah}(h]h ]h"]h$]h&]uh1jhjekubeh}(h]h ]h"]h$]h&]uh1jmhjkhM5hjjubjn)}(h;``bool *enabled`` current state of the TMDS output buffers h](jt)}(h``bool *enabled``h]jz)}(hjkh]h bool *enabled}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM6hjkubj)}(hhh]h)}(h(current state of the TMDS output buffersh]h(current state of the TMDS output buffers}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhM6hjkubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjkhM6hjjubeh}(h]h ]h"]h$]h&]uh1jhhjjubh)}(h**Description**h]j%)}(hjkh]h Description}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjkubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM8hjjubh)}(hXHGet the state of the TMDS output buffers in the adaptor. For type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN register. As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don't read the register on those, instead we simply assume that the buffers are always enabled.h]hXJGet the state of the TMDS output buffers in the adaptor. For type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN register. As some type 1 adaptors have problems with registers (see comments in drm_dp_dual_mode_detect()) we don’t read the register on those, instead we simply assume that the buffers are always enabled.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM7hjjubh)}(h **Return**h]j%)}(hjlh]hReturn}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM>hjjubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM?hjjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj XhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_dual_mode_set_tmds_output (C function)"c.drm_dp_dual_mode_set_tmds_outputhNtauh1jxhj XhhhNhNubj)}(hhh](j)}(hint drm_dp_dual_mode_set_tmds_output (const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable):h]j)}(hint drm_dp_dual_mode_set_tmds_output(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h](j)}(hinth]hint}(hjKlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGlhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM\ubj)}(h h]h }(hjZlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGlhhhjYlhM\ubj)}(h drm_dp_dual_mode_set_tmds_outputh]j)}(h drm_dp_dual_mode_set_tmds_outputh]h drm_dp_dual_mode_set_tmds_output}(hjllhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhlubah}(h]h ](jjeh"]h$]h&]jjuh1jhjGlhhhjYlhM\ubj)}(hi(const struct drm_device *dev, enum drm_dp_dual_mode_type type, struct i2c_adapter *adapter, bool enable)h](j)}(hconst struct drm_device *devh](j)}(hjUh]hconst}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(hjh]hstruct}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjlmodnameN classnameNjj)}j]j)}jjnlsb"c.drm_dp_dual_mode_set_tmds_outputasbuh1hhjlubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj+)}(hj9h]h*}(hjlhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjlubj)}(hdevh]hdev}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjlubj)}(henum drm_dp_dual_mode_type typeh](j)}(hj8h]henum}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hj"mhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubh)}(hhh]j)}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hj3mhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0mubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj5mmodnameN classnameNjj)}j]jl"c.drm_dp_dual_mode_set_tmds_outputasbuh1hhjmubj)}(h h]h }(hjQmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(htypeh]htype}(hj_mhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjlubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjxmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtmubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtmubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmmodnameN classnameNjj)}j]jl"c.drm_dp_dual_mode_set_tmds_outputasbuh1hhjtmubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtmubj+)}(hj9h]h*}(hjmhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjtmubj)}(hadapterh]hadapter}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjlubj)}(h bool enableh](j)}(hjAh]hbool}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(henableh]henable}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjlubeh}(h]h ]h"]h$]h&]jjuh1jhjGlhhhjYlhM\ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjClhhhjYlhM\ubah}(h]j>lah ](jjeh"]h$]h&]jj)jhuh1jhjYlhM\hj@lhhubj)}(hhh]h)}(h>Enable/disable TMDS output buffers in the DP dual mode adaptorh]h>Enable/disable TMDS output buffers in the DP dual mode adaptor}(hj-nhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM\hj*nhhubah}(h]h ]h"]h$]h&]uh1jhj@lhhhjYlhM\ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjEnjjEnjjjuh1jhhhj XhNhNubj)}(hX**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type ``struct i2c_adapter *adapter`` I2C adapter for the DDC bus ``bool enable`` enable (as opposed to disable) the TMDS output buffers **Description** Set the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes. **Return** 0 on success, negative error code on failureh](h)}(h**Parameters**h]j%)}(hjOnh]h Parameters}(hjQnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMnubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM`hjInubji)}(hhh](jn)}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](jt)}(h ``const struct drm_device *dev``h]jz)}(hjnnh]hconst struct drm_device *dev}(hjpnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlnubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM]hjhnubj)}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jz)}(hjnh]h drm_device}(hjnhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjnhM]hjnubh to use}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjnhM]hjnubah}(h]h ]h"]h$]h&]uh1jhjhnubeh}(h]h ]h"]h$]h&]uh1jmhjnhM]hjenubjn)}(h>``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](jt)}(h#``enum drm_dp_dual_mode_type type``h]jz)}(hjnh]henum drm_dp_dual_mode_type type}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM^hjnubj)}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhM^hjnubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjnhM^hjenubjn)}(h<``struct i2c_adapter *adapter`` I2C adapter for the DDC bus h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjnh]hstruct i2c_adapter *adapter}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM_hjnubj)}(hhh]h)}(hI2C adapter for the DDC bush]hI2C adapter for the DDC bus}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohM_hjoubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjohM_hjenubjn)}(hG``bool enable`` enable (as opposed to disable) the TMDS output buffers h](jt)}(h``bool enable``h]jz)}(hj8oh]h bool enable}(hj:ohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj6oubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chM`hj2oubj)}(hhh]h)}(h6enable (as opposed to disable) the TMDS output buffersh]h6enable (as opposed to disable) the TMDS output buffers}(hjQohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMohM`hjNoubah}(h]h ]h"]h$]h&]uh1jhj2oubeh}(h]h ]h"]h$]h&]uh1jmhjMohM`hjenubeh}(h]h ]h"]h$]h&]uh1jhhjInubh)}(h**Description**h]j%)}(hjsoh]h Description}(hjuohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqoubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMbhjInubh)}(hSet the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes.h]hSet the state of the TMDS output buffers in the adaptor. For type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. Type1 adaptors do not support any register writes.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMahjInubh)}(h **Return**h]j%)}(hjoh]hReturn}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMehjInubh)}(h,0 on success, negative error code on failureh]h,0 on success, negative error code on failure}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMfhjInubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj XhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_dp_get_dual_mode_type_name (C function) c.drm_dp_get_dual_mode_type_namehNtauh1jxhj XhhhNhNubj)}(hhh](j)}(hMconst char * drm_dp_get_dual_mode_type_name (enum drm_dp_dual_mode_type type)h]j)}(hKconst char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type)h](j)}(hjUh]hconst}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhjohMubj)}(hcharh]hchar}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhjohMubj)}(h h]h }(hj phhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhjohMubj+)}(hj9h]h*}(hjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjohhhjohMubj)}(hdrm_dp_get_dual_mode_type_nameh]j)}(hdrm_dp_get_dual_mode_type_nameh]hdrm_dp_get_dual_mode_type_name}(hj(phhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$pubah}(h]h ](jjeh"]h$]h&]jjuh1jhjohhhjohMubj)}(h!(enum drm_dp_dual_mode_type type)h]j)}(henum drm_dp_dual_mode_type typeh](j)}(hj8h]henum}(hjDphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@pubj)}(h h]h }(hjQphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@pubh)}(hhh]j)}(hdrm_dp_dual_mode_typeh]hdrm_dp_dual_mode_type}(hjbphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_pubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjdpmodnameN classnameNjj)}j]j)}jj*psb c.drm_dp_get_dual_mode_type_nameasbuh1hhj@pubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@pubj)}(htypeh]htype}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@pubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj``enum drm_dp_dual_mode_type type`` DP dual mode adaptor type h](jt)}(h#``enum drm_dp_dual_mode_type type``h]jz)}(hjph]henum drm_dp_dual_mode_type type}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjpubj)}(hhh]h)}(hDP dual mode adaptor typeh]hDP dual mode adaptor type}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjqubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhjqhMhjpubah}(h]h ]h"]h$]h&]uh1jhhjpubh)}(h **Return**h]j%)}(hj6qh]hReturn}(hj8qhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4qubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjpubh)}(h6String representation of the DP dual mode adaptor typeh]h6String representation of the DP dual mode adaptor type}(hjLqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj XhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_lspcon_get_mode (C function)c.drm_lspcon_get_modehNtauh1jxhj XhhhNhNubj)}(hhh](j)}(hoint drm_lspcon_get_mode (const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h]j)}(hnint drm_lspcon_get_mode(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h](j)}(hinth]hint}(hj{qhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwqhhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwqhhhjqhMubj)}(hdrm_lspcon_get_modeh]j)}(hdrm_lspcon_get_modeh]hdrm_lspcon_get_mode}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ](jjeh"]h$]h&]jjuh1jhjwqhhhjqhMubj)}(hW(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode *mode)h](j)}(hconst struct drm_device *devh](j)}(hjUh]hconst}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjqmodnameN classnameNjj)}j]j)}jjqsbc.drm_lspcon_get_modeasbuh1hhjqubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj+)}(hj9h]h*}(hjrhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjqubj)}(hdevh]hdev}(hj,rhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjErhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjArubj)}(h h]h }(hjRrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjArubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjcrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`rubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjermodnameN classnameNjj)}j]j rc.drm_lspcon_get_modeasbuh1hhjArubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjArubj+)}(hj9h]h*}(hjrhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjArubj)}(hadapterh]hadapter}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjArubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubj)}(henum drm_lspcon_mode *modeh](j)}(hj8h]henum}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubh)}(hhh]j)}(hdrm_lspcon_modeh]hdrm_lspcon_mode}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjrmodnameN classnameNjj)}j]j rc.drm_lspcon_get_modeasbuh1hhjrubj)}(h h]h }(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj+)}(hj9h]h*}(hjrhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjrubj)}(hmodeh]hmode}(hj shhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubeh}(h]h ]h"]h$]h&]jjuh1jhjwqhhhjqhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjsqhhhjqhMubah}(h]jnqah ](jjeh"]h$]h&]jj)jhuh1jhjqhMhjpqhhubj)}(hhh]h)}(hEGet LSPCON's current mode of operation by reading offset (0x80, 0x41)h]hGGet LSPCON’s current mode of operation by reading offset (0x80, 0x41)}(hj6shhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj3shhubah}(h]h ]h"]h$]h&]uh1jhjpqhhhjqhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjNsjjNsjjjuh1jhhhj XhNhNubj)}(hX6**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``struct i2c_adapter *adapter`` I2C-over-aux adapter ``enum drm_lspcon_mode *mode`` current lspcon mode of operation output variable **Return** 0 on success, sets the current_mode value to appropriate mode -error on failureh](h)}(h**Parameters**h]j%)}(hjXsh]h Parameters}(hjZshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVsubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjRsubji)}(hhh](jn)}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](jt)}(h ``const struct drm_device *dev``h]jz)}(hjwsh]hconst struct drm_device *dev}(hjyshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjusubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjqsubj)}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jz)}(hjsh]h drm_device}(hjshhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjshMhjsubh to use}(hjshhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjshMhjsubah}(h]h ]h"]h$]h&]uh1jhjqsubeh}(h]h ]h"]h$]h&]uh1jmhjshMhjnsubjn)}(h5``struct i2c_adapter *adapter`` I2C-over-aux adapter h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjsh]hstruct i2c_adapter *adapter}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjsubj)}(hhh]h)}(hI2C-over-aux adapterh]hI2C-over-aux adapter}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjsubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhjshMhjnsubjn)}(hP``enum drm_lspcon_mode *mode`` current lspcon mode of operation output variable h](jt)}(h``enum drm_lspcon_mode *mode``h]jz)}(hjth]henum drm_lspcon_mode *mode}(hj thhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjtubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjtubj)}(hhh]h)}(h0current lspcon mode of operation output variableh]h0current lspcon mode of operation output variable}(hj!thhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthMhjtubah}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jmhjthMhjnsubeh}(h]h ]h"]h$]h&]uh1jhhjRsubh)}(h **Return**h]j%)}(hjCth]hReturn}(hjEthhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAtubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjRsubh)}(hO0 on success, sets the current_mode value to appropriate mode -error on failureh]hO0 on success, sets the current_mode value to appropriate mode -error on failure}(hjYthhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjRsubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj XhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_lspcon_set_mode (C function)c.drm_lspcon_set_modehNtauh1jxhj XhhhNhNubj)}(hhh](j)}(h|int drm_lspcon_set_mode (const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h]j)}(h{int drm_lspcon_set_mode(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h](j)}(hinth]hint}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhjthMubj)}(hdrm_lspcon_set_modeh]j)}(hdrm_lspcon_set_modeh]hdrm_lspcon_set_mode}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ](jjeh"]h$]h&]jjuh1jhjthhhjthMubj)}(hd(const struct drm_device *dev, struct i2c_adapter *adapter, enum drm_lspcon_mode mode, int time_out)h](j)}(hconst struct drm_device *devh](j)}(hjUh]hconst}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(hjh]hstruct}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}jjtsbc.drm_lspcon_set_modeasbuh1hhjtubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj+)}(hj9h]h*}(hj,uhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjtubj)}(hdevh]hdev}(hj9uhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjtubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjRuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNuubj)}(h h]h }(hj_uhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNuubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjpuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmuubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjrumodnameN classnameNjj)}j]juc.drm_lspcon_set_modeasbuh1hhjNuubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNuubj+)}(hj9h]h*}(hjuhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjNuubj)}(hadapterh]hadapter}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjtubj)}(henum drm_lspcon_mode modeh](j)}(hj8h]henum}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubh)}(hhh]j)}(hdrm_lspcon_modeh]hdrm_lspcon_mode}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]juc.drm_lspcon_set_modeasbuh1hhjuubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(hmodeh]hmode}(hj vhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjtubj)}(h int time_outh](j)}(hinth]hint}(hj%vhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!vubj)}(h h]h }(hj3vhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!vubj)}(htime_outh]htime_out}(hjAvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!vubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjtubeh}(h]h ]h"]h$]h&]jjuh1jhjthhhjthMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjthhhjthMubah}(h]j{tah ](jjeh"]h$]h&]jj)jhuh1jhjthMhj}thhubj)}(hhh]h)}(h@Change LSPCON's mode of operation by writing offset (0x80, 0x40)h]hBChange LSPCON’s mode of operation by writing offset (0x80, 0x40)}(hjkvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjhvhhubah}(h]h ]h"]h$]h&]uh1jhj}thhhjthMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjvjjvjjjuh1jhhhj XhNhNubj)}(hX-**Parameters** ``const struct drm_device *dev`` :c:type:`drm_device` to use ``struct i2c_adapter *adapter`` I2C-over-aux adapter ``enum drm_lspcon_mode mode`` required mode of operation ``int time_out`` LSPCON mode change settle timeout **Return** 0 on success, -error on failure/timeouth](h)}(h**Parameters**h]j%)}(hjvh]h Parameters}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjvubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjvubji)}(hhh](jn)}(h=``const struct drm_device *dev`` :c:type:`drm_device` to use h](jt)}(h ``const struct drm_device *dev``h]jz)}(hjvh]hconst struct drm_device *dev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjvubj)}(hhh]h)}(h:c:type:`drm_device` to useh](h)}(h:c:type:`drm_device`h]jz)}(hjvh]h drm_device}(hjvhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_deviceuh1hhjvhMhjvubh to use}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjvhMhjvubah}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]uh1jmhjvhMhjvubjn)}(h5``struct i2c_adapter *adapter`` I2C-over-aux adapter h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjwh]hstruct i2c_adapter *adapter}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjvubj)}(hhh]h)}(hI2C-over-aux adapterh]hI2C-over-aux adapter}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjwubah}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]uh1jmhjwhMhjvubjn)}(h9``enum drm_lspcon_mode mode`` required mode of operation h](jt)}(h``enum drm_lspcon_mode mode``h]jz)}(hj=wh]henum drm_lspcon_mode mode}(hj?whhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;wubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhj7wubj)}(hhh]h)}(hrequired mode of operationh]hrequired mode of operation}(hjVwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjRwhMhjSwubah}(h]h ]h"]h$]h&]uh1jhj7wubeh}(h]h ]h"]h$]h&]uh1jmhjRwhMhjvubjn)}(h3``int time_out`` LSPCON mode change settle timeout h](jt)}(h``int time_out``h]jz)}(hjvwh]h int time_out}(hjxwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjtwubah}(h]h ]h"]h$]h&]uh1jshv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjpwubj)}(hhh]h)}(h!LSPCON mode change settle timeouth]h!LSPCON mode change settle timeout}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjwubah}(h]h ]h"]h$]h&]uh1jhjpwubeh}(h]h ]h"]h$]h&]uh1jmhjwhMhjvubeh}(h]h ]h"]h$]h&]uh1jhhjvubh)}(h **Return**h]j%)}(hjwh]hReturn}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjvubh)}(h'0 on success, -error on failure/timeouth]h'0 on success, -error on failure/timeout}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhv/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:302: ./drivers/gpu/drm/display/drm_dp_dual_mode_helper.chMhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj XhhhNhNubeh}(h]9display-port-dual-mode-adaptor-helper-functions-referenceah ]h"]9display port dual mode adaptor helper functions referenceah$]h&]uh1hhhhhhhhM&ubh)}(hhh](h)}(hDisplay Port MST Helpersh]hDisplay Port MST Helpers}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhhhhhM2ubh)}(hhh](h)}(hOverviewh]hOverview}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhhhhhM5ubh)}(hThese functions contain parts of the DisplayPort 1.2a MultiStream Transport protocol. The helpers contain a topology manager and bandwidth manager. The helpers encapsulate the sending and received of sideband msgs.h]hThese functions contain parts of the DisplayPort 1.2a MultiStream Transport protocol. The helpers contain a topology manager and bandwidth manager. The helpers encapsulate the sending and received of sideband msgs.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:311: ./drivers/gpu/drm/display/drm_dp_mst_topology.chK6hjwhhubh)}(hhh](h)}(hTopology refcount overviewh]hTopology refcount overview}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhNhNubh)}(hXThe refcounting schemes for :c:type:`struct drm_dp_mst_branch ` and :c:type:`struct drm_dp_mst_port ` are somewhat unusual. Both ports and branch devices have two different kinds of refcounts: topology refcounts, and malloc refcounts.h](hThe refcounting schemes for }(hj'xhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hj1xh]hstruct drm_dp_mst_branch}(hj3xhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj/xubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMThj'xubh and }(hj'xhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjUxh]hstruct drm_dp_mst_port}(hjWxhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjSxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjNxhMThj'xubh are somewhat unusual. Both ports and branch devices have two different kinds of refcounts: topology refcounts, and malloc refcounts.}(hj'xhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjNxhMThjxubh)}(hXQTopology refcounts are not exposed to drivers, and are handled internally by the DP MST helpers. The helpers use them in order to prevent the in-memory topology state from being changed in the middle of critical operations like changing the internal state of payload allocations. This means each branch and port will be considered to be connected to the rest of the topology until its topology refcount reaches zero. Additionally, for ports this means that their associated :c:type:`struct drm_connector ` will stay registered with userspace until the port's refcount reaches 0.h](hXTopology refcounts are not exposed to drivers, and are handled internally by the DP MST helpers. The helpers use them in order to prevent the in-memory topology state from being changed in the middle of critical operations like changing the internal state of payload allocations. This means each branch and port will be considered to be connected to the rest of the topology until its topology refcount reaches zero. Additionally, for ports this means that their associated }(hj|xhhhNhNubh)}(h.:c:type:`struct drm_connector `h]jz)}(hjxh]hstruct drm_connector}(hjxhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMXhj|xubhK will stay registered with userspace until the port’s refcount reaches 0.}(hj|xhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhMXhjxubeh}(h]topology-refcount-overviewah ]h"]topology refcount overviewah$]h&]uh1hhjwhhhNhNubh)}(hhh](h)}(hMalloc refcount overviewh]hMalloc refcount overview}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhNhNubh)}(hX?Malloc references are used to keep a :c:type:`struct drm_dp_mst_port ` or :c:type:`struct drm_dp_mst_branch ` allocated even after all of its topology references have been dropped, so that the driver or MST helpers can safely access each branch's last known state before it was disconnected from the topology. When the malloc refcount of a port or branch reaches 0, the memory allocation containing the :c:type:`struct drm_dp_mst_branch ` or :c:type:`struct drm_dp_mst_port ` respectively will be freed.h](h%Malloc references are used to keep a }(hjxhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjxh]hstruct drm_dp_mst_port}(hjxhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMdhjxubh or }(hjxhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjxh]hstruct drm_dp_mst_branch}(hjxhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjxhMdhjxubhX( allocated even after all of its topology references have been dropped, so that the driver or MST helpers can safely access each branch’s last known state before it was disconnected from the topology. When the malloc refcount of a port or branch reaches 0, the memory allocation containing the }(hjxhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjyh]hstruct drm_dp_mst_branch}(hjyhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjxhMdhjxubh or }hjxsbh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hj;yh]hstruct drm_dp_mst_port}(hj=yhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9yubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjxhMdhjxubh respectively will be freed.}(hjxhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjxhMdhjxubh)}(hXFor :c:type:`struct drm_dp_mst_branch `, malloc refcounts are not currently exposed to drivers. As of writing this documentation, there are no drivers that have a usecase for accessing :c:type:`struct drm_dp_mst_branch ` outside of the MST helpers. Exposing this API to drivers in a race-free manner would take more tweaking of the refcounting scheme, however patches are welcome provided there is a legitimate driver usecase for this.h](hFor }(hjbyhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjlyh]hstruct drm_dp_mst_branch}(hjnyhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjjyubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMlhjbyubh, malloc refcounts are not currently exposed to drivers. As of writing this documentation, there are no drivers that have a usecase for accessing }(hjbyhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjyh]hstruct drm_dp_mst_branch}(hjyhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjyhMlhjbyubh outside of the MST helpers. Exposing this API to drivers in a race-free manner would take more tweaking of the refcounting scheme, however patches are welcome provided there is a legitimate driver usecase for this.}(hjbyhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjyhMlhjxubeh}(h]malloc-refcount-overviewah ]h"]malloc refcount overviewah$]h&]uh1hhjwhhhNhNubh)}(hhh](h)}(h$Refcount relationships in a topologyh]h$Refcount relationships in a topology}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhNhNubh)}(hjLet's take a look at why the relationship between topology and malloc refcounts is designed the way it is.h]hlLet’s take a look at why the relationship between topology and malloc refcounts is designed the way it is.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMvhjyubkfigure kernel_figure)}(hhh]hfigure)}(hhh](himage)}(hX.. kernel-figure:: dp-mst/topology-figure-1.dot An example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure. h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-1.dot candidates}j9jysuh1jyhjyhhhKubhcaption)}(hXAn example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure.h]hXAn example of topology and malloc refs in a DP MST topology with two active payloads. Topology refcount increments are indicated by solid lines, and malloc refcount increments are indicated by dashed lines. Each starts from the branch which incremented the refcount, and ends at the branch to which the refcount belongs to, i.e. the arrow points the same way as the C pointers used to reference a structure.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM{hjyubeh}(h]id5ah ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jyhjyubh)}(hAs you can see in the above figure, every branch increments the topology refcount of its children, and increments the malloc refcount of its parent. Additionally, every payload increments the malloc refcount of its assigned port by 1.h]hAs you can see in the above figure, every branch increments the topology refcount of its children, and increments the malloc refcount of its parent. Additionally, every payload increments the malloc refcount of its assigned port by 1.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjyubh)}(hSo, what would happen if MSTB #3 from the above figure was unplugged from the system, but the driver hadn't yet removed payload #2 from port #3? The topology would start to look like the figure below.h]hSo, what would happen if MSTB #3 from the above figure was unplugged from the system, but the driver hadn’t yet removed payload #2 from port #3? The topology would start to look like the figure below.}(hj'zhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjyubjy)}(hhh]jy)}(hhh](jy)}(h.. kernel-figure:: dp-mst/topology-figure-2.dot Ports and branch devices which have been released from memory are colored grey, and references which have been removed are colored red. h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-2.dotjy}j9jGzsuh1jyhj9zhhhKubjy)}(hPorts and branch devices which have been released from memory are colored grey, and references which have been removed are colored red.h]hPorts and branch devices which have been released from memory are colored grey, and references which have been removed are colored red.}(hjIzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj9zubeh}(h]id6ah ]h"]h$]h&]uh1jyhj6zubah}(h]h ]h"]h$]h&]uh1jyhjyubh)}(hXWhenever a port or branch device's topology refcount reaches zero, it will decrement the topology refcounts of all its children, the malloc refcount of its parent, and finally its own malloc refcount. For MSTB #4 and port #4, this means they both have been disconnected from the topology and freed from memory. But, because payload #2 is still holding a reference to port #3, port #3 is removed from the topology but its :c:type:`struct drm_dp_mst_port ` is still accessible from memory. This also means port #3 has not yet decremented the malloc refcount of MSTB #3, so its :c:type:`struct drm_dp_mst_branch ` will also stay allocated in memory until port #3's malloc refcount reaches 0.h](hXWhenever a port or branch device’s topology refcount reaches zero, it will decrement the topology refcounts of all its children, the malloc refcount of its parent, and finally its own malloc refcount. For MSTB #4 and port #4, this means they both have been disconnected from the topology and freed from memory. But, because payload #2 is still holding a reference to port #3, port #3 is removed from the topology but its }(hjezhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjozh]hstruct drm_dp_mst_port}(hjqzhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjmzubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjezubhy is still accessible from memory. This also means port #3 has not yet decremented the malloc refcount of MSTB #3, so its }(hjezhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjzh]hstruct drm_dp_mst_branch}(hjzhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjzhMhjezubhP will also stay allocated in memory until port #3’s malloc refcount reaches 0.}(hjezhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjzhMhjyubh)}(hThis relationship is necessary because in order to release payload #2, we need to be able to figure out the last relative of port #3 that's still connected to the topology. In this case, we would travel up the topology as shown below.h]hThis relationship is necessary because in order to release payload #2, we need to be able to figure out the last relative of port #3 that’s still connected to the topology. In this case, we would travel up the topology as shown below.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjyubjy)}(hhh]jy)}(hhh]jy)}(h0.. kernel-figure:: dp-mst/topology-figure-3.dot h]h}(h]h ]h"]h$]h&]uri gpu/dp-mst/topology-figure-3.dotjy}j9jzsuh1jyhjzhhhKubah}(h]h ]h"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]uh1jyhjyubh)}(h[And finally, remove payload #2 by communicating with port #2 through sideband transactions.h]h[And finally, remove payload #2 by communicating with port #2 through sideband transactions.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:314: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjyubeh}(h]$refcount-relationships-in-a-topologyah ]h"]$refcount relationships in a topologyah$]h&]uh1hhjwhhhNhNubeh}(h]id3ah ]h"]h$]overviewah&]uh1hhjwhhhhhM5jy;Kubh)}(hhh](h)}(hFunctions Referenceh]hFunctions Reference}(hj {hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{hhhhhM>ubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_mst_port (C struct)c.drm_dp_mst_porthNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hdrm_dp_mst_porth]j)}(hstruct drm_dp_mst_porth](j)}(hjh]hstruct}(hj1{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-{hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKubj)}(h h]h }(hj?{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-{hhhj>{hKubj)}(hdrm_dp_mst_porth]j)}(hj+{h]hdrm_dp_mst_port}(hjQ{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjM{ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj-{hhhj>{hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj){hhhj>{hKubah}(h]j${ah ](jjeh"]h$]h&]jj)jhuh1jhj>{hKhj&{hhubj)}(hhh]h)}(hMST porth]hMST port}(hjs{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK{hKubeh}(h]h ](jstructeh"]h$]h&]jjjj{jj{jjjuh1jhhhj{hNhNubj)}(hX**Definition**:: struct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; }; **Members** ``topology_kref`` refcount for this port's lifetime in the topology, only the DP MST helpers should need to touch this ``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc(). ``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. ``port_num`` port number ``input`` if this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``mcs`` message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``ddps`` DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``pdt`` Peer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``ldps`` Legacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``dpcd_rev`` DPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``num_sdp_streams`` Number of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``num_sdp_stream_sinks`` Number of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``full_pbn`` Max possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``next`` link to next port on this branch device ``mstb`` the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `. ``aux`` i2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``passthrough_aux`` parent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible. ``parent`` branch device parent of this port ``connector`` DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. ``mgr`` topology manager this port lives under. ``cached_edid`` for DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately. ``fec_capable`` bool indicating if FEC can be supported up to that point in the MST topology.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubh:}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK@hj{ubj@)}(hXstruct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; };h]hXstruct drm_dp_mst_port { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; u8 port_num; bool input; bool mcs; bool ddps; u8 pdt; bool ldps; u8 dpcd_rev; u8 num_sdp_streams; u8 num_sdp_stream_sinks; uint16_t full_pbn; struct list_head next; struct drm_dp_mst_branch *mstb; struct drm_dp_aux aux; struct drm_dp_aux *passthrough_aux; struct drm_dp_mst_branch *parent; struct drm_connector *connector; struct drm_dp_mst_topology_mgr *mgr; const struct drm_edid *cached_edid; bool fec_capable; };}hj{sbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKBhj{ubh)}(h **Members**h]j%)}(hj{h]hMembers}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK]hj{ubji)}(hhh](jn)}(hw``topology_kref`` refcount for this port's lifetime in the topology, only the DP MST helpers should need to touch this h](jt)}(h``topology_kref``h]jz)}(hj{h]h topology_kref}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKahj{ubj)}(hhh]h)}(hdrefcount for this port's lifetime in the topology, only the DP MST helpers should need to touch thish]hfrefcount for this port’s lifetime in the topology, only the DP MST helpers should need to touch this}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK`hj{ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj{hKahj{ubjn)}(h``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc(). h](jt)}(h``malloc_kref``h]jz)}(hj|h]h malloc_kref}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhhj|ubj)}(hhh]h)}(hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc().h]hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_port_malloc() and drm_dp_mst_put_port_malloc().}(hj3|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKfhj0|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj/|hKhhj{ubjn)}(hv``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. h](jt)}(h``topology_ref_history``h]jz)}(hjT|h]htopology_ref_history}(hjV|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjR|ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKohjN|ubj)}(hhh]h)}(h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.h]h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.}(hjm|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKnhjj|ubah}(h]h ]h"]h$]h&]uh1jhjN|ubeh}(h]h ]h"]h$]h&]uh1jmhji|hKohj{ubjn)}(h``port_num`` port number h](jt)}(h ``port_num``h]jz)}(hj|h]hport_num}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK>hj|ubj)}(hhh]h)}(h port numberh]h port number}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hK>hj|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hK>hj{ubjn)}(h}``input`` if this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h ``input``h]jz)}(hj|h]hinput}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK@hj|ubj)}(hhh]h)}(hrif this port is an input port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h,if this port is an input port. Protected by }(hj|hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hj|h]hdrm_dp_mst_topology_mgr.base}(hj|hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK?hj|ubh.lock.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj}hK?hj|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hK@hj{ubjn)}(h``mcs`` message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h``mcs``h]jz)}(hj$}h]hmcs}(hj&}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"}ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKBhj}ubj)}(hhh]h)}(h|message capability status - DP 1.2 spec. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6message capability status - DP 1.2 spec. Protected by }(hj=}hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hjG}h]hdrm_dp_mst_topology_mgr.base}(hjI}hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjE}ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKAhj=}ubh.lock.}(hj=}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjd}hKAhj:}ubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhj9}hKBhj{ubjn)}(h``ddps`` DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h``ddps``h]jz)}(hj}h]hddps}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKDhj{}ubj)}(hhh]h)}(h|DisplayPort Device Plug Status - DP 1.2. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6DisplayPort Device Plug Status - DP 1.2. Protected by }(hj}hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hj}h]hdrm_dp_mst_topology_mgr.base}(hj}hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKChj}ubh.lock.}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj}hKChj}ubah}(h]h ]h"]h$]h&]uh1jhj{}ubeh}(h]h ]h"]h$]h&]uh1jmhj}hKDhj{ubjn)}(hn``pdt`` Peer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h``pdt``h]jz)}(hj}h]hpdt}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKFhj}ubj)}(hhh]h)}(hePeer Device Type. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](hPeer Device Type. Protected by }(hj}hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hj~h]hdrm_dp_mst_topology_mgr.base}(hj~hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKEhj}ubh.lock.}(hj}hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj~hKEhj}ubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhj}hKFhj{ubjn)}(hx``ldps`` Legacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h``ldps``h]jz)}(hj;~h]hldps}(hj=~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9~ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKHhj5~ubj)}(hhh]h)}(hnLegacy Device Plug Status. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h(Legacy Device Plug Status. Protected by }(hjT~hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hj^~h]hdrm_dp_mst_topology_mgr.base}(hj`~hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\~ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKGhjT~ubh.lock.}(hjT~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{~hKGhjQ~ubah}(h]h ]h"]h$]h&]uh1jhj5~ubeh}(h]h ]h"]h$]h&]uh1jmhjP~hKHhj{ubjn)}(h``dpcd_rev`` DPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h ``dpcd_rev``h]jz)}(hj~h]hdpcd_rev}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKJhj~ubj)}(hhh]h)}(hyDPCD revision of device on this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h3DPCD revision of device on this port. Protected by }(hj~hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hj~h]hdrm_dp_mst_topology_mgr.base}(hj~hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKIhj~ubh.lock.}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj~hKIhj~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hKJhj{ubjn)}(h``num_sdp_streams`` Number of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h``num_sdp_streams``h]jz)}(hj~h]hnum_sdp_streams}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKLhj~ubj)}(hhh]h)}(hsNumber of simultaneous streams. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h-Number of simultaneous streams. Protected by }(hjhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hjh]hdrm_dp_mst_topology_mgr.base}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKKhjubh.lock.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj5hKKhj ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj hKLhj{ubjn)}(h``num_sdp_stream_sinks`` Number of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h``num_sdp_stream_sinks``h]jz)}(hjRh]hnum_sdp_stream_sinks}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKNhjLubj)}(hhh]h)}(hkNumber of stream sinks. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h%Number of stream sinks. Protected by }(hjkhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hjuh]hdrm_dp_mst_topology_mgr.base}(hjwhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKMhjkubh.lock.}(hjkhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKMhjhubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jmhjghKNhj{ubjn)}(h``full_pbn`` Max possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h ``full_pbn``h]jz)}(hjh]hfull_pbn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKPhjubj)}(hhh]h)}(hyMax possible bandwidth for this port. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h3Max possible bandwidth for this port. Protected by }(hjhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hjh]hdrm_dp_mst_topology_mgr.base}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKOhjubh.lock.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKOhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKPhj{ubjn)}(h1``next`` link to next port on this branch device h](jt)}(h``next``h]jz)}(hj h]hnext}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKQhjubj)}(hhh]h)}(h'link to next port on this branch deviceh]h'link to next port on this branch device}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKQhj"ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj!hKQhj{ubjn)}(hXg``mstb`` the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `. h](jt)}(h``mstb``h]jz)}(hjEh]hmstb}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj?ubj)}(hhh]h)}(hX]the branch device connected to this port, if there is one. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from writing concurrently by :c:type:`drm_dp_mst_topology_mgr.probe_lock `.h](hnthe branch device connected to this port, if there is one. This should be considered protected for reading by }(hj^hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jz)}(hjhh]hdrm_dp_mst_topology_mgr.lock}(hjjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj^ubh$. There are two exceptions to this: }(hj^hhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.up_req_work `h]jz)}(hjh]h#drm_dp_mst_topology_mgr.up_req_work}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhKhj^ubh and }(hj^hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.work `h]jz)}(hjh]hdrm_dp_mst_topology_mgr.work}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhKhj^ubh, which do not grab }(hj^hhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jz)}(hjҀh]hdrm_dp_mst_topology_mgr.lock}(hjԀhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjЀubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhKhj^ubhd during reads but are the only updaters of this list and are protected from writing concurrently by }(hj^hhhNhNubh)}(hF:c:type:`drm_dp_mst_topology_mgr.probe_lock `h]jz)}(hjh]h"drm_dp_mst_topology_mgr.probe_lock}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhKhj^ubh.}(hj^hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhjZhKhj{ubjn)}(h``aux`` i2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h``aux``h]jz)}(hj.h]haux}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKShj(ubj)}(hhh]h)}(hi2c aux transport to talk to device connected to this port, protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](hIi2c aux transport to talk to device connected to this port, protected by }(hjGhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hjQh]hdrm_dp_mst_topology_mgr.base}(hjShhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKRhjGubh.lock.}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjnhKRhjDubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jmhjChKShj{ubjn)}(h|``passthrough_aux`` parent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible. h](jt)}(h``passthrough_aux``h]jz)}(hjh]hpassthrough_aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKUhjubj)}(hhh]h)}(hgparent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible.h]hgparent aux to which DSC pass-through requests should be sent, only set if DSC pass-through is possible.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKThjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKUhj{ubjn)}(h-``parent`` branch device parent of this port h](jt)}(h ``parent``h]jz)}(hjŁh]hparent}(hjǁhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjÁubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKVhjubj)}(hhh]h)}(h!branch device parent of this porth]h!branch device parent of this port}(hjށhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjځhKVhjہubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjځhKVhj{ubjn)}(h``connector`` DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock. h](jt)}(h ``connector``h]jz)}(hjh]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKXhjubj)}(hhh]h)}(h|DRM connector this port is connected to. Protected by :c:type:`drm_dp_mst_topology_mgr.base `.lock.h](h6DRM connector this port is connected to. Protected by }(hjhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.base `h]jz)}(hj!h]hdrm_dp_mst_topology_mgr.base}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKWhjubh.lock.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>hKWhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKXhj{ubjn)}(h0``mgr`` topology manager this port lives under. h](jt)}(h``mgr``h]jz)}(hj[h]hmgr}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKYhjUubj)}(hhh]h)}(h'topology manager this port lives under.h]h'topology manager this port lives under.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphKYhjqubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jmhjphKYhj{ubjn)}(hz``cached_edid`` for DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately. h](jt)}(h``cached_edid``h]jz)}(hjh]h cached_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj)}(hhh]h)}(hifor DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately.h]hifor DP logical ports - make tiling work by ensuring that the EDID for all connectors is read immediately.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj{ubjn)}(h]``fec_capable`` bool indicating if FEC can be supported up to that point in the MST topology.h](jt)}(h``fec_capable``h]jz)}(hj΂h]h fec_capable}(hjЂhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhĵubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjȂubj)}(hhh]h)}(hMbool indicating if FEC can be supported up to that point in the MST topology.h]hMbool indicating if FEC can be supported up to that point in the MST topology.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjȂubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj{ubeh}(h]h ]h"]h$]h&]uh1jhhj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj{hhubh)}(hYThis structure represents an MST port endpoint on a device somewhere in the MST topology.h]hYThis structure represents an MST port endpoint on a device somewhere in the MST topology.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKYhj{hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_mst_branch (C struct)c.drm_dp_mst_branchhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hdrm_dp_mst_branchh]j)}(hstruct drm_dp_mst_branchh](j)}(hjh]hstruct}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhK_ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhj[hK_ubj)}(hdrm_dp_mst_branchh]j)}(hjHh]hdrm_dp_mst_branch}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjJhhhj[hK_ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjFhhhj[hK_ubah}(h]jAah ](jjeh"]h$]h&]jj)jhuh1jhj[hK_hjChhubj)}(hhh]h)}(hMST branch device.h]hMST branch device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjhhubah}(h]h ]h"]h$]h&]uh1jhjChhhj[hK_ubeh}(h]h ](jstructeh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX) **Definition**:: struct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; }; **Members** ``topology_kref`` refcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch this ``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc(). ``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. ``destroy_next`` linked-list entry used by drm_dp_delayed_destroy_work() ``rad`` Relative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second. ``lct`` Link count total to talk to this branch device. ``num_ports`` number of ports on the branch. ``ports`` the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock** ``port_parent`` pointer to the port parent, NULL if toplevel. ``mgr`` topology manager for this branch device. ``link_address_sent`` if a link address message has been sent to this device yet. ``guid`` guid for DP 1.2 branch device. port under this branch can be identified by port #.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj@)}(hXstruct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; };h]hXstruct drm_dp_mst_branch { struct kref topology_kref; struct kref malloc_kref; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct drm_dp_mst_topology_ref_history topology_ref_history; #endif; struct list_head destroy_next; u8 rad[8]; u8 lct; int num_ports; struct list_head ports; struct drm_dp_mst_port *port_parent; struct drm_dp_mst_topology_mgr *mgr; bool link_address_sent; guid_t guid; };}hj̓sbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubh)}(h **Members**h]j%)}(hjރh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj܃ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubji)}(hhh](jn)}(h``topology_kref`` refcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch this h](jt)}(h``topology_kref``h]jz)}(hjh]h topology_kref}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj)}(hhh]h)}(hmrefcount for this branch device's lifetime in the topology, only the DP MST helpers should need to touch thish]horefcount for this branch device’s lifetime in the topology, only the DP MST helpers should need to touch this}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h``malloc_kref`` refcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc(). h](jt)}(h``malloc_kref``h]jz)}(hj7h]h malloc_kref}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj1ubj)}(hhh]h)}(hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc().h]hrefcount for the memory allocation containing this structure. See drm_dp_mst_get_mstb_malloc() and drm_dp_mst_put_mstb_malloc().}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjMubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhjLhKhjubjn)}(hv``topology_ref_history`` A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS. h](jt)}(h``topology_ref_history``h]jz)}(hjqh]htopology_ref_history}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjoubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjkubj)}(hhh]h)}(h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.h]h\A history of each topology reference/dereference. See CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(hI``destroy_next`` linked-list entry used by drm_dp_delayed_destroy_work() h](jt)}(h``destroy_next``h]jz)}(hjh]h destroy_next}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj)}(hhh]h)}(h7linked-list entry used by drm_dp_delayed_destroy_work()h]h7linked-list entry used by drm_dp_delayed_destroy_work()}(hjĄhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(hXN``rad`` Relative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second. h](jt)}(h``rad``h]jz)}(hjh]hrad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj߄ubj)}(hhh]h)}(hXERelative Address of the MST branch. For :c:type:`drm_dp_mst_topology_mgr.mst_primary `, it's rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second.h](h(Relative Address of the MST branch. For }(hjhhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.mst_primary `h]jz)}(hjh]h#drm_dp_mst_topology_mgr.mst_primary}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubh, it’s rad[8] are all 0, unset and unused. For MST branches connected after mst_primary, in each element of rad[] the nibbles are ordered by the most signifcant 4 bits first and the least significant 4 bits second.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj%hKhjubah}(h]h ]h"]h$]h&]uh1jhj߄ubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h8``lct`` Link count total to talk to this branch device. h](jt)}(h``lct``h]jz)}(hjBh]hlct}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj<ubj)}(hhh]h)}(h/Link count total to talk to this branch device.h]h/Link count total to talk to this branch device.}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhKhjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jmhjWhKhjubjn)}(h-``num_ports`` number of ports on the branch. h](jt)}(h ``num_ports``h]jz)}(hj{h]h num_ports}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjuubj)}(hhh]h)}(hnumber of ports on the branch.h]hnumber of ports on the branch.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(hX?``ports`` the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock** h](jt)}(h ``ports``h]jz)}(hjh]hports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj)}(hhh]h)}(hX4the list of ports on this branch device. This should be considered protected for reading by :c:type:`drm_dp_mst_topology_mgr.lock `. There are two exceptions to this: :c:type:`drm_dp_mst_topology_mgr.up_req_work ` and :c:type:`drm_dp_mst_topology_mgr.work `, which do not grab :c:type:`drm_dp_mst_topology_mgr.lock ` during reads but are the only updaters of this list and are protected from updating the list concurrently by **drm_dp_mst_topology_mgr.probe_lock**h](h\the list of ports on this branch device. This should be considered protected for reading by }(hjͅhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jz)}(hjׅh]hdrm_dp_mst_topology_mgr.lock}(hjمhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjՅubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjͅubh$. There are two exceptions to this: }(hjͅhhhNhNubh)}(hG:c:type:`drm_dp_mst_topology_mgr.up_req_work `h]jz)}(hjh]h#drm_dp_mst_topology_mgr.up_req_work}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhKhjͅubh and }(hjͅhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.work `h]jz)}(hjh]hdrm_dp_mst_topology_mgr.work}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhKhjͅubh, which do not grab }(hjͅhhhNhNubh)}(h@:c:type:`drm_dp_mst_topology_mgr.lock `h]jz)}(hjAh]hdrm_dp_mst_topology_mgr.lock}(hjChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhKhjͅubhn during reads but are the only updaters of this list and are protected from updating the list concurrently by }(hjͅhhhNhNubj%)}(h&**drm_dp_mst_topology_mgr.probe_lock**h]h"drm_dp_mst_topology_mgr.probe_lock}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjͅubeh}(h]h ]h"]h$]h&]uh1hhjhKhjʅubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjɅhKhjubjn)}(h>``port_parent`` pointer to the port parent, NULL if toplevel. h](jt)}(h``port_parent``h]jz)}(hjh]h port_parent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj)}(hhh]h)}(h-pointer to the port parent, NULL if toplevel.h]h-pointer to the port parent, NULL if toplevel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h1``mgr`` topology manager for this branch device. h](jt)}(h``mgr``h]jz)}(hjh]hmgr}(hjÆhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj)}(hhh]h)}(h(topology manager for this branch device.h]h(topology manager for this branch device.}(hjچhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjֆhKhj׆ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjֆhKhjubjn)}(hR``link_address_sent`` if a link address message has been sent to this device yet. h](jt)}(h``link_address_sent``h]jz)}(hjh]hlink_address_sent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhjubj)}(hhh]h)}(h;if a link address message has been sent to this device yet.h]h;if a link address message has been sent to this device yet.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h[``guid`` guid for DP 1.2 branch device. port under this branch can be identified by port #.h](jt)}(h``guid``h]jz)}(hj3h]hguid}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj-ubj)}(hhh]h)}(hRguid for DP 1.2 branch device. port under this branch can be identified by port #.h]hRguid for DP 1.2 branch device. port under this branch can be identified by port #.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhKhjIubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jmhjHhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubh)}(h**Description**h]j%)}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj{hhubh)}(hThis structure represents an MST branch device, there is one primary branch device at the root, along with any other branches connected to downstream port of parent branches.h]hThis structure represents an MST branch device, there is one primary branch device at the root, along with any other branches connected to downstream port of parent branches.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKhj{hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_mst_atomic_payload (C struct)c.drm_dp_mst_atomic_payloadhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hdrm_dp_mst_atomic_payloadh]j)}(h struct drm_dp_mst_atomic_payloadh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_dp_mst_atomic_payloadh]j)}(hjh]hdrm_dp_mst_atomic_payload}(hjӇhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjχubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h&Atomic state struct for an MST payloadh]h&Atomic state struct for an MST payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jstructeh"]h$]h&]jjjj jj jjjuh1jhhhj{hNhNubj)}(hX **Definition**:: struct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; }; **Members** ``port`` The MST port assigned to this payload ``vc_start_slot`` The time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations. Since this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either: * Read this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called. * Acquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. If neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads. ``vcpi`` The Virtual Channel Payload Identifier ``time_slots`` The number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx ``pbn`` The payload bandwidth for this payload ``delete`` Whether or not we intend to delete this payload during this atomic commit ``dsc_enabled`` Whether or not this payload has DSC enabled ``payload_allocation_status`` The allocation status of this payload ``next`` The list node for this payloadh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj@)}(hXstruct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; };h]hXstruct drm_dp_mst_atomic_payload { struct drm_dp_mst_port *port; s8 vc_start_slot; u8 vcpi; int time_slots; int pbn; bool delete : 1; bool dsc_enabled : 1; enum drm_dp_mst_payload_allocation payload_allocation_status; struct list_head next; };}hj2sbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(h **Members**h]j%)}(hjCh]hMembers}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM$hjubji)}(hhh](jn)}(h/``port`` The MST port assigned to this payload h](jt)}(h``port``h]jz)}(hjbh]hport}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj\ubj)}(hhh]h)}(h%The MST port assigned to this payloadh]h%The MST port assigned to this payload}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhMhjxubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jmhjwhMhjYubjn)}(hX``vc_start_slot`` The time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations. Since this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either: * Read this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called. * Acquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. If neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads. h](jt)}(h``vc_start_slot``h]jz)}(hjh]h vc_start_slot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM2hjubj)}(hhh](h)}(hXThe time slot that this payload starts on. Because payload start slots can't be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn't usually matter, as the start slot should never be relevant for atomic state computations.h]hXThe time slot that this payload starts on. Because payload start slots can’t be determined ahead of time, the contents of this value are UNDEFINED at atomic check time. This shouldn’t usually matter, as the start slot should never be relevant for atomic state computations.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hXSSince this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either:h]hXSSince this value is determined at commit time instead of check time, this value is protected by the MST helpers ensuring that async commits operating on the given topology never run in parallel. In the event that a driver does need to read this value (e.g. to inform hardware of the starting timeslot for a payload), the driver may either:}(hjÈhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM"hjubh)}(hhh](h)}(hXgRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.h]h)}(hXgRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won't be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.h]hXiRead this field during the atomic commit after drm_dp_mst_atomic_wait_for_dependencies() has been called, which will ensure the previous MST states payload start slots have been copied over to the new state. Note that a new start slot won’t be assigned/removed from this payload until drm_dp_add_payload_part1()/drm_dp_remove_payload_part2() have been called.}(hjوhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM'hjՈubah}(h]h ]h"]h$]h&]uh1hhj҈ubh)}(hXAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `. h]h)}(hXAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the :c:type:`drm_crtc_commit` structs in :c:type:`drm_dp_mst_topology_state.commit_deps `.h](hAcquire the MST modesetting lock, and then wait for any pending MST-related commits to get committed to hardware by calling drm_crtc_commit_wait() on each of the }(hjhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jz)}(hjh]hdrm_crtc_commit}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_commituh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM,hjubh structs in }(hjhhhNhNubh)}(hK:c:type:`drm_dp_mst_topology_state.commit_deps `h]jz)}(hj h]h%drm_dp_mst_topology_state.commit_deps}(hj"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhjhM,hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM,hjubah}(h]h ]h"]h$]h&]uh1hhj҈ubeh}(h]h ]h"]h$]h&]j8j9uh1hhjhM'hjubh)}(hIf neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads.h]hIf neither of the two above solutions suffice (e.g. the driver needs to read the start slot in the middle of an atomic commit without waiting for some reason), then drivers should cache this value themselves after changing payloads.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM0hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM2hjYubjn)}(h0``vcpi`` The Virtual Channel Payload Identifier h](jt)}(h``vcpi``h]jz)}(hjth]hvcpi}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM6hjnubj)}(hhh]h)}(h&The Virtual Channel Payload Identifierh]h&The Virtual Channel Payload Identifier}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM6hjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjhM6hjYubjn)}(hy``time_slots`` The number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx h](jt)}(h``time_slots``h]jz)}(hjh]h time_slots}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM:hjubj)}(hhh]h)}(hiThe number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rxh]hiThe number of timeslots allocated to this payload from the source DP Tx to the immediate downstream DP Rx}(hjƉhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM9hjÉubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj‰hM:hjYubjn)}(h/``pbn`` The payload bandwidth for this payload h](jt)}(h``pbn``h]jz)}(hjh]hpbn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM>hjubj)}(hhh]h)}(h&The payload bandwidth for this payloadh]h&The payload bandwidth for this payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM>hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM>hjYubjn)}(hU``delete`` Whether or not we intend to delete this payload during this atomic commit h](jt)}(h ``delete``h]jz)}(hj h]hdelete}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMAhjubj)}(hhh]h)}(hIWhether or not we intend to delete this payload during this atomic commith]hIWhether or not we intend to delete this payload during this atomic commit}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMAhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hMAhjYubjn)}(h<``dsc_enabled`` Whether or not this payload has DSC enabled h](jt)}(h``dsc_enabled``h]jz)}(hjYh]h dsc_enabled}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMChjSubj)}(hhh]h)}(h+Whether or not this payload has DSC enabledh]h+Whether or not this payload has DSC enabled}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMChjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jmhjnhMChjYubjn)}(hD``payload_allocation_status`` The allocation status of this payload h](jt)}(h``payload_allocation_status``h]jz)}(hjh]hpayload_allocation_status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMFhjubj)}(hhh]h)}(h%The allocation status of this payloadh]h%The allocation status of this payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMFhjYubjn)}(h'``next`` The list node for this payloadh](jt)}(h``next``h]jz)}(hjˊh]hnext}(hj͊hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjɊubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMHhjŊubj)}(hhh]h)}(hThe list node for this payloadh]hThe list node for this payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMIhjubah}(h]h ]h"]h$]h&]uh1jhjŊubeh}(h]h ]h"]h$]h&]uh1jmhjhMHhjYubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMLhj{hhubh)}(hThe primary atomic state structure for a given MST payload. Stores information like current bandwidth allocation, intended action for this payload, etc.h]hThe primary atomic state structure for a given MST payload. Stores information like current bandwidth allocation, intended action for this payload, etc.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj{hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_mst_topology_state (C struct)c.drm_dp_mst_topology_statehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hdrm_dp_mst_topology_stateh]j)}(h struct drm_dp_mst_topology_stateh](j)}(hjh]hstruct}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHhhhjYhMubj)}(hdrm_dp_mst_topology_stateh]j)}(hjFh]hdrm_dp_mst_topology_state}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubah}(h]h ](jjeh"]h$]h&]jjuh1jhjHhhhjYhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjDhhhjYhMubah}(h]j?ah ](jjeh"]h$]h&]jj)jhuh1jhjYhMhjAhhubj)}(hhh]h)}(h%DisplayPort MST topology atomic stateh]h%DisplayPort MST topology atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMMhjhhubah}(h]h ]h"]h$]h&]uh1jhjAhhhjYhMubeh}(h]h ](jstructeh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Definition**:: struct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; }; **Members** ``base`` Base private state for atomic ``mgr`` The topology manager ``pending_crtc_mask`` A bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed. ``commit_deps`` A list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called. ``num_commit_deps`` The number of CRTC commits in **commit_deps** ``payload_mask`` A bitmask of allocated VCPIs, used for VCPI assignments ``payloads`` The list of payloads being created/destroyed in this state ``total_avail_slots`` The total number of slots this topology can handle (63 or 64) ``start_slot`` The first usable time slot in this topology (1 or 0) ``pbn_div`` The current PBN divisor for this topology. The driver is expected to fill this out itself.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMQhjubj@)}(hXLstruct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; };h]hXLstruct drm_dp_mst_topology_state { struct drm_private_state base; struct drm_dp_mst_topology_mgr *mgr; u32 pending_crtc_mask; struct drm_crtc_commit **commit_deps; size_t num_commit_deps; u32 payload_mask; struct list_head payloads; u8 total_avail_slots; u8 start_slot; fixed20_12 pbn_div; };}hjˋsbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMShjubh)}(h **Members**h]j%)}(hj܋h]hMembers}(hjދhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjڋubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM`hjubji)}(hhh](jn)}(h'``base`` Base private state for atomic h](jt)}(h``base``h]jz)}(hjh]hbase}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMShjubj)}(hhh]h)}(hBase private state for atomich]hBase private state for atomic}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMShjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMShjubjn)}(h``mgr`` The topology manager h](jt)}(h``mgr``h]jz)}(hj4h]hmgr}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMVhj.ubj)}(hhh]h)}(hThe topology managerh]hThe topology manager}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMVhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhjIhMVhjubjn)}(h``pending_crtc_mask`` A bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed. h](jt)}(h``pending_crtc_mask``h]jz)}(hjmh]hpending_crtc_mask}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM[hjgubj)}(hhh]h)}(huA bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed.h]huA bitmask of all CRTCs this topology state touches, drivers may modify this to add additional dependencies if needed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMZhjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjhM[hjubjn)}(h``commit_deps`` A list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called. h](jt)}(h``commit_deps``h]jz)}(hjh]h commit_deps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM`hjubj)}(hhh]h)}(hA list of all CRTC commits affecting this topology, this field isn't populated until drm_dp_mst_atomic_wait_for_dependencies() is called.h]hA list of all CRTC commits affecting this topology, this field isn’t populated until drm_dp_mst_atomic_wait_for_dependencies() is called.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM_hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM`hjubjn)}(hB``num_commit_deps`` The number of CRTC commits in **commit_deps** h](jt)}(h``num_commit_deps``h]jz)}(hjh]hnum_commit_deps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjߌubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMchjیubj)}(hhh]h)}(h-The number of CRTC commits in **commit_deps**h](hThe number of CRTC commits in }(hjhhhNhNubj%)}(h**commit_deps**h]h commit_deps}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h ]h"]h$]h&]uh1hhjhMchjubah}(h]h ]h"]h$]h&]uh1jhjیubeh}(h]h ]h"]h$]h&]uh1jmhjhMchjubjn)}(hI``payload_mask`` A bitmask of allocated VCPIs, used for VCPI assignments h](jt)}(h``payload_mask``h]jz)}(hj(h]h payload_mask}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMfhj"ubj)}(hhh]h)}(h7A bitmask of allocated VCPIs, used for VCPI assignmentsh]h7A bitmask of allocated VCPIs, used for VCPI assignments}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMfhj>ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj=hMfhjubjn)}(hH``payloads`` The list of payloads being created/destroyed in this state h](jt)}(h ``payloads``h]jz)}(hjah]hpayloads}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhhj[ubj)}(hhh]h)}(h:The list of payloads being created/destroyed in this stateh]h:The list of payloads being created/destroyed in this state}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhMhhjwubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhjvhMhhjubjn)}(hT``total_avail_slots`` The total number of slots this topology can handle (63 or 64) h](jt)}(h``total_avail_slots``h]jz)}(hjh]htotal_avail_slots}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMkhjubj)}(hhh]h)}(h=The total number of slots this topology can handle (63 or 64)h]h=The total number of slots this topology can handle (63 or 64)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMkhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMkhjubjn)}(hD``start_slot`` The first usable time slot in this topology (1 or 0) h](jt)}(h``start_slot``h]jz)}(hjӍh]h start_slot}(hjՍhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjэubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMmhj͍ubj)}(hhh]h)}(h4The first usable time slot in this topology (1 or 0)h]h4The first usable time slot in this topology (1 or 0)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMmhjubah}(h]h ]h"]h$]h&]uh1jhj͍ubeh}(h]h ]h"]h$]h&]uh1jmhjhMmhjubjn)}(hf``pbn_div`` The current PBN divisor for this topology. The driver is expected to fill this out itself.h](jt)}(h ``pbn_div``h]jz)}(hj h]hpbn_div}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMqhjubj)}(hhh]h)}(hZThe current PBN divisor for this topology. The driver is expected to fill this out itself.h]hZThe current PBN divisor for this topology. The driver is expected to fill this out itself.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMqhj"ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj!hMqhjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubh)}(h**Description**h]j%)}(hjNh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMuhj{hhubh)}(hOThis struct represents the atomic state of the toplevel DisplayPort MST managerh]hOThis struct represents the atomic state of the toplevel DisplayPort MST manager}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMNhj{hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_dp_mst_topology_mgr (C struct)c.drm_dp_mst_topology_mgrhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hdrm_dp_mst_topology_mgrh]j)}(hstruct drm_dp_mst_topology_mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMSubj)}(hdrm_dp_mst_topology_mgrh]j)}(hjh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMSubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMSubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMShjhhubj)}(hhh]h)}(hDisplayPort MST managerh]hDisplayPort MST manager}(hjΎhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMyhjˎhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMSubeh}(h]h ](jstructeh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Definition**:: struct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; }; **Members** ``base`` Base private object for atomic ``dev`` device pointer for adding i2c devices etc. ``cbs`` callbacks for connector addition and destruction. ``max_dpcd_transaction_bytes`` maximum number of bytes to read/write in one go. ``aux`` AUX channel for the DP MST connector this topolgy mgr is controlling. ``max_payloads`` maximum number of payloads the GPU can generate. ``conn_base_id`` DRM connector ID this mgr is connected to. Only used to build the MST connector path value. ``up_req_recv`` Message receiver state for up requests. ``down_rep_recv`` Message receiver state for replies to down requests. ``lock`` protects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**. ``probe_lock`` Prevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology. ``mst_state`` If this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected. ``payload_id_table_cleared`` Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**. ``reset_rx_state`` The down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**. ``payload_count`` The number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. ``next_start_slot`` The starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. ``mst_primary`` Pointer to the primary/first branch device. ``dpcd`` Cache of DPCD for primary port. ``sink_count`` Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0. ``funcs`` Atomic helper callbacks ``qlock`` protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state ` ``tx_msg_downq`` List of pending down requests ``tx_waitq`` Wait to queue stall for the tx worker. ``work`` Probe work. ``tx_work`` Sideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches. ``destroy_port_list`` List of to be destroyed connectors. ``destroy_branch_device_list`` List of to be destroyed branch devices. ``delayed_destroy_lock`` Protects **destroy_port_list** and **destroy_branch_device_list**. ``delayed_destroy_wq`` Workqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it. ``delayed_destroy_work`` Work item to destroy MST port and branch devices, needed to avoid locking inversion. ``up_req_list`` List of pending up requests from the topology that need to be processed, in chronological order. ``up_req_lock`` Protects **up_req_list** ``up_req_work`` Work item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions. ``topology_ref_history_lock`` protects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM}hjubj@)}(hXstruct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; };h]hXstruct drm_dp_mst_topology_mgr { struct drm_private_obj base; struct drm_device *dev; const struct drm_dp_mst_topology_cbs *cbs; int max_dpcd_transaction_bytes; struct drm_dp_aux *aux; int max_payloads; int conn_base_id; struct drm_dp_sideband_msg_rx up_req_recv; struct drm_dp_sideband_msg_rx down_rep_recv; struct mutex lock; struct mutex probe_lock; bool mst_state : 1; bool payload_id_table_cleared : 1; bool reset_rx_state : 1; u8 payload_count; u8 next_start_slot; struct drm_dp_mst_branch *mst_primary; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 sink_count; const struct drm_private_state_funcs *funcs; struct mutex qlock; struct list_head tx_msg_downq; wait_queue_head_t tx_waitq; struct work_struct work; struct work_struct tx_work; struct list_head destroy_port_list; struct list_head destroy_branch_device_list; struct mutex delayed_destroy_lock; struct workqueue_struct *delayed_destroy_wq; struct work_struct delayed_destroy_work; struct list_head up_req_list; struct mutex up_req_lock; struct work_struct up_req_work; #if IS_ENABLED(CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS); struct mutex topology_ref_history_lock; #endif; };}hj sbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubji)}(hhh](jn)}(h(``base`` Base private object for atomic h](jt)}(h``base``h]jz)}(hj;h]hbase}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj5ubj)}(hhh]h)}(hBase private object for atomich]hBase private object for atomic}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhMhjQubah}(h]h ]h"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]uh1jmhjPhMhj2ubjn)}(h3``dev`` device pointer for adding i2c devices etc. h](jt)}(h``dev``h]jz)}(hjth]hdev}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjnubj)}(hhh]h)}(h*device pointer for adding i2c devices etc.h]h*device pointer for adding i2c devices etc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h:``cbs`` callbacks for connector addition and destruction. h](jt)}(h``cbs``h]jz)}(hjh]hcbs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h1callbacks for connector addition and destruction.h]h1callbacks for connector addition and destruction.}(hjƏhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjÏubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(hP``max_dpcd_transaction_bytes`` maximum number of bytes to read/write in one go. h](jt)}(h``max_dpcd_transaction_bytes``h]jz)}(hjh]hmax_dpcd_transaction_bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h0maximum number of bytes to read/write in one go.h]h0maximum number of bytes to read/write in one go.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(hN``aux`` AUX channel for the DP MST connector this topolgy mgr is controlling. h](jt)}(h``aux``h]jz)}(hj h]haux}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hEAUX channel for the DP MST connector this topolgy mgr is controlling.h]hEAUX channel for the DP MST connector this topolgy mgr is controlling.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hMhj2ubjn)}(hB``max_payloads`` maximum number of payloads the GPU can generate. h](jt)}(h``max_payloads``h]jz)}(hjZh]h max_payloads}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjTubj)}(hhh]h)}(h0maximum number of payloads the GPU can generate.h]h0maximum number of payloads the GPU can generate.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohMhjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jmhjohMhj2ubjn)}(hm``conn_base_id`` DRM connector ID this mgr is connected to. Only used to build the MST connector path value. h](jt)}(h``conn_base_id``h]jz)}(hjh]h conn_base_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h[DRM connector ID this mgr is connected to. Only used to build the MST connector path value.h]h[DRM connector ID this mgr is connected to. Only used to build the MST connector path value.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h8``up_req_recv`` Message receiver state for up requests. h](jt)}(h``up_req_recv``h]jz)}(hj͐h]h up_req_recv}(hjϐhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjːubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjǐubj)}(hhh]h)}(h'Message receiver state for up requests.h]h'Message receiver state for up requests.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjǐubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(hG``down_rep_recv`` Message receiver state for replies to down requests. h](jt)}(h``down_rep_recv``h]jz)}(hjh]h down_rep_recv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h4Message receiver state for replies to down requests.h]h4Message receiver state for replies to down requests.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h^``lock`` protects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**. h](jt)}(h``lock``h]jz)}(hj@h]hlock}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj:ubj)}(hhh]h)}(hTprotects **mst_state**, **mst_primary**, **dpcd**, and **payload_id_table_cleared**.h](h protects }(hjYhhhNhNubj%)}(h **mst_state**h]h mst_state}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubh, }(hjYhhhNhNubj%)}(h**mst_primary**h]h mst_primary}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubh, }hjYsbj%)}(h**dpcd**h]hdpcd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubh, and }(hjYhhhNhNubj%)}(h**payload_id_table_cleared**h]hpayload_id_table_cleared}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubh.}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjVubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhjUhMhj2ubjn)}(h``probe_lock`` Prevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology. h](jt)}(h``probe_lock``h]jz)}(hj‘h]h probe_lock}(hjđhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hPrevents **work** and **up_req_work**, the only writers of :c:type:`drm_dp_mst_port.mstb ` and :c:type:`drm_dp_mst_branch.ports `, from racing while they update the topology.h](h Prevents }(hjۑhhhNhNubj%)}(h**work**h]hwork}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjۑubh and }(hjۑhhhNhNubj%)}(h**up_req_work**h]h up_req_work}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjۑubh, the only writers of }(hjۑhhhNhNubh)}(h0:c:type:`drm_dp_mst_port.mstb `h]jz)}(hj h]hdrm_dp_mst_port.mstb}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjۑubh and }hjۑsbh)}(h5:c:type:`drm_dp_mst_branch.ports `h]jz)}(hj-h]hdrm_dp_mst_branch.ports}(hj/hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhj&hMhjۑubh-, from racing while they update the topology.}(hjۑhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj&hMhjؑubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjבhMhj2ubjn)}(ht``mst_state`` If this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected. h](jt)}(h ``mst_state``h]jz)}(hjfh]h mst_state}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj`ubj)}(hhh]h)}(heIf this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected.h]heIf this manager is enabled for an MST capable port. False if no MST sink/branch devices is connected.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj|ubah}(h]h ]h"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]uh1jmhj{hMhj2ubjn)}(h{``payload_id_table_cleared`` Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**. h](jt)}(h``payload_id_table_cleared``h]jz)}(hjh]hpayload_id_table_cleared}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h]Whether or not we've cleared the payload ID table for **mst_primary**. Protected by **lock**.h](h8Whether or not we’ve cleared the payload ID table for }(hjhhhNhNubj%)}(h**mst_primary**h]h mst_primary}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh. Protected by }(hjhhhNhNubj%)}(h**lock**h]hlock}(hjӒhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h``reset_rx_state`` The down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**. h](jt)}(h``reset_rx_state``h]jz)}(hjh]hreset_rx_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hThe down request's reply and up request message receiver state must be reset, after the topology manager got removed. Protected by **lock**.h](hThe down request’s reply and up request message receiver state must be reset, after the topology manager got removed. Protected by }(hjhhhNhNubj%)}(h**lock**h]hlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h``payload_count`` The number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. h](jt)}(h``payload_count``h]jz)}(hjJh]h payload_count}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjDubj)}(hhh]h)}(hThe number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.h]hThe number of currently active payloads in hardware. This value is only intended to be used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj`ubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jmhj_hMhj2ubjn)}(h``next_start_slot`` The starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context. h](jt)}(h``next_start_slot``h]jz)}(hjh]hnext_start_slot}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj~ubj)}(hhh]h)}(hThe starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.h]hThe starting timeslot to use for new VC payloads. This value is used internally by MST helpers for payload tracking, and is only safe to read/write from the atomic commit (not check) context.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h<``mst_primary`` Pointer to the primary/first branch device. h](jt)}(h``mst_primary``h]jz)}(hjh]h mst_primary}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h+Pointer to the primary/first branch device.h]h+Pointer to the primary/first branch device.}(hjדhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjӓhMhjԓubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjӓhMhj2ubjn)}(h)``dpcd`` Cache of DPCD for primary port. h](jt)}(h``dpcd``h]jz)}(hjh]hdpcd}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hCache of DPCD for primary port.h]hCache of DPCD for primary port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj2ubjn)}(h?``sink_count`` Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0. h](jt)}(h``sink_count``h]jz)}(hj0h]h sink_count}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj*ubj)}(hhh]h)}(h/Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.h]h/Sink count from DEVICE_SERVICE_IRQ_VECTOR_ESI0.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMhjFubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhjEhMhj2ubjn)}(h"``funcs`` Atomic helper callbacks h](jt)}(h ``funcs``h]jz)}(hjih]hfuncs}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjcubj)}(hhh]h)}(hAtomic helper callbacksh]hAtomic helper callbacks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhjubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhj2ubjn)}(hh``qlock`` protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state ` h](jt)}(h ``qlock``h]jz)}(hjh]hqlock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h]protects **tx_msg_downq** and :c:type:`drm_dp_sideband_msg_tx.state `h](h protects }(hjhhhNhNubj%)}(h**tx_msg_downq**h]h tx_msg_downq}(hjÔhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubh)}(h?:c:type:`drm_dp_sideband_msg_tx.state `h]jz)}(hjהh]hdrm_dp_sideband_msg_tx.state}(hjٔhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjՔubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_sideband_msg_txuh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h/``tx_msg_downq`` List of pending down requests h](jt)}(h``tx_msg_downq``h]jz)}(hj h]h tx_msg_downq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hList of pending down requestsh]hList of pending down requests}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj"ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj!hMhj2ubjn)}(h4``tx_waitq`` Wait to queue stall for the tx worker. h](jt)}(h ``tx_waitq``h]jz)}(hjEh]htx_waitq}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj?ubj)}(hhh]h)}(h&Wait to queue stall for the tx worker.h]h&Wait to queue stall for the tx worker.}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhMhj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhjZhMhj2ubjn)}(h``work`` Probe work. h](jt)}(h``work``h]jz)}(hj~h]hwork}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjxubj)}(hhh]h)}(h Probe work.h]h Probe work.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h|``tx_work`` Sideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches. h](jt)}(h ``tx_work``h]jz)}(hjh]htx_work}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hoSideband transmit worker. This can nest within the main **work** worker for each transaction **work** launches.h](h8Sideband transmit worker. This can nest within the main }(hjЕhhhNhNubj%)}(h**work**h]hwork}(hjؕhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjЕubh worker for each transaction }(hjЕhhhNhNubj%)}(h**work**h]hwork}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjЕubh launches.}(hjЕhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj͕ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj̕hMhj2ubjn)}(h:``destroy_port_list`` List of to be destroyed connectors. h](jt)}(h``destroy_port_list``h]jz)}(hjh]hdestroy_port_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h#List of to be destroyed connectors.h]h#List of to be destroyed connectors.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj*hMhj2ubjn)}(hG``destroy_branch_device_list`` List of to be destroyed branch devices. h](jt)}(h``destroy_branch_device_list``h]jz)}(hjNh]hdestroy_branch_device_list}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM hjHubj)}(hhh]h)}(h'List of to be destroyed branch devices.h]h'List of to be destroyed branch devices.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM hjdubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjchM hj2ubjn)}(h\``delayed_destroy_lock`` Protects **destroy_port_list** and **destroy_branch_device_list**. h](jt)}(h``delayed_destroy_lock``h]jz)}(hjh]hdelayed_destroy_lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hBProtects **destroy_port_list** and **destroy_branch_device_list**.h](h Protects }(hjhhhNhNubj%)}(h**destroy_port_list**h]hdestroy_port_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h**destroy_branch_device_list**h]hdestroy_branch_device_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(h``delayed_destroy_wq`` Workqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it. h](jt)}(h``delayed_destroy_wq``h]jz)}(hjh]hdelayed_destroy_wq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hwWorkqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it.h]hwWorkqueue used for delayed_destroy_work items. A dedicated WQ makes it possible to drain any requeued work items on it.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj2ubjn)}(hn``delayed_destroy_work`` Work item to destroy MST port and branch devices, needed to avoid locking inversion. h](jt)}(h``delayed_destroy_work``h]jz)}(hj h]hdelayed_destroy_work}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hTWork item to destroy MST port and branch devices, needed to avoid locking inversion.h]hTWork item to destroy MST port and branch devices, needed to avoid locking inversion.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hMhj2ubjn)}(hq``up_req_list`` List of pending up requests from the topology that need to be processed, in chronological order. h](jt)}(h``up_req_list``h]jz)}(hjZh]h up_req_list}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM$hjTubj)}(hhh]h)}(h`List of pending up requests from the topology that need to be processed, in chronological order.h]h`List of pending up requests from the topology that need to be processed, in chronological order.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM#hjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jmhjohM$hj2ubjn)}(h)``up_req_lock`` Protects **up_req_list** h](jt)}(h``up_req_lock``h]jz)}(hjh]h up_req_lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM(hjubj)}(hhh]h)}(hProtects **up_req_list**h](h Protects }(hjhhhNhNubj%)}(h**up_req_list**h]h up_req_list}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubeh}(h]h ]h"]h$]h&]uh1hhjhM(hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM(hj2ubjn)}(h``up_req_work`` Work item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions. h](jt)}(h``up_req_work``h]jz)}(hjۗh]h up_req_work}(hjݗhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjٗubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM.hj՗ubj)}(hhh]h)}(hWork item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions.h]hWork item to process up requests received from the topology. Needed to avoid blocking hotplug handling and sideband transmissions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM,hjubah}(h]h ]h"]h$]h&]uh1jhj՗ubeh}(h]h ]h"]h$]h&]uh1jmhjhM.hj2ubjn)}(h``topology_ref_history_lock`` protects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](jt)}(h``topology_ref_history_lock``h]jz)}(hjh]htopology_ref_history_lock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM5hjubj)}(hhh]h)}(hprotects :c:type:`drm_dp_mst_port.topology_ref_history ` and :c:type:`drm_dp_mst_branch.topology_ref_history `.h](h protects }(hj.hhhNhNubh)}(h@:c:type:`drm_dp_mst_port.topology_ref_history `h]jz)}(hj8h]h$drm_dp_mst_port.topology_ref_history}(hj:hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj6ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM4hj.ubh and }(hj.hhhNhNubh)}(hD:c:type:`drm_dp_mst_branch.topology_ref_history `h]jz)}(hj\h]h&drm_dp_mst_branch.topology_ref_history}(hj^hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjUhM4hj.ubh.}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjUhM4hj+ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj*hM5hj2ubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM9hj{hhubh)}(hThis struct represents the toplevel displayport MST topology manager. There should be one instance of this for every MST capable DP connector on the GPU.h]hThis struct represents the toplevel displayport MST topology manager. There should be one instance of this for every MST capable DP connector on the GPU.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMzhj{hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_dp_mst_mode (C enum)c.drm_dp_mst_modehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hdrm_dp_mst_modeh]j)}(henum drm_dp_mst_modeh](j)}(hj8h]henum}(hjܘhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjؘhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjؘhhhjhMubj)}(hdrm_dp_mst_modeh]j)}(hj֘h]hdrm_dp_mst_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjؘhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjԘhhhjhMubah}(h]jϘah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjјhhubj)}(hhh]h)}(hsink's MST mode capabilityh]hsink’s MST mode capability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMChjhhubah}(h]h ]h"]h$]h&]uh1jhjјhhhjhMubeh}(h]h ](jenumeh"]h$]h&]jjjj6jj6jjjuh1jhhhj{hNhNubj)}(hX,**Constants** ``DRM_DP_SST`` The sink does not support MST nor single stream sideband messaging. ``DRM_DP_MST`` Sink supports MST, more than one stream and single stream sideband messaging. ``DRM_DP_SST_SIDEBAND_MSG`` Sink supports only one stream and single stream sideband messaging.h](h)}(h **Constants**h]j%)}(hj@h]h Constants}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMGhj:ubji)}(hhh](jn)}(hS``DRM_DP_SST`` The sink does not support MST nor single stream sideband messaging. h](jt)}(h``DRM_DP_SST``h]jz)}(hj_h]h DRM_DP_SST}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMKhjYubj)}(hhh]h)}(hCThe sink does not support MST nor single stream sideband messaging.h]hCThe sink does not support MST nor single stream sideband messaging.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMJhjuubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jmhjthMKhjVubjn)}(h]``DRM_DP_MST`` Sink supports MST, more than one stream and single stream sideband messaging. h](jt)}(h``DRM_DP_MST``h]jz)}(hjh]h DRM_DP_MST}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMOhjubj)}(hhh]h)}(hMSink supports MST, more than one stream and single stream sideband messaging.h]hMSink supports MST, more than one stream and single stream sideband messaging.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMNhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMOhjVubjn)}(h_``DRM_DP_SST_SIDEBAND_MSG`` Sink supports only one stream and single stream sideband messaging.h](jt)}(h``DRM_DP_SST_SIDEBAND_MSG``h]jz)}(hjәh]hDRM_DP_SST_SIDEBAND_MSG}(hjՙhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjљubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMRhj͙ubj)}(hhh]h)}(hCSink supports only one stream and single stream sideband messaging.h]hCSink supports only one stream and single stream sideband messaging.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMRhjubah}(h]h ]h"]h$]h&]uh1jhj͙ubeh}(h]h ]h"]h$]h&]uh1jmhjhMRhjVubeh}(h]h ]h"]h$]h&]uh1jhhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(__drm_dp_mst_state_iter_get (C function)c.__drm_dp_mst_state_iter_gethNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hbool __drm_dp_mst_state_iter_get (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h]j)}(hbool __drm_dp_mst_state_iter_get(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h](j)}(hjAh]hbool}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhj9hMubj)}(h__drm_dp_mst_state_iter_geth]j)}(h__drm_dp_mst_state_iter_geth]h__drm_dp_mst_state_iter_get}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubah}(h]h ](jjeh"]h$]h&]jjuh1jhj(hhhj9hMubj)}(h(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr **mgr, struct drm_dp_mst_topology_state **old_state, struct drm_dp_mst_topology_state **new_state, int i)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjNsbc.__drm_dp_mst_state_iter_getasbuh1hhjdubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjdubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubj)}(h$struct drm_dp_mst_topology_mgr **mgrh](j)}(hjh]hstruct}(hjښhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj֚ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj֚ubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.__drm_dp_mst_state_iter_getasbuh1hhj֚ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj֚ubj+)}(hj9h]h*}(hj$hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj֚ubj+)}(hj9h]h*}(hj1hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj֚ubj)}(hmgrh]hmgr}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj֚ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubj)}(h,struct drm_dp_mst_topology_state **old_stateh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]jc.__drm_dp_mst_state_iter_getasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjSubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjSubj)}(h old_stateh]h old_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubj)}(h,struct drm_dp_mst_topology_state **new_stateh](j)}(hjh]hstruct}(hjԛhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjЛubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjЛubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.__drm_dp_mst_state_iter_getasbuh1hhjЛubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjЛubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjЛubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjЛubj)}(h new_stateh]h new_state}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjЛubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubj)}(hint ih](j)}(hinth]hint}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(hih]hi}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj`ubeh}(h]h ]h"]h$]h&]jjuh1jhj(hhhj9hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj$hhhj9hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj9hMhj!hhubj)}(hhh]h)}(h=private atomic state iterator function for macro-internal useh]h=private atomic state iterator function for macro-internal use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjhhubah}(h]h ]h"]h$]h&]uh1jhj!hhhj9hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` :c:type:`struct drm_atomic_state ` pointer ``struct drm_dp_mst_topology_mgr **mgr`` pointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``struct drm_dp_mst_topology_state **old_state`` optional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursor ``struct drm_dp_mst_topology_state **new_state`` optional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursor ``int i`` int iteration cursor, for macro-internal use **Description** Used by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't call this directly. **Return** True if the current :c:type:`struct drm_private_obj ` is a :c:type:`struct drm_dp_mst_topology_mgr `, false otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubji)}(hhh](jn)}(h```struct drm_atomic_state *state`` :c:type:`struct drm_atomic_state ` pointer h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj؜h]hstruct drm_atomic_state *state}(hjڜhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj֜ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjҜubj)}(hhh]h)}(h<:c:type:`struct drm_atomic_state ` pointerh](h)}(h4:c:type:`struct drm_atomic_state `h]jz)}(hjh]hstruct drm_atomic_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhjhMhjubh pointer}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjҜubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjϜubjn)}(h``struct drm_dp_mst_topology_mgr **mgr`` pointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](jt)}(h(``struct drm_dp_mst_topology_mgr **mgr``h]jz)}(hj0h]h$struct drm_dp_mst_topology_mgr **mgr}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj*ubj)}(hhh]h)}(hbpointer to the :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](hpointer to the }(hjIhhhNhNubh)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jz)}(hjSh]hstruct drm_dp_mst_topology_mgr}(hjUhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjEhMhjIubh iteration cursor}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhMhjFubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhjEhMhjϜubjn)}(h``struct drm_dp_mst_topology_state **old_state`` optional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursor h](jt)}(h0``struct drm_dp_mst_topology_state **old_state``h]jz)}(hjh]h,struct drm_dp_mst_topology_state **old_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hsoptional pointer to the old :c:type:`struct drm_dp_mst_topology_state ` iteration cursorh](hoptional pointer to the old }(hjhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jz)}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj̝hMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjϜubjn)}(h``struct drm_dp_mst_topology_state **new_state`` optional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursor h](jt)}(h0``struct drm_dp_mst_topology_state **new_state``h]jz)}(hjh]h,struct drm_dp_mst_topology_state **new_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hsoptional pointer to the new :c:type:`struct drm_dp_mst_topology_state ` iteration cursorh](hoptional pointer to the new }(hjhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jz)}(hj h]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj)hMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjϜubjn)}(h7``int i`` int iteration cursor, for macro-internal use h](jt)}(h ``int i``h]jz)}(hjFh]hint i}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj@ubj)}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj\ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj[hMhjϜubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hUsed by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don't call this directly.h]hUsed by for_each_oldnew_mst_mgr_in_state(), for_each_old_mst_mgr_in_state(), and for_each_new_mst_mgr_in_state(). Don’t call this directly.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hTrue if the current :c:type:`struct drm_private_obj ` is a :c:type:`struct drm_dp_mst_topology_mgr `, false otherwise.h](hTrue if the current }(hjhhhNhNubh)}(h2:c:type:`struct drm_private_obj `h]jz)}(hjȞh]hstruct drm_private_obj}(hjʞhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjƞubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_private_objuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh is a }(hjhhhNhNubh)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jz)}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhMhjubh, false otherwise.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*for_each_oldnew_mst_mgr_in_state (C macro)"c.for_each_oldnew_mst_mgr_in_statehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(h for_each_oldnew_mst_mgr_in_stateh]j)}(h for_each_oldnew_mst_mgr_in_stateh]j)}(h for_each_oldnew_mst_mgr_in_stateh]j)}(hj-h]h for_each_oldnew_mst_mgr_in_state}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj/hhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhjJhMubah}(h]j&ah ](jjeh"]h$]h&]jj)jhuh1jhjJhMhj(hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj(hhhjJhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjcjjcjjjuh1jhhhj{hNhNubh)}(hN``for_each_oldnew_mst_mgr_in_state (__state, mgr, old_state, new_state, __i)``h]jz)}(hjih]hJfor_each_oldnew_mst_mgr_in_state (__state, mgr, old_state, new_state, __i)}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj{hhubjT=)}(h>iterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jS=hjhMhj{hhubj)}(hX**Parameters** ``__state`` :c:type:`struct drm_atomic_state ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state ``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubji)}(hhh](jn)}(hI``__state`` :c:type:`struct drm_atomic_state ` pointer h](jt)}(h ``__state``h]jz)}(hjh]h__state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h<:c:type:`struct drm_atomic_state ` pointerh](h)}(h4:c:type:`struct drm_atomic_state `h]jz)}(hjܟh]hstruct drm_atomic_state}(hjޟhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjڟubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhjҟhMhj֟ubh pointer}(hj֟hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjҟhMhjӟubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjҟhMhjubjn)}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](jt)}(h``mgr``h]jz)}(hjh]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jz)}(hj4h]hstruct drm_dp_mst_topology_mgr}(hj6hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhj*hMhj.ubh iteration cursor}(hj.hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj*hMhjubjn)}(hx``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state h](jt)}(h ``old_state``h]jz)}(hjmh]h old_state}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjgubj)}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jz)}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh# iteration cursor for the old state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hx``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state h](jt)}(h ``new_state``h]jz)}(hjƠh]h new_state}(hjȠhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjĠubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jz)}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjߠubh# iteration cursor for the new state}(hjߠhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjܠubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj۠hMhjubjn)}(h5``__i`` int iteration cursor, for macro-internal use h](jt)}(h``__i``h]jz)}(hjh]h__i}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubj)}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj5ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj4hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjZh]h Description}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM hjubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking both old and new state. This is useful in places where the state delta needs to be considered, for example in atomic check functions.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'for_each_old_mst_mgr_in_state (C macro)c.for_each_old_mst_mgr_in_statehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hfor_each_old_mst_mgr_in_stateh]j)}(hfor_each_old_mst_mgr_in_stateh]j)}(hfor_each_old_mst_mgr_in_stateh]j)}(hjh]hfor_each_old_mst_mgr_in_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjϡjjϡjjjuh1jhhhj{hNhNubh)}(h@``for_each_old_mst_mgr_in_state (__state, mgr, old_state, __i)``h]jz)}(hjաh]hiterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubah}(h]h ]h"]h$]h&]uh1jS=hjhMhj{hhubj)}(hXA**Parameters** ``__state`` :c:type:`struct drm_atomic_state ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubji)}(hhh](jn)}(hI``__state`` :c:type:`struct drm_atomic_state ` pointer h](jt)}(h ``__state``h]jz)}(hj)h]h__state}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj#ubj)}(hhh]h)}(h<:c:type:`struct drm_atomic_state ` pointerh](h)}(h4:c:type:`struct drm_atomic_state `h]jz)}(hjHh]hstruct drm_atomic_state}(hjJhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhj>hMhjBubh pointer}(hjBhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj>hMhj ubjn)}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](jt)}(h``mgr``h]jz)}(hjh]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj{ubj)}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jz)}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhMhjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj ubjn)}(hx``old_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old state h](jt)}(h ``old_state``h]jz)}(hj٢h]h old_state}(hjۢhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjעubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjӢubj)}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the old stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jz)}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh# iteration cursor for the old state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjӢubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj ubjn)}(h5``__i`` int iteration cursor, for macro-internal use h](jt)}(h``__i``h]jz)}(hj2h]h__i}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhj,ubj)}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhMhjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhjGhMhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjmh]h Description}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjkubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the old state. This is useful in disable functions, where we need the old state the hardware is still in.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'for_each_new_mst_mgr_in_state (C macro)c.for_each_new_mst_mgr_in_statehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hfor_each_new_mst_mgr_in_stateh]j)}(hfor_each_new_mst_mgr_in_stateh]j)}(hfor_each_new_mst_mgr_in_stateh]j)}(hjh]hfor_each_new_mst_mgr_in_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM#ubah}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjɣhM#ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjɣhM#hjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhjɣhM#ubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubh)}(h@``for_each_new_mst_mgr_in_state (__state, mgr, new_state, __i)``h]jz)}(hjh]hiterate over all DP MST topology managers in an atomic update h]h)}(h=iterate over all DP MST topology managers in an atomic updateh]h=iterate over all DP MST topology managers in an atomic update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM#hjubah}(h]h ]h"]h$]h&]uh1jS=hjhM#hj{hhubj)}(hXp**Parameters** ``__state`` :c:type:`struct drm_atomic_state ` pointer ``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor ``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state ``__i`` int iteration cursor, for macro-internal use **Description** This iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM'hjubji)}(hhh](jn)}(hI``__state`` :c:type:`struct drm_atomic_state ` pointer h](jt)}(h ``__state``h]jz)}(hj<h]h__state}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM%hj6ubj)}(hhh]h)}(h<:c:type:`struct drm_atomic_state ` pointerh](h)}(h4:c:type:`struct drm_atomic_state `h]jz)}(hj[h]hstruct drm_atomic_state}(hj]hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_atomic_stateuh1hhjQhM%hjUubh pointer}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjQhM%hjRubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jmhjQhM%hj3ubjn)}(h\``mgr`` :c:type:`struct drm_dp_mst_topology_mgr ` iteration cursor h](jt)}(h``mgr``h]jz)}(hjh]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM&hjubj)}(hhh]h)}(hS:c:type:`struct drm_dp_mst_topology_mgr ` iteration cursorh](h)}(hB:c:type:`struct drm_dp_mst_topology_mgr `h]jz)}(hjh]hstruct drm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_mgruh1hhjhM&hjubh iteration cursor}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM&hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM&hj3ubjn)}(hx``new_state`` :c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new state h](jt)}(h ``new_state``h]jz)}(hjh]h new_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM(hjubj)}(hhh]h)}(hi:c:type:`struct drm_dp_mst_topology_state ` iteration cursor for the new stateh](h)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jz)}(hj h]h struct drm_dp_mst_topology_state}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM'hjubh# iteration cursor for the new state}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj(hM'hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM(hj3ubjn)}(h5``__i`` int iteration cursor, for macro-internal use h](jt)}(h``__i``h]jz)}(hjEh]h__i}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM)hj?ubj)}(hhh]h)}(h,int iteration cursor, for macro-internal useh]h,int iteration cursor, for macro-internal use}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZhM)hj[ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhjZhM)hj3ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM+hjubh)}(hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.h]hThis iterates over all DRM DP MST topology managers in an atomic update, tracking only the new state. This is useful in enable functions, where we need the new state the hardware should be in when the atomic commit operation has completed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:320: ./include/drm/display/drm_dp_mst_helper.hhM*hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_mst_get_port_malloc (C function)c.drm_dp_mst_get_port_mallochNtauh1jxhj{hhhNhNubj)}(hhh](j)}(h>void drm_dp_mst_get_port_malloc (struct drm_dp_mst_port *port)h]j)}(h=void drm_dp_mst_get_port_malloc(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjťhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjԥhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjӥhMubj)}(hdrm_dp_mst_get_port_malloch]j)}(hdrm_dp_mst_get_port_malloch]hdrm_dp_mst_get_port_malloc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjӥhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_get_port_mallocasbuh1hhjubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjNhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjӥhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjӥhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjӥhMhjhhubj)}(hhh]h)}(h,Increment the malloc refcount of an MST porth]h,Increment the malloc refcount of an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjӥhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount of **Description** Increments :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used. Because **port** could potentially be freed at any time by the DP MST helpers if :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, including during a call to this function, drivers that which to make use of :c:type:`struct drm_dp_mst_port ` should ensure that they grab at least one main malloc reference to their MST ports in :c:type:`drm_dp_mst_topology_cbs.add_connector `. This callback is called before there is any chance for :c:type:`drm_dp_mst_port.malloc_kref ` to reach 0. See also: drm_dp_mst_put_port_malloc()h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(h|``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount of h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjƦh]hstruct drm_dp_mst_port *port}(hjȦhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjĦubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hZThe :c:type:`struct drm_dp_mst_port ` to increment the malloc refcount ofh](hThe }(hjߦhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjۦhMhjߦubh$ to increment the malloc refcount of}(hjߦhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjۦhMhjܦubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjۦhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hIncrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used.h](h Increments }(hj:hhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jz)}(hjDh]hdrm_dp_mst_port.malloc_kref}(hjFhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj:ubh. When }(hj:hhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jz)}(hjhh]hdrm_dp_mst_port.malloc_kref}(hjjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjahMhj:ubh& reaches 0, the memory allocation for }(hj:hhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubh will be released and }(hj:hhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubh may no longer be used.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahMhjubh)}(hX.Because **port** could potentially be freed at any time by the DP MST helpers if :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, including during a call to this function, drivers that which to make use of :c:type:`struct drm_dp_mst_port ` should ensure that they grab at least one main malloc reference to their MST ports in :c:type:`drm_dp_mst_topology_cbs.add_connector `. This callback is called before there is any chance for :c:type:`drm_dp_mst_port.malloc_kref ` to reach 0.h](hBecause }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhA could potentially be freed at any time by the DP MST helpers if }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jz)}(hjϧh]hdrm_dp_mst_port.malloc_kref}(hjѧhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjͧubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubhX reaches 0, including during a call to this function, drivers that which to make use of }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjhMhjubhW should ensure that they grab at least one main malloc reference to their MST ports in }(hjhhhNhNubh)}(hI:c:type:`drm_dp_mst_topology_cbs.add_connector `h]jz)}(hjh]h%drm_dp_mst_topology_cbs.add_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_cbsuh1hhjhMhjubh9. This callback is called before there is any chance for }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jz)}(hj9h]hdrm_dp_mst_port.malloc_kref}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjhMhjubh to reach 0.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(h&See also: drm_dp_mst_put_port_malloc()h]h&See also: drm_dp_mst_put_port_malloc()}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_mst_put_port_malloc (C function)c.drm_dp_mst_put_port_mallochNtauh1jxhj{hhhNhNubj)}(hhh](j)}(h>void drm_dp_mst_put_port_malloc (struct drm_dp_mst_port *port)h]j)}(h=void drm_dp_mst_put_port_malloc(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_dp_mst_put_port_malloch]j)}(hdrm_dp_mst_put_port_malloch]hdrm_dp_mst_put_port_malloc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hj̨hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȨubj)}(h h]h }(hj٨hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȨubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_put_port_mallocasbuh1hhjȨubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȨubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjȨubj)}(hporth]hport}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȨubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjĨubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h,Decrement the malloc refcount of an MST porth]h,Decrement the malloc refcount of an MST port}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjLhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjgjjgjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount of **Description** Decrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used. See also: drm_dp_mst_get_port_malloc()h](h)}(h**Parameters**h]j%)}(hjqh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjkubji)}(hhh]jn)}(h|``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount of h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hZThe :c:type:`struct drm_dp_mst_port ` to decrement the malloc refcount ofh](hThe }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjhMhjubh$ to decrement the malloc refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjkubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjkubh)}(hDecrements :c:type:`drm_dp_mst_port.malloc_kref `. When :c:type:`drm_dp_mst_port.malloc_kref ` reaches 0, the memory allocation for **port** will be released and **port** may no longer be used.h](h Decrements }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jz)}(hjh]hdrm_dp_mst_port.malloc_kref}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h7:c:type:`drm_dp_mst_port.malloc_kref `h]jz)}(hj2h]hdrm_dp_mst_port.malloc_kref}(hj4hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhj+hMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj%)}(h**port**h]hport}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh will be released and }(hjhhhNhNubj%)}(h**port**h]hport}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj+hMhjkubh)}(h&See also: drm_dp_mst_get_port_malloc()h]h&See also: drm_dp_mst_get_port_malloc()}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_dp_mst_connector_late_register (C function)$c.drm_dp_mst_connector_late_registerhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hfint drm_dp_mst_connector_late_register (struct drm_connector *connector, struct drm_dp_mst_port *port)h]j)}(heint drm_dp_mst_connector_late_register(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h"drm_dp_mst_connector_late_registerh]j)}(h"drm_dp_mst_connector_late_registerh]h"drm_dp_mst_connector_late_register}(hjͪhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjɪubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h?(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jjϪsb$c.drm_dp_mst_connector_late_registerasbuh1hhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{modnameN classnameNjj)}j]j#$c.drm_dp_mst_connector_late_registerasbuh1hhjWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjWubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hLate MST connector registrationh]hLate MST connector registration}(hjܫhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj٫hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hXv**Parameters** ``struct drm_connector *connector`` The MST connector ``struct drm_dp_mst_port *port`` The MST port for this connector **Description** Helper to register the remote aux device for this MST port. Drivers should call this from their mst connector's late_register hook to enable MST aux devices. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(h6``struct drm_connector *connector`` The MST connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hThe MST connectorh]hThe MST connector}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMhj3ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj2hMhjubjn)}(hA``struct drm_dp_mst_port *port`` The MST port for this connector h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjVh]hstruct drm_dp_mst_port *port}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjTubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjPubj)}(hhh]h)}(hThe MST port for this connectorh]hThe MST port for this connector}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhMhjlubah}(h]h ]h"]h$]h&]uh1jhjPubeh}(h]h ]h"]h$]h&]uh1jmhjkhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hHelper to register the remote aux device for this MST port. Drivers should call this from their mst connector's late_register hook to enable MST aux devices.h]hHelper to register the remote aux device for this MST port. Drivers should call this from their mst connector’s late_register hook to enable MST aux devices.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjάhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_dp_mst_connector_early_unregister (C function)'c.drm_dp_mst_connector_early_unregisterhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hjvoid drm_dp_mst_connector_early_unregister (struct drm_connector *connector, struct drm_dp_mst_port *port)h]j)}(hivoid drm_dp_mst_connector_early_unregister(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMubj)}(h%drm_dp_mst_connector_early_unregisterh]j)}(h%drm_dp_mst_connector_early_unregisterh]h%drm_dp_mst_connector_early_unregister}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMubj)}(h?(struct drm_connector *connector, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]j)}jj sb'c.drm_dp_mst_connector_early_unregisterasbuh1hhj6ubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjʭhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjǭubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj̭modnameN classnameNjj)}j]jt'c.drm_dp_mst_connector_early_unregisterasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj2ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMhjhhubj)}(hhh]h)}(h"Early MST connector unregistrationh]h"Early MST connector unregistration}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj*hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjEjjEjjjuh1jhhhj{hNhNubj)}(hXZ**Parameters** ``struct drm_connector *connector`` The MST connector ``struct drm_dp_mst_port *port`` The MST port for this connector **Description** Helper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector's early_unregister hook.h](h)}(h**Parameters**h]j%)}(hjOh]h Parameters}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjMubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjIubji)}(hhh](jn)}(h6``struct drm_connector *connector`` The MST connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjnh]hstruct drm_connector *connector}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhubj)}(hhh]h)}(hThe MST connectorh]hThe MST connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjeubjn)}(hA``struct drm_dp_mst_port *port`` The MST port for this connector h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hThe MST port for this connectorh]hThe MST port for this connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjeubeh}(h]h ]h"]h$]h&]uh1jhhjIubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjIubh)}(hHelper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector's early_unregister hook.h]hHelper to unregister the remote aux device for this MST port, registered by drm_dp_mst_connector_late_register(). Drivers should call this from their mst connector’s early_unregister hook.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjIubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dp_add_payload_part1 (C function)c.drm_dp_add_payload_part1hNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hint drm_dp_add_payload_part1 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h]j)}(hint drm_dp_add_payload_part1(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(hinth]hint}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhj5hM ubj)}(hdrm_dp_add_payload_part1h]j)}(hdrm_dp_add_payload_part1h]hdrm_dp_add_payload_part1}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ](jjeh"]h$]h&]jjuh1jhj#hhhj5hM ubj)}(h}(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjJsbc.drm_dp_add_payload_part1asbuh1hhj`ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj`ubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj\ubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j)}(hjh]hstruct}(hj֯hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjүubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjүubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_add_payload_part1asbuh1hhjүubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjүubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjүubj)}(h mst_stateh]h mst_state}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjүubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj\ubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubh)}(hhh]j)}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjfmodnameN classnameNjj)}j]jc.drm_dp_add_payload_part1asbuh1hhjBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBubj)}(hpayloadh]hpayload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj\ubeh}(h]h ]h"]h$]h&]jjuh1jhj#hhhj5hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj5hM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj5hM hjhhubj)}(hhh]h)}(hExecute payload update part 1h]hExecute payload update part 1}(hjǰhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjİhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj5hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj߰jj߰jjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``struct drm_dp_mst_atomic_payload *payload`` The payload to write **Description** Determines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets. **Return** 0 on success, error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubji)}(hhh](jn)}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubj)}(hhh]h)}(hManager to use.h]hManager to use.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](jt)}(h/``struct drm_dp_mst_topology_state *mst_state``h]jz)}(hjAh]h+struct drm_dp_mst_topology_state *mst_state}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hj;ubj)}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhM hjWubah}(h]h ]h"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]uh1jmhjVhM hjubjn)}(hC``struct drm_dp_mst_atomic_payload *payload`` The payload to write h](jt)}(h-``struct drm_dp_mst_atomic_payload *payload``h]jz)}(hjzh]h)struct drm_dp_mst_atomic_payload *payload}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjtubj)}(hhh]h)}(hThe payload to writeh]hThe payload to write}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(hDetermines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets.h]hDetermines the starting time slot for the given payload, and programs the VCPI for this payload into the DPCD of DPRX. After calling this, the driver should generate ACT and payload packets.}(hj˱hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(h **Return**h]j%)}(hjܱh]hReturn}(hjޱhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjڱubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(h$0 on success, error code on failure.h]h$0 on success, error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_remove_payload_part1 (C function)c.drm_dp_remove_payload_part1hNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hvoid drm_dp_remove_payload_part1 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h]j)}(hvoid drm_dp_remove_payload_part1(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(hvoidh]hvoid}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM" ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj/hM" ubj)}(hdrm_dp_remove_payload_part1h]j)}(hdrm_dp_remove_payload_part1h]hdrm_dp_remove_payload_part1}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj/hM" ubj)}(h}(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]j)}jjDsbc.drm_dp_remove_payload_part1asbuh1hhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j)}(hjh]hstruct}(hjвhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubj)}(h h]h }(hjݲhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_remove_payload_part1asbuh1hhj̲ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj̲ubj)}(h mst_stateh]h mst_state}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j)}(hjh]hstruct}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubh)}(hhh]j)}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj`modnameN classnameNjj)}j]jc.drm_dp_remove_payload_part1asbuh1hhj<ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj<ubj)}(hpayloadh]hpayload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj/hM" ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj/hM" ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj/hM" hjhhubj)}(hhh]h)}(h/Remove an MST payload along the virtual channelh]h/Remove an MST payload along the virtual channel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM" hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj/hM" ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjٳjjٳjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``struct drm_dp_mst_atomic_payload *payload`` The payload to remove **Description** Removes a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM& hjݳubji)}(hhh](jn)}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM# hjubj)}(hhh]h)}(hManager to use.h]hManager to use.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM# hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM# hjubjn)}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](jt)}(h/``struct drm_dp_mst_topology_state *mst_state``h]jz)}(hj;h]h+struct drm_dp_mst_topology_state *mst_state}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM$ hj5ubj)}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhM$ hjQubah}(h]h ]h"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]uh1jmhjPhM$ hjubjn)}(hD``struct drm_dp_mst_atomic_payload *payload`` The payload to remove h](jt)}(h-``struct drm_dp_mst_atomic_payload *payload``h]jz)}(hjth]h)struct drm_dp_mst_atomic_payload *payload}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM% hjnubj)}(hhh]h)}(hThe payload to removeh]hThe payload to remove}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM% hjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjhM% hjubeh}(h]h ]h"]h$]h&]uh1jhhjݳubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM' hjݳubh)}(hRemoves a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.h]hRemoves a payload along the virtual channel if it was successfully allocated. After calling this, the driver should set HW to generate ACT and then switch to new payload allocation state.}(hjŴhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM& hjݳubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_remove_payload_part2 (C function)c.drm_dp_remove_payload_part2hNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hvoid drm_dp_remove_payload_part2 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h]j)}(hvoid drm_dp_remove_payload_part2(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMA ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMA ubj)}(hdrm_dp_remove_payload_part2h]j)}(hdrm_dp_remove_payload_part2h]hdrm_dp_remove_payload_part2}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMA ubj)}(h(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, const struct drm_dp_mst_atomic_payload *old_payload, struct drm_dp_mst_atomic_payload *new_payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_remove_payload_part2asbuh1hhj-ubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj+)}(hj9h]h*}(hj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-ubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjõmodnameN classnameNjj)}j]jkc.drm_dp_remove_payload_part2asbuh1hhjubj)}(h h]h }(hjߵhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(h3const struct drm_dp_mst_atomic_payload *old_payloadh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjNmodnameN classnameNjj)}j]jkc.drm_dp_remove_payload_part2asbuh1hhjubj)}(h h]h }(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjxhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h old_payloadh]h old_payload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(h-struct drm_dp_mst_atomic_payload *new_payloadh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jkc.drm_dp_remove_payload_part2asbuh1hhjubj)}(h h]h }(hjڶhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h new_payloadh]h new_payload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMA ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMA ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMA hjhhubj)}(hhh]h)}(hRemove an MST payload locallyh]hRemove an MST payload locally}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMA hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMA ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj7jj7jjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state ``const struct drm_dp_mst_atomic_payload *old_payload`` The payload with its old state ``struct drm_dp_mst_atomic_payload *new_payload`` The payload with its latest state **Description** Updates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It's independent to the result of payload allocation/deallocation at branch devices along the virtual channel.h](h)}(h**Parameters**h]j%)}(hjAh]h Parameters}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chME hj;ubji)}(hhh](jn)}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hj`h]h#struct drm_dp_mst_topology_mgr *mgr}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMB hjZubj)}(hhh]h)}(hManager to use.h]hManager to use.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhMB hjvubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jmhjuhMB hjWubjn)}(hE``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state h](jt)}(h/``struct drm_dp_mst_topology_state *mst_state``h]jz)}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMC hjubj)}(hhh]h)}(hThe MST atomic stateh]hThe MST atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMC hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMC hjWubjn)}(hW``const struct drm_dp_mst_atomic_payload *old_payload`` The payload with its old state h](jt)}(h7``const struct drm_dp_mst_atomic_payload *old_payload``h]jz)}(hjҷh]h3const struct drm_dp_mst_atomic_payload *old_payload}(hjԷhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjзubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMD hj̷ubj)}(hhh]h)}(hThe payload with its old stateh]hThe payload with its old state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMD hjubah}(h]h ]h"]h$]h&]uh1jhj̷ubeh}(h]h ]h"]h$]h&]uh1jmhjhMD hjWubjn)}(hT``struct drm_dp_mst_atomic_payload *new_payload`` The payload with its latest state h](jt)}(h1``struct drm_dp_mst_atomic_payload *new_payload``h]jz)}(hj h]h-struct drm_dp_mst_atomic_payload *new_payload}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chME hjubj)}(hhh]h)}(h!The payload with its latest stateh]h!The payload with its latest state}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hME hj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hME hjWubeh}(h]h ]h"]h$]h&]uh1jhhj;ubh)}(h**Description**h]j%)}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjDubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMG hj;ubh)}(hXYUpdates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It's independent to the result of payload allocation/deallocation at branch devices along the virtual channel.h]hX[Updates the starting time slots of all other payloads which would have been shifted towards the start of the payload ID table as a result of removing a payload. Driver should call this function whenever it removes a payload in its HW. It’s independent to the result of payload allocation/deallocation at branch devices along the virtual channel.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMF hj;ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dp_add_payload_part2 (C function)c.drm_dp_add_payload_part2hNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hmint drm_dp_add_payload_part2 (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h]j)}(hlint drm_dp_add_payload_part2(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMd ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMd ubj)}(hdrm_dp_add_payload_part2h]j)}(hdrm_dp_add_payload_part2h]hdrm_dp_add_payload_part2}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMd ubj)}(hP(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_atomic_payload *payload)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjȸhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĸubj)}(h h]h }(hjոhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĸubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_add_payload_part2asbuh1hhjĸubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĸubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjĸubj)}(hmgrh]hmgr}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĸubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h)struct drm_dp_mst_atomic_payload *payloadh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubh)}(hhh]j)}(hdrm_dp_mst_atomic_payloadh]hdrm_dp_mst_atomic_payload}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]jc.drm_dp_add_payload_part2asbuh1hhj6ubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6ubj)}(hpayloadh]hpayload}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMd ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMd ubah}(h]j~ah ](jjeh"]h$]h&]jj)jhuh1jhjhMd hjhhubj)}(hhh]h)}(hExecute payload update part 2h]hExecute payload update part 2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMd hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMd ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjӹjjӹjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. ``struct drm_dp_mst_atomic_payload *payload`` The payload to update **Description** If **payload** was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjݹh]h Parameters}(hj߹hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj۹ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMh hj׹ubji)}(hhh](jn)}(h8``struct drm_dp_mst_topology_mgr *mgr`` Manager to use. h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMe hjubj)}(hhh]h)}(hManager to use.h]hManager to use.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMe hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMe hjubjn)}(hD``struct drm_dp_mst_atomic_payload *payload`` The payload to update h](jt)}(h-``struct drm_dp_mst_atomic_payload *payload``h]jz)}(hj5h]h)struct drm_dp_mst_atomic_payload *payload}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMf hj/ubj)}(hhh]h)}(hThe payload to updateh]hThe payload to update}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMf hjKubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhjJhMf hjubeh}(h]h ]h"]h$]h&]uh1jhhj׹ubh)}(h**Description**h]j%)}(hjph]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMh hj׹ubh)}(hIf **payload** was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload.h](hIf }(hjhhhNhNubj%)}(h **payload**h]hpayload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh was successfully assigned a starting time slot by drm_dp_add_payload_part1(), this function will send the sideband messages to finish allocating this payload.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMg hj׹ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMj hj׹ubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMk hj׹ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dp_get_vc_payload_bw (C function)c.drm_dp_get_vc_payload_bwhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hHfixed20_12 drm_dp_get_vc_payload_bw (int link_rate, int link_lane_count)h]j)}(hGfixed20_12 drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count)h](h)}(hhh]j)}(h fixed20_12h]h fixed20_12}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_dp_get_vc_payload_bwsbc.drm_dp_get_vc_payload_bwasbuh1hhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_dp_get_vc_payload_bwh]j)}(hjh]hdrm_dp_get_vc_payload_bw}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h$(int link_rate, int link_lane_count)h](j)}(h int link_rateh](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h link_rateh]h link_rate}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj8ubj)}(hint link_lane_counth](j)}(hinth]hint}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(hlink_lane_counth]hlink_lane_count}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj8ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h%get the VC payload BW for an MTP linkh]h%get the VC payload BW for an MTP link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjӻjjӻjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``int link_rate`` link rate in 10kbits/s units ``int link_lane_count`` lane count **Description** Calculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP. Returns the BW / timeslot value in 20.12 fixed point format.h](h)}(h**Parameters**h]j%)}(hjݻh]h Parameters}(hj߻hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjۻubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj׻ubji)}(hhh](jn)}(h/``int link_rate`` link rate in 10kbits/s units h](jt)}(h``int link_rate``h]jz)}(hjh]h int link_rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubj)}(hhh]h)}(hlink rate in 10kbits/s unitsh]hlink rate in 10kbits/s units}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubjn)}(h#``int link_lane_count`` lane count h](jt)}(h``int link_lane_count``h]jz)}(hj5h]hint link_lane_count}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj/ubj)}(hhh]h)}(h lane counth]h lane count}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMhjKubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhjJhMhjubeh}(h]h ]h"]h$]h&]uh1jhhj׻ubh)}(h**Description**h]j%)}(hjph]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj׻ubh)}(hXCalculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP.h]hXCalculate the total bandwidth of a MultiStream Transport link. The returned value is in units of PBNs/(timeslots/1 MTP). This value can be used to convert the number of PBNs required for a given stream to the number of timeslots this stream requires in each MTP.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj׻ubh)}(hhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQmodnameN classnameNjj)}j]jc.drm_dp_read_mst_capasbuh1hhj-ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj+)}(hj9h]h*}(hj{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-ubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_read_mst_capasbuh1hhjubj)}(h h]h }(hjݽhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hdpcdh]hdpcd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj Th]h[}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubh)}(hhh]j)}(hDP_RECEIVER_CAP_SIZEh]hDP_RECEIVER_CAP_SIZE}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jc.drm_dp_read_mst_capasbuh1hhjubj+)}(hj8Th]h]}(hj'hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjѼhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjѼhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjѼhMhjhhubj)}(hhh]h)}(h#Read the sink's MST mode capabilityh]h%Read the sink’s MST mode capability}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjѼhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjhjjhjjjuh1jhhhj{hNhNubj)}(h**Parameters** ``struct drm_dp_aux *aux`` The DP AUX channel to use ``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the DPCD capabilities for this sink **Return** enum drm_dp_mst_mode to indicate MST mode capabilityh](h)}(h**Parameters**h]j%)}(hjrh]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubji)}(hhh](jn)}(h5``struct drm_dp_aux *aux`` The DP AUX channel to use h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hjh]hstruct drm_dp_aux *aux}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hThe DP AUX channel to useh]hThe DP AUX channel to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h]``const u8 dpcd[DP_RECEIVER_CAP_SIZE]`` A cached copy of the DPCD capabilities for this sink h](jt)}(h'``const u8 dpcd[DP_RECEIVER_CAP_SIZE]``h]jz)}(hjʾh]h#const u8 dpcd[DP_RECEIVER_CAP_SIZE]}(hj̾hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjȾubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjľubj)}(hhh]h)}(h4A cached copy of the DPCD capabilities for this sinkh]h4A cached copy of the DPCD capabilities for this sink}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj߾hMhjubah}(h]h ]h"]h$]h&]uh1jhjľubeh}(h]h ]h"]h$]h&]uh1jmhj߾hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjlubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubh)}(h4enum drm_dp_mst_mode to indicate MST mode capabilityh]h4enum drm_dp_mst_mode to indicate MST mode capability}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_mst_topology_mgr_set_mst (C function)!c.drm_dp_mst_topology_mgr_set_msthNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hYint drm_dp_mst_topology_mgr_set_mst (struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h]j)}(hXint drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h](j)}(hinth]hint}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM5ubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhjXhM5ubj)}(hdrm_dp_mst_topology_mgr_set_msth]j)}(hdrm_dp_mst_topology_mgr_set_msth]hdrm_dp_mst_topology_mgr_set_mst}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ](jjeh"]h$]h&]jjuh1jhjFhhhjXhM5ubj)}(h5(struct drm_dp_mst_topology_mgr *mgr, bool mst_state)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjmsb!c.drm_dp_mst_topology_mgr_set_mstasbuh1hhjubj)}(h h]h }(hjſhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjӿhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hbool mst_stateh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjFhhhjXhM5ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjBhhhjXhM5ubah}(h]j=ah ](jjeh"]h$]h&]jj)jhuh1jhjXhM5hj?hhubj)}(hhh]h)}(h(Set the MST state for a topology managerh]h(Set the MST state for a topology manager}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM5hj;hhubah}(h]h ]h"]h$]h&]uh1jhj?hhhjXhM5ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjVjjVjjjuh1jhhhj{hNhNubj)}(hXH**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to set state for ``bool mst_state`` true to enable MST on this connector - false to disable. **Description** This is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.h](h)}(h**Parameters**h]j%)}(hj`h]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9hjZubji)}(hhh](jn)}(hA``struct drm_dp_mst_topology_mgr *mgr`` manager to set state for h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM6hjyubj)}(hhh]h)}(hmanager to set state forh]hmanager to set state for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM6hjubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjhM6hjvubjn)}(hL``bool mst_state`` true to enable MST on this connector - false to disable. h](jt)}(h``bool mst_state``h]jz)}(hjh]hbool mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM7hjubj)}(hhh]h)}(h8true to enable MST on this connector - false to disable.h]h8true to enable MST on this connector - false to disable.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM7hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM7hjvubeh}(h]h ]h"]h$]h&]uh1jhhjZubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9hjZubh)}(hThis is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.h]hThis is called by the driver when it detects an MST capable device plugged into a DP MST capable port, or when a DP MST capable device is unplugged.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM8hjZubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_mst_topology_queue_probe (C function)!c.drm_dp_mst_topology_queue_probehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hJvoid drm_dp_mst_topology_queue_probe (struct drm_dp_mst_topology_mgr *mgr)h]j)}(hIvoid drm_dp_mst_topology_queue_probe(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhjFhMubj)}(hdrm_dp_mst_topology_queue_probeh]j)}(hdrm_dp_mst_topology_queue_probeh]hdrm_dp_mst_topology_queue_probe}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ](jjeh"]h$]h&]jjuh1jhj4hhhjFhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj[sb!c.drm_dp_mst_topology_queue_probeasbuh1hhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjqubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubah}(h]h ]h"]h$]h&]jjuh1jhj4hhhjFhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj0hhhjFhMubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1jhjFhMhj-hhubj)}(hhh]h)}(hQueue a topology probeh]hQueue a topology probe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj-hhhjFhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX[**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to probe **Description** Queue a work to probe the MST topology. Driver's should call this only to sync the topology's HW->SW state after the MST link's parameters have changed in a way the state could've become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(h9``struct drm_dp_mst_topology_mgr *mgr`` manager to probe h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hj9h]h#struct drm_dp_mst_topology_mgr *mgr}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj7ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj3ubj)}(hhh]h)}(hmanager to probeh]hmanager to probe}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhMhjOubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jmhjNhMhj0ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjth]h Description}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXQueue a work to probe the MST topology. Driver's should call this only to sync the topology's HW->SW state after the MST link's parameters have changed in a way the state could've become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.h]hXQueue a work to probe the MST topology. Driver’s should call this only to sync the topology’s HW->SW state after the MST link’s parameters have changed in a way the state could’ve become out-of-sync. This is the case for instance when the link rate between the source and first downstream branch device has switched between UHBR and non-UHBR rates. Except of those cases - for instance when a sink gets plugged/unplugged to a port - the SW state will get updated automatically via MST UP message notifications.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_mst_topology_mgr_suspend (C function)!c.drm_dp_mst_topology_mgr_suspendhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hJvoid drm_dp_mst_topology_mgr_suspend (struct drm_dp_mst_topology_mgr *mgr)h]j)}(hIvoid drm_dp_mst_topology_mgr_suspend(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_dp_mst_topology_mgr_suspendh]j)}(hdrm_dp_mst_topology_mgr_suspendh]hdrm_dp_mst_topology_mgr_suspend}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb!c.drm_dp_mst_topology_mgr_suspendasbuh1hhjubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjBhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hsuspend the MST managerh]hsuspend the MST manager}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjvhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(h**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to suspend **Description** This function tells the MST device that we can't handle UP messages anymore. This should stop it from sending any since we are suspended.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(h;``struct drm_dp_mst_topology_mgr *mgr`` manager to suspend h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hmanager to suspendh]hmanager to suspend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis function tells the MST device that we can't handle UP messages anymore. This should stop it from sending any since we are suspended.h]hThis function tells the MST device that we can’t handle UP messages anymore. This should stop it from sending any since we are suspended.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_dp_mst_topology_mgr_resume (C function) c.drm_dp_mst_topology_mgr_resumehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hSint drm_dp_mst_topology_mgr_resume (struct drm_dp_mst_topology_mgr *mgr, bool sync)h]j)}(hRint drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr, bool sync)h](j)}(hinth]hint}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhjHhMubj)}(hdrm_dp_mst_topology_mgr_resumeh]j)}(hdrm_dp_mst_topology_mgr_resumeh]hdrm_dp_mst_topology_mgr_resume}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ](jjeh"]h$]h&]jjuh1jhj6hhhjHhMubj)}(h0(struct drm_dp_mst_topology_mgr *mgr, bool sync)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj]sb c.drm_dp_mst_topology_mgr_resumeasbuh1hhjsubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjsubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjoubj)}(h bool synch](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsynch]hsync}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjoubeh}(h]h ]h"]h$]h&]jjuh1jhj6hhhjHhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj2hhhjHhMubah}(h]j-ah ](jjeh"]h$]h&]jj)jhuh1jhjHhMhj/hhubj)}(hhh]h)}(hresume the MST managerh]hresume the MST manager}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj+hhubah}(h]h ]h"]h$]h&]uh1jhj/hhhjHhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjFjjFjjjuh1jhhhj{hNhNubj)}(hXT**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to resume ``bool sync`` whether or not to perform topology reprobing synchronously **Description** This will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return. If the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked. During system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with **sync** set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with **sync** set to false in order to avoid deadlocking. **Return** -1 if the MST topology was removed while we were suspended, 0 otherwise.h](h)}(h**Parameters**h]j%)}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubji)}(hhh](jn)}(h:``struct drm_dp_mst_topology_mgr *mgr`` manager to resume h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjoh]h#struct drm_dp_mst_topology_mgr *mgr}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjiubj)}(hhh]h)}(hmanager to resumeh]hmanager to resume}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjfubjn)}(hI``bool sync`` whether or not to perform topology reprobing synchronously h](jt)}(h ``bool sync``h]jz)}(hjh]h bool sync}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h:whether or not to perform topology reprobing synchronouslyh]h:whether or not to perform topology reprobing synchronously}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjfubeh}(h]h ]h"]h$]h&]uh1jhhjJubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubh)}(hwThis will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return.h]hwThis will fetch DPCD and see if the device is still there, if it is, it will rewrite the MSTM control bits, and return.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubh)}(hkIf the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked.h]hkIf the device fails this returns -1, and the driver should do a full MST reprobe, in case we were undocked.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubh)}(hXnDuring system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with **sync** set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with **sync** set to false in order to avoid deadlocking.h](hDuring system resume (where it is assumed that the driver will be calling drm_atomic_helper_resume()) this function should be called beforehand with }(hjhhhNhNubj%)}(h**sync**h]hsync}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh set to true. In contexts like runtime resume where the driver is not expected to be calling drm_atomic_helper_resume(), this function should be called with }(hjhhhNhNubj%)}(h**sync**h]hsync}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh, set to false in order to avoid deadlocking.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubh)}(h **Return**h]j%)}(hjLh]hReturn}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubh)}(hH-1 if the MST topology was removed while we were suspended, 0 otherwise.h]hH-1 if the MST topology was removed while we were suspended, 0 otherwise.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_mst_hpd_irq_handle_event (C function)!c.drm_dp_mst_hpd_irq_handle_eventhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hpint drm_dp_mst_hpd_irq_handle_event (struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h]j)}(hoint drm_dp_mst_hpd_irq_handle_event(struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMtubj)}(hdrm_dp_mst_hpd_irq_handle_eventh]j)}(hdrm_dp_mst_hpd_irq_handle_eventh]hdrm_dp_mst_hpd_irq_handle_event}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMtubj)}(hL(struct drm_dp_mst_topology_mgr *mgr, const u8 *esi, u8 *ack, bool *handled)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h const u8 *esih](j)}(hjUh]hconst}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubh)}(hhh]j)}(hu8h]hu8}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj`modnameN classnameNjj)}j]j!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhj<ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj<ubj)}(hesih]hesi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu8 *ackh](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.drm_dp_mst_hpd_irq_handle_eventasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hackh]hack}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool *handledh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hhandledh]hhandled}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMtubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMtubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMthjhhubj)}(hhh]h)}(h MST hotplug IRQ handle MST eventh]h MST hotplug IRQ handle MST event}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMthjThhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMtubeh}(h]h ](jfunctioneh"]h$]h&]jjjjojjojjjuh1jhhhj{hNhNubj)}(hXn**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. ``const u8 *esi`` 4 bytes from SINK_COUNT_ESI ``u8 *ack`` 4 bytes used to ack events starting from SINK_COUNT_ESI ``bool *handled`` whether the hpd interrupt was consumed or not **Description** This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later. Note that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the 'handled' is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed. See also: drm_dp_mst_hpd_irq_send_new_request()h](h)}(h**Parameters**h]j%)}(hjyh]h Parameters}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhjsubji)}(hhh](jn)}(hC``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMuhjubj)}(hhh]h)}(hmanager to notify irq for.h]hmanager to notify irq for.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMuhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMuhjubjn)}(h.``const u8 *esi`` 4 bytes from SINK_COUNT_ESI h](jt)}(h``const u8 *esi``h]jz)}(hjh]h const u8 *esi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMvhjubj)}(hhh]h)}(h4 bytes from SINK_COUNT_ESIh]h4 bytes from SINK_COUNT_ESI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMvhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMvhjubjn)}(hD``u8 *ack`` 4 bytes used to ack events starting from SINK_COUNT_ESI h](jt)}(h ``u8 *ack``h]jz)}(hj h]hu8 *ack}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMwhjubj)}(hhh]h)}(h74 bytes used to ack events starting from SINK_COUNT_ESIh]h74 bytes used to ack events starting from SINK_COUNT_ESI}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMwhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMwhjubjn)}(h@``bool *handled`` whether the hpd interrupt was consumed or not h](jt)}(h``bool *handled``h]jz)}(hjCh]h bool *handled}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMxhj=ubj)}(hhh]h)}(h-whether the hpd interrupt was consumed or noth]h-whether the hpd interrupt was consumed or not}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMxhjYubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhjXhMxhjubeh}(h]h ]h"]h$]h&]uh1jhhjsubh)}(h**Description**h]j%)}(hj~h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMzhjsubh)}(hX>This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later.h]hX>This should be called from the driver when it detects a HPD IRQ, along with the value of the DEVICE_SERVICE_IRQ_VECTOR_ESI0. The topology manager will process the sideband messages received as indicated in the DEVICE_SERVICE_IRQ_VECTOR_ESI0 and set the corresponding flags that Driver has to ack the DP receiver later.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMyhjsubh)}(hNote that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the 'handled' is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed.h]hNote that driver shall also call drm_dp_mst_hpd_irq_send_new_request() if the ‘handled’ is set after calling this function, to try to kick off a new request in the queue if the previous message transaction is completed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjsubh)}(h/See also: drm_dp_mst_hpd_irq_send_new_request()h]h/See also: drm_dp_mst_hpd_irq_send_new_request()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjsubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0drm_dp_mst_hpd_irq_send_new_request (C function)%c.drm_dp_mst_hpd_irq_send_new_requesthNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hNvoid drm_dp_mst_hpd_irq_send_new_request (struct drm_dp_mst_topology_mgr *mgr)h]j)}(hMvoid drm_dp_mst_hpd_irq_send_new_request(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h#drm_dp_mst_hpd_irq_send_new_requesth]j)}(h#drm_dp_mst_hpd_irq_send_new_requesth]h#drm_dp_mst_hpd_irq_send_new_request}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj>modnameN classnameNjj)}j]j)}jjsb%c.drm_dp_mst_hpd_irq_send_new_requestasbuh1hhjubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h$MST hotplug IRQ kick off new requesth]h$MST hotplug IRQ kick off new request}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hXY**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. **Description** This should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(hC``struct drm_dp_mst_topology_mgr *mgr`` manager to notify irq for. h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hmanager to notify irq for.h]hmanager to notify irq for.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.h]hThis should be called from the driver when mst irq event is handled and acked. Note that new down request should only be sent when previous message transaction is completed. Source is not supposed to generate interleaved message transactions.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_dp_mst_detect_port (C function)c.drm_dp_mst_detect_porthNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hint drm_dp_mst_detect_port (struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j)}(hint drm_dp_mst_detect_port(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhjphMubj)}(hdrm_dp_mst_detect_porth]j)}(hdrm_dp_mst_detect_porth]hdrm_dp_mst_detect_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj^hhhjphMubj)}(h(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_detect_portasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj1modnameN classnameNjj)}j]jc.drm_dp_mst_detect_portasbuh1hhj ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj[hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hctxh]hctx}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_mst_detect_portasbuh1hhj}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj}ubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_mst_detect_portasbuh1hhjubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj;hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj^hhhjphMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjZhhhjphMubah}(h]jUah ](jjeh"]h$]h&]jj)jhuh1jhjphMhjWhhubj)}(hhh]h)}(h%get connection status for an MST porth]h%get connection status for an MST port}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjohhubah}(h]h ]h"]h$]h&]uh1jhjWhhhjphMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hXm**Parameters** ``struct drm_connector *connector`` DRM connector for this port ``struct drm_modeset_acquire_ctx *ctx`` The acquisition context to use for grabbing locks ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` pointer to a port **Description** This returns the current connection state for a port.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(h@``struct drm_connector *connector`` DRM connector for this port h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hDRM connector for this porth]hDRM connector for this port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hZ``struct drm_modeset_acquire_ctx *ctx`` The acquisition context to use for grabbing locks h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h1The acquisition context to use for grabbing locksh]h1The acquisition context to use for grabbing locks}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hj%h]h#struct drm_dp_mst_topology_mgr *mgr}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hmanager for this porth]hmanager for this port}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj:hMhj;ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj:hMhjubjn)}(h3``struct drm_dp_mst_port *port`` pointer to a port h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hj^h]hstruct drm_dp_mst_port *port}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjXubj)}(hhh]h)}(hpointer to a porth]hpointer to a port}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshMhjtubah}(h]h ]h"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]uh1jmhjshMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h5This returns the current connection state for a port.h]h5This returns the current connection state for a port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_dp_mst_edid_read (C function)c.drm_dp_mst_edid_readhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hconst struct drm_edid * drm_dp_mst_edid_read (struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j)}(hconst struct drm_edid *drm_dp_mst_edid_read(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_dp_mst_edid_readsbc.drm_dp_mst_edid_readasbuh1hhjhhhjhMubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjGhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrm_dp_mst_edid_readh]j)}(hj6h]hdrm_dp_mst_edid_read}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hd(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j4c.drm_dp_mst_edid_readasbuh1hhjoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjoubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j4c.drm_dp_mst_edid_readasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjsmodnameN classnameNjj)}j]j4c.drm_dp_mst_edid_readasbuh1hhjOubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjOubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hget EDID for an MST porth]hget EDID for an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hXz**Parameters** ``struct drm_connector *connector`` toplevel connector to get EDID for ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` unverified pointer to a port. **Description** This returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(hG``struct drm_connector *connector`` toplevel connector to get EDID for h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h"toplevel connector to get EDID forh]h"toplevel connector to get EDID for}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hMhj+ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj*hMhj ubjn)}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjNh]h#struct drm_dp_mst_topology_mgr *mgr}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubj)}(hhh]h)}(hmanager for this porth]hmanager for this port}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjdubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjchMhj ubjn)}(h?``struct drm_dp_mst_port *port`` unverified pointer to a port. h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hunverified pointer to a port.h]hunverified pointer to a port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h]hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn’t require a reference.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dp_mst_get_edid (C function)c.drm_dp_mst_get_edidhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hstruct edid * drm_dp_mst_get_edid (struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j)}(hstruct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(hedidh]hedid}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj(modnameN classnameNjj)}j]j)}jdrm_dp_mst_get_edidsbc.drm_dp_mst_get_edidasbuh1hhjhhhjhMubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjUhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrm_dp_mst_get_edidh]j)}(hjDh]hdrm_dp_mst_get_edid}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hd(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jBc.drm_dp_mst_get_edidasbuh1hhj}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj}ubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjyubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jBc.drm_dp_mst_get_edidasbuh1hhjubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj;hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjyubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jBc.drm_dp_mst_get_edidasbuh1hhj]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj]ubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjyubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hget EDID for an MST porth]hget EDID for an MST port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` toplevel connector to get EDID for ``struct drm_dp_mst_topology_mgr *mgr`` manager for this port ``struct drm_dp_mst_port *port`` unverified pointer to a port. **Description** This function is deprecated; please use drm_dp_mst_edid_read() instead. This returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubji)}(hhh](jn)}(hG``struct drm_connector *connector`` toplevel connector to get EDID for h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj#h]hstruct drm_connector *connector}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h"toplevel connector to get EDID forh]h"toplevel connector to get EDID for}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj8hMhjubjn)}(h>``struct drm_dp_mst_topology_mgr *mgr`` manager for this port h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hj\h]h#struct drm_dp_mst_topology_mgr *mgr}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjVubj)}(hhh]h)}(hmanager for this porth]hmanager for this port}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjrubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjqhMhjubjn)}(h?``struct drm_dp_mst_port *port`` unverified pointer to a port. h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hunverified pointer to a port.h]hunverified pointer to a port.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM!hjubh)}(hGThis function is deprecated; please use drm_dp_mst_edid_read() instead.h]hGThis function is deprecated; please use drm_dp_mst_edid_read() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjubh)}(hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn't require a reference.h]hThis returns an EDID for the port connected to a connector, It validates the pointer still exists so the caller doesn’t require a reference.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM"hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_dp_atomic_find_time_slots (C function)c.drm_dp_atomic_find_time_slotshNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hint drm_dp_atomic_find_time_slots (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h]j)}(hint drm_dp_atomic_find_time_slots(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h](j)}(hinth]hint}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj2hM9ubj)}(hdrm_dp_atomic_find_time_slotsh]j)}(hdrm_dp_atomic_find_time_slotsh]hdrm_dp_atomic_find_time_slots}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj2hM9ubj)}(hl(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, int pbn)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjGsbc.drm_dp_atomic_find_time_slotsasbuh1hhj]ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj]ubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjYubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_atomic_find_time_slotsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjYubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjcmodnameN classnameNjj)}j]jc.drm_dp_atomic_find_time_slotsasbuh1hhj?ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj?ubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjYubj)}(hint pbnh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hpbnh]hpbn}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjYubeh}(h]h ]h"]h$]h&]jjuh1jhj hhhj2hM9ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj2hM9ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj2hM9hjhhubj)}(hhh]h)}(h$Find and add time slots to the stateh]h$Find and add time slots to the state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM9hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj2hM9ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port ``struct drm_dp_mst_port *port`` port to find time slots for ``int pbn`` bandwidth required for the mode in PBN **Description** Allocates time slots to **port**, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes. Allocations set by this function are not checked against the bandwidth restraints of **mgr** until the driver calls drm_dp_mst_atomic_check(). Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase. See also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check() **Return** Total slots in the atomic state assigned for this port, or a negative error code if the port no longer existsh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM=hjubji)}(hhh](jn)}(h7``struct drm_atomic_state *state`` global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj:h]hstruct drm_atomic_state *state}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM:hj4ubj)}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhM:hjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhjOhM:hj1ubjn)}(hJ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjsh]h#struct drm_dp_mst_topology_mgr *mgr}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM;hjmubj)}(hhh]h)}(h!MST topology manager for the porth]h!MST topology manager for the port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM;hjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjhM;hj1ubjn)}(h=``struct drm_dp_mst_port *port`` port to find time slots for h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM<hjubj)}(hhh]h)}(hport to find time slots forh]hport to find time slots for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM<hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM<hj1ubjn)}(h3``int pbn`` bandwidth required for the mode in PBN h](jt)}(h ``int pbn``h]jz)}(hjh]hint pbn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM=hjubj)}(hhh]h)}(h&bandwidth required for the mode in PBNh]h&bandwidth required for the mode in PBN}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM=hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM=hj1ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM?hjubh)}(hXAllocates time slots to **port**, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their :c:type:`drm_encoder_helper_funcs.atomic_check\(\) ` callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes.h](hAllocates time slots to }(hj6hhhNhNubj%)}(h**port**h]hport}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubh, replacing any previous time slot allocations it may have had. Any atomic drivers which support MST must call this function in their }(hj6hhhNhNubh)}(hN:c:type:`drm_encoder_helper_funcs.atomic_check\(\) `h]jz)}(hjRh]h'drm_encoder_helper_funcs.atomic_check()}(hjThhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM>hj6ubh callback unconditionally to change the current time slot allocation for the new state, and ensure the MST atomic state is added whenever the state of payloads in the topology changes.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjohM>hjubh)}(hAllocations set by this function are not checked against the bandwidth restraints of **mgr** until the driver calls drm_dp_mst_atomic_check().h](hUAllocations set by this function are not checked against the bandwidth restraints of }(hjzhhhNhNubj%)}(h**mgr**h]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubh2 until the driver calls drm_dp_mst_atomic_check().}(hjzhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhjubh)}(hAdditionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase.h](hHAdditionally, it is OK to call this function multiple times on the same }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh~ as needed. It is not OK however, to call this function and drm_dp_atomic_release_time_slots() in the same atomic check phase.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMGhjubh)}(hFSee also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check()h]hFSee also: drm_dp_atomic_release_time_slots() drm_dp_mst_atomic_check()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMKhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMOhjubh)}(hmTotal slots in the atomic state assigned for this port, or a negative error code if the port no longer existsh]hmTotal slots in the atomic state assigned for this port, or a negative error code if the port no longer exists}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMPhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_atomic_release_time_slots (C function)"c.drm_dp_atomic_release_time_slotshNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hint drm_dp_atomic_release_time_slots (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h]j)}(hint drm_dp_atomic_release_time_slots(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMubj)}(h drm_dp_atomic_release_time_slotsh]j)}(h drm_dp_atomic_release_time_slotsh]h drm_dp_atomic_release_time_slots}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMubj)}(hc(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjomodnameN classnameNjj)}j]j)}jj5sb"c.drm_dp_atomic_release_time_slotsasbuh1hhjKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjKubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjGubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j"c.drm_dp_atomic_release_time_slotsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjGubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQmodnameN classnameNjj)}j]j"c.drm_dp_atomic_release_time_slotsasbuh1hhj-ubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj+)}(hj9h]h*}(hj{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-ubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjGubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMhjhhubj)}(hhh]h)}(hRelease allocated time slotsh]hRelease allocated time slots}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port ``struct drm_dp_mst_port *port`` The port to release the time slots from **Description** Releases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their :c:type:`drm_connector_helper_funcs.atomic_check\(\) ` callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology. It is OK to call this even if **port** has been removed from the system. Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same **port** in a single atomic check phase. See also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check() **Return** 0 on success, negative error code otherwiseh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(h7``struct drm_atomic_state *state`` global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hJ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager for the port h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hj,h]h#struct drm_dp_mst_topology_mgr *mgr}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj&ubj)}(hhh]h)}(h!MST topology manager for the porth]h!MST topology manager for the port}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhMhjBubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jmhjAhMhjubjn)}(hI``struct drm_dp_mst_port *port`` The port to release the time slots from h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjeh]hstruct drm_dp_mst_port *port}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj_ubj)}(hhh]h)}(h'The port to release the time slots fromh]h'The port to release the time slots from}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhMhj{ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhjzhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hXReleases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their :c:type:`drm_connector_helper_funcs.atomic_check\(\) ` callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology.h](hReleases any time slots that have been allocated to a port in the atomic state. Any atomic drivers which support MST must call this function unconditionally in their }(hjhhhNhNubh)}(hR:c:type:`drm_connector_helper_funcs.atomic_check\(\) `h]jz)}(hjh]h)drm_connector_helper_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback. This helper will check whether time slots would be released by the new state and respond accordingly, along with ensuring the MST state is always added to the atomic state whenever a new state would modify the state of payloads on the topology.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hX)It is OK to call this even if **port** has been removed from the system. Additionally, it is OK to call this function multiple times on the same **port** as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same **port** in a single atomic check phase.h](hIt is OK to call this even if }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhk has been removed from the system. Additionally, it is OK to call this function multiple times on the same }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhh as needed. It is not OK however, to call this function and drm_dp_atomic_find_time_slots() on the same }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh in a single atomic check phase.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hCSee also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check()h]hCSee also: drm_dp_atomic_find_time_slots() drm_dp_mst_atomic_check()}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j%)}(hj>h]hReturn}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h+0 on success, negative error code otherwiseh]h+0 on success, negative error code otherwise}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_dp_mst_atomic_setup_commit (C function) c.drm_dp_mst_atomic_setup_commithNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hCint drm_dp_mst_atomic_setup_commit (struct drm_atomic_state *state)h]j)}(hBint drm_dp_mst_atomic_setup_commit(struct drm_atomic_state *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_dp_mst_atomic_setup_commith]j)}(hdrm_dp_mst_atomic_setup_commith]hdrm_dp_mst_atomic_setup_commit}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb c.drm_dp_mst_atomic_setup_commitasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj{hhhjhMubah}(h]jvah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjxhhubj)}(hhh]h)}(h!setup_commit hook for MST helpersh]h!setup_commit hook for MST helpers}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj@hhubah}(h]h ]h"]h$]h&]uh1jhjxhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj[jj[jjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` global atomic state **Description** This function saves all of the :c:type:`drm_crtc_commit` structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook. **Return** 0 if all CRTC commits were retrieved successfully, negative error code otherwiseh](h)}(h**Parameters**h]j%)}(hjeh]h Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjcubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj_ubji)}(hhh]jn)}(h7``struct drm_atomic_state *state`` global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj~ubj)}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj{ubah}(h]h ]h"]h$]h&]uh1jhhj_ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj_ubh)}(hXThis function saves all of the :c:type:`drm_crtc_commit` structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their :c:type:`drm_mode_config_helper_funcs.atomic_commit_setup ` hook.h](hThis function saves all of the }(hjhhhNhNubh)}(h:c:type:`drm_crtc_commit`h]jz)}(hjh]hdrm_crtc_commit}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_commituh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh structs in an atomic state that touch any CRTCs currently assigned to an MST topology. Drivers must call this hook from their }(hjhhhNhNubh)}(hY:c:type:`drm_mode_config_helper_funcs.atomic_commit_setup `h]jz)}(hjh]h0drm_mode_config_helper_funcs.atomic_commit_setup}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_helper_funcsuh1hhjhMhjubh hook.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj_ubh)}(h **Return**h]j%)}(hj,h]hReturn}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj_ubh)}(hP0 if all CRTC commits were retrieved successfully, negative error code otherwiseh]hP0 if all CRTC commits were retrieved successfully, negative error code otherwise}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_dp_mst_atomic_wait_for_dependencies (C function))c.drm_dp_mst_atomic_wait_for_dependencieshNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hMvoid drm_dp_mst_atomic_wait_for_dependencies (struct drm_atomic_state *state)h]j)}(hLvoid drm_dp_mst_atomic_wait_for_dependencies(struct drm_atomic_state *state)h](j)}(hvoidh]hvoid}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmhhhjhMubj)}(h'drm_dp_mst_atomic_wait_for_dependenciesh]j)}(h'drm_dp_mst_atomic_wait_for_dependenciesh]h'drm_dp_mst_atomic_wait_for_dependencies}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjmhhhjhMubj)}(h (struct drm_atomic_state *state)h]j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb)c.drm_dp_mst_atomic_wait_for_dependenciesasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjmhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjihhhjhMubah}(h]jdah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjfhhubj)}(hhh]h)}(hPWait for all pending commits on MST topologies, prepare new MST state for commith]hPWait for all pending commits on MST topologies, prepare new MST state for commit}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj.hhubah}(h]h ]h"]h$]h&]uh1jhjfhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjIjjIjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` global atomic state **Description** Goes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology. This function also prepares the new MST state for commit by performing some state preparation which can't be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state. All MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.h](h)}(h**Parameters**h]j%)}(hjSh]h Parameters}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubji)}(hhh]jn)}(h7``struct drm_atomic_state *state`` global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjrh]hstruct drm_atomic_state *state}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjlubj)}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjiubah}(h]h ]h"]h$]h&]uh1jhhjMubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubh)}(hXGoes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology.h]hXGoes through any MST topologies in this atomic state, and waits for any pending commits which touched CRTCs that were/are on an MST topology to be programmed to hardware and flipped to before returning. This is to prevent multiple non-blocking commits affecting an MST topology from racing with eachother by forcing them to be executed sequentially in situations where the only resources the modeset objects in these commits share are an MST topology.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubh)}(hThis function also prepares the new MST state for commit by performing some state preparation which can't be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state.h]hThis function also prepares the new MST state for commit by performing some state preparation which can’t be done until this point, such as reading back the final VC start slots (which are determined at commit-time) from the previous state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjMubh)}(hAll MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.h]hAll MST drivers must call this function after calling drm_atomic_helper_wait_for_dependencies(), or whatever their equivalent of that is.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjMubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_dp_mst_root_conn_atomic_check (C function)#c.drm_dp_mst_root_conn_atomic_checkhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hwint drm_dp_mst_root_conn_atomic_check (struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h]j)}(hvint drm_dp_mst_root_conn_atomic_check(struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMEubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhjhMEubj)}(h!drm_dp_mst_root_conn_atomic_checkh]j)}(h!drm_dp_mst_root_conn_atomic_checkh]h!drm_dp_mst_root_conn_atomic_check}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhjhMEubj)}(hQ(struct drm_connector_state *new_conn_state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(h*struct drm_connector_state *new_conn_stateh](j)}(hjh]hstruct}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubh)}(hhh]j)}(hdrm_connector_stateh]hdrm_connector_state}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmmodnameN classnameNjj)}j]j)}jj3sb#c.drm_dp_mst_root_conn_atomic_checkasbuh1hhjIubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjIubj)}(hnew_conn_stateh]hnew_conn_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j#c.drm_dp_mst_root_conn_atomic_checkasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubeh}(h]h ]h"]h$]h&]jjuh1jhj hhhjhMEubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMEubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMEhjhhubj)}(hhh]h)}(hFSerialize CRTC commits on MST-capable connectors operating in SST modeh]hFSerialize CRTC commits on MST-capable connectors operating in SST mode}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMEhj=hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMEubeh}(h]h ](jfunctioneh"]h$]h&]jjjjXjjXjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_connector_state *new_conn_state`` The new connector state of the :c:type:`drm_connector` ``struct drm_dp_mst_topology_mgr *mgr`` The MST topology manager for the :c:type:`drm_connector` **Description** Since MST uses fake :c:type:`drm_encoder` structs, the generic atomic modesetting code isn't able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector's MST topology will never share the same :c:type:`drm_encoder`. This function takes care of this serialization issue, by checking a root MST connector's atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to :c:type:`drm_dp_mst_topology_state.pending_crtc_mask `. Drivers implementing MST must call this function from the :c:type:`drm_connector_helper_funcs.atomic_check ` hook of any physical DP :c:type:`drm_connector` capable of driving MST sinks. **Return** 0 on success, negative error code otherwiseh](h)}(h**Parameters**h]j%)}(hjbh]h Parameters}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMIhj\ubji)}(hhh](jn)}(hf``struct drm_connector_state *new_conn_state`` The new connector state of the :c:type:`drm_connector` h](jt)}(h.``struct drm_connector_state *new_conn_state``h]jz)}(hjh]h*struct drm_connector_state *new_conn_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMGhj{ubj)}(hhh]h)}(h6The new connector state of the :c:type:`drm_connector`h](hThe new connector state of the }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhMGhjubeh}(h]h ]h"]h$]h&]uh1hhjhMGhjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhjhMGhjxubjn)}(ha``struct drm_dp_mst_topology_mgr *mgr`` The MST topology manager for the :c:type:`drm_connector` h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMHhjubj)}(hhh]h)}(h8The MST topology manager for the :c:type:`drm_connector`h](h!The MST topology manager for the }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhMHhjubeh}(h]h ]h"]h$]h&]uh1hhjhMHhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMHhjxubeh}(h]h ]h"]h$]h&]uh1jhhj\ubh)}(h**Description**h]j%)}(hj3h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMJhj\ubh)}(hXaSince MST uses fake :c:type:`drm_encoder` structs, the generic atomic modesetting code isn't able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector's MST topology will never share the same :c:type:`drm_encoder`.h](hSince MST uses fake }(hjIhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjSh]h drm_encoder}(hjUhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMIhjIubhX& structs, the generic atomic modesetting code isn’t able to serialize non-blocking commits happening on the real DP connector of an MST topology switching into/away from MST mode - as the CRTC on the real DP connector and the CRTCs on the connector’s MST topology will never share the same }(hjIhhhNhNubh)}(h:c:type:`drm_encoder`h]jz)}(hjwh]h drm_encoder}(hjyhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_encoderuh1hhjphMIhjIubh.}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjphMIhj\ubh)}(hXBThis function takes care of this serialization issue, by checking a root MST connector's atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to :c:type:`drm_dp_mst_topology_state.pending_crtc_mask `.h](hThis function takes care of this serialization issue, by checking a root MST connector’s atomic state to determine if it is about to have a modeset - and then pulling in the MST topology state if so, along with adding any relevant CRTCs to }(hjhhhNhNubh)}(hQ:c:type:`drm_dp_mst_topology_state.pending_crtc_mask `h]jz)}(hjh]h+drm_dp_mst_topology_state.pending_crtc_mask}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMNhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMNhj\ubh)}(hDrivers implementing MST must call this function from the :c:type:`drm_connector_helper_funcs.atomic_check ` hook of any physical DP :c:type:`drm_connector` capable of driving MST sinks.h](h:Drivers implementing MST must call this function from the }(hjhhhNhNubh)}(hN:c:type:`drm_connector_helper_funcs.atomic_check `h]jz)}(hjh]h'drm_connector_helper_funcs.atomic_check}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMRhjubh hook of any physical DP }(hjhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjh]h drm_connector}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjhMRhjubh capable of driving MST sinks.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMRhj\ubh)}(h **Return**h]j%)}(hj'h]hReturn}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMVhj\ubh)}(h+0 on success, negative error code otherwiseh]h+0 on success, negative error code otherwise}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMWhj\ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_mst_update_slots (C function)c.drm_dp_mst_update_slotshNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hevoid drm_dp_mst_update_slots (struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h]j)}(hdvoid drm_dp_mst_update_slots(struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h](j)}(hvoidh]hvoid}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhhjzhMubj)}(hdrm_dp_mst_update_slotsh]j)}(hdrm_dp_mst_update_slotsh]hdrm_dp_mst_update_slots}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhhjzhMubj)}(hH(struct drm_dp_mst_topology_state *mst_state, uint8_t link_encoding_cap)h](j)}(h+struct drm_dp_mst_topology_state *mst_stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_update_slotsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(huint8_t link_encoding_caph](h)}(hhh]j)}(huint8_th]huint8_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jc.drm_dp_mst_update_slotsasbuh1hhjubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hlink_encoding_caph]hlink_encoding_cap}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhhjzhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjdhhhjzhMubah}(h]j_ah ](jjeh"]h$]h&]jj)jhuh1jhjzhMhjahhubj)}(hhh]h)}(h8updates the slot info depending on the DP ecoding formath]h8updates the slot info depending on the DP ecoding format}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjqhhubah}(h]h ]h"]h$]h&]uh1jhjahhhjzhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(h**Parameters** ``struct drm_dp_mst_topology_state *mst_state`` mst_state to update ``uint8_t link_encoding_cap`` the ecoding format on the linkh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(hD``struct drm_dp_mst_topology_state *mst_state`` mst_state to update h](jt)}(h/``struct drm_dp_mst_topology_state *mst_state``h]jz)}(hjh]h+struct drm_dp_mst_topology_state *mst_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hmst_state to updateh]hmst_state to update}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h<``uint8_t link_encoding_cap`` the ecoding format on the linkh](jt)}(h``uint8_t link_encoding_cap``h]jz)}(hjh]huint8_t link_encoding_cap}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hthe ecoding format on the linkh]hthe ecoding format on the link}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_check_act_status (C function)c.drm_dp_check_act_statushNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hAint drm_dp_check_act_status (struct drm_dp_mst_topology_mgr *mgr)h]j)}(h@int drm_dp_check_act_status(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhjVhMubj)}(hdrm_dp_check_act_statush]j)}(hdrm_dp_check_act_statush]hdrm_dp_check_act_status}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ](jjeh"]h$]h&]jjuh1jhjDhhhjVhMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjksbc.drm_dp_check_act_statusasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj}ubah}(h]h ]h"]h$]h&]jjuh1jhjDhhhjVhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj@hhhjVhMubah}(h]j;ah ](jjeh"]h$]h&]jj)jhuh1jhjVhMhj=hhubj)}(hhh]h)}(hPolls for ACT handled status.h]hPolls for ACT handled status.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj=hhhjVhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj{hNhNubj)}(hXK**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to use **Description** Tries waiting for the MST hub to finish updating it's payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long). **Return** 0 if the ACT was handled in time, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj$ubji)}(hhh]jn)}(h7``struct drm_dp_mst_topology_mgr *mgr`` manager to use h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjIh]h#struct drm_dp_mst_topology_mgr *mgr}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjCubj)}(hhh]h)}(hmanager to useh]hmanager to use}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj_ubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jmhj^hMhj@ubah}(h]h ]h"]h$]h&]uh1jhhj$ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj$ubh)}(hTries waiting for the MST hub to finish updating it's payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long).h]hTries waiting for the MST hub to finish updating it’s payload table by polling for the ACT handled bit for up to 3 seconds (yes-some hubs really take that long).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj$ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj$ubh)}(hA0 if the ACT was handled in time, negative error code on failure.h]hA0 if the ACT was handled in time, negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj$ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_dp_calc_pbn_mode (C function)c.drm_dp_calc_pbn_modehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(h-int drm_dp_calc_pbn_mode (int clock, int bpp)h]j)}(h,int drm_dp_calc_pbn_mode(int clock, int bpp)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_dp_calc_pbn_modeh]j)}(hdrm_dp_calc_pbn_modeh]hdrm_dp_calc_pbn_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(int clock, int bpp)h](j)}(h int clockh](j)}(hinth]hint}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubj)}(hclockh]hclock}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj%ubj)}(hint bpph](j)}(hinth]hint}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj)}(hbpph]hbpp}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj%ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hCalculate the PBN for a mode.h]hCalculate the PBN for a mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(h**Parameters** ``int clock`` dot clock ``int bpp`` bpp as .4 binary fixed point **Description** This uses the formula in the spec to calculate the PBN value for a mode.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(h``int clock`` dot clock h](jt)}(h ``int clock``h]jz)}(hjh]h int clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h dot clockh]h dot clock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h)``int bpp`` bpp as .4 binary fixed point h](jt)}(h ``int bpp``h]jz)}(hj"h]hint bpp}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hbpp as .4 binary fixed pointh]hbpp as .4 binary fixed point}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMhj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj7hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj]h]h Description}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hHThis uses the formula in the spec to calculate the PBN value for a mode.h]hHThis uses the formula in the spec to calculate the PBN value for a mode.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dp_mst_dump_topology (C function)c.drm_dp_mst_dump_topologyhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hWvoid drm_dp_mst_dump_topology (struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h]j)}(hVvoid drm_dp_mst_dump_topology(struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM%ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM%ubj)}(hdrm_dp_mst_dump_topologyh]j)}(hdrm_dp_mst_dump_topologyh]hdrm_dp_mst_dump_topology}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM%ubj)}(h9(struct seq_file *m, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct seq_file *mh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hseq_fileh]hseq_file}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_dump_topologyasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hjh]hm}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjpmodnameN classnameNjj)}j]jc.drm_dp_mst_dump_topologyasbuh1hhjLubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjLubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM%ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM%ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM%hjhhubj)}(hhh]h)}(hdump topology to seq file.h]hdump topology to seq file.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM%hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM%ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(h**Parameters** ``struct seq_file *m`` seq_file to dump output to ``struct drm_dp_mst_topology_mgr *mgr`` manager to dump current topology for. **Description** helper to dump MST topology to a seq file for debugfs.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM)hjubji)}(hhh](jn)}(h2``struct seq_file *m`` seq_file to dump output to h](jt)}(h``struct seq_file *m``h]jz)}(hjh]hstruct seq_file *m}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM&hj ubj)}(hhh]h)}(hseq_file to dump output toh]hseq_file to dump output to}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'hM&hj(ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj'hM&hj ubjn)}(hN``struct drm_dp_mst_topology_mgr *mgr`` manager to dump current topology for. h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjKh]h#struct drm_dp_mst_topology_mgr *mgr}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM'hjEubj)}(hhh]h)}(h%manager to dump current topology for.h]h%manager to dump current topology for.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hM'hjaubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhj`hM'hj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM)hjubh)}(h6helper to dump MST topology to a seq file for debugfs.h]h6helper to dump MST topology to a seq file for debugfs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM(hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_dp_mst_port_downstream_of_parent (C function)&c.drm_dp_mst_port_downstream_of_parenthNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hbool drm_dp_mst_port_downstream_of_parent (struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h]j)}(hbool drm_dp_mst_port_downstream_of_parent(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMnubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMnubj)}(h$drm_dp_mst_port_downstream_of_parenth]j)}(h$drm_dp_mst_port_downstream_of_parenth]h$drm_dp_mst_port_downstream_of_parent}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMnubj)}(hc(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, struct drm_dp_mst_port *parent)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'modnameN classnameNjj)}j]j)}jjsb&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjShhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jA&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjuubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjuubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_dp_mst_port *parenth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jA&c.drm_dp_mst_port_downstream_of_parentasbuh1hhjubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hparenth]hparent}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMnubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMnubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMnhjhhubj)}(hhh]h)}(h.check if a port is downstream of a parent porth]h.check if a port is downstream of a parent port}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMnhjghhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMnubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager ``struct drm_dp_mst_port *port`` the port being looked up ``struct drm_dp_mst_port *parent`` the parent port **Description** The function returns ``true`` if **port** is downstream of **parent**. If **parent** is ``NULL`` - denoting the root port - the function returns ``true`` if **port** is in **mgr**'s topology.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMrhjubji)}(hhh](jn)}(h=``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMohjubj)}(hhh]h)}(hMST topology managerh]hMST topology manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMohjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMohjubjn)}(h:``struct drm_dp_mst_port *port`` the port being looked up h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMphjubj)}(hhh]h)}(hthe port being looked uph]hthe port being looked up}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMphjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMphjubjn)}(h3``struct drm_dp_mst_port *parent`` the parent port h](jt)}(h"``struct drm_dp_mst_port *parent``h]jz)}(hjh]hstruct drm_dp_mst_port *parent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMqhjubj)}(hhh]h)}(hthe parent porth]hthe parent port}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hMqhj3ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj2hMqhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjXh]h Description}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMshjubh)}(hThe function returns ``true`` if **port** is downstream of **parent**. If **parent** is ``NULL`` - denoting the root port - the function returns ``true`` if **port** is in **mgr**'s topology.h](hThe function returns }(hjnhhhNhNubjz)}(h``true``h]htrue}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubh if }(hjnhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubh is downstream of }(hjnhhhNhNubj%)}(h **parent**h]hparent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubh. If }(hjnhhhNhNubj%)}(h **parent**h]hparent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubh is }(hjnhhhNhNubjz)}(h``NULL``h]hNULL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubh1 - denoting the root port - the function returns }(hjnhhhNhNubjz)}(h``true``h]htrue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubh if }hjnsbj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubh is in }(hjnhhhNhNubj%)}(h**mgr**h]hmgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubh’s topology.}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMrhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_dp_mst_add_affected_dsc_crtcs (C function)#c.drm_dp_mst_add_affected_dsc_crtcshNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hkint drm_dp_mst_add_affected_dsc_crtcs (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h]j)}(hjint drm_dp_mst_add_affected_dsc_crtcs(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hinth]hint}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)hhhj;hMubj)}(h!drm_dp_mst_add_affected_dsc_crtcsh]j)}(h!drm_dp_mst_add_affected_dsc_crtcsh]h!drm_dp_mst_add_affected_dsc_crtcs}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ](jjeh"]h$]h&]jjuh1jhj)hhhj;hMubj)}(hE(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjPsb#c.drm_dp_mst_add_affected_dsc_crtcsasbuh1hhjfubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjfubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j#c.drm_dp_mst_add_affected_dsc_crtcsasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubeh}(h]h ]h"]h$]h&]jjuh1jhj)hhhj;hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj%hhhj;hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj;hMhj"hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj"hhhj;hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjfjjfjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` Pointer to the new struct drm_dp_mst_topology_state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager **Description** Whenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topology See also: drm_dp_mst_atomic_enable_dsc()h](h)}(h**Parameters**h]j%)}(hjph]h Parameters}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM!hjjubji)}(hhh](jn)}(hW``struct drm_atomic_state *state`` Pointer to the new struct drm_dp_mst_topology_state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h3Pointer to the new struct drm_dp_mst_topology_stateh]h3Pointer to the new struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h=``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hMST topology managerh]hMST topology manager}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM!hjjubh)}(hWhenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topologyh]hWhenever there is a change in mst topology DSC configuration would have to be recalculated therefore we need to trigger modeset on all affected CRTCs in that topology}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjjubh)}(h(See also: drm_dp_mst_atomic_enable_dsc()h]h(See also: drm_dp_mst_atomic_enable_dsc()}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM%hjjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_mst_atomic_enable_dsc (C function)c.drm_dp_mst_atomic_enable_dschNtauh1jxhj{hhhNhNubj)}(hhh](j)}(huint drm_dp_mst_atomic_enable_dsc (struct drm_atomic_state *state, struct drm_dp_mst_port *port, int pbn, bool enable)h]j)}(htint drm_dp_mst_atomic_enable_dsc(struct drm_atomic_state *state, struct drm_dp_mst_port *port, int pbn, bool enable)h](j)}(hinth]hint}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMZubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjShhhjehMZubj)}(hdrm_dp_mst_atomic_enable_dsch]j)}(hdrm_dp_mst_atomic_enable_dsch]hdrm_dp_mst_atomic_enable_dsc}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ](jjeh"]h$]h&]jjuh1jhjShhhjehMZubj)}(hT(struct drm_atomic_state *state, struct drm_dp_mst_port *port, int pbn, bool enable)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjzsbc.drm_dp_mst_atomic_enable_dscasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj&modnameN classnameNjj)}j]jc.drm_dp_mst_atomic_enable_dscasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjPhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hint pbnh](j)}(hinth]hint}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(hpbnh]hpbn}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool enableh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(henableh]henable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjShhhjehMZubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjOhhhjehMZubah}(h]jJah ](jjeh"]h$]h&]jj)jhuh1jhjehMZhjLhhubj)}(hhh]h)}(hSet DSC Enable Flag to On/Offh]hSet DSC Enable Flag to On/Off}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMZhjhhubah}(h]h ]h"]h$]h&]uh1jhjLhhhjehMZubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` Pointer to the new drm_atomic_state ``struct drm_dp_mst_port *port`` Pointer to the affected MST Port ``int pbn`` Newly recalculated bw required for link with DSC enabled ``bool enable`` Boolean flag to enable or disable DSC on the port **Description** This function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabledh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM^hj ubji)}(hhh](jn)}(hG``struct drm_atomic_state *state`` Pointer to the new drm_atomic_state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj1h]hstruct drm_atomic_state *state}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM[hj+ubj)}(hhh]h)}(h#Pointer to the new drm_atomic_stateh]h#Pointer to the new drm_atomic_state}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhM[hjGubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhjFhM[hj(ubjn)}(hB``struct drm_dp_mst_port *port`` Pointer to the affected MST Port h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjjh]hstruct drm_dp_mst_port *port}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjhubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM\hjdubj)}(hhh]h)}(h Pointer to the affected MST Porth]h Pointer to the affected MST Port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM\hjubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjhM\hj(ubjn)}(hE``int pbn`` Newly recalculated bw required for link with DSC enabled h](jt)}(h ``int pbn``h]jz)}(hjh]hint pbn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM]hjubj)}(hhh]h)}(h8Newly recalculated bw required for link with DSC enabledh]h8Newly recalculated bw required for link with DSC enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM]hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM]hj(ubjn)}(hB``bool enable`` Boolean flag to enable or disable DSC on the port h](jt)}(h``bool enable``h]jz)}(hjh]h bool enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM^hjubj)}(hhh]h)}(h1Boolean flag to enable or disable DSC on the porth]h1Boolean flag to enable or disable DSC on the port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM^hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM^hj(ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM`hj ubh)}(hThis function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabledh]hThis function enables DSC on the given Port by recalculating its vcpi from pbn provided and sets dsc_enable flag to keep track of which ports have DSC enabled}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM_hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_mst_atomic_check_mgr (C function)c.drm_dp_mst_atomic_check_mgrhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hint drm_dp_mst_atomic_check_mgr (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h]j)}(hint drm_dp_mst_atomic_check_mgr(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h](j)}(hinth]hint}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXhhhjjhMubj)}(hdrm_dp_mst_atomic_check_mgrh]j)}(hdrm_dp_mst_atomic_check_mgrh]hdrm_dp_mst_atomic_check_mgr}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ](jjeh"]h$]h&]jjuh1jhjXhhhjjhMubj)}(h(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state, struct drm_dp_mst_port **failing_port)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjUhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h+struct drm_dp_mst_topology_state *mst_stateh](j)}(hjh]hstruct}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjwubj)}(h mst_stateh]h mst_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h%struct drm_dp_mst_port **failing_porth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jc.drm_dp_mst_atomic_check_mgrasbuh1hhjubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj+)}(hj9h]h*}(hjBhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h failing_porth]h failing_port}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjXhhhjjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjThhhjjhMubah}(h]jOah ](jjeh"]h$]h&]jj)jhuh1jhjjhMhjQhhubj)}(hhh]h)}(h1Check the atomic state of an MST topology managerh]h1Check the atomic state of an MST topology manager}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjvhhubah}(h]h ]h"]h$]h&]uh1jhjQhhhjjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` The global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` Manager to check ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state for **mgr** ``struct drm_dp_mst_port **failing_port`` Returns the port with a BW limitation **Description** Checks the given MST manager's topology state for an atomic update to ensure that it's valid. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update. Any atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback. See also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots() - The non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists. - ``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. - ``-EINVAL``, if the new state is invalid, because the root port has too many payloads. **Return** - 0 if the new state is valid - ``-ENOSPC``, if the new state is invalid, because of BW limitation **failing_port** is set to:h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(h;``struct drm_atomic_state *state`` The global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hThe global atomic stateh]hThe global atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h9``struct drm_dp_mst_topology_mgr *mgr`` Manager to check h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hManager to checkh]hManager to check}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hQ``struct drm_dp_mst_topology_state *mst_state`` The MST atomic state for **mgr** h](jt)}(h/``struct drm_dp_mst_topology_state *mst_state``h]jz)}(hj,h]h+struct drm_dp_mst_topology_state *mst_state}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj&ubj)}(hhh]h)}(h The MST atomic state for **mgr**h](hThe MST atomic state for }(hjEhhhNhNubj%)}(h**mgr**h]hmgr}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubeh}(h]h ]h"]h$]h&]uh1hhjAhMhjBubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jmhjAhMhjubjn)}(hP``struct drm_dp_mst_port **failing_port`` Returns the port with a BW limitation h](jt)}(h)``struct drm_dp_mst_port **failing_port``h]jz)}(hjsh]h%struct drm_dp_mst_port **failing_port}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjmubj)}(hhh]h)}(h%Returns the port with a BW limitationh]h%Returns the port with a BW limitation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hChecks the given MST manager's topology state for an atomic update to ensure that it's valid. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update.h]hChecks the given MST manager’s topology state for an atomic update to ensure that it’s valid. This includes checking whether there’s enough bandwidth to support the new timeslot allocations in the atomic update.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hAny atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback.h](hAny atomic drivers supporting DP MST must make sure to call this or the drm_dp_mst_atomic_check() function after checking the rest of their state in their }(hjhhhNhNubh)}(hH:c:type:`drm_mode_config_funcs.atomic_check\(\) `h]jz)}(hjh]h$drm_mode_config_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hfSee also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()h]hfSee also: drm_dp_mst_atomic_check() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubjT=)}(hX - The non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists. - ``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. - ``-EINVAL``, if the new state is invalid, because the root port has too many payloads. h](jT=)}(hXg- The non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists. - ``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. h]h)}(hhh](h)}(hThe non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists.h]h)}(hThe non-root port where a BW limit check failed with all the ports downstream of **failing_port** passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists.h](hQThe non-root port where a BW limit check failed with all the ports downstream of }(hj#hhhNhNubj%)}(h**failing_port**h]h failing_port}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#ubhs passing the BW limit check. The returned port pointer is valid until at least one payload downstream of it exists.}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check. h]h)}(h``NULL`` if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check.h](jz)}(h``NULL``h]hNULL}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjNubhy if the BW limit check failed at the root port with all the ports downstream of the root port passing the BW limit check.}(hjNhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjJubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j8j4uh1hhjChMhjubah}(h]h ]h"]h$]h&]uh1jS=hjChMhjubh)}(hhh]h)}(hW``-EINVAL``, if the new state is invalid, because the root port has too many payloads. h]h)}(hV``-EINVAL``, if the new state is invalid, because the root port has too many payloads.h](jz)}(h ``-EINVAL``h]h-EINVAL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubhK, if the new state is invalid, because the root port has too many payloads.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhj}ubah}(h]h ]h"]h$]h&]j8j4uh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1jS=hjChMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hhh](h)}(h0 if the new state is validh]h)}(hjh]h0 if the new state is valid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hb``-ENOSPC``, if the new state is invalid, because of BW limitation **failing_port** is set to:h]ji)}(hhh]jn)}(h^``-ENOSPC``, if the new state is invalid, because of BW limitation **failing_port** is set to:h](jt)}(hB``-ENOSPC``, if the new state is invalid, because of BW limitationh](jz)}(h ``-ENOSPC``h]h-ENOSPC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh7, if the new state is invalid, because of BW limitation}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h**failing_port** is set to:h](j%)}(h**failing_port**h]h failing_port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh is set to:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjubah}(h]h ]h"]h$]h&]uh1jhhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j8j4uh1hhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dp_mst_atomic_check (C function)c.drm_dp_mst_atomic_checkhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(h` **Description** Checks the given topology state for an atomic update to ensure that it's valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update. Any atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback. See also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots() **Return** 0 if the new state is valid, negative error code otherwise.h](h)}(h**Parameters**h]j%)}(hjNh]h Parameters}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubji)}(hhh]jn)}(h}``struct drm_atomic_state *state`` Pointer to the new :c:type:`struct drm_dp_mst_topology_state ` h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjmh]hstruct drm_atomic_state *state}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjgubj)}(hhh]h)}(hYPointer to the new :c:type:`struct drm_dp_mst_topology_state `h](hPointer to the new }(hjhhhNhNubh)}(hF:c:type:`struct drm_dp_mst_topology_state `h]jz)}(hjh]h struct drm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_topology_stateuh1hhjhMhjubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjdubah}(h]h ]h"]h$]h&]uh1jhhjHubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubh)}(hXChecks the given topology state for an atomic update to ensure that it's valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there's enough bandwidth to support the new timeslot allocations in the atomic update.h]hXChecks the given topology state for an atomic update to ensure that it’s valid, calling drm_dp_mst_atomic_check_mgr() for all MST manager in the atomic state. This includes checking whether there’s enough bandwidth to support the new timeslot allocations in the atomic update.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubh)}(hAny atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their :c:type:`drm_mode_config_funcs.atomic_check\(\) ` callback.h](hqAny atomic drivers supporting DP MST must make sure to call this after checking the rest of their state in their }(hjhhhNhNubh)}(hH:c:type:`drm_mode_config_funcs.atomic_check\(\) `h]jz)}(hjh]h$drm_mode_config_funcs.atomic_check()}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh callback.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjHubh)}(hjSee also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()h]hjSee also: drm_dp_mst_atomic_check_mgr() drm_dp_atomic_find_time_slots() drm_dp_atomic_release_time_slots()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubh)}(h **Return**h]j%)}(hj/h]hReturn}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubh)}(h;0 if the new state is valid, negative error code otherwise.h]h;0 if the new state is valid, negative error code otherwise.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjHubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_atomic_get_mst_topology_state (C function)#c.drm_atomic_get_mst_topology_statehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hstruct drm_dp_mst_topology_state * drm_atomic_get_mst_topology_state (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h]j)}(hstruct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hjh]hstruct}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhjhMubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j!drm_atomic_get_mst_topology_statesb#c.drm_atomic_get_mst_topology_stateasbuh1hhjphhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjphhhjhMubj)}(h!drm_atomic_get_mst_topology_stateh]j)}(hjh]h!drm_atomic_get_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjphhhjhMubj)}(hE(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j#c.drm_atomic_get_mst_topology_stateasbuh1hhjubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]j#c.drm_atomic_get_mst_topology_stateasbuh1hhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjphhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjlhhhjhMubah}(h]jgah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjihhubj)}(hhh]h)}(hget MST topology stateh]hget MST topology state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjihhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The MST topology state or error pointer.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(h7``struct drm_atomic_state *state`` global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj h]hstruct drm_atomic_state *state}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hMhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hMhjubjn)}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjYh]h#struct drm_dp_mst_topology_mgr *mgr}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjSubj)}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jmhjnhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_priv_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h(The MST topology state or error pointer.h]h(The MST topology state or error pointer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_atomic_get_old_mst_topology_state (C function)'c.drm_atomic_get_old_mst_topology_statehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hstruct drm_dp_mst_topology_state * drm_atomic_get_old_mst_topology_state (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h]j)}(hstruct drm_dp_mst_topology_state *drm_atomic_get_old_mst_topology_state(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]j)}j%drm_atomic_get_old_mst_topology_statesb'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjhhhj hMubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMubj+)}(hj9h]h*}(hjNhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhj hMubj)}(h%drm_atomic_get_old_mst_topology_stateh]j)}(hj=h]h%drm_atomic_get_old_mst_topology_state}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMubj)}(hE(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j;'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjvubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjrubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j;'c.drm_atomic_get_old_mst_topology_stateasbuh1hhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmgrh]hmgr}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjrubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMhjhhubj)}(hhh]h)}(h2get old MST topology state in atomic state, if anyh]h2get old MST topology state in atomic state, if any}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The old MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh](jn)}(h7``struct drm_atomic_state *state`` global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hThis function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_old_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j%)}(hjGh]hReturn}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hlThe old MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh]hnThe old MST topology state, or NULL if there’s no topology state for this MST mgr in the global atomic state}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_atomic_get_new_mst_topology_state (C function)'c.drm_atomic_get_new_mst_topology_statehNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hstruct drm_dp_mst_topology_state * drm_atomic_get_new_mst_topology_state (struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h]j)}(hstruct drm_dp_mst_topology_state *drm_atomic_get_new_mst_topology_state(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM(ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM(ubh)}(hhh]j)}(hdrm_dp_mst_topology_stateh]hdrm_dp_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j%drm_atomic_get_new_mst_topology_statesb'c.drm_atomic_get_new_mst_topology_stateasbuh1hhjhhhjhM(ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM(ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhM(ubj)}(h%drm_atomic_get_new_mst_topology_stateh]j)}(hjh]h%drm_atomic_get_new_mst_topology_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM(ubj)}(hE(struct drm_atomic_state *state, struct drm_dp_mst_topology_mgr *mgr)h](j)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj&modnameN classnameNjj)}j]j'c.drm_atomic_get_new_mst_topology_stateasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjPhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j'c.drm_atomic_get_new_mst_topology_stateasbuh1hhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjrubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM(ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM(ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM(hjhhubj)}(hhh]h)}(h2get new MST topology state in atomic state, if anyh]h2get new MST topology state in atomic state, if any}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM(hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM(ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_atomic_state *state`` global atomic state ``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case **Description** This function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object. **Return** The new MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM,hjubji)}(hhh](jn)}(h7``struct drm_atomic_state *state`` global atomic state h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hj8h]hstruct drm_atomic_state *state}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj6ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM)hj2ubj)}(hhh]h)}(hglobal atomic stateh]hglobal atomic state}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM)hjNubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jmhjMhM)hj/ubjn)}(hc``struct drm_dp_mst_topology_mgr *mgr`` MST topology manager, also the private object in this case h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjqh]h#struct drm_dp_mst_topology_mgr *mgr}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjoubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM*hjkubj)}(hhh]h)}(h:MST topology manager, also the private object in this caseh]h:MST topology manager, also the private object in this case}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM*hjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjhM*hj/ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM,hjubh)}(hThis function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.h]hThis function wraps drm_atomic_get_new_private_obj_state() passing in the MST atomic state vtable so that the private object state returned is that of a MST topology object.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM+hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM/hjubh)}(hlThe new MST topology state, or NULL if there's no topology state for this MST mgr in the global atomic stateh]hnThe new MST topology state, or NULL if there’s no topology state for this MST mgr in the global atomic state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM0hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_mst_topology_mgr_init (C function)c.drm_dp_mst_topology_mgr_inithNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hint drm_dp_mst_topology_mgr_init (struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h]j)}(hint drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM@ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj&hM@ubj)}(hdrm_dp_mst_topology_mgr_inith]j)}(hdrm_dp_mst_topology_mgr_inith]hdrm_dp_mst_topology_mgr_init}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj&hM@ubj)}(h(struct drm_dp_mst_topology_mgr *mgr, struct drm_device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int max_payloads, int conn_base_id)h](j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}jj;sbc.drm_dp_mst_topology_mgr_initasbuh1hhjQubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjQubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_dp_mst_topology_mgr_initasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hstruct drm_dp_aux *auxh](j)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjWmodnameN classnameNjj)}j]jc.drm_dp_mst_topology_mgr_initasbuh1hhj3ubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3ubj)}(hauxh]haux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hint max_dpcd_transaction_bytesh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hmax_dpcd_transaction_bytesh]hmax_dpcd_transaction_bytes}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hint max_payloadsh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h max_payloadsh]h max_payloads}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubj)}(hint conn_base_idh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h conn_base_idh]h conn_base_id}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjMubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj&hM@ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj&hM@ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj&hM@hj hhubj)}(hhh]h)}(hinitialise a topology managerh]hinitialise a topology manager}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM@hjThhubah}(h]h ]h"]h$]h&]uh1jhj hhhj&hM@ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjojjojjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager struct to initialise ``struct drm_device *dev`` device providing this structure - for i2c addition. ``struct drm_dp_aux *aux`` DP helper aux channel to talk to this device ``int max_dpcd_transaction_bytes`` hw specific DPCD transaction limit ``int max_payloads`` maximum number of payloads this GPU can source ``int conn_base_id`` the connector object ID the MST device is connected to. **Description** Return 0 for success, or negative error code on failureh](h)}(h**Parameters**h]j%)}(hjyh]h Parameters}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhjsubji)}(hhh](jn)}(hE``struct drm_dp_mst_topology_mgr *mgr`` manager struct to initialise h](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hjh]h#struct drm_dp_mst_topology_mgr *mgr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMAhjubj)}(hhh]h)}(hmanager struct to initialiseh]hmanager struct to initialise}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMAhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMAhjubjn)}(hO``struct drm_device *dev`` device providing this structure - for i2c addition. h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMBhjubj)}(hhh]h)}(h3device providing this structure - for i2c addition.h]h3device providing this structure - for i2c addition.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMBhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMBhjubjn)}(hH``struct drm_dp_aux *aux`` DP helper aux channel to talk to this device h](jt)}(h``struct drm_dp_aux *aux``h]jz)}(hj h]hstruct drm_dp_aux *aux}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMChjubj)}(hhh]h)}(h,DP helper aux channel to talk to this deviceh]h,DP helper aux channel to talk to this device}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMChjubjn)}(hF``int max_dpcd_transaction_bytes`` hw specific DPCD transaction limit h](jt)}(h"``int max_dpcd_transaction_bytes``h]jz)}(hjCh]hint max_dpcd_transaction_bytes}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMDhj=ubj)}(hhh]h)}(h"hw specific DPCD transaction limith]h"hw specific DPCD transaction limit}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhMDhjYubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhjXhMDhjubjn)}(hD``int max_payloads`` maximum number of payloads this GPU can source h](jt)}(h``int max_payloads``h]jz)}(hj|h]hint max_payloads}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMEhjvubj)}(hhh]h)}(h.maximum number of payloads this GPU can sourceh]h.maximum number of payloads this GPU can source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMEhjubah}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]uh1jmhjhMEhjubjn)}(hM``int conn_base_id`` the connector object ID the MST device is connected to. h](jt)}(h``int conn_base_id``h]jz)}(hjh]hint conn_base_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMFhjubj)}(hhh]h)}(h7the connector object ID the MST device is connected to.h]h7the connector object ID the MST device is connected to.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMFhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMFhjubeh}(h]h ]h"]h$]h&]uh1jhhjsubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMHhjsubh)}(h7Return 0 for success, or negative error code on failureh]h7Return 0 for success, or negative error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMGhjsubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_dp_mst_topology_mgr_destroy (C function)!c.drm_dp_mst_topology_mgr_destroyhNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hJvoid drm_dp_mst_topology_mgr_destroy (struct drm_dp_mst_topology_mgr *mgr)h]j)}(hIvoid drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr)h](j)}(hvoidh]hvoid}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhjChMubj)}(hdrm_dp_mst_topology_mgr_destroyh]j)}(hdrm_dp_mst_topology_mgr_destroyh]hdrm_dp_mst_topology_mgr_destroy}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ](jjeh"]h$]h&]jjuh1jhj1hhhjChMubj)}(h%(struct drm_dp_mst_topology_mgr *mgr)h]j)}(h#struct drm_dp_mst_topology_mgr *mgrh](j)}(hjh]hstruct}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubh)}(hhh]j)}(hdrm_dp_mst_topology_mgrh]hdrm_dp_mst_topology_mgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjXsb!c.drm_dp_mst_topology_mgr_destroyasbuh1hhjnubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjnubj)}(hmgrh]hmgr}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjjubah}(h]h ]h"]h$]h&]jjuh1jhj1hhhjChMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj-hhhjChMubah}(h]j(ah ](jjeh"]h$]h&]jj)jhuh1jhjChMhj*hhubj)}(hhh]h)}(hdestroy topology manager.h]hdestroy topology manager.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj*hhhjChMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj{hNhNubj)}(hL**Parameters** ``struct drm_dp_mst_topology_mgr *mgr`` manager to destroyh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(h:``struct drm_dp_mst_topology_mgr *mgr`` manager to destroyh](jt)}(h'``struct drm_dp_mst_topology_mgr *mgr``h]jz)}(hj6h]h#struct drm_dp_mst_topology_mgr *mgr}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj0ubj)}(hhh]h)}(hmanager to destroyh]hmanager to destroy}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjLubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhjKhMhj-ubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dp_mst_aux_for_parent (C function)c.drm_dp_mst_aux_for_parenthNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hLstruct drm_dp_aux * drm_dp_mst_aux_for_parent (struct drm_dp_mst_port *port)h]j)}(hJstruct drm_dp_aux *drm_dp_mst_aux_for_parent(struct drm_dp_mst_port *port)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_dp_mst_aux_for_parentsbc.drm_dp_mst_aux_for_parentasbuh1hhjhhhjhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMubj)}(hdrm_dp_mst_aux_for_parenth]j)}(hjh]hdrm_dp_mst_aux_for_parent}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]jc.drm_dp_mst_aux_for_parentasbuh1hhjubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjThhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h+Get the AUX device for an MST port's parenth]h-Get the AUX device for an MST port’s parent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj{hNhNubj)}(h**Parameters** ``struct drm_dp_mst_port *port`` MST port whose parent's AUX device is returned **Description** Return the AUX device for **port**'s parent or NULL if port's parent is the root port.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(hP``struct drm_dp_mst_port *port`` MST port whose parent's AUX device is returned h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h.MST port whose parent's AUX device is returnedh]h0MST port whose parent’s AUX device is returned}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hVReturn the AUX device for **port**'s parent or NULL if port's parent is the root port.h](hReturn the AUX device for }(hj hhhNhNubj%)}(h**port**h]hport}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh8’s parent or NULL if port’s parent is the root port.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dp_mst_dsc_aux_for_port (C function)c.drm_dp_mst_dsc_aux_for_porthNtauh1jxhj{hhhNhNubj)}(hhh](j)}(hNstruct drm_dp_aux * drm_dp_mst_dsc_aux_for_port (struct drm_dp_mst_port *port)h]j)}(hLstruct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port)h](j)}(hjh]hstruct}(hj^ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjl hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ hhhjk hMubh)}(hhh]j)}(h drm_dp_auxh]h drm_dp_aux}(hj} hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jdrm_dp_mst_dsc_aux_for_portsbc.drm_dp_mst_dsc_aux_for_portasbuh1hhjZ hhhjk hMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ hhhjk hMubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZ hhhjk hMubj)}(hdrm_dp_mst_dsc_aux_for_porth]j)}(hj h]hdrm_dp_mst_dsc_aux_for_port}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZ hhhjk hMubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j c.drm_dp_mst_dsc_aux_for_portasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj" hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hporth]hport}(hj/ hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubah}(h]h ]h"]h$]h&]jjuh1jhjZ hhhjk hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjV hhhjk hMubah}(h]jQ ah ](jjeh"]h$]h&]jj)jhuh1jhjk hMhjS hhubj)}(hhh]h)}(hFind the correct aux for DSCh]hFind the correct aux for DSC}(hjY hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjV hhubah}(h]h ]h"]h$]h&]uh1jhjS hhhjk hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjq jjq jjjuh1jhhhj{hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_port *port`` The port to check. A leaf of the MST tree with an attached display. **Description** Depending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector's physical aux. This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED. This operation can be expensive (up to four aux reads), so the caller should cache the return. **Return** NULL if DSC cannot be enabled on this port, otherwise the aux deviceh](h)}(h**Parameters**h]j%)}(hj{ h]h Parameters}(hj} hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjy ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhju ubji)}(hhh]jn)}(he``struct drm_dp_mst_port *port`` The port to check. A leaf of the MST tree with an attached display. h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hj h]hstruct drm_dp_mst_port *port}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj)}(hhh]h)}(hCThe port to check. A leaf of the MST tree with an attached display.h]hCThe port to check. A leaf of the MST tree with an attached display.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhhju ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhju ubh)}(hDepending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector's physical aux.h]hDepending on the situation, DSC may be enabled via the endpoint aux, the immediately upstream aux, or the connector’s physical aux.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhju ubh)}(h]This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED.h]h]This is both the correct aux to read DSC_CAPABILITY and the correct aux to write DSC_ENABLED.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhju ubh)}(h^This operation can be expensive (up to four aux reads), so the caller should cache the return.h]h^This operation can be expensive (up to four aux reads), so the caller should cache the return.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhju ubh)}(h **Return**h]j%)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhju ubh)}(hDNULL if DSC cannot be enabled on this port, otherwise the aux deviceh]hDNULL if DSC cannot be enabled on this port, otherwise the aux device}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:323: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhju ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj{hhhNhNubeh}(h]id4ah ]h"]h$]j29ah&]uh1hhjwhhhhhM>jy;Kubh)}(hhh](h)}(hTopology Lifetime Internalsh]hTopology Lifetime Internals}(hjP hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjM hhhhhMGubh)}(h~These functions aren't exported to drivers, but are documented here to help make the MST topology helpers easier to understandh]hThese functions aren’t exported to drivers, but are documented here to help make the MST topology helpers easier to understand}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMIhjM hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_mst_get_mstb_malloc (C function)c.drm_dp_mst_get_mstb_mallochNtauh1jxhjM hhhNhNubj)}(hhh](j)}(h@void drm_dp_mst_get_mstb_malloc (struct drm_dp_mst_branch *mstb)h]j)}(h?void drm_dp_mst_get_mstb_malloc(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hdrm_dp_mst_get_mstb_malloch]j)}(hdrm_dp_mst_get_mstb_malloch]hdrm_dp_mst_get_mstb_malloc}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jj sbc.drm_dp_mst_get_mstb_mallocasbuh1hhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hmstbh]hmstb}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubah}(h]h ]h"]h$]h&]jjuh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj} hhhj hMubah}(h]jx ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhjz hhubj)}(hhh]h)}(h0Increment the malloc refcount of a branch deviceh]h0Increment the malloc refcount of a branch device}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjB hhubah}(h]h ]h"]h$]h&]uh1jhjz hhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj] jj] jjjuh1jhhhjM hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount of **Description** Increments :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used. See also: drm_dp_mst_put_mstb_malloc()h](h)}(h**Parameters**h]j%)}(hjg h]h Parameters}(hji hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hje ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhja ubji)}(hhh]jn)}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount of h](jt)}(h"``struct drm_dp_mst_branch *mstb``h]jz)}(hj h]hstruct drm_dp_mst_branch *mstb}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubj)}(hhh]h)}(h^The :c:type:`struct drm_dp_mst_branch ` to increment the malloc refcount ofh](hThe }(hj hhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hj h]hstruct drm_dp_mst_branch}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhj hMhj ubh$ to increment the malloc refcount of}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj} ubah}(h]h ]h"]h$]h&]uh1jhhja ubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhja ubh)}(hIncrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used.h](h Increments }(hj hhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jz)}(hj h]hdrm_dp_mst_branch.malloc_kref}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj ubh. When }(hj hhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jz)}(hj( h]hdrm_dp_mst_branch.malloc_kref}(hj* hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj& ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhj! hMhj ubh& reaches 0, the memory allocation for }(hj hhhNhNubj%)}(h**mstb**h]hmstb}(hjI hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh will be released and }(hj hhhNhNubj%)}(h**mstb**h]hmstb}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh may no longer be used.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj! hMhja ubh)}(h&See also: drm_dp_mst_put_mstb_malloc()h]h&See also: drm_dp_mst_put_mstb_malloc()}(hjs hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhja ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dp_mst_put_mstb_malloc (C function)c.drm_dp_mst_put_mstb_mallochNtauh1jxhjM hhhNhNubj)}(hhh](j)}(h@void drm_dp_mst_put_mstb_malloc (struct drm_dp_mst_branch *mstb)h]j)}(h?void drm_dp_mst_put_mstb_malloc(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hdrm_dp_mst_put_mstb_malloch]j)}(hdrm_dp_mst_put_mstb_malloch]hdrm_dp_mst_put_mstb_malloc}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jj sbc.drm_dp_mst_put_mstb_mallocasbuh1hhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hmstbh]hmstb}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubah}(h]h ]h"]h$]h&]jjuh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhj hhubj)}(hhh]h)}(h0Decrement the malloc refcount of a branch deviceh]h0Decrement the malloc refcount of a branch device}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj_hhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjzjjzjjjuh1jhhhjM hNhNubj)}(hX**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount of **Description** Decrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used. See also: drm_dp_mst_get_mstb_malloc()h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj~ubji)}(hhh]jn)}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount of h](jt)}(h"``struct drm_dp_mst_branch *mstb``h]jz)}(hjh]hstruct drm_dp_mst_branch *mstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h^The :c:type:`struct drm_dp_mst_branch ` to decrement the malloc refcount ofh](hThe }(hjhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjh]hstruct drm_dp_mst_branch}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjhMhjubh$ to decrement the malloc refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhj~ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj~ubh)}(hDecrements :c:type:`drm_dp_mst_branch.malloc_kref `. When :c:type:`drm_dp_mst_branch.malloc_kref ` reaches 0, the memory allocation for **mstb** will be released and **mstb** may no longer be used.h](h Decrements }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jz)}(hj!h]hdrm_dp_mst_branch.malloc_kref}(hj#hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh. When }(hjhhhNhNubh)}(h;:c:type:`drm_dp_mst_branch.malloc_kref `h]jz)}(hjEh]hdrm_dp_mst_branch.malloc_kref}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhj>hMhjubh& reaches 0, the memory allocation for }(hjhhhNhNubj%)}(h**mstb**h]hmstb}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh will be released and }(hjhhhNhNubj%)}(h**mstb**h]hmstb}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh may no longer be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj>hMhj~ubh)}(h&See also: drm_dp_mst_get_mstb_malloc()h]h&See also: drm_dp_mst_get_mstb_malloc()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj~ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_mst_topology_try_get_mstb (C function)"c.drm_dp_mst_topology_try_get_mstbhNtauh1jxhjM hhhNhNubj)}(hhh](j)}(hEint drm_dp_mst_topology_try_get_mstb (struct drm_dp_mst_branch *mstb)h]j)}(hDint drm_dp_mst_topology_try_get_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h drm_dp_mst_topology_try_get_mstbh]j)}(h drm_dp_mst_topology_try_get_mstbh]h drm_dp_mst_topology_try_get_mstb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb"c.drm_dp_mst_topology_try_get_mstbasbuh1hhjubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjHhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmstbh]hmstb}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hCIncrement the topology refcount of a branch device unless it's zeroh]hEIncrement the topology refcount of a branch device unless it’s zero}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj|hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjM hNhNubj)}(hXz**Parameters** ``struct drm_dp_mst_branch *mstb`` :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of **Description** Attempts to grab a topology reference to **mstb**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_branch.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **mstb** as long as the user holds the topology reference. Care should be taken to ensure that the user has at least one malloc reference to **mstb**. If you already have a topology reference to **mstb**, you should use drm_dp_mst_topology_get_mstb() instead. See also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb() **Return** * 1: A topology reference was grabbed successfully * 0: **port** is no longer in the topology, no reference was grabbedh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(h``struct drm_dp_mst_branch *mstb`` :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of h](jt)}(h"``struct drm_dp_mst_branch *mstb``h]jz)}(hjh]hstruct drm_dp_mst_branch *mstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubj)}(hhh]h)}(h\:c:type:`struct drm_dp_mst_branch ` to increment the topology refcount ofh](h)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjh]hstruct drm_dp_mst_branch}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjhMhjubh& to increment the topology refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hX>Attempts to grab a topology reference to **mstb**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_branch.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **mstb** as long as the user holds the topology reference.h](h)Attempts to grab a topology reference to }(hj0hhhNhNubj%)}(h**mstb**h]hmstb}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubh:, if it hasn’t yet been removed from the topology (e.g. }(hj0hhhNhNubh)}(h=:c:type:`drm_dp_mst_branch.topology_kref `h]jz)}(hjLh]hdrm_dp_mst_branch.topology_kref}(hjNhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj0ubh^ has reached 0). Holding a topology reference implies that a malloc reference will be held to }(hj0hhhNhNubj%)}(h**mstb**h]hmstb}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubh2 as long as the user holds the topology reference.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjihMhjubh)}(hCare should be taken to ensure that the user has at least one malloc reference to **mstb**. If you already have a topology reference to **mstb**, you should use drm_dp_mst_topology_get_mstb() instead.h](hRCare should be taken to ensure that the user has at least one malloc reference to }(hjhhhNhNubj%)}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.. If you already have a topology reference to }(hjhhhNhNubj%)}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh8, you should use drm_dp_mst_topology_get_mstb() instead.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hGSee also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb()h]hGSee also: drm_dp_mst_topology_get_mstb() drm_dp_mst_topology_put_mstb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hhh](h)}(h01: A topology reference was grabbed successfullyh]h)}(hjh]h01: A topology reference was grabbed successfully}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hB0: **port** is no longer in the topology, no reference was grabbedh]h)}(hjh](h0: }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh7 is no longer in the topology, no reference was grabbed}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j8j9uh1hhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_mst_topology_get_mstb (C function)c.drm_dp_mst_topology_get_mstbhNtauh1jxhjM hhhNhNubj)}(hhh](j)}(hBvoid drm_dp_mst_topology_get_mstb (struct drm_dp_mst_branch *mstb)h]j)}(hAvoid drm_dp_mst_topology_get_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhjYhMubj)}(hdrm_dp_mst_topology_get_mstbh]j)}(hdrm_dp_mst_topology_get_mstbh]hdrm_dp_mst_topology_get_mstb}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubah}(h]h ](jjeh"]h$]h&]jjuh1jhjGhhhjYhMubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjnsbc.drm_dp_mst_topology_get_mstbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmstbh]hmstb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjGhhhjYhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjChhhjYhMubah}(h]j>ah ](jjeh"]h$]h&]jj)jhuh1jhjYhMhj@hhubj)}(hhh]h)}(h2Increment the topology refcount of a branch deviceh]h2Increment the topology refcount of a branch device}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj@hhhjYhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj#jj#jjjuh1jhhhjM hNhNubj)}(hX9**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of **Description** Increments :c:type:`drm_dp_mst_branch.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **mstb**. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used. See also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()h](h)}(h**Parameters**h]j%)}(hj-h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj+ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj'ubji)}(hhh]jn)}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount of h](jt)}(h"``struct drm_dp_mst_branch *mstb``h]jz)}(hjLh]hstruct drm_dp_mst_branch *mstb}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjFubj)}(hhh]h)}(h`The :c:type:`struct drm_dp_mst_branch ` to increment the topology refcount ofh](hThe }(hjehhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjoh]hstruct drm_dp_mst_branch}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjahMhjeubh& to increment the topology refcount of}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjahMhjbubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jmhjahMhjCubah}(h]h ]h"]h$]h&]uh1jhhj'ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj'ubh)}(hXDIncrements :c:type:`drm_dp_mst_branch.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **mstb**. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used.h](h Increments }(hjhhhNhNubh)}(hA:c:type:`drm_dp_mst_branch.topology_refcount `h]jz)}(hjh]h#drm_dp_mst_branch.topology_refcount}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh without checking whether or not it’s already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to }(hjhhhNhNubj%)}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh=. Otherwise, drm_dp_mst_topology_try_get_mstb() must be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj'ubh)}(hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()h]hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_put_mstb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_mst_topology_put_mstb (C function)c.drm_dp_mst_topology_put_mstbhNtauh1jxhjM hhhNhNubj)}(hhh](j)}(hBvoid drm_dp_mst_topology_put_mstb (struct drm_dp_mst_branch *mstb)h]j)}(hAvoid drm_dp_mst_topology_put_mstb(struct drm_dp_mst_branch *mstb)h](j)}(hvoidh]hvoid}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM ubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhjAhM ubj)}(hdrm_dp_mst_topology_put_mstbh]j)}(hdrm_dp_mst_topology_put_mstbh]hdrm_dp_mst_topology_put_mstb}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ](jjeh"]h$]h&]jjuh1jhj/hhhjAhM ubj)}(h (struct drm_dp_mst_branch *mstb)h]j)}(hstruct drm_dp_mst_branch *mstbh](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubh)}(hhh]j)}(hdrm_dp_mst_branchh]hdrm_dp_mst_branch}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjVsbc.drm_dp_mst_topology_put_mstbasbuh1hhjlubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjlubj)}(hmstbh]hmstb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubah}(h]h ]h"]h$]h&]jjuh1jhj/hhhjAhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhjAhM ubah}(h]j&ah ](jjeh"]h$]h&]jj)jhuh1jhjAhM hj(hhubj)}(hhh]h)}(h/release a topology reference to a branch deviceh]h/release a topology reference to a branch device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj(hhhjAhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjM hNhNubj)}(hXp**Parameters** ``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to release the topology reference from **Description** Releases a topology reference from **mstb** by decrementing :c:type:`drm_dp_mst_branch.topology_kref `. See also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubji)}(hhh]jn)}(h``struct drm_dp_mst_branch *mstb`` The :c:type:`struct drm_dp_mst_branch ` to release the topology reference from h](jt)}(h"``struct drm_dp_mst_branch *mstb``h]jz)}(hj4h]hstruct drm_dp_mst_branch *mstb}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhj.ubj)}(hhh]h)}(haThe :c:type:`struct drm_dp_mst_branch ` to release the topology reference fromh](hThe }(hjMhhhNhNubh)}(h6:c:type:`struct drm_dp_mst_branch `h]jz)}(hjWh]hstruct drm_dp_mst_branch}(hjYhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjUubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhjIhMhjMubh' to release the topology reference from}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjIhMhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhjIhMhj+ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh)}(hzReleases a topology reference from **mstb** by decrementing :c:type:`drm_dp_mst_branch.topology_kref `.h](h#Releases a topology reference from }(hjhhhNhNubj%)}(h**mstb**h]hmstb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh by decrementing }(hjhhhNhNubh)}(h=:c:type:`drm_dp_mst_branch.topology_kref `h]jz)}(hjh]hdrm_dp_mst_branch.topology_kref}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_branchuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()h]hKSee also: drm_dp_mst_topology_try_get_mstb() drm_dp_mst_topology_get_mstb()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_dp_mst_topology_try_get_port (C function)"c.drm_dp_mst_topology_try_get_porthNtauh1jxhjM hhhNhNubj)}(hhh](j)}(hCint drm_dp_mst_topology_try_get_port (struct drm_dp_mst_port *port)h]j)}(hBint drm_dp_mst_topology_try_get_port(struct drm_dp_mst_port *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM>ubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj)hM>ubj)}(h drm_dp_mst_topology_try_get_porth]j)}(h drm_dp_mst_topology_try_get_porth]h drm_dp_mst_topology_try_get_port}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj)hM>ubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjxmodnameN classnameNjj)}j]j)}jj>sb"c.drm_dp_mst_topology_try_get_portasbuh1hhjTubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjTubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjPubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj)hM>ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj)hM>ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj)hM>hjhhubj)}(hhh]h)}(h:Increment the topology refcount of a port unless it's zeroh]hhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj)hM>ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjM hNhNubj)}(hXp**Parameters** ``struct drm_dp_mst_port *port`` :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of **Description** Attempts to grab a topology reference to **port**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_port.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **port** as long as the user holds the topology reference. Care should be taken to ensure that the user has at least one malloc reference to **port**. If you already have a topology reference to **port**, you should use drm_dp_mst_topology_get_port() instead. See also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port() **Return** * 1: A topology reference was grabbed successfully * 0: **port** is no longer in the topology, no reference was grabbedh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMBhjubji)}(hhh]jn)}(hz``struct drm_dp_mst_port *port`` :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM@hjubj)}(hhh]h)}(hX:c:type:`struct drm_dp_mst_port ` to increment the topology refcount ofh](h)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hj;h]hstruct drm_dp_mst_port}(hj=hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhj1hM@hj5ubh& to increment the topology refcount of}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj1hM@hj2ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj1hM@hjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjvh]h Description}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjtubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMBhjubh)}(hX:Attempts to grab a topology reference to **port**, if it hasn't yet been removed from the topology (e.g. :c:type:`drm_dp_mst_port.topology_kref ` has reached 0). Holding a topology reference implies that a malloc reference will be held to **port** as long as the user holds the topology reference.h](h)Attempts to grab a topology reference to }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:, if it hasn’t yet been removed from the topology (e.g. }(hjhhhNhNubh)}(h9:c:type:`drm_dp_mst_port.topology_kref `h]jz)}(hjh]hdrm_dp_mst_port.topology_kref}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMAhjubh^ has reached 0). Holding a topology reference implies that a malloc reference will be held to }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh2 as long as the user holds the topology reference.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMAhjubh)}(hCare should be taken to ensure that the user has at least one malloc reference to **port**. If you already have a topology reference to **port**, you should use drm_dp_mst_topology_get_port() instead.h](hRCare should be taken to ensure that the user has at least one malloc reference to }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh.. If you already have a topology reference to }(hjhhhNhNubj%)}(h**port**h]hport}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh8, you should use drm_dp_mst_topology_get_port() instead.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMFhjubh)}(hGSee also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port()h]hGSee also: drm_dp_mst_topology_get_port() drm_dp_mst_topology_put_port()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMJhjubh)}(h **Return**h]j%)}(hj&h]hReturn}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMNhjubh)}(hhh](h)}(h01: A topology reference was grabbed successfullyh]h)}(hjAh]h01: A topology reference was grabbed successfully}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMOhj?ubah}(h]h ]h"]h$]h&]uh1hhj<ubh)}(hB0: **port** is no longer in the topology, no reference was grabbedh]h)}(hjYh](h0: }(hj[hhhNhNubj%)}(h**port**h]hport}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubh7 is no longer in the topology, no reference was grabbed}(hj[hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMPhjWubah}(h]h ]h"]h$]h&]uh1hhj<ubeh}(h]h ]h"]h$]h&]j8j9uh1hhjPhMOhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_mst_topology_get_port (C function)c.drm_dp_mst_topology_get_porthNtauh1jxhjM hhhNhNubj)}(hhh](j)}(h@void drm_dp_mst_topology_get_port (struct drm_dp_mst_port *port)h]j)}(h?void drm_dp_mst_topology_get_port(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMdubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMdubj)}(hdrm_dp_mst_topology_get_porth]j)}(hdrm_dp_mst_topology_get_porth]hdrm_dp_mst_topology_get_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMdubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_topology_get_portasbuh1hhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMdubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMdubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMdhjhhubj)}(hhh]h)}(h)Increment the topology refcount of a porth]h)Increment the topology refcount of a port}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMdhjdhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMdubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjM hNhNubj)}(hX/**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of **Description** Increments :c:type:`drm_dp_mst_port.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **port**. Otherwise, drm_dp_mst_topology_try_get_port() must be used. See also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhhjubji)}(hhh]jn)}(h~``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount of h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMehjubj)}(hhh]h)}(h\The :c:type:`struct drm_dp_mst_port ` to increment the topology refcount ofh](hThe }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjhMehjubh& to increment the topology refcount of}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMehjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMehjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMghjubh)}(hX@Increments :c:type:`drm_dp_mst_port.topology_refcount ` without checking whether or not it's already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to **port**. Otherwise, drm_dp_mst_topology_try_get_port() must be used.h](h Increments }(hjhhhNhNubh)}(h=:c:type:`drm_dp_mst_port.topology_refcount `h]jz)}(hj&h]h!drm_dp_mst_port.topology_refcount}(hj(hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMfhjubh without checking whether or not it’s already reached 0. This is only valid to use in scenarios where you are already guaranteed to have at least one active topology reference to }(hjhhhNhNubj%)}(h**port**h]hport}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh=. Otherwise, drm_dp_mst_topology_try_get_port() must be used.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChMfhjubh)}(hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()h]hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_put_port()}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMkhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_dp_mst_topology_put_port (C function)c.drm_dp_mst_topology_put_porthNtauh1jxhjM hhhNhNubj)}(hhh](j)}(h@void drm_dp_mst_topology_put_port (struct drm_dp_mst_port *port)h]j)}(h?void drm_dp_mst_topology_put_port(struct drm_dp_mst_port *port)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM}ubj)}(hdrm_dp_mst_topology_put_porth]j)}(hdrm_dp_mst_topology_put_porth]hdrm_dp_mst_topology_put_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM}ubj)}(h(struct drm_dp_mst_port *port)h]j)}(hstruct drm_dp_mst_port *porth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_dp_mst_porth]hdrm_dp_mst_port}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_dp_mst_topology_put_portasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM}ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM}ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM}hjhhubj)}(hhh]h)}(h&release a topology reference to a porth]h&release a topology reference to a port}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM}hjLhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM}ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjgjjgjjjuh1jhhhjM hNhNubj)}(hXf**Parameters** ``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to release the topology reference from **Description** Releases a topology reference from **port** by decrementing :c:type:`drm_dp_mst_port.topology_kref `. See also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()h](h)}(h**Parameters**h]j%)}(hjqh]h Parameters}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjkubji)}(hhh]jn)}(h``struct drm_dp_mst_port *port`` The :c:type:`struct drm_dp_mst_port ` to release the topology reference from h](jt)}(h ``struct drm_dp_mst_port *port``h]jz)}(hjh]hstruct drm_dp_mst_port *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chM~hjubj)}(hhh]h)}(h]The :c:type:`struct drm_dp_mst_port ` to release the topology reference fromh](hThe }(hjhhhNhNubh)}(h2:c:type:`struct drm_dp_mst_port `h]jz)}(hjh]hstruct drm_dp_mst_port}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhjhM~hjubh' to release the topology reference from}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM~hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM~hjubah}(h]h ]h"]h$]h&]uh1jhhjkubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjkubh)}(hvReleases a topology reference from **port** by decrementing :c:type:`drm_dp_mst_port.topology_kref `.h](h#Releases a topology reference from }(hjhhhNhNubj%)}(h**port**h]hport}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh by decrementing }(hjhhhNhNubh)}(h9:c:type:`drm_dp_mst_port.topology_kref `h]jz)}(hj h]hdrm_dp_mst_port.topology_kref}(hj"hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dp_mst_portuh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj=hMhjkubh)}(hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()h]hKSee also: drm_dp_mst_topology_try_get_port() drm_dp_mst_topology_get_port()}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhr/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:332: ./drivers/gpu/drm/display/drm_dp_mst_topology.chMhjkubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjM hhhNhNubeh}(h]topology-lifetime-internalsah ]h"]topology lifetime internalsah$]h&]uh1hhjwhhhhhMGubeh}(h]display-port-mst-helpersah ]h"]display port mst helpersah$]h&]uh1hhhhhhhhM2ubh)}(hhh](h)}(h#MIPI DBI Helper Functions Referenceh]h#MIPI DBI Helper Functions Reference}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhhhhhMTubh)}(hbThis library provides helpers for MIPI Display Bus Interface (DBI) compatible display controllers.h]hbThis library provides helpers for MIPI Display Bus Interface (DBI) compatible display controllers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK,hjnhhubh)}(hMany controllers for tiny lcd displays are MIPI compliant and can use this library. If a controller uses registers 0x2A and 0x2B to set the area to update and uses register 0x2C to write to frame memory, it is most likely MIPI compliant.h]hMany controllers for tiny lcd displays are MIPI compliant and can use this library. If a controller uses registers 0x2A and 0x2B to set the area to update and uses register 0x2C to write to frame memory, it is most likely MIPI compliant.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK/hjnhhubh)}(hLOnly MIPI Type 1 displays are supported since a full frame memory is needed.h]hLOnly MIPI Type 1 displays are supported since a full frame memory is needed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK4hjnhhubh)}(h*There are 3 MIPI DBI implementation types:h]h*There are 3 MIPI DBI implementation types:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK6hjnhhubjCH)}(hhh](h)}(h Motorola 6800 type parallel bus h]h)}(hMotorola 6800 type parallel bush]hMotorola 6800 type parallel bus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK8hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hIntel 8080 type parallel bus h]h)}(hIntel 8080 type parallel bush]hIntel 8080 type parallel bus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK:hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hSPI type with 3 options: 1. 9-bit with the Data/Command signal as the ninth bit 2. Same as above except it's sent as 16 bits 3. 8-bit with the Data/Command signal as a separate D/CX pin h](h)}(hSPI type with 3 options:h]hSPI type with 3 options:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chKhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h)Same as above except it's sent as 16 bitsh]h)}(hj h]h+Same as above except it’s sent as 16 bits}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK?hjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h:8-bit with the Data/Command signal as a separate D/CX pin h]h)}(h98-bit with the Data/Command signal as a separate D/CX pinh]h98-bit with the Data/Command signal as a separate D/CX pin}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chK@hj6ubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j?Jj@JjAJhjBJjCJuh1jBHhjubeh}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j?J upperalphajAJhjBJjCJuh1jBHhjnhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chNubh)}(hQCurrently mipi_dbi only supports Type C options 1 and 3 with mipi_dbi_spi_init().h]hQCurrently mipi_dbi only supports Type C options 1 and 3 with mipi_dbi_spi_init().}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:342: ./drivers/gpu/drm/drm_mipi_dbi.chKBhjnhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dbi (C struct) c.mipi_dbihNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hmipi_dbih]j)}(hstruct mipi_dbih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hmipi_dbih]j)}(hjh]hmipi_dbi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]j~ah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(hMIPI DBI interfaceh]hMIPI DBI interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jstructeh"]h$]h&]jjjjjjjjjuh1jhhhjnhNhNubj)}(hX**Definition**:: struct mipi_dbi { struct mutex cmdlock; int (*command)(struct mipi_dbi *dbi, u8 *cmd, u8 *param, size_t num); const u8 *read_commands; bool swap_bytes; struct gpio_desc *reset; struct spi_device *spi; unsigned int write_memory_bpw; struct gpio_desc *dc; void *tx_buf9; size_t tx_buf9_len; }; **Members** ``cmdlock`` Command lock ``command`` Bus specific callback executing commands. ``read_commands`` Array of read commands terminated by a zero entry. Reading is disabled if this is NULL. ``swap_bytes`` Swap bytes in buffer before transfer ``reset`` Optional reset gpio ``spi`` SPI device ``write_memory_bpw`` Bits per word used on a MIPI_DCS_WRITE_MEMORY_START transfer ``dc`` Optional D/C gpio. ``tx_buf9`` Buffer used for Option 1 9-bit conversion ``tx_buf9_len`` Size of tx_buf9.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjubj@)}(hXKstruct mipi_dbi { struct mutex cmdlock; int (*command)(struct mipi_dbi *dbi, u8 *cmd, u8 *param, size_t num); const u8 *read_commands; bool swap_bytes; struct gpio_desc *reset; struct spi_device *spi; unsigned int write_memory_bpw; struct gpio_desc *dc; void *tx_buf9; size_t tx_buf9_len; };h]hXKstruct mipi_dbi { struct mutex cmdlock; int (*command)(struct mipi_dbi *dbi, u8 *cmd, u8 *param, size_t num); const u8 *read_commands; bool swap_bytes; struct gpio_desc *reset; struct spi_device *spi; unsigned int write_memory_bpw; struct gpio_desc *dc; void *tx_buf9; size_t tx_buf9_len; };}hj sbah}(h]h ]h"]h$]h&]jjuh1j?h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK*hjubji)}(hhh](jn)}(h``cmdlock`` Command lock h](jt)}(h ``cmdlock``h]jz)}(hj:h]hcmdlock}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj4ubj)}(hhh]h)}(h Command lockh]h Command lock}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhjOhKhj1ubjn)}(h6``command`` Bus specific callback executing commands. h](jt)}(h ``command``h]jz)}(hjsh]hcommand}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK!hjmubj)}(hhh]h)}(h)Bus specific callback executing commands.h]h)Bus specific callback executing commands.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK!hjubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjhK!hj1ubjn)}(hz``read_commands`` Array of read commands terminated by a zero entry. Reading is disabled if this is NULL. h](jt)}(h``read_commands``h]jz)}(hjh]h read_commands}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK'hjubj)}(hhh]ji)}(hhh]jn)}(hXArray of read commands terminated by a zero entry. Reading is disabled if this is NULL. h](jt)}(h2Array of read commands terminated by a zero entry.h]h2Array of read commands terminated by a zero entry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jshjhK'hjubj)}(hhh]h)}(h$Reading is disabled if this is NULL.h]h$Reading is disabled if this is NULL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK'hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK'hjubah}(h]h ]h"]h$]h&]uh1jhhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK'hj1ubjn)}(h4``swap_bytes`` Swap bytes in buffer before transfer h](jt)}(h``swap_bytes``h]jz)}(hjh]h swap_bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK,hj ubj)}(hhh]h)}(h$Swap bytes in buffer before transferh]h$Swap bytes in buffer before transfer}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hK,hj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hK,hj1ubjn)}(h``reset`` Optional reset gpio h](jt)}(h ``reset``h]jz)}(hjHh]hreset}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK1hjBubj)}(hhh]h)}(hOptional reset gpioh]hOptional reset gpio}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hK1hj^ubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jmhj]hK1hj1ubjn)}(h``spi`` SPI device h](jt)}(h``spi``h]jz)}(hjh]hspi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK8hj{ubj)}(hhh]h)}(h SPI deviceh]h SPI device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK8hjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhjhK8hj1ubjn)}(hR``write_memory_bpw`` Bits per word used on a MIPI_DCS_WRITE_MEMORY_START transfer h](jt)}(h``write_memory_bpw``h]jz)}(hjh]hwrite_memory_bpw}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK=hjubj)}(hhh]h)}(h!sbah}(h]h ]h"]h$]h&]jjuh1j?h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKWhj!ubh)}(h **Members**h]j%)}(hjO!h]hMembers}(hjQ!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjM!ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhhj!ubji)}(hhh](jn)}(h``drm`` DRM device h](jt)}(h``drm``h]jz)}(hjn!h]hdrm}(hjp!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjl!ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKVhjh!ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hKVhj!ubah}(h]h ]h"]h$]h&]uh1jhjh!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hKVhje!ubjn)}(h ``pipe`` Display pipe structure h](jt)}(h``pipe``h]jz)}(hj!h]hpipe}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK[hj!ubj)}(hhh]h)}(hDisplay pipe structureh]hDisplay pipe structure}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hK[hj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hK[hje!ubjn)}(h``connector`` Connector h](jt)}(h ``connector``h]jz)}(hj!h]h connector}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhK`hj!ubj)}(hhh]h)}(h Connectorh]h Connector}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hK`hj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hK`hje!ubjn)}(h``mode`` Fixed display mode h](jt)}(h``mode``h]jz)}(hj"h]hmode}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKehj"ubj)}(hhh]h)}(hFixed display modeh]hFixed display mode}(hj2"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj."hKehj/"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj."hKehje!ubjn)}(h6``pixel_format`` Native pixel format (DRM_FORMAT\_\*) h](jt)}(h``pixel_format``h]jz)}(hjR"h]h pixel_format}(hjT"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjP"ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKjhjL"ubj)}(hhh]h)}(h$Native pixel format (DRM_FORMAT\_\*)h]h$Native pixel format (DRM_FORMAT_*)}(hjk"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjg"hKjhjh"ubah}(h]h ]h"]h$]h&]uh1jhjL"ubeh}(h]h ]h"]h$]h&]uh1jmhjg"hKjhje!ubjn)}(h:``tx_buf`` Buffer used for transfer (copy clip rect area) h](jt)}(h ``tx_buf``h]jz)}(hj"h]htx_buf}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKohj"ubj)}(hhh]h)}(h.Buffer used for transfer (copy clip rect area)h]h.Buffer used for transfer (copy clip rect area)}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hKohj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hKohje!ubjn)}(h<``rotation`` initial rotation in degrees Counter Clock Wise h](jt)}(h ``rotation``h]jz)}(hj"h]hrotation}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKthj"ubj)}(hhh]h)}(h.initial rotation in degrees Counter Clock Wiseh]h.initial rotation in degrees Counter Clock Wise}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hKthj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hKthje!ubjn)}(hi``left_offset`` Horizontal offset of the display relative to the controller's driver array h](jt)}(h``left_offset``h]jz)}(hj"h]h left_offset}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKzhj"ubj)}(hhh]ji)}(hhh]jn)}(hKHorizontal offset of the display relative to the controller's driver array h](jt)}(h0Horizontal offset of the display relative to theh]h0Horizontal offset of the display relative to the}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jshj#hKzhj#ubj)}(hhh]h)}(hcontroller's driver arrayh]hcontroller’s driver array}(hj.#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKzhj+#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj#hKzhj#ubah}(h]h ]h"]h$]h&]uh1jhhj#ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj#hKzhje!ubjn)}(he``top_offset`` Vertical offset of the display relative to the controller's driver array h](jt)}(h``top_offset``h]jz)}(hj`#h]h top_offset}(hjb#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^#ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjZ#ubj)}(hhh]ji)}(hhh]jn)}(hIVertical offset of the display relative to the controller's driver array h](jt)}(h.Vertical offset of the display relative to theh]h.Vertical offset of the display relative to the}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jshju#hKhj|#ubj)}(hhh]h)}(hcontroller's driver arrayh]hcontroller’s driver array}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhju#hKhj#ubah}(h]h ]h"]h$]h&]uh1jhj|#ubeh}(h]h ]h"]h$]h&]uh1jmhju#hKhjy#ubah}(h]h ]h"]h$]h&]uh1jhhjv#ubah}(h]h ]h"]h$]h&]uh1jhjZ#ubeh}(h]h ]h"]h$]h&]uh1jmhju#hKhje!ubjn)}(h*``backlight`` backlight device (optional) h](jt)}(h ``backlight``h]jz)}(hj#h]h backlight}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj#ubj)}(hhh]h)}(hbacklight device (optional)h]hbacklight device (optional)}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hKhj#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj#hKhje!ubjn)}(h/``regulator`` power regulator (Vdd) (optional) h](jt)}(h ``regulator``h]jz)}(hj#h]h regulator}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj#ubj)}(hhh]h)}(h power regulator (Vdd) (optional)h]h power regulator (Vdd) (optional)}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj$ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj$hKhje!ubjn)}(h7``io_regulator`` I/O power regulator (Vddi) (optional) h](jt)}(h``io_regulator``h]jz)}(hj5$h]h io_regulator}(hj7$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3$ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj/$ubj)}(hhh]h)}(h%I/O power regulator (Vddi) (optional)h]h%I/O power regulator (Vddi) (optional)}(hjN$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJ$hKhjK$ubah}(h]h ]h"]h$]h&]uh1jhj/$ubeh}(h]h ]h"]h$]h&]uh1jmhjJ$hKhje!ubjn)}(h``dbi`` MIPI DBI interface h](jt)}(h``dbi``h]jz)}(hjn$h]hdbi}(hjp$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjl$ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjh$ubj)}(hhh]h)}(hMIPI DBI interfaceh]hMIPI DBI interface}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKhj$ubah}(h]h ]h"]h$]h&]uh1jhjh$ubeh}(h]h ]h"]h$]h&]uh1jmhj$hKhje!ubjn)}(h``driver_private`` Driver private data. Necessary for drivers with private data since devm_drm_dev_alloc() can't allocate structures that embed a structure which then again embeds drm_device.h](jt)}(h``driver_private``h]jz)}(hj$h]hdriver_private}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj$ubj)}(hhh]ji)}(hhh]jn)}(hDriver private data. Necessary for drivers with private data since devm_drm_dev_alloc() can't allocate structures that embed a structure which then again embeds drm_device.h](jt)}(hDriver private data.h]hDriver private data.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jshj$hKhj$ubj)}(hhh]h)}(hNecessary for drivers with private data since devm_drm_dev_alloc() can't allocate structures that embed a structure which then again embeds drm_device.h]hNecessary for drivers with private data since devm_drm_dev_alloc() can’t allocate structures that embed a structure which then again embeds drm_device.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jmhj$hKhj$ubah}(h]h ]h"]h$]h&]uh1jhhj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jmhj$hKhje!ubeh}(h]h ]h"]h$]h&]uh1jhhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dbi_command (C macro)c.mipi_dbi_commandhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hmipi_dbi_commandh]j)}(hmipi_dbi_commandh]j)}(hmipi_dbi_commandh]j)}(hj%%h]hmipi_dbi_command}(hj/%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+%ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj'%hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj#%hhhjB%hKubah}(h]j%ah ](jjeh"]h$]h&]jj)jhuh1jhjB%hKhj %hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj %hhhjB%hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj[%jj[%jjjuh1jhhhjnhNhNubh)}(h'``mipi_dbi_command (dbi, cmd, seq...)``h]jz)}(hja%h]h#mipi_dbi_command (dbi, cmd, seq...)}(hjc%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_%ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjnhhubjT=)}(h,MIPI DCS command with optional parameter(s) h]h)}(h+MIPI DCS command with optional parameter(s)h]h+MIPI DCS command with optional parameter(s)}(hj{%hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjw%ubah}(h]h ]h"]h$]h&]uh1jS=hj%hKhjnhhubj)}(hX**Parameters** ``dbi`` MIPI DBI structure ``cmd`` Command ``seq...`` Optional parameter(s) **Description** Send MIPI DCS command to the controller. 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Use mipi_dbi_command_read() for get/read.h]hRSend MIPI DCS command to the controller. Use mipi_dbi_command_read() for get/read.}(hjx&hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj%ubh)}(h **Return**h]j%)}(hj&h]hReturn}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj%ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj%ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS (C macro)(c.DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCShNtauh1jxhjnhhhNhNubj)}(hhh](j)}(h&DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCSh]j)}(h&DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCSh]j)}(h&DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCSh]j)}(hj&h]h&DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj&hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKubah}(h]h ]h"]h$]h&]jjjuh1jjjhj&hhhj&hKubah}(h]j&ah ](jjeh"]h$]h&]jj)jhuh1jhj&hKhj&hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj&hhhj&hKubeh}(h]h ](jmacroeh"]h$]h&]jjjj&jj&jjjuh1jhhhjnhNhNubh)}(h4``DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS (enable_)``h]jz)}(hj'h]h0DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS (enable_)}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjnhhubjT=)}(hFInitializes struct drm_simple_display_pipe_funcs for MIPI-DBI devices h]h)}(hEInitializes struct drm_simple_display_pipe_funcs for MIPI-DBI devicesh]hEInitializes struct drm_simple_display_pipe_funcs for MIPI-DBI devices}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj'ubah}(h]h ]h"]h$]h&]uh1jS=hj,'hKhjnhhubj)}(hXw**Parameters** ``enable_`` Enable-callback implementation **Description** This macro initializes struct drm_simple_display_pipe_funcs with default values for MIPI-DBI-based devices. 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MIPI-based drivers are encouraged to use this macro for initialization.h](h)}(h**Parameters**h]j%)}(hj9'h]h Parameters}(hj;'hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7'ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj3'ubji)}(hhh]jn)}(h+``enable_`` Enable-callback implementation h](jt)}(h ``enable_``h]jz)}(hjX'h]henable_}(hjZ'hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjV'ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhjR'ubj)}(hhh]h)}(hEnable-callback implementationh]hEnable-callback implementation}(hjq'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjm'hKhjn'ubah}(h]h ]h"]h$]h&]uh1jhjR'ubeh}(h]h ]h"]h$]h&]uh1jmhjm'hKhjO'ubah}(h]h ]h"]h$]h&]uh1jhhj3'ubh)}(h**Description**h]j%)}(hj'h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj3'ubh)}(hX(This macro initializes struct drm_simple_display_pipe_funcs with default values for MIPI-DBI-based devices. The only callback that depends on the hardware is **enable**, for which the driver has to provide an implementation. MIPI-based drivers are encouraged to use this macro for initialization.h](hThis macro initializes struct drm_simple_display_pipe_funcs with default values for MIPI-DBI-based devices. The only callback that depends on the hardware is }(hj'hhhNhNubj%)}(h **enable**h]henable}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'ubh, for which the driver has to provide an implementation. MIPI-based drivers are encouraged to use this macro for initialization.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:345: ./include/drm/drm_mipi_dbi.hhKhj3'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"mipi_dbi_command_read (C function)c.mipi_dbi_command_readhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hAint mipi_dbi_command_read (struct mipi_dbi *dbi, u8 cmd, u8 *val)h]j)}(h@int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val)h](j)}(hinth]hint}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chK|ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'hhhj'hK|ubj)}(hmipi_dbi_command_readh]j)}(hmipi_dbi_command_readh]hmipi_dbi_command_read}(hj (hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj'hhhj'hK|ubj)}(h'(struct mipi_dbi *dbi, u8 cmd, u8 *val)h](j)}(hstruct mipi_dbi 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classnameNjj)}j]ja(c.mipi_dbi_command_readasbuh1hhj(ubj)}(h h]h }(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubj+)}(hj9h]h*}(hj)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj(ubj)}(hvalh]hval}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj(ubeh}(h]h ]h"]h$]h&]jjuh1jhj'hhhj'hK|ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj'hhhj'hK|ubah}(h]j'ah ](jjeh"]h$]h&]jj)jhuh1jhj'hK|hj'hhubj)}(hhh]h)}(hMIPI DCS read commandh]hMIPI DCS read command}(hjG)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chK|hjD)hhubah}(h]h ]h"]h$]h&]uh1jhj'hhhj'hK|ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj_)jj_)jjjuh1jhhhjnhNhNubj)}(h**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure ``u8 cmd`` Command ``u8 *val`` Value read **Description** Send MIPI DCS read command to the controller. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hji)h]h Parameters}(hjk)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjg)ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjc)ubji)}(hhh](jn)}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](jt)}(h``struct mipi_dbi *dbi``h]jz)}(hj)h]hstruct mipi_dbi *dbi}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chK}hj)ubj)}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hK}hj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhj)hK}hj)ubjn)}(h``u8 cmd`` Command h](jt)}(h ``u8 cmd``h]jz)}(hj)h]hu8 cmd}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chK~hj)ubj)}(hhh]h)}(hCommandh]hCommand}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hK~hj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhj)hK~hj)ubjn)}(h``u8 *val`` Value read h](jt)}(h ``u8 *val``h]jz)}(hj)h]hu8 *val}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj)ubj)}(hhh]h)}(h Value readh]h Value read}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hKhj*ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhj*hKhj)ubeh}(h]h ]h"]h$]h&]uh1jhhjc)ubh)}(h**Description**h]j%)}(hj5*h]h Description}(hj7*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3*ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjc)ubh)}(h-Send MIPI DCS read command to the controller.h]h-Send MIPI DCS read command to the controller.}(hjK*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjc)ubh)}(h **Return**h]j%)}(hj\*h]hReturn}(hj^*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjZ*ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjc)ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjr*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjc)ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!mipi_dbi_command_buf (C function)c.mipi_dbi_command_bufhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hMint mipi_dbi_command_buf (struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len)h]j)}(hLint mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len)h](j)}(hinth]hint}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKubj)}(h h]h }(hj*hhhNhNubah}(h]h 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with parameter(s) in an arrayh]h.MIPI DCS command with parameter(s) in an array}(hjF,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjC,hhubah}(h]h ]h"]h$]h&]uh1jhj*hhhj*hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj^,jj^,jjjuh1jhhhjnhNhNubj)}(h**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure ``u8 cmd`` Command ``u8 *data`` Parameter buffer ``size_t len`` Buffer length **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh,h]h Parameters}(hjj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjf,ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjb,ubji)}(hhh](jn)}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](jt)}(h``struct mipi_dbi *dbi``h]jz)}(hj,h]hstruct mipi_dbi *dbi}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj,ubj)}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhj,hKhj~,ubjn)}(h``u8 cmd`` Command h](jt)}(h ``u8 cmd``h]jz)}(hj,h]hu8 cmd}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj,ubj)}(hhh]h)}(hCommandh]hCommand}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhj,hKhj~,ubjn)}(h``u8 *data`` Parameter buffer h](jt)}(h ``u8 *data``h]jz)}(hj,h]hu8 *data}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj,ubj)}(hhh]h)}(hParameter bufferh]hParameter buffer}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhj-hKhj~,ubjn)}(h``size_t len`` Buffer length h](jt)}(h``size_t len``h]jz)}(hj2-h]h size_t len}(hj4-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0-ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj,-ubj)}(hhh]h)}(h Buffer lengthh]h Buffer length}(hjK-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjG-hKhjH-ubah}(h]h ]h"]h$]h&]uh1jhj,-ubeh}(h]h ]h"]h$]h&]uh1jmhjG-hKhj~,ubeh}(h]h ]h"]h$]h&]uh1jhhjb,ubh)}(h **Return**h]j%)}(hjm-h]hReturn}(hjo-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjk-ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjb,ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjb,ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dbi_buf_copy (C function)c.mipi_dbi_buf_copyhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hint mipi_dbi_buf_copy (void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h]j)}(hint mipi_dbi_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h](j)}(hinth]hint}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-hhhj-hKubj)}(hmipi_dbi_buf_copyh]j)}(hmipi_dbi_buf_copyh]hmipi_dbi_buf_copy}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj-hhhj-hKubj)}(h(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state)h](j)}(h void *dsth](j)}(hvoidh]hvoid}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj+)}(hj9h]h*}(hj .hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-ubj)}(hdsth]hdst}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubj)}(hstruct iosys_map *srch](j)}(hjh]hstruct}(hj1.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-.ubj)}(h h]h }(hj>.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-.ubh)}(hhh]j)}(h iosys_maph]h iosys_map}(hjO.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQ.modnameN classnameNjj)}j]j)}jj-sbc.mipi_dbi_buf_copyasbuh1hhj-.ubj)}(h h]h }(hjo.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-.ubj+)}(hj9h]h*}(hj}.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-.ubj)}(hsrch]hsrc}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubj)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]jk.c.mipi_dbi_buf_copyasbuh1hhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj.ubj)}(hfbh]hfb}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubj)}(hstruct drm_rect *cliph](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj /hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj1/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj./ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj3/modnameN classnameNjj)}j]jk.c.mipi_dbi_buf_copyasbuh1hhj/ubj)}(h h]h }(hjO/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj+)}(hj9h]h*}(hj]/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj)}(hcliph]hclip}(hjj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubj)}(h bool swaph](j)}(hjAh]hbool}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(hswaph]hswap}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubj)}(h*struct drm_format_conv_state *fmtcnv_stateh](j)}(hjh]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(hdrm_format_conv_stateh]hdrm_format_conv_state}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/modnameN classnameNjj)}j]jk.c.mipi_dbi_buf_copyasbuh1hhj/ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj+)}(hj9h]h*}(hj0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj)}(h fmtcnv_stateh]h fmtcnv_state}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubeh}(h]h ]h"]h$]h&]jjuh1jhj-hhhj-hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj-hhhj-hKubah}(h]j-ah ](jjeh"]h$]h&]jj)jhuh1jhj-hKhj-hhubj)}(hhh]h)}(h0Copy a framebuffer, transforming it if necessaryh]h0Copy a framebuffer, transforming it if necessary}(hj80hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj50hhubah}(h]h ]h"]h$]h&]uh1jhj-hhhj-hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjP0jjP0jjjuh1jhhhjnhNhNubj)}(hX**Parameters** ``void *dst`` The destination buffer ``struct iosys_map *src`` The source buffer ``struct drm_framebuffer *fb`` The source framebuffer ``struct drm_rect *clip`` Clipping rectangle of the area to be copied ``bool swap`` When true, swap MSB/LSB of 16-bit values ``struct drm_format_conv_state *fmtcnv_state`` Format-conversion state **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjZ0h]h Parameters}(hj\0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjX0ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjT0ubji)}(hhh](jn)}(h%``void *dst`` The destination buffer h](jt)}(h ``void *dst``h]jz)}(hjy0h]h void *dst}(hj{0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjw0ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjs0ubj)}(hhh]h)}(hThe destination bufferh]hThe destination buffer}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKhj0ubah}(h]h ]h"]h$]h&]uh1jhjs0ubeh}(h]h ]h"]h$]h&]uh1jmhj0hKhjp0ubjn)}(h,``struct iosys_map *src`` The source buffer h](jt)}(h``struct iosys_map *src``h]jz)}(hj0h]hstruct iosys_map *src}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj0ubj)}(hhh]h)}(hThe source bufferh]hThe source buffer}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hKhj0ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhj0hKhjp0ubjn)}(h6``struct drm_framebuffer *fb`` The source framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hj0h]hstruct drm_framebuffer *fb}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj0ubj)}(hhh]h)}(hThe source framebufferh]hThe source framebuffer}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hKhj1ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jmhj1hKhjp0ubjn)}(hF``struct drm_rect *clip`` Clipping rectangle of the area to be copied h](jt)}(h``struct drm_rect *clip``h]jz)}(hj$1h]hstruct drm_rect *clip}(hj&1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"1ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj1ubj)}(hhh]h)}(h+Clipping rectangle of the area to be copiedh]h+Clipping rectangle of the area to be copied}(hj=1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj91hKhj:1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhj91hKhjp0ubjn)}(h7``bool swap`` When true, swap MSB/LSB of 16-bit values h](jt)}(h ``bool swap``h]jz)}(hj]1h]h bool swap}(hj_1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[1ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjW1ubj)}(hhh]h)}(h(When true, swap MSB/LSB of 16-bit valuesh]h(When true, swap MSB/LSB of 16-bit values}(hjv1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr1hKhjs1ubah}(h]h ]h"]h$]h&]uh1jhjW1ubeh}(h]h ]h"]h$]h&]uh1jmhjr1hKhjp0ubjn)}(hG``struct drm_format_conv_state *fmtcnv_state`` Format-conversion state h](jt)}(h.``struct drm_format_conv_state *fmtcnv_state``h]jz)}(hj1h]h*struct drm_format_conv_state *fmtcnv_state}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhj1ubj)}(hhh]h)}(hFormat-conversion stateh]hFormat-conversion state}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hKhj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhj1hKhjp0ubeh}(h]h ]h"]h$]h&]uh1jhhjT0ubh)}(h **Return**h]j%)}(hj1h]hReturn}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjT0ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chKhjT0ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%mipi_dbi_pipe_mode_valid (C function)c.mipi_dbi_pipe_mode_validhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hyenum drm_mode_status mipi_dbi_pipe_mode_valid (struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode)h]j)}(hxenum drm_mode_status mipi_dbi_pipe_mode_valid(struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode)h](j)}(hj8h]henum}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM@ubj)}(h h]h }(hj$2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhj#2hM@ubh)}(hhh]j)}(hdrm_mode_statush]hdrm_mode_status}(hj52hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj22ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj72modnameN classnameNjj)}j]j)}jmipi_dbi_pipe_mode_validsbc.mipi_dbi_pipe_mode_validasbuh1hhj2hhhj#2hM@ubj)}(h h]h }(hjV2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhj#2hM@ubj)}(hmipi_dbi_pipe_mode_validh]j)}(hjS2h]hmipi_dbi_pipe_mode_valid}(hjh2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjd2ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj2hhhj#2hM@ubj)}(hK(struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode)h](j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj2modnameN classnameNjj)}j]jQ2c.mipi_dbi_pipe_mode_validasbuh1hhj2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj+)}(hj9h]h*}(hj2hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj2ubj)}(hpipeh]hpipe}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj{2ubj)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hj,3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)3ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.3modnameN classnameNjj)}j]jQ2c.mipi_dbi_pipe_mode_validasbuh1hhj2ubj)}(h h]h }(hjJ3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubj+)}(hj9h]h*}(hjX3hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj2ubj)}(hmodeh]hmode}(hje3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj{2ubeh}(h]h ]h"]h$]h&]jjuh1jhj2hhhj#2hM@ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj2hhhj#2hM@ubah}(h]j 2ah ](jjeh"]h$]h&]jj)jhuh1jhj#2hM@hj 2hhubj)}(hhh]h)}(hMIPI DBI mode-valid helperh]hMIPI DBI mode-valid helper}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM@hj3hhubah}(h]h ]h"]h$]h&]uh1jhj 2hhhj#2hM@ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj3jj3jjjuh1jhhhjnhNhNubj)}(hXn**Parameters** ``struct drm_simple_display_pipe *pipe`` Simple display pipe ``const struct drm_display_mode *mode`` The mode to test **Description** This function validates a given display mode against the MIPI DBI's hardware display. Drivers can use this as their :c:type:`drm_simple_display_pipe_funcs->mode_valid ` callback.h](h)}(h**Parameters**h]j%)}(hj3h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMDhj3ubji)}(hhh](jn)}(h=``struct drm_simple_display_pipe *pipe`` Simple display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hj3h]h$struct drm_simple_display_pipe *pipe}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMAhj3ubj)}(hhh]h)}(hSimple display pipeh]hSimple display pipe}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMAhj3ubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jmhj3hMAhj3ubjn)}(h9``const struct drm_display_mode *mode`` The mode to test h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hj 4h]h#const struct drm_display_mode *mode}(hj 4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMBhj4ubj)}(hhh]h)}(hThe mode to testh]hThe mode to test}(hj"4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMBhj4ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhj4hMBhj3ubeh}(h]h ]h"]h$]h&]uh1jhhj3ubh)}(h**Description**h]j%)}(hjD4h]h Description}(hjF4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjB4ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMDhj3ubh)}(hThis function validates a given display mode against the MIPI DBI's hardware display. Drivers can use this as their :c:type:`drm_simple_display_pipe_funcs->mode_valid ` callback.h](hvThis function validates a given display mode against the MIPI DBI’s hardware display. Drivers can use this as their }(hjZ4hhhNhNubh)}(hS:c:type:`drm_simple_display_pipe_funcs->mode_valid `h]jz)}(hjd4h]h)drm_simple_display_pipe_funcs->mode_valid}(hjf4hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjb4ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipe_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMChjZ4ubh callback.}(hjZ4hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj4hMChj3ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!mipi_dbi_pipe_update (C function)c.mipi_dbi_pipe_updatehNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hcvoid mipi_dbi_pipe_update (struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_state)h]j)}(hbvoid mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_state)h](j)}(hvoidh]hvoid}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMRubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhj4hMRubj)}(hmipi_dbi_pipe_updateh]j)}(hmipi_dbi_pipe_updateh]hmipi_dbi_pipe_update}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj4hhhj4hMRubj)}(hI(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj 5modnameN classnameNjj)}j]j)}jj4sbc.mipi_dbi_pipe_updateasbuh1hhj4ubj)}(h h]h }(hj'5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubj+)}(hj9h]h*}(hj55hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj4ubj)}(hpipeh]hpipe}(hjB5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubj)}(h!struct drm_plane_state *old_stateh](j)}(hjh]hstruct}(hj[5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW5ubj)}(h h]h }(hjh5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW5ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjy5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{5modnameN classnameNjj)}j]j#5c.mipi_dbi_pipe_updateasbuh1hhjW5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW5ubj+)}(hj9h]h*}(hj5hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjW5ubj)}(h old_stateh]h old_state}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW5ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubeh}(h]h ]h"]h$]h&]jjuh1jhj4hhhj4hMRubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj4hhhj4hMRubah}(h]j4ah ](jjeh"]h$]h&]jj)jhuh1jhj4hMRhj4hhubj)}(hhh]h)}(hDisplay pipe update helperh]hDisplay pipe update helper}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMRhj5hhubah}(h]h ]h"]h$]h&]uh1jhj4hhhj4hMRubeh}(h]h ](jfunctioneh"]h$]h&]jjjj5jj5jjjuh1jhhhjnhNhNubj)}(hXO**Parameters** ``struct drm_simple_display_pipe *pipe`` Simple display pipe ``struct drm_plane_state *old_state`` Old plane state **Description** This function handles framebuffer flushing and vblank events. Drivers can use this as their :c:type:`drm_simple_display_pipe_funcs->update ` callback.h](h)}(h**Parameters**h]j%)}(hj5h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMVhj5ubji)}(hhh](jn)}(h=``struct drm_simple_display_pipe *pipe`` Simple display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hj6h]h$struct drm_simple_display_pipe *pipe}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj6ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMShj6ubj)}(hhh]h)}(hSimple display pipeh]hSimple display pipe}(hj66hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj26hMShj36ubah}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jmhj26hMShj6ubjn)}(h6``struct drm_plane_state *old_state`` Old plane state h](jt)}(h%``struct drm_plane_state *old_state``h]jz)}(hjV6h]h!struct drm_plane_state *old_state}(hjX6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjT6ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMThjP6ubj)}(hhh]h)}(hOld plane stateh]hOld plane state}(hjo6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjk6hMThjl6ubah}(h]h ]h"]h$]h&]uh1jhjP6ubeh}(h]h ]h"]h$]h&]uh1jmhjk6hMThj6ubeh}(h]h ]h"]h$]h&]uh1jhhj5ubh)}(h**Description**h]j%)}(hj6h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMVhj5ubh)}(hThis function handles framebuffer flushing and vblank events. Drivers can use this as their :c:type:`drm_simple_display_pipe_funcs->update ` callback.h](h\This function handles framebuffer flushing and vblank events. Drivers can use this as their }(hj6hhhNhNubh)}(hO:c:type:`drm_simple_display_pipe_funcs->update `h]jz)}(hj6h]h%drm_simple_display_pipe_funcs->update}(hj6hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj6ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipe_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMUhj6ubh callback.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj6hMUhj5ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"mipi_dbi_enable_flush (C function)c.mipi_dbi_enable_flushhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hvoid mipi_dbi_enable_flush (struct mipi_dbi_dev *dbidev, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state)h]j)}(hvoid mipi_dbi_enable_flush(struct mipi_dbi_dev *dbidev, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMtubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhj7hMtubj)}(hmipi_dbi_enable_flushh]j)}(hmipi_dbi_enable_flushh]hmipi_dbi_enable_flush}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj6hhhj7hMtubj)}(he(struct mipi_dbi_dev *dbidev, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state)h](j)}(hstruct mipi_dbi_dev *dbidevh](j)}(hjh]hstruct}(hj67hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj27ubj)}(h h]h }(hjC7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj27ubh)}(hhh]j)}(h mipi_dbi_devh]h mipi_dbi_dev}(hjT7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQ7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjV7modnameN classnameNjj)}j]j)}jj7sbc.mipi_dbi_enable_flushasbuh1hhj27ubj)}(h h]h }(hjt7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj27ubj+)}(hj9h]h*}(hj7hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj27ubj)}(hdbidevh]hdbidev}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj27ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj.7ubj)}(h!struct drm_crtc_state *crtc_stateh](j)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubh)}(hhh]j)}(hdrm_crtc_stateh]hdrm_crtc_state}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7modnameN classnameNjj)}j]jp7c.mipi_dbi_enable_flushasbuh1hhj7ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj+)}(hj9h]h*}(hj7hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj7ubj)}(h crtc_stateh]h crtc_state}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj.7ubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj)}(h h]h }(hj%8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj68hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj38ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj88modnameN classnameNjj)}j]jp7c.mipi_dbi_enable_flushasbuh1hhj8ubj)}(h h]h }(hjT8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj+)}(hj9h]h*}(hjb8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj8ubj)}(h plane_stateh]h plane_state}(hjo8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj.7ubeh}(h]h ]h"]h$]h&]jjuh1jhj6hhhj7hMtubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj6hhhj7hMtubah}(h]j6ah ](jjeh"]h$]h&]jj)jhuh1jhj7hMthj6hhubj)}(hhh]h)}(hMIPI DBI enable helperh]hMIPI DBI enable helper}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMthj8hhubah}(h]h ]h"]h$]h&]uh1jhj6hhhj7hMtubeh}(h]h ](jfunctioneh"]h$]h&]jjjj8jj8jjjuh1jhhhjnhNhNubj)}(hX&**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure ``struct drm_crtc_state *crtc_state`` CRTC state ``struct drm_plane_state *plane_state`` Plane state **Description** Flushes the whole framebuffer and enables the backlight. Drivers can use this in their :c:type:`drm_simple_display_pipe_funcs->enable ` callback. **Note** Drivers which don't use mipi_dbi_pipe_update() because they have custom framebuffer flushing, can't use this function since they both use the same flushing code.h](h)}(h**Parameters**h]j%)}(hj8h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMxhj8ubji)}(hhh](jn)}(h:``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure h](jt)}(h``struct mipi_dbi_dev *dbidev``h]jz)}(hj8h]hstruct mipi_dbi_dev *dbidev}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMuhj8ubj)}(hhh]h)}(hMIPI DBI device structureh]hMIPI DBI device structure}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMuhj8ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jmhj8hMuhj8ubjn)}(h1``struct drm_crtc_state *crtc_state`` CRTC state h](jt)}(h%``struct drm_crtc_state *crtc_state``h]jz)}(hj9h]h!struct drm_crtc_state *crtc_state}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMvhj 9ubj)}(hhh]h)}(h CRTC stateh]h CRTC state}(hj,9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(9hMvhj)9ubah}(h]h ]h"]h$]h&]uh1jhj 9ubeh}(h]h ]h"]h$]h&]uh1jmhj(9hMvhj8ubjn)}(h4``struct drm_plane_state *plane_state`` Plane state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hjL9h]h#struct drm_plane_state *plane_state}(hjN9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJ9ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMwhjF9ubj)}(hhh]h)}(h Plane stateh]h Plane state}(hje9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhja9hMwhjb9ubah}(h]h ]h"]h$]h&]uh1jhjF9ubeh}(h]h ]h"]h$]h&]uh1jmhja9hMwhj8ubeh}(h]h ]h"]h$]h&]uh1jhhj8ubh)}(h**Description**h]j%)}(hj9h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMyhj8ubh)}(hFlushes the whole framebuffer and enables the backlight. Drivers can use this in their :c:type:`drm_simple_display_pipe_funcs->enable ` callback.h](hWFlushes the whole framebuffer and enables the backlight. Drivers can use this in their }(hj9hhhNhNubh)}(hO:c:type:`drm_simple_display_pipe_funcs->enable `h]jz)}(hj9h]h%drm_simple_display_pipe_funcs->enable}(hj9hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipe_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMxhj9ubh callback.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj9hMxhj8ubh)}(h**Note**h]j%)}(hj9h]hNote}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM{hj8ubh)}(hDrivers which don't use mipi_dbi_pipe_update() because they have custom framebuffer flushing, can't use this function since they both use the same flushing code.h]hDrivers which don’t use mipi_dbi_pipe_update() because they have custom framebuffer flushing, can’t use this function since they both use the same flushing code.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM|hj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"mipi_dbi_pipe_disable (C function)c.mipi_dbi_pipe_disablehNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hAvoid mipi_dbi_pipe_disable (struct drm_simple_display_pipe *pipe)h]j)}(h@void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe)h](j)}(hvoidh]hvoid}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hj%:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhj$:hMubj)}(hmipi_dbi_pipe_disableh]j)}(hmipi_dbi_pipe_disableh]hmipi_dbi_pipe_disable}(hj7:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3:ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj:hhhj$:hMubj)}(h&(struct drm_simple_display_pipe *pipe)h]j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hjS:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO:ubj)}(h h]h }(hj`:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO:ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hjq:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjs:modnameN classnameNjj)}j]j)}jj9:sbc.mipi_dbi_pipe_disableasbuh1hhjO:ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO:ubj+)}(hj9h]h*}(hj:hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjO:ubj)}(hpipeh]hpipe}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjO:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjK:ubah}(h]h ]h"]h$]h&]jjuh1jhj:hhhj$:hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj:hhhj$:hMubah}(h]j :ah ](jjeh"]h$]h&]jj)jhuh1jhj$:hMhj :hhubj)}(hhh]h)}(hMIPI DBI pipe disable helperh]hMIPI DBI pipe disable helper}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj:hhubah}(h]h ]h"]h$]h&]uh1jhj :hhhj$:hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj:jj:jjjuh1jhhhjnhNhNubj)}(hXJ**Parameters** ``struct drm_simple_display_pipe *pipe`` Display pipe **Description** This function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their :c:type:`drm_simple_display_pipe_funcs->disable ` callback.h](h)}(h**Parameters**h]j%)}(hj:h]h Parameters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj:ubji)}(hhh]jn)}(h6``struct drm_simple_display_pipe *pipe`` Display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hj;h]h$struct drm_simple_display_pipe *pipe}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj;ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj;ubj)}(hhh]h)}(h Display pipeh]h Display pipe}(hj0;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,;hMhj-;ubah}(h]h ]h"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]uh1jmhj,;hMhj;ubah}(h]h ]h"]h$]h&]uh1jhhj:ubh)}(h**Description**h]j%)}(hjR;h]h Description}(hjT;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjP;ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj:ubh)}(hThis function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their :c:type:`drm_simple_display_pipe_funcs->disable ` callback.h](hThis function disables backlight if present, if not the display memory is blanked. The regulator is disabled if in use. Drivers can use this as their }(hjh;hhhNhNubh)}(hP:c:type:`drm_simple_display_pipe_funcs->disable `h]jz)}(hjr;h]h&drm_simple_display_pipe_funcs->disable}(hjt;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjp;ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipe_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjh;ubh callback.}(hjh;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj;hMhj:ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*mipi_dbi_pipe_begin_fb_access (C function)c.mipi_dbi_pipe_begin_fb_accesshNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hmint mipi_dbi_pipe_begin_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j)}(hlint mipi_dbi_pipe_begin_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hinth]hint}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;hhhj;hMubj)}(hmipi_dbi_pipe_begin_fb_accessh]j)}(hmipi_dbi_pipe_begin_fb_accessh]hmipi_dbi_pipe_begin_fb_access}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj;hhhj;hMubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j)}jj;sbc.mipi_dbi_pipe_begin_fb_accessasbuh1hhj;ubj)}(h h]h }(hj5<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubj+)}(hj9h]h*}(hjC<hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj;ubj)}(hpipeh]hpipe}(hjP<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hji<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje<ubj)}(h h]h }(hjv<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje<ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj<modnameN classnameNjj)}j]j1<c.mipi_dbi_pipe_begin_fb_accessasbuh1hhje<ubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje<ubj+)}(hj9h]h*}(hj<hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hje<ubj)}(h plane_stateh]h plane_state}(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhje<ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj;ubeh}(h]h ]h"]h$]h&]jjuh1jhj;hhhj;hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj;hhhj;hMubah}(h]j;ah ](jjeh"]h$]h&]jj)jhuh1jhj;hMhj;hhubj)}(hhh]h)}(h!MIPI DBI pipe begin-access helperh]h!MIPI DBI pipe begin-access helper}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj<hhubah}(h]h ]h"]h$]h&]uh1jhj;hhhj;hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj=jj=jjjuh1jhhhjnhNhNubj)}(hX**Parameters** ``struct drm_simple_display_pipe *pipe`` Display pipe ``struct drm_plane_state *plane_state`` Plane state **Description** This function implements struct :c:type:`drm_simple_display_funcs.begin_fb_access `. See drm_gem_begin_shadow_fb_access() for details and mipi_dbi_pipe_cleanup_fb() for cleanup. **Return** 0 on success, or a negative errno code otherwise.h](h)}(h**Parameters**h]j%)}(hj =h]h Parameters}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj =ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj=ubji)}(hhh](jn)}(h6``struct drm_simple_display_pipe *pipe`` Display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hj+=h]h$struct drm_simple_display_pipe *pipe}(hj-=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)=ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj%=ubj)}(hhh]h)}(h Display pipeh]h Display pipe}(hjD=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@=hMhjA=ubah}(h]h ]h"]h$]h&]uh1jhj%=ubeh}(h]h ]h"]h$]h&]uh1jmhj@=hMhj"=ubjn)}(h4``struct drm_plane_state *plane_state`` Plane state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hjd=h]h#struct drm_plane_state *plane_state}(hjf=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjb=ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj^=ubj)}(hhh]h)}(h Plane stateh]h Plane state}(hj}=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjy=hMhjz=ubah}(h]h ]h"]h$]h&]uh1jhj^=ubeh}(h]h ]h"]h$]h&]uh1jmhjy=hMhj"=ubeh}(h]h ]h"]h$]h&]uh1jhhj=ubh)}(h**Description**h]j%)}(hj=h]h Description}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj=ubh)}(hnThis function implements struct :c:type:`drm_simple_display_funcs.begin_fb_access `.h](h This function implements struct }(hj=hhhNhNubh)}(hM:c:type:`drm_simple_display_funcs.begin_fb_access `h]jz)}(hj=h]h(drm_simple_display_funcs.begin_fb_access}(hj=hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj=ubh.}(hj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj=hMhj=ubh)}(h\See drm_gem_begin_shadow_fb_access() for details and mipi_dbi_pipe_cleanup_fb() for cleanup.h]h\See drm_gem_begin_shadow_fb_access() for details and mipi_dbi_pipe_cleanup_fb() for cleanup.}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj=ubh)}(h **Return**h]j%)}(hj=h]hReturn}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj=ubh)}(h10 on success, or a negative errno code otherwise.h]h10 on success, or a negative errno code otherwise.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj=ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(mipi_dbi_pipe_end_fb_access (C function)c.mipi_dbi_pipe_end_fb_accesshNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hlvoid mipi_dbi_pipe_end_fb_access (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j)}(hkvoid mipi_dbi_pipe_end_fb_access(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hj=>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9>hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hjL>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9>hhhjK>hMubj)}(hmipi_dbi_pipe_end_fb_accessh]j)}(hmipi_dbi_pipe_end_fb_accessh]hmipi_dbi_pipe_end_fb_access}(hj^>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZ>ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj9>hhhjK>hMubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hjz>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv>ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj>modnameN classnameNjj)}j]j)}jj`>sbc.mipi_dbi_pipe_end_fb_accessasbuh1hhjv>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv>ubj+)}(hj9h]h*}(hj>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjv>ubj)}(hpipeh]hpipe}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjv>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjr>ubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj ?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj ?modnameN classnameNjj)}j]j>c.mipi_dbi_pipe_end_fb_accessasbuh1hhj>ubj)}(h h]h }(hj(?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj+)}(hj9h]h*}(hj6?hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj>ubj)}(h plane_stateh]h plane_state}(hjC?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjr>ubeh}(h]h ]h"]h$]h&]jjuh1jhj9>hhhjK>hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj5>hhhjK>hMubah}(h]j0>ah ](jjeh"]h$]h&]jj)jhuh1jhjK>hMhj2>hhubj)}(hhh]h)}(hMIPI DBI pipe end-access helperh]hMIPI DBI pipe end-access helper}(hjm?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjj?hhubah}(h]h ]h"]h$]h&]uh1jhj2>hhhjK>hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj?jj?jjjuh1jhhhjnhNhNubj)}(hX#**Parameters** ``struct drm_simple_display_pipe *pipe`` Display pipe ``struct drm_plane_state *plane_state`` Plane state **Description** This function implements struct :c:type:`drm_simple_display_funcs.end_fb_access `. See mipi_dbi_pipe_begin_fb_access().h](h)}(h**Parameters**h]j%)}(hj?h]h Parameters}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubji)}(hhh](jn)}(h6``struct drm_simple_display_pipe *pipe`` Display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hj?h]h$struct drm_simple_display_pipe *pipe}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubj)}(hhh]h)}(h Display pipeh]h Display pipe}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMhj?ubjn)}(h4``struct drm_plane_state *plane_state`` Plane state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hj?h]h#struct drm_plane_state *plane_state}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubj)}(hhh]h)}(h Plane stateh]h Plane state}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMhj?ubeh}(h]h ]h"]h$]h&]uh1jhhj?ubh)}(h**Description**h]j%)}(hj"@h]h Description}(hj$@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj @ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubh)}(hlThis function implements struct :c:type:`drm_simple_display_funcs.end_fb_access `.h](h This function implements struct }(hj8@hhhNhNubh)}(hK:c:type:`drm_simple_display_funcs.end_fb_access `h]jz)}(hjB@h]h&drm_simple_display_funcs.end_fb_access}(hjD@hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj@@ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj8@ubh.}(hj8@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj_@hMhj?ubh)}(h$See mipi_dbi_pipe_begin_fb_access().h]h$See mipi_dbi_pipe_begin_fb_access().}(hjj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj?ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&mipi_dbi_pipe_reset_plane (C function)c.mipi_dbi_pipe_reset_planehNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hEvoid mipi_dbi_pipe_reset_plane (struct drm_simple_display_pipe *pipe)h]j)}(hDvoid mipi_dbi_pipe_reset_plane(struct drm_simple_display_pipe *pipe)h](j)}(hvoidh]hvoid}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhj@hMubj)}(hmipi_dbi_pipe_reset_planeh]j)}(hmipi_dbi_pipe_reset_planeh]hmipi_dbi_pipe_reset_plane}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@hhhj@hMubj)}(h&(struct drm_simple_display_pipe *pipe)h]j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@modnameN classnameNjj)}j]j)}jj@sbc.mipi_dbi_pipe_reset_planeasbuh1hhj@ubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj+)}(hj9h]h*}(hj"AhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubj)}(hpipeh]hpipe}(hj/AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj@ubah}(h]h ]h"]h$]h&]jjuh1jhj@hhhj@hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj@hhhj@hMubah}(h]j@ah ](jjeh"]h$]h&]jj)jhuh1jhj@hMhj@hhubj)}(hhh]h)}(hMIPI DBI plane-reset helperh]hMIPI DBI plane-reset helper}(hjYAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjVAhhubah}(h]h ]h"]h$]h&]uh1jhj@hhhj@hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjqAjjqAjjjuh1jhhhjnhNhNubj)}(h**Parameters** ``struct drm_simple_display_pipe *pipe`` Display pipe **Description** This function implements struct :c:type:`drm_simple_display_funcs.reset_plane ` for MIPI DBI planes.h](h)}(h**Parameters**h]j%)}(hj{Ah]h Parameters}(hj}AhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyAubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjuAubji)}(hhh]jn)}(h6``struct drm_simple_display_pipe *pipe`` Display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hjAh]h$struct drm_simple_display_pipe *pipe}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjAubj)}(hhh]h)}(h Display pipeh]h Display pipe}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhMhjAubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jmhjAhMhjAubah}(h]h ]h"]h$]h&]uh1jhhjuAubh)}(h**Description**h]j%)}(hjAh]h Description}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjuAubh)}(h~This function implements struct :c:type:`drm_simple_display_funcs.reset_plane ` for MIPI DBI planes.h](h This function implements struct }(hjAhhhNhNubh)}(hI:c:type:`drm_simple_display_funcs.reset_plane `h]jz)}(hjAh]h$drm_simple_display_funcs.reset_plane}(hjAhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjAubh for MIPI DBI planes.}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjBhMhjuAubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0mipi_dbi_pipe_duplicate_plane_state (C function)%c.mipi_dbi_pipe_duplicate_plane_statehNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hcstruct drm_plane_state * mipi_dbi_pipe_duplicate_plane_state (struct drm_simple_display_pipe *pipe)h]j)}(hastruct drm_plane_state *mipi_dbi_pipe_duplicate_plane_state(struct drm_simple_display_pipe *pipe)h](j)}(hjh]hstruct}(hj=BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9Bhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hjKBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9BhhhjJBhMubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hj\BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYBubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj^BmodnameN classnameNjj)}j]j)}j#mipi_dbi_pipe_duplicate_plane_statesb%c.mipi_dbi_pipe_duplicate_plane_stateasbuh1hhj9BhhhjJBhMubj)}(h h]h }(hj}BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9BhhhjJBhMubj+)}(hj9h]h*}(hjBhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj9BhhhjJBhMubj)}(h#mipi_dbi_pipe_duplicate_plane_stateh]j)}(hjzBh]h#mipi_dbi_pipe_duplicate_plane_state}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ](jjeh"]h$]h&]jjuh1jhj9BhhhjJBhMubj)}(h&(struct drm_simple_display_pipe *pipe)h]j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjBmodnameN classnameNjj)}j]jxB%c.mipi_dbi_pipe_duplicate_plane_stateasbuh1hhjBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj+)}(hj9h]h*}(hjChhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBubj)}(hpipeh]hpipe}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjBubah}(h]h ]h"]h$]h&]jjuh1jhj9BhhhjJBhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj5BhhhjJBhMubah}(h]j0Bah ](jjeh"]h$]h&]jj)jhuh1jhjJBhMhj2Bhhubj)}(hhh]h)}(hduplicates MIPI DBI plane stateh]hduplicates MIPI DBI plane state}(hj8ChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj5Chhubah}(h]h ]h"]h$]h&]uh1jhj2BhhhjJBhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjPCjjPCjjjuh1jhhhjnhNhNubj)}(hXq**Parameters** ``struct drm_simple_display_pipe *pipe`` Display pipe **Description** This function implements struct :c:type:`drm_simple_display_funcs.duplicate_plane_state ` for MIPI DBI planes. See drm_gem_duplicate_shadow_plane_state() for additional details. **Return** A pointer to a new plane state on success, or NULL otherwise.h](h)}(h**Parameters**h]j%)}(hjZCh]h Parameters}(hj\ChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjTCubji)}(hhh]jn)}(h6``struct drm_simple_display_pipe *pipe`` Display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hjyCh]h$struct drm_simple_display_pipe *pipe}(hj{ChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwCubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjsCubj)}(hhh]h)}(h Display pipeh]h Display pipe}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhjChMhjCubah}(h]h ]h"]h$]h&]uh1jhjsCubeh}(h]h ]h"]h$]h&]uh1jmhjChMhjpCubah}(h]h ]h"]h$]h&]uh1jhhjTCubh)}(h**Description**h]j%)}(hjCh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjCubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjTCubh)}(hThis function implements struct :c:type:`drm_simple_display_funcs.duplicate_plane_state ` for MIPI DBI planes.h](h This function implements struct }(hjChhhNhNubh)}(hS:c:type:`drm_simple_display_funcs.duplicate_plane_state `h]jz)}(hjCh]h.drm_simple_display_funcs.duplicate_plane_state}(hjChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjCubh for MIPI DBI planes.}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChMhjTCubh)}(hBSee drm_gem_duplicate_shadow_plane_state() for additional details.h]hBSee drm_gem_duplicate_shadow_plane_state() for additional details.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjTCubh)}(h **Return**h]j%)}(hj Dh]hReturn}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj Dubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjTCubh)}(h=A pointer to a new plane state on success, or NULL otherwise.h]h=A pointer to a new plane state on success, or NULL otherwise.}(hj#DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjTCubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.mipi_dbi_pipe_destroy_plane_state (C function)#c.mipi_dbi_pipe_destroy_plane_statehNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hrvoid mipi_dbi_pipe_destroy_plane_state (struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h]j)}(hqvoid mipi_dbi_pipe_destroy_plane_state(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(hvoidh]hvoid}(hjRDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNDhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hjaDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNDhhhj`DhMubj)}(h!mipi_dbi_pipe_destroy_plane_stateh]j)}(h!mipi_dbi_pipe_destroy_plane_stateh]h!mipi_dbi_pipe_destroy_plane_state}(hjsDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoDubah}(h]h ](jjeh"]h$]h&]jjuh1jhjNDhhhj`DhMubj)}(hK(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state)h](j)}(h$struct drm_simple_display_pipe *pipeh](j)}(hjh]hstruct}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubh)}(hhh]j)}(hdrm_simple_display_pipeh]hdrm_simple_display_pipe}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDmodnameN classnameNjj)}j]j)}jjuDsb#c.mipi_dbi_pipe_destroy_plane_stateasbuh1hhjDubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj+)}(hj9h]h*}(hjDhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjDubj)}(hpipeh]hpipe}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjDubj)}(h#struct drm_plane_state *plane_stateh](j)}(hjh]hstruct}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubh)}(hhh]j)}(hdrm_plane_stateh]hdrm_plane_state}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!EmodnameN classnameNjj)}j]jD#c.mipi_dbi_pipe_destroy_plane_stateasbuh1hhjDubj)}(h h]h }(hj=EhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubj+)}(hj9h]h*}(hjKEhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjDubj)}(h plane_stateh]h plane_state}(hjXEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjDubeh}(h]h ]h"]h$]h&]jjuh1jhjNDhhhj`DhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjJDhhhj`DhMubah}(h]jEDah ](jjeh"]h$]h&]jj)jhuh1jhj`DhMhjGDhhubj)}(hhh]h)}(hcleans up MIPI DBI plane stateh]hcleans up MIPI DBI plane state}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjEhhubah}(h]h ]h"]h$]h&]uh1jhjGDhhhj`DhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjEjjEjjjuh1jhhhjnhNhNubj)}(hX4**Parameters** ``struct drm_simple_display_pipe *pipe`` Display pipe ``struct drm_plane_state *plane_state`` Plane state **Description** This function implements struct drm_simple_display_funcs.destroy_plane_state for MIPI DBI planes. See drm_gem_destroy_shadow_plane_state() for additional details.h](h)}(h**Parameters**h]j%)}(hjEh]h Parameters}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjEubji)}(hhh](jn)}(h6``struct drm_simple_display_pipe *pipe`` Display pipe h](jt)}(h(``struct drm_simple_display_pipe *pipe``h]jz)}(hjEh]h$struct drm_simple_display_pipe *pipe}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjEubj)}(hhh]h)}(h Display pipeh]h Display pipe}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMhjEubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhjEhMhjEubjn)}(h4``struct drm_plane_state *plane_state`` Plane state h](jt)}(h'``struct drm_plane_state *plane_state``h]jz)}(hjEh]h#struct drm_plane_state *plane_state}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjEubj)}(hhh]h)}(h Plane stateh]h Plane state}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjFubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jmhjFhMhjEubeh}(h]h ]h"]h$]h&]uh1jhhjEubh)}(h**Description**h]j%)}(hj7Fh]h Description}(hj9FhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5Fubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjEubh)}(haThis function implements struct drm_simple_display_funcs.destroy_plane_state for MIPI DBI planes.h]haThis function implements struct drm_simple_display_funcs.destroy_plane_state for MIPI DBI planes.}(hjMFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjEubh)}(h@See drm_gem_destroy_shadow_plane_state() for additional details.h]h@See drm_gem_destroy_shadow_plane_state() for additional details.}(hj\FhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjEubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+mipi_dbi_dev_init_with_formats (C function) c.mipi_dbi_dev_init_with_formatshNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hint mipi_dbi_dev_init_with_formats (struct mipi_dbi_dev *dbidev, const struct drm_simple_display_pipe_funcs *funcs, const uint32_t *formats, unsigned int format_count, const struct drm_display_mode *mode, unsigned int rotation, size_t tx_buf_size)h]j)}(hint mipi_dbi_dev_init_with_formats(struct mipi_dbi_dev *dbidev, const struct drm_simple_display_pipe_funcs *funcs, const uint32_t *formats, unsigned int format_count, const struct drm_display_mode *mode, unsigned int rotation, size_t tx_buf_size)h](j)}(hinth]hint}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMPubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFhhhjFhMPubj)}(hmipi_dbi_dev_init_with_formatsh]j)}(hmipi_dbi_dev_init_with_formatsh]hmipi_dbi_dev_init_with_formats}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ](jjeh"]h$]h&]jjuh1jhjFhhhjFhMPubj)}(h(struct mipi_dbi_dev *dbidev, const struct drm_simple_display_pipe_funcs *funcs, const uint32_t *formats, unsigned int format_count, const struct drm_display_mode *mode, unsigned int rotation, size_t tx_buf_size)h](j)}(hstruct mipi_dbi_dev *dbidevh](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubh)}(hhh]j)}(h mipi_dbi_devh]h mipi_dbi_dev}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjFmodnameN classnameNjj)}j]j)}jjFsb c.mipi_dbi_dev_init_with_formatsasbuh1hhjFubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubj+)}(hj9h]h*}(hjGhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjFubj)}(hdbidevh]hdbidev}(hj!GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(h1const struct drm_simple_display_pipe_funcs *funcsh](j)}(hjUh]hconst}(hj:GhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Gubj)}(h h]h }(hjGGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Gubj)}(hjh]hstruct}(hjUGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Gubj)}(h h]h }(hjbGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Gubh)}(hhh]j)}(hdrm_simple_display_pipe_funcsh]hdrm_simple_display_pipe_funcs}(hjsGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpGubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjuGmodnameN classnameNjj)}j]jG c.mipi_dbi_dev_init_with_formatsasbuh1hhj6Gubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Gubj+)}(hj9h]h*}(hjGhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj6Gubj)}(hfuncsh]hfuncs}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6Gubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(hconst uint32_t *formatsh](j)}(hjUh]hconst}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubh)}(hhh]j)}(huint32_th]huint32_t}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjGmodnameN classnameNjj)}j]jG c.mipi_dbi_dev_init_with_formatsasbuh1hhjGubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj+)}(hj9h]h*}(hjHhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjGubj)}(hformatsh]hformats}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(hunsigned int format_counth](j)}(hunsignedh]hunsigned}(hj5HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1Hubj)}(h h]h }(hjCHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1Hubj)}(hinth]hint}(hjQHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1Hubj)}(h h]h }(hj_HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1Hubj)}(h format_counth]h format_count}(hjmHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1Hubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hjh]hstruct}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjHmodnameN classnameNjj)}j]jG c.mipi_dbi_dev_init_with_formatsasbuh1hhjHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj+)}(hj9h]h*}(hjHhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjHubj)}(hmodeh]hmode}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(hunsigned int rotationh](j)}(hunsignedh]hunsigned}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubj)}(hinth]hint}(hj-IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubj)}(h h]h }(hj;IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubj)}(hrotationh]hrotation}(hjIIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj Iubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubj)}(hsize_t tx_buf_sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjeIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbIubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjgImodnameN classnameNjj)}j]jG c.mipi_dbi_dev_init_with_formatsasbuh1hhj^Iubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^Iubj)}(h tx_buf_sizeh]h tx_buf_size}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^Iubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjFubeh}(h]h ]h"]h$]h&]jjuh1jhjFhhhjFhMPubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjFhhhjFhMPubah}(h]j~Fah ](jjeh"]h$]h&]jj)jhuh1jhjFhMPhjFhhubj)}(hhh]h)}(h2MIPI DBI device initialization with custom formatsh]h2MIPI DBI device initialization with custom formats}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMPhjIhhubah}(h]h ]h"]h$]h&]uh1jhjFhhhjFhMPubeh}(h]h ](jfunctioneh"]h$]h&]jjjjIjjIjjjuh1jhhhjnhNhNubj)}(hX**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure to initialize ``const struct drm_simple_display_pipe_funcs *funcs`` Display pipe functions ``const uint32_t *formats`` Array of supported formats (DRM_FORMAT\_\*). ``unsigned int format_count`` Number of elements in **formats** ``const struct drm_display_mode *mode`` Display mode ``unsigned int rotation`` Initial rotation in degrees Counter Clock Wise ``size_t tx_buf_size`` Allocate a transmit buffer of this size. **Description** This function sets up a :c:type:`drm_simple_display_pipe` with a :c:type:`drm_connector` that has one fixed :c:type:`drm_display_mode` which is rotated according to **rotation**. This mode is used to set the mode config min/max width/height properties. Use mipi_dbi_dev_init() if you want native RGB565 and emulated XRGB8888 format. **Note** Some of the helper functions expects RGB565 to be the default format and the transmit buffer sized to fit that. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjIh]h Parameters}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMThjIubji)}(hhh](jn)}(hH``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure to initialize h](jt)}(h``struct mipi_dbi_dev *dbidev``h]jz)}(hjIh]hstruct mipi_dbi_dev *dbidev}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMQhjIubj)}(hhh]h)}(h'MIPI DBI device structure to initializeh]h'MIPI DBI device structure to initialize}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMQhjJubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjJhMQhjIubjn)}(hM``const struct drm_simple_display_pipe_funcs *funcs`` Display pipe functions h](jt)}(h5``const struct drm_simple_display_pipe_funcs *funcs``h]jz)}(hj5Jh]h1const struct drm_simple_display_pipe_funcs *funcs}(hj7JhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3Jubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMRhj/Jubj)}(hhh]h)}(hDisplay pipe functionsh]hDisplay pipe functions}(hjNJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJJhMRhjKJubah}(h]h ]h"]h$]h&]uh1jhj/Jubeh}(h]h ]h"]h$]h&]uh1jmhjJJhMRhjIubjn)}(hI``const uint32_t *formats`` Array of supported formats (DRM_FORMAT\_\*). h](jt)}(h``const uint32_t *formats``h]jz)}(hjnJh]hconst uint32_t *formats}(hjpJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjlJubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMShjhJubj)}(hhh]h)}(h,Array of supported formats (DRM_FORMAT\_\*).h]h,Array of supported formats (DRM_FORMAT_*).}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJhMShjJubah}(h]h ]h"]h$]h&]uh1jhjhJubeh}(h]h ]h"]h$]h&]uh1jmhjJhMShjIubjn)}(h@``unsigned int format_count`` Number of elements in **formats** h](jt)}(h``unsigned int format_count``h]jz)}(hjJh]hunsigned int format_count}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMThjJubj)}(hhh]h)}(h!Number of elements in **formats**h](hNumber of elements in }(hjJhhhNhNubj%)}(h **formats**h]hformats}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubeh}(h]h ]h"]h$]h&]uh1hhjJhMThjJubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhjJhMThjIubjn)}(h5``const struct drm_display_mode *mode`` Display mode h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hjJh]h#const struct drm_display_mode *mode}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMUhjJubj)}(hhh]h)}(h Display modeh]h Display mode}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMUhjKubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhjKhMUhjIubjn)}(hI``unsigned int rotation`` Initial rotation in degrees Counter Clock Wise h](jt)}(h``unsigned int rotation``h]jz)}(hj'Kh]hunsigned int rotation}(hj)KhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj%Kubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMVhj!Kubj)}(hhh]h)}(h.Initial rotation in degrees Counter Clock Wiseh]h.Initial rotation in degrees Counter Clock Wise}(hj@KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj` is allocated. Supported formats: Native RGB565 and emulated XRGB8888. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjOh]h Parameters}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjNubji)}(hhh](jn)}(hH``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure to initialize h](jt)}(h``struct mipi_dbi_dev *dbidev``h]jz)}(hj Oh]hstruct mipi_dbi_dev *dbidev}(hj"OhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjOubj)}(hhh]h)}(h'MIPI DBI device structure to initializeh]h'MIPI DBI device structure to initialize}(hj9OhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5OhMhj6Oubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhj5OhMhjOubjn)}(hM``const struct drm_simple_display_pipe_funcs *funcs`` Display pipe functions h](jt)}(h5``const struct drm_simple_display_pipe_funcs *funcs``h]jz)}(hjYOh]h1const struct drm_simple_display_pipe_funcs *funcs}(hj[OhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWOubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjSOubj)}(hhh]h)}(hDisplay pipe functionsh]hDisplay pipe functions}(hjrOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnOhMhjoOubah}(h]h ]h"]h$]h&]uh1jhjSOubeh}(h]h ]h"]h$]h&]uh1jmhjnOhMhjOubjn)}(h5``const struct drm_display_mode *mode`` Display mode h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hjOh]h#const struct drm_display_mode *mode}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjOubj)}(hhh]h)}(h Display modeh]h Display mode}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMhjOubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhjOhMhjOubjn)}(hI``unsigned int rotation`` Initial rotation in degrees Counter Clock Wise h](jt)}(h``unsigned int rotation``h]jz)}(hjOh]hunsigned int rotation}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjOubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjOubj)}(hhh]h)}(h.Initial rotation in degrees Counter Clock Wiseh]h.Initial rotation in degrees Counter Clock Wise}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhMhjOubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhjOhMhjOubeh}(h]h ]h"]h$]h&]uh1jhhjNubh)}(h**Description**h]j%)}(hjPh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjNubh)}(hX<This function sets up a :c:type:`drm_simple_display_pipe` with a :c:type:`drm_connector` that has one fixed :c:type:`drm_display_mode` which is rotated according to **rotation**. This mode is used to set the mode config min/max width/height properties. Additionally :c:type:`mipi_dbi.tx_buf ` is allocated.h](hThis function sets up a }(hjPhhhNhNubh)}(h!:c:type:`drm_simple_display_pipe`h]jz)}(hj&Ph]hdrm_simple_display_pipe}(hj(PhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj$Pubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipeuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjPubh with a }(hjPhhhNhNubh)}(h:c:type:`drm_connector`h]jz)}(hjJPh]h drm_connector}(hjLPhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjHPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_connectoruh1hhjCPhMhjPubh that has one fixed }(hjPhhhNhNubh)}(h:c:type:`drm_display_mode`h]jz)}(hjmPh]hdrm_display_mode}(hjoPhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjkPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_display_modeuh1hhjCPhMhjPubh which is rotated according to }(hjPhhhNhNubj%)}(h **rotation**h]hrotation}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubhY. This mode is used to set the mode config min/max width/height properties. Additionally }(hjPhhhNhNubh)}(h$:c:type:`mipi_dbi.tx_buf `h]jz)}(hjPh]hmipi_dbi.tx_buf}(hjPhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjPubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dbiuh1hhjCPhMhjPubh is allocated.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjCPhMhjNubh)}(h7Supported formats: Native RGB565 and emulated XRGB8888.h]h7Supported formats: Native RGB565 and emulated XRGB8888.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjNubh)}(h **Return**h]j%)}(hjPh]hReturn}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjPubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjNubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjNubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dbi_hw_reset (C function)c.mipi_dbi_hw_resethNtauh1jxhjnhhhNhNubj)}(hhh](j)}(h-void mipi_dbi_hw_reset (struct mipi_dbi *dbi)h]j)}(h,void mipi_dbi_hw_reset(struct mipi_dbi *dbi)h](j)}(hvoidh]hvoid}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hj.QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQhhhj-QhMubj)}(hmipi_dbi_hw_reseth]j)}(hmipi_dbi_hw_reseth]hmipi_dbi_hw_reset}(hj@QhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjreset ` gpio is set.h](h)}(h**Parameters**h]j%)}(hjRh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjQubji)}(hhh]jn)}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](jt)}(h``struct mipi_dbi *dbi``h]jz)}(hj Rh]hstruct mipi_dbi *dbi}(hj"RhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjRubj)}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hj9RhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5RhMhj6Rubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jmhj5RhMhjRubah}(h]h ]h"]h$]h&]uh1jhhjQubh)}(h**Description**h]j%)}(hj[Rh]h Description}(hj]RhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYRubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjQubh)}(hIReset controller if the :c:type:`mipi_dbi->reset ` gpio is set.h](hReset controller if the }(hjqRhhhNhNubh)}(h$:c:type:`mipi_dbi->reset `h]jz)}(hj{Rh]hmipi_dbi->reset}(hj}RhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjyRubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dbiuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjqRubh gpio is set.}(hjqRhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjRhMhjQubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#mipi_dbi_display_is_on (C function)c.mipi_dbi_display_is_onhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(h2bool mipi_dbi_display_is_on (struct mipi_dbi *dbi)h]j)}(h1bool mipi_dbi_display_is_on(struct mipi_dbi *dbi)h](j)}(hjAh]hbool}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRhhhjRhMubj)}(hmipi_dbi_display_is_onh]j)}(hmipi_dbi_display_is_onh]hmipi_dbi_display_is_on}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ](jjeh"]h$]h&]jjuh1jhjRhhhjRhMubj)}(h(struct mipi_dbi *dbi)h]j)}(hstruct mipi_dbi *dbih](j)}(hjh]hstruct}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(h h]h }(hj ShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubh)}(hhh]j)}(hmipi_dbih]hmipi_dbi}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjSmodnameN classnameNjj)}j]j)}jjRsbc.mipi_dbi_display_is_onasbuh1hhjRubj)}(h h]h }(hj=ShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj+)}(hj9h]h*}(hjKShhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjRubj)}(hdbih]hdbi}(hjXShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjRubah}(h]h ]h"]h$]h&]jjuh1jhjRhhhjRhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjRhhhjRhMubah}(h]jRah ](jjeh"]h$]h&]jj)jhuh1jhjRhMhjRhhubj)}(hhh]h)}(hCheck if display is onh]hCheck if display is on}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjShhubah}(h]h ]h"]h$]h&]uh1jhjRhhhjRhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjSjjSjjjuh1jhhhjnhNhNubj)}(hXx**Parameters** ``struct mipi_dbi *dbi`` MIPI DBI structure **Description** This function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled. **Return** true if the display can be verified to be on, false otherwise.h](h)}(h**Parameters**h]j%)}(hjSh]h Parameters}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjSubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjSubji)}(hhh]jn)}(h,``struct mipi_dbi *dbi`` MIPI DBI structure h](jt)}(h``struct mipi_dbi *dbi``h]jz)}(hjSh]hstruct mipi_dbi *dbi}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjSubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjSubj)}(hhh]h)}(hMIPI DBI structureh]hMIPI DBI structure}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjSubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jmhjShMhjSubah}(h]h ]h"]h$]h&]uh1jhhjSubh)}(h**Description**h]j%)}(hjSh]h Description}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjSubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjSubh)}(hThis function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled.h]hThis function checks the Power Mode register (if readable) to see if display output is turned on. This can be used to see if the bootloader has already turned on the display avoiding flicker when the pipeline is enabled.}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjSubh)}(h **Return**h]j%)}(hj%Th]hReturn}(hj'ThhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#Tubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjSubh)}(h>true if the display can be verified to be on, false otherwise.h]h>true if the display can be verified to be on, false otherwise.}(hj;ThhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjSubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#mipi_dbi_poweron_reset (C function)c.mipi_dbi_poweron_resethNtauh1jxhjnhhhNhNubj)}(hhh](j)}(h8int mipi_dbi_poweron_reset (struct mipi_dbi_dev *dbidev)h]j)}(h7int mipi_dbi_poweron_reset(struct mipi_dbi_dev *dbidev)h](j)}(hinth]hint}(hjjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfThhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM'ubj)}(h h]h }(hjyThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfThhhjxThM'ubj)}(hmipi_dbi_poweron_reseth]j)}(hmipi_dbi_poweron_reseth]hmipi_dbi_poweron_reset}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubah}(h]h ](jjeh"]h$]h&]jjuh1jhjfThhhjxThM'ubj)}(h(struct mipi_dbi_dev *dbidev)h]j)}(hstruct mipi_dbi_dev *dbidevh](j)}(hjh]hstruct}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj)}(h h]h }(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubh)}(hhh]j)}(h mipi_dbi_devh]h mipi_dbi_dev}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjTmodnameN classnameNjj)}j]j)}jjTsbc.mipi_dbi_poweron_resetasbuh1hhjTubj)}(h h]h }(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubj+)}(hj9h]h*}(hjThhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjTubj)}(hdbidevh]hdbidev}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjTubah}(h]h ]h"]h$]h&]jjuh1jhjfThhhjxThM'ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjbThhhjxThM'ubah}(h]j]Tah ](jjeh"]h$]h&]jj)jhuh1jhjxThM'hj_Thhubj)}(hhh]h)}(hMIPI DBI poweron and reseth]hMIPI DBI poweron and reset}(hj*UhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM'hj'Uhhubah}(h]h ]h"]h$]h&]uh1jhj_ThhhjxThM'ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjBUjjBUjjjuh1jhhhjnhNhNubj)}(h**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure **Description** This function enables the regulator if used and does a hardware and software reset. **Return** Zero on success, or a negative error code.h](h)}(h**Parameters**h]j%)}(hjLUh]h Parameters}(hjNUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJUubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM+hjFUubji)}(hhh]jn)}(h:``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure h](jt)}(h``struct mipi_dbi_dev *dbidev``h]jz)}(hjkUh]hstruct mipi_dbi_dev *dbidev}(hjmUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjiUubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM(hjeUubj)}(hhh]h)}(hMIPI DBI device structureh]hMIPI DBI device structure}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhM(hjUubah}(h]h ]h"]h$]h&]uh1jhjeUubeh}(h]h ]h"]h$]h&]uh1jmhjUhM(hjbUubah}(h]h ]h"]h$]h&]uh1jhhjFUubh)}(h**Description**h]j%)}(hjUh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM*hjFUubh)}(hSThis function enables the regulator if used and does a hardware and software reset.h]hSThis function enables the regulator if used and does a hardware and software reset.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM)hjFUubh)}(h **Return**h]j%)}(hjUh]hReturn}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM,hjFUubh)}(h*Zero on success, or a negative error code.h]h*Zero on success, or a negative error code.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM-hjFUubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/mipi_dbi_poweron_conditional_reset (C function)$c.mipi_dbi_poweron_conditional_resethNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hDint mipi_dbi_poweron_conditional_reset (struct mipi_dbi_dev *dbidev)h]j)}(hCint mipi_dbi_poweron_conditional_reset(struct mipi_dbi_dev *dbidev)h](j)}(hinth]hint}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM7ubj)}(h h]h }(hj!VhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVhhhj VhM7ubj)}(h"mipi_dbi_poweron_conditional_reseth]j)}(h"mipi_dbi_poweron_conditional_reseth]h"mipi_dbi_poweron_conditional_reset}(hj3VhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/Vubah}(h]h ](jjeh"]h$]h&]jjuh1jhjVhhhj VhM7ubj)}(h(struct mipi_dbi_dev *dbidev)h]j)}(hstruct mipi_dbi_dev *dbidevh](j)}(hjh]hstruct}(hjOVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKVubj)}(h h]h }(hj\VhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKVubh)}(hhh]j)}(h mipi_dbi_devh]h mipi_dbi_dev}(hjmVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjVubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjoVmodnameN classnameNjj)}j]j)}jj5Vsb$c.mipi_dbi_poweron_conditional_resetasbuh1hhjKVubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKVubj+)}(hj9h]h*}(hjVhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjKVubj)}(hdbidevh]hdbidev}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKVubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjGVubah}(h]h ]h"]h$]h&]jjuh1jhjVhhhj VhM7ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj Vhhhj VhM7ubah}(h]jVah ](jjeh"]h$]h&]jj)jhuh1jhj VhM7hjVhhubj)}(hhh]h)}(h&MIPI DBI poweron and conditional reseth]h&MIPI DBI poweron and conditional reset}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM7hjVhhubah}(h]h ]h"]h$]h&]uh1jhjVhhhj VhM7ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjVjjVjjjuh1jhhhjnhNhNubj)}(hX**Parameters** ``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure **Description** This function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed. **Return** Zero if the controller was reset, 1 if the display was already on, or a negative error code.h](h)}(h**Parameters**h]j%)}(hjVh]h Parameters}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM;hjVubji)}(hhh]jn)}(h:``struct mipi_dbi_dev *dbidev`` MIPI DBI device structure h](jt)}(h``struct mipi_dbi_dev *dbidev``h]jz)}(hjWh]hstruct mipi_dbi_dev *dbidev}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM8hj Wubj)}(hhh]h)}(hMIPI DBI device structureh]hMIPI DBI device structure}(hj,WhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(WhM8hj)Wubah}(h]h ]h"]h$]h&]uh1jhj Wubeh}(h]h ]h"]h$]h&]uh1jmhj(WhM8hj Wubah}(h]h ]h"]h$]h&]uh1jhhjVubh)}(h**Description**h]j%)}(hjNWh]h Description}(hjPWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLWubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM:hjVubh)}(hThis function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed.h]hThis function enables the regulator if used and if the display is off, it does a hardware and software reset. If mipi_dbi_display_is_on() determines that the display is on, no reset is performed.}(hjdWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM9hjVubh)}(h **Return**h]j%)}(hjuWh]hReturn}(hjwWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsWubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM=hjVubh)}(h\Zero if the controller was reset, 1 if the display was already on, or a negative error code.h]h\Zero if the controller was reset, 1 if the display was already on, or a negative error code.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM>hjVubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'mipi_dbi_spi_cmd_max_speed (C function)c.mipi_dbi_spi_cmd_max_speedhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hCu32 mipi_dbi_spi_cmd_max_speed (struct spi_device *spi, size_t len)h]j)}(hBu32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len)h](h)}(hhh]j)}(hu32h]hu32}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjWmodnameN classnameNjj)}j]j)}jmipi_dbi_spi_cmd_max_speedsbc.mipi_dbi_spi_cmd_max_speedasbuh1hhjWhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMKubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWhhhjWhMKubj)}(hmipi_dbi_spi_cmd_max_speedh]j)}(hjWh]hmipi_dbi_spi_cmd_max_speed}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubah}(h]h ](jjeh"]h$]h&]jjuh1jhjWhhhjWhMKubj)}(h$(struct spi_device *spi, size_t len)h](j)}(hstruct spi_device *spih](j)}(hjh]hstruct}(hj XhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubh)}(hhh]j)}(h spi_deviceh]h spi_device}(hj*XhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'Xubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj,XmodnameN classnameNjj)}j]jWc.mipi_dbi_spi_cmd_max_speedasbuh1hhjXubj)}(h h]h }(hjHXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj+)}(hj9h]h*}(hjVXhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjXubj)}(hspih]hspi}(hjcXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjXubj)}(h size_t lenh](h)}(hhh]j)}(hsize_th]hsize_t}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|Xubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjXmodnameN classnameNjj)}j]jWc.mipi_dbi_spi_cmd_max_speedasbuh1hhjxXubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxXubj)}(hlenh]hlen}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxXubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjXubeh}(h]h ]h"]h$]h&]jjuh1jhjWhhhjWhMKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjWhhhjWhMKubah}(h]jWah ](jjeh"]h$]h&]jj)jhuh1jhjWhMKhjWhhubj)}(hhh]h)}(hget the maximum SPI bus speedh]hget the maximum SPI bus speed}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMKhjXhhubah}(h]h ]h"]h$]h&]uh1jhjWhhhjWhMKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjXjjXjjjuh1jhhhjnhNhNubj)}(hXU**Parameters** ``struct spi_device *spi`` SPI device ``size_t len`` The transfer buffer length. **Description** Many controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.h](h)}(h**Parameters**h]j%)}(hjXh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMOhjXubji)}(hhh](jn)}(h&``struct spi_device *spi`` SPI device h](jt)}(h``struct spi_device *spi``h]jz)}(hjYh]hstruct spi_device *spi}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMLhjYubj)}(hhh]h)}(h SPI deviceh]h SPI device}(hj/YhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+YhMLhj,Yubah}(h]h ]h"]h$]h&]uh1jhjYubeh}(h]h ]h"]h$]h&]uh1jmhj+YhMLhj Yubjn)}(h+``size_t len`` The transfer buffer length. h](jt)}(h``size_t len``h]jz)}(hjOYh]h size_t len}(hjQYhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMYubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMMhjIYubj)}(hhh]h)}(hThe transfer buffer length.h]hThe transfer buffer length.}(hjhYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdYhMMhjeYubah}(h]h ]h"]h$]h&]uh1jhjIYubeh}(h]h ]h"]h$]h&]uh1jmhjdYhMMhj Yubeh}(h]h ]h"]h$]h&]uh1jhhjXubh)}(h**Description**h]j%)}(hjYh]h Description}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMOhjXubh)}(hMany controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.h]hMany controllers have a max speed of 10MHz, but can be pushed way beyond that. Increase reliability by running pixel data at max speed and the rest at 10MHz, preventing transfer glitches from messing up the init settings.}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMNhjXubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dbi_spi_init (C function)c.mipi_dbi_spi_inithNtauh1jxhjnhhhNhNubj)}(hhh](j)}(hZint mipi_dbi_spi_init (struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h]j)}(hYint mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h](j)}(hinth]hint}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYhhhjYhMubj)}(hmipi_dbi_spi_inith]j)}(hmipi_dbi_spi_inith]hmipi_dbi_spi_init}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYubah}(h]h ](jjeh"]h$]h&]jjuh1jhjYhhhjYhMubj)}(hD(struct spi_device *spi, struct mipi_dbi *dbi, struct gpio_desc *dc)h](j)}(hstruct spi_device *spih](j)}(hjh]hstruct}(hj ZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(h spi_deviceh]h spi_device}(hj*ZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'Zubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj,ZmodnameN classnameNjj)}j]j)}jjYsbc.mipi_dbi_spi_initasbuh1hhjZubj)}(h h]h }(hjJZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hjXZhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(hspih]hspi}(hjeZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjZubj)}(hstruct mipi_dbi *dbih](j)}(hjh]hstruct}(hj~ZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzZubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzZubh)}(hhh]j)}(hmipi_dbih]hmipi_dbi}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjZmodnameN classnameNjj)}j]jFZc.mipi_dbi_spi_initasbuh1hhjzZubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzZubj+)}(hj9h]h*}(hjZhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjzZubj)}(hdbih]hdbi}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjZubj)}(hstruct gpio_desc *dch](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(h gpio_desch]h gpio_desc}(hj [hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj [ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj[modnameN classnameNjj)}j]jFZc.mipi_dbi_spi_initasbuh1hhjZubj)}(h h]h }(hj*[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hj8[hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(hdch]hdc}(hjE[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjZubeh}(h]h ]h"]h$]h&]jjuh1jhjYhhhjYhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjYhhhjYhMubah}(h]jYah ](jjeh"]h$]h&]jj)jhuh1jhjYhMhjYhhubj)}(hhh]h)}(h!Initialize MIPI DBI SPI interfaceh]h!Initialize MIPI DBI SPI interface}(hjo[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjl[hhubah}(h]h ]h"]h$]h&]uh1jhjYhhhjYhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj[jj[jjjuh1jhhhjnhNhNubj)}(hX**Parameters** ``struct spi_device *spi`` SPI device ``struct mipi_dbi *dbi`` MIPI DBI structure to initialize ``struct gpio_desc *dc`` D/C gpio (optional) **Description** This function sets :c:type:`mipi_dbi->command `, enables :c:type:`mipi_dbi->read_commands ` for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init. If **dc** is set, a Type C Option 3 interface is assumed, if not Type C Option 1. If the command is ``MIPI_DCS_WRITE_MEMORY_START`` and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (``DRM_FORMAT_BIG_ENDIAN`` is not supported). This is how endianness is handled: Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is byteswapped before transfer. Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be sent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. This handling is optimised for ``DRM_FORMAT_RGB565`` framebuffers. If the interface is Option 1 and the SPI controller doesn't support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary. **Return** Zero on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj[h]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubji)}(hhh](jn)}(h&``struct spi_device *spi`` SPI device h](jt)}(h``struct spi_device *spi``h]jz)}(hj[h]hstruct spi_device *spi}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubj)}(hhh]h)}(h SPI deviceh]h SPI device}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhj[hMhj[ubjn)}(h:``struct mipi_dbi *dbi`` MIPI DBI structure to initialize h](jt)}(h``struct mipi_dbi *dbi``h]jz)}(hj[h]hstruct mipi_dbi *dbi}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubj)}(hhh]h)}(h MIPI DBI structure to initializeh]h MIPI DBI structure to initialize}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhj[hMhj[ubjn)}(h-``struct gpio_desc *dc`` D/C gpio (optional) h](jt)}(h``struct gpio_desc *dc``h]jz)}(hj"\h]hstruct gpio_desc *dc}(hj$\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj \ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj\ubj)}(hhh]h)}(hD/C gpio (optional)h]hD/C gpio (optional)}(hj;\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7\hMhj8\ubah}(h]h ]h"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]uh1jmhj7\hMhj[ubeh}(h]h ]h"]h$]h&]uh1jhhj[ubh)}(h**Description**h]j%)}(hj]\h]h Description}(hj_\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[\ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubh)}(hThis function sets :c:type:`mipi_dbi->command `, enables :c:type:`mipi_dbi->read_commands ` for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init.h](hThis function sets }(hjs\hhhNhNubh)}(h&:c:type:`mipi_dbi->command `h]jz)}(hj}\h]hmipi_dbi->command}(hj\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj{\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dbiuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjs\ubh , enables }(hjs\hhhNhNubh)}(h,:c:type:`mipi_dbi->read_commands `h]jz)}(hj\h]hmipi_dbi->read_commands}(hj\hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjmipi_dbiuh1hhj\hMhjs\ubho for the usual read commands. It should be followed by a call to mipi_dbi_dev_init() or a driver-specific init.}(hjs\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj\hMhj[ubh)}(hQIf **dc** is set, a Type C Option 3 interface is assumed, if not Type C Option 1.h](hIf }(hj\hhhNhNubj%)}(h**dc**h]hdc}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj\ubhH is set, a Type C Option 3 interface is assumed, if not Type C Option 1.}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubh)}(hXIf the command is ``MIPI_DCS_WRITE_MEMORY_START`` and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (``DRM_FORMAT_BIG_ENDIAN`` is not supported).h](hIf the command is }(hj\hhhNhNubjz)}(h``MIPI_DCS_WRITE_MEMORY_START``h]hMIPI_DCS_WRITE_MEMORY_START}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubh and the pixel format is RGB565, endianness has to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are assumed stored in memory as little endian (}(hj\hhhNhNubjz)}(h``DRM_FORMAT_BIG_ENDIAN``h]hDRM_FORMAT_BIG_ENDIAN}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj\ubh is not supported).}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubh)}(h"This is how endianness is handled:h]h"This is how endianness is handled:}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubji)}(hhh](jn)}(hzOption 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is byteswapped before transfer. h](jt)}(h\Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer ish]h\Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is}(hj2]hhhNhNubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj.]ubj)}(hhh]h)}(hbyteswapped before transfer.h]hbyteswapped before transfer.}(hjD]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@]hMhjA]ubah}(h]h ]h"]h$]h&]uh1jhj.]ubeh}(h]h ]h"]h$]h&]uh1jmhj@]hMhj+]ubjn)}(hOption 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be sent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. h](jt)}(h[Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can beh]h[Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be}(hjb]hhhNhNubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj^]ubj)}(hhh]h)}(hsent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw.h]hsent as-is. If not the caller is responsible for swapping the bytes before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw.}(hjt]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhjq]ubah}(h]h ]h"]h$]h&]uh1jhj^]ubeh}(h]h ]h"]h$]h&]uh1jmhjp]hMhj+]ubeh}(h]h ]h"]h$]h&]uh1jhhj[ubh)}(hBThis handling is optimised for ``DRM_FORMAT_RGB565`` framebuffers.h](hThis handling is optimised for }(hj]hhhNhNubjz)}(h``DRM_FORMAT_RGB565``h]hDRM_FORMAT_RGB565}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]ubh framebuffers.}(hj]hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubh)}(hIf the interface is Option 1 and the SPI controller doesn't support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary.h]hIf the interface is Option 1 and the SPI controller doesn’t support 9 bits per word, the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubh)}(h **Return**h]j%)}(hj]h]hReturn}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubh)}(h0Zero on success, negative error code on failure.h]h0Zero on success, negative error code on failure.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"mipi_dbi_spi_transfer (C function)c.mipi_dbi_spi_transferhNtauh1jxhjnhhhNhNubj)}(hhh](j)}(heint mipi_dbi_spi_transfer (struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h]j)}(hdint mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h](j)}(hinth]hint}(hj ^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chM)ubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^hhhj^hM)ubj)}(hmipi_dbi_spi_transferh]j)}(hmipi_dbi_spi_transferh]hmipi_dbi_spi_transfer}(hj-^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)^ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj^hhhj^hM)ubj)}(hK(struct spi_device *spi, u32 speed_hz, u8 bpw, const void *buf, size_t len)h](j)}(hstruct spi_device *spih](j)}(hjh]hstruct}(hjI^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjE^ubj)}(h h]h }(hjV^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjE^ubh)}(hhh]j)}(h spi_deviceh]h spi_device}(hjg^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjd^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetji^modnameN classnameNjj)}j]j)}jj/^sbc.mipi_dbi_spi_transferasbuh1hhjE^ubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjE^ubj+)}(hj9h]h*}(hj^hhhNhNubah}(h]h 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](jfunctioneh"]h$]h&]jjjj`jj`jjjuh1jhhhjnhNhNubj)}(hX**Parameters** ``struct spi_device *spi`` SPI device ``u32 speed_hz`` Override speed (optional) ``u8 bpw`` Bits per word ``const void *buf`` Buffer to transfer ``size_t len`` Buffer length **Description** This SPI transfer helper breaks up the transfer of **buf** into chunks which the SPI controller driver can handle. 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Drivers can use this as their :c:type:`drm_driver->debugfs_init ` callback.h](hThis function creates a ‘command’ debugfs file for sending commands to the controller or getting the read command values. Drivers can use this as their }(hj1chhhNhNubh)}(h/:c:type:`drm_driver->debugfs_init `h]jz)}(hj;ch]hdrm_driver->debugfs_init}(hj=chhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9cubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj drm_driveruh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:348: ./drivers/gpu/drm/drm_mipi_dbi.chMhj1cubh callback.}(hj1chhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjXchMhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjnhhhNhNubeh}(h]#mipi-dbi-helper-functions-referenceah ]h"]#mipi dbi helper functions referenceah$]h&]uh1hhhhhhhhMTubh)}(hhh](h)}(h#MIPI DSI Helper Functions Referenceh]h#MIPI DSI Helper Functions Reference}(hjuchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrchhhhhM`ubh)}(hXThese functions contain some common logic and helpers to deal with MIPI DSI peripherals.h]hXThese functions contain some common logic and helpers to deal with MIPI DSI peripherals.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:354: ./drivers/gpu/drm/drm_mipi_dsi.chK-hjrchhubh)}(hoHelpers are provided for a number of standard MIPI DSI command as well as a subset of the MIPI DCS command set.h]hoHelpers are provided for a number of standard MIPI DSI command as well as a subset of the MIPI DCS command set.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:354: ./drivers/gpu/drm/drm_mipi_dsi.chK0hjrchhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dsi_msg (C struct)c.mipi_dsi_msghNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h mipi_dsi_msgh]j)}(hstruct mipi_dsi_msgh](j)}(hjh]hstruct}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhhjchKubj)}(h mipi_dsi_msgh]j)}(hjch]h mipi_dsi_msg}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubah}(h]h ](jjeh"]h$]h&]jjuh1jhjchhhjchKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjchhhjchKubah}(h]jcah ](jjeh"]h$]h&]jj)jhuh1jhjchKhjchhubj)}(hhh]h)}(hread/write DSI bufferh]hread/write DSI buffer}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKhjchhubah}(h]h ]h"]h$]h&]uh1jhjchhhjchKubeh}(h]h ](jstructeh"]h$]h&]jjjjdjjdjjjuh1jhhhjrchNhNubj)}(hX**Definition**:: struct mipi_dsi_msg { u8 channel; u8 type; u16 flags; size_t tx_len; const void *tx_buf; size_t rx_len; void *rx_buf; }; **Members** ``channel`` virtual channel id ``type`` payload data type ``flags`` flags controlling this message transmission ``tx_len`` length of **tx_buf** ``tx_buf`` data to be written ``rx_len`` length of **rx_buf** ``rx_buf`` data to be read, or NULLh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj dhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubh:}(hjdhhhNhNubeh}(h]h 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idh]hvirtual channel id}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~dhKhjdubah}(h]h ]h"]h$]h&]uh1jhjcdubeh}(h]h ]h"]h$]h&]uh1jmhj~dhKhj`dubjn)}(h``type`` payload data type h](jt)}(h``type``h]jz)}(hjdh]htype}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKhjdubj)}(hhh]h)}(hpayload data typeh]hpayload data type}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhKhjdubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjdhKhj`dubjn)}(h6``flags`` flags controlling this message transmission h](jt)}(h ``flags``h]jz)}(hjdh]hflags}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKhjdubj)}(hhh]h)}(h+flags controlling this message transmissionh]h+flags controlling this message transmission}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhKhjdubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h 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](jstructeh"]h$]h&]jjjjfjjfjjjuh1jhhhjrchNhNubj)}(hX**Definition**:: struct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; }; **Members** ``size`` size (in bytes) of the packet ``header`` the four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC) ``payload_length`` number of bytes in the payload ``payload`` a pointer to a buffer containing the payload, if anyh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubh:}(hjfhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhK6hjfubj@)}(hpstruct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; };h]hpstruct mipi_dsi_packet { size_t size; u8 header[4]; size_t payload_length; const u8 *payload; };}hjfsbah}(h]h ]h"]h$]h&]jjuh1j?h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhK8hjfubh)}(h **Members**h]j%)}(hjfh]hMembers}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhK?hjfubji)}(hhh](jn)}(h'``size`` size (in bytes) of the packet h](jt)}(h``size``h]jz)}(hjfh]hsize}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhK4hjfubj)}(hhh]h)}(hsize (in bytes) of the packeth]hsize (in bytes) of the packet}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhK4hjfubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjfhK4hjfubjn)}(h```header`` the four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC) h](jt)}(h ``header``h]jz)}(hjgh]hheader}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhK6hjgubj)}(hhh]h)}(hTthe four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC)h]hTthe four bytes that make up the header (Data ID, Word Count or Packet Data, and ECC)}(hj6ghhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhK5hj3gubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhj2ghK6hjfubjn)}(h2``payload_length`` number of bytes in the payload h](jt)}(h``payload_length``h]jz)}(hjWgh]hpayload_length}(hjYghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjUgubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhK7hjQgubj)}(hhh]h)}(hnumber of bytes in the payloadh]hnumber of bytes in the payload}(hjpghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjlghK7hjmgubah}(h]h ]h"]h$]h&]uh1jhjQgubeh}(h]h ]h"]h$]h&]uh1jmhjlghK7hjfubjn)}(h@``payload`` a pointer to a buffer containing the payload, if anyh](jt)}(h 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Definition}(hjPhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLhubh:}(hjLhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKHhjHhubj@)}(hX struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); };h]hX struct mipi_dsi_host_ops { int (*attach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); int (*detach)(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi); ssize_t (*transfer)(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg); };}hjihsbah}(h]h ]h"]h$]h&]jjuh1j?h_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKJhjHhubh)}(h **Members**h]j%)}(hjzhh]hMembers}(hj|hhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxhubah}(h]h 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]h"]h$]h&]uh1jmhjhhKGhjhubjn)}(h"``transfer`` transmit a DSI packeth](jt)}(h ``transfer``h]jz)}(hj ih]htransfer}(hj ihhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj iubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKGhjiubj)}(hhh]h)}(htransmit a DSI packeth]htransmit a DSI packet}(hj$ihhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKHhj!iubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jmhj ihKGhjhubeh}(h]h ]h"]h$]h&]uh1jhhjHhubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubh)}(h**Description**h]j%)}(hjNih]h Description}(hjPihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLiubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhKKhjrchhubh)}(hXDSI packets transmitted by .transfer() are passed in as mipi_dsi_msg structures. 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multiple times in a row.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjvubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*mipi_dsi_dcs_write_var_seq_multi (C macro)"c.mipi_dsi_dcs_write_var_seq_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h mipi_dsi_dcs_write_var_seq_multih]j)}(h mipi_dsi_dcs_write_var_seq_multih]j)}(h mipi_dsi_dcs_write_var_seq_multih]j)}(hjwh]h mipi_dsi_dcs_write_var_seq_multi}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubah}(h]h ](jjeh"]h$]h&]jjuh1jhjwhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhjwhhhjxhMubah}(h]jwah ](jjeh"]h$]h&]jj)jhuh1jhjxhMhjwhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjwhhhjxhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjxjjxjjjuh1jhhhjrchNhNubh)}(h7``mipi_dsi_dcs_write_var_seq_multi (ctx, cmd, seq...)``h]jz)}(hjxh]h3mipi_dsi_dcs_write_var_seq_multi (ctx, cmd, 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./include/drm/drm_mipi_dsi.hhMhjNxubji)}(hhh](jn)}(h.``ctx`` Context for multiple DSI transactions h](jt)}(h``ctx``h]jz)}(hjsxh]hctx}(hjuxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjqxubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjmxubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjxubah}(h]h ]h"]h$]h&]uh1jhjmxubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjjxubjn)}(h``cmd`` Command h](jt)}(h``cmd``h]jz)}(hjxh]hcmd}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjxubj)}(hhh]h)}(hCommandh]hCommand}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjxubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjjxubjn)}(h4``seq...`` buffer containing data to be transmitted h](jt)}(h ``seq...``h]jz)}(hjxh]hseq...}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjxubj)}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjxubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjjxubeh}(h]h ]h"]h$]h&]uh1jhhjNxubh)}(h**Description**h]j%)}(hj yh]h Description}(hj"yhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjNxubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hj6yhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjNxubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dsi_dual (C macro)c.mipi_dsi_dualhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h mipi_dsi_dualh]j)}(h mipi_dsi_dualh]j)}(h mipi_dsi_dualh]j)}(hj_yh]h mipi_dsi_dual}(hjiyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeyubah}(h]h ](jjeh"]h$]h&]jjuh1jhjayhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhj]yhhhj|yhMubah}(h]jXyah ](jjeh"]h$]h&]jj)jhuh1jhj|yhMhjZyhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjZyhhhj|yhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjyjjyjjjuh1jhhhjrchNhNubh)}(h2``mipi_dsi_dual (_func, _ctx, _dsi1, _dsi2, ...)``h]jz)}(hjyh]h.mipi_dsi_dual (_func, _ctx, _dsi1, _dsi2, ...)}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjrchhubjT=)}(h1send the same MIPI DSI command to two interfaces h]h)}(h0send the same MIPI DSI command to two interfacesh]h0send the same MIPI DSI command to two interfaces}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjyubah}(h]h ]h"]h$]h&]uh1jS=hjyhMhjrchhubj)}(hX**Parameters** ``_func`` MIPI DSI function to pass context and arguments into ``_ctx`` Context for multiple DSI transactions ``_dsi1`` First DSI interface to act as recipient of the MIPI DSI command ``_dsi2`` Second DSI interface to act as recipient of the MIPI DSI command ``...`` Arguments to pass to MIPI DSI function or macro **Description** This macro will send the specified MIPI DSI command twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces. Note that the _func parameter cannot accept a macro such as mipi_dsi_generic_write_multi() or mipi_dsi_dcs_write_buffer_multi(). See mipi_dsi_dual_generic_write_multi() and mipi_dsi_dual_dcs_write_buffer_multi() instead. WARNING: This macro reuses the _func argument and the optional trailing arguments twice each, which may cause unintended side effects. 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This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.h]hThis macro will send the specified MIPI DSI command twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.}(hj${hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjyubh)}(hNote that the _func parameter cannot accept a macro such as mipi_dsi_generic_write_multi() or mipi_dsi_dcs_write_buffer_multi(). See mipi_dsi_dual_generic_write_multi() and mipi_dsi_dual_dcs_write_buffer_multi() instead.h]hNote that the _func parameter cannot accept a macro such as mipi_dsi_generic_write_multi() or mipi_dsi_dcs_write_buffer_multi(). See mipi_dsi_dual_generic_write_multi() and mipi_dsi_dual_dcs_write_buffer_multi() instead.}(hj3{hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjyubh)}(hXnWARNING: This macro reuses the _func argument and the optional trailing arguments twice each, which may cause unintended side effects. For example, adding the postfix increment ++ operator to one of the arguments to be passed to _func will cause the variable to be incremented twice instead of once and the variable will be its original value + 1 when sent to _dsi2.h]hXnWARNING: This macro reuses the _func argument and the optional trailing arguments twice each, which may cause unintended side effects. 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This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces. Note that if an error occurs while transmitting the packet to the first DSI interface, the packet will not be sent to the second DSI interface. This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j%)}(hj{h]h Parameters}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj{ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj{ubji)}(hhh](jn)}(h/``_ctx`` Context for multiple DSI transactions h](jt)}(h``_ctx``h]jz)}(hj{h]h_ctx}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj{ubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj|ubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMhj{ubjn)}(h<``_dsi1`` First DSI interface to act as recipient of packet h](jt)}(h ``_dsi1``h]jz)}(hj4|h]h_dsi1}(hj6|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2|ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj.|ubj)}(hhh]h)}(h1First DSI interface to act as recipient of packeth]h1First DSI interface to act as recipient of packet}(hjM|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI|hMhjJ|ubah}(h]h ]h"]h$]h&]uh1jhj.|ubeh}(h]h ]h"]h$]h&]uh1jmhjI|hMhj{ubjn)}(h=``_dsi2`` Second DSI interface to act as recipient of packet h](jt)}(h ``_dsi2``h]jz)}(hjm|h]h_dsi2}(hjo|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjk|ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjg|ubj)}(hhh]h)}(h2Second DSI interface to act as recipient of packeth]h2Second DSI interface to act as recipient of packet}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj|ubah}(h]h ]h"]h$]h&]uh1jhjg|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMhj{ubjn)}(h*``_seq...`` buffer containing the payload h](jt)}(h ``_seq...``h]jz)}(hj|h]h_seq...}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj|ubj)}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hMhj|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hMhj{ubeh}(h]h ]h"]h$]h&]uh1jhhj{ubh)}(h**Description**h]j%)}(hj|h]h Description}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj{ubh)}(hThis macro will send the specified generic packet twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.h]hThis macro will send the specified generic packet twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj{ubh)}(hNote that if an error occurs while transmitting the packet to the first DSI interface, the packet will not be sent to the second DSI interface.h]hNote that if an error occurs while transmitting the packet to the first DSI interface, the packet will not be sent to the second DSI interface.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj{ubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj{ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+mipi_dsi_dual_dcs_write_seq_multi (C macro)#c.mipi_dsi_dual_dcs_write_seq_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h!mipi_dsi_dual_dcs_write_seq_multih]j)}(h!mipi_dsi_dual_dcs_write_seq_multih]j)}(h!mipi_dsi_dual_dcs_write_seq_multih]j)}(hj>}h]h!mipi_dsi_dual_dcs_write_seq_multi}(hjH}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjD}ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@}hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhj<}hhhj[}hMubah}(h]j7}ah ](jjeh"]h$]h&]jj)jhuh1jhj[}hMhj9}hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj9}hhhj[}hMubeh}(h]h ](jmacroeh"]h$]h&]jjjjt}jjt}jjjuh1jhhhjrchNhNubh)}(hI``mipi_dsi_dual_dcs_write_seq_multi (_ctx, _dsi1, _dsi2, _cmd, _seq...)``h]jz)}(hjz}h]hEmipi_dsi_dual_dcs_write_seq_multi (_ctx, _dsi1, _dsi2, _cmd, _seq...)}(hj|}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjx}ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjrchhubjT=)}(hOtransmit a DCS command with payload to two dsi interfaces, one after the other h]h)}(hNtransmit a DCS command with payload to two dsi interfaces, one after the otherh]hNtransmit a DCS command with payload to two dsi interfaces, one after the other}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj}ubah}(h]h ]h"]h$]h&]uh1jS=hj}hMhjrchhubj)}(hX**Parameters** ``_ctx`` Context for multiple DSI transactions ``_dsi1`` First DSI interface to act as recipient of packet ``_dsi2`` Second DSI interface to act as recipient of packet ``_cmd`` Command ``_seq...`` buffer containing the payload **Description** This macro will send the specified DCS command with payload twice, once per each of the two interfaces supplied. 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This macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h](h)}(h**Parameters**h]j%)}(hj}h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM hj}ubji)}(hhh](jn)}(h/``_ctx`` Context for multiple DSI transactions h](jt)}(h``_ctx``h]jz)}(hj}h]h_ctx}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj}ubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hMhj}ubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhj}hMhj}ubjn)}(h<``_dsi1`` First DSI interface to act as recipient of packet h](jt)}(h ``_dsi1``h]jz)}(hj~h]h_dsi1}(hj ~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj~ubj)}(hhh]h)}(h1First DSI interface to act as recipient of packeth]h1First DSI interface to act as recipient of packet}(hj ~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhj~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhj}ubjn)}(h=``_dsi2`` Second DSI interface to act as recipient of packet h](jt)}(h ``_dsi2``h]jz)}(hj@~h]h_dsi2}(hjB~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>~ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj:~ubj)}(hhh]h)}(h2Second DSI interface to act as recipient of packeth]h2Second DSI interface to act as recipient of packet}(hjY~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU~hMhjV~ubah}(h]h ]h"]h$]h&]uh1jhj:~ubeh}(h]h ]h"]h$]h&]uh1jmhjU~hMhj}ubjn)}(h``_cmd`` Command h](jt)}(h``_cmd``h]jz)}(hjy~h]h_cmd}(hj{~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjw~ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhjs~ubj)}(hhh]h)}(hCommandh]hCommand}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhj~ubah}(h]h ]h"]h$]h&]uh1jhjs~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhj}ubjn)}(h*``_seq...`` buffer containing the payload h](jt)}(h ``_seq...``h]jz)}(hj~h]h_seq...}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj~ubj)}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhj~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhj}ubeh}(h]h ]h"]h$]h&]uh1jhhj}ubh)}(h**Description**h]j%)}(hj~h]h Description}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj}ubh)}(hThis macro will send the specified DCS command with payload twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.h]hThis macro will send the specified DCS command with payload twice, once per each of the two interfaces supplied. This is useful for reducing duplication of code in panel drivers which use two parallel serial interfaces.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj}ubh)}(hNote that if an error occurs while transmitting the payload to the first DSI interface, the payload will not be sent to the second DSI interface.h]hNote that if an error occurs while transmitting the payload to the first DSI interface, the payload will not be sent to the second DSI interface.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM hj}ubh)}(hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.h]hxThis macro will print errors for you and error handling is optimized for callers that call this multiple times in a row.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMhj}ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dsi_driver (C struct)c.mipi_dsi_driverhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hmipi_dsi_driverh]j)}(hstruct mipi_dsi_driverh](j)}(hjh]hstruct}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhMubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLhhhj]hMubj)}(hmipi_dsi_driverh]j)}(hjJh]hmipi_dsi_driver}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubah}(h]h ](jjeh"]h$]h&]jjuh1jhjLhhhj]hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjHhhhj]hMubah}(h]jCah ](jjeh"]h$]h&]jj)jhuh1jhj]hMhjEhhubj)}(hhh]h)}(h DSI driverh]h DSI driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM!hjhhubah}(h]h ]h"]h$]h&]uh1jhjEhhhj]hMubeh}(h]h ](jstructeh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Definition**:: struct mipi_dsi_driver { struct device_driver driver; int(*probe)(struct mipi_dsi_device *dsi); void (*remove)(struct mipi_dsi_device *dsi); void (*shutdown)(struct mipi_dsi_device *dsi); }; **Members** ``driver`` device driver model driver ``probe`` callback for device binding ``remove`` callback for device unbinding ``shutdown`` called at shutdown time to quiesce the deviceh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM%hjubj@)}(hstruct mipi_dsi_driver { struct device_driver driver; int(*probe)(struct mipi_dsi_device *dsi); void (*remove)(struct mipi_dsi_device *dsi); void (*shutdown)(struct mipi_dsi_device *dsi); };h]hstruct mipi_dsi_driver { struct device_driver driver; int(*probe)(struct mipi_dsi_device *dsi); void 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]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM$hj2ubj)}(hhh]h)}(hcallback for device bindingh]hcallback for device binding}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjMhM$hjNubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jmhjMhM$hjubjn)}(h)``remove`` callback for device unbinding h](jt)}(h ``remove``h]jz)}(hjqh]hremove}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjoubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM%hjkubj)}(hhh]h)}(hcallback for device unbindingh]hcallback for device unbinding}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM%hjubah}(h]h ]h"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]uh1jmhjhM%hjubjn)}(h:``shutdown`` called at shutdown time to quiesce the deviceh](jt)}(h ``shutdown``h]jz)}(hjh]hshutdown}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM%hjubj)}(hhh]h)}(h-called at shutdown time to quiesce the deviceh]h-called at shutdown time to quiesce the device}(hjÀhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:357: ./include/drm/drm_mipi_dsi.hhM&hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM%hjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,of_find_mipi_dsi_device_by_node (C function)!c.of_find_mipi_dsi_device_by_nodehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hQstruct mipi_dsi_device * of_find_mipi_dsi_device_by_node (struct device_node *np)h]j)}(hOstruct mipi_dsi_device *of_find_mipi_dsi_device_by_node(struct device_node *np)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chKhubj)}(h h]h }(hjhhhNhNubah}(h]h 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]jah"]h$]h&]uh1jhjzubj+)}(hj9h]h*}(hjȁhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjzubj)}(hnph]hnp}(hjՁhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjvubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKhubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKhubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhhjhhubj)}(hhh]h)}(h4find the MIPI DSI device matching a device tree nodeh]h4find the MIPI DSI device matching a device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chKhhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKhubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct device_node *np`` device tree node **Return** A pointer to the MIPI DSI device corresponding to **np** or NULL if no such device exists (or has not been registered yet).h](h)}(h**Parameters**h]j%)}(hj!h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chKlhjubji)}(hhh]jn)}(h,``struct device_node *np`` device tree node h](jt)}(h``struct device_node *np``h]jz)}(hj@h]hstruct device_node *np}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chKjhj:ubj)}(hhh]h)}(hdevice tree nodeh]hdevice tree node}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhKjhjVubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhjUhKjhj7ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hj{h]hReturn}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chKlhjubh)}(h{A pointer to the MIPI DSI device corresponding to **np** or NULL if no such device exists (or has not been registered yet).h](h2A pointer to the MIPI DSI device corresponding to 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]jah"]h$]h&]uh1jhj΂hhhj߂hKubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jmipi_dsi_device_register_fullsbc.mipi_dsi_device_register_fullasbuh1hhj΂hhhj߂hKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj΂hhhj߂hKubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj΂hhhj߂hKubj)}(hmipi_dsi_device_register_fullh]j)}(hjh]hmipi_dsi_device_register_full}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj΂hhhj߂hKubj)}(hE(struct mipi_dsi_host *host, const struct mipi_dsi_device_info *info)h](j)}(hstruct mipi_dsi_host *hosth](j)}(hjh]hstruct}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(h mipi_dsi_hosth]h mipi_dsi_host}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjlmodnameN classnameNjj)}j]j c.mipi_dsi_device_register_fullasbuh1hhjHubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjHubj)}(hhosth]hhost}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjDubj)}(h'const struct mipi_dsi_device_info *infoh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjɃhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj׃hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_device_infoh]hmipi_dsi_device_info}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.mipi_dsi_device_register_fullasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj!hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hinfoh]hinfo}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjDubeh}(h]h ]h"]h$]h&]jjuh1jhj΂hhhj߂hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjʂhhhj߂hKubah}(h]jłah ](jjeh"]h$]h&]jj)jhuh1jhj߂hKhjǂhhubj)}(hhh]h)}(hcreate a MIPI DSI deviceh]hcreate a MIPI DSI device}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chKhjUhhubah}(h]h ]h"]h$]h&]uh1jhjǂhhhj߂hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjpjjpjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_host *host`` DSI host to which this device is connected ``const struct mipi_dsi_device_info *info`` pointer to template containing DSI device information **Description** Create a MIPI DSI device by using the device information provided by mipi_dsi_device_info template **Return** A pointer to the newly created MIPI DSI device, or, a pointer encoded with an errorh](h)}(h**Parameters**h]j%)}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chKhjtubji)}(hhh](jn)}(hJ``struct mipi_dsi_host *host`` DSI host to which this device is connected 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]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM hjwubj)}(hhh]h)}(h5pointer to template containing DSI device informationh]h5pointer to template containing DSI device information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubh)}(hbCreate a MIPI DSI device by using the device information provided by mipi_dsi_device_info templateh]hbCreate a MIPI DSI device by using the device information provided by mipi_dsi_device_info template}(hjΉhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubh)}(hThis is the managed version of mipi_dsi_device_register_full() which automatically calls mipi_dsi_device_unregister() when **dev** is unbound.h](h{This is the managed version of mipi_dsi_device_register_full() which automatically calls mipi_dsi_device_unregister() when }(hj݉hhhNhNubj%)}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj݉ubh is unbound.}(hj݉hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hSA pointer to the newly created MIPI DSI device, or, a pointer encoded with an errorh]hSA pointer to the newly created MIPI DSI device, or, a pointer encoded with an error}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*of_find_mipi_dsi_host_by_node (C function)c.of_find_mipi_dsi_host_by_nodehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hOstruct mipi_dsi_host * of_find_mipi_dsi_host_by_node (struct device_node *node)h]j)}(hMstruct mipi_dsi_host *of_find_mipi_dsi_host_by_node(struct device_node *node)h](j)}(hjh]hstruct}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM0ubj)}(h h]h }(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhjRhM0ubh)}(hhh]j)}(h mipi_dsi_hosth]h mipi_dsi_host}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjfmodnameN classnameNjj)}j]j)}jof_find_mipi_dsi_host_by_nodesbc.of_find_mipi_dsi_host_by_nodeasbuh1hhjAhhhjRhM0ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAhhhjRhM0ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjAhhhjRhM0ubj)}(hof_find_mipi_dsi_host_by_nodeh]j)}(hjh]hof_find_mipi_dsi_host_by_node}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjAhhhjRhM0ubj)}(h(struct device_node *node)h]j)}(hstruct device_node *nodeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj̊hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hj݊hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjڊubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjߊmodnameN classnameNjj)}j]jc.of_find_mipi_dsi_host_by_nodeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hnodeh]hnode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjAhhhjRhM0ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj=hhhjRhM0ubah}(h]j8ah ](jjeh"]h$]h&]jj)jhuh1jhjRhM0hj:hhubj)}(hhh]h)}(h2find the MIPI DSI host matching a device tree nodeh]h2find the MIPI DSI host matching a device tree node}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM0hj=hhubah}(h]h ]h"]h$]h&]uh1jhj:hhhjRhM0ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjXjjXjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct device_node *node`` device tree node **Return** A pointer to the MIPI DSI host corresponding to **node** or NULL if no such device exists (or has not been registered yet).h](h)}(h**Parameters**h]j%)}(hjbh]h Parameters}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM4hj\ubji)}(hhh]jn)}(h.``struct device_node *node`` device tree node h](jt)}(h``struct device_node *node``h]jz)}(hjh]hstruct device_node *node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM2hj{ubj)}(hhh]h)}(hdevice tree nodeh]hdevice tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM2hjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhjhM2hjxubah}(h]h ]h"]h$]h&]uh1jhhj\ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM4hj\ubh)}(h{A pointer to the MIPI DSI host corresponding to **node** or NULL if no such device exists (or has not been registered yet).h](h0A pointer to the MIPI DSI host corresponding to }(hjҋhhhNhNubj%)}(h**node**h]hnode}(hjڋhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjҋubhC or NULL if no such device exists (or has not been registered yet).}(hjҋhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM4hj\ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dsi_attach (C function)c.mipi_dsi_attachhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h1int 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]jah"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjHubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj!hMtubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj!hMtubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj!hMthjhhubj)}(hhh]h)}(h#attach a DSI device to its DSI hosth]h#attach a DSI device to its DSI host}(hjӌhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMthjЌhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj!hMtubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h@**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheralh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMxhjubji)}(hhh]jn)}(h.``struct mipi_dsi_device *dsi`` DSI peripheralh](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMzhjubj)}(hhh]h)}(hDSI peripheralh]hDSI peripheral}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMuhj*ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj)hMzhj ubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dsi_detach (C function)c.mipi_dsi_detachhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h1int mipi_dsi_detach (struct mipi_dsi_device *dsi)h]j)}(h0int mipi_dsi_detach(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjhhhj|hMubj)}(hmipi_dsi_detachh]j)}(hmipi_dsi_detachh]hmipi_dsi_detach}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjjhhhj|hMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjɍhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjƍubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjˍmodnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_detachasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjjhhhj|hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjfhhhj|hMubah}(h]jaah ](jjeh"]h$]h&]jj)jhuh1jhj|hMhjchhubj)}(hhh]h)}(h%detach a DSI device from its DSI hosth]h%detach a DSI device from its DSI host}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj+hhubah}(h]h ]h"]h$]h&]uh1jhjchhhj|hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjFjjFjjjuh1jhhhjrchNhNubj)}(h@**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheralh](h)}(h**Parameters**h]j%)}(hjPh]h Parameters}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjJubji)}(hhh]jn)}(h.``struct mipi_dsi_device *dsi`` DSI peripheralh](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjoh]hstruct mipi_dsi_device *dsi}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjiubj)}(hhh]h)}(hDSI peripheralh]hDSI peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubah}(h]h ]h"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjfubah}(h]h ]h"]h$]h&]uh1jhhjJubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h 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]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjVubj)}(hhh]h)}(h MIPI DSI data type of the packeth]h MIPI DSI data type of the packet}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjrubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjqhMhjSubah}(h]h ]h"]h$]h&]uh1jhhj7ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj7ubh)}(hMtrue if the packet for the given data type is a long packet, false otherwise.h]hMtrue if the packet for the given data type is a long packet, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj7ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#mipi_dsi_create_packet (C function)c.mipi_dsi_create_packethNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h[int mipi_dsi_create_packet (struct mipi_dsi_packet *packet, const struct mipi_dsi_msg *msg)h]j)}(hZint mipi_dsi_create_packet(struct mipi_dsi_packet *packet, const struct mipi_dsi_msg *msg)h](j)}(hinth]hint}(hjܓhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjؓhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjؓhhhjhMubj)}(hmipi_dsi_create_packeth]j)}(hmipi_dsi_create_packeth]hmipi_dsi_create_packet}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjؓhhhjhMubj)}(h@(struct mipi_dsi_packet *packet, const struct mipi_dsi_msg *msg)h](j)}(hstruct mipi_dsi_packet *packeth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_packeth]hmipi_dsi_packet}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9modnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_create_packetasbuh1hhjubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpacketh]hpacket}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct mipi_dsi_msg *msgh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h mipi_dsi_msgh]h mipi_dsi_msg}(hjĔhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjƔmodnameN classnameNjj)}j]jSc.mipi_dsi_create_packetasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmsgh]hmsg}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjؓhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjԓhhhjhMubah}(h]jϓah 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}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj/hMKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj/hMKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj/hMKhjhhubj)}(hhh]h)}(h#sends a Shutdown Peripheral commandh]h#sends a Shutdown Peripheral command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMKhjޖhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj/hMKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMOhjubji)}(hhh]jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hj"h]hstruct mipi_dsi_device *dsi}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMLhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hMLhj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj7hMLhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hj]h]hReturn}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMNhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMNhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(mipi_dsi_turn_on_peripheral (C function)c.mipi_dsi_turn_on_peripheralhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h=int mipi_dsi_turn_on_peripheral (struct mipi_dsi_device *dsi)h]j)}(hubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&mipi_dsi_compression_mode (C function)c.mipi_dsi_compression_modehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hHint mipi_dsi_compression_mode (struct mipi_dsi_device *dsi, bool enable)h]j)}(hGint mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hmipi_dsi_compression_modeh]j)}(hmipi_dsi_compression_modeh]hmipi_dsi_compression_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h*(struct mipi_dsi_device *dsi, bool enable)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjœhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjϜhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjݜubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_compression_modeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h bool enableh](j)}(hjAh]hbool}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(henableh]henable}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj}hhhjhMubah}(h]jxah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjzhhubj)}(hhh]h)}(h$enable/disable DSC on the peripheralh]h$enable/disable DSC on the peripheral}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjvhhubah}(h]h ]h"]h$]h&]uh1jhjzhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hXS**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``bool enable`` Whether to enable or disable the DSC **Description** Enable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjӝhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjϝhMhjНubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjϝhMhjubjn)}(h5``bool enable`` Whether to enable or disable the DSC h](jt)}(h``bool enable``h]jz)}(hjh]h bool enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h$Whether to enable or disable the DSCh]h$Whether to enable or disable the DSC}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj.h]h Description}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.h]hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j%)}(hjUh]hReturn}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjSubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+mipi_dsi_picture_parameter_set (C function) c.mipi_dsi_picture_parameter_sethNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hqint mipi_dsi_picture_parameter_set (struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps)h]j)}(hpint mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hmipi_dsi_picture_parameter_seth]j)}(hmipi_dsi_picture_parameter_seth]hmipi_dsi_picture_parameter_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hN(struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjמhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӞubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӞubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb c.mipi_dsi_picture_parameter_setasbuh1hhjӞubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӞubj+)}(hj9h]h*}(hj#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjӞubj)}(hdsih]hdsi}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjӞubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjϞubj)}(h/const struct drm_dsc_picture_parameter_set *ppsh](j)}(hjUh]hconst}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(hjh]hstruct}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubh)}(hhh]j)}(hdrm_dsc_picture_parameter_seth]hdrm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.mipi_dsi_picture_parameter_setasbuh1hhjEubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjEubj)}(hppsh]hpps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjϞubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h&transmit the DSC PPS to the peripheralh]h&transmit the DSC PPS to the peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``const struct drm_dsc_picture_parameter_set *pps`` VESA DSC 1.1 Picture Parameter Set **Description** Transmit the VESA DSC 1.1 Picture Parameter Set to the peripheral. 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Use mipi_dsi_picture_parameter_set_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjàhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjנhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#mipi_dsi_generic_write (C function)c.mipi_dsi_generic_writehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h^ssize_t mipi_dsi_generic_write (struct mipi_dsi_device *dsi, const void *payload, size_t size)h]j)}(h]ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void 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DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjآhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjԢhMhjբubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjԢhMhjubjn)}(h6``const void *payload`` buffer containing the payload h](jt)}(h``const void *payload``h]jz)}(hjh]hconst void *payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hbuffer containing the payloadh]hbuffer containing the payload}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjubjn)}(h'``size_t size`` size of payload buffer h](jt)}(h``size_t size``h]jz)}(hj1h]h size_t size}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj+ubj)}(hhh]h)}(hsize of payload bufferh]hsize of payload buffer}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjGubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhjFhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjlh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h\This function will automatically choose the right data type depending on the payload length.h]h\This function will automatically choose the right data type depending on the payload length.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h 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kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.mipi_dsi_dual_generic_write_multi (C function)#c.mipi_dsi_dual_generic_write_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hvoid mipi_dsi_dual_generic_write_multi (struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *payload, size_t size)h]j)}(hvoid mipi_dsi_dual_generic_write_multi(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *payload, size_t size)h](j)}(hvoidh]hvoid}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM$ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhj~hM$ubj)}(h!mipi_dsi_dual_generic_write_multih]j)}(h!mipi_dsi_dual_generic_write_multih]h!mipi_dsi_dual_generic_write_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjlhhhj~hM$ubj)}(h(struct mipi_dsi_multi_context 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classnameNjj)}j]j#c.mipi_dsi_dual_generic_write_multiasbuh1hhjubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjihhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsi1h]hdsi1}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct mipi_dsi_device *dsi2h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j#c.mipi_dsi_dual_generic_write_multiasbuh1hhjubj)}(h h]h }(hj˧hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj٧hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsi2h]hdsi2}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst void *payloadh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpayloadh]hpayload}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjamodnameN classnameNjj)}j]j#c.mipi_dsi_dual_generic_write_multiasbuh1hhjXubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjlhhhj~hM$ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhhj~hM$ubah}(h]jcah ](jjeh"]h$]h&]jj)jhuh1jhj~hM$hjehhubj)}(hhh]h)}(hHmipi_dsi_generic_write_multi() for two dsi channels, one after the otherh]hHmipi_dsi_generic_write_multi() for two dsi channels, one after the other}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM$hjhhubah}(h]h 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./drivers/gpu/drm/drm_mipi_dsi.chM@hjBubj)}(hhh]h)}(h+buffer in which to return the received datah]h+buffer in which to return the received data}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hM@hj^ubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jmhj]hM@hjubjn)}(h'``size_t size`` size of receive buffer h](jt)}(h``size_t size``h]jz)}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMAhj{ubj)}(hhh]h)}(hsize of receive bufferh]hsize of receive buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMAhjubah}(h]h ]h"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]uh1jmhjhMAhjubeh}(h]h ]h"]h$]h&]uh1jhhjxubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMChjxubh)}(hlThis function will automatically choose the right data type depending on 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]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jG c.drm_mipi_dsi_get_input_bus_fmtasbuh1hhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(h dsi_formath]h dsi_format}(hjĮhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjrubah}(h]h ]h"]h$]h&]jjuh1jhj$hhhjLhMjubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhjLhMjubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjLhMjhjhhubj)}(hhh]h)}(h]Get the required MEDIA_BUS_FMT_* based input pixel format for a given DSI output pixel formath]h]Get the required MEDIA_BUS_FMT_* based input pixel format for a given DSI output pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMjhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjLhMjubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``enum mipi_dsi_pixel_format dsi_format`` pixel format that a DSI host needs to output **Description** Various DSI hosts can use this function during their :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input. **Return** a 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMnhj ubji)}(hhh]jn)}(hW``enum mipi_dsi_pixel_format dsi_format`` pixel format that a DSI host needs to output h](jt)}(h)``enum mipi_dsi_pixel_format dsi_format``h]jz)}(hj/h]h%enum mipi_dsi_pixel_format dsi_format}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMmhj)ubj)}(hhh]h)}(h,pixel format that a DSI host needs to outputh]h,pixel format that a DSI host needs to output}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjDhMmhjEubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhjDhMmhj&ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjjh]h Description}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjhubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMohj ubh)}(hVarious DSI hosts can use this function during their :c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts ` operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input.h](h5Various DSI hosts can use this function during their }(hjhhhNhNubh)}(hG:c:type:`drm_bridge_funcs.atomic_get_input_bus_fmts `h]jz)}(hjh]h*drm_bridge_funcs.atomic_get_input_bus_fmts}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMnhjubhK operation to ascertain the MEDIA_BUS_FMT_* pixel format required as input.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMnhj ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMrhj ubh)}(hBa 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.h]hBa 32-bit MEDIA_BUS_FMT_* value on success or 0 in case of failure.}(hjʯhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMshj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&mipi_dsi_dcs_write_buffer (C function)c.mipi_dsi_dcs_write_bufferhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h]ssize_t mipi_dsi_dcs_write_buffer (struct mipi_dsi_device *dsi, const void *data, size_t len)h]j)}(h\ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi, const void *data, size_t len)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h 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}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hmipi_dsi_dcs_write_buffer_multih]j)}(hmipi_dsi_dcs_write_buffer_multih]hmipi_dsi_dcs_write_buffer_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hB(struct mipi_dsi_multi_context *ctx, const void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjǵhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjõubj)}(h h]h }(hjԵhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjõubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb!c.mipi_dsi_dcs_write_buffer_multiasbuh1hhjõubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjõubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjõubj)}(hctxh]hctx}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjõubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst void *datah](j)}(hjUh]hconst}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(hvoidh]hvoid}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj+)}(hj9h]h*}(hjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj5ubj)}(hdatah]hdata}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h size_t lenh](h)}(hhh]j)}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.mipi_dsi_dcs_write_buffer_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hlenh]hlen}(hjŶhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]j}ah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h/mipi_dsi_dcs_write_buffer_chatty() w/ accum_errh]h/mipi_dsi_dcs_write_buffer_chatty() w/ accum_err}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX_**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``const void *data`` buffer containing data to be transmitted ``size_t len`` size of transmission buffer **Description** Like mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubji)}(hhh](jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hj0h]h"struct mipi_dsi_multi_context *ctx}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj*ubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMhjFubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhjEhMhj'ubjn)}(h>``const void *data`` buffer containing data to be transmitted h](jt)}(h``const void *data``h]jz)}(hjih]hconst void *data}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjcubj)}(hhh]h)}(h(buffer containing data to be transmittedh]h(buffer containing data to be transmitted}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhjubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhj'ubjn)}(h+``size_t len`` size of transmission buffer h](jt)}(h``size_t len``h]jz)}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hsize of transmission bufferh]hsize of transmission buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj'ubeh}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjݷh]h Description}(hj߷hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj۷ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubh)}(hLike mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.h]hLike mipi_dsi_dcs_write_buffer_chatty() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1mipi_dsi_dual_dcs_write_buffer_multi (C function)&c.mipi_dsi_dual_dcs_write_buffer_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hvoid mipi_dsi_dual_dcs_write_buffer_multi (struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h]j)}(hvoid mipi_dsi_dual_dcs_write_buffer_multi(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h](j)}(hvoidh]hvoid}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj0hMubj)}(h$mipi_dsi_dual_dcs_write_buffer_multih]j)}(h$mipi_dsi_dual_dcs_write_buffer_multih]h$mipi_dsi_dual_dcs_write_buffer_multi}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj0hMubj)}(h~(struct mipi_dsi_multi_context *ctx, struct mipi_dsi_device *dsi1, struct mipi_dsi_device *dsi2, const void *data, size_t len)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjEsb&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhj[ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj[ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjWubj)}(hstruct mipi_dsi_device *dsi1h](j)}(hjh]hstruct}(hjѸhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj͸ubj)}(h h]h }(hj޸hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj͸ubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhj͸ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj͸ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj͸ubj)}(hdsi1h]hdsi1}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj͸ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjWubj)}(hstruct mipi_dsi_device *dsi2h](j)}(hjh]hstruct}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjamodnameN classnameNjj)}j]j&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhj=ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=ubj)}(hdsi2h]hdsi2}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjWubj)}(hconst void *datah](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hvoidh]hvoid}(hj̹hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjڹhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdatah]hdata}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjWubj)}(h size_t lenh](h)}(hhh]j)}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j&c.mipi_dsi_dual_dcs_write_buffer_multiasbuh1hhj ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(hlenh]hlen}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjWubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj0hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj0hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj0hMhjhhubj)}(hhh]h)}(hKmipi_dsi_dcs_write_buffer_multi() for two dsi channels, one after the otherh]hKmipi_dsi_dcs_write_buffer_multi() for two dsi channels, one after the other}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjdhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj0hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to ``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to ``const void *data`` Buffer containing data to be transmitted ``size_t len`` Size of transmission buffer **Description** A wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hF``struct mipi_dsi_device *dsi1`` First dsi channel to write buffer to h](jt)}(h ``struct mipi_dsi_device *dsi1``h]jz)}(hjh]hstruct mipi_dsi_device *dsi1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjߺubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjۺubj)}(hhh]h)}(h$First dsi channel to write buffer toh]h$First dsi channel to write buffer to}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjۺubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hG``struct mipi_dsi_device *dsi2`` Second dsi channel to write buffer to h](jt)}(h ``struct mipi_dsi_device *dsi2``h]jz)}(hjh]hstruct mipi_dsi_device *dsi2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h%Second dsi channel to write buffer toh]h%Second dsi channel to write buffer to}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj0ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjubjn)}(h>``const void *data`` Buffer containing data to be transmitted h](jt)}(h``const void *data``h]jz)}(hjSh]hconst void *data}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjMubj)}(hhh]h)}(h(Buffer containing data to be transmittedh]h(Buffer containing data to be transmitted}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjhhMhjubjn)}(h+``size_t len`` Size of transmission buffer h](jt)}(h``size_t len``h]jz)}(hjh]h size_t len}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hSize of transmission bufferh]hSize of transmission buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjǻh]h Description}(hjɻhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjŻubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hA wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.h]hA wrapper around mipi_dsi_dcs_write_buffer_multi() that allows the user to conveniently write to two dsi channels, one after the other.}(hjݻhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jmipi_dsi_dcs_write (C function)c.mipi_dsi_dcs_writehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h^ssize_t mipi_dsi_dcs_write (struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h]j)}(h]ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jmipi_dsi_dcs_writesbc.mipi_dsi_dcs_writeasbuh1hhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj0hMubj)}(hmipi_dsi_dcs_writeh]j)}(hj-h]hmipi_dsi_dcs_write}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj0hMubj)}(hC(struct mipi_dsi_device *dsi, u8 cmd, const void *data, size_t len)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]j+c.mipi_dsi_dcs_writeasbuh1hhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubj)}(hu8 cmdh](h)}(hhh]j)}(hu8h]hu8}(hjѼhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjμubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjӼmodnameN classnameNjj)}j]j+c.mipi_dsi_dcs_writeasbuh1hhjʼubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjʼubj)}(hcmdh]hcmd}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjʼubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjVubj)}(hconst void *datah](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h 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]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj[hhhjhM3ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjWhhhjhM3ubah}(h]jRah ](jjeh"]h$]h&]jj)jhuh1jhjhM3hjThhubj)}(hhh]h)}(hsend DCS read request commandh]hsend DCS read request command}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM3hjhhubah}(h]h ]h"]h$]h&]uh1jhjThhhjhM3ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 cmd`` DCS command ``void *data`` buffer in which to receive data ``size_t len`` size of receive buffer **Return** The number of bytes read or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj&h]h Parameters}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM7hj ubji)}(hhh](jn)}(h6``struct mipi_dsi_device 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Use mipi_dsi_dcs_soft_reset_multi() instead.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j%)}(hjyh]hReturn}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjwubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(mipi_dsi_dcs_get_power_mode (C function)c.mipi_dsi_dcs_get_power_modehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hGint mipi_dsi_dcs_get_power_mode (struct mipi_dsi_device *dsi, u8 *mode)h]j)}(hFint mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hmipi_dsi_dcs_get_power_modeh]j)}(hmipi_dsi_dcs_get_power_modeh]hmipi_dsi_dcs_get_power_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h'(struct mipi_dsi_device *dsi, u8 *mode)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_dcs_get_power_modeasbuh1hhjubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjGhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu8 *modeh](h)}(hhh]j)}(hu8h]hu8}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjrmodnameN classnameNjj)}j]j5c.mipi_dsi_dcs_get_power_modeasbuh1hhjiubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjiubj)}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h-query the display module's current power modeh]h/query the display module’s current power mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 *mode`` return location for the current power mode **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hMhj*ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj)hMhj ubjn)}(h8``u8 *mode`` return location for the current power mode h](jt)}(h ``u8 *mode``h]jz)}(hjMh]hu8 *mode}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjGubj)}(hhh]h)}(h*return location for the current power modeh]h*return location for the current power mode}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhMhjcubah}(h]h ]h"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]uh1jmhjbhMhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*mipi_dsi_dcs_get_pixel_format (C function)c.mipi_dsi_dcs_get_pixel_formathNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hKint mipi_dsi_dcs_get_pixel_format (struct mipi_dsi_device *dsi, u8 *format)h]j)}(hJint mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hmipi_dsi_dcs_get_pixel_formath]j)}(hmipi_dsi_dcs_get_pixel_formath]hmipi_dsi_dcs_get_pixel_format}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h)(struct mipi_dsi_device *dsi, u8 *format)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj*modnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_dcs_get_pixel_formatasbuh1hhjubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjVhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h u8 *formath](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jDc.mipi_dsi_dcs_get_pixel_formatasbuh1hhjxubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjxubj)}(hformath]hformat}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hBgets the pixel format for the RGB image data used by the interfaceh]hBgets the pixel format for the RGB image data used by the interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 *format`` return location for the pixel format **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hj#h]hstruct mipi_dsi_device *dsi}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj8hMhjubjn)}(h4``u8 *format`` return location for the pixel format h](jt)}(h``u8 *format``h]jz)}(hj\h]h u8 *format}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjVubj)}(hhh]h)}(h$return location for the pixel formath]h$return location for the pixel format}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjqhMhjrubah}(h]h ]h"]h$]h&]uh1jhjVubeh}(h]h ]h"]h$]h&]uh1jmhjqhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*mipi_dsi_dcs_enter_sleep_mode (C function)c.mipi_dsi_dcs_enter_sleep_modehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h?int mipi_dsi_dcs_enter_sleep_mode (struct mipi_dsi_device *dsi)h]j)}(h>int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hmipi_dsi_dcs_enter_sleep_modeh]j)}(hmipi_dsi_dcs_enter_sleep_modeh]hmipi_dsi_dcs_enter_sleep_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9modnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_dcs_enter_sleep_modeasbuh1hhjubj)}(h h]h }(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hWdisable all unnecessary blocks inside the display module except interface communicationh]hWdisable all unnecessary blocks inside the display module except interface communication}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh]jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hOThis function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead.h]hOThis function is deprecated. Use mipi_dsi_dcs_enter_sleep_mode_multi() instead.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j%)}(hj?h]hReturn}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj=ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)mipi_dsi_dcs_exit_sleep_mode (C function)c.mipi_dsi_dcs_exit_sleep_modehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h>int mipi_dsi_dcs_exit_sleep_mode (struct mipi_dsi_device *dsi)h]j)}(h=int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hmipi_dsi_dcs_exit_sleep_modeh]j)}(hmipi_dsi_dcs_exit_sleep_modeh]hmipi_dsi_dcs_exit_sleep_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_dcs_exit_sleep_modeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj|hhhjhMubah}(h]jwah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjyhhubj)}(hhh]h)}(h+enable all blocks inside the display moduleh]h+enable all blocks inside the display module}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjAhhubah}(h]h ]h"]h$]h&]uh1jhjyhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj\jj\jjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjfh]h Parameters}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj`ubji)}(hhh]jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj|ubah}(h]h ]h"]h$]h&]uh1jhhj`ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj`ubh)}(hNThis function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_dcs_exit_sleep_mode_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj`ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj`ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj`ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)mipi_dsi_dcs_set_display_off (C function)c.mipi_dsi_dcs_set_display_offhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h>int mipi_dsi_dcs_set_display_off (struct mipi_dsi_device *dsi)h]j)}(h=int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi)h](j)}(hinth]hint}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhj:hMubj)}(hmipi_dsi_dcs_set_display_offh]j)}(hmipi_dsi_dcs_set_display_offh]hmipi_dsi_dcs_set_display_off}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ](jjeh"]h$]h&]jjuh1jhj(hhhj:hMubj)}(h(struct mipi_dsi_device *dsi)h]j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjOsbc.mipi_dsi_dcs_set_display_offasbuh1hhjeubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjaubah}(h]h ]h"]h$]h&]jjuh1jhj(hhhj:hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj$hhhj:hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj:hMhj!hhubj)}(hhh]h)}(h4stop displaying the image data on the display deviceh]h4stop displaying the image data on the display device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj!hhhj:hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device **Description** This function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh]jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hj-h]hstruct mipi_dsi_device *dsi}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj'ubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjCubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jmhjBhMhj$ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjhh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hNThis function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead.h]hNThis function is deprecated. Use mipi_dsi_dcs_set_display_off_multi() instead.}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(mipi_dsi_dcs_set_display_on (C function)c.mipi_dsi_dcs_set_display_onhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h=int mipi_dsi_dcs_set_display_on (struct mipi_dsi_device *dsi)h]j)}(hhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hendh]hend}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[ubeh}(h]h ]h"]h$]h&]jjuh1jhj"hhhj4hM:ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj4hM:ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj4hM:hjhhubj)}(hhh]h)}(hIdefine the page extent of the frame memory accessed by the host processorh]hIdefine the page extent of the frame memory accessed by the host processor}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM:hjshhubah}(h]h ]h"]h$]h&]uh1jhjhhhj4hM:ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX=**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 start`` first page of frame memory ``u16 end`` last page of frame memory **Description** This function is deprecated. Use mipi_dsi_dcs_set_page_address_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM>hjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM<hjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM<hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM<hjubjn)}(h)``u16 start`` first page of frame memory h](jt)}(h ``u16 start``h]jz)}(hjh]h u16 start}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM=hjubj)}(hhh]h)}(hfirst page of frame memoryh]hfirst page of frame memory}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM=hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM=hjubjn)}(h&``u16 end`` last page of frame memory h](jt)}(h ``u16 end``h]jz)}(hj)h]hu16 end}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM>hj#ubj)}(hhh]h)}(hlast page of frame memoryh]hlast page of frame memory}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>hM>hj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj>hM>hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjdh]h Description}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjbubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM@hjubh)}(hOThis function is deprecated. Use mipi_dsi_dcs_set_page_address_multi() instead.h]hOThis function is deprecated. Use mipi_dsi_dcs_set_page_address_multi() instead.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM?hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMBhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMChjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%mipi_dsi_dcs_set_tear_on (C function)c.mipi_dsi_dcs_set_tear_onhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h\int mipi_dsi_dcs_set_tear_on (struct mipi_dsi_device *dsi, enum mipi_dsi_dcs_tear_mode mode)h]j)}(h[int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi, enum mipi_dsi_dcs_tear_mode mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMUubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMUubj)}(hmipi_dsi_dcs_set_tear_onh]j)}(hmipi_dsi_dcs_set_tear_onh]hmipi_dsi_dcs_set_tear_on}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMUubj)}(h?(struct mipi_dsi_device *dsi, enum mipi_dsi_dcs_tear_mode mode)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj-modnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_dcs_set_tear_onasbuh1hhj ubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjYhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hdsih]hdsi}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h enum mipi_dsi_dcs_tear_mode modeh](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubh)}(hhh]j)}(hmipi_dsi_dcs_tear_modeh]hmipi_dsi_dcs_tear_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jGc.mipi_dsi_dcs_set_tear_onasbuh1hhj{ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj)}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMUubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMUubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMUhjhhubj)}(hhh]h)}(hPturn on the display module's Tearing Effect output signal on the TE signal line.h]hRturn on the display module’s Tearing Effect output signal on the TE signal line.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMUhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMUubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhjrchNhNubj)}(hX.**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode **Description** This function is deprecated. Use mipi_dsi_dcs_set_tear_on_multi() instead. **Return** 0 on success or a negative error code on failureh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMYhjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hj4h]hstruct mipi_dsi_device *dsi}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj2ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMWhj.ubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhMWhjJubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jmhjIhMWhj+ubjn)}(hI``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode h](jt)}(h$``enum mipi_dsi_dcs_tear_mode mode``h]jz)}(hjmh]h enum mipi_dsi_dcs_tear_mode mode}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjkubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMXhjgubj)}(hhh]h)}(h#the Tearing Effect Output Line modeh]h#the Tearing Effect Output Line mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMXhjubah}(h]h ]h"]h$]h&]uh1jhjgubeh}(h]h ]h"]h$]h&]uh1jmhjhMXhj+ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMZhjubh)}(hJThis function is deprecated. Use mipi_dsi_dcs_set_tear_on_multi() instead.h]hJThis function is deprecated. Use mipi_dsi_dcs_set_tear_on_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMYhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM[hjubh)}(h00 on success or a negative error code on failureh]h00 on success or a negative error code on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM\hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*mipi_dsi_dcs_set_pixel_format (C function)c.mipi_dsi_dcs_set_pixel_formathNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hJint mipi_dsi_dcs_set_pixel_format (struct mipi_dsi_device *dsi, u8 format)h]j)}(hIint mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMnubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj"hMnubj)}(hmipi_dsi_dcs_set_pixel_formath]j)}(hmipi_dsi_dcs_set_pixel_formath]hmipi_dsi_dcs_set_pixel_format}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj"hMnubj)}(h((struct mipi_dsi_device *dsi, u8 format)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjqmodnameN classnameNjj)}j]j)}jj7sbc.mipi_dsi_dcs_set_pixel_formatasbuh1hhjMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjMubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjIubj)}(h u8 formath](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.mipi_dsi_dcs_set_pixel_formatasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hformath]hformat}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjIubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj"hMnubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj"hMnubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj"hMnhj hhubj)}(hhh]h)}(hBsets the pixel format for the RGB image data used by the interfaceh]hBsets the pixel format for the RGB image data used by the interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMnhjhhubah}(h]h ]h"]h$]h&]uh1jhj hhhj"hMnubeh}(h]h ](jfunctioneh"]h$]h&]jjjj4jj4jjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u8 format`` pixel format **Description** This function is deprecated. Use mipi_dsi_dcs_set_pixel_format_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj>h]h Parameters}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMrhj8ubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hj]h]hstruct mipi_dsi_device *dsi}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMphjWubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhMphjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjrhMphjTubjn)}(h``u8 format`` pixel format h](jt)}(h ``u8 format``h]jz)}(hjh]h u8 format}(hjhhhNhNubah}(hZ]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMqhjubj)}(hhh]h)}(h pixel formath]h pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMqhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMqhjTubeh}(h]h ]h"]h$]h&]uh1jhhj8ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMshj8ubh)}(hOThis function is deprecated. Use mipi_dsi_dcs_set_pixel_format_multi() instead.h]hOThis function is deprecated. Use mipi_dsi_dcs_set_pixel_format_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMrhj8ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMuhj8ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMvhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+mipi_dsi_dcs_set_tear_scanline (C function) c.mipi_dsi_dcs_set_tear_scanlinehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hNint mipi_dsi_dcs_set_tear_scanline (struct mipi_dsi_device *dsi, u16 scanline)h]j)}(hMint mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline)h](j)}(hinth]hint}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9hhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9hhhjKhMubj)}(hmipi_dsi_dcs_set_tear_scanlineh]j)}(hmipi_dsi_dcs_set_tear_scanlineh]hmipi_dsi_dcs_set_tear_scanline}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ](jjeh"]h$]h&]jjuh1jhj9hhhjKhMubj)}(h+(struct mipi_dsi_device *dsi, u16 scanline)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj`sb c.mipi_dsi_dcs_set_tear_scanlineasbuh1hhjvubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjvubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjrubj)}(h u16 scanlineh](h)}(hhh]j)}(hu16h]hu16}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j c.mipi_dsi_dcs_set_tear_scanlineasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hscanlineh]hscanline}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjrubeh}(h]h ]h"]h$]h&]jjuh1jhj9hhhjKhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj5hhhjKhMubah}(h]j0ah ](jjeh"]h$]h&]jj)jhuh1jhjKhMhj2hhubj)}(hhh]h)}(h]set the scanline to use as trigger for the Tearing Effect output signal of the display moduleh]h]set the scanline to use as trigger for the Tearing Effect output signal of the display module}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjBhhubah}(h]h ]h"]h$]h&]uh1jhj2hhhjKhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj]jj]jjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 scanline`` scanline to use as trigger **Description** This function is deprecated. Use mipi_dsi_dcs_set_tear_scanline_multi() instead. **Return** 0 on success or a negative error code on failureh](h)}(h**Parameters**h]j%)}(hjgh]h Parameters}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjaubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj}ubjn)}(h,``u16 scanline`` scanline to use as trigger h](jt)}(h``u16 scanline``h]jz)}(hjh]h u16 scanline}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hscanline to use as triggerh]hscanline to use as trigger}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj}ubeh}(h]h ]h"]h$]h&]uh1jhhjaubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjaubh)}(hPThis function is deprecated. Use mipi_dsi_dcs_set_tear_scanline_multi() instead.h]hPThis function is deprecated. Use mipi_dsi_dcs_set_tear_scanline_multi() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjaubh)}(h **Return**h]j%)}(hj!h]hReturn}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjaubh)}(h00 on success or a negative error code on failureh]h00 on success or a negative error code on failure}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjaubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0mipi_dsi_dcs_set_display_brightness (C function)%c.mipi_dsi_dcs_set_display_brightnesshNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hUint mipi_dsi_dcs_set_display_brightness (struct mipi_dsi_device *dsi, u16 brightness)h]j)}(hTint mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hinth]hint}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhjthMubj)}(h#mipi_dsi_dcs_set_display_brightnessh]j)}(h#mipi_dsi_dcs_set_display_brightnessh]h#mipi_dsi_dcs_set_display_brightness}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjbhhhjthMubj)}(h-(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb%c.mipi_dsi_dcs_set_display_brightnessasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu16 brightnessh](h)}(hhh]j)}(hu16h]hu16}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j%c.mipi_dsi_dcs_set_display_brightnessasbuh1hhjubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h brightnessh]h brightness}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjbhhhjthMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj^hhhjthMubah}(h]jYah ](jjeh"]h$]h&]jj)jhuh1jhjthMhj[hhubj)}(hhh]h)}(h(sets the brightness value of the displayh]h(sets the brightness value of the display}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjkhhubah}(h]h ]h"]h$]h&]uh1jhj[hhhjthMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 brightness`` brightness value **Description** This function is deprecated. Use mipi_dsi_dcs_set_display_brightness_multi() instead. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h$``u16 brightness`` brightness value h](jt)}(h``u16 brightness``h]jz)}(hjh]hu16 brightness}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hbrightness valueh]hbrightness value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj#h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj!ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hUThis function is deprecated. Use mipi_dsi_dcs_set_display_brightness_multi() instead.h]hUThis function is deprecated. Use mipi_dsi_dcs_set_display_brightness_multi() instead.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h **Return**h]j%)}(hjJh]hReturn}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0mipi_dsi_dcs_get_display_brightness (C function)%c.mipi_dsi_dcs_get_display_brightnesshNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hVint mipi_dsi_dcs_get_display_brightness (struct mipi_dsi_device *dsi, u16 *brightness)h]j)}(hUint mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi, u16 *brightness)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h#mipi_dsi_dcs_get_display_brightnessh]j)}(h#mipi_dsi_dcs_get_display_brightnessh]h#mipi_dsi_dcs_get_display_brightness}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h.(struct mipi_dsi_device *dsi, u16 *brightness)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb%c.mipi_dsi_dcs_get_display_brightnessasbuh1hhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu16 *brightnessh](h)}(hhh]j)}(hu16h]hu16}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjCmodnameN classnameNjj)}j]j%c.mipi_dsi_dcs_get_display_brightnessasbuh1hhj:ubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj+)}(hj9h]h*}(hjmhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:ubj)}(h brightnessh]h brightness}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h0gets the current brightness value of the displayh]h0gets the current brightness value of the display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 *brightness`` brightness value **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h%``u16 *brightness`` brightness value h](jt)}(h``u16 *brightness``h]jz)}(hjh]hu16 *brightness}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hbrightness valueh]hbrightness value}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hMhj4ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj3hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjYh]hReturn}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6mipi_dsi_dcs_set_display_brightness_large (C function)+c.mipi_dsi_dcs_set_display_brightness_largehNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h[int mipi_dsi_dcs_set_display_brightness_large (struct mipi_dsi_device *dsi, u16 brightness)h]j)}(hZint mipi_dsi_dcs_set_display_brightness_large(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h)mipi_dsi_dcs_set_display_brightness_largeh]j)}(h)mipi_dsi_dcs_set_display_brightness_largeh]h)mipi_dsi_dcs_set_display_brightness_large}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h-(struct mipi_dsi_device *dsi, u16 brightness)h](j)}(hstruct mipi_dsi_device *dsih](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_deviceh]hmipi_dsi_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb+c.mipi_dsi_dcs_set_display_brightness_largeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj'hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdsih]hdsi}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu16 brightnessh](h)}(hhh]j)}(hu16h]hu16}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjRmodnameN classnameNjj)}j]j+c.mipi_dsi_dcs_set_display_brightness_largeasbuh1hhjIubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubj)}(h brightnessh]h brightness}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h/sets the 16-bit brightness value of the displayh]h/sets the 16-bit brightness value of the display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_device *dsi`` DSI peripheral device ``u16 brightness`` brightness value **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(h6``struct mipi_dsi_device *dsi`` DSI peripheral device h](jt)}(h``struct mipi_dsi_device *dsi``h]jz)}(hjh]hstruct mipi_dsi_device *dsi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(hDSI peripheral deviceh]hDSI peripheral device}(hjhhhNhNubah}(h]h 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on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1mipi_dsi_picture_parameter_set_multi (C function)&c.mipi_dsi_picture_parameter_set_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hvoid mipi_dsi_picture_parameter_set_multi (struct mipi_dsi_multi_context *ctx, const struct drm_dsc_picture_parameter_set *pps)h]j)}(h~void mipi_dsi_picture_parameter_set_multi(struct mipi_dsi_multi_context *ctx, const struct drm_dsc_picture_parameter_set *pps)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h$mipi_dsi_picture_parameter_set_multih]j)}(h$mipi_dsi_picture_parameter_set_multih]h$mipi_dsi_picture_parameter_set_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hU(struct mipi_dsi_multi_context *ctx, const struct drm_dsc_picture_parameter_set *pps)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jjsb&c.mipi_dsi_picture_parameter_set_multiasbuh1hhjubj)}(h h]h }(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h/const struct drm_dsc_picture_parameter_set *ppsh](j)}(hjUh]hconst}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(hjh]hstruct}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(hdrm_dsc_picture_parameter_seth]hdrm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j&&c.mipi_dsi_picture_parameter_set_multiasbuh1hhjZubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(hppsh]hpps}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h&transmit the DSC PPS to the peripheralh]h&transmit the DSC PPS to the peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hXH**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``const struct drm_dsc_picture_parameter_set *pps`` VESA DSC 1.1 Picture Parameter Set **Description** Like mipi_dsi_picture_parameter_set() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubji)}(hhh](jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hj;h]h"struct mipi_dsi_multi_context *ctx}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: 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]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubh)}(h}Like mipi_dsi_picture_parameter_set() but deals with errors in a way that makes it convenient to make several calls in a row.h]h}Like mipi_dsi_picture_parameter_set() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0mipi_dsi_compression_mode_ext_multi (C function)%c.mipi_dsi_compression_mode_ext_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hvoid mipi_dsi_compression_mode_ext_multi (struct mipi_dsi_multi_context *ctx, bool enable, enum mipi_dsi_compression_algo algo, unsigned int pps_selector)h]j)}(hvoid mipi_dsi_compression_mode_ext_multi(struct mipi_dsi_multi_context *ctx, bool enable, enum mipi_dsi_compression_algo algo, unsigned int pps_selector)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM"ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM"ubj)}(h#mipi_dsi_compression_mode_ext_multih]j)}(h#mipi_dsi_compression_mode_ext_multih]h#mipi_dsi_compression_mode_ext_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM"ubj)}(hq(struct mipi_dsi_multi_context *ctx, bool enable, enum mipi_dsi_compression_algo algo, unsigned int pps_selector)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQmodnameN classnameNjj)}j]j)}jjsb%c.mipi_dsi_compression_mode_ext_multiasbuh1hhj-ubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj+)}(hj9h]h*}(hj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj-ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(h bool enableh](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(henableh]henable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(h#enum mipi_dsi_compression_algo algoh](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_compression_algoh]hmipi_dsi_compression_algo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jk%c.mipi_dsi_compression_mode_ext_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(halgoh]halgo}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubj)}(hunsigned int pps_selectorh](j)}(hunsignedh]hunsigned}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(hinth]hint}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubj)}(h pps_selectorh]h pps_selector}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM"ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM"ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM"hjhhubj)}(hhh]h)}(h$enable/disable DSC on the peripheralh]h$enable/disable DSC on the peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM"hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM"ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``bool enable`` Whether to enable or disable the DSC ``enum mipi_dsi_compression_algo algo`` Selected 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calls in a row.h]h|Like mipi_dsi_compression_mode_ext() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM'hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,mipi_dsi_compression_mode_multi (C function)!c.mipi_dsi_compression_mode_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hVvoid mipi_dsi_compression_mode_multi (struct mipi_dsi_multi_context *ctx, bool enable)h]j)}(hUvoid mipi_dsi_compression_mode_multi(struct mipi_dsi_multi_context *ctx, bool enable)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMAubj)}(h h]h }(hjhhhNhNubah}(h]h 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]jah"]h$]h&]uh1jhjubj)}(henableh]henable}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMAubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMAubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMAhjhhubj)}(hhh]h)}(h$enable/disable DSC on the peripheralh]h$enable/disable DSC on the peripheral}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMAhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMAubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX+**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``bool enable`` Whether to enable or disable the DSC **Description** Enable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h 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disable the DSCh]h$Whether to enable or disable the DSC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMChjubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhjhMChj4ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMEhjubh)}(hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.h]hEnable or disable Display Stream Compression on the peripheral using the default Picture Parameter Set and VESA DSC 1.1 algorithm.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMDhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#mipi_dsi_dcs_nop_multi (C function)c.mipi_dsi_dcs_nop_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h@void 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./drivers/gpu/drm/drm_mipi_dsi.chMjhj4hhubah}(h]h ]h"]h$]h&]uh1jhjlhhhjhMjubeh}(h]h ](jfunctioneh"]h$]h&]jjjjOjjOjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjYh]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMnhjSubji)}(hhh]jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjxh]h"struct mipi_dsi_multi_context *ctx}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMkhjrubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMkhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jmhjhMkhjoubah}(h]h ]h"]h$]h&]uh1jhhjSubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMmhjSubh)}(h|Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMlhjSubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/mipi_dsi_dcs_exit_sleep_mode_multi (C function)$c.mipi_dsi_dcs_exit_sleep_mode_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hLvoid mipi_dsi_dcs_exit_sleep_mode_multi (struct mipi_dsi_multi_context *ctx)h]j)}(hKvoid mipi_dsi_dcs_exit_sleep_mode_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h"mipi_dsi_dcs_exit_sleep_mode_multih]j)}(h"mipi_dsi_dcs_exit_sleep_mode_multih]h"mipi_dsi_dcs_exit_sleep_mode_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjUmodnameN classnameNjj)}j]j)}jjsb$c.mipi_dsi_dcs_exit_sleep_mode_multiasbuh1hhj1ubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj1ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hsend DCS EXIT_SLEEP_MODE packeth]hsend DCS EXIT_SLEEP_MODE packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh]jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj4h]h Description}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h{Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/mipi_dsi_dcs_set_display_off_multi (C function)$c.mipi_dsi_dcs_set_display_off_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hLvoid mipi_dsi_dcs_set_display_off_multi (struct mipi_dsi_multi_context *ctx)h]j)}(hKvoid mipi_dsi_dcs_set_display_off_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuhhhjhMubj)}(h"mipi_dsi_dcs_set_display_off_multih]j)}(h"mipi_dsi_dcs_set_display_off_multih]h"mipi_dsi_dcs_set_display_off_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjuhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb$c.mipi_dsi_dcs_set_display_off_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjuhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjqhhhjhMubah}(h]jlah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjnhhubj)}(hhh]h)}(hsend DCS SET_DISPLAY_OFF packeth]hsend DCS SET_DISPLAY_OFF packet}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj6hhubah}(h]h ]h"]h$]h&]uh1jhjnhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjQjjQjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hj[h]h Parameters}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjUubji)}(hhh]jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjzh]h"struct mipi_dsi_multi_context *ctx}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjxubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjtubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjqubah}(h]h ]h"]h$]h&]uh1jhhjUubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjUubh)}(h{Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.h]h{Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjUubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.mipi_dsi_dcs_set_display_on_multi (C function)#c.mipi_dsi_dcs_set_display_on_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hKvoid mipi_dsi_dcs_set_display_on_multi (struct mipi_dsi_multi_context *ctx)h]j)}(hJvoid mipi_dsi_dcs_set_display_on_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h!mipi_dsi_dcs_set_display_on_multih]j)}(h!mipi_dsi_dcs_set_display_on_multih]h!mipi_dsi_dcs_set_display_on_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjWmodnameN classnameNjj)}j]j)}jjsb#c.mipi_dsi_dcs_set_display_on_multiasbuh1hhj3ubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hsend DCS SET_DISPLAY_ON packeth]hsend DCS SET_DISPLAY_ON packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh]jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj6h]h Description}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hzLike mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.h]hzLike mipi_dsi_dcs_set_display_on() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+mipi_dsi_dcs_set_tear_on_multi (C function) c.mipi_dsi_dcs_set_tear_on_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hjvoid mipi_dsi_dcs_set_tear_on_multi (struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h]j)}(hivoid mipi_dsi_dcs_set_tear_on_multi(struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h](j)}(hvoidh]hvoid}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwhhhjhMubj)}(hmipi_dsi_dcs_set_tear_on_multih]j)}(hmipi_dsi_dcs_set_tear_on_multih]hmipi_dsi_dcs_set_tear_on_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjwhhhjhMubj)}(hF(struct mipi_dsi_multi_context *ctx, enum mipi_dsi_dcs_tear_mode mode)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb c.mipi_dsi_dcs_set_tear_on_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h enum mipi_dsi_dcs_tear_mode modeh](j)}(hj8h]henum}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubh)}(hhh]j)}(hmipi_dsi_dcs_tear_modeh]hmipi_dsi_dcs_tear_mode}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjJmodnameN classnameNjj)}j]j c.mipi_dsi_dcs_set_tear_on_multiasbuh1hhj&ubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj)}(hmodeh]hmode}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjwhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjshhhjhMubah}(h]jnah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjphhubj)}(hhh]h)}(hsend DCS SET_TEAR_ON packeth]hsend DCS SET_TEAR_ON packet}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjphhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX4**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode **Description** Like mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh](jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hI``enum mipi_dsi_dcs_tear_mode mode`` the Tearing Effect Output Line mode h](jt)}(h$``enum mipi_dsi_dcs_tear_mode mode``h]jz)}(hjh]h enum mipi_dsi_dcs_tear_mode mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h#the Tearing Effect Output Line modeh]h#the Tearing Effect Output Line mode}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hMhj.ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj-hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjSh]h Description}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjQubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(hwLike mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.h]hwLike mipi_dsi_dcs_set_tear_on() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.mipi_dsi_turn_on_peripheral_multi (C function)#c.mipi_dsi_turn_on_peripheral_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hKvoid mipi_dsi_turn_on_peripheral_multi (struct mipi_dsi_multi_context *ctx)h]j)}(hJvoid mipi_dsi_turn_on_peripheral_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(h!mipi_dsi_turn_on_peripheral_multih]j)}(h!mipi_dsi_turn_on_peripheral_multih]h!mipi_dsi_turn_on_peripheral_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb#c.mipi_dsi_turn_on_peripheral_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj!hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h"sends a Turn On Peripheral commandh]h"sends a Turn On Peripheral command}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjUhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjpjjpjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjzh]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjtubji)}(hhh]jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjtubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjtubh)}(hzLike mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.h]hzLike mipi_dsi_turn_on_peripheral() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjtubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,mipi_dsi_dcs_set_tear_off_multi (C function)!c.mipi_dsi_dcs_set_tear_off_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hIvoid mipi_dsi_dcs_set_tear_off_multi (struct mipi_dsi_multi_context *ctx)h]j)}(hHvoid mipi_dsi_dcs_set_tear_off_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj'hMubj)}(hmipi_dsi_dcs_set_tear_off_multih]j)}(hmipi_dsi_dcs_set_tear_off_multih]hmipi_dsi_dcs_set_tear_off_multi}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj'hMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj)}(h h]h }(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjvmodnameN classnameNjj)}j]j)}jj<sb!c.mipi_dsi_dcs_set_tear_off_multiasbuh1hhjRubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjRubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjNubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj'hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj'hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj'hMhjhhubj)}(hhh]h)}(hPturn off the display module's Tearing Effect output signal on the TE signal lineh]hRturn off the display module’s Tearing Effect output signal on the TE signal line}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj'hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(h^**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactionsh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubji)}(hhh]jn)}(hL``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactionsh](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjh]h"struct mipi_dsi_multi_context *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj0ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*mipi_dsi_dcs_soft_reset_multi (C function)c.mipi_dsi_dcs_soft_reset_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hGvoid mipi_dsi_dcs_soft_reset_multi (struct mipi_dsi_multi_context *ctx)h]j)}(hFvoid mipi_dsi_dcs_soft_reset_multi(struct mipi_dsi_multi_context *ctx)h](j)}(hvoidh]hvoid}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjphhhjhMubj)}(hmipi_dsi_dcs_soft_reset_multih]j)}(hmipi_dsi_dcs_soft_reset_multih]hmipi_dsi_dcs_soft_reset_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjphhhjhMubj)}(h$(struct mipi_dsi_multi_context *ctx)h]j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.mipi_dsi_dcs_soft_reset_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjphhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjlhhhjhMubah}(h]jgah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjihhubj)}(hhh]h)}(h.perform a software reset of the display moduleh]h.perform a software reset of the display module}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj1hhubah}(h]h ]h"]h$]h&]uh1jhjihhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjLjjLjjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions **Description** Like mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjVh]h Parameters}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubji)}(hhh]jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hjuh]h"struct mipi_dsi_multi_context *ctx}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjsubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjoubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjlubah}(h]h ]h"]h$]h&]uh1jhhjPubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubh)}(hvLike mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.h]hvLike mipi_dsi_dcs_soft_reset() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjPubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j6mipi_dsi_dcs_set_display_brightness_multi (C function)+c.mipi_dsi_dcs_set_display_brightness_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hcvoid mipi_dsi_dcs_set_display_brightness_multi (struct mipi_dsi_multi_context *ctx, u16 brightness)h]j)}(hbvoid mipi_dsi_dcs_set_display_brightness_multi(struct mipi_dsi_multi_context *ctx, u16 brightness)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM2ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM2ubj)}(h)mipi_dsi_dcs_set_display_brightness_multih]j)}(h)mipi_dsi_dcs_set_display_brightness_multih]h)mipi_dsi_dcs_set_display_brightness_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM2ubj)}(h4(struct mipi_dsi_multi_context *ctx, u16 brightness)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjRmodnameN classnameNjj)}j]j)}jjsb+c.mipi_dsi_dcs_set_display_brightness_multiasbuh1hhj.ubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj+)}(hj9h]h*}(hj~hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj.ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj*ubj)}(hu16 brightnessh](h)}(hhh]j)}(hu16h]hu16}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jl+c.mipi_dsi_dcs_set_display_brightness_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h brightnessh]h brightness}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj*ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM2ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM2ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM2hjhhubj)}(hhh]h)}(h(sets the brightness value of the displayh]h(sets the brightness value of the display}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM2hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM2ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u16 brightness`` brightness value **Description** Like mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM6hjubji)}(hhh](jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hj>h]h"struct mipi_dsi_multi_context *ctx}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj<ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM4hj8ubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShM4hjTubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jmhjShM4hj5ubjn)}(h$``u16 brightness`` brightness value h](jt)}(h``u16 brightness``h]jz)}(hjwh]hu16 brightness}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM5hjqubj)}(hhh]h)}(hbrightness valueh]hbrightness value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM5hjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjhM5hj5ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM7hjubh)}(hLike mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.h]hLike mipi_dsi_dcs_set_display_brightness() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chM6hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0mipi_dsi_dcs_set_pixel_format_multi (C function)%c.mipi_dsi_dcs_set_pixel_format_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hXvoid mipi_dsi_dcs_set_pixel_format_multi (struct mipi_dsi_multi_context *ctx, u8 format)h]j)}(hWvoid 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]jah"]h$]h&]uh1jhj0ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj0ubj)}(hctxh]hctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,ubj)}(h u8 formath](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jn%c.mipi_dsi_dcs_set_pixel_format_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hformath]hformat}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMNubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMNubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMNhjhhubj)}(hhh]h)}(hBsets the pixel format for the RGB image data used by the interfaceh]hBsets the pixel format for the RGB image data used by the interface}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMNhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMNubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjrchNhNubj)}(hX **Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions ``u8 format`` pixel format **Description** Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.h](h)}(h**Parameters**h]j%)}(hj!h]h Parameters}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMRhjubji)}(hhh](jn)}(hM``struct mipi_dsi_multi_context *ctx`` Context for multiple DSI transactions h](jt)}(h&``struct mipi_dsi_multi_context *ctx``h]jz)}(hj@h]h"struct mipi_dsi_multi_context *ctx}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj>ubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMPhj:ubj)}(hhh]h)}(h%Context for multiple DSI transactionsh]h%Context for multiple DSI transactions}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhMPhjVubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhjUhMPhj7ubjn)}(h``u8 format`` pixel format h](jt)}(h ``u8 format``h]jz)}(hjyh]h u8 format}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMQhjsubj)}(hhh]h)}(h pixel formath]h pixel format}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMQhjubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhjhMQhj7ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMShjubh)}(h|Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_set_pixel_format() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMRhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2mipi_dsi_dcs_set_column_address_multi (C function)'c.mipi_dsi_dcs_set_column_address_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(hcvoid mipi_dsi_dcs_set_column_address_multi (struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h]j)}(hbvoid mipi_dsi_dcs_set_column_address_multi(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMjubj)}(h%mipi_dsi_dcs_set_column_address_multih]j)}(h%mipi_dsi_dcs_set_column_address_multih]h%mipi_dsi_dcs_set_column_address_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h 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]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj.ubj)}(hu16 endh](h)}(hhh]j)}(hu16h]hu16}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jp'c.mipi_dsi_dcs_set_column_address_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hendh]hend}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj.ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMjubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMjubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMjhjhhubj)}(hhh]h)}(hKdefine the column extent of the frame memory accessed by the host processorh]hKdefine the column extent of the frame memory accessed by the host processor}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMjhjFhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMjubeh}(h]h ](jfunctioneh"]h$]h&]jjjjajjajjjuh1jhhhjrchNhNubj)}(hXH**Parameters** ``struct mipi_dsi_multi_context *ctx`` Context for multiple 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]h"]h$]h&]uh1jmhjhMlhjubjn)}(h+``u16 start`` first column of frame memory h](jt)}(h ``u16 start``h]jz)}(hjh]h u16 start}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMmhjubj)}(hhh]h)}(hfirst column of frame memoryh]hfirst column of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMmhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMmhjubjn)}(h(``u16 end`` last column of frame memory h](jt)}(h ``u16 end``h]jz)}(hjh]hu16 end}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMnhjubj)}(hhh]h)}(hlast column of frame memoryh]hlast column of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMnhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMnhjubeh}(h]h ]h"]h$]h&]uh1jhhjeubh)}(h**Description**h]j%)}(hj7h]h Description}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMphjeubh)}(h~Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.h]h~Like mipi_dsi_dcs_set_column_address() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMohjeubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j0mipi_dsi_dcs_set_page_address_multi (C function)%c.mipi_dsi_dcs_set_page_address_multihNtauh1jxhjrchhhNhNubj)}(hhh](j)}(havoid mipi_dsi_dcs_set_page_address_multi (struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h]j)}(h`void mipi_dsi_dcs_set_page_address_multi(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(hvoidh]hvoid}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxhhhjhMubj)}(h#mipi_dsi_dcs_set_page_address_multih]j)}(h#mipi_dsi_dcs_set_page_address_multih]h#mipi_dsi_dcs_set_page_address_multi}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjxhhhjhMubj)}(h8(struct mipi_dsi_multi_context *ctx, u16 start, u16 end)h](j)}(h"struct mipi_dsi_multi_context *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmipi_dsi_multi_contexth]hmipi_dsi_multi_context}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb%c.mipi_dsi_dcs_set_page_address_multiasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h 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]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjyubj)}(hhh]h)}(hlast page of frame memoryh]hlast page of frame memory}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubh)}(h|Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.h]h|Like mipi_dsi_dcs_set_page_address() but deals with errors in a way that makes it convenient to make several calls in a row.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h 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*ownerh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hmoduleh]hmodule}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jxc.mipi_dsi_driver_register_fullasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hownerh]howner}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj6ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h!register a driver for DSI devicesh]h!register a driver for DSI devices}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj. hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjI jjI jjjuh1jhhhjrchNhNubj)}(h**Parameters** ``struct mipi_dsi_driver *drv`` DSI driver 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]h"]h$]h&]uh1jshc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhj ubj)}(hhh]h)}(h owner moduleh]h owner module}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhji ubeh}(h]h ]h"]h$]h&]uh1jhhjM ubh)}(h **Return**h]j%)}(hj h]hReturn}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjM ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhc/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:360: ./drivers/gpu/drm/drm_mipi_dsi.chMhjM ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjrchhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'mipi_dsi_driver_unregister (C function)c.mipi_dsi_driver_unregisterhNtauh1jxhjrchhhNhNubj)}(hhh](j)}(h=void mipi_dsi_driver_unregister (struct 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**Members**h]j%)}(hjt h]hMembers}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjr ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhK9hjB ubji)}(hhh](jn)}(hD``range_min_qp`` Min Quantization Parameters allowed for this range h](jt)}(h``range_min_qp``h]jz)}(hj h]h range_min_qp}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhK5hj ubj)}(hhh]h)}(h2Min Quantization Parameters allowed for this rangeh]h2Min Quantization Parameters allowed for this range}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK5hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hK5hj ubjn)}(hD``range_max_qp`` Max Quantization Parameters allowed for this range h](jt)}(h``range_max_qp``h]jz)}(hj h]h range_max_qp}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhK9hj ubj)}(hhh]h)}(h2Max Quantization Parameters allowed for this rangeh]h2Max Quantization Parameters allowed for this range}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK9hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj hK9hj ubjn)}(hH``range_bpg_offset`` Bits/group offset to apply to target for this grouph](jt)}(h``range_bpg_offset``h]jz)}(hj h]hrange_bpg_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhK` ``rc_model_size`` Total size of RC model ``flatness_min_qp`` Minimum QP where flatness information is sent ``flatness_max_qp`` Maximum QP where flatness information is sent ``initial_scale_value`` Initial value for the scale factor ``scale_decrement_interval`` Specifies number of group times between decrementing the scale factor at beginning of a slice. ``scale_increment_interval`` Number of group times between incrementing the scale factor value used at the beginning of a slice. ``nfl_bpg_offset`` Non first line BPG offset to be used ``slice_bpg_offset`` BPG offset used to enforce slice bit ``final_offset`` Final RC linear transformation offset value ``vbr_enable`` True if VBR mode is enabled, false if disabled ``mux_word_size`` Mux word size (in bits) for SSM mode ``slice_chunk_size`` The (max) size in bytes of the "chunks" that are used in slice multiplexing. ``rc_bits`` Rate control buffer size in bits ``dsc_version_minor`` DSC minor version ``dsc_version_major`` DSC major version ``native_422`` True if Native 4:2:2 supported, else false ``native_420`` True if Native 4:2:0 supported else false. ``second_line_bpg_offset`` Additional bits/grp for seconnd line of slice for native 4:2:0 ``nsl_bpg_offset`` Num of bits deallocated for each grp that is not in second line of slice ``second_line_offset_adj`` Offset adjustment for second line in Native 4:2:0 modeh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKGhj ubj@)}(hXystruct drm_dsc_config { u8 line_buf_depth; u8 bits_per_component; bool convert_rgb; u8 slice_count; u16 slice_width; u16 slice_height; bool simple_422; u16 pic_width; u16 pic_height; u8 rc_tgt_offset_high; u8 rc_tgt_offset_low; u16 bits_per_pixel; u8 rc_edge_factor; u8 rc_quant_incr_limit1; u8 rc_quant_incr_limit0; u16 initial_xmit_delay; u16 initial_dec_delay; bool block_pred_enable; u8 first_line_bpg_offset; u16 initial_offset; u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; u16 rc_model_size; u8 flatness_min_qp; u8 flatness_max_qp; u8 initial_scale_value; u16 scale_decrement_interval; u16 scale_increment_interval; u16 nfl_bpg_offset; u16 slice_bpg_offset; u16 final_offset; bool vbr_enable; u8 mux_word_size; u16 slice_chunk_size; u16 rc_bits; u8 dsc_version_minor; u8 dsc_version_major; bool native_422; bool native_420; u8 second_line_bpg_offset; u16 nsl_bpg_offset; u16 second_line_offset_adj; };h]hXystruct drm_dsc_config { u8 line_buf_depth; u8 bits_per_component; bool convert_rgb; u8 slice_count; u16 slice_width; u16 slice_height; bool simple_422; u16 pic_width; u16 pic_height; u8 rc_tgt_offset_high; u8 rc_tgt_offset_low; u16 bits_per_pixel; u8 rc_edge_factor; u8 rc_quant_incr_limit1; u8 rc_quant_incr_limit0; u16 initial_xmit_delay; u16 initial_dec_delay; bool block_pred_enable; u8 first_line_bpg_offset; u16 initial_offset; u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES]; u16 rc_model_size; u8 flatness_min_qp; u8 flatness_max_qp; u8 initial_scale_value; u16 scale_decrement_interval; u16 scale_increment_interval; u16 nfl_bpg_offset; u16 slice_bpg_offset; u16 final_offset; bool vbr_enable; u8 mux_word_size; u16 slice_chunk_size; u16 rc_bits; u8 dsc_version_minor; u8 dsc_version_major; bool native_422; bool native_420; u8 second_line_bpg_offset; u16 nsl_bpg_offset; u16 second_line_offset_adj; };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKIhj ubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKvhj ubji)}(hhh](jn)}(hM``line_buf_depth`` Bits per component for previous reconstructed line buffer h](jt)}(h``line_buf_depth``h]jz)}(hj5h]hline_buf_depth}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKKhj/ubj)}(hhh]h)}(h9Bits per component for previous reconstructed line bufferh]h9Bits per component for previous reconstructed line buffer}(hjNhhhNhNubah}(h]h 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./include/drm/display/drm_dsc.hhKfhjubj)}(hhh]h)}(h/True if simple 4_2_2 mode is enabled else Falseh]h/True if simple 4_2_2 mode is enabled else False}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKfhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKfhj,ubjn)}(h9``pic_width`` Width of the input display frame in pixels h](jt)}(h ``pic_width``h]jz)}(hjh]h pic_width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKjhjubj)}(hhh]h)}(h*Width of the input display frame in pixelsh]h*Width of the input display frame in pixels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKjhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKjhj,ubjn)}(h:``pic_height`` Vertical height of the input display frame h](jt)}(h``pic_height``h]jz)}(hjh]h pic_height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKnhjubj)}(hhh]h)}(h*Vertical height of the input display frameh]h*Vertical height of the input display frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKnhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKnhj,ubjn)}(hR``rc_tgt_offset_high`` Offset to bits/group used by RC to determine QP adjustment h](jt)}(h``rc_tgt_offset_high``h]jz)}(hj7h]hrc_tgt_offset_high}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj5ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKrhj1ubj)}(hhh]h)}(h:Offset to bits/group used by RC to determine QP adjustmenth]h:Offset to bits/group used by RC to determine QP adjustment}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhKrhjMubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhjLhKrhj,ubjn)}(hQ``rc_tgt_offset_low`` Offset to bits/group used by RC to determine QP adjustment h](jt)}(h``rc_tgt_offset_low``h]jz)}(hjph]hrc_tgt_offset_low}(hjrhhhNhNubah}(h]h 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an edge is present based on the bits produced h](jt)}(h``rc_edge_factor``h]jz)}(hjh]hrc_edge_factor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(hDFactor to determine if an edge is present based on the bits producedh]hDFactor to determine if an edge is present based on the bits produced}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(hR``rc_quant_incr_limit1`` Slow down incrementing once the range reaches this value h](jt)}(h``rc_quant_incr_limit1``h]jz)}(hjh]hrc_quant_incr_limit1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h8Slow down incrementing once the range reaches this valueh]h8Slow down incrementing once the range reaches this value}(hj4hhhNhNubah}(h]h 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initial transmissionh]h2Number of pixels to delay the initial transmission}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h``initial_dec_delay`` Initial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. h](jt)}(h``initial_dec_delay``h]jz)}(hjh]hinitial_dec_delay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(hInitial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.h]hInitial decoder delay, number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(hs``block_pred_enable`` True if block prediction is used to code any groups within the picture. False if BP not used h](jt)}(h``block_pred_enable``h]jz)}(hjh]hblock_pred_enable}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h\True if block prediction is used to code any groups within the picture. False if BP not usedh]h\True if block prediction is used to code any groups within the picture. False if BP not used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(hi``first_line_bpg_offset`` Number of additional bits allocated for each group on the first line of slice. h](jt)}(h``first_line_bpg_offset``h]jz)}(hj:h]hfirst_line_bpg_offset}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhj4ubj)}(hhh]h)}(hNNumber of additional bits allocated for each group on the first line of slice.h]hNNumber of additional bits allocated for each group on the first line of slice.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhjOhKhj,ubjn)}(hC``initial_offset`` Value to use for RC model offset at slice start h](jt)}(h``initial_offset``h]jz)}(hjth]hinitial_offset}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjnubj)}(hhh]h)}(h/Value to use for RC model offset at slice starth]h/Value to use for RC model offset at slice start}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h@``rc_buf_thresh`` Thresholds defining each of the buffer ranges h](jt)}(h``rc_buf_thresh``h]jz)}(hjh]h rc_buf_thresh}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h-Thresholds defining each of the buffer rangesh]h-Thresholds defining each of the buffer ranges}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h``rc_range_params`` Parameters for each of the RC ranges defined in :c:type:`struct drm_dsc_rc_range_parameters ` h](jt)}(h``rc_range_params``h]jz)}(hjh]hrc_range_params}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(hzParameters for each of the RC ranges defined in :c:type:`struct drm_dsc_rc_range_parameters `h](h0Parameters for each of the RC ranges defined in }(hjhhhNhNubh)}(hJ:c:type:`struct drm_dsc_rc_range_parameters `h]jz)}(hj h]h"struct drm_dsc_rc_range_parameters}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_rc_range_parametersuh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubeh}(h]h ]h"]h$]h&]uh1hhj&hKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h)``rc_model_size`` Total size of RC model h](jt)}(h``rc_model_size``h]jz)}(hj?h]h rc_model_size}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhj9ubj)}(hhh]h)}(hTotal size of RC modelh]hTotal size of RC model}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThKhjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhjThKhj,ubjn)}(hB``flatness_min_qp`` Minimum QP where flatness information is sent h](jt)}(h``flatness_min_qp``h]jz)}(hjxh]hflatness_min_qp}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjrubj)}(hhh]h)}(h-Minimum QP where flatness information is senth]h-Minimum QP where flatness information is sent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(hB``flatness_max_qp`` Maximum QP where flatness information is sent h](jt)}(h``flatness_max_qp``h]jz)}(hjh]hflatness_max_qp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h-Maximum QP where flatness information is senth]h-Maximum QP where flatness information is sent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h;``initial_scale_value`` Initial value for the scale factor h](jt)}(h``initial_scale_value``h]jz)}(hjh]hinitial_scale_value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h"Initial value for the scale factorh]h"Initial value for the scale factor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h|``scale_decrement_interval`` Specifies number of group times between decrementing the scale factor at beginning of a slice. h](jt)}(h``scale_decrement_interval``h]jz)}(hj#h]hscale_decrement_interval}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h^Specifies number of group times between decrementing the scale factor at beginning of a slice.h]h^Specifies number of group times between decrementing the scale factor at beginning of a slice.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj8hKhj,ubjn)}(h``scale_increment_interval`` Number of group times between incrementing the scale factor value used at the beginning of a slice. h](jt)}(h``scale_increment_interval``h]jz)}(hj]h]hscale_increment_interval}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjWubj)}(hhh]h)}(hcNumber of group times between incrementing the scale factor value used at the beginning of a slice.h]hcNumber of group times between incrementing the scale factor value used at the beginning of a slice.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjrhKhj,ubjn)}(h8``nfl_bpg_offset`` Non first line BPG offset to be used h](jt)}(h``nfl_bpg_offset``h]jz)}(hjh]hnfl_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h$Non first line BPG offset to be usedh]h$Non first line BPG offset to be used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h:``slice_bpg_offset`` BPG offset used to enforce slice bit h](jt)}(h``slice_bpg_offset``h]jz)}(hjh]hslice_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h$BPG offset used to enforce slice bith]h$BPG offset used to enforce slice bit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h=``final_offset`` Final RC linear transformation offset value h](jt)}(h``final_offset``h]jz)}(hj h]h final_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h+Final RC linear transformation offset valueh]h+Final RC linear transformation offset value}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h>``vbr_enable`` True if VBR mode is enabled, false if disabled h](jt)}(h``vbr_enable``h]jz)}(hjBh]h vbr_enable}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj@ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhj<ubj)}(hhh]h)}(h.True if VBR mode is enabled, false if disabledh]h.True if VBR mode is enabled, false if disabled}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhKhjXubah}(h]h ]h"]h$]h&]uh1jhj<ubeh}(h]h ]h"]h$]h&]uh1jmhjWhKhj,ubjn)}(h7``mux_word_size`` Mux word size (in bits) for SSM mode h](jt)}(h``mux_word_size``h]jz)}(hj{h]h mux_word_size}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjyubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjuubj)}(hhh]h)}(h$Mux word size (in bits) for SSM modeh]h$Mux word size (in bits) for SSM mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(hb``slice_chunk_size`` The (max) size in bytes of the "chunks" that are used in slice multiplexing. h](jt)}(h``slice_chunk_size``h]jz)}(hjh]hslice_chunk_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(hLThe (max) size in bytes of the "chunks" that are used in slice multiplexing.h]hPThe (max) size in bytes of the “chunks” that are used in slice multiplexing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h-``rc_bits`` Rate control buffer size in bits h](jt)}(h ``rc_bits``h]jz)}(hjh]hrc_bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h Rate control buffer size in bitsh]h Rate control buffer size in bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h(``dsc_version_minor`` DSC minor version h](jt)}(h``dsc_version_minor``h]jz)}(hj'h]hdsc_version_minor}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhj!ubj)}(hhh]h)}(hDSC minor versionh]hDSC minor version}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hKhj=ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj<hKhj,ubjn)}(h(``dsc_version_major`` DSC major version h](jt)}(h``dsc_version_major``h]jz)}(hj`h]hdsc_version_major}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjZubj)}(hhh]h)}(hDSC major versionh]hDSC major version}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhKhjvubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jmhjuhKhj,ubjn)}(h:``native_422`` True if Native 4:2:2 supported, else false h](jt)}(h``native_422``h]jz)}(hjh]h native_422}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h*True if Native 4:2:2 supported, else falseh]h*True if Native 4:2:2 supported, else false}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(h:``native_420`` True if Native 4:2:0 supported else false. h](jt)}(h``native_420``h]jz)}(hjh]h native_420}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKhjubj)}(hhh]h)}(h*True if Native 4:2:0 supported else false.h]h*True if Native 4:2:0 supported else false.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj,ubjn)}(hZ``second_line_bpg_offset`` Additional bits/grp for seconnd line of slice for native 4:2:0 h](jt)}(h``second_line_bpg_offset``h]jz)}(hj h]hsecond_line_bpg_offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(h>Additional bits/grp for seconnd line of slice for native 4:2:0h]h>Additional bits/grp for seconnd line of slice for native 4:2:0}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj,ubjn)}(h\``nsl_bpg_offset`` Num of bits deallocated for each grp that is not in second line of slice h](jt)}(h``nsl_bpg_offset``h]jz)}(hjDh]hnsl_bpg_offset}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj>ubj)}(hhh]h)}(hHNum of bits deallocated for each grp that is not in second line of sliceh]hHNum of bits deallocated for each grp that is not in second line of slice}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jmhjYhMhj,ubjn)}(hQ``second_line_offset_adj`` Offset adjustment for second line in Native 4:2:0 modeh](jt)}(h``second_line_offset_adj``h]jz)}(hj~h]hsecond_line_offset_adj}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM hjxubj)}(hhh]h)}(h6Offset adjustment for second line in Native 4:2:0 modeh]h6Offset adjustment for second line in Native 4:2:0 mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM hjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj,ubeh}(h]h ]h"]h$]h&]uh1jhhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhj hNubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj hhubh)}(h{Driver populates this structure with all the parameters required to configure the display stream compression on the source.h]h{Driver populates this structure with all the parameters required to configure the display stream compression on the source.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKDhj hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dsc_picture_parameter_set (C struct)c.drm_dsc_picture_parameter_sethNtauh1jxhj hhhj hNubj)}(hhh](j)}(hdrm_dsc_picture_parameter_seth]j)}(h$struct drm_dsc_picture_parameter_seth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhKJubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hKJubj)}(hdrm_dsc_picture_parameter_seth]j)}(hjh]hdrm_dsc_picture_parameter_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hKJubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hKJubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hKJhjhhubj)}(hhh]h)}(h-Represents 128 bytes of Picture Parameter Seth]h-Represents 128 bytes of Picture Parameter Set}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj>hhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hKJubeh}(h]h ](jstructeh"]h$]h&]jjjjYjjYjjjuh1jhhhj hj hNubj)}(hXk**Definition**:: struct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; }; **Members** ``dsc_version`` PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC ``pps_identifier`` PPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables. ``pps_reserved`` PPS2[7:0]- RESERVED Byte ``pps_3`` PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2) ``pps_4`` PPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits ``bits_per_pixel_low`` PPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element. ``pic_height`` PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster. ``pic_width`` PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster. ``slice_height`` PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. ``slice_width`` PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. ``chunk_size`` PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing. ``initial_xmit_delay_high`` PPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved ``initial_xmit_delay_low`` PPS17[7:0] - Least significant 8 bits of initial transmission delay. ``initial_dec_delay`` PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. ``pps20_reserved`` PPS20[7:0] - Reserved ``initial_scale_value`` PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved ``scale_increment_interval`` PPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice. ``scale_decrement_interval_high`` PPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved ``scale_decrement_interval_low`` PPS25[7:0] - Lower 8 bits of scale decrement interval ``pps26_reserved`` PPS26[7:0] ``first_line_bpg_offset`` PPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved ``nfl_bpg_offset`` PPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice. ``slice_bpg_offset`` PPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint. ``initial_offset`` PPS32,33[7:0] - Initial value for rcXformOffset ``final_offset`` PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset ``flatness_min_qp`` PPS36[4:0] - Minimum QP at which flatness is signaled and flatness QP adjustment is made. PPS36[7:5] - Reserved ``flatness_max_qp`` PPS37[4:0] - Max QP at which flatness is signalled and the flatness adjustment is made. PPS37[7:5] - Reserved ``rc_model_size`` PPS38,39[7:0] - Number of bits within RC Model. ``rc_edge_factor`` PPS40[3:0] - Ratio of current activity vs, previous activity to determine presence of edge. PPS40[7:4] - Reserved ``rc_quant_incr_limit0`` PPS41[4:0] - QP threshold used in short term RC PPS41[7:5] - Reserved ``rc_quant_incr_limit1`` PPS42[4:0] - QP threshold used in short term RC PPS42[7:5] - Reserved ``rc_tgt_offset`` PPS43[3:0] - Lower end of the variability range around the target bits per group that is allowed by short term RC. PPS43[7:4]- Upper end of the variability range around the target bits per group that i allowed by short term rc. ``rc_buf_thresh`` PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for the 15 ranges defined by 14 thresholds. ``rc_range_parameters`` PPS58[7:0] - PPS87[7:0] Parameters that correspond to each of the 15 ranges. ``native_422_420`` PPS88[0] - 0 = Native 4:2:2 not used 1 = Native 4:2:2 used PPS88[1] - 0 = Native 4:2:0 not use 1 = Native 4:2:0 used PPS88[7:2] - Reserved 6 bits ``second_line_bpg_offset`` PPS89[4:0] - Additional bits/group budget for the second line of a slice in Native 4:2:0 mode. Set to 0 if DSC minor version is 1 or native420 is 0. PPS89[7:5] - Reserved ``nsl_bpg_offset`` PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated for each group that is not in the second line of a slice. ``second_line_offset_adj`` PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second line in Native 4:2:0 mode. ``pps_long_94_reserved`` PPS 94, 95, 96, 97 - Reserved ``pps_long_98_reserved`` PPS 98, 99, 100, 101 - Reserved ``pps_long_102_reserved`` PPS 102, 103, 104, 105 - Reserved ``pps_long_106_reserved`` PPS 106, 107, 108, 109 - reserved ``pps_long_110_reserved`` PPS 110, 111, 112, 113 - reserved ``pps_long_114_reserved`` PPS 114 - 117 - reserved ``pps_long_118_reserved`` PPS 118 - 121 - reserved ``pps_long_122_reserved`` PPS 122- 125 - reserved ``pps_short_126_reserved`` PPS 126, 127 - reservedh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjaubh:}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj]ubj@)}(hXVstruct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; };h]hXVstruct drm_dsc_picture_parameter_set { u8 dsc_version; u8 pps_identifier; u8 pps_reserved; u8 pps_3; u8 pps_4; u8 bits_per_pixel_low; __be16 pic_height; __be16 pic_width; __be16 slice_height; __be16 slice_width; __be16 chunk_size; u8 initial_xmit_delay_high; u8 initial_xmit_delay_low; __be16 initial_dec_delay; u8 pps20_reserved; u8 initial_scale_value; __be16 scale_increment_interval; u8 scale_decrement_interval_high; u8 scale_decrement_interval_low; u8 pps26_reserved; u8 first_line_bpg_offset; __be16 nfl_bpg_offset; __be16 slice_bpg_offset; __be16 initial_offset; __be16 final_offset; u8 flatness_min_qp; u8 flatness_max_qp; __be16 rc_model_size; u8 rc_edge_factor; u8 rc_quant_incr_limit0; u8 rc_quant_incr_limit1; u8 rc_tgt_offset; u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1]; __be16 rc_range_parameters[DSC_NUM_BUF_RANGES]; u8 native_422_420; u8 second_line_bpg_offset; __be16 nsl_bpg_offset; __be16 second_line_offset_adj; u32 pps_long_94_reserved; u32 pps_long_98_reserved; u32 pps_long_102_reserved; u32 pps_long_106_reserved; u32 pps_long_110_reserved; u32 pps_long_114_reserved; u32 pps_long_118_reserved; u32 pps_long_122_reserved; __be16 pps_short_126_reserved; };}hj~sbah}(h]h ]h"]h$]h&]jjuh1j?hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj]ubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMIhj]ubji)}(hhh](jn)}(h``dsc_version`` PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC h](jt)}(h``dsc_version``h]jz)}(hjh]h dsc_version}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(hyPPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSCh]hyPPS0[3:0] - dsc_version_minor: Contains Minor version of DSC PPS0[7:4] - dsc_version_major: Contains major version of DSC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``pps_identifier`` PPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables. h](jt)}(h``pps_identifier``h]jz)}(hjh]hpps_identifier}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM%hjubj)}(hhh]h)}(hkPPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables.h]hkPPS1[7:0] - Application specific identifier that can be used to differentiate between different PPS tables.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM$hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM%hjubjn)}(h*``pps_reserved`` PPS2[7:0]- RESERVED Byte h](jt)}(h``pps_reserved``h]jz)}(hj"h]h pps_reserved}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM*hjubj)}(hhh]h)}(hPPS2[7:0]- RESERVED Byteh]hPPS2[7:0]- RESERVED Byte}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7hM*hj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj7hM*hjubjn)}(hX``pps_3`` PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2) h](jt)}(h ``pps_3``h]jz)}(hj[h]hpps_3}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM7hjUubj)}(hhh]h)}(hXPPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2)h]hXPPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits, 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits, 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2. PPS3[7:4] - bits_per_component: Bits per component for the original pixels of the encoded picture. 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2) 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also allowed only when dsc_minor_version = 0x2)}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM/hjqubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jmhjphM7hjubjn)}(hX``pps_4`` PPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits h](jt)}(h ``pps_4``h]jz)}(hjh]hpps_4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMEhjubj)}(hhh]h)}(hXPPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bitsh]hXPPS4[1:0] -These are the most significant 2 bits of compressed BPP bits_per_pixel[9:0] syntax element. PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled PPS4[3] - simple_422: Indicates if decoder drops samples to reconstruct the 4:2:2 picture. PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is active. PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any groups in picture PPS4[7:6] - Reseved bits}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM<hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMEhjubjn)}(h``bits_per_pixel_low`` PPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element. h](jt)}(h``bits_per_pixel_low``h]jz)}(hjh]hbits_per_pixel_low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMKhjubj)}(hhh]h)}(hjPPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element.h]hjPPS5[7:0] - This indicates the lower significant 8 bits of the compressed BPP bits_per_pixel[9:0] element.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMJhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMKhjubjn)}(hg``pic_height`` PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster. h](jt)}(h``pic_height``h]jz)}(hj h]h pic_height}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMQhjubj)}(hhh]h)}(hWPPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster.h]hWPPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows within the raster.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMPhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMQhjubjn)}(h[``pic_width`` PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster. h](jt)}(h ``pic_width``h]jz)}(hjCh]h pic_width}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMWhj=ubj)}(hhh]h)}(hLPPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster.h]hLPPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within the raster.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMVhjYubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhjXhMWhjubjn)}(hK``slice_height`` PPS10[7:0], PPS11[7:0] - Slice height in units of pixels. h](jt)}(h``slice_height``h]jz)}(hj}h]h slice_height}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM\hjwubj)}(hhh]h)}(h9PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.h]h9PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM\hjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjhM\hjubjn)}(hI``slice_width`` PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels. h](jt)}(h``slice_width``h]jz)}(hjh]h slice_width}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMahjubj)}(hhh]h)}(h8PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.h]h8PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMahjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMahjubjn)}(hs``chunk_size`` PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing. h](jt)}(h``chunk_size``h]jz)}(hjh]h chunk_size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMghjubj)}(hhh]h)}(hcPPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing.h]hcPPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks that are used for slice multiplexing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMfhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMghjubjn)}(h``initial_xmit_delay_high`` PPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved h](jt)}(h``initial_xmit_delay_high``h]jz)}(hj)h]hinitial_xmit_delay_high}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMohj#ubj)}(hhh]h)}(hPPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reservedh]hPPS16[1:0] - Most Significant two bits of initial transmission delay. It specifies the number of pixel times that the encoder waits before transmitting data from its rate buffer. PPS16[7:2] - Reserved}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMlhj?ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj>hMohjubjn)}(h```initial_xmit_delay_low`` PPS17[7:0] - Least significant 8 bits of initial transmission delay. h](jt)}(h``initial_xmit_delay_low``h]jz)}(hjch]hinitial_xmit_delay_low}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMthj]ubj)}(hhh]h)}(hDPPS17[7:0] - Least significant 8 bits of initial transmission delay.h]hDPPS17[7:0] - Least significant 8 bits of initial transmission delay.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMthjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhMthjubjn)}(h``initial_dec_delay`` PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels. h](jt)}(h``initial_dec_delay``h]jz)}(hjh]hinitial_dec_delay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM{hjubj)}(hhh]h)}(hPPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.h]hPPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number of pixel times that the decoder accumulates data in its rate buffer before starting to decode and output pixels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMyhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM{hjubjn)}(h)``pps20_reserved`` PPS20[7:0] - Reserved h](jt)}(h``pps20_reserved``h]jz)}(hjh]hpps20_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(hPPS20[7:0] - Reservedh]hPPS20[7:0] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hu``initial_scale_value`` PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved h](jt)}(h``initial_scale_value``h]jz)}(hjh]hinitial_scale_value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj ubj)}(hhh]h)}(h\PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reservedh]h\PPS21[5:0] - Initial rcXformScale factor used at beginning of a slice. PPS21[7:6] - Reserved}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hMhjubjn)}(h``scale_increment_interval`` PPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice. h](jt)}(h``scale_increment_interval``h]jz)}(hjIh]hscale_increment_interval}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjCubj)}(hhh]h)}(hnPPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice.h]hnPPS22[7:0], PPS23[7:0] - Number of group times between incrementing the rcXformScale factor at end of a slice.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj_ubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jmhj^hMhjubjn)}(h``scale_decrement_interval_high`` PPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved h](jt)}(h!``scale_decrement_interval_high``h]jz)}(hjh]hscale_decrement_interval_high}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj}ubj)}(hhh]h)}(hPPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reservedh]hPPS24[3:0] - Higher 4 bits indicating number of group times between decrementing the rcXformScale factor at beginning of a slice. PPS24[7:4] - Reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hW``scale_decrement_interval_low`` PPS25[7:0] - Lower 8 bits of scale decrement interval h](jt)}(h ``scale_decrement_interval_low``h]jz)}(hjh]hscale_decrement_interval_low}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(h5PPS25[7:0] - Lower 8 bits of scale decrement intervalh]h5PPS25[7:0] - Lower 8 bits of scale decrement interval}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``pps26_reserved`` PPS26[7:0] h](jt)}(h``pps26_reserved``h]jz)}(hjh]hpps26_reserved}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(h PPS26[7:0]h]h PPS26[7:0]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjubjn)}(h``first_line_bpg_offset`` PPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved h](jt)}(h``first_line_bpg_offset``h]jz)}(hj/h]hfirst_line_bpg_offset}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj)ubj)}(hhh]h)}(hxPPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reservedh]hxPPS27[4:0] - Number of additional bits that are allocated for each group on first line of a slice. PPS27[7:5] - Reserved}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjEubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jmhjDhMhjubjn)}(h``nfl_bpg_offset`` PPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice. h](jt)}(h``nfl_bpg_offset``h]jz)}(hjih]hnfl_bpg_offset}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjcubj)}(hhh]h)}(hPPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice.h]hPPS28[7:0], PPS29[7:0] - Number of bits including frac bits deallocated for each group for groups after the first line of slice.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhjubjn)}(h}``slice_bpg_offset`` PPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint. h](jt)}(h``slice_bpg_offset``h]jz)}(hjh]hslice_bpg_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(hgPPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint.h]hgPPS30, PPS31[7:0] - Number of bits that are deallocated for each group to enforce the slice constraint.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hC``initial_offset`` PPS32,33[7:0] - Initial value for rcXformOffset h](jt)}(h``initial_offset``h]jz)}(hjh]hinitial_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(h/PPS32,33[7:0] - Initial value for rcXformOffseth]h/PPS32,33[7:0] - Initial value for rcXformOffset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hN``final_offset`` PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset h](jt)}(h``final_offset``h]jz)}(hjh]h final_offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjubj)}(hhh]h)}(h!ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj:!ubj)}(hhh]h)}(hPPS 94, 95, 96, 97 - Reservedh]hPPS 94, 95, 96, 97 - Reserved}(hjY!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU!hMhjV!ubah}(h]h ]h"]h$]h&]uh1jhj:!ubeh}(h]h ]h"]h$]h&]uh1jmhjU!hMhjubjn)}(h9``pps_long_98_reserved`` PPS 98, 99, 100, 101 - Reserved h](jt)}(h``pps_long_98_reserved``h]jz)}(hjy!h]hpps_long_98_reserved}(hj{!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjw!ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhjs!ubj)}(hhh]h)}(hPPS 98, 99, 100, 101 - Reservedh]hPPS 98, 99, 100, 101 - Reserved}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hMhj!ubah}(h]h ]h"]h$]h&]uh1jhjs!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hMhjubjn)}(h<``pps_long_102_reserved`` PPS 102, 103, 104, 105 - Reserved h](jt)}(h``pps_long_102_reserved``h]jz)}(hj!h]hpps_long_102_reserved}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM#hj!ubj)}(hhh]h)}(h!PPS 102, 103, 104, 105 - Reservedh]h!PPS 102, 103, 104, 105 - Reserved}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hM#hj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj!hM#hjubjn)}(h<``pps_long_106_reserved`` PPS 106, 107, 108, 109 - reserved h](jt)}(h``pps_long_106_reserved``h]jz)}(hj!h]hpps_long_106_reserved}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM(hj!ubj)}(hhh]h)}(h!PPS 106, 107, 108, 109 - reservedh]h!PPS 106, 107, 108, 109 - reserved}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hM(hj"ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj"hM(hjubjn)}(h<``pps_long_110_reserved`` PPS 110, 111, 112, 113 - reserved h](jt)}(h``pps_long_110_reserved``h]jz)}(hj$"h]hpps_long_110_reserved}(hj&"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj""ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM-hj"ubj)}(hhh]h)}(h!PPS 110, 111, 112, 113 - reservedh]h!PPS 110, 111, 112, 113 - reserved}(hj="hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9"hM-hj:"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj9"hM-hjubjn)}(h3``pps_long_114_reserved`` PPS 114 - 117 - reserved h](jt)}(h``pps_long_114_reserved``h]jz)}(hj]"h]hpps_long_114_reserved}(hj_"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj["ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM2hjW"ubj)}(hhh]h)}(hPPS 114 - 117 - reservedh]hPPS 114 - 117 - reserved}(hjv"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr"hM2hjs"ubah}(h]h ]h"]h$]h&]uh1jhjW"ubeh}(h]h ]h"]h$]h&]uh1jmhjr"hM2hjubjn)}(h3``pps_long_118_reserved`` PPS 118 - 121 - reserved h](jt)}(h``pps_long_118_reserved``h]jz)}(hj"h]hpps_long_118_reserved}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM7hj"ubj)}(hhh]h)}(hPPS 118 - 121 - reservedh]hPPS 118 - 121 - reserved}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hM7hj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hM7hjubjn)}(h2``pps_long_122_reserved`` PPS 122- 125 - reserved h](jt)}(h``pps_long_122_reserved``h]jz)}(hj"h]hpps_long_122_reserved}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj"ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM<hj"ubj)}(hhh]h)}(hPPS 122- 125 - reservedh]hPPS 122- 125 - reserved}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"hM<hj"ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj"hM<hjubjn)}(h2``pps_short_126_reserved`` PPS 126, 127 - reservedh](jt)}(h``pps_short_126_reserved``h]jz)}(hj#h]hpps_short_126_reserved}(hj #hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj#ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhM@hj#ubj)}(hhh]h)}(hPPS 126, 127 - reservedh]hPPS 126, 127 - reserved}(hj!#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMAhj#ubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj#hM@hjubeh}(h]h ]h"]h$]h&]uh1jhhj]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhj hNubh)}(h**Description**h]j%)}(hjK#h]h Description}(hjM#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjI#ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMDhj hhubh)}(hXlThe VESA DSC standard defines picture parameter set (PPS) which display stream compression encoders must communicate to decoders. The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. The PPS fields that span over more than a byte should be stored in Big Endian format.h]hXlThe VESA DSC standard defines picture parameter set (PPS) which display stream compression encoders must communicate to decoders. The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2. The PPS fields that span over more than a byte should be stored in Big Endian format.}(hja#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMhj hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dsc_pps_infoframe (C struct)c.drm_dsc_pps_infoframehNtauh1jxhj hhhj hNubj)}(hhh](j)}(hdrm_dsc_pps_infoframeh]j)}(hstruct drm_dsc_pps_infoframeh](j)}(hjh]hstruct}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#hhhj#hMubj)}(hdrm_dsc_pps_infoframeh]j)}(hj#h]hdrm_dsc_pps_infoframe}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj#hhhj#hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj#hhhj#hMubah}(h]j|#ah ](jjeh"]h$]h&]jj)jhuh1jhj#hMhj~#hhubj)}(hhh]h)}(h9DSC infoframe carrying the Picture Parameter Set Metadatah]h9DSC infoframe carrying the Picture Parameter Set Metadata}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMGhj#hhubah}(h]h ]h"]h$]h&]uh1jhj~#hhhj#hMubeh}(h]h ](jstructeh"]h$]h&]jjjj#jj#jjjuh1jhhhj hj hNubj)}(hX**Definition**:: struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; }; **Members** ``pps_header`` Header for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header ` ``pps_payload`` PPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj#ubh:}(hj#hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMKhj#ubj@)}(h|struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; };h]h|struct drm_dsc_pps_infoframe { struct dp_sdp_header pps_header; struct drm_dsc_picture_parameter_set pps_payload; };}hj$sbah}(h]h ]h"]h$]h&]jjuh1j?hb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMMhj#ubh)}(h **Members**h]j%)}(hj$h]hMembers}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMRhj#ubji)}(hhh](jn)}(hq``pps_header`` Header for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header ` h](jt)}(h``pps_header``h]jz)}(hj8$h]h pps_header}(hj:$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj6$ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMRhj2$ubj)}(hhh]h)}(haHeader for PPS as per DP SDP header format of type :c:type:`struct dp_sdp_header `h](h3Header for PPS as per DP SDP header format of type }(hjQ$hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jz)}(hj[$h]hstruct dp_sdp_header}(hj]$hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjY$ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj dp_sdp_headeruh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMQhjQ$ubeh}(h]h ]h"]h$]h&]uh1hhjx$hMQhjN$ubah}(h]h ]h"]h$]h&]uh1jhj2$ubeh}(h]h ]h"]h$]h&]uh1jmhjM$hMRhj/$ubjn)}(h``pps_payload`` PPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](jt)}(h``pps_payload``h]jz)}(hj$h]h pps_payload}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]uh1jshb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMShj$ubj)}(hhh]h)}(hPPS payload fields as per DSC specification Table 4-1 as represented in :c:type:`struct drm_dsc_picture_parameter_set `h](hHPPS payload fields as per DSC specification Table 4-1 as represented in }(hj$hhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]jz)}(hj$h]h$struct drm_dsc_picture_parameter_set}(hj$hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj$ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_picture_parameter_setuh1hhj$hMShj$ubeh}(h]h ]h"]h$]h&]uh1hhj$hMShj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jmhj$hMShj/$ubeh}(h]h ]h"]h$]h&]uh1jhhj#ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhj hNubh)}(h**Description**h]j%)}(hj$h]h Description}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMWhj hhubh)}(hXThis structure represents the DSC PPS infoframe required to send the Picture Parameter Set metadata required before enabling VESA Display Stream Compression. This is based on the DP Secondary Data Packet structure and comprises of SDP Header as defined :c:type:`struct dp_sdp_header ` in drm_dp_helper.h and PPS payload defined in :c:type:`struct drm_dsc_picture_parameter_set `.h](hThis structure represents the DSC PPS infoframe required to send the Picture Parameter Set metadata required before enabling VESA Display Stream Compression. This is based on the DP Secondary Data Packet structure and comprises of SDP Header as defined }(hj%hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jz)}(hj%h]hstruct dp_sdp_header}(hj%hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj dp_sdp_headeruh1hhb/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:369: ./include/drm/display/drm_dsc.hhMHhj%ubh/ in drm_dp_helper.h and PPS payload defined in }(hj%hhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]jz)}(hj6%h]h$struct drm_dsc_picture_parameter_set}(hj8%hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4%ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_picture_parameter_setuh1hhj/%hMHhj%ubh.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj/%hMHhj hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_dsc_dp_pps_header_init (C function)c.drm_dsc_dp_pps_header_inithNtauh1jxhj hhhNhNubj)}(hhh](j)}(hBvoid drm_dsc_dp_pps_header_init (struct dp_sdp_header *pps_header)h]j)}(hAvoid drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header)h](j)}(hvoidh]hvoid}(hjv%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr%hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK$ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjr%hhhj%hK$ubj)}(hdrm_dsc_dp_pps_header_inith]j)}(hdrm_dsc_dp_pps_header_inith]hdrm_dsc_dp_pps_header_init}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjr%hhhj%hK$ubj)}(h"(struct dp_sdp_header *pps_header)h]j)}(h struct dp_sdp_header *pps_headerh](j)}(hjh]hstruct}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubh)}(hhh]j)}(h dp_sdp_headerh]h dp_sdp_header}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj%modnameN classnameNjj)}j]j)}jj%sbc.drm_dsc_dp_pps_header_initasbuh1hhj%ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubj+)}(hj9h]h*}(hj%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj%ubj)}(h pps_headerh]h pps_header}(hj &hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj%ubah}(h]h ]h"]h$]h&]jjuh1jhjr%hhhj%hK$ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjn%hhhj%hK$ubah}(h]ji%ah ](jjeh"]h$]h&]jj)jhuh1jhj%hK$hjk%hhubj)}(hhh]h)}(hBInitializes the PPS Header for DisplayPort as per the DP 1.4 spec.h]hBInitializes the PPS Header for DisplayPort as per the DP 1.4 spec.}(hj6&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK$hj3&hhubah}(h]h ]h"]h$]h&]uh1jhjk%hhhj%hK$ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjN&jjN&jjjuh1jhhhj hNhNubj)}(hX**Parameters** ``struct dp_sdp_header *pps_header`` Secondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header ` **Description** DP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in :c:type:`struct dp_sdp_header `.h](h)}(h**Parameters**h]j%)}(hjX&h]h Parameters}(hjZ&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjV&ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK(hjR&ubji)}(hhh]jn)}(h``struct dp_sdp_header *pps_header`` Secondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header ` h](jt)}(h$``struct dp_sdp_header *pps_header``h]jz)}(hjw&h]h struct dp_sdp_header *pps_header}(hjy&hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhju&ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK'hjq&ubj)}(hhh]h)}(hwSecondary data packet header for DSC Picture Parameter Set as defined in :c:type:`struct dp_sdp_header `h](hISecondary data packet header for DSC Picture Parameter Set as defined in }(hj&hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jz)}(hj&h]hstruct dp_sdp_header}(hj&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj dp_sdp_headeruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK&hj&ubeh}(h]h ]h"]h$]h&]uh1hhj&hK&hj&ubah}(h]h ]h"]h$]h&]uh1jhjq&ubeh}(h]h ]h"]h$]h&]uh1jmhj&hK'hjn&ubah}(h]h ]h"]h$]h&]uh1jhhjR&ubh)}(h**Description**h]j%)}(hj&h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK)hjR&ubh)}(hDP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in :c:type:`struct dp_sdp_header `.h](hDP 1.4 spec defines the secondary data packet for sending the picture parameter infoframes from the source to the sink. This function populates the SDP header defined in }(hj&hhhNhNubh)}(h.:c:type:`struct dp_sdp_header `h]jz)}(hj&h]hstruct dp_sdp_header}(hj&hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj dp_sdp_headeruh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK(hj&ubh.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj'hK(hjR&ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dsc_dp_rc_buffer_size (C function)c.drm_dsc_dp_rc_buffer_sizehNtauh1jxhj hhhNhNubj)}(hhh](j)}(hJint drm_dsc_dp_rc_buffer_size (u8 rc_buffer_block_size, u8 rc_buffer_size)h]j)}(hIint drm_dsc_dp_rc_buffer_size(u8 rc_buffer_block_size, u8 rc_buffer_size)h](j)}(hinth]hint}(hj:'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6'hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK8ubj)}(h h]h }(hjI'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6'hhhjH'hK8ubj)}(hdrm_dsc_dp_rc_buffer_sizeh]j)}(hdrm_dsc_dp_rc_buffer_sizeh]hdrm_dsc_dp_rc_buffer_size}(hj['hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW'ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj6'hhhjH'hK8ubj)}(h,(u8 rc_buffer_block_size, u8 rc_buffer_size)h](j)}(hu8 rc_buffer_block_sizeh](h)}(hhh]j)}(hu8h]hu8}(hjz'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj|'modnameN classnameNjj)}j]j)}jj]'sbc.drm_dsc_dp_rc_buffer_sizeasbuh1hhjs'ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjs'ubj)}(hrc_buffer_block_sizeh]hrc_buffer_block_size}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjs'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjo'ubj)}(hu8 rc_buffer_sizeh](h)}(hhh]j)}(hu8h]hu8}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'modnameN classnameNjj)}j]j'c.drm_dsc_dp_rc_buffer_sizeasbuh1hhj'ubj)}(h h]h }(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubj)}(hrc_buffer_sizeh]hrc_buffer_size}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjo'ubeh}(h]h ]h"]h$]h&]jjuh1jhj6'hhhjH'hK8ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj2'hhhjH'hK8ubah}(h]j-'ah ](jjeh"]h$]h&]jj)jhuh1jhjH'hK8hj/'hhubj)}(hhh]h)}(hget rc buffer size in bytesh]hget rc buffer size in bytes}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK8hj(hhubah}(h]h ]h"]h$]h&]uh1jhj/'hhhjH'hK8ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj2(jj2(jjjuh1jhhhj hNhNubj)}(h**Parameters** ``u8 rc_buffer_block_size`` block size code, according to DPCD offset 62h ``u8 rc_buffer_size`` number of blocks - 1, according to DPCD offset 63h **Return** buffer size in bytes, or 0 on invalid inputh](h)}(h**Parameters**h]j%)}(hj<(h]h Parameters}(hj>(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:(ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK` ``const struct drm_dsc_config *dsc_cfg`` DSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config ` **Description** DSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chKWhj{*ubji)}(hhh](jn)}(h``struct drm_dsc_picture_parameter_set *pps_payload`` Bitwise struct for DSC Picture Parameter Set. This is defined by :c:type:`struct drm_dsc_picture_parameter_set ` h](jt)}(h5``struct drm_dsc_picture_parameter_set *pps_payload``h]jz)}(hj*h]h1struct drm_dsc_picture_parameter_set *pps_payload}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chKVhj*ubj)}(hhh]h)}(hBitwise struct for DSC Picture Parameter Set. This is defined by :c:type:`struct drm_dsc_picture_parameter_set `h](hABitwise struct for DSC Picture Parameter Set. This is defined by }(hj*hhhNhNubh)}(hN:c:type:`struct drm_dsc_picture_parameter_set `h]jz)}(hj*h]h$struct drm_dsc_picture_parameter_set}(hj*hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_picture_parameter_setuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chKUhj*ubeh}(h]h ]h"]h$]h&]uh1hhj*hKUhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhj*hKVhj*ubjn)}(h``const struct drm_dsc_config *dsc_cfg`` DSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config ` h](jt)}(h(``const struct drm_dsc_config *dsc_cfg``h]jz)}(hj*h]h$const struct drm_dsc_config *dsc_cfg}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chKYhj*ubj)}(hhh]h)}(hfDSC Configuration data filled by driver as defined by :c:type:`struct drm_dsc_config `h](h6DSC Configuration data filled by driver as defined by }(hj+hhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jz)}(hj+h]hstruct drm_dsc_config}(hj+hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj+ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_dsc_configuh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chKXhj+ubeh}(h]h ]h"]h$]h&]uh1hhj9+hKXhj+ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhj+hKYhj*ubeh}(h]h ]h"]h$]h&]uh1jhhj{*ubh)}(h**Description**h]j%)}(hjT+h]h Description}(hjV+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjR+ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK[hj{*ubh)}(hXwDSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.h]hXwDSC source device sends a picture parameter set (PPS) containing the information required by the sink to decode the compressed frame. Driver populates the DSC PPS struct using the DSC configuration parameters in the order expected by the DSC Display Sink device. For the DSC, the sink device expects the PPS payload in big endian format for fields that span more than 1 byte.}(hjj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chK[hj{*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_dsc_set_const_params (C function)c.drm_dsc_set_const_paramshNtauh1jxhj hhhNhNubj)}(hhh](j)}(h?void drm_dsc_set_const_params (struct drm_dsc_config *vdsc_cfg)h]j)}(h>void drm_dsc_set_const_params(struct drm_dsc_config *vdsc_cfg)h](j)}(hvoidh]hvoid}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhj+hMubj)}(hdrm_dsc_set_const_paramsh]j)}(hdrm_dsc_set_const_paramsh]hdrm_dsc_set_const_params}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj+hhhj+hMubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j)}(hjh]hstruct}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j)}jj+sbc.drm_dsc_set_const_paramsasbuh1hhj+ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj+)}(hj9h]h*}(hj",hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj+ubj)}(hvdsc_cfgh]hvdsc_cfg}(hj/,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj+ubah}(h]h ]h"]h$]h&]jjuh1jhj+hhhj+hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhj+hMubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1jhj+hMhj+hhubj)}(hhh]h)}(hGSet DSC parameters considered typically constant across operation modesh]hGSet DSC parameters considered typically constant across operation modes}(hjY,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjV,hhubah}(h]h ]h"]h$]h&]uh1jhj+hhhj+hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjq,jjq,jjjuh1jhhhj hNhNubj)}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j%)}(hj{,h]h Parameters}(hj},hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjy,ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhju,ubji)}(hhh]jn)}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](jt)}(h#``struct drm_dsc_config *vdsc_cfg``h]jz)}(hj,h]hstruct drm_dsc_config *vdsc_cfg}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj,ubj)}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhj,hMhj,ubah}(h]h ]h"]h$]h&]uh1jhhju,ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_dsc_set_rc_buf_thresh (C function)c.drm_dsc_set_rc_buf_threshhNtauh1jxhj hhhNhNubj)}(hhh](j)}(h@void drm_dsc_set_rc_buf_thresh (struct drm_dsc_config *vdsc_cfg)h]j)}(h?void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg)h](j)}(hvoidh]hvoid}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chM0ubj)}(h h]h }(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj-hM0ubj)}(hdrm_dsc_set_rc_buf_threshh]j)}(hdrm_dsc_set_rc_buf_threshh]hdrm_dsc_set_rc_buf_thresh}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj,hhhj-hM0ubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j)}(hjh]hstruct}(hj1-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj--ubj)}(h h]h }(hj>-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj--ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hjO-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL-ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQ-modnameN classnameNjj)}j]j)}jj-sbc.drm_dsc_set_rc_buf_threshasbuh1hhj--ubj)}(h h]h }(hjo-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj--ubj+)}(hj9h]h*}(hj}-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj--ubj)}(hvdsc_cfgh]hvdsc_cfg}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj--ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj)-ubah}(h]h ]h"]h$]h&]jjuh1jhj,hhhj-hM0ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj,hhhj-hM0ubah}(h]j,ah ](jjeh"]h$]h&]jj)jhuh1jhj-hM0hj,hhubj)}(hhh]h)}(hMSet thresholds for the RC model in accordance with the DSC 1.2 specification.h]hMSet thresholds for the RC model in accordance with the DSC 1.2 specification.}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chM0hj-hhubah}(h]h ]h"]h$]h&]uh1jhj,hhhj-hM0ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj-jj-jjjuh1jhhhj hNhNubj)}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j%)}(hj-h]h Parameters}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chM4hj-ubji)}(hhh]jn)}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](jt)}(h#``struct drm_dsc_config *vdsc_cfg``h]jz)}(hj-h]hstruct drm_dsc_config *vdsc_cfg}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chM6hj-ubj)}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chM3hj .ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jmhj .hM6hj-ubah}(h]h ]h"]h$]h&]uh1jhhj-ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_dsc_setup_rc_params (C function)c.drm_dsc_setup_rc_paramshNtauh1jxhj hhhNhNubj)}(hhh](j)}(h\int drm_dsc_setup_rc_params (struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h]j)}(h[int drm_dsc_setup_rc_params(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h](j)}(hinth]hint}(hjO.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjK.hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj)}(h h]h }(hj^.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjK.hhhj].hMubj)}(hdrm_dsc_setup_rc_paramsh]j)}(hdrm_dsc_setup_rc_paramsh]hdrm_dsc_setup_rc_params}(hjp.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl.ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjK.hhhj].hMubj)}(h@(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type)h](j)}(hstruct drm_dsc_config *vdsc_cfgh](j)}(hjh]hstruct}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j)}jjr.sbc.drm_dsc_setup_rc_paramsasbuh1hhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj.ubj)}(hvdsc_cfgh]hvdsc_cfg}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj.ubj)}(henum drm_dsc_params_type typeh](j)}(hj8h]henum}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj /hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(hdrm_dsc_params_typeh]hdrm_dsc_params_type}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/modnameN classnameNjj)}j]j.c.drm_dsc_setup_rc_paramsasbuh1hhj.ubj)}(h h]h }(hj:/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(htypeh]htype}(hjH/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj.ubeh}(h]h ]h"]h$]h&]jjuh1jhjK.hhhj].hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjG.hhhj].hMubah}(h]jB.ah ](jjeh"]h$]h&]jj)jhuh1jhj].hMhjD.hhubj)}(hhh]h)}(hSet parameters and limits for RC model in accordance with the DSC 1.1 or 1.2 specification and DSC C Model Required bits_per_pixel and bits_per_component to be set before calling this function.h]hSet parameters and limits for RC model in accordance with the DSC 1.1 or 1.2 specification and DSC C Model Required bits_per_pixel and bits_per_component to be set before calling this function.}(hjr/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjo/hhubah}(h]h ]h"]h$]h&]uh1jhjD.hhhj].hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj/jj/jjjuh1jhhhj hNhNubj)}(h**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driver ``enum drm_dsc_params_type type`` operating mode and standard to follow **Return** 0 or -error code in case of an errorh](h)}(h**Parameters**h]j%)}(hj/h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj/ubji)}(hhh](jn)}(hV``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driver h](jt)}(h#``struct drm_dsc_config *vdsc_cfg``h]jz)}(hj/h]hstruct drm_dsc_config *vdsc_cfg}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj/ubj)}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hMhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhj/hMhj/ubjn)}(hH``enum drm_dsc_params_type type`` operating mode and standard to follow h](jt)}(h!``enum drm_dsc_params_type type``h]jz)}(hj/h]henum drm_dsc_params_type type}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj/ubj)}(hhh]h)}(h%operating mode and standard to followh]h%operating mode and standard to follow}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj0ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhj0hMhj/ubeh}(h]h ]h"]h$]h&]uh1jhhj/ubh)}(h **Return**h]j%)}(hj'0h]hReturn}(hj)0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%0ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj/ubh)}(h$0 or -error code in case of an errorh]h$0 or -error code in case of an error}(hj=0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_dsc_compute_rc_parameters (C function)c.drm_dsc_compute_rc_parametershNtauh1jxhj hhhNhNubj)}(hhh](j)}(hCint drm_dsc_compute_rc_parameters (struct drm_dsc_config *vdsc_cfg)h]j)}(hBint drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg)h](j)}(hinth]hint}(hjl0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjh0hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj)}(h h]h }(hj{0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjh0hhhjz0hMubj)}(hdrm_dsc_compute_rc_parametersh]j)}(hdrm_dsc_compute_rc_parametersh]hdrm_dsc_compute_rc_parameters}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjh0hhhjz0hMubj)}(h!(struct drm_dsc_config *vdsc_cfg)h]j)}(hstruct drm_dsc_config *vdsc_cfgh](j)}(hjh]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]j)}jj0sbc.drm_dsc_compute_rc_parametersasbuh1hhj0ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj+)}(hj9h]h*}(hj0hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj0ubj)}(hvdsc_cfgh]hvdsc_cfg}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj0ubah}(h]h ]h"]h$]h&]jjuh1jhjh0hhhjz0hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjd0hhhjz0hMubah}(h]j_0ah ](jjeh"]h$]h&]jj)jhuh1jhjz0hMhja0hhubj)}(hhh]h)}(hWrite rate control parameters to the dsc configuration defined in :c:type:`struct drm_dsc_config ` in accordance with the DSC 1.2 specification. Some configuration fields must be present beforehand.h](hBWrite rate control parameters to the dsc configuration defined in }(hj,1hhhNhNubh)}(h0:c:type:`struct drm_dsc_config `h]jz)}(hj61h]hstruct drm_dsc_config}(hj81hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj41ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjj)}j]j0c.drm_dsc_compute_rc_parametersasbjdrm_dsc_configuh1hhj%hK$hj,1ubhd in accordance with the DSC 1.2 specification. Some configuration fields must be present beforehand.}(hj,1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj)1hhubah}(h]h ]h"]h$]h&]uh1jhja0hhhjz0hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjl1jjl1jjjuh1jhhhj hNhNubj)}(hg**Parameters** ``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](h)}(h**Parameters**h]j%)}(hjv1h]h Parameters}(hjx1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjt1ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjp1ubji)}(hhh]jn)}(hU``struct drm_dsc_config *vdsc_cfg`` DSC Configuration data partially filled by driverh](jt)}(h#``struct drm_dsc_config *vdsc_cfg``h]jz)}(hj1h]hstruct drm_dsc_config *vdsc_cfg}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj1ubj)}(hhh]h)}(h1DSC Configuration data partially filled by driverh]h1DSC Configuration data partially filled by driver}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jmhj1hMhj1ubah}(h]h ]h"]h$]h&]uh1jhhjp1ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dsc_get_bpp_int (C function)c.drm_dsc_get_bpp_inthNtauh1jxhj hhhNhNubj)}(hhh](j)}(h?u32 drm_dsc_get_bpp_int (const struct drm_dsc_config *vdsc_cfg)h]j)}(h>u32 drm_dsc_get_bpp_int(const struct drm_dsc_config *vdsc_cfg)h](h)}(hhh]j)}(hu32h]hu32}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj1modnameN classnameNjj)}j]j)}jdrm_dsc_get_bpp_intsbc.drm_dsc_get_bpp_intasbuh1hhj1hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhj2hMubj)}(hdrm_dsc_get_bpp_inth]j)}(hj2h]hdrm_dsc_get_bpp_int}(hj&2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"2ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj1hhhj2hMubj)}(h'(const struct drm_dsc_config *vdsc_cfg)h]j)}(h%const struct drm_dsc_config *vdsc_cfgh](j)}(hjUh]hconst}(hjA2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=2ubj)}(h h]h }(hjN2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=2ubj)}(hjh]hstruct}(hj\2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=2ubj)}(h h]h }(hji2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=2ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hjz2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw2ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj|2modnameN classnameNjj)}j]j2c.drm_dsc_get_bpp_intasbuh1hhj=2ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=2ubj+)}(hj9h]h*}(hj2hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=2ubj)}(hvdsc_cfgh]hvdsc_cfg}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=2ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj92ubah}(h]h ]h"]h$]h&]jjuh1jhj1hhhj2hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj1hhhj2hMubah}(h]j1ah ](jjeh"]h$]h&]jj)jhuh1jhj2hMhj1hhubj)}(hhh]h)}(h=Get integer bits per pixel value for the given DRM DSC configh]h=Get integer bits per pixel value for the given DRM DSC config}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj2hhubah}(h]h ]h"]h$]h&]uh1jhj1hhhj2hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj2jj2jjjuh1jhhhj hNhNubj)}(h{**Parameters** ``const struct drm_dsc_config *vdsc_cfg`` Pointer to DRM DSC config struct **Return** Integer BPP valueh](h)}(h**Parameters**h]j%)}(hj2h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj2ubji)}(hhh]jn)}(hK``const struct drm_dsc_config *vdsc_cfg`` Pointer to DRM DSC config struct h](jt)}(h)``const struct drm_dsc_config *vdsc_cfg``h]jz)}(hj3h]h%const struct drm_dsc_config *vdsc_cfg}(hj 3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj3ubj)}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hj73hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj33hMhj43ubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jmhj33hMhj3ubah}(h]h ]h"]h$]h&]uh1jhhj2ubh)}(h **Return**h]j%)}(hjY3h]hReturn}(hj[3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjW3ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj2ubh)}(hInteger BPP valueh]hInteger BPP value}(hjo3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj2ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dsc_initial_scale_value (C function)c.drm_dsc_initial_scale_valuehNtauh1jxhj hhhNhNubj)}(hhh](j)}(hAu8 drm_dsc_initial_scale_value (const struct drm_dsc_config *dsc)h]j)}(h@u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc)h](h)}(hhh]j)}(hu8h]hu8}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj3modnameN classnameNjj)}j]j)}jdrm_dsc_initial_scale_valuesbc.drm_dsc_initial_scale_valueasbuh1hhj3hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3hhhj3hMubj)}(hdrm_dsc_initial_scale_valueh]j)}(hj3h]hdrm_dsc_initial_scale_value}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj3hhhj3hMubj)}(h"(const struct drm_dsc_config *dsc)h]j)}(h const struct drm_dsc_config *dsch](j)}(hjUh]hconst}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(hjh]hstruct}(hj 4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hj)4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+4modnameN classnameNjj)}j]j3c.drm_dsc_initial_scale_valueasbuh1hhj3ubj)}(h h]h }(hjG4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubj+)}(hj9h]h*}(hjU4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3ubj)}(hdsch]hdsc}(hjb4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubah}(h]h ]h"]h$]h&]jjuh1jhj3hhhj3hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj3hhhj3hMubah}(h]j3ah ](jjeh"]h$]h&]jj)jhuh1jhj3hMhj3hhubj)}(hhh]h)}(h:Calculate the initial scale value for the given DSC configh]h:Calculate the initial scale value for the given DSC config}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj4hhubah}(h]h ]h"]h$]h&]uh1jhj3hhhj3hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj4jj4jjjuh1jhhhj hNhNubj)}(h**Parameters** ``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct **Return** Calculated initial scale valueh](h)}(h**Parameters**h]j%)}(hj4h]h Parameters}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj4ubji)}(hhh]jn)}(hF``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct h](jt)}(h$``const struct drm_dsc_config *dsc``h]jz)}(hj4h]h const struct drm_dsc_config *dsc}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj4ubj)}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hMhj4ubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhj4hMhj4ubah}(h]h ]h"]h$]h&]uh1jhhj4ubh)}(h **Return**h]j%)}(hj5h]hReturn}(hj 5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj4ubh)}(hCalculated initial scale valueh]hCalculated initial scale value}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj4ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_dsc_flatness_det_thresh (C function)c.drm_dsc_flatness_det_threshhNtauh1jxhj hhhNhNubj)}(hhh](j)}(hBu32 drm_dsc_flatness_det_thresh (const struct drm_dsc_config *dsc)h]j)}(hAu32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc)h](h)}(hhh]j)}(hu32h]hu32}(hjP5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjM5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjR5modnameN classnameNjj)}j]j)}jdrm_dsc_flatness_det_threshsbc.drm_dsc_flatness_det_threshasbuh1hhjI5hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj)}(h h]h }(hjr5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjI5hhhjq5hMubj)}(hdrm_dsc_flatness_det_threshh]j)}(hjn5h]hdrm_dsc_flatness_det_thresh}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjI5hhhjq5hMubj)}(h"(const struct drm_dsc_config *dsc)h]j)}(h const struct drm_dsc_config *dsch](j)}(hjUh]hconst}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(hjh]hstruct}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj5modnameN classnameNjj)}j]jl5c.drm_dsc_flatness_det_threshasbuh1hhj5ubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubj+)}(hj9h]h*}(hj6hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj5ubj)}(hdsch]hdsc}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj5ubah}(h]h ]h"]h$]h&]jjuh1jhjI5hhhjq5hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjE5hhhjq5hMubah}(h]j@5ah ](jjeh"]h$]h&]jj)jhuh1jhjq5hMhjB5hhubj)}(hhh]h)}(h:Calculate the flatness_det_thresh for the given DSC configh]h:Calculate the flatness_det_thresh for the given DSC config}(hj;6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj86hhubah}(h]h ]h"]h$]h&]uh1jhjB5hhhjq5hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjS6jjS6jjjuh1jhhhj hNhNubj)}(h**Parameters** ``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct **Return** Calculated flatness det thresh valueh](h)}(h**Parameters**h]j%)}(hj]6h]h Parameters}(hj_6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[6ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjW6ubji)}(hhh]jn)}(hF``const struct drm_dsc_config *dsc`` Pointer to DRM DSC config struct h](jt)}(h$``const struct drm_dsc_config *dsc``h]jz)}(hj|6h]h const struct drm_dsc_config *dsc}(hj~6hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjz6ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjv6ubj)}(hhh]h)}(h Pointer to DRM DSC config structh]h Pointer to DRM DSC config struct}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hMhj6ubah}(h]h ]h"]h$]h&]uh1jhjv6ubeh}(h]h ]h"]h$]h&]uh1jmhj6hMhjs6ubah}(h]h ]h"]h$]h&]uh1jhhjW6ubh)}(h **Return**h]j%)}(hj6h]hReturn}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj6ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjW6ubh)}(h$Calculated flatness det thresh valueh]h$Calculated flatness det thresh value}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjW6ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_dsc_dump_config (C function)c.drm_dsc_dump_confighNtauh1jxhj hhhNhNubj)}(hhh](j)}(h^void drm_dsc_dump_config (struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h]j)}(h]void drm_dsc_dump_config(struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h](j)}(hvoidh]hvoid}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMubj)}(h h]h }(hj 7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6hhhj 7hMubj)}(hdrm_dsc_dump_configh]j)}(hdrm_dsc_dump_configh]hdrm_dsc_dump_config}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj6hhhj 7hMubj)}(hE(struct drm_printer *p, int indent, const struct drm_dsc_config *cfg)h](j)}(hstruct drm_printer *ph](j)}(hjh]hstruct}(hj97hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj57ubj)}(h h]h }(hjF7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj57ubh)}(hhh]j)}(h drm_printerh]h drm_printer}(hjW7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjT7ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjY7modnameN classnameNjj)}j]j)}jj7sbc.drm_dsc_dump_configasbuh1hhj57ubj)}(h h]h }(hjw7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj57ubj+)}(hj9h]h*}(hj7hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj57ubj)}(hj6h]hp}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj57ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj17ubj)}(h int indenth](j)}(hinth]hint}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(hindenth]hindent}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj17ubj)}(h const struct drm_dsc_config *cfgh](j)}(hjUh]hconst}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(hjh]hstruct}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(h h]h }(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubh)}(hhh]j)}(hdrm_dsc_configh]hdrm_dsc_config}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj8modnameN classnameNjj)}j]js7c.drm_dsc_dump_configasbuh1hhj7ubj)}(h h]h }(hj68hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj+)}(hj9h]h*}(hjD8hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj7ubj)}(hcfgh]hcfg}(hjQ8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj17ubeh}(h]h ]h"]h$]h&]jjuh1jhj6hhhj 7hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj6hhhj 7hMubah}(h]j6ah ](jjeh"]h$]h&]jj)jhuh1jhj 7hMhj6hhubj)}(hhh]h)}(h#Dump the provided DSC configurationh]h#Dump the provided DSC configuration}(hj{8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhjx8hhubah}(h]h ]h"]h$]h&]uh1jhj6hhhj 7hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj8jj8jjjuh1jhhhj hNhNubj)}(h**Parameters** ``struct drm_printer *p`` The printer used for output ``int indent`` Tab indentation level (max 5) ``const struct drm_dsc_config *cfg`` DSC configuration to print **Description** Print the provided DSC configuration in **cfg**.h](h)}(h**Parameters**h]j%)}(hj8h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj8ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj8ubji)}(hhh](jn)}(h6``struct drm_printer *p`` The printer used for output h](jt)}(h``struct drm_printer *p``h]jz)}(hj8h]hstruct drm_printer *p}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj8ubj)}(hhh]h)}(hThe printer used for outputh]hThe printer used for output}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hMhj8ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jmhj8hMhj8ubjn)}(h-``int indent`` Tab indentation level (max 5) h](jt)}(h``int indent``h]jz)}(hj8h]h int indent}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj8ubj)}(hhh]h)}(hTab indentation level (max 5)h]hTab indentation level (max 5)}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj 9hMhj 9ubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jmhj 9hMhj8ubjn)}(h@``const struct drm_dsc_config *cfg`` DSC configuration to print h](jt)}(h$``const struct drm_dsc_config *cfg``h]jz)}(hj.9h]h const struct drm_dsc_config *cfg}(hj09hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,9ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj(9ubj)}(hhh]h)}(hDSC configuration to printh]hDSC configuration to print}(hjG9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjC9hMhjD9ubah}(h]h ]h"]h$]h&]uh1jhj(9ubeh}(h]h ]h"]h$]h&]uh1jmhjC9hMhj8ubeh}(h]h ]h"]h$]h&]uh1jhhj8ubh)}(h**Description**h]j%)}(hji9h]h Description}(hjk9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjg9ubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj8ubh)}(h0Print the provided DSC configuration in **cfg**.h](h(Print the provided DSC configuration in }(hj9hhhNhNubj%)}(h**cfg**h]hcfg}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj9ubh.}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:372: ./drivers/gpu/drm/display/drm_dsc_helper.chMhj8ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj hhhNhNubeh}(h]5display-stream-compression-helper-functions-referenceah ]h"]5display stream compression helper functions referenceah$]h&]uh1hhhhhhhhMlubh)}(hhh](h)}(h)Output Probing Helper Functions Referenceh]h)Output Probing Helper Functions Reference}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9hhhhhMxubh)}(hThis library provides some helper code for output probing. It provides an implementation of the core :c:type:`drm_connector_funcs.fill_modes ` interface with drm_helper_probe_single_connector_modes().h](heThis library provides some helper code for output probing. It provides an implementation of the core }(hj9hhhNhNubh)}(h>:c:type:`drm_connector_funcs.fill_modes `h]jz)}(hj9h]hdrm_connector_funcs.fill_modes}(hj9hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:378: ./drivers/gpu/drm/drm_probe_helper.chK1hj9ubh: interface with drm_helper_probe_single_connector_modes().}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj9hK1hj9hhubh)}(hIt also provides support for polling connectors with a work item and for generic hotplug interrupt handling where the driver doesn't or cannot keep track of a per-connector hpd interrupt.h]hIt also provides support for polling connectors with a work item and for generic hotplug interrupt handling where the driver doesn’t or cannot keep track of a per-connector hpd interrupt.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:378: ./drivers/gpu/drm/drm_probe_helper.chK5hj9hhubh)}(hThis helper library can be used independently of the modeset helper library. Drivers can also overwrite different parts e.g. use their own hotplug handling code to avoid probing unrelated outputs.h]hThis helper library can be used independently of the modeset helper library. Drivers can also overwrite different parts e.g. use their own hotplug handling code to avoid probing unrelated outputs.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:378: ./drivers/gpu/drm/drm_probe_helper.chK9hj9hhubh)}(hThe probe helpers share the function table structures with other display helper libraries. See :c:type:`struct drm_connector_helper_funcs ` for the details.h](h_The probe helpers share the function table structures with other display helper libraries. See }(hj:hhhNhNubh)}(hH:c:type:`struct drm_connector_helper_funcs `h]jz)}(hj:h]h!struct drm_connector_helper_funcs}(hj:hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj:ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:378: ./drivers/gpu/drm/drm_probe_helper.chK=hj:ubh for the details.}(hj:hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj7:hK=hj9hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_kms_helper_poll_enable (C function)c.drm_kms_helper_poll_enablehNtauh1jxhj9hhhNhNubj)}(hhh](j)}(h8void drm_kms_helper_poll_enable (struct drm_device *dev)h]j)}(h7void drm_kms_helper_poll_enable(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj[:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW:hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM ubj)}(h h]h }(hjj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjW:hhhji:hM ubj)}(hdrm_kms_helper_poll_enableh]j)}(hdrm_kms_helper_poll_enableh]hdrm_kms_helper_poll_enable}(hj|:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjx:ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjW:hhhji:hM ubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj:modnameN classnameNjj)}j]j)}jj~:sbc.drm_kms_helper_poll_enableasbuh1hhj:ubj)}(h h]h }(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubj+)}(hj9h]h*}(hj:hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:ubj)}(hdevh]hdev}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj:ubah}(h]h ]h"]h$]h&]jjuh1jhjW:hhhji:hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjS:hhhji:hM ubah}(h]jN:ah ](jjeh"]h$]h&]jj)jhuh1jhji:hM hjP:hhubj)}(hhh]h)}(hre-enable output polling.h]hre-enable output polling.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM hj;hhubah}(h]h ]h"]h$]h&]uh1jhjP:hhhji:hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj3;jj3;jjjuh1jhhhj9hNhNubj)}(hXt**Parameters** ``struct drm_device *dev`` drm_device **Description** This function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume. Drivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn't enabled. If device polling was never initialized before, this call will trigger a warning and return. Note that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h](h)}(h**Parameters**h]j%)}(hj=;h]h Parameters}(hj?;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;;ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM$hj7;ubji)}(hhh]jn)}(h&``struct drm_device *dev`` drm_device h](jt)}(h``struct drm_device *dev``h]jz)}(hj\;h]hstruct drm_device *dev}(hj^;hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjZ;ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM!hjV;ubj)}(hhh]h)}(h drm_deviceh]h drm_device}(hju;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjq;hM!hjr;ubah}(h]h ]h"]h$]h&]uh1jhjV;ubeh}(h]h ]h"]h$]h&]uh1jmhjq;hM!hjS;ubah}(h]h ]h"]h$]h&]uh1jhhj7;ubh)}(h**Description**h]j%)}(hj;h]h Description}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM#hj7;ubh)}(hThis function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume.h]hThis function re-enables the output polling work, after it has been temporarily disabled using drm_kms_helper_poll_disable(), for example over suspend/resume.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM"hj7;ubh)}(hDrivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn't enabled.h]hDrivers can call this helper from their device resume implementation. It is not an error to call this even when output polling isn’t enabled.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM&hj7;ubh)}(h\If device polling was never initialized before, this call will trigger a warning and return.h]h\If device polling was never initialized before, this call will trigger a warning and return.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM)hj7;ubh)}(hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h]hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they’re only call from suspend/resume callbacks.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM,hj7;ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_kms_helper_poll_reschedule (C function) c.drm_kms_helper_poll_reschedulehNtauh1jxhj9hhhNhNubj)}(hhh](j)}(h<ubah}(h]h ]h"]h$]h&]jjuh1jhj<hhhj<hM@ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj<hhhj<hM@ubah}(h]j;ah ](jjeh"]h$]h&]jj)jhuh1jhj<hM@hj;hhubj)}(hhh]h)}(h"reschedule the output polling workh]h"reschedule the output polling work}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM@hj<hhubah}(h]h ]h"]h$]h&]uh1jhj;hhhj<hM@ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj<jj<jjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` drm_device **Description** This function reschedules the output polling work, after polling for a connector has been enabled. Drivers must call this helper after enabling polling for a connector by setting ``DRM_CONNECTOR_POLL_CONNECT`` / ``DRM_CONNECTOR_POLL_DISCONNECT`` flags in drm_connector::polled. Note that after disabling polling by clearing these flags for a connector will stop the output polling work automatically if the polling is disabled for all other connectors as well. The function can be called only after polling has been enabled by calling drm_kms_helper_poll_init() / drm_kms_helper_poll_enable().h](h)}(h**Parameters**h]j%)}(hj<h]h Parameters}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMDhj<ubji)}(hhh]jn)}(h&``struct drm_device *dev`` drm_device h](jt)}(h``struct drm_device *dev``h]jz)}(hj =h]hstruct drm_device *dev}(hj =hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMAhj=ubj)}(hhh]h)}(h drm_deviceh]h drm_device}(hj#=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hMAhj =ubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jmhj=hMAhj=ubah}(h]h ]h"]h$]h&]uh1jhhj<ubh)}(h**Description**h]j%)}(hjE=h]h Description}(hjG=hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjC=ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMChj<ubh)}(hbThis function reschedules the output polling work, after polling for a connector has been enabled.h]hbThis function reschedules the output polling work, after polling for a connector has been enabled.}(hj[=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMBhj<ubh)}(hXiDrivers must call this helper after enabling polling for a connector by setting ``DRM_CONNECTOR_POLL_CONNECT`` / ``DRM_CONNECTOR_POLL_DISCONNECT`` flags in drm_connector::polled. Note that after disabling polling by clearing these flags for a connector will stop the output polling work automatically if the polling is disabled for all other connectors as well.h](hPDrivers must call this helper after enabling polling for a connector by setting }(hjj=hhhNhNubjz)}(h``DRM_CONNECTOR_POLL_CONNECT``h]hDRM_CONNECTOR_POLL_CONNECT}(hjr=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjj=ubh / }(hjj=hhhNhNubjz)}(h!``DRM_CONNECTOR_POLL_DISCONNECT``h]hDRM_CONNECTOR_POLL_DISCONNECT}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjj=ubh flags in drm_connector::polled. Note that after disabling polling by clearing these flags for a connector will stop the output polling work automatically if the polling is disabled for all other connectors as well.}(hjj=hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMEhj<ubh)}(hThe function can be called only after polling has been enabled by calling drm_kms_helper_poll_init() / drm_kms_helper_poll_enable().h]hThe function can be called only after polling has been enabled by calling drm_kms_helper_poll_init() / drm_kms_helper_poll_enable().}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMKhj<ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_helper_probe_detect (C function)c.drm_helper_probe_detecthNtauh1jxhj9hhhNhNubj)}(hhh](j)}(hnint drm_helper_probe_detect (struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h]j)}(hmint drm_helper_probe_detect(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hinth]hint}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhj=hMubj)}(hdrm_helper_probe_detecth]j)}(hdrm_helper_probe_detecth]hdrm_helper_probe_detect}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj=hhhj=hMubj)}(hR(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj >hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj'>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)>modnameN classnameNjj)}j]j)}jj=sbc.drm_helper_probe_detectasbuh1hhj>ubj)}(h h]h }(hjG>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj+)}(hj9h]h*}(hjU>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj>ubj)}(h connectorh]h connector}(hjb>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hj{>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw>ubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj>modnameN classnameNjj)}j]jC>c.drm_helper_probe_detectasbuh1hhjw>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw>ubj+)}(hj9h]h*}(hj>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjw>ubj)}(hctxh]hctx}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjw>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubj)}(h bool forceh](j)}(hjAh]hbool}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(hforceh]hforce}(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubeh}(h]h ]h"]h$]h&]jjuh1jhj=hhhj=hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj=hhhj=hMubah}(h]j=ah ](jjeh"]h$]h&]jj)jhuh1jhj=hMhj=hhubj)}(hhh]h)}(hprobe connector statush]hprobe connector status}(hj0?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj-?hhubah}(h]h ]h"]h$]h&]uh1jhj=hhhj=hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjH?jjH?jjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` connector to probe ``struct drm_modeset_acquire_ctx *ctx`` acquire_ctx, or NULL to let this function handle locking. ``bool force`` Whether destructive probe operations should be performed. **Description** This function calls the detect callbacks of the connector. This function returns :c:type:`drm_connector_status`, or if **ctx** is set, it might also return -EDEADLK.h](h)}(h**Parameters**h]j%)}(hjR?h]h Parameters}(hjT?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjP?ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL?ubji)}(hhh](jn)}(h7``struct drm_connector *connector`` connector to probe h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjq?h]hstruct drm_connector *connector}(hjs?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjo?ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjk?ubj)}(hhh]h)}(hconnector to probeh]hconnector to probe}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1jhjk?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMhjh?ubjn)}(hb``struct drm_modeset_acquire_ctx *ctx`` acquire_ctx, or NULL to let this function handle locking. h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hj?h]h#struct drm_modeset_acquire_ctx *ctx}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj?ubj)}(hhh]h)}(h9acquire_ctx, or NULL to let this function handle locking.h]h9acquire_ctx, or NULL to let this function handle locking.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMhjh?ubjn)}(hI``bool force`` Whether destructive probe operations should be performed. h](jt)}(h``bool force``h]jz)}(hj?h]h bool force}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj?ubj)}(hhh]h)}(h9Whether destructive probe operations should be performed.h]h9Whether destructive probe operations should be performed.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hMhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hMhjh?ubeh}(h]h ]h"]h$]h&]uh1jhhjL?ubh)}(h**Description**h]j%)}(hj@h]h Description}(hj @hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj@ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL?ubh)}(hThis function calls the detect callbacks of the connector. This function returns :c:type:`drm_connector_status`, or if **ctx** is set, it might also return -EDEADLK.h](hQThis function calls the detect callbacks of the connector. This function returns }(hj4@hhhNhNubh)}(h:c:type:`drm_connector_status`h]jz)}(hj>@h]hdrm_connector_status}(hj@@hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj<@ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_statusuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj4@ubh, or if }(hj4@hhhNhNubj%)}(h**ctx**h]hctx}(hj`@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4@ubh' is set, it might also return -EDEADLK.}(hj4@hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj[@hMhjL?ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j4drm_helper_probe_single_connector_modes (C function))c.drm_helper_probe_single_connector_modeshNtauh1jxhj9hhhNhNubj)}(hhh](j)}(hkint drm_helper_probe_single_connector_modes (struct drm_connector *connector, uint32_t maxX, uint32_t maxY)h]j)}(hjint drm_helper_probe_single_connector_modes(struct drm_connector *connector, uint32_t maxX, uint32_t maxY)h](j)}(hinth]hint}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@hhhj@hMubj)}(h'drm_helper_probe_single_connector_modesh]j)}(h'drm_helper_probe_single_connector_modesh]h'drm_helper_probe_single_connector_modes}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj@hhhj@hMubj)}(h?(struct drm_connector *connector, uint32_t maxX, uint32_t maxY)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@modnameN classnameNjj)}j]j)}jj@sb)c.drm_helper_probe_single_connector_modesasbuh1hhj@ubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj+)}(hj9h]h*}(hj!AhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubj)}(h connectorh]h connector}(hj.AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj@ubj)}(h uint32_t maxXh](h)}(hhh]j)}(huint32_th]huint32_t}(hjJAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGAubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjLAmodnameN classnameNjj)}j]jA)c.drm_helper_probe_single_connector_modesasbuh1hhjCAubj)}(h h]h }(hjhAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCAubj)}(hmaxXh]hmaxX}(hjvAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCAubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj@ubj)}(h uint32_t maxYh](h)}(hhh]j)}(huint32_th]huint32_t}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjAmodnameN classnameNjj)}j]jA)c.drm_helper_probe_single_connector_modesasbuh1hhjAubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(hmaxYh]hmaxY}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj@ubeh}(h]h ]h"]h$]h&]jjuh1jhj@hhhj@hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj@hhhj@hMubah}(h]j@ah ](jjeh"]h$]h&]jj)jhuh1jhj@hMhj@hhubj)}(hhh]h)}(h!get complete set of display modesh]h!get complete set of display modes}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjAhhubah}(h]h ]h"]h$]h&]uh1jhj@hhhj@hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjBjjBjjjuh1jhhhj9hNhNubj)}(hXa **Parameters** ``struct drm_connector *connector`` connector to probe ``uint32_t maxX`` max width for modes ``uint32_t maxY`` max height for modes **Description** Based on the helper callbacks implemented by **connector** in struct :c:type:`drm_connector_helper_funcs` try to detect all valid modes. Modes will first be added to the connector's probed_modes list, then culled (based on validity and the **maxX**, **maxY** parameters) and put into the normal modes list. Intended to be used as a generic implementation of the :c:type:`drm_connector_funcs.fill_modes\(\) ` vfunc for drivers that use the CRTC helpers for output mode filtering and detection. The basic procedure is as follows 1. All modes currently on the connector's modes list are marked as stale 2. New modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order. - :c:type:`drm_connector_helper_funcs.get_modes ` vfunc - if the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) Finally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas. 3. Modes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again. 4. Any non-stale mode on the modes list then undergoes validation - drm_mode_validate_basic() performs basic sanity checks - drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified) - drm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed) - the optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checks - the optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers 5. Any mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()). **Return** The number of modes found on **connector**.h](h)}(h**Parameters**h]j%)}(hj Bh]h Parameters}(hj BhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjBubji)}(hhh](jn)}(h7``struct drm_connector *connector`` connector to probe h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj)Bh]hstruct drm_connector *connector}(hj+BhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj'Bubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj#Bubj)}(hhh]h)}(hconnector to probeh]hconnector to probe}(hjBBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj>BhMhj?Bubah}(h]h ]h"]h$]h&]uh1jhj#Bubeh}(h]h ]h"]h$]h&]uh1jmhj>BhMhj Bubjn)}(h&``uint32_t maxX`` max width for modes h](jt)}(h``uint32_t maxX``h]jz)}(hjbBh]h uint32_t maxX}(hjdBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`Bubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj\Bubj)}(hhh]h)}(hmax width for modesh]hmax width for modes}(hj{BhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwBhMhjxBubah}(h]h ]h"]h$]h&]uh1jhj\Bubeh}(h]h ]h"]h$]h&]uh1jmhjwBhMhj Bubjn)}(h'``uint32_t maxY`` max height for modes h](jt)}(h``uint32_t maxY``h]jz)}(hjBh]h uint32_t maxY}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjBubj)}(hhh]h)}(hmax height for modesh]hmax height for modes}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBhMhjBubah}(h]h ]h"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]uh1jmhjBhMhj Bubeh}(h]h ]h"]h$]h&]uh1jhhjBubh)}(h**Description**h]j%)}(hjBh]h Description}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjBubh)}(hX3Based on the helper callbacks implemented by **connector** in struct :c:type:`drm_connector_helper_funcs` try to detect all valid modes. Modes will first be added to the connector's probed_modes list, then culled (based on validity and the **maxX**, **maxY** parameters) and put into the normal modes list.h](h-Based on the helper callbacks implemented by }(hjBhhhNhNubj%)}(h **connector**h]h connector}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubh in struct }(hjBhhhNhNubh)}(h$:c:type:`drm_connector_helper_funcs`h]jz)}(hjCh]hdrm_connector_helper_funcs}(hj ChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjBubh try to detect all valid modes. Modes will first be added to the connector’s probed_modes list, then culled (based on validity and the }(hjBhhhNhNubj%)}(h**maxX**h]hmaxX}(hj*ChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubh, }(hjBhhhNhNubj%)}(h**maxY**h]hmaxY}(hj` vfunc for drivers that use the CRTC helpers for output mode filtering and detection.h](h7Intended to be used as a generic implementation of the }(hjTChhhNhNubh)}(hB:c:type:`drm_connector_funcs.fill_modes\(\) `h]jz)}(hj^Ch]h drm_connector_funcs.fill_modes()}(hj`ChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\Cubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjTCubhU vfunc for drivers that use the CRTC helpers for output mode filtering and detection.}(hjTChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{ChMhjBubh)}(h!The basic procedure is as followsh]h!The basic procedure is as follows}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjBubjCH)}(hhh](h)}(hFAll modes currently on the connector's modes list are marked as stale h]h)}(hEAll modes currently on the connector's modes list are marked as staleh]hGAll modes currently on the connector’s modes list are marked as stale}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjCubah}(h]h ]h"]h$]h&]uh1hhjCubh)}(hXNew modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order. - :c:type:`drm_connector_helper_funcs.get_modes ` vfunc - if the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) Finally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas. h](h)}(hNew modes are added to the connector's probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order.h]hNew modes are added to the connector’s probed_modes list with drm_mode_probed_add(). New modes start their life with status as OK. Modes are added from a single source using the following priority order.}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjCubh)}(hhh](h)}(hQ:c:type:`drm_connector_helper_funcs.get_modes ` vfunch]h)}(hjCh](h)}(hK:c:type:`drm_connector_helper_funcs.get_modes `h]jz)}(hjCh]h$drm_connector_helper_funcs.get_modes}(hjChhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM hjCubh vfunc}(hjChhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjChM hjCubah}(h]h ]h"]h$]h&]uh1hhjCubh)}(hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid()) h]h)}(hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid())h]hif the connector status is connector_status_connected, standard VESA DMT modes up to 1024x768 are automatically added (drm_add_modes_noedid())}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM hjCubah}(h]h ]h"]h$]h&]uh1hhjCubeh}(h]h ]h"]h$]h&]j8j4uh1hhjChM hjCubh)}(hFinally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas.h]hFinally modes specified via the kernel command line (video=...) are added in addition to what the earlier probes produced (drm_helper_probe_add_cmdline_mode()). These modes are generated using the VESA GTF/CVT formulas.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjCubeh}(h]h ]h"]h$]h&]uh1hhjCubh)}(hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again. h]h)}(hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again.h]hModes are moved from the probed_modes list to the modes list. Potential duplicates are merged together (see drm_connector_list_update()). After this step the probed_modes list will be empty again.}(hj6DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj2Dubah}(h]h ]h"]h$]h&]uh1hhjCubh)}(hXAny non-stale mode on the modes list then undergoes validation - drm_mode_validate_basic() performs basic sanity checks - drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified) - drm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed) - the optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checks - the optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers h](h)}(h>Any non-stale mode on the modes list then undergoes validationh]h>Any non-stale mode on the modes list then undergoes validation}(hjODhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjKDubh)}(hhh](h)}(h6drm_mode_validate_basic() performs basic sanity checksh]h)}(hjcDh]h6drm_mode_validate_basic() performs basic sanity checks}(hjeDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjaDubah}(h]h ]h"]h$]h&]uh1hhj^Dubh)}(h[drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified)h]h)}(h[drm_mode_validate_size() filters out modes larger than **maxX** and **maxY** (if specified)h](h7drm_mode_validate_size() filters out modes larger than }(hj}DhhhNhNubj%)}(h**maxX**h]hmaxX}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}Dubh and }(hj}DhhhNhNubj%)}(h**maxY**h]hmaxY}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}Dubh (if specified)}(hj}DhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjyDubah}(h]h ]h"]h$]h&]uh1hhj^Dubh)}(hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)h]h)}(hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)h]hdrm_mode_validate_flag() checks the modes against basic connector capabilities (interlace_allowed,doublescan_allowed,stereo_allowed)}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjDubah}(h]h ]h"]h$]h&]uh1hhj^Dubh)}(hthe optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checksh]h)}(hthe optional :c:type:`drm_connector_helper_funcs.mode_valid ` or :c:type:`drm_connector_helper_funcs.mode_valid_ctx ` helpers can perform driver and/or sink specific checksh](h the optional }(hjDhhhNhNubh)}(hL:c:type:`drm_connector_helper_funcs.mode_valid `h]jz)}(hjDh]h%drm_connector_helper_funcs.mode_valid}(hjDhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjDubh or }(hjDhhhNhNubh)}(hP:c:type:`drm_connector_helper_funcs.mode_valid_ctx `h]jz)}(hjEh]h)drm_connector_helper_funcs.mode_valid_ctx}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhjDhMhjDubh7 helpers can perform driver and/or sink specific checks}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjDhMhjDubah}(h]h ]h"]h$]h&]uh1hhj^Dubh)}(hXFthe optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers h]h)}(hXEthe optional :c:type:`drm_crtc_helper_funcs.mode_valid `, :c:type:`drm_bridge_funcs.mode_valid ` and :c:type:`drm_encoder_helper_funcs.mode_valid ` helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpersh](h the optional }(hj2EhhhNhNubh)}(hB:c:type:`drm_crtc_helper_funcs.mode_valid `h]jz)}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj:Eubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM"hj2Eubh, }(hj2EhhhNhNubh)}(h8:c:type:`drm_bridge_funcs.mode_valid `h]jz)}(hj`Eh]hdrm_bridge_funcs.mode_valid}(hjbEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj^Eubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_bridge_funcsuh1hhjYEhM"hj2Eubh and }(hj2EhhhNhNubh)}(hH:c:type:`drm_encoder_helper_funcs.mode_valid `h]jz)}(hjEh]h#drm_encoder_helper_funcs.mode_valid}(hjEhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjYEhM"hj2Eubho helpers can perform driver and/or source specific checks which are also enforced by the modeset/atomic helpers}(hj2EhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjYEhM"hj.Eubah}(h]h ]h"]h$]h&]uh1hhj^Dubeh}(h]h ]h"]h$]h&]j8j4uh1hhjrDhMhjKDubeh}(h]h ]h"]h$]h&]uh1hhjCubh)}(hAny mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()). h]h)}(hAny mode whose status is not OK is pruned from the connector's modes list, accompanied by a debug message indicating the reason for the mode's rejection (see drm_mode_prune_invalid()).h]hAny mode whose status is not OK is pruned from the connector’s modes list, accompanied by a debug message indicating the reason for the mode’s rejection (see drm_mode_prune_invalid()).}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM'hjEubah}(h]h ]h"]h$]h&]uh1hhjCubeh}(h]h ]h"]h$]h&]j?Jj@JjAJhjBJjCJuh1jBHhjBubh)}(h **Return**h]j%)}(hjEh]hReturn}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM+hjBubh)}(h+The number of modes found on **connector**.h](hThe number of modes found on }(hjEhhhNhNubj%)}(h **connector**h]h connector}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubh.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM,hjBubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_kms_helper_hotplug_event (C function)c.drm_kms_helper_hotplug_eventhNtauh1jxhj9hhhNhNubj)}(hhh](j)}(h:void drm_kms_helper_hotplug_event (struct drm_device *dev)h]j)}(h9void drm_kms_helper_hotplug_event(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj4FhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0Fhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMubj)}(h h]h }(hjCFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0FhhhjBFhMubj)}(hdrm_kms_helper_hotplug_eventh]j)}(hdrm_kms_helper_hotplug_eventh]hdrm_kms_helper_hotplug_event}(hjUFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQFubah}(h]h ](jjeh"]h$]h&]jjuh1jhj0FhhhjBFhMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjqFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmFubj)}(h h]h }(hj~FhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmFubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjFubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjFmodnameN classnameNjj)}j]j)}jjWFsbc.drm_kms_helper_hotplug_eventasbuh1hhjmFubj)}(h h]h }(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmFubj+)}(hj9h]h*}(hjFhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjmFubj)}(hdevh]hdev}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmFubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjiFubah}(h]h ]h"]h$]h&]jjuh1jhj0FhhhjBFhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj,FhhhjBFhMubah}(h]j'Fah ](jjeh"]h$]h&]jj)jhuh1jhjBFhMhj)Fhhubj)}(hhh]h)}(hfire off KMS hotplug eventsh]hfire off KMS hotplug events}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjFhhubah}(h]h ]h"]h$]h&]uh1jhj)FhhhjBFhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj Gjj Gjjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``struct drm_device *dev`` drm_device whose connector state changed **Description** This function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration. Drivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already. This function must be called from process context with no mode setting locks held. If only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.h](h)}(h**Parameters**h]j%)}(hjGh]h Parameters}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjGubji)}(hhh]jn)}(hD``struct drm_device *dev`` drm_device whose connector state changed h](jt)}(h``struct drm_device *dev``h]jz)}(hj5Gh]hstruct drm_device *dev}(hj7GhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj3Gubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj/Gubj)}(hhh]h)}(h(drm_device whose connector state changedh]h(drm_device whose connector state changed}(hjNGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjJGhMhjKGubah}(h]h ]h"]h$]h&]uh1jhj/Gubeh}(h]h ]h"]h$]h&]uh1jmhjJGhMhj,Gubah}(h]h ]h"]h$]h&]uh1jhhjGubh)}(h**Description**h]j%)}(hjpGh]h Description}(hjrGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnGubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjGubh)}(hThis function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration.h]hThis function fires off the uevent for userspace and also calls the client hotplug function, which is most commonly used to inform the fbdev emulation code and allow it to update the fbcon output configuration.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjGubh)}(hDrivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already.h]hDrivers should call this from their hotplug handling code when a change is detected. Note that this function does not do any output detection of its own, like drm_helper_hpd_irq_event() does - this is assumed to be done by the driver already.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjGubh)}(hRThis function must be called from process context with no mode setting locks held.h]hRThis function must be called from process context with no mode setting locks held.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjGubh)}(hjIf only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.h]hjIf only a single connector has changed, consider calling drm_kms_helper_connector_hotplug_event() instead.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjGubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_kms_helper_connector_hotplug_event (C function)(c.drm_kms_helper_connector_hotplug_eventhNtauh1jxhj9hhhNhNubj)}(hhh](j)}(hMvoid drm_kms_helper_connector_hotplug_event (struct drm_connector *connector)h]j)}(hLvoid drm_kms_helper_connector_hotplug_event(struct drm_connector *connector)h](j)}(hvoidh]hvoid}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhjGhMubj)}(h&drm_kms_helper_connector_hotplug_eventh]j)}(h&drm_kms_helper_connector_hotplug_eventh]h&drm_kms_helper_connector_hotplug_event}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ](jjeh"]h$]h&]jjuh1jhjGhhhjGhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hj,HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj=HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:Hubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?HmodnameN classnameNjj)}j]j)}jjHsb(c.drm_kms_helper_connector_hotplug_eventasbuh1hhjHubj)}(h h]h }(hj]HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj+)}(hj9h]h*}(hjkHhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjHubj)}(h connectorh]h connector}(hjxHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjHubah}(h]h ]h"]h$]h&]jjuh1jhjGhhhjGhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjGhhhjGhMubah}(h]jGah ](jjeh"]h$]h&]jj)jhuh1jhjGhMhjGhhubj)}(hhh]h)}(h&fire off a KMS connector hotplug eventh]h&fire off a KMS connector hotplug event}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjHhhubah}(h]h ]h"]h$]h&]uh1jhjGhhhjGhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjHjjHjjjuh1jhhhj9hNhNubj)}(h**Parameters** ``struct drm_connector *connector`` drm_connector which has changed **Description** This is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.h](h)}(h**Parameters**h]j%)}(hjHh]h Parameters}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjHubji)}(hhh]jn)}(hD``struct drm_connector *connector`` drm_connector which has changed h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjHh]hstruct drm_connector *connector}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjHubj)}(hhh]h)}(hdrm_connector which has changedh]hdrm_connector which has changed}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhMhjHubah}(h]h ]h"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]uh1jmhjHhMhjHubah}(h]h ]h"]h$]h&]uh1jhhjHubh)}(h**Description**h]j%)}(hjIh]h Description}(hj IhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjHubh)}(hvThis is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.h]hvThis is the same as drm_kms_helper_hotplug_event(), except it fires a more fine-grained uevent for a single connector.}(hj4IhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjHubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_kms_helper_is_poll_worker (C function)c.drm_kms_helper_is_poll_workerhNtauh1jxhj9hhhNhNubj)}(hhh](j)}(h)bool drm_kms_helper_is_poll_worker (void)h]j)}(h(bool drm_kms_helper_is_poll_worker(void)h](j)}(hjAh]hbool}(hjcIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_Ihhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMWubj)}(h h]h }(hjqIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_IhhhjpIhMWubj)}(hdrm_kms_helper_is_poll_workerh]j)}(hdrm_kms_helper_is_poll_workerh]hdrm_kms_helper_is_poll_worker}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ](jjeh"]h$]h&]jjuh1jhj_IhhhjpIhMWubj)}(h(void)h]j)}(hvoidh]j)}(hvoidh]hvoid}(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIubah}(h]h ]h"]h$]h&]noemphjjuh1jhjIubah}(h]h ]h"]h$]h&]jjuh1jhj_IhhhjpIhMWubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj[IhhhjpIhMWubah}(h]jVIah ](jjeh"]h$]h&]jj)jhuh1jhjpIhMWhjXIhhubj)}(hhh]h)}(h*is ``current`` task an output poll worker?h](his }(hjIhhhNhNubjz)}(h ``current``h]hcurrent}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubh task an output poll worker?}(hjIhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMWhjIhhubah}(h]h ]h"]h$]h&]uh1jhjXIhhhjpIhMWubeh}(h]h ](jfunctioneh"]h$]h&]jjjjIjjIjjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``void`` no arguments **Description** Determine if ``current`` task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts. One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.h](h)}(h**Parameters**h]j%)}(hjIh]h Parameters}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM[hjIubji)}(hhh]jn)}(h``void`` no arguments h](jt)}(h``void``h]jz)}(hjJh]hvoid}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chKhjJubj)}(hhh]h)}(h no argumentsh]h no arguments}(hj5JhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1JhKhj2Jubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhj1JhKhjJubah}(h]h ]h"]h$]h&]uh1jhhjIubh)}(h**Description**h]j%)}(hjWJh]h Description}(hjYJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjUJubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chKhjIubh)}(hDetermine if ``current`` task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts.h](h Determine if }(hjmJhhhNhNubjz)}(h ``current``h]hcurrent}(hjuJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmJubhy task is an output poll worker. This can be used to select distinct code paths for output polling versus other contexts.}(hjmJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMXhjIubh)}(hX.One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.h]hX.One use case is to avoid a deadlock between the output poll worker and the autosuspend worker wherein the latter waits for polling to finish upon calling drm_kms_helper_poll_disable(), while the former waits for runtime suspend to finish upon calling pm_runtime_get_sync() in a connector ->detect hook.}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM[hjIubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_kms_helper_poll_disable (C function)c.drm_kms_helper_poll_disablehNtauh1jxhj9hhhNhNubj)}(hhh](j)}(h9void drm_kms_helper_poll_disable (struct drm_device *dev)h]j)}(h8void drm_kms_helper_poll_disable(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMkubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJhhhjJhMkubj)}(hdrm_kms_helper_poll_disableh]j)}(hdrm_kms_helper_poll_disableh]hdrm_kms_helper_poll_disable}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ](jjeh"]h$]h&]jjuh1jhjJhhhjJhMkubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjKmodnameN classnameNjj)}j]j)}jjJsbc.drm_kms_helper_poll_disableasbuh1hhjJubj)}(h h]h }(hj8KhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubj+)}(hj9h]h*}(hjFKhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjJubj)}(hdevh]hdev}(hjSKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubah}(h]h ]h"]h$]h&]jjuh1jhjJhhhjJhMkubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjJhhhjJhMkubah}(h]jJah ](jjeh"]h$]h&]jj)jhuh1jhjJhMkhjJhhubj)}(hhh]h)}(hdisable output pollingh]hdisable output polling}(hj}KhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMkhjzKhhubah}(h]h ]h"]h$]h&]uh1jhjJhhhjJhMkubeh}(h]h ](jfunctioneh"]h$]h&]jjjjKjjKjjjuh1jhhhj9hNhNubj)}(hXX**Parameters** ``struct drm_device *dev`` drm_device **Description** This function disables the output polling work. Drivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn't enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable(). If however, the polling was never initialized, this call will trigger a warning and return. Note that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h](h)}(h**Parameters**h]j%)}(hjKh]h Parameters}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMohjKubji)}(hhh]jn)}(h&``struct drm_device *dev`` drm_device h](jt)}(h``struct drm_device *dev``h]jz)}(hjKh]hstruct drm_device *dev}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjKubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMlhjKubj)}(hhh]h)}(h drm_deviceh]h drm_device}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjKhMlhjKubah}(h]h ]h"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]uh1jmhjKhMlhjKubah}(h]h ]h"]h$]h&]uh1jhhjKubh)}(h**Description**h]j%)}(hjKh]h Description}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjKubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMnhjKubh)}(h/This function disables the output polling work.h]h/This function disables the output polling work.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMmhjKubh)}(hDrivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn't enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable().h]hDrivers can call this helper from their device suspend implementation. It is not an error to call this even when output polling isn’t enabled or already disabled. Polling is re-enabled by calling drm_kms_helper_poll_enable().}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMohjKubh)}(h[If however, the polling was never initialized, this call will trigger a warning and return.h]h[If however, the polling was never initialized, this call will trigger a warning and return.}(hj-LhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMshjKubh)}(hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they're only call from suspend/resume callbacks.h]hNote that calls to enable and disable polling must be strictly ordered, which is automatically the case when they’re only call from suspend/resume callbacks.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:Wubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMghj6Wubji)}(hhh](jn)}(h#``struct drm_crtc *crtc`` the crtc h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj[Wh]hstruct drm_crtc *crtc}(hj]WhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYWubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMdhjUWubj)}(hhh]h)}(hthe crtch]hthe crtc}(hjtWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjpWhMdhjqWubah}(h]h ]h"]h$]h&]uh1jhjUWubeh}(h]h ]h"]h$]h&]uh1jmhjpWhMdhjRWubjn)}(h=``const struct drm_display_mode *mode`` the mode to validate h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hjWh]h#const struct drm_display_mode *mode}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMehjWubj)}(hhh]h)}(hthe mode to validateh]hthe mode to validate}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMehjWubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjWhMehjRWubjn)}(hJ``const struct drm_display_mode *fixed_mode`` the display hardware's mode h](jt)}(h-``const struct drm_display_mode *fixed_mode``h]jz)}(hjWh]h)const struct drm_display_mode *fixed_mode}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMfhjWubj)}(hhh]h)}(hthe display hardware's modeh]hthe display hardware’s mode}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjWhMfhjWubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjWhMfhjRWubeh}(h]h ]h"]h$]h&]uh1jhhj6Wubh)}(h **Return**h]j%)}(hjXh]hReturn}(hj XhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhhj6Wubh)}(h:MODE_OK on success, or another mode-status code otherwise.h]h:MODE_OK on success, or another mode-status code otherwise.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhhj6Wubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_connector_helper_get_modes_fixed (C function)&c.drm_connector_helper_get_modes_fixedhNtauh1jxhj9hhhNhNubj)}(hhh](j)}(huint drm_connector_helper_get_modes_fixed (struct drm_connector *connector, const struct drm_display_mode *fixed_mode)h]j)}(htint drm_connector_helper_get_modes_fixed(struct drm_connector *connector, const struct drm_display_mode *fixed_mode)h](j)}(hinth]hint}(hjMXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIXhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM{ubj)}(h h]h }(hj\XhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjIXhhhj[XhM{ubj)}(h$drm_connector_helper_get_modes_fixedh]j)}(h$drm_connector_helper_get_modes_fixedh]h$drm_connector_helper_get_modes_fixed}(hjnXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjXubah}(h]h ](jjeh"]h$]h&]jjuh1jhjIXhhhj[XhM{ubj)}(hL(struct drm_connector *connector, const struct drm_display_mode *fixed_mode)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjXmodnameN classnameNjj)}j]j)}jjpXsb&c.drm_connector_helper_get_modes_fixedasbuh1hhjXubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj+)}(hj9h]h*}(hjXhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjXubj)}(h connectorh]h connector}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjXubj)}(h)const struct drm_display_mode *fixed_modeh](j)}(hjUh]hconst}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(h h]h }(hj YhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(hjh]hstruct}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj)}(h h]h }(hj$YhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hj5YhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2Yubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7YmodnameN classnameNjj)}j]jX&c.drm_connector_helper_get_modes_fixedasbuh1hhjXubj)}(h h]h }(hjSYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubj+)}(hj9h]h*}(hjaYhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjXubj)}(h fixed_modeh]h fixed_mode}(hjnYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjXubeh}(h]h ]h"]h$]h&]jjuh1jhjIXhhhj[XhM{ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjEXhhhj[XhM{ubah}(h]j@Xah ](jjeh"]h$]h&]jj)jhuh1jhj[XhM{hjBXhhubj)}(hhh]h)}(h)Duplicates a display mode for a connectorh]h)Duplicates a display mode for a connector}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM{hjYhhubah}(h]h ]h"]h$]h&]uh1jhjBXhhhj[XhM{ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjYjjYjjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` the connector ``const struct drm_display_mode *fixed_mode`` the display hardware's mode **Description** This function duplicates a display modes for a connector. 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Drivers for hardware that only supports a single fixed mode can use this function in their connector's get_modes helper.h]hThis function duplicates a display modes for a connector. Drivers for hardware that only supports a single fixed mode can use this function in their connector’s get_modes helper.}(hjcZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM~hjYubh)}(h **Return**h]j%)}(hjtZh]hReturn}(hjvZhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrZubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjYubh)}(hThe number of created modes.h]hThe number of created modes.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjYubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_connector_helper_get_modes (C function) c.drm_connector_helper_get_modeshNtauh1jxhj9hhhNhNubj)}(hhh](j)}(hDint drm_connector_helper_get_modes (struct drm_connector *connector)h]j)}(hCint drm_connector_helper_get_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhjZhMubj)}(hdrm_connector_helper_get_modesh]j)}(hdrm_connector_helper_get_modesh]hdrm_connector_helper_get_modes}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZhhhjZhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj[modnameN classnameNjj)}j]j)}jjZsb c.drm_connector_helper_get_modesasbuh1hhjZubj)}(h h]h }(hj4[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubj+)}(hj9h]h*}(hjB[hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjZubj)}(h connectorh]h connector}(hjO[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjZubah}(h]h ]h"]h$]h&]jjuh1jhjZhhhjZhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjZhhhjZhMubah}(h]jZah ](jjeh"]h$]h&]jj)jhuh1jhjZhMhjZhhubj)}(hhh]h)}(hRead EDID and update connector.h]hRead EDID and update connector.}(hjy[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjv[hhubah}(h]h ]h"]h$]h&]uh1jhjZhhhjZhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj[jj[jjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` The connector **Description** Read the EDID using drm_edid_read() (which requires that connector->ddc is set), and update the connector using the EDID. This can be used as the "default" connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update. **Return** Number of modes.h](h)}(h**Parameters**h]j%)}(hj[h]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj[ubji)}(hhh]jn)}(h2``struct drm_connector *connector`` The connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj[h]hstruct drm_connector *connector}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj[ubj)}(hhh]h)}(h The connectorh]h The connector}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhj[hMhj[ubah}(h]h ]h"]h$]h&]uh1jhhj[ubh)}(h**Description**h]j%)}(hj[h]h Description}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj[ubh)}(hyRead the EDID using drm_edid_read() (which requires that connector->ddc is set), and update the connector using the EDID.h]hyRead the EDID using drm_edid_read() (which requires that connector->ddc is set), and update the connector using the EDID.}(hj \hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj[ubh)}(hThis can be used as the "default" connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update.h]hThis can be used as the “default” connector helper .get_modes() hook if the driver does not need any special processing. This is sets the example what custom .get_modes() hooks should do regarding EDID read and connector update.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj[ubh)}(h **Return**h]j%)}(hj+\h]hReturn}(hj-\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj)\ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj[ubh)}(hNumber of modes.h]hNumber of modes.}(hjA\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj[ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j.drm_connector_helper_tv_get_modes (C function)#c.drm_connector_helper_tv_get_modeshNtauh1jxhj9hhhNhNubj)}(hhh](j)}(hGint drm_connector_helper_tv_get_modes (struct drm_connector *connector)h]j)}(hFint drm_connector_helper_tv_get_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjp\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl\hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl\hhhj~\hMubj)}(h!drm_connector_helper_tv_get_modesh]j)}(h!drm_connector_helper_tv_get_modesh]h!drm_connector_helper_tv_get_modes}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjl\hhhj~\hMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj\modnameN classnameNjj)}j]j)}jj\sb#c.drm_connector_helper_tv_get_modesasbuh1hhj\ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubj+)}(hj9h]h*}(hj\hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj\ubj)}(h connectorh]h connector}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj\ubah}(h]h ]h"]h$]h&]jjuh1jhjl\hhhj~\hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjh\hhhj~\hMubah}(h]jc\ah ](jjeh"]h$]h&]jj)jhuh1jhj~\hMhje\hhubj)}(hhh]h)}(h,Fills the modes availables to a TV connectorh]h,Fills the modes availables to a TV connector}(hj0]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj-]hhubah}(h]h ]h"]h$]h&]uh1jhje\hhhj~\hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjH]jjH]jjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` The connector **Description** Fills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line. This can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing. **Return** The number of modes added to the connector.h](h)}(h**Parameters**h]j%)}(hjR]h]h Parameters}(hjT]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjP]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL]ubji)}(hhh]jn)}(h2``struct drm_connector *connector`` The connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjq]h]hstruct drm_connector *connector}(hjs]hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjo]ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjk]ubj)}(hhh]h)}(h The connectorh]h The connector}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hMhj]ubah}(h]h ]h"]h$]h&]uh1jhjk]ubeh}(h]h ]h"]h$]h&]uh1jmhj]hMhjh]ubah}(h]h ]h"]h$]h&]uh1jhhjL]ubh)}(h**Description**h]j%)}(hj]h]h Description}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL]ubh)}(hFills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line.h]hFills the available modes for a TV connector based on the supported TV modes, and the default mode expressed by the kernel command line.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL]ubh)}(hyThis can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing.h]hyThis can be used as the default TV connector helper .get_modes() hook if the driver does not need any special processing.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL]ubh)}(h **Return**h]j%)}(hj]h]hReturn}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj]ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL]ubh)}(h+The number of modes added to the connector.h]h+The number of modes added to the connector.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhjL]ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j1drm_connector_helper_detect_from_ddc (C function)&c.drm_connector_helper_detect_from_ddchNtauh1jxhj9hhhNhNubj)}(hhh](j)}(h{int drm_connector_helper_detect_from_ddc (struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h]j)}(hzint drm_connector_helper_detect_from_ddc(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hinth]hint}(hj'^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#^hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMubj)}(h h]h }(hj6^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#^hhhj5^hMubj)}(h$drm_connector_helper_detect_from_ddch]j)}(h$drm_connector_helper_detect_from_ddch]h$drm_connector_helper_detect_from_ddc}(hjH^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjD^ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj#^hhhj5^hMubj)}(hR(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjd^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`^ubj)}(h h]h }(hjq^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`^ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj^modnameN classnameNjj)}j]j)}jjJ^sb&c.drm_connector_helper_detect_from_ddcasbuh1hhj`^ubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`^ubj+)}(hj9h]h*}(hj^hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj`^ubj)}(h connectorh]h connector}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`^ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj\^ubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj^modnameN classnameNjj)}j]j^&c.drm_connector_helper_detect_from_ddcasbuh1hhj^ubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubj+)}(hj9h]h*}(hj _hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj^ubj)}(hctxh]hctx}(hj-_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj\^ubj)}(h bool forceh](j)}(hjAh]hbool}(hjF_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjB_ubj)}(h h]h }(hjS_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjB_ubj)}(hforceh]hforce}(hja_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjB_ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj\^ubeh}(h]h ]h"]h$]h&]jjuh1jhj#^hhhj5^hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj^hhhj5^hMubah}(h]j^ah ](jjeh"]h$]h&]jj)jhuh1jhj5^hMhj^hhubj)}(hhh]h)}(h&Read EDID and detect connector status.h]h&Read EDID and detect connector status.}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj_hhubah}(h]h ]h"]h$]h&]uh1jhj^hhhj5^hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj_jj_jjjuh1jhhhj9hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` The connector ``struct drm_modeset_acquire_ctx *ctx`` Acquire context ``bool force`` Perform screen-destructive operations, if necessary **Description** Detects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure. **Return** The connector status as defined by enum drm_connector_status.h](h)}(h**Parameters**h]j%)}(hj_h]h Parameters}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj_ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj_ubji)}(hhh](jn)}(h2``struct drm_connector *connector`` The connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj_h]hstruct drm_connector *connector}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj_ubj)}(hhh]h)}(h The connectorh]h The connector}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj_hMhj_ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj_hMhj_ubjn)}(h8``struct drm_modeset_acquire_ctx *ctx`` Acquire context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hj`h]h#struct drm_modeset_acquire_ctx *ctx}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj`ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj_ubj)}(hhh]h)}(hAcquire contexth]hAcquire context}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hMhj`ubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jmhj`hMhj_ubjn)}(hC``bool force`` Perform screen-destructive operations, if necessary h](jt)}(h``bool force``h]jz)}(hj>`h]h bool force}(hj@`hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj<`ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj8`ubj)}(hhh]h)}(h3Perform screen-destructive operations, if necessaryh]h3Perform screen-destructive operations, if necessary}(hjW`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjS`hMhjT`ubah}(h]h ]h"]h$]h&]uh1jhj8`ubeh}(h]h ]h"]h$]h&]uh1jmhjS`hMhj_ubeh}(h]h ]h"]h$]h&]uh1jhhj_ubh)}(h**Description**h]j%)}(hjy`h]h Description}(hj{`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjw`ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj_ubh)}(hDetects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure.h]hDetects the connector status by reading the EDID using drm_probe_ddc(), which requires connector->ddc to be set. Returns connector_status_connected on success or connector_status_disconnected on failure.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chMhj_ubh)}(h **Return**h]j%)}(hj`h]hReturn}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj`ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM"hj_ubh)}(h=The connector status as defined by enum drm_connector_status.h]h=The connector status as defined by enum drm_connector_status.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:381: ./drivers/gpu/drm/drm_probe_helper.chM#hj_ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj9hhhNhNubeh}(h])output-probing-helper-functions-referenceah ]h"])output probing helper functions referenceah$]h&]uh1hhhhhhhhMxubh)}(hhh](h)}(hEDID Helper Functions Referenceh]hEDID Helper Functions Reference}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hhhhhMubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_edid_decode_mfg_id (C function)c.drm_edid_decode_mfg_idhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h>const char * drm_edid_decode_mfg_id (u16 mfg_id, char vend[4])h]j)}(hbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj:bubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhj6bubji)}(hhh](jn)}(h#``u16 mfg_id`` The manufacturer ID h](jt)}(h``u16 mfg_id``h]jz)}(hj[bh]h u16 mfg_id}(hj]bhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjYbubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhM}hjUbubj)}(hhh]h)}(hThe manufacturer IDh]hThe manufacturer ID}(hjtbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjpbhM}hjqbubah}(h]h ]h"]h$]h&]uh1jhjUbubeh}(h]h ]h"]h$]h&]uh1jmhjpbhM}hjRbubjn)}(h\``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' terminationh](jt)}(h``char vend[4]``h]jz)}(hjbh]h char vend[4]}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhM~hjbubj)}(hhh]h)}(hKA 4-byte buffer to store the 3-letter vendor string plus a '\0' terminationh]hOA 4-byte buffer to store the 3-letter vendor string plus a ‘0’ termination}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhM~hjbubah}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]uh1jmhjbhM~hjRbubeh}(h]h ]h"]h$]h&]uh1jhhj6bubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_edid_encode_panel_id (C macro)c.drm_edid_encode_panel_idhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hdrm_edid_encode_panel_idh]j)}(hdrm_edid_encode_panel_idh]j)}(hdrm_edid_encode_panel_idh]j)}(hjbh]hdrm_edid_encode_panel_id}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubah}(h]h ](jjeh"]h$]h&]jjuh1jhjbhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMubah}(h]h ]h"]h$]h&]jjjuh1jjjhjbhhhjchMubah}(h]jbah ](jjeh"]h$]h&]jj)jhuh1jhjchMhjbhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjbhhhjchMubeh}(h]h ](jmacroeh"]h$]h&]jjjjcjjcjjjuh1jhhhj`hNhNubh)}(hM``drm_edid_encode_panel_id (vend_chr_0, vend_chr_1, vend_chr_2, product_id)``h]jz)}(hj#ch]hIdrm_edid_encode_panel_id (vend_chr_0, vend_chr_1, vend_chr_2, product_id)}(hj%chhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj!cubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhj`hhubjT=)}(h:Encode an ID for matching against drm_edid_get_panel_id() h]h)}(h9Encode an ID for matching against drm_edid_get_panel_id()h]h9Encode an ID for matching against drm_edid_get_panel_id()}(hj=chhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhj9cubah}(h]h ]h"]h$]h&]uh1jS=hjKchMhj`hhubj)}(hX**Parameters** ``vend_chr_0`` First character of the vendor string. ``vend_chr_1`` Second character of the vendor string. ``vend_chr_2`` Third character of the vendor string. ``product_id`` The 16-bit product ID. **Description** This is a macro so that it can be calculated at compile time and used as an initializer. For instance: drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08 **Return** a 32-bit ID per panel.h](h)}(h**Parameters**h]j%)}(hjXch]h Parameters}(hjZchhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVcubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjRcubji)}(hhh](jn)}(h5``vend_chr_0`` First character of the vendor string. h](jt)}(h``vend_chr_0``h]jz)}(hjwch]h vend_chr_0}(hjychhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjucubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjqcubj)}(hhh]h)}(h%First character of the vendor string.h]h%First character of the vendor string.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1jhjqcubeh}(h]h ]h"]h$]h&]uh1jmhjchMhjncubjn)}(h6``vend_chr_1`` Second character of the vendor string. h](jt)}(h``vend_chr_1``h]jz)}(hjch]h vend_chr_1}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjcubj)}(hhh]h)}(h&Second character of the vendor string.h]h&Second character of the vendor string.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhjchMhjncubjn)}(h5``vend_chr_2`` Third character of the vendor string. h](jt)}(h``vend_chr_2``h]jz)}(hjch]h vend_chr_2}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjcubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjcubj)}(hhh]h)}(h%Third character of the vendor string.h]h%Third character of the vendor string.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjchMhjcubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhjchMhjncubjn)}(h&``product_id`` The 16-bit product ID. h](jt)}(h``product_id``h]jz)}(hj"dh]h product_id}(hj$dhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj dubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjdubj)}(hhh]h)}(hThe 16-bit product ID.h]hThe 16-bit product ID.}(hj;dhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj7dhMhj8dubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhj7dhMhjncubeh}(h]h ]h"]h$]h&]uh1jhhjRcubh)}(h**Description**h]j%)}(hj]dh]h Description}(hj_dhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[dubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjRcubh)}(hXThis is a macro so that it can be calculated at compile time and used as an initializer.h]hXThis is a macro so that it can be calculated at compile time and used as an initializer.}(hjsdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjRcubji)}(hhh]jn)}(hLFor instance: drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08 h](jt)}(h For instance:h]h For instance:}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjdubj)}(hhh]h)}(h=drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08h]hIdrm_edid_encode_panel_id(‘B’, ‘O’, ‘E’, 0x2d08) => 0x09e52d08}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMhjdubah}(h]h ]h"]h$]h&]uh1jhjdubeh}(h]h ]h"]h$]h&]uh1jmhjdhMhjdubah}(h]h ]h"]h$]h&]uh1jhhjRcubh)}(h **Return**h]j%)}(hjdh]hReturn}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjRcubh)}(ha 32-bit ID per panel.h]ha 32-bit ID per panel.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjRcubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_edid_decode_panel_id (C function)c.drm_edid_decode_panel_idhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hKvoid drm_edid_decode_panel_id (u32 panel_id, char vend[4], u16 *product_id)h]j)}(hJvoid drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 *product_id)h](j)}(hvoidh]hvoid}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdhhhjehMubj)}(hdrm_edid_decode_panel_idh]j)}(hdrm_edid_decode_panel_idh]hdrm_edid_decode_panel_id}(hj#ehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ](jjeh"]h$]h&]jjuh1jhjdhhhjehMubj)}(h-(u32 panel_id, char vend[4], u16 *product_id)h](j)}(h u32 panel_idh](h)}(hhh]j)}(hu32h]hu32}(hjBehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?eubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDemodnameN classnameNjj)}j]j)}jj%esbc.drm_edid_decode_panel_idasbuh1hhj;eubj)}(h h]h }(hjbehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;eubj)}(hpanel_idh]hpanel_id}(hjpehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj;eubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7eubj)}(h char vend[4]h](j)}(hcharh]hchar}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(hvendh]hvend}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj+)}(hj Th]h[}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubj )}(hjh]h4}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1j hjeubj+)}(hj8Th]h]}(hjehhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7eubj)}(hu16 *product_idh](h)}(hhh]j)}(hu16h]hu16}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjemodnameN classnameNjj)}j]j^ec.drm_edid_decode_panel_idasbuh1hhjeubj)}(h h]h }(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj+)}(hj9h]h*}(hjfhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubj)}(h product_idh]h product_id}(hj!fhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj7eubeh}(h]h ]h"]h$]h&]jjuh1jhjdhhhjehMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjdhhhjehMubah}(h]jdah ](jjeh"]h$]h&]jj)jhuh1jhjehMhjdhhubj)}(hhh]h)}(h1Decode a panel ID from drm_edid_encode_panel_id()h]h1Decode a panel ID from drm_edid_encode_panel_id()}(hjKfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjHfhhubah}(h]h ]h"]h$]h&]uh1jhjdhhhjehMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjcfjjcfjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``u32 panel_id`` The panel ID to decode. ``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' termination ``u16 *product_id`` The product ID will be returned here. **Description** For instance, after: drm_edid_decode_panel_id(0x09e52d08, vend, :c:type:`product_id`) These will be true: vend[0] = 'B' vend[1] = 'O' vend[2] = 'E' vend[3] = '\0' product_id = 0x2d08h](h)}(h**Parameters**h]j%)}(hjmfh]h Parameters}(hjofhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjkfubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjgfubji)}(hhh](jn)}(h)``u32 panel_id`` The panel ID to decode. h](jt)}(h``u32 panel_id``h]jz)}(hjfh]h u32 panel_id}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjfubj)}(hhh]h)}(hThe panel ID to decode.h]hThe panel ID to decode.}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjfhMhjfubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjfhMhjfubjn)}(h]``char vend[4]`` A 4-byte buffer to store the 3-letter vendor string plus a '\0' termination h](jt)}(h``char vend[4]``h]jz)}(hjfh]h char vend[4]}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjfubj)}(hhh]h)}(hKA 4-byte buffer to store the 3-letter vendor string plus a '\0' terminationh]hOA 4-byte buffer to store the 3-letter vendor string plus a ‘0’ termination}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjfubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjfhMhjfubjn)}(h:``u16 *product_id`` The product ID will be returned here. h](jt)}(h``u16 *product_id``h]jz)}(hjfh]hu16 *product_id}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjfubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:387: ./include/drm/drm_edid.hhMhjfubj)}(hhh]h)}(h%The product ID will be returned here.h]h%The product ID will be returned here.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjghMhjgubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjghMhjfubeh}(h]h ]h"]h$]h&]uh1jhhjgfubh)}(h**Description**h]j%)}(hj:gh]h Description}(hj8 if the header is perfect, down to 0 if it’s totally wrong.}(hjbihhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjhubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_is_valid (C function)c.drm_edid_is_validhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h*bool drm_edid_is_valid (struct edid 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]h"]h$]h&]jjuh1jhjihhhjihMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjihhhjihMubah}(h]jiah ](jjeh"]h$]h&]jj)jhuh1jhjihMhjihhubj)}(hhh]h)}(hsanity check EDID datah]hsanity check EDID data}(hjPjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjMjhhubah}(h]h ]h"]h$]h&]uh1jhjihhhjihMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjhjjjhjjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``struct edid *edid`` EDID data **Description** Sanity-check an entire EDID record (including extensions) **Return** True if the EDID data is valid, false otherwise.h](h)}(h**Parameters**h]j%)}(hjrjh]h Parameters}(hjtjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjljubji)}(hhh]jn)}(h ``struct edid *edid`` EDID data h](jt)}(h``struct edid *edid``h]jz)}(hjjh]hstruct edid *edid}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjjubj)}(hhh]h)}(h EDID datah]h EDID data}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhMhjjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjjhMhjjubah}(h]h ]h"]h$]h&]uh1jhhjljubh)}(h**Description**h]j%)}(hjjh]h Description}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjljubh)}(h9Sanity-check an entire EDID record (including extensions)h]h9Sanity-check an entire EDID record (including extensions)}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjljubh)}(h **Return**h]j%)}(hjjh]hReturn}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjljubh)}(h0True if the EDID data is valid, false otherwise.h]h0True if the EDID data is valid, false otherwise.}(hj khhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjljubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_valid (C function)c.drm_edid_validhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h5bool drm_edid_valid (const struct drm_edid *drm_edid)h]j)}(h4bool drm_edid_valid(const struct drm_edid *drm_edid)h](j)}(hjAh]hbool}(hj8khhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4khhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjFkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4khhhjEkhM ubj)}(hdrm_edid_validh]j)}(hdrm_edid_validh]hdrm_edid_valid}(hjXkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjTkubah}(h]h ](jjeh"]h$]h&]jjuh1jhj4khhhjEkhM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjtkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpkubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpkubj)}(hjh]hstruct}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpkubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpkubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjkmodnameN classnameNjj)}j]j)}jjZksbc.drm_edid_validasbuh1hhjpkubj)}(h h]h }(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpkubj+)}(hj9h]h*}(hjkhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjpkubj)}(hdrm_edidh]hdrm_edid}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjlkubah}(h]h ]h"]h$]h&]jjuh1jhj4khhhjEkhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj0khhhjEkhM ubah}(h]j+kah ](jjeh"]h$]h&]jj)jhuh1jhjEkhM hj-khhubj)}(hhh]h)}(hsanity check EDID datah]hsanity check EDID data}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjlhhubah}(h]h ]h"]h$]h&]uh1jhj-khhhjEkhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj*ljj*ljjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const struct drm_edid *drm_edid`` EDID data **Description** Sanity check an EDID. Cross check block count against allocated size and checksum the blocks. **Return** True if the EDID data is valid, false otherwise.h](h)}(h**Parameters**h]j%)}(hj4lh]h Parameters}(hj6lhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2lubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.lubji)}(hhh]jn)}(h.``const struct drm_edid *drm_edid`` EDID data h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjSlh]hconst struct drm_edid *drm_edid}(hjUlhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjQlubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjMlubj)}(hhh]h)}(h EDID datah]h EDID data}(hjllhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhlhMhjilubah}(h]h ]h"]h$]h&]uh1jhjMlubeh}(h]h ]h"]h$]h&]uh1jmhjhlhMhjJlubah}(h]h ]h"]h$]h&]uh1jhhj.lubh)}(h**Description**h]j%)}(hjlh]h Description}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.lubh)}(h]Sanity check an EDID. Cross check block count against allocated size and checksum the blocks.h]h]Sanity check an EDID. Cross check block count against allocated size and checksum the blocks.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.lubh)}(h **Return**h]j%)}(hjlh]hReturn}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.lubh)}(h0True if the EDID data is valid, false otherwise.h]h0True if the EDID data is valid, false otherwise.}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.lubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_edid_override_connector_update (C function)$c.drm_edid_override_connector_updatehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hHint drm_edid_override_connector_update (struct drm_connector *connector)h]j)}(hGint drm_edid_override_connector_update(struct drm_connector *connector)h](j)}(hinth]hint}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hj mhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlhhhjmhMubj)}(h"drm_edid_override_connector_updateh]j)}(h"drm_edid_override_connector_updateh]h"drm_edid_override_connector_update}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ](jjeh"]h$]h&]jjuh1jhjlhhhjmhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj7mhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3mubj)}(h h]h }(hjDmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3mubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjUmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjRmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjWmmodnameN classnameNjj)}j]j)}jjmsb$c.drm_edid_override_connector_updateasbuh1hhj3mubj)}(h h]h }(hjumhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3mubj+)}(hj9h]h*}(hjmhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3mubj)}(h connectorh]h connector}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3mubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/mubah}(h]h ]h"]h$]h&]jjuh1jhjlhhhjmhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjlhhhjmhMubah}(h]jlah ](jjeh"]h$]h&]jj)jhuh1jhjmhMhjlhhubj)}(hhh]h)}(h%add modes from override/firmware EDIDh]h%add modes from override/firmware EDID}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjmhhubah}(h]h ]h"]h$]h&]uh1jhjlhhhjmhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjmjjmjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing **Description** Add modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped. **Return** The number of modes added or 0 if we couldn't find any.h](h)}(h**Parameters**h]j%)}(hjmh]h Parameters}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjmubji)}(hhh]jn)}(h<``struct drm_connector *connector`` connector we're probing h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjmh]hstruct drm_connector *connector}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjmubj)}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhMhjnubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjnhMhjmubah}(h]h ]h"]h$]h&]uh1jhhjmubh)}(h**Description**h]j%)}(hj6nh]h Description}(hj8nhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4nubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjmubh)}(hAdd modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped.h]hAdd modes from the override/firmware EDID, if available. Only to be used from drm_helper_probe_single_connector_modes() as a fallback for when DDC probe failed during drm_get_edid() and caused the override/firmware EDID to be skipped.}(hjLnhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjmubh)}(h **Return**h]j%)}(hj]nh]hReturn}(hj_nhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[nubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjmubh)}(h7The number of modes added or 0 if we couldn't find any.h]h9The number of modes added or 0 if we couldn’t find any.}(hjsnhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjmubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_raw (C function)c.drm_edid_rawhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hBconst struct edid * drm_edid_raw (const struct drm_edid *drm_edid)h]j)}(h@const struct edid *drm_edid_raw(const struct drm_edid *drm_edid)h](j)}(hjUh]hconst}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhjnhM ubj)}(hjh]hstruct}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhjnhM ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhjnhM ubh)}(hhh]j)}(hedidh]hedid}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjnmodnameN classnameNjj)}j]j)}j drm_edid_rawsbc.drm_edid_rawasbuh1hhjnhhhjnhM ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnhhhjnhM ubj+)}(hj9h]h*}(hj ohhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjnhhhjnhM ubj)}(h drm_edid_rawh]j)}(hjnh]h drm_edid_raw}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubah}(h]h ](jjeh"]h$]h&]jjuh1jhjnhhhjnhM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hj7ohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3oubj)}(h h]h }(hjDohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3oubj)}(hjh]hstruct}(hjRohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3oubj)}(h h]h }(hj_ohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3oubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjpohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmoubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjromodnameN classnameNjj)}j]jnc.drm_edid_rawasbuh1hhj3oubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3oubj+)}(hj9h]h*}(hjohhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj3oubj)}(hdrm_edidh]hdrm_edid}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3oubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj/oubah}(h]h ]h"]h$]h&]jjuh1jhjnhhhjnhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjnhhhjnhM ubah}(h]jnah ](jjeh"]h$]h&]jj)jhuh1jhjnhM hjnhhubj)}(hhh]h)}(h#Get a pointer to the raw EDID data.h]h#Get a pointer to the raw EDID data.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjohhubah}(h]h ]h"]h$]h&]uh1jhjnhhhjnhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjojjojjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const struct drm_edid *drm_edid`` drm_edid container **Description** Get a pointer to the raw EDID data. This is for transition only. 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kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_dup (C function)c.drm_edid_duphNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hFconst struct drm_edid * drm_edid_dup (const struct drm_edid *drm_edid)h]j)}(hDconst struct drm_edid *drm_edid_dup(const struct drm_edid *drm_edid)h](j)}(hjUh]hconst}(hjEshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAshhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjSshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAshhhjRshM ubj)}(hjh]hstruct}(hjashhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAshhhjRshM ubj)}(h h]h }(hjnshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAshhhjRshM ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|subah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjsmodnameN classnameNjj)}j]j)}j drm_edid_dupsbc.drm_edid_dupasbuh1hhjAshhhjRshM ubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAshhhjRshM ubj+)}(hj9h]h*}(hjshhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjAshhhjRshM ubj)}(h drm_edid_duph]j)}(hjsh]h drm_edid_dup}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ](jjeh"]h$]h&]jjuh1jhjAshhhjRshM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(hjh]hstruct}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjtmodnameN classnameNjj)}j]jsc.drm_edid_dupasbuh1hhjsubj)}(h h]h }(hj1thhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj+)}(hj9h]h*}(hj?thhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjsubj)}(hdrm_edidh]hdrm_edid}(hjLthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjsubah}(h]h ]h"]h$]h&]jjuh1jhjAshhhjRshM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj=shhhjRshM ubah}(h]j8sah ](jjeh"]h$]h&]jj)jhuh1jhjRshM hj:shhubj)}(hhh]h)}(hDuplicate a drm_edid containerh]hDuplicate a drm_edid container}(hjvthhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjsthhubah}(h]h ]h"]h$]h&]uh1jhj:shhhjRshM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjtjjtjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const struct drm_edid *drm_edid`` EDID to duplicate **Description** The returned pointer must be freed using drm_edid_free(). **Return** drm_edid container copy, or NULL on errorsh](h)}(h**Parameters**h]j%)}(hjth]h Parameters}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjtubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjtubji)}(hhh]jn)}(h6``const struct drm_edid *drm_edid`` EDID to duplicate h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjth]hconst struct drm_edid *drm_edid}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjtubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjtubj)}(hhh]h)}(hEDID to duplicateh]hEDID to duplicate}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhjthM hjtubah}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jmhjthM hjtubah}(h]h ]h"]h$]h&]uh1jhhjtubh)}(h**Description**h]j%)}(hjth]h Description}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjtubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjtubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjtubh)}(h **Return**h]j%)}(hjuh]hReturn}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjuubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjtubh)}(h*drm_edid container copy, or NULL on errorsh]h*drm_edid container copy, or NULL on errors}(hj/uhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjtubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_free (C function)c.drm_edid_freehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h4void drm_edid_free (const struct drm_edid *drm_edid)h]j)}(h3void drm_edid_free(const struct drm_edid *drm_edid)h](j)}(hvoidh]hvoid}(hj^uhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZuhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjmuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZuhhhjluhM ubj)}(h drm_edid_freeh]j)}(h drm_edid_freeh]h drm_edid_free}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{uubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZuhhhjluhM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(hjh]hstruct}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjumodnameN classnameNjj)}j]j)}jjusbc.drm_edid_freeasbuh1hhjuubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubj+)}(hj9h]h*}(hjvhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjuubj)}(hdrm_edidh]hdrm_edid}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjuubah}(h]h ]h"]h$]h&]jjuh1jhjZuhhhjluhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjVuhhhjluhM ubah}(h]jQuah ](jjeh"]h$]h&]jj)jhuh1jhjluhM hjSuhhubj)}(hhh]h)}(hFree the drm_edid containerh]hFree the drm_edid container}(hj9vhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj6vhhubah}(h]h ]h"]h$]h&]uh1jhjSuhhhjluhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjQvjjQvjjjuh1jhhhj`hNhNubj)}(hB**Parameters** ``const struct drm_edid *drm_edid`` EDID to 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drm_connectorh]h drm_connector}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjxmodnameN classnameNjj)}j]jxc.drm_get_edidasbuh1hhjxubj)}(h h]h }(hj yhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubj+)}(hj9h]h*}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjxubj)}(h connectorh]h connector}(hj%yhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hj>yhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:yubj)}(h h]h }(hjKyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:yubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hj\yhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjYyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj^ymodnameN classnameNjj)}j]jxc.drm_get_edidasbuh1hhj:yubj)}(h h]h }(hjzyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:yubj+)}(hj9h]h*}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj:yubj)}(hadapterh]hadapter}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:yubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjxubeh}(h]h ]h"]h$]h&]jjuh1jhjPxhhhjaxhM# ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjLxhhhjaxhM# ubah}(h]jGxah ](jjeh"]h$]h&]jj)jhuh1jhjaxhM# hjIxhhubj)}(hhh]h)}(hget EDID data, if availableh]hget EDID data, if available}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM# hjyhhubah}(h]h ]h"]h$]h&]uh1jhjIxhhhjaxhM# ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjyjjyjjjuh1jhhhj`hNhNubj)}(hXB**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Poke the given I2C channel to grab EDID data if possible. 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If found, attach it to the connector.h]h`Poke the given I2C channel to grab EDID data if possible. If found, attach it to the connector.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM& hjyubh)}(h **Return**h]j%)}(hjzh]hReturn}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM) hjyubh)}(h6Pointer to valid EDID or NULL if we couldn't find any.h]h8Pointer to valid EDID or NULL if we couldn’t find any.}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM* hjyubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_edid_read_custom (C function)c.drm_edid_read_customhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hwconst struct drm_edid * drm_edid_read_custom (struct drm_connector *connector, read_block_fn read_block, void *context)h]j)}(huconst struct drm_edid *drm_edid_read_custom(struct drm_connector *connector, read_block_fn read_block, void *context)h](j)}(hjUh]hconst}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM> ubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjzhM> ubj)}(hjh]hstruct}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjzhM> ubj)}(h h]h }(hj {hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjzhM> ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{modnameN classnameNjj)}j]j)}jdrm_edid_read_customsbc.drm_edid_read_customasbuh1hhjzhhhjzhM> ubj)}(h h]h }(hj;{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzhhhjzhM> ubj+)}(hj9h]h*}(hjI{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjzhhhjzhM> ubj)}(hdrm_edid_read_customh]j)}(hj8{h]hdrm_edid_read_custom}(hjZ{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjV{ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjzhhhjzhM> ubj)}(hJ(struct drm_connector *connector, read_block_fn read_block, void *context)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hju{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq{ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq{ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{modnameN classnameNjj)}j]j6{c.drm_edid_read_customasbuh1hhjq{ubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq{ubj+)}(hj9h]h*}(hj{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjq{ubj)}(h connectorh]h connector}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjq{ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjm{ubj)}(hread_block_fn read_blockh](h)}(hhh]j)}(h read_block_fnh]h read_block_fn}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{modnameN classnameNjj)}j]j6{c.drm_edid_read_customasbuh1hhj{ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubj)}(h read_blockh]h read_block}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjm{ubj)}(h void *contexth](j)}(hvoidh]hvoid}(hj-|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)|ubj)}(h h]h }(hj;|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)|ubj+)}(hj9h]h*}(hjI|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj)|ubj)}(hcontexth]hcontext}(hjV|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjm{ubeh}(h]h ]h"]h$]h&]jjuh1jhjzhhhjzhM> ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjzhhhjzhM> ubah}(h]jzah ](jjeh"]h$]h&]jj)jhuh1jhjzhM> hjzhhubj)}(hhh]h)}(h3Read EDID data using given EDID block read functionh]h3Read EDID data using given EDID block read function}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM> hj}|hhubah}(h]h ]h"]h$]h&]uh1jhjzhhhjzhM> ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj|jj|jjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` Connector to use ``read_block_fn read_block`` EDID block read function ``void *context`` Private data passed to the block read function **Description** When the I2C adapter connected to the DDC bus is hidden behind a device that exposes a different interface to read EDID blocks this function can be used to get EDID data using a custom block read function. As in the general case the DDC bus is accessible by the kernel at the I2C level, drivers must make all reasonable efforts to expose it as an I2C adapter and use drm_edid_read() or drm_edid_read_ddc() instead of abusing this function. The EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads. The returned pointer must be freed using drm_edid_free(). **Return** Pointer to EDID, or NULL if probe/read failed.h](h)}(h**Parameters**h]j%)}(hj|h]h Parameters}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMB hj|ubji)}(hhh](jn)}(h5``struct drm_connector *connector`` Connector to use h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj|h]hstruct drm_connector *connector}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM? hj|ubj)}(hhh]h)}(hConnector to useh]hConnector to use}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj|hM? hj|ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj|hM? hj|ubjn)}(h6``read_block_fn read_block`` EDID block read function h](jt)}(h``read_block_fn read_block``h]jz)}(hj|h]hread_block_fn read_block}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj|ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM@ hj|ubj)}(hhh]h)}(hEDID block read functionh]hEDID block read function}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hM@ hj}ubah}(h]h ]h"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]uh1jmhj}hM@ hj|ubjn)}(hA``void *context`` Private data passed to the block read function h](jt)}(h``void *context``h]jz)}(hj3}h]h void *context}(hj5}hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1}ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMA hj-}ubj)}(hhh]h)}(h.Private data passed to the block read functionh]h.Private data passed to the block read function}(hjL}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjH}hMA hjI}ubah}(h]h ]h"]h$]h&]uh1jhj-}ubeh}(h]h ]h"]h$]h&]uh1jmhjH}hMA hj|ubeh}(h]h ]h"]h$]h&]uh1jhhj|ubh)}(h**Description**h]j%)}(hjn}h]h Description}(hjp}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjl}ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMC hj|ubh)}(hWhen the I2C adapter connected to the DDC bus is hidden behind a device that exposes a different interface to read EDID blocks this function can be used to get EDID data using a custom block read function.h]hWhen the I2C adapter connected to the DDC bus is hidden behind a device that exposes a different interface to read EDID blocks this function can be used to get EDID data using a custom block read function.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMB hj|ubh)}(hAs in the general case the DDC bus is accessible by the kernel at the I2C level, drivers must make all reasonable efforts to expose it as an I2C adapter and use drm_edid_read() or drm_edid_read_ddc() instead of abusing this function.h]hAs in the general case the DDC bus is accessible by the kernel at the I2C level, drivers must make all reasonable efforts to expose it as an I2C adapter and use drm_edid_read() or drm_edid_read_ddc() instead of abusing this function.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMF hj|ubh)}(hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.h]hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMK hj|ubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMO hj|ubh)}(h **Return**h]j%)}(hj}h]hReturn}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMQ hj|ubh)}(h.Pointer to EDID, or NULL if probe/read failed.h]h.Pointer to EDID, or NULL if probe/read failed.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMR hj|ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_read_ddc (C function)c.drm_edid_read_ddchNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hhconst struct drm_edid * drm_edid_read_ddc (struct drm_connector *connector, struct i2c_adapter *adapter)h]j)}(hfconst struct drm_edid *drm_edid_read_ddc(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hjUh]hconst}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMl ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhj~hMl ubj)}(hjh]hstruct}(hj#~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhj~hMl ubj)}(h h]h }(hj0~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhj~hMl ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjA~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>~ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjC~modnameN classnameNjj)}j]j)}jdrm_edid_read_ddcsbc.drm_edid_read_ddcasbuh1hhj~hhhj~hMl ubj)}(h h]h }(hjb~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhj~hMl ubj+)}(hj9h]h*}(hjp~hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~hhhj~hMl ubj)}(hdrm_edid_read_ddch]j)}(hj_~h]hdrm_edid_read_ddc}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}~ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj~hhhj~hMl ubj)}(h>(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj~modnameN classnameNjj)}j]j]~c.drm_edid_read_ddcasbuh1hhj~ubj)}(h h]h }(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj+)}(hj9h]h*}(hj~hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~ubj)}(h connectorh]h connector}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj,modnameN classnameNjj)}j]j]~c.drm_edid_read_ddcasbuh1hhjubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjVhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hadapterh]hadapter}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubeh}(h]h ]h"]h$]h&]jjuh1jhj~hhhj~hMl ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj}hhhj~hMl ubah}(h]j}ah ](jjeh"]h$]h&]jj)jhuh1jhj~hMl hj}hhubj)}(hhh]h)}(h&Read EDID data using given I2C adapterh]h&Read EDID data using given I2C adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMl hjhhubah}(h]h ]h"]h$]h&]uh1jhj}hhhj~hMl ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hX~**Parameters** ``struct drm_connector *connector`` Connector to use ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Read EDID using the given I2C adapter. The EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads. Prefer initializing connector->ddc with drm_connector_init_with_ddc() and using drm_edid_read() instead of this function. The returned pointer must be freed using drm_edid_free(). **Return** Pointer to EDID, or NULL if probe/read failed.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMp hjubji)}(hhh](jn)}(h5``struct drm_connector *connector`` Connector to use h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMm hjubj)}(hhh]h)}(hConnector to useh]hConnector to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMm hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMm hjubjn)}(h;``struct i2c_adapter *adapter`` I2C adapter to use for DDC h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjh]hstruct i2c_adapter *adapter}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMn hjubj)}(hhh]h)}(hI2C adapter to use for DDCh]hI2C adapter to use for DDC}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMn hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMn hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjBh]h Description}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj@ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMp hjubh)}(h&Read EDID using the given I2C adapter.h]h&Read EDID using the given I2C adapter.}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMo hjubh)}(hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.h]hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMq hjubh)}(hyPrefer initializing connector->ddc with drm_connector_init_with_ddc() and using drm_edid_read() instead of this function.h]hyPrefer initializing connector->ddc with drm_connector_init_with_ddc() and using drm_edid_read() instead of this function.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMu hjubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMx hjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMz hjubh)}(h.Pointer to EDID, or NULL if probe/read failed.h]h.Pointer to EDID, or NULL if probe/read failed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM{ hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_read (C function)c.drm_edid_readhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hGconst struct drm_edid * drm_edid_read (struct drm_connector *connector)h]j)}(hEconst struct drm_edid *drm_edid_read(struct drm_connector *connector)h](j)}(hjUh]hconst}(hjۀhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׀hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׀hhhjhM ubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׀hhhjhM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׀hhhjhM ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j drm_edid_readsbc.drm_edid_readasbuh1hhj׀hhhjhM ubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj׀hhhjhM ubj+)}(hj9h]h*}(hjDhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj׀hhhjhM ubj)}(h drm_edid_readh]j)}(hj3h]h drm_edid_read}(hjUhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubah}(h]h ](jjeh"]h$]h&]jjuh1jhj׀hhhjhM ubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j1c.drm_edid_readasbuh1hhjlubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjlubj)}(h connectorh]h connector}(hjǁhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubah}(h]h ]h"]h$]h&]jjuh1jhj׀hhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjӀhhhjhM ubah}(h]j΀ah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjЀhhubj)}(hhh]h)}(h,Read EDID data using connector's I2C adapterh]h.Read EDID data using connector’s I2C adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjЀhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` Connector to use **Description** Read EDID using the connector's I2C adapter. The EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads. The returned pointer must be freed using drm_edid_free(). **Return** Pointer to EDID, or NULL if probe/read failed.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj ubji)}(hhh]jn)}(h5``struct drm_connector *connector`` Connector to use h](jt)}(h#``struct drm_connector *connector``h]jz)}(hj2h]hstruct drm_connector *connector}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj,ubj)}(hhh]h)}(hConnector to useh]hConnector to use}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjGhM hjHubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhjGhM hj)ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjmh]h Description}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjkubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj ubh)}(h,Read EDID using the connector's I2C adapter.h]h.Read EDID using the connector’s I2C adapter.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj ubh)}(hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.h]hThe EDID may be overridden using debugfs override_edid or firmware EDID (drm_edid_load_firmware() and drm.edid_firmware parameter), in this priority order. Having either of them bypasses actual EDID reads.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj ubh)}(h9The returned pointer must be freed using drm_edid_free().h]h9The returned pointer must be freed using drm_edid_free().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj ubh)}(h.Pointer to EDID, or NULL if probe/read failed.h]h.Pointer to EDID, or NULL if probe/read failed.}(hjȂhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_edid_get_product_id (C function)c.drm_edid_get_product_idhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h^void drm_edid_get_product_id (const struct drm_edid *drm_edid, struct drm_edid_product_id *id)h]j)}(h]void drm_edid_get_product_id(const struct drm_edid *drm_edid, struct drm_edid_product_id *id)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hdrm_edid_get_product_idh]j)}(hdrm_edid_get_product_idh]hdrm_edid_get_product_id}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(hA(const struct drm_edid *drm_edid, struct drm_edid_product_id *id)h](j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(hjh]hstruct}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjomodnameN classnameNjj)}j]j)}jjsbc.drm_edid_get_product_idasbuh1hhj0ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj0ubj)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,ubj)}(hstruct drm_edid_product_id *idh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj΃hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_edid_product_idh]hdrm_edid_product_id}(hj߃hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj܃ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_edid_get_product_idasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hidh]hid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj,ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(h)Get the vendor and product identificationh]h)Get the vendor and product identification}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj?hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjZjjZjjjuh1jhhhj`hNhNubj)}(h~**Parameters** ``const struct drm_edid *drm_edid`` EDID ``struct drm_edid_product_id *id`` Where to place the product idh](h)}(h**Parameters**h]j%)}(hjdh]h Parameters}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjbubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj^ubji)}(hhh](jn)}(h)``const struct drm_edid *drm_edid`` EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj}ubj)}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjzubjn)}(h@``struct drm_edid_product_id *id`` Where to place the product idh](jt)}(h"``struct drm_edid_product_id *id``h]jz)}(hjh]hstruct drm_edid_product_id *id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubj)}(hhh]h)}(hWhere to place the product idh]hWhere to place the product id}(hjՄhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj҄ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjфhM hjzubeh}(h]h ]h"]h$]h&]uh1jhhj^ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_edid_print_product_id (C function)c.drm_edid_print_product_idhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hfvoid drm_edid_print_product_id (struct drm_printer *p, const struct drm_edid_product_id *id, bool raw)h]j)}(hevoid drm_edid_print_product_id(struct drm_printer *p, const struct drm_edid_product_id *id, bool raw)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj$hM ubj)}(hdrm_edid_print_product_idh]j)}(hdrm_edid_print_product_idh]hdrm_edid_print_product_id}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj$hM ubj)}(hG(struct drm_printer *p, const struct drm_edid_product_id *id, bool raw)h](j)}(hstruct drm_printer *ph](j)}(hjh]hstruct}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubh)}(hhh]j)}(h drm_printerh]h drm_printer}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjsmodnameN classnameNjj)}j]j)}jj9sbc.drm_edid_print_product_idasbuh1hhjOubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjOubj)}(hj6h]hp}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjKubj)}(h$const struct drm_edid_product_id *idh](j)}(hjUh]hconst}(hjąhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjхhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj߅hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_edid_product_idh]hdrm_edid_product_id}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_edid_print_product_idasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj)hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hidh]hid}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjKubj)}(hbool rawh](j)}(hjAh]hbool}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(h h]h }(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubj)}(hrawh]hraw}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjKubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjKubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj$hM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj$hM ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj$hM hj hhubj)}(hhh]h)}(h#Print decoded product id to printerh]h#Print decoded product id to printer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj hhhj$hM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``struct drm_printer *p`` drm printer ``const struct drm_edid_product_id *id`` EDID product id ``bool raw`` If true, also print the raw hex **Description** See VESA E-EDID 1.4 section 3.4.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubji)}(hhh](jn)}(h&``struct drm_printer *p`` drm printer h](jt)}(h``struct drm_printer *p``h]jz)}(hjՆh]hstruct drm_printer *p}(hj׆hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjӆubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjφubj)}(hhh]h)}(h drm printerh]h drm printer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjφubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj̆ubjn)}(h9``const struct drm_edid_product_id *id`` EDID product id h](jt)}(h(``const struct drm_edid_product_id *id``h]jz)}(hjh]h$const struct drm_edid_product_id *id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubj)}(hhh]h)}(hEDID product idh]hEDID product id}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj#hM hj$ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj#hM hj̆ubjn)}(h-``bool raw`` If true, also print the raw hex h](jt)}(h ``bool raw``h]jz)}(hjGh]hbool raw}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjAubj)}(hhh]h)}(hIf true, also print the raw hexh]hIf true, also print the raw hex}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hM hj]ubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jmhj\hM hj̆ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubh)}(h See VESA E-EDID 1.4 section 3.4.h]h See VESA E-EDID 1.4 section 3.4.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_edid_get_panel_id (C function)c.drm_edid_get_panel_idhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h;u32 drm_edid_get_panel_id (const struct drm_edid *drm_edid)h]j)}(h:u32 drm_edid_get_panel_id(const struct drm_edid *drm_edid)h](h)}(hhh]j)}(hu32h]hu32}(hjʇhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLJubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj̇modnameN classnameNjj)}j]j)}jdrm_edid_get_panel_idsbc.drm_edid_get_panel_idasbuh1hhjÇhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjÇhhhjhM ubj)}(hdrm_edid_get_panel_idh]j)}(hjh]hdrm_edid_get_panel_id}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjÇhhhjhM ubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjTmodnameN classnameNjj)}j]jc.drm_edid_get_panel_idasbuh1hhjubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj~hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjÇhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(hGet a panel's ID from EDIDh]hGet a panel’s ID from EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj͈jj͈jjjuh1jhhhj`hNhNubj)}(hXz**Parameters** ``const struct drm_edid *drm_edid`` EDID that contains panel ID. **Description** This function uses the first block of the EDID of a panel and (assuming that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's supposed to be different for each different modem of panel. **Return** A 32-bit ID that should be different for each make/model of panel. See the functions drm_edid_encode_panel_id() and drm_edid_decode_panel_id() for some details on the structure of this ID. Return 0 if the EDID size is less than a base block.h](h)}(h**Parameters**h]j%)}(hj׈h]h Parameters}(hjوhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjՈubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjшubji)}(hhh]jn)}(hA``const struct drm_edid *drm_edid`` EDID that contains panel ID. h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubj)}(hhh]h)}(hEDID that contains panel ID.h]hEDID that contains panel ID.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hM hjubah}(h]h ]h"]h$]h&]uh1jhhjшubh)}(h**Description**h]j%)}(hj1h]h Description}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjшubh)}(hXThis function uses the first block of the EDID of a panel and (assuming that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's supposed to be different for each different modem of panel.h]hXThis function uses the first block of the EDID of a panel and (assuming that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that’s supposed to be different for each different modem of panel.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjшubh)}(h **Return**h]j%)}(hjXh]hReturn}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjVubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjшubh)}(hA 32-bit ID that should be different for each make/model of panel. See the functions drm_edid_encode_panel_id() and drm_edid_decode_panel_id() for some details on the structure of this ID. Return 0 if the EDID size is less than a base block.h]hA 32-bit ID that should be different for each make/model of panel. See the functions drm_edid_encode_panel_id() and drm_edid_decode_panel_id() for some details on the structure of this ID. Return 0 if the EDID size is less than a base block.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjшubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_edid_read_base_block (C function)c.drm_edid_read_base_blockhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hNconst struct drm_edid * drm_edid_read_base_block (struct i2c_adapter *adapter)h]j)}(hLconst struct drm_edid *drm_edid_read_base_block(struct i2c_adapter *adapter)h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj)}(h h]h }(hjƉhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hj׉hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjԉubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjىmodnameN classnameNjj)}j]j)}jdrm_edid_read_base_blocksbc.drm_edid_read_base_blockasbuh1hhjhhhjhM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhM ubj)}(hdrm_edid_read_base_blockh]j)}(hjh]hdrm_edid_read_base_block}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM ubj)}(h(struct i2c_adapter *adapter)h]j)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjRmodnameN classnameNjj)}j]jc.drm_edid_read_base_blockasbuh1hhj.ubj)}(h h]h }(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj+)}(hj9h]h*}(hj|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj.ubj)}(hadapterh]hadapter}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj*ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjhhubj)}(hhh]h)}(hGet a panel's EDID base blockh]hGet a panel’s EDID base block}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjˊjjˊjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** This function returns the drm_edid containing the first block of the EDID of a panel. This function is intended to be used during early probing on devices where more than one panel might be present. Because of its intended use it must assume that the EDID of the panel is correct, at least as far as the base block is concerned (in other words, we don't process any overrides here). Caller should call drm_edid_free() after use. **NOTE** it's expected that this function and drm_do_get_edid() will both be read the EDID, but there is no caching between them. Since we're only reading the first block, hopefully this extra overhead won't be too big. WARNING: Only use this function when the connector is unknown. For example, during the early probe of panel. The EDID read from the function is temporary and should be replaced by the full EDID returned from other drm_edid_read. **Return** Pointer to allocated EDID base block, or NULL on any failure.h](h)}(h**Parameters**h]j%)}(hjՊh]h Parameters}(hj׊hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjӊubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubji)}(hhh]jn)}(h;``struct i2c_adapter *adapter`` I2C adapter to use for DDC h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjh]hstruct i2c_adapter *adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubj)}(hhh]h)}(hI2C adapter to use for DDCh]hI2C adapter to use for DDC}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hM hj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hM hjubah}(h]h ]h"]h$]h&]uh1jhhjϊubh)}(h**Description**h]j%)}(hj/h]h Description}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj-ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(hUThis function returns the drm_edid containing the first block of the EDID of a panel.h]hUThis function returns the drm_edid containing the first block of the EDID of a panel.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(hX(This function is intended to be used during early probing on devices where more than one panel might be present. Because of its intended use it must assume that the EDID of the panel is correct, at least as far as the base block is concerned (in other words, we don't process any overrides here).h]hX*This function is intended to be used during early probing on devices where more than one panel might be present. Because of its intended use it must assume that the EDID of the panel is correct, at least as far as the base block is concerned (in other words, we don’t process any overrides here).}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(h-Caller should call drm_edid_free() after use.h]h-Caller should call drm_edid_free() after use.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(h**NOTE**h]j%)}(hjth]hNOTE}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(hit's expected that this function and drm_do_get_edid() will both be read the EDID, but there is no caching between them. Since we're only reading the first block, hopefully this extra overhead won't be too big.h]hit’s expected that this function and drm_do_get_edid() will both be read the EDID, but there is no caching between them. Since we’re only reading the first block, hopefully this extra overhead won’t be too big.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(hWARNING: Only use this function when the connector is unknown. For example, during the early probe of panel. The EDID read from the function is temporary and should be replaced by the full EDID returned from other drm_edid_read.h]hWARNING: Only use this function when the connector is unknown. For example, during the early probe of panel. The EDID read from the function is temporary and should be replaced by the full EDID returned from other drm_edid_read.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubh)}(h=Pointer to allocated EDID base block, or NULL on any failure.h]h=Pointer to allocated EDID base block, or NULL on any failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjϊubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$drm_get_edid_switcheroo (C function)c.drm_get_edid_switcheroohNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hdstruct edid * drm_get_edid_switcheroo (struct drm_connector *connector, struct i2c_adapter *adapter)h]j)}(hbstruct edid *drm_get_edid_switcheroo(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM8 ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM8 ubh)}(hhh]j)}(hedidh]hedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_get_edid_switcheroosbc.drm_get_edid_switcherooasbuh1hhjhhhjhM8 ubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM8 ubj+)}(hj9h]h*}(hj=hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhM8 ubj)}(hdrm_get_edid_switcherooh]j)}(hj,h]hdrm_get_edid_switcheroo}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM8 ubj)}(h>(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j*c.drm_get_edid_switcherooasbuh1hhjeubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjaubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjٌhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjՌubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjՌubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j*c.drm_get_edid_switcherooasbuh1hhjՌubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjՌubj+)}(hj9h]h*}(hj#hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjՌubj)}(hadapterh]hadapter}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjՌubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjaubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM8 ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM8 ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM8 hjhhubj)}(hhh]h)}(h)get EDID data for a vga_switcheroo outputh]h)get EDID data for a vga_switcheroo output}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM8 hjWhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM8 ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjrjjrjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Wrapper around drm_get_edid() for laptops with dual GPUs using one set of outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily switch DDC to the GPU which is retrieving EDID. **Return** Pointer to valid EDID or ``NULL`` if we couldn't find any.h](h)}(h**Parameters**h]j%)}(hj|h]h Parameters}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM< hjvubji)}(hhh](jn)}(h<``struct drm_connector *connector`` connector we're probing h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM9 hjubj)}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM9 hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM9 hjubjn)}(h;``struct i2c_adapter *adapter`` I2C adapter to use for DDC h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjԍh]hstruct i2c_adapter *adapter}(hj֍hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjҍubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM: hj΍ubj)}(hhh]h)}(hI2C adapter to use for DDCh]hI2C adapter to use for DDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM: hjubah}(h]h ]h"]h$]h&]uh1jhj΍ubeh}(h]h ]h"]h$]h&]uh1jmhjhM: hjubeh}(h]h ]h"]h$]h&]uh1jhhjvubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM< hjvubh)}(hWrapper around drm_get_edid() for laptops with dual GPUs using one set of outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily switch DDC to the GPU which is retrieving EDID.h]hWrapper around drm_get_edid() for laptops with dual GPUs using one set of outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily switch DDC to the GPU which is retrieving EDID.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM; hjvubh)}(h **Return**h]j%)}(hj6h]hReturn}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM? hjvubh)}(h:Pointer to valid EDID or ``NULL`` if we couldn't find any.h](hPointer to valid EDID or }(hjLhhhNhNubjz)}(h``NULL``h]hNULL}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjLubh if we couldn’t find any.}(hjLhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM@ hjvubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_edid_read_switcheroo (C function)c.drm_edid_read_switcheroohNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hoconst struct drm_edid * drm_edid_read_switcheroo (struct drm_connector *connector, struct i2c_adapter *adapter)h]j)}(hmconst struct drm_edid *drm_edid_read_switcheroo(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMU ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMU ubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMU ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMU ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjǎhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĎubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjɎmodnameN classnameNjj)}j]j)}jdrm_edid_read_switcheroosbc.drm_edid_read_switcherooasbuh1hhjhhhjhMU ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMU ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhMU ubj)}(hdrm_edid_read_switcherooh]j)}(hjh]hdrm_edid_read_switcheroo}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMU ubj)}(h>(struct drm_connector *connector, struct i2c_adapter *adapter)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjBmodnameN classnameNjj)}j]jc.drm_edid_read_switcherooasbuh1hhjubj)}(h h]h }(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjlhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_edid_read_switcherooasbuh1hhjubj)}(h h]h }(hjΏhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj܏hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hadapterh]hadapter}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMU ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMU ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMU hjhhubj)}(hhh]h)}(h)get EDID data for a vga_switcheroo outputh]h)get EDID data for a vga_switcheroo output}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMU hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMU ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct i2c_adapter *adapter`` I2C adapter to use for DDC **Description** Wrapper around drm_edid_read_ddc() for laptops with dual GPUs using one set of outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily switch DDC to the GPU which is retrieving EDID. **Return** Pointer to valid EDID or ``NULL`` if we couldn't find any.h](h)}(h**Parameters**h]j%)}(hj5h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMY hj/ubji)}(hhh](jn)}(h<``struct drm_connector *connector`` connector we're probing h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjTh]hstruct drm_connector *connector}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMV hjNubj)}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihMV hjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjihMV hjKubjn)}(h;``struct i2c_adapter *adapter`` I2C adapter to use for DDC h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjh]hstruct i2c_adapter *adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMW hjubj)}(hhh]h)}(hI2C adapter to use for DDCh]hI2C adapter to use for DDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMW hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMW hjKubeh}(h]h ]h"]h$]h&]uh1jhhj/ubh)}(h**Description**h]j%)}(hjȐh]h Description}(hjʐhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjƐubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMY hj/ubh)}(hWrapper around drm_edid_read_ddc() for laptops with dual GPUs using one set of outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily switch DDC to the GPU which is retrieving EDID.h]hWrapper around drm_edid_read_ddc() for laptops with dual GPUs using one set of outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily switch DDC to the GPU which is retrieving EDID.}(hjސhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMX hj/ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM\ hj/ubh)}(h:Pointer to valid EDID or ``NULL`` if we couldn't find any.h](hPointer to valid EDID or }(hjhhhNhNubjz)}(h``NULL``h]hNULL}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh if we couldn’t find any.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM] hj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_duplicate (C function)c.drm_edid_duplicatehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h:struct edid * drm_edid_duplicate (const struct edid *edid)h]j)}(h8struct edid *drm_edid_duplicate(const struct edid *edid)h](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMr ubj)}(h h]h }(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhjShMr ubh)}(hhh]j)}(hedidh]hedid}(hjehhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjgmodnameN classnameNjj)}j]j)}jdrm_edid_duplicatesbc.drm_edid_duplicateasbuh1hhjBhhhjShMr ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBhhhjShMr ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBhhhjShMr ubj)}(hdrm_edid_duplicateh]j)}(hjh]hdrm_edid_duplicate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjBhhhjShMr ubj)}(h(const struct edid *edid)h]j)}(hconst struct edid *edidh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj͑hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjۑhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hedidh]hedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_edid_duplicateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hedidh]hedid}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjBhhhjShMr ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj>hhhjShMr ubah}(h]j9ah ](jjeh"]h$]h&]jj)jhuh1jhjShMr hj;hhubj)}(hhh]h)}(h$duplicate an EDID and the extensionsh]h$duplicate an EDID and the extensions}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMr hjYhhubah}(h]h ]h"]h$]h&]uh1jhj;hhhjShMr ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjtjjtjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const struct edid *edid`` EDID to duplicate **Return** Pointer to duplicated EDID or NULL on allocation failure.h](h)}(h**Parameters**h]j%)}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMv hjxubji)}(hhh]jn)}(h.``const struct edid *edid`` EDID to duplicate h](jt)}(h``const struct edid *edid``h]jz)}(hjh]hconst struct edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMs hjubj)}(hhh]h)}(hEDID to duplicateh]hEDID to duplicate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMs hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMs hjubah}(h]h ]h"]h$]h&]uh1jhhjxubh)}(h **Return**h]j%)}(hjؒh]hReturn}(hjڒhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj֒ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMu hjxubh)}(h9Pointer to duplicated EDID or NULL on allocation failure.h]h9Pointer to duplicated EDID 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*to_match)h]j)}(h'const struct drm_display_mode *to_matchh](j)}(hjUh]hconst}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j<c.drm_match_cea_modeasbuh1hhjkubj)}(h h]h }(hjƓhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubj+)}(hj9h]h*}(hjԓhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjkubj)}(hto_matchh]hto_match}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjkubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjgubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjAhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjAhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjAhMhjhhubj)}(hhh]h)}(h'look for a CEA mode matching given modeh]h'look for a CEA mode matching given mode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjAhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj#jj#jjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const struct drm_display_mode *to_match`` display mode **Return** The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 mode.h](h)}(h**Parameters**h]j%)}(hj-h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj+ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj'ubji)}(hhh]jn)}(h9``const struct drm_display_mode *to_match`` display mode h](jt)}(h+``const struct drm_display_mode *to_match``h]jz)}(hjLh]h'const struct drm_display_mode *to_match}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjFubj)}(hhh]h)}(h display modeh]h display mode}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjbubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jmhjahMhjCubah}(h]h ]h"]h$]h&]uh1jhhj'ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj'ubh)}(hCThe CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 mode.h]hEThe CEA Video ID (VIC) of the mode or 0 if it isn’t a CEA-861 mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_display_mode_from_cea_vic (C function)c.drm_display_mode_from_cea_vichNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h_struct drm_display_mode * drm_display_mode_from_cea_vic (struct drm_device *dev, u8 video_code)h]j)}(h]struct drm_display_mode *drm_display_mode_from_cea_vic(struct drm_device *dev, u8 video_code)h](j)}(hjh]hstruct}(hj̔hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȔhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hjڔhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȔhhhjٔhMubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_display_mode_from_cea_vicsbc.drm_display_mode_from_cea_vicasbuh1hhjȔhhhjٔhMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȔhhhjٔhMubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjȔhhhjٔhMubj)}(hdrm_display_mode_from_cea_vich]j)}(hj h]hdrm_display_mode_from_cea_vic}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj'ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjȔhhhjٔhMubj)}(h'(struct drm_device *dev, u8 video_code)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjfmodnameN classnameNjj)}j]jc.drm_display_mode_from_cea_vicasbuh1hhjBubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubj)}(h u8 video_codeh](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_display_mode_from_cea_vicasbuh1hhjubj)}(h h]h }(hjוhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h video_codeh]h video_code}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj>ubeh}(h]h ]h"]h$]h&]jjuh1jhjȔhhhjٔhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjĔhhhjٔhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjٔhMhjhhubj)}(hhh]h)}(hreturn a mode for CEA VICh]hreturn a mode for CEA VIC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjٔhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj'jj'jjjuh1jhhhj`hNhNubj)}(h**Parameters** ``struct drm_device *dev`` DRM device ``u8 video_code`` CEA VIC of the mode **Description** Creates a new mode matching the specified CEA VIC. **Return** A new drm_display_mode on success or NULL on failureh](h)}(h**Parameters**h]j%)}(hj1h]h Parameters}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj/ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj+ubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjPh]hstruct drm_device *dev}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjNubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjJubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhjehMhjfubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhjehMhjGubjn)}(h&``u8 video_code`` CEA VIC of the mode h](jt)}(h``u8 video_code``h]jz)}(hjh]h u8 video_code}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(hCEA VIC of the modeh]hCEA VIC of the mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjGubeh}(h]h ]h"]h$]h&]uh1jhhj+ubh)}(h**Description**h]j%)}(hjĖh]h Description}(hjƖhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj–ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj+ubh)}(h2Creates a new mode matching the specified CEA VIC.h]h2Creates a new mode matching the specified CEA VIC.}(hjږhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj+ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj+ubh)}(h4A new drm_display_mode on success or NULL on failureh]h4A new drm_display_mode on success or NULL on failure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj+ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_edid_match (C function)c.drm_edid_matchhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hYbool drm_edid_match (const struct drm_edid *drm_edid, const struct drm_edid_ident *ident)h]j)}(hXbool drm_edid_match(const struct drm_edid *drm_edid, const struct drm_edid_ident *ident)h](j)}(hjAh]hbool}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj=hMubj)}(hdrm_edid_matchh]j)}(hdrm_edid_matchh]hdrm_edid_match}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ](jjeh"]h$]h&]jjuh1jhj,hhhj=hMubj)}(hE(const struct drm_edid *drm_edid, const struct drm_edid_ident *ident)h](j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjRsbc.drm_edid_matchasbuh1hhjhubj)}(h h]h }(hjŗhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubj+)}(hj9h]h*}(hjӗhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhubj)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubj)}(h"const struct drm_edid_ident *identh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_edid_identh]hdrm_edid_ident}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj4modnameN classnameNjj)}j]jc.drm_edid_matchasbuh1hhjubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj^hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hidenth]hident}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjdubeh}(h]h ]h"]h$]h&]jjuh1jhj,hhhj=hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj(hhhj=hMubah}(h]j#ah ](jjeh"]h$]h&]jj)jhuh1jhj=hMhj%hhubj)}(hhh]h)}(h"match drm_edid with given identityh]h"match drm_edid with given identity}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj%hhhj=hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``const struct drm_edid *drm_edid`` EDID ``const struct drm_edid_ident *ident`` the EDID identity to match with **Description** Check if the EDID matches with the given identity. **Return** True if the given identity matched with EDID, false otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubji)}(hhh](jn)}(h)``const struct drm_edid *drm_edid`` EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hj֘h]hconst struct drm_edid *drm_edid}(hjؘhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjԘubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjИubj)}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjИubeh}(h]h ]h"]h$]h&]uh1jmhjhMhj͘ubjn)}(hG``const struct drm_edid_ident *ident`` the EDID identity to match with h](jt)}(h&``const struct drm_edid_ident *ident``h]jz)}(hjh]h"const struct drm_edid_ident *ident}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj ubj)}(hhh]h)}(hthe EDID identity to match withh]hthe EDID identity to match with}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hMhj͘ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h2Check if the EDID matches with the given identity.h]h2Check if the EDID matches with the given identity.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h **Return**h]j%)}(hjqh]hReturn}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h>True if the given identity matched with EDID, false otherwise.h]h>True if the given identity matched with EDID, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_edid_get_monitor_name (C function)c.drm_edid_get_monitor_namehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hQvoid drm_edid_get_monitor_name (const struct edid *edid, char *name, int bufsize)h]j)}(hPvoid drm_edid_get_monitor_name(const struct edid *edid, char *name, int bufsize)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hjřhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjęhMubj)}(hdrm_edid_get_monitor_nameh]j)}(hdrm_edid_get_monitor_nameh]hdrm_edid_get_monitor_name}(hjיhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjәubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjęhMubj)}(h2(const struct edid *edid, char *name, int bufsize)h](j)}(hconst struct edid *edidh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hedidh]hedid}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j)}jjٙsbc.drm_edid_get_monitor_nameasbuh1hhjubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjZhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hedidh]hedid}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h char *nameh](j)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj)}(hnameh]hname}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h int bufsizeh](j)}(hinth]hint}(hjšhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjКhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hbufsizeh]hbufsize}(hjޚhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjęhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjęhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjęhMhjhhubj)}(hhh]h)}(h$fetch the monitor name from the edidh]h$fetch the monitor name from the edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjęhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj jj jjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const struct edid *edid`` monitor EDID information ``char *name`` pointer to a character array to hold the name of the monitor ``int bufsize`` The size of the name buffer (should be at least 14 chars.)h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj(ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj$ubji)}(hhh](jn)}(h5``const struct edid *edid`` monitor EDID information h](jt)}(h``const struct edid *edid``h]jz)}(hjIh]hconst struct edid *edid}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjGubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjCubj)}(hhh]h)}(hmonitor EDID informationh]hmonitor EDID information}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hMhj_ubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jmhj^hMhj@ubjn)}(hL``char *name`` pointer to a character array to hold the name of the monitor h](jt)}(h``char *name``h]jz)}(hjh]h char *name}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj|ubj)}(hhh]h)}(h` instead of calling this function. **Return** True if the monitor is HDMI, false if not or unknown.h](h)}(h**Parameters**h]j%)}(hj{h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjuubji)}(hhh]jn)}(h5``const struct edid *edid`` monitor EDID information h](jt)}(h``const struct edid *edid``h]jz)}(hjh]hconst struct edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(hmonitor EDID informationh]hmonitor EDID information}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjuubh)}(h**Description**h]j%)}(hjդh]h Description}(hjפhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjӤubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjuubh)}(h/Parse the CEA extension according to CEA-861-B.h]h/Parse the CEA extension according to CEA-861-B.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjuubh)}(hDrivers that have added the modes parsed from EDID to drm_display_info should use :c:type:`drm_display_info.is_hdmi ` instead of calling this function.h](hRDrivers that have added the modes parsed from EDID to drm_display_info should use }(hjhhhNhNubh)}(h5:c:type:`drm_display_info.is_hdmi `h]jz)}(hjh]hdrm_display_info.is_hdmi}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_display_infouh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh" instead of calling this function.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj!hMhjuubh)}(h **Return**h]j%)}(hj.h]hReturn}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjuubh)}(h5True if the monitor is HDMI, false if not or unknown.h]h5True if the monitor is HDMI, false if not or unknown.}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM!hjuubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_detect_monitor_audio (C function)c.drm_detect_monitor_audiohNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h7bool drm_detect_monitor_audio (const struct edid *edid)h]j)}(h6bool drm_detect_monitor_audio(const struct edid *edid)h](j)}(hjAh]hbool}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMVubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhjhMVubj)}(hdrm_detect_monitor_audioh]j)}(hdrm_detect_monitor_audioh]hdrm_detect_monitor_audio}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjohhhjhMVubj)}(h(const struct edid *edid)h]j)}(hconst struct edid *edidh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjʥhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjץhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hedidh]hedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_detect_monitor_audioasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hedidh]hedid}(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjohhhjhMVubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjkhhhjhMVubah}(h]jfah ](jjeh"]h$]h&]jj)jhuh1jhjhMVhjhhhubj)}(hhh]h)}(hcheck monitor audio capabilityh]hcheck monitor audio capability}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMVhjJhhubah}(h]h ]h"]h$]h&]uh1jhjhhhhjhMVubeh}(h]h ](jfunctioneh"]h$]h&]jjjjejjejjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``const struct edid *edid`` EDID block to scan **Description** Monitor should have CEA extension block. If monitor has 'basic audio', but no CEA audio blocks, it's 'basic audio' only. If there is any audio extension block and supported audio format, assume at least 'basic audio' support, even if 'basic audio' is not defined in EDID. **Return** True if the monitor supports audio, false otherwise.h](h)}(h**Parameters**h]j%)}(hjoh]h Parameters}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMZhjiubji)}(hhh]jn)}(h/``const struct edid *edid`` EDID block to scan h](jt)}(h``const struct edid *edid``h]jz)}(hjh]hconst struct edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMWhjubj)}(hhh]h)}(hEDID block to scanh]hEDID block to scan}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMWhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMWhjubah}(h]h ]h"]h$]h&]uh1jhhjiubh)}(h**Description**h]j%)}(hjɦh]h Description}(hj˦hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjǦubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMYhjiubh)}(hXMonitor should have CEA extension block. If monitor has 'basic audio', but no CEA audio blocks, it's 'basic audio' only. If there is any audio extension block and supported audio format, assume at least 'basic audio' support, even if 'basic audio' is not defined in EDID.h]hX!Monitor should have CEA extension block. If monitor has ‘basic audio’, but no CEA audio blocks, it’s ‘basic audio’ only. If there is any audio extension block and supported audio format, assume at least ‘basic audio’ support, even if ‘basic audio’ is not defined in EDID.}(hjߦhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMXhjiubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM^hjiubh)}(h4True if the monitor supports audio, false otherwise.h]h4True if the monitor supports audio, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM_hjiubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_default_rgb_quant_range (C function)c.drm_default_rgb_quant_rangehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h^enum hdmi_quantization_range drm_default_rgb_quant_range (const struct drm_display_mode *mode)h]j)}(h]enum hdmi_quantization_range drm_default_rgb_quant_range(const struct drm_display_mode *mode)h](j)}(hj8h]henum}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMkubj)}(h h]h }(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhjBhMkubh)}(hhh]j)}(hhdmi_quantization_rangeh]hhdmi_quantization_range}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjQubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjVmodnameN classnameNjj)}j]j)}jdrm_default_rgb_quant_rangesbc.drm_default_rgb_quant_rangeasbuh1hhj1hhhjBhMkubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1hhhjBhMkubj)}(hdrm_default_rgb_quant_rangeh]j)}(hjrh]hdrm_default_rgb_quant_range}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj1hhhjBhMkubj)}(h%(const struct drm_display_mode *mode)h]j)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjʧhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjۧhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjاubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjݧmodnameN classnameNjj)}j]jpc.drm_default_rgb_quant_rangeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhj1hhhjBhMkubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj-hhhjBhMkubah}(h]j(ah ](jjeh"]h$]h&]jj)jhuh1jhjBhMkhj*hhubj)}(hhh]h)}(hdefault RGB quantization rangeh]hdefault RGB quantization range}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMkhj;hhubah}(h]h ]h"]h$]h&]uh1jhj*hhhjBhMkubeh}(h]h ](jfunctioneh"]h$]h&]jjjjVjjVjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const struct drm_display_mode *mode`` display mode **Description** Determine the default RGB quantization range for the mode, as specified in CEA-861. **Return** The default RGB quantization range for the modeh](h)}(h**Parameters**h]j%)}(hj`h]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMohjZubji)}(hhh]jn)}(h5``const struct drm_display_mode *mode`` display mode h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hjh]h#const struct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMlhjyubj)}(hhh]h)}(h display modeh]h display mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMlhjubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjhMlhjvubah}(h]h ]h"]h$]h&]uh1jhhjZubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMnhjZubh)}(hSDetermine the default RGB quantization range for the mode, as specified in CEA-861.h]hSDetermine the default RGB quantization range for the mode, as specified in CEA-861.}(hjШhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMmhjZubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjߨubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMphjZubh)}(h/The default RGB quantization range for the modeh]h/The default RGB quantization range for the mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMqhjZubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_edid_connector_update (C function)c.drm_edid_connector_updatehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h`int drm_edid_connector_update (struct drm_connector *connector, const struct drm_edid *drm_edid)h]j)}(h_int drm_edid_connector_update(struct drm_connector *connector, const struct drm_edid *drm_edid)h](j)}(hinth]hint}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"hhhj4hMubj)}(hdrm_edid_connector_updateh]j)}(hdrm_edid_connector_updateh]hdrm_edid_connector_update}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubah}(h]h ](jjeh"]h$]h&]jjuh1jhj"hhhj4hMubj)}(hB(struct drm_connector *connector, const struct drm_edid *drm_edid)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjIsbc.drm_edid_connector_updateasbuh1hhj_ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj_ubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[ubj)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hjթhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѩubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѩubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѩubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѩubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_edid_connector_updateasbuh1hhjѩubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѩubj+)}(hj9h]h*}(hj:hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjѩubj)}(hdrm_edidh]hdrm_edid}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjѩubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj[ubeh}(h]h ]h"]h$]h&]jjuh1jhj"hhhj4hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj4hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj4hMhjhhubj)}(hhh]h)}(h&Update connector information from EDIDh]h&Update connector information from EDID}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjnhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj4hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` Connector ``const struct drm_edid *drm_edid`` EDID **Description** Update the connector display info, ELD, HDR metadata, relevant properties, etc. from the passed in EDID. If EDID is NULL, reset the information. Must be called before calling drm_edid_connector_add_modes(). **Return** 0 on success, negative error on errors.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubji)}(hhh](jn)}(h.``struct drm_connector *connector`` Connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(h Connectorh]h Connector}(hj˪hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjǪhMhjȪubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjǪhMhjubjn)}(h)``const struct drm_edid *drm_edid`` EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(hEDIDh]hEDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj&h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj$ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(hhUpdate the connector display info, ELD, HDR metadata, relevant properties, etc. from the passed in EDID.h]hhUpdate the connector display info, ELD, HDR metadata, relevant properties, etc. from the passed in EDID.}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h'If EDID is NULL, reset the information.h]h'If EDID is NULL, reset the information.}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h=Must be called before calling drm_edid_connector_add_modes().h]h=Must be called before calling drm_edid_connector_add_modes().}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h **Return**h]j%)}(hjkh]hReturn}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h'0 on success, negative error on errors.h]h'0 on success, negative error on errors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_edid_connector_add_modes (C function)c.drm_edid_connector_add_modeshNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hBint drm_edid_connector_add_modes (struct drm_connector *connector)h]j)}(hAint drm_edid_connector_add_modes(struct drm_connector *connector)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_edid_connector_add_modesh]j)}(hdrm_edid_connector_add_modesh]hdrm_edid_connector_add_modes}(hjѫhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjͫubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h!(struct drm_connector *connector)h]j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jjӫsbc.drm_edid_connector_add_modesasbuh1hhjubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj9hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjFhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h*Update probed modes from the EDID propertyh]h*Update probed modes from the EDID property}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjmhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hXO**Parameters** ``struct drm_connector *connector`` Connector **Description** Add the modes from the previously updated EDID property to the connector probed modes list. drm_edid_connector_update() must have been called before this to update the EDID property. **Return** The number of modes added, or 0 if we couldn't find any.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubji)}(hhh]jn)}(h.``struct drm_connector *connector`` Connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(h Connectorh]h Connector}(hjʬhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjƬhMhjǬubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjƬhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h[Add the modes from the previously updated EDID property to the connector probed modes list.h]h[Add the modes from the previously updated EDID property to the connector probed modes list.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(hZdrm_edid_connector_update() must have been called before this to update the EDID property.h]hZdrm_edid_connector_update() must have been called before this to update the EDID property.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h **Return**h]j%)}(hj"h]hReturn}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h8The number of modes added, or 0 if we couldn't find any.h]h:The number of modes added, or 0 if we couldn’t find any.}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_connector_update_edid_property (C function)$c.drm_connector_update_edid_propertyhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(haint drm_connector_update_edid_property (struct drm_connector *connector, const struct edid *edid)h]j)}(h`int drm_connector_update_edid_property(struct drm_connector *connector, const struct edid *edid)h](j)}(hinth]hint}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjchhhjuhMubj)}(h"drm_connector_update_edid_propertyh]j)}(h"drm_connector_update_edid_propertyh]h"drm_connector_update_edid_property}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjchhhjuhMubj)}(h:(struct drm_connector *connector, const struct edid *edid)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj­hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjĭmodnameN classnameNjj)}j]j)}jjsb$c.drm_connector_update_edid_propertyasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct edid *edidh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hedidh]hedid}(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjLubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjQmodnameN classnameNjj)}j]jޭ$c.drm_connector_update_edid_propertyasbuh1hhjubj)}(h h]h }(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj{hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hedidh]hedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjchhhjuhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj_hhhjuhMubah}(h]jZah ](jjeh"]h$]h&]jj)jhuh1jhjuhMhj\hhubj)}(hhh]h)}(h'update the edid property of a connectorh]h'update the edid property of a connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj\hhhjuhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjʮjjʮjjjuh1jhhhj`hNhNubj)}(hX"**Parameters** ``struct drm_connector *connector`` drm connector ``const struct edid *edid`` new value of the edid property **Description** This function creates a new blob modeset object and assigns its id to the connector's edid property. Since we also parse tile information from EDID's displayID block, we also set the connector's tile property here. See drm_connector_set_tile_property() for more details. This function is deprecated. Use drm_edid_connector_update() instead. **Return** Zero on success, negative errno on failure.h](h)}(h**Parameters**h]j%)}(hjԮh]h Parameters}(hj֮hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjҮubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjήubji)}(hhh](jn)}(h2``struct drm_connector *connector`` drm connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(h drm connectorh]h drm connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h;``const struct edid *edid`` new value of the edid property h](jt)}(h``const struct edid *edid``h]jz)}(hj,h]hconst struct edid *edid}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj&ubj)}(hhh]h)}(hnew value of the edid propertyh]hnew value of the edid property}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhMhjBubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jmhjAhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjήubh)}(h**Description**h]j%)}(hjgh]h Description}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjeubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjήubh)}(hXThis function creates a new blob modeset object and assigns its id to the connector's edid property. Since we also parse tile information from EDID's displayID block, we also set the connector's tile property here. See drm_connector_set_tile_property() for more details.h]hXThis function creates a new blob modeset object and assigns its id to the connector’s edid property. Since we also parse tile information from EDID’s displayID block, we also set the connector’s tile property here. See drm_connector_set_tile_property() for more details.}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjήubh)}(hEThis function is deprecated. Use drm_edid_connector_update() instead.h]hEThis function is deprecated. Use drm_edid_connector_update() instead.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjήubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjήubh)}(h+Zero on success, negative errno on failure.h]h+Zero on success, negative errno on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjήubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_add_edid_modes (C function)c.drm_add_edid_modeshNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hKint drm_add_edid_modes (struct drm_connector *connector, struct edid *edid)h]j)}(hJint drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjޯhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjޯhhhjhMubj)}(hdrm_add_edid_modesh]j)}(hdrm_add_edid_modesh]hdrm_add_edid_modes}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjޯhhhjhMubj)}(h4(struct drm_connector *connector, struct edid *edid)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj?modnameN classnameNjj)}j]j)}jjsbc.drm_add_edid_modesasbuh1hhjubj)}(h h]h }(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjkhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct edid *edidh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hedidh]hedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jYc.drm_add_edid_modesasbuh1hhjubj)}(h h]h }(hjͰhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj۰hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hedidh]hedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjޯhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjگhhhjhMubah}(h]jկah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjׯhhubj)}(hhh]h)}(h&add modes from EDID data, if availableh]h&add modes from EDID data, if available}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjׯhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj*jj*jjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing ``struct edid *edid`` EDID data **Description** Add the specified modes to the connector's mode list. Also fills out the :c:type:`drm_display_info` structure and ELD in **connector** with any information which can be derived from the edid. This function is deprecated. Use drm_edid_connector_add_modes() instead. **Return** The number of modes added or 0 if we couldn't find any.h](h)}(h**Parameters**h]j%)}(hj4h]h Parameters}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj2ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.ubji)}(hhh](jn)}(h<``struct drm_connector *connector`` connector we're probing h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjSh]hstruct drm_connector *connector}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjMubj)}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjhhMhjJubjn)}(h ``struct edid *edid`` EDID data h](jt)}(h``struct edid *edid``h]jz)}(hjh]hstruct edid *edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(h EDID datah]h EDID data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjJubeh}(h]h ]h"]h$]h&]uh1jhhj.ubh)}(h**Description**h]j%)}(hjDZh]h Description}(hjɱhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjűubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.ubh)}(hAdd the specified modes to the connector's mode list. Also fills out the :c:type:`drm_display_info` structure and ELD in **connector** with any information which can be derived from the edid.h](hKAdd the specified modes to the connector’s mode list. Also fills out the }(hjݱhhhNhNubh)}(h:c:type:`drm_display_info`h]jz)}(hjh]hdrm_display_info}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_display_infouh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjݱubh structure and ELD in }(hjݱhhhNhNubj%)}(h **connector**h]h connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjݱubh9 with any information which can be derived from the edid.}(hjݱhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhj.ubh)}(hHThis function is deprecated. Use drm_edid_connector_add_modes() instead.h]hHThis function is deprecated. Use drm_edid_connector_add_modes() instead.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.ubh)}(h **Return**h]j%)}(hj2h]hReturn}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.ubh)}(h7The number of modes added or 0 if we couldn't find any.h]h9The number of modes added or 0 if we couldn’t find any.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj.ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_add_modes_noedid (C function)c.drm_add_modes_noedidhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hhint drm_add_modes_noedid (struct drm_connector *connector, unsigned int hdisplay, unsigned int vdisplay)h]j)}(hgint drm_add_modes_noedid(struct drm_connector *connector, unsigned int hdisplay, unsigned int vdisplay)h](j)}(hinth]hint}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhjhM ubj)}(hdrm_add_modes_noedidh]j)}(hdrm_add_modes_noedidh]hdrm_add_modes_noedid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjshhhjhM ubj)}(hO(struct drm_connector *connector, unsigned int hdisplay, unsigned int vdisplay)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjҲhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjϲubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjԲmodnameN classnameNjj)}j]j)}jjsbc.drm_add_modes_noedidasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hunsigned int hdisplayh](j)}(hunsignedh]hunsigned}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(hinth]hint}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubj)}(hhdisplayh]hhdisplay}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hunsigned int vdisplayh](j)}(hunsignedh]hunsigned}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(hvdisplayh]hvdisplay}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjshhhjhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjohhhjhM ubah}(h]jjah ](jjeh"]h$]h&]jj)jhuh1jhjhM hjlhhubj)}(hhh]h)}(h)add modes for the connectors without EDIDh]h)add modes for the connectors without EDID}(hjٳhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjֳhhubah}(h]h ]h"]h$]h&]uh1jhjlhhhjhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct drm_connector *connector`` connector we're probing ``unsigned int hdisplay`` the horizontal display limit ``unsigned int vdisplay`` the vertical display limit **Description** Add the specified modes to the connector's mode list. Only when the hdisplay/vdisplay is not beyond the given limit, it will be added. **Return** The number of modes added or 0 if we couldn't find any.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubji)}(hhh](jn)}(h<``struct drm_connector *connector`` connector we're probing h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubj)}(hhh]h)}(hconnector we're probingh]hconnector we’re probing}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hM hj0ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj/hM hjubjn)}(h7``unsigned int hdisplay`` the horizontal display limit h](jt)}(h``unsigned int hdisplay``h]jz)}(hjSh]hunsigned int hdisplay}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjQubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjMubj)}(hhh]h)}(hthe horizontal display limith]hthe horizontal display limit}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhMhjiubah}(h]h ]h"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]uh1jmhjhhMhjubjn)}(h5``unsigned int vdisplay`` the vertical display limit h](jt)}(h``unsigned int vdisplay``h]jz)}(hjh]hunsigned int vdisplay}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(hthe vertical display limith]hthe vertical display limit}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjǴh]h Description}(hjɴhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjŴubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(hAdd the specified modes to the connector's mode list. Only when the hdisplay/vdisplay is not beyond the given limit, it will be added.h]hAdd the specified modes to the connector’s mode list. Only when the hdisplay/vdisplay is not beyond the given limit, it will be added.}(hjݴhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h7The number of modes added or 0 if we couldn't find any.h]h9The number of modes added or 0 if we couldn’t find any.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j5drm_hdmi_avi_infoframe_from_display_mode (C function)*c.drm_hdmi_avi_infoframe_from_display_modehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hint drm_hdmi_avi_infoframe_from_display_mode (struct hdmi_avi_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h]j)}(hint drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(hinth]hint}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMvubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhjAhMvubj)}(h(drm_hdmi_avi_infoframe_from_display_modeh]j)}(h(drm_hdmi_avi_infoframe_from_display_modeh]h(drm_hdmi_avi_infoframe_from_display_mode}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ](jjeh"]h$]h&]jjuh1jhj/hhhjAhMvubj)}(hn(struct hdmi_avi_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(h struct hdmi_avi_infoframe *frameh](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubh)}(hhh]j)}(hhdmi_avi_infoframeh]hhdmi_avi_infoframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjVsb*c.drm_hdmi_avi_infoframe_from_display_modeasbuh1hhjlubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjlubj)}(hframeh]hframe}(hjɵhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjlubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubj)}(h%const struct drm_connector *connectorh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj޵ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj޵ubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj޵ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj޵ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j*c.drm_hdmi_avi_infoframe_from_display_modeasbuh1hhj޵ubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj޵ubj+)}(hj9h]h*}(hjGhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj޵ubj)}(h connectorh]h connector}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj޵ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubj)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j*c.drm_hdmi_avi_infoframe_from_display_modeasbuh1hhjiubj)}(h h]h }(hjĶhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj+)}(hj9h]h*}(hjҶhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjiubj)}(hmodeh]hmode}(hj߶hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjhubeh}(h]h ]h"]h$]h&]jjuh1jhj/hhhjAhMvubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhjAhMvubah}(h]j&ah ](jjeh"]h$]h&]jj)jhuh1jhjAhMvhj(hhubj)}(hhh]h)}(hubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj=hMhjubjn)}(hK``enum hdmi_quantization_range rgb_quant_range`` RGB quantization range (Q)h](jt)}(h0``enum hdmi_quantization_range rgb_quant_range``h]jz)}(hjah]h,enum hdmi_quantization_range rgb_quant_range}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj_ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj[ubj)}(hhh]h)}(hRGB quantization range (Q)h]hRGB quantization range (Q)}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjwubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jmhjvhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j8drm_hdmi_vendor_infoframe_from_display_mode (C function)-c.drm_hdmi_vendor_infoframe_from_display_modehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hint drm_hdmi_vendor_infoframe_from_display_mode (struct hdmi_vendor_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h]j)}(hint drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hjʻhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjɻhMubj)}(h+drm_hdmi_vendor_infoframe_from_display_modeh]j)}(h+drm_hdmi_vendor_infoframe_from_display_modeh]h+drm_hdmi_vendor_infoframe_from_display_mode}(hjܻhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjػubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjɻhMubj)}(hq(struct hdmi_vendor_infoframe *frame, const struct drm_connector *connector, const struct drm_display_mode *mode)h](j)}(h#struct hdmi_vendor_infoframe *frameh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hhdmi_vendor_infoframeh]hhdmi_vendor_infoframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj޻sb-c.drm_hdmi_vendor_infoframe_from_display_modeasbuh1hhjubj)}(h h]h }(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjDhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hframeh]hframe}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h%const struct drm_connector *connectorh](j)}(hjUh]hconst}(hjjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(h h]h }(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j2-c.drm_hdmi_vendor_infoframe_from_display_modeasbuh1hhjfubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubj+)}(hj9h]h*}(hjϼhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjfubj)}(h connectorh]h connector}(hjܼhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#const struct drm_display_mode *modeh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj0modnameN classnameNjj)}j]j2-c.drm_hdmi_vendor_infoframe_from_display_modeasbuh1hhjubj)}(h h]h }(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjZhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmodeh]hmode}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjɻhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjɻhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjɻhMhjhhubj)}(hhh]h)}(h8fill an HDMI infoframe with data from a DRM display modeh]h8fill an HDMI infoframe with data from a DRM display mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjɻhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hX**Parameters** ``struct hdmi_vendor_infoframe *frame`` HDMI vendor infoframe ``const struct drm_connector *connector`` the connector ``const struct drm_display_mode *mode`` DRM display mode **Description** Note that there's is a need to send HDMI vendor infoframes only when using a 4k or stereoscopic 3D mode. So when giving any other mode as input this function will return -EINVAL, error that can be safely ignored. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubji)}(hhh](jn)}(h>``struct hdmi_vendor_infoframe *frame`` HDMI vendor infoframe h](jt)}(h'``struct hdmi_vendor_infoframe *frame``h]jz)}(hjҽh]h#struct hdmi_vendor_infoframe *frame}(hjԽhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjнubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj̽ubj)}(hhh]h)}(hHDMI vendor infoframeh]hHDMI vendor infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj̽ubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjɽubjn)}(h8``const struct drm_connector *connector`` the connector h](jt)}(h)``const struct drm_connector *connector``h]jz)}(hj h]h%const struct drm_connector *connector}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(h the connectorh]h the connector}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjɽubjn)}(h9``const struct drm_display_mode *mode`` DRM display mode h](jt)}(h'``const struct drm_display_mode *mode``h]jz)}(hjDh]h#const struct drm_display_mode *mode}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj>ubj)}(hhh]h)}(hDRM display modeh]hDRM display mode}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhMhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jmhjYhMhjɽubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(hNote that there's is a need to send HDMI vendor infoframes only when using a 4k or stereoscopic 3D mode. So when giving any other mode as input this function will return -EINVAL, error that can be safely ignored.h]hNote that there’s is a need to send HDMI vendor infoframes only when using a 4k or stereoscopic 3D mode. So when giving any other mode as input this function will return -EINVAL, error that can be safely ignored.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chM hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j drm_edid_is_digital (C function)c.drm_edid_is_digitalhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h:bool drm_edid_is_digital (const struct drm_edid *drm_edid)h]j)}(h9bool drm_edid_is_digital(const struct drm_edid *drm_edid)h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_edid_is_digitalh]j)}(hdrm_edid_is_digitalh]hdrm_edid_is_digital}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h!(const struct drm_edid *drm_edid)h]j)}(hconst struct drm_edid *drm_edidh](j)}(hjUh]hconst}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(hjh]hstruct}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj)}(h h]h }(hjOhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubh)}(hhh]j)}(hdrm_edidh]hdrm_edid}(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj]ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjbmodnameN classnameNjj)}j]j)}jj sbc.drm_edid_is_digitalasbuh1hhj#ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj#ubj)}(hdrm_edidh]hdrm_edid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]j޾ah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h is digital?h]h is digital?}(hjſhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhj¿hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjݿjjݿjjjuh1jhhhj`hNhNubj)}(hq**Parameters** ``const struct drm_edid *drm_edid`` The EDID **Description** Return true if input is digital.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubji)}(hhh]jn)}(h-``const struct drm_edid *drm_edid`` The EDID h](jt)}(h#``const struct drm_edid *drm_edid``h]jz)}(hjh]hconst struct drm_edid *drm_edid}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubj)}(hhh]h)}(hThe EDIDh]hThe EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjAh]h Description}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubh)}(h Return true if input is digital.h]h Return true if input is digital.}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:390: ./drivers/gpu/drm/drm_edid.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_eld_mnl (C function) c.drm_eld_mnlhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hint drm_eld_mnl (const u8 *eld)h]j)}(hint drm_eld_mnl(const u8 *eld)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKHubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKHubj)}(h drm_eld_mnlh]j)}(h drm_eld_mnlh]h drm_eld_mnl}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKHubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb c.drm_eld_mnlasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(heldh]held}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKHubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj~hhhjhKHubah}(h]jyah ](jjeh"]h$]h&]jj)jhuh1jhjhKHhj{hhubj)}(hhh]h)}(h%Get ELD monitor name length in bytes.h]h%Get ELD monitor name length in bytes.}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKHhjChhubah}(h]h ]h"]h$]h&]uh1jhj{hhhjhKHubeh}(h]h ](jfunctioneh"]h$]h&]jjjj^jj^jjjuh1jhhhj`hNhNubj)}(hS**Parameters** ``const u8 *eld`` pointer to an eld memory structure with mnl seth](h)}(h**Parameters**h]j%)}(hjhh]h Parameters}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKLhjbubji)}(hhh]jn)}(hA``const u8 *eld`` pointer to an eld memory structure with mnl seth](jt)}(h``const u8 *eld``h]jz)}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKNhjubj)}(hhh]h)}(h/pointer to an eld memory structure with mnl seth]h/pointer to an eld memory structure with mnl set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKIhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKNhj~ubah}(h]h ]h"]h$]h&]uh1jhhjbubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_eld_sad (C function) c.drm_eld_sadhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h&const u8 * drm_eld_sad (const u8 *eld)h]j)}(h$const u8 *drm_eld_sad(const u8 *eld)h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKTubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKTubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}j drm_eld_sadsb c.drm_eld_sadasbuh1hhjhhhjhKTubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKTubj+)}(hj9h]h*}(hj/hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhKTubj)}(h drm_eld_sadh]j)}(hjh]h drm_eld_sad}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj<ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKTubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j)}(hjUh]hconst}(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubh)}(hhh]j)}(hu8h]hu8}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj{modnameN classnameNjj)}j]j c.drm_eld_sadasbuh1hhjWubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjWubj)}(heldh]held}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjSubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKTubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKTubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKThjhhubj)}(hhh]h)}(hGet ELD SAD structures.h]hGet ELD SAD structures.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKThjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKTubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hY**Parameters** ``const u8 *eld`` pointer to an eld memory structure with sad_count seth](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKXhjubji)}(hhh]jn)}(hG``const u8 *eld`` pointer to an eld memory structure with sad_count seth](jt)}(h``const u8 *eld``h]jz)}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKZhjubj)}(hhh]h)}(h5pointer to an eld memory structure with sad_count seth]h5pointer to an eld memory structure with sad_count set}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKUhj3ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj2hKZhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_eld_sad_count (C function)c.drm_eld_sad_counthNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h%int drm_eld_sad_count (const u8 *eld)h]j)}(h$int drm_eld_sad_count(const u8 *eld)h](j)}(hinth]hint}(hjwhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKgubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjshhhjhKgubj)}(hdrm_eld_sad_counth]j)}(hdrm_eld_sad_counth]hdrm_eld_sad_count}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjshhhjhKgubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_eld_sad_countasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(heldh]held}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjshhhjhKgubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjohhhjhKgubah}(h]jjah ](jjeh"]h$]h&]jj)jhuh1jhjhKghjlhhubj)}(hhh]h)}(hGet ELD SAD count.h]hGet ELD SAD count.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKghj4hhubah}(h]h ]h"]h$]h&]uh1jhjlhhhjhKgubeh}(h]h ](jfunctioneh"]h$]h&]jjjjOjjOjjjuh1jhhhj`hNhNubj)}(hY**Parameters** ``const u8 *eld`` pointer to an eld memory structure with sad_count seth](h)}(h**Parameters**h]j%)}(hjYh]h Parameters}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjWubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKkhjSubji)}(hhh]jn)}(hG``const u8 *eld`` pointer to an eld memory structure with sad_count seth](jt)}(h``const u8 *eld``h]jz)}(hjxh]h const u8 *eld}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjvubah}(h]h ]h"]h$]h&]uh1jshZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKmhjrubj)}(hhh]h)}(h5pointer to an eld memory structure with sad_count seth]h5pointer to an eld memory structure with sad_count set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhhjubah}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jmhjhKmhjoubah}(h]h ]h"]h$]h&]uh1jhhjSubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_eld_calc_baseline_block_size (C function)"c.drm_eld_calc_baseline_block_sizehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h4int drm_eld_calc_baseline_block_size (const u8 *eld)h]j)}(h3int drm_eld_calc_baseline_block_size(const u8 *eld)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKqubj)}(h drm_eld_calc_baseline_block_sizeh]j)}(h drm_eld_calc_baseline_block_sizeh]h drm_eld_calc_baseline_block_size}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKqubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hu8h]hu8}(hj-hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj/modnameN classnameNjj)}j]j)}jjsb"c.drm_eld_calc_baseline_block_sizeasbuh1hhj ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj[hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(heldh]held}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKqubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKqubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKqhjhhubj)}(hhh]h)}(h&Calculate baseline block size in bytesh]h&Calculate baseline block size in bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKqhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKqubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hX **Parameters** ``const u8 *eld`` pointer to an eld memory structure with mnl and sad_count set **Description** This is a helper for determining the payload size of the baseline block, in bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKuhjubji)}(hhh]jn)}(hP``const u8 *eld`` pointer to an eld memory structure with mnl and sad_count set h](jt)}(h``const u8 *eld``h]jz)}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKrhjubj)}(hhh]h)}(h=pointer to an eld memory structure with mnl and sad_count seth]h=pointer to an eld memory structure with mnl and sad_count set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKrhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKrhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKthjubh)}(hThis is a helper for determining the payload size of the baseline block, in bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.h]hThis is a helper for determining the payload size of the baseline block, in bytes, for e.g. setting the Baseline_ELD_Len field in the ELD header block.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKshjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_eld_size (C function)c.drm_eld_sizehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h int drm_eld_size (const u8 *eld)h]j)}(hint drm_eld_size(const u8 *eld)h](j)}(hinth]hint}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhK~ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOhhhjahK~ubj)}(h drm_eld_sizeh]j)}(h drm_eld_sizeh]h drm_eld_size}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ](jjeh"]h$]h&]jjuh1jhjOhhhjahK~ubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjvsbc.drm_eld_sizeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(heldh]held}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjOhhhjahK~ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjKhhhjahK~ubah}(h]jFah ](jjeh"]h$]h&]jj)jhuh1jhjahK~hjHhhubj)}(hhh]h)}(hGet ELD size in bytesh]hGet ELD size in bytes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhK~hjhhubah}(h]h ]h"]h$]h&]uh1jhjHhhhjahK~ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj+jj+jjjuh1jhhhj`hNhNubj)}(hX\**Parameters** ``const u8 *eld`` pointer to a complete eld memory structure **Description** The returned value does not include the vendor block. It's vendor specific, and comprises of the remaining bytes in the ELD memory buffer after drm_eld_size() bytes of header and baseline block. The returned value is guaranteed to be a multiple of 4.h](h)}(h**Parameters**h]j%)}(hj5h]h Parameters}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj3ubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhj/ubji)}(hhh]jn)}(h=``const u8 *eld`` pointer to a complete eld memory structure h](jt)}(h``const u8 *eld``h]jz)}(hjTh]h const u8 *eld}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjNubj)}(hhh]h)}(h*pointer to a complete eld memory structureh]h*pointer to a complete eld memory structure}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihKhjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjihKhjKubah}(h]h ]h"]h$]h&]uh1jhhj/ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhj/ubh)}(hThe returned value does not include the vendor block. It's vendor specific, and comprises of the remaining bytes in the ELD memory buffer after drm_eld_size() bytes of header and baseline block.h]hThe returned value does not include the vendor block. It’s vendor specific, and comprises of the remaining bytes in the ELD memory buffer after drm_eld_size() bytes of header and baseline block.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhj/ubh)}(h7The returned value is guaranteed to be a multiple of 4.h]h7The returned value is guaranteed to be a multiple of 4.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_eld_get_spk_alloc (C function)c.drm_eld_get_spk_allochNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h(u8 drm_eld_get_spk_alloc (const u8 *eld)h]j)}(h'u8 drm_eld_get_spk_alloc(const u8 *eld)h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_eld_get_spk_allocsbc.drm_eld_get_spk_allocasbuh1hhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_eld_get_spk_alloch]j)}(hjh]hdrm_eld_get_spk_alloc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j)}(hjUh]hconst}(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubh)}(hhh]j)}(hu8h]hu8}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjPubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjUmodnameN classnameNjj)}j]jc.drm_eld_get_spk_allocasbuh1hhj1ubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj1ubj)}(heldh]held}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj-ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(hGet speaker allocationh]hGet speaker allocation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const u8 *eld`` pointer to an ELD memory structure **Description** The returned value is the speakers mask. User has to use ``DRM_ELD_SPEAKER`` field definitions to identify speakers.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjubji)}(hhh]jn)}(h5``const u8 *eld`` pointer to an ELD memory structure h](jt)}(h``const u8 *eld``h]jz)}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjubj)}(hhh]h)}(h"pointer to an ELD memory structureh]h"pointer to an ELD memory structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hKhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj2h]h Description}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjubh)}(htThe returned value is the speakers mask. User has to use ``DRM_ELD_SPEAKER`` field definitions to identify speakers.h](h9The returned value is the speakers mask. User has to use }(hjHhhhNhNubjz)}(h``DRM_ELD_SPEAKER``h]hDRM_ELD_SPEAKER}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjHubh( field definitions to identify speakers.}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_eld_get_conn_type (C function)c.drm_eld_get_conn_typehNtauh1jxhj`hhhNhNubj)}(hhh](j)}(h(u8 drm_eld_get_conn_type (const u8 *eld)h]j)}(h'u8 drm_eld_get_conn_type(const u8 *eld)h](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_eld_get_conn_typesbc.drm_eld_get_conn_typeasbuh1hhjhhhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_eld_get_conn_typeh]j)}(hjh]hdrm_eld_get_conn_type}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h(const u8 *eld)h]j)}(h const u8 *eldh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_eld_get_conn_typeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj%hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(heldh]held}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]j|ah ](jjeh"]h$]h&]jj)jhuh1jhjhKhj~hhubj)}(hhh]h)}(h!Get device type hdmi/dp connectedh]h!Get device type hdmi/dp connected}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjYhhubah}(h]h ]h"]h$]h&]uh1jhj~hhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjtjjtjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const u8 *eld`` pointer to an ELD memory structure **Description** The caller need to use ``DRM_ELD_CONN_TYPE_HDMI`` or ``DRM_ELD_CONN_TYPE_DP`` to identify the display type connected.h](h)}(h**Parameters**h]j%)}(hj~h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjxubji)}(hhh]jn)}(h5``const u8 *eld`` pointer to an ELD memory structure h](jt)}(h``const u8 *eld``h]jz)}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjubj)}(hhh]h)}(h"pointer to an ELD memory structureh]h"pointer to an ELD memory structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubah}(h]h ]h"]h$]h&]uh1jhhjxubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjxubh)}(huThe caller need to use ``DRM_ELD_CONN_TYPE_HDMI`` or ``DRM_ELD_CONN_TYPE_DP`` to identify the display type connected.h](hThe caller need to use }(hjhhhNhNubjz)}(h``DRM_ELD_CONN_TYPE_HDMI``h]hDRM_ELD_CONN_TYPE_HDMI}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh or }(hjhhhNhNubjz)}(h``DRM_ELD_CONN_TYPE_DP``h]hDRM_ELD_CONN_TYPE_DP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh( to identify the display type connected.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhZ/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:393: ./include/drm/drm_eld.hhKhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_eld_sad_get (C function)c.drm_eld_sad_gethNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hKint drm_eld_sad_get (const u8 *eld, int sad_index, struct cea_sad *cta_sad)h]j)}(hJint drm_eld_sad_get(const u8 *eld, int sad_index, struct cea_sad *cta_sad)h](j)}(hinth]hint}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=hhhjOhKubj)}(hdrm_eld_sad_geth]j)}(hdrm_eld_sad_geth]hdrm_eld_sad_get}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj^ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj=hhhjOhKubj)}(h7(const u8 *eld, int sad_index, struct cea_sad *cta_sad)h](j)}(h const u8 *eldh](j)}(hjUh]hconst}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubh)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjdsbc.drm_eld_sad_getasbuh1hhjzubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjzubj)}(heldh]held}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjvubj)}(h int sad_indexh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h sad_indexh]h sad_index}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjvubj)}(hstruct cea_sad *cta_sadh](j)}(hjh]hstruct}(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubh)}(hhh]j)}(hcea_sadh]hcea_sad}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjEmodnameN classnameNjj)}j]jc.drm_eld_sad_getasbuh1hhj!ubj)}(h h]h }(hjahhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj+)}(hj9h]h*}(hjohhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj!ubj)}(hcta_sadh]hcta_sad}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjvubeh}(h]h ]h"]h$]h&]jjuh1jhj=hhhjOhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj9hhhjOhKubah}(h]j4ah ](jjeh"]h$]h&]jj)jhuh1jhjOhKhj6hhubj)}(hhh]h)}(h"get SAD from ELD to struct cea_sadh]h"get SAD from ELD to struct cea_sad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhj6hhhjOhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``const u8 *eld`` ELD buffer ``int sad_index`` SAD index ``struct cea_sad *cta_sad`` destination struct cea_sad **Return** 0 on success, or negative on errorsh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKhjubji)}(hhh](jn)}(h``const u8 *eld`` ELD buffer h](jt)}(h``const u8 *eld``h]jz)}(hjh]h const u8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKhjubj)}(hhh]h)}(h ELD bufferh]h ELD buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h``int sad_index`` SAD index h](jt)}(h``int sad_index``h]jz)}(hj h]h int sad_index}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKhjubj)}(hhh]h)}(h SAD indexh]h SAD index}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hKhj6ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj5hKhjubjn)}(h7``struct cea_sad *cta_sad`` destination struct cea_sad h](jt)}(h``struct cea_sad *cta_sad``h]jz)}(hjYh]hstruct cea_sad *cta_sad}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjWubah}(h]h ]h"]h$]h&]uh1jsh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKhjSubj)}(hhh]h)}(hdestination struct cea_sadh]hdestination struct cea_sad}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjnhKhjoubah}(h]h ]h"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]uh1jmhjnhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKhjubh)}(h#0 on success, or negative on errorsh]h#0 on success, or negative on errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chKhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_eld_sad_set (C function)c.drm_eld_sad_sethNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hKint drm_eld_sad_set (u8 *eld, int sad_index, const struct cea_sad *cta_sad)h]j)}(hJint drm_eld_sad_set(u8 *eld, int sad_index, const struct cea_sad *cta_sad)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK%ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhK%ubj)}(hdrm_eld_sad_seth]j)}(hdrm_eld_sad_seth]hdrm_eld_sad_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhK%ubj)}(h7(u8 *eld, int sad_index, const struct cea_sad *cta_sad)h](j)}(hu8 *eldh](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_eld_sad_setasbuh1hhjubj)}(h h]h }(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjGhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(heldh]held}(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h int sad_indexh](j)}(hinth]hint}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h sad_indexh]h sad_index}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst struct cea_sad *cta_sadh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hcea_sadh]hcea_sad}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j5c.drm_eld_sad_setasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcta_sadh]hcta_sad}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhK%ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhK%ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhK%hjhhubj)}(hhh]h)}(h"set SAD to ELD from struct cea_sadh]h"set SAD to ELD from struct cea_sad}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK%hj;hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhK%ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjVjjVjjjuh1jhhhj`hNhNubj)}(h**Parameters** ``u8 *eld`` ELD buffer ``int sad_index`` SAD index ``const struct cea_sad *cta_sad`` source struct cea_sad **Return** 0 on success, or negative on errorsh](h)}(h**Parameters**h]j%)}(hj`h]h Parameters}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^ubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK)hjZubji)}(hhh](jn)}(h``u8 *eld`` ELD buffer h](jt)}(h ``u8 *eld``h]jz)}(hjh]hu8 *eld}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj}ubah}(h]h ]h"]h$]h&]uh1jsh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK&hjyubj)}(hhh]h)}(h ELD bufferh]h ELD buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK&hjubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjhK&hjvubjn)}(h``int sad_index`` SAD index h](jt)}(h``int sad_index``h]jz)}(hjh]h int sad_index}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK'hjubj)}(hhh]h)}(h SAD indexh]h SAD index}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK'hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK'hjvubjn)}(h8``const struct cea_sad *cta_sad`` source struct cea_sad h](jt)}(h!``const struct cea_sad *cta_sad``h]jz)}(hjh]hconst struct cea_sad *cta_sad}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK(hjubj)}(hhh]h)}(hsource struct cea_sadh]hsource struct cea_sad}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK(hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK(hjvubeh}(h]h ]h"]h$]h&]uh1jhhjZubh)}(h **Return**h]j%)}(hj,h]hReturn}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK*hjZubh)}(h#0 on success, or negative on errorsh]h#0 on success, or negative on errors}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hh^/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:396: ./drivers/gpu/drm/drm_eld.chK*hjZubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubeh}(h]edid-helper-functions-referenceah ]h"]edid helper functions referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(hSCDC Helper Functions Referenceh]hSCDC Helper Functions Reference}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`hhhhhMubh)}(hXStatus and Control Data Channel (SCDC) is a mechanism introduced by the HDMI 2.0 specification. It is a point-to-point protocol that allows the HDMI source and HDMI sink to exchange data. The same I2C interface that is used to access EDID serves as the transport mechanism for SCDC.h]hXStatus and Control Data Channel (SCDC) is a mechanism introduced by the HDMI 2.0 specification. It is a point-to-point protocol that allows the HDMI source and HDMI sink to exchange data. The same I2C interface that is used to access EDID serves as the transport mechanism for SCDC.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:402: ./drivers/gpu/drm/display/drm_scdc_helper.chK#hj`hhubh)}(hNote: The SCDC status is going to be lost when the display is disconnected. This can happen physically when the user disconnects the cable, but also when a display is switched on (such as waking up a TV).h]hNote: The SCDC status is going to be lost when the display is disconnected. This can happen physically when the user disconnects the cable, but also when a display is switched on (such as waking up a TV).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:402: ./drivers/gpu/drm/display/drm_scdc_helper.chK(hj`hhubh)}(hXThis is further complicated by the fact that, upon a disconnection / reconnection, KMS won't change the mode on its own. This means that one can't just rely on setting the SCDC status on enable, but also has to track the connector status changes using interrupts and restore the SCDC status. The typical solution for this is to trigger an empty modeset in drm_connector_helper_funcs.detect_ctx(), like what vc4 does in vc4_hdmi_reset_link().h]hXThis is further complicated by the fact that, upon a disconnection / reconnection, KMS won’t change the mode on its own. This means that one can’t just rely on setting the SCDC status on enable, but also has to track the connector status changes using interrupts and restore the SCDC status. The typical solution for this is to trigger an empty modeset in drm_connector_helper_funcs.detect_ctx(), like what vc4 does in vc4_hdmi_reset_link().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:402: ./drivers/gpu/drm/display/drm_scdc_helper.chK-hj`hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_scdc_readb (C function)c.drm_scdc_readbhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hFint drm_scdc_readb (struct i2c_adapter *adapter, u8 offset, u8 *value)h]j)}(hEint drm_scdc_readb(struct i2c_adapter *adapter, u8 offset, u8 *value)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK(ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhK(ubj)}(hdrm_scdc_readbh]j)}(hdrm_scdc_readbh]hdrm_scdc_readb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhK(ubj)}(h3(struct i2c_adapter *adapter, u8 offset, u8 *value)h](j)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_scdc_readbasbuh1hhjubj)}(h h]h }(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj@hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hadapterh]hadapter}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h u8 offseth](h)}(hhh]j)}(hu8h]hu8}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjkmodnameN classnameNjj)}j]j.c.drm_scdc_readbasbuh1hhjbubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubj)}(hoffseth]hoffset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h u8 *valueh](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j.c.drm_scdc_readbasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hvalueh]hvalue}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhK(ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhK(ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhK(hjhhubj)}(hhh]h)}(hread a single byte from SCDCh]hread a single byte from SCDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK(hjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhK(ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj,jj,jjjuh1jhhhj`hNhNubj)}(hXT**Parameters** ``struct i2c_adapter *adapter`` I2C adapter ``u8 offset`` offset of register to read ``u8 *value`` return location for the register value **Description** Reads a single byte from SCDC. This is a convenience wrapper around the drm_scdc_read() function. **Return** 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj6h]h Parameters}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4ubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK,hj0ubji)}(hhh](jn)}(h,``struct i2c_adapter *adapter`` I2C adapter h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjUh]hstruct i2c_adapter *adapter}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjSubah}(h]h ]h"]h$]h&]uh1jshj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK)hjOubj)}(hhh]h)}(h I2C adapterh]h I2C adapter}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhK)hjkubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jmhjjhK)hjLubjn)}(h)``u8 offset`` offset of register to read h](jt)}(h ``u8 offset``h]jz)}(hjh]h u8 offset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK*hjubj)}(hhh]h)}(hoffset of register to readh]hoffset of register to read}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK*hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK*hjLubjn)}(h5``u8 *value`` return location for the register value h](jt)}(h ``u8 *value``h]jz)}(hjh]h u8 *value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK+hjubj)}(hhh]h)}(h&return location for the register valueh]h&return location for the register value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK+hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK+hjLubeh}(h]h ]h"]h$]h&]uh1jhhj0ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK-hj0ubh)}(haReads a single byte from SCDC. This is a convenience wrapper around the drm_scdc_read() function.h]haReads a single byte from SCDC. This is a convenience wrapper around the drm_scdc_read() function.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK,hj0ubh)}(h **Return**h]j%)}(hj)h]hReturn}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'ubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK/hj0ubh)}(h10 on success or a negative error code on failure.h]h10 on success or a negative error code on failure.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK0hj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_scdc_writeb (C function)c.drm_scdc_writebhNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hFint drm_scdc_writeb (struct i2c_adapter *adapter, u8 offset, u8 value)h]j)}(hEint drm_scdc_writeb(struct i2c_adapter *adapter, u8 offset, u8 value)h](j)}(hinth]hint}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjhhhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK:ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjhhhj|hK:ubj)}(hdrm_scdc_writebh]j)}(hdrm_scdc_writebh]hdrm_scdc_writeb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjjhhhj|hK:ubj)}(h2(struct i2c_adapter *adapter, u8 offset, u8 value)h](j)}(hstruct i2c_adapter *adapterh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h i2c_adapterh]h i2c_adapter}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_scdc_writebasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hadapterh]hadapter}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h u8 offseth](h)}(hhh]j)}(hu8h]hu8}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj"modnameN classnameNjj)}j]jc.drm_scdc_writebasbuh1hhjubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hu8 valueh](h)}(hhh]j)}(hu8h]hu8}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjjmodnameN classnameNjj)}j]jc.drm_scdc_writebasbuh1hhjaubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubj)}(hvalueh]hvalue}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjjhhhj|hK:ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjfhhhj|hK:ubah}(h]jaah ](jjeh"]h$]h&]jj)jhuh1jhj|hK:hjchhubj)}(hhh]h)}(hwrite a single byte to SCDCh]hwrite a single byte to SCDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:405: ./include/drm/display/drm_scdc_helper.hhK:hjhhubah}(h]h ]h"]h$]h&]uh1jhjchhhj|hK:ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hXS**Parameters** ``struct i2c_adapter *adapter`` I2C adapter ``u8 offset`` offset of register to read ``u8 value`` return location for the register value **Description** Writes a single byte to SCDC. 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]jah"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubj)}(h u8 offseth](h)}(hhh]j)}(hu8h]hu8}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j7c.drm_scdc_readasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hoffseth]hoffset}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbufferh]hbuffer}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjdubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjimodnameN classnameNjj)}j]j7c.drm_scdc_readasbuh1hhj`ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjbubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj<hK;ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj<hK;ubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj<hK;hj hhubj)}(hhh]h)}(hread a block of data from SCDCh]hread a block of data from SCDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chK;hjhhubah}(h]h ]h"]h$]h&]uh1jhj hhhj<hK;ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj`hNhNubj)}(hX`**Parameters** ``struct i2c_adapter *adapter`` I2C controller ``u8 offset`` start offset of block to read ``void *buffer`` return location for the block to read ``size_t size`` size of the block to read **Description** Reads a block of data from SCDC, starting at a given offset. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chK?hjubji)}(hhh](jn)}(h/``struct i2c_adapter *adapter`` I2C controller h](jt)}(h``struct i2c_adapter *adapter``h]jz)}(hjh]hstruct i2c_adapter *adapter}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjjubj)}(hhh]h)}(h%return location for the block to readh]h%return location for the block to read}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK>hjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjhK>hjubjn)}(h*``size_t size`` size of the block to read h](jt)}(h``size_t size``h]jz)}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chK?hjubj)}(hhh]h)}(hsize of the block to readh]hsize of the block to read}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK?hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK?hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKAhjubh)}(hTrue if scrambling is set/reset successfully, false otherwise.h]h>True if scrambling is set/reset successfully, false otherwise.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjYubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j/drm_scdc_set_high_tmds_clock_ratio (C function)$c.drm_scdc_set_high_tmds_clock_ratiohNtauh1jxhj`hhhNhNubj)}(hhh](j)}(hSbool drm_scdc_set_high_tmds_clock_ratio (struct drm_connector *connector, bool set)h]j)}(hRbool drm_scdc_set_high_tmds_clock_ratio(struct drm_connector *connector, bool set)h](j)}(hjAh]hbool}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKubj)}(h h]h }(hjlhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZhhhjkhKubj)}(h"drm_scdc_set_high_tmds_clock_ratioh]j)}(h"drm_scdc_set_high_tmds_clock_ratioh]h"drm_scdc_set_high_tmds_clock_ratio}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubah}(h]h ](jjeh"]h$]h&]jjuh1jhjZhhhjkhKubj)}(h+(struct drm_connector *connector, bool set)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb$c.drm_scdc_set_high_tmds_clock_ratioasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hbool seth](j)}(hjAh]hbool}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hseth]hset}(hj'hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjZhhhjkhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjVhhhjkhKubah}(h]jQah ](jjeh"]h$]h&]jj)jhuh1jhjkhKhjShhubj)}(hhh]h)}(hset TMDS clock ratioh]hset TMDS clock ratio}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjNhhubah}(h]h ]h"]h$]h&]uh1jhjShhhjkhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjijjijjjuh1jhhhj`hNhNubj)}(hX|**Parameters** ``struct drm_connector *connector`` connector ``bool set`` ret or reset the high clock ratio **Description** TMDS clock ratio calculations go like this: TMDS character = 10 bit TMDS encoded value TMDS character rate = The rate at which TMDS characters are transmitted (Mcsc) TMDS bit rate = 10x TMDS character rate As per the spec: TMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate Writes to the TMDS config register over SCDC channel, and: sets TMDS clock ratio to 1/40 when set = 1 sets TMDS clock ratio to 1/10 when set = 0 **Return** True if write is successful, false otherwise.h](h)}(h**Parameters**h]j%)}(hjsh]h Parameters}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjmubji)}(hhh](jn)}(h.``struct drm_connector *connector`` connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjh]hstruct drm_connector *connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubj)}(hhh]h)}(h connectorh]h connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h/``bool set`` ret or reset the high clock ratio h](jt)}(h ``bool set``h]jz)}(hjh]hbool set}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubj)}(hhh]h)}(h!ret or reset the high clock ratioh]h!ret or reset the high clock ratio}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjmubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjmubjT=)}(hX}TMDS clock ratio calculations go like this: TMDS character = 10 bit TMDS encoded value TMDS character rate = The rate at which TMDS characters are transmitted (Mcsc) TMDS bit rate = 10x TMDS character rate As per the spec: TMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate Writes to the TMDS config register over SCDC channel, and: sets TMDS clock ratio to 1/40 when set = 1 sets TMDS clock ratio to 1/10 when set = 0 h]ji)}(hhh](jn)}(hTMDS clock ratio calculations go like this: TMDS character = 10 bit TMDS encoded value TMDS character rate = The rate at which TMDS characters are transmitted (Mcsc) TMDS bit rate = 10x TMDS character rate h](jt)}(h+TMDS clock ratio calculations go like this:h]h+TMDS clock ratio calculations go like this:}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhj#ubj)}(hhh](h)}(h*TMDS character = 10 bit TMDS encoded valueh]h*TMDS character = 10 bit TMDS encoded value}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhj6ubh)}(hNTMDS character rate = The rate at which TMDS characters are transmitted (Mcsc)h]hNTMDS character rate = The rate at which TMDS characters are transmitted (Mcsc)}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhj6ubh)}(h'TMDS bit rate = 10x TMDS character rateh]h'TMDS bit rate = 10x TMDS character rate}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj5hKhj6ubeh}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jmhj5hKhj ubjn)}(hAs per the spec: TMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate h](jt)}(hAs per the spec:h]hAs per the spec:}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjqubj)}(hhh](h)}(hYTMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rateh]hYTMDS clock rate for pixel clock < 340 MHz = 1x the character rate = 1/10 pixel clock rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubh)}(h\TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rateh]h\TMDS clock rate for pixel clock > 340 MHz = 0.25x the character rate = 1/40 pixel clock rate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubeh}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj ubjn)}(hWrites to the TMDS config register over SCDC channel, and: sets TMDS clock ratio to 1/40 when set = 1 sets TMDS clock ratio to 1/10 when set = 0 h](jt)}(h:Writes to the TMDS config register over SCDC channel, and:h]h:Writes to the TMDS config register over SCDC channel, and:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jshn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubj)}(hhh](h)}(h*sets TMDS clock ratio to 1/40 when set = 1h]h*sets TMDS clock ratio to 1/40 when set = 1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjubh)}(h*sets TMDS clock ratio to 1/10 when set = 0h]h*sets TMDS clock ratio to 1/10 when set = 0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubah}(h]h ]h"]h$]h&]uh1jS=hn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjmubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjmubh)}(h-True if write is successful, false otherwise.h]h-True if write is successful, false otherwise.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhn/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:408: ./drivers/gpu/drm/display/drm_scdc_helper.chKhjmubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj`hhhNhNubeh}(h]scdc-helper-functions-referenceah ]h"]scdc helper functions referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h HDMI Infoframes Helper Referenceh]h HDMI Infoframes Helper Reference}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hhhhhMubh)}(hStrictly speaking this is not a DRM helper library but generally usable by any driver interfacing with HDMI outputs like v4l or alsa drivers. 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union { struct hdr_static_metadata hdmi_type1; }; }; **Members** ``metadata_type`` Static_Metadata_Descriptor_ID. ``{unnamed_union}`` anonymous ``hdmi_type1`` HDR Metadata Infoframe.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubj@)}(hxstruct hdr_sink_metadata { __u32 metadata_type; union { struct hdr_static_metadata hdmi_type1; }; };h]hxstruct hdr_sink_metadata { __u32 metadata_type; union { struct hdr_static_metadata hdmi_type1; }; };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubji)}(hhh](jn)}(h1``metadata_type`` Static_Metadata_Descriptor_ID. h](jt)}(h``metadata_type``h]jz)}(hjh]h metadata_type}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubj)}(hhh]h)}(hStatic_Metadata_Descriptor_ID.h]hStatic_Metadata_Descriptor_ID.}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hMhj1ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj0hMhjubjn)}(h``{unnamed_union}`` anonymous h](jt)}(h``{unnamed_union}``h]jz)}(hjTh]h{unnamed_union}}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjRubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhKhjNubj)}(hhh]h)}(h anonymoush]h anonymous}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihKhjjubah}(h]h ]h"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]uh1jmhjihKhjubjn)}(h&``hdmi_type1`` HDR Metadata Infoframe.h](jt)}(h``hdmi_type1``h]jz)}(hjh]h hdmi_type1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubj)}(hhh]h)}(hHDR Metadata Infoframe.h]hHDR Metadata Infoframe.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhj`hNubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhj3hhubh)}(h*Metadata Information read from Sink's EDIDh]h,Metadata Information read from Sink’s EDID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhj3hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jhdmi_infoframe (C union)c.hdmi_infoframehNtauh1jxhj3hhhj`hNubj)}(hhh](j)}(hhdmi_infoframeh]j)}(hunion hdmi_infoframeh](j)}(hunionh]hunion}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhjhMubj)}(hhdmi_infoframeh]j)}(hjh]hhdmi_infoframe}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h7overall union of all abstract infoframe representationsh]h7overall union of all abstract infoframe representations}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjNhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](junioneh"]h$]h&]jjjjijjijjjuh1jhhhj3hj`hNubj)}(hX**Definition**:: union hdmi_infoframe { struct hdmi_any_infoframe any; struct hdmi_avi_infoframe avi; struct hdmi_spd_infoframe spd; union hdmi_vendor_any_infoframe vendor; struct hdmi_audio_infoframe audio; struct hdmi_drm_infoframe drm; }; **Members** ``any`` generic infoframe ``avi`` avi infoframe ``spd`` spd infoframe ``vendor`` union of all vendor infoframes ``audio`` audio infoframe ``drm`` Dynamic Range and Mastering infoframeh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjqubh:}(hjqhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjmubj@)}(hunion hdmi_infoframe { struct hdmi_any_infoframe any; struct hdmi_avi_infoframe avi; struct hdmi_spd_infoframe spd; union hdmi_vendor_any_infoframe vendor; struct hdmi_audio_infoframe audio; struct hdmi_drm_infoframe drm; };h]hunion hdmi_infoframe { struct hdmi_any_infoframe any; struct hdmi_avi_infoframe avi; struct hdmi_spd_infoframe spd; union hdmi_vendor_any_infoframe vendor; struct hdmi_audio_infoframe audio; struct hdmi_drm_infoframe drm; };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?hY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjmubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjmubji)}(hhh](jn)}(h``any`` generic infoframe h](jt)}(h``any``h]jz)}(hjh]hany}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubj)}(hhh]h)}(hgeneric infoframeh]hgeneric infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``avi`` avi infoframe h](jt)}(h``avi``h]jz)}(hjh]havi}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubj)}(hhh]h)}(h avi infoframeh]h avi infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjubjn)}(h``spd`` spd infoframe h](jt)}(h``spd``h]jz)}(hj0h]hspd}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.ubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhj*ubj)}(hhh]h)}(h spd infoframeh]h spd infoframe}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhMhjFubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhjEhMhjubjn)}(h*``vendor`` union of all vendor infoframes h](jt)}(h ``vendor``h]jz)}(hjih]hvendor}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjgubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjcubj)}(hhh]h)}(hunion of all vendor infoframesh]hunion of all vendor infoframes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hMhjubah}(h]h ]h"]h$]h&]uh1jhjcubeh}(h]h ]h"]h$]h&]uh1jmhj~hMhjubjn)}(h``audio`` audio infoframe h](jt)}(h ``audio``h]jz)}(hjh]haudio}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubj)}(hhh]h)}(haudio infoframeh]haudio infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h-``drm`` Dynamic Range and Mastering infoframeh](jt)}(h``drm``h]jz)}(hjh]hdrm}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubj)}(hhh]h)}(h%Dynamic Range and Mastering infoframeh]h%Dynamic Range and Mastering infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjmubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhj`hNubh)}(h**Description**h]j%)}(hjh]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:419: ./include/linux/hdmi.hhMhj3hhubh)}(hThis is used by the generic pack function. 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*vendorh](j)}(hjUh]hconst}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjoubj)}(hvendorh]hvendor}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst char *producth](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hproducth]hproduct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h initialize an HDMI SPD infoframeh]h initialize an HDMI SPD infoframe}(hj>hhhNhNubah}(h]h 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infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjyubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjvubjn)}(h%``const char *vendor`` vendor string h](jt)}(h``const char *vendor``h]jz)}(hjh]hconst char *vendor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chKhjubj)}(hhh]h)}(h vendor stringh]h vendor string}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjvubjn)}(h'``const char *product`` product string h](jt)}(h``const char *product``h]jz)}(hjh]hconst char *product}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chKhjubj)}(hhh]h)}(hproduct stringh]hproduct string}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjvubeh}(h]h ]h"]h$]h&]uh1jhhjZubh)}(h**Description**h]j%)}(hj,h]h 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classnameNjj)}j]j)}jj"sbc.hdmi_audio_infoframe_checkasbuh1hhj8ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj8ubj)}(hframeh]hframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj4ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhj hMyubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hMyubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMyhjhhubj)}(hhh]h)}(hcheck a HDMI audio infoframeh]hcheck a HDMI audio infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMyhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMyubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj3hNhNubj)}(hX **Parameters** ``const struct hdmi_audio_infoframe *frame`` HDMI audio infoframe **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields. 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Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjDh]h Parameters}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjBubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj>ubji)}(hhh](jn)}(hB``const struct hdmi_audio_infoframe *frame`` HDMI audio infoframe h](jt)}(h,``const struct hdmi_audio_infoframe *frame``h]jz)}(hjch]h(const struct hdmi_audio_infoframe *frame}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjaubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj]ubj)}(hhh]h)}(hHDMI audio infoframeh]hHDMI audio infoframe}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjxhMhjyubah}(h]h ]h"]h$]h&]uh1jhj]ubeh}(h]h ]h"]h$]h&]uh1jmhjxhMhjZubjn)}(h$``void *buffer`` destination buffer h](jt)}(h``void *buffer``h]jz)}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjZubjn)}(h``size_t size`` size of buffer h](jt)}(h``size_t size``h]jz)}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjZubeh}(h]h ]h"]h$]h&]uh1jhhj>ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj>ubh)}(hPacks the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. 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classnameNjj)}j]j)}jjsbc.hdmi_vendor_infoframe_checkasbuh1hhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj1hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hframeh]hframe}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMEubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMEubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMEhjhhubj)}(hhh]h)}(hcheck a HDMI vendor infoframeh]hcheck a HDMI vendor infoframe}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMEhjehhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMEubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj3hNhNubj)}(h**Parameters** ``struct hdmi_vendor_infoframe *frame`` HDMI infoframe **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields. 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Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hj hhhNhNubj%)}(h **frame**h]hframe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh structure into a binary representation that can be written into the corresponding controller registers. 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This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hje hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj} ubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj} ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j$hdmi_drm_infoframe_init (C function)c.hdmi_drm_infoframe_inithNtauh1jxhj3hhhNhNubj)}(hhh](j)}(h>int hdmi_drm_infoframe_init (struct hdmi_drm_infoframe *frame)h]j)}(h=int hdmi_drm_infoframe_init(struct hdmi_drm_infoframe *frame)h](j)}(hinth]hint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj hhhj hMubj)}(hhdmi_drm_infoframe_inith]j)}(hhdmi_drm_infoframe_inith]hhdmi_drm_infoframe_init}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj hhhj hMubj)}(h"(struct hdmi_drm_infoframe *frame)h]j)}(h struct hdmi_drm_infoframe *frameh](j)}(hjh]hstruct}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj sbc.hdmi_drm_infoframe_initasbuh1hhj ubj)}(h h]h }(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hframeh]hframe}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj ubah}(h]h ]h"]h$]h&]jjuh1jhj hhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj hhhj hMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj hMhj hhubj)}(hhh]h)}(h9initialize an HDMI Dynaminc Range and mastering infoframeh]h9initialize an HDMI Dynaminc Range and mastering infoframe}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjrhhubah}(h]h ]h"]h$]h&]uh1jhj hhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj3hNhNubj)}(h**Parameters** ``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe **Description** Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubji)}(hhh]jn)}(h8``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](jt)}(h$``struct hdmi_drm_infoframe *frame``h]jz)}(hjh]h struct hdmi_drm_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%hdmi_drm_infoframe_check (C function)c.hdmi_drm_infoframe_checkhNtauh1jxhj3hhhNhNubj)}(hhh](j)}(h?int hdmi_drm_infoframe_check (struct hdmi_drm_infoframe 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]j6ah"]h$]h&]uh1j*hjoubj)}(hframeh]hframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjkubah}(h]h ]h"]h$]h&]jjuh1jhj2hhhjDhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj.hhhjDhMubah}(h]j)ah ](jjeh"]h$]h&]jj)jhuh1jhjDhMhj+hhubj)}(hhh]h)}(hcheck a HDMI DRM infoframeh]hcheck a HDMI DRM infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj+hhhjDhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj3hNhNubj)}(h**Parameters** ``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe **Description** Validates that the infoframe is consistent. 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Returns 0 on success or a negative error code on failure.h]heValidates that the infoframe is consistent. Returns 0 on success or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)hdmi_drm_infoframe_pack_only (C function)c.hdmi_drm_infoframe_pack_onlyhNtauh1jxhj3hhhNhNubj)}(hhh](j)}(hhssize_t hdmi_drm_infoframe_pack_only (const struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h]j)}(hgssize_t hdmi_drm_infoframe_pack_only(const struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jhdmi_drm_infoframe_pack_onlysbc.hdmi_drm_infoframe_pack_onlyasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hhdmi_drm_infoframe_pack_onlyh]j)}(hjh]hhdmi_drm_infoframe_pack_only}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hC(const struct hdmi_drm_infoframe *frame, void *buffer, size_t size)h](j)}(h&const struct hdmi_drm_infoframe *frameh](j)}(hjUh]hconst}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDmodnameN classnameNjj)}j]jc.hdmi_drm_infoframe_pack_onlyasbuh1hhjubj)}(h h]h }(hj`hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjnhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hframeh]hframe}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.hdmi_drm_infoframe_pack_onlyasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h)write HDMI DRM infoframe to binary bufferh]h)write HDMI DRM infoframe to binary buffer}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj,hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjGjjGjjjuh1jhhhj3hNhNubj)}(hX**Parameters** ``const struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. 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Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chM0hjubji)}(hhh](jn)}(h8``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](jt)}(h$``struct hdmi_drm_infoframe *frame``h]jz)}(hj!h]h struct hdmi_drm_infoframe *frame}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chM.hjubj)}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6hM.hj7ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj6hM.hjubjn)}(h$``void *buffer`` destination buffer h](jt)}(h``void *buffer``h]jz)}(hjZh]h void *buffer}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chM/hjTubj)}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhjohM/hjpubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jmhjohM/hjubjn)}(h``size_t size`` size of buffer h](jt)}(h``size_t size``h]jz)}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chM0hjubj)}(hhh]h)}(hsize of bufferh]hsize of buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM0hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM0hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chM2hjubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. 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This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chM1hjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chM8hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%hdmi_infoframe_pack_only (C function)c.hdmi_infoframe_pack_onlyhNtauh1jxhj3hhhNhNubj)}(hhh](j)}(h_ssize_t hdmi_infoframe_pack_only (const union hdmi_infoframe *frame, void *buffer, size_t size)h]j)}(h^ssize_t hdmi_infoframe_pack_only(const union hdmi_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j)}(hssize_th]hssize_t}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj9modnameN classnameNjj)}j]j)}jhdmi_infoframe_pack_onlysbc.hdmi_infoframe_pack_onlyasbuh1hhj0hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMubj)}(h h]h }(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhjXhMubj)}(hhdmi_infoframe_pack_onlyh]j)}(hjUh]hhdmi_infoframe_pack_only}(hjkhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjgubah}(h]h ](jjeh"]h$]h&]jjuh1jhj0hhhjXhMubj)}(h>(const union hdmi_infoframe *frame, void *buffer, size_t size)h](j)}(h!const union hdmi_infoframe *frameh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hunion}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hhdmi_infoframeh]hhdmi_infoframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jSc.hdmi_infoframe_pack_onlyasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hframeh]hframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hj-hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hbufferh]hbuffer}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjVhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjXmodnameN classnameNjj)}j]jSc.hdmi_infoframe_pack_onlyasbuh1hhjOubj)}(h h]h }(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj~ubeh}(h]h ]h"]h$]h&]jjuh1jhj0hhhjXhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj,hhhjXhMubah}(h]j'ah ](jjeh"]h$]h&]jj)jhuh1jhjXhMhj)hhubj)}(hhh]h)}(h'write a HDMI infoframe to binary bufferh]h'write a HDMI infoframe to binary buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj)hhhjXhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj3hNhNubj)}(hX**Parameters** ``const union hdmi_infoframe *frame`` HDMI infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification. 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Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.h](h'Packs the information contained in the }(hjhhhNhNubj%)}(h **frame**h]hframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh structure into a binary representation that can be written into the corresponding controller registers. Also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j hdmi_infoframe_pack (C function)c.hdmi_infoframe_packhNtauh1jxhj3hhhNhNubj)}(hhh](j)}(hTssize_t hdmi_infoframe_pack (union hdmi_infoframe *frame, void *buffer, size_t size)h]j)}(hSssize_t hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size)h](h)}(hhh]j)}(hssize_th]hssize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jhdmi_infoframe_packsbc.hdmi_infoframe_packasbuh1hhjhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj$hMubj)}(hhdmi_infoframe_packh]j)}(hj!h]hhdmi_infoframe_pack}(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj$hMubj)}(h8(union hdmi_infoframe *frame, void *buffer, size_t size)h](j)}(hunion hdmi_infoframe *frameh](j)}(hjh]hunion}(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubh)}(hhh]j)}(hhdmi_infoframeh]hhdmi_infoframe}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjrmodnameN classnameNjj)}j]jc.hdmi_infoframe_packasbuh1hhjNubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjNubj)}(hframeh]hframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubj)}(h void *bufferh](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbufferh]hbuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]jc.hdmi_infoframe_packasbuh1hhjubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsizeh]hsize}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjJubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj$hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj$hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj$hMhjhhubj)}(hhh]h)}(h5check a HDMI infoframe, and write it to binary bufferh]h5check a HDMI infoframe, and write it to binary buffer}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjZhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj$hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjujjujjjuh1jhhhj3hNhNubj)}(hXr**Parameters** ``union hdmi_infoframe *frame`` HDMI infoframe ``void *buffer`` destination buffer ``size_t size`` size of buffer **Description** Validates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. 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Returns the number of bytes packed into the binary buffer or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjyubji)}(hhh](jn)}(h/``union hdmi_infoframe *frame`` HDMI infoframe h](jt)}(h``union hdmi_infoframe *frame``h]jz)}(hjh]hunion hdmi_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h$``void *buffer`` destination buffer h](jt)}(h``void *buffer``h]jz)}(hjh]h void *buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(hdestination bufferh]hdestination buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``size_t size`` size of buffer h](jt)}(h``size_t size``h]jz)}(hjh]h size_t size}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj ubj)}(hhh]h)}(hsize of bufferh]hsize of buffer}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hMhj&ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj%hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjyubh)}(h**Description**h]j%)}(hjKh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjyubh)}(hXvValidates that the infoframe is consistent and updates derived fields (eg. length) based on other fields, after which it packs the information contained in the **frame** structure into a binary representation that can be written into the corresponding controller registers. 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This function also computes the checksum as required by section 5.3.5 of the HDMI 1.4 specification.}(hjahhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjyubh)}(h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.h]h^Returns the number of bytes packed into the binary buffer or a negative error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjyubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jhdmi_infoframe_log (C function)c.hdmi_infoframe_loghNtauh1jxhj3hhhNhNubj)}(hhh](j)}(hbvoid hdmi_infoframe_log (const char *level, struct device *dev, const union hdmi_infoframe *frame)h]j)}(havoid hdmi_infoframe_log(const char *level, struct device *dev, const union hdmi_infoframe *frame)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h 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]h"]h$]h&] refdomainjreftypej reftargetjkmodnameN classnameNjj)}j]j)}jjsbc.hdmi_infoframe_logasbuh1hhjGubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjGubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h!const union hdmi_infoframe *frameh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hunion}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hhdmi_infoframeh]hhdmi_infoframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.hdmi_infoframe_logasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj"hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hframeh]hframe}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hlog info of HDMI infoframeh]hlog info of HDMI infoframe}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjVhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjqjjqjjjuh1jhhhj3hNhNubj)}(h**Parameters** ``const char *level`` logging level ``struct device *dev`` device ``const union hdmi_infoframe *frame`` HDMI infoframeh](h)}(h**Parameters**h]j%)}(hj{h]h Parameters}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjuubji)}(hhh](jn)}(h$``const char *level`` logging level h](jt)}(h``const char *level``h]jz)}(hjh]hconst char *level}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(h logging levelh]h logging level}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h``struct device *dev`` device h](jt)}(h``struct device *dev``h]jz)}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(h4``const union hdmi_infoframe *frame`` HDMI infoframeh](jt)}(h%``const union hdmi_infoframe *frame``h]jz)}(hj h]h!const union hdmi_infoframe *frame}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubj)}(hhh]h)}(hHDMI infoframeh]hHDMI infoframe}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj"ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj!hMhjubeh}(h]h ]h"]h$]h&]uh1jhhjuubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+hdmi_drm_infoframe_unpack_only (C function) c.hdmi_drm_infoframe_unpack_onlyhNtauh1jxhj3hhhNhNubj)}(hhh](j)}(hfint hdmi_drm_infoframe_unpack_only (struct hdmi_drm_infoframe *frame, const void *buffer, size_t size)h]j)}(heint hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame, const void *buffer, size_t size)h](j)}(hinth]hint}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMubj)}(h h]h }(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjbhhhjthMubj)}(hhdmi_drm_infoframe_unpack_onlyh]j)}(hhdmi_drm_infoframe_unpack_onlyh]hhdmi_drm_infoframe_unpack_only}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjbhhhjthMubj)}(hC(struct hdmi_drm_infoframe *frame, const void *buffer, size_t size)h](j)}(h struct hdmi_drm_infoframe *frameh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hhdmi_drm_infoframeh]hhdmi_drm_infoframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb c.hdmi_drm_infoframe_unpack_onlyasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hframeh]hframe}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst void *bufferh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hvoidh]hvoid}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjLhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hbufferh]hbuffer}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]j c.hdmi_drm_infoframe_unpack_onlyasbuh1hhjnubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj)}(hsizeh]hsize}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjbhhhjthMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj^hhhjthMubah}(h]jYah ](jjeh"]h$]h&]jj)jhuh1jhjthMhj[hhubj)}(hhh]h)}(hQunpack binary buffer of CTA-861-G DRM infoframe DataBytes to a HDMI DRM infoframeh]hQunpack binary buffer of CTA-861-G DRM infoframe DataBytes to a HDMI DRM infoframe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj[hhhjthMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj3hNhNubj)}(hX**Parameters** ``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe ``const void *buffer`` source buffer ``size_t size`` size of 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Returns 0 on success or a negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubji)}(hhh](jn)}(h8``struct hdmi_drm_infoframe *frame`` HDMI DRM infoframe h](jt)}(h$``struct hdmi_drm_infoframe *frame``h]jz)}(hj h]h struct hdmi_drm_infoframe *frame}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj ubj)}(hhh]h)}(hHDMI DRM infoframeh]hHDMI DRM infoframe}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj! hMhj" ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj! hMhj ubjn)}(h%``const void *buffer`` source buffer h](jt)}(h``const void *buffer``h]jz)}(hjE h]hconst void *buffer}(hjG hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjC ubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhj? ubj)}(hhh]h)}(h source bufferh]h source buffer}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjZ hMhj[ ubah}(h]h ]h"]h$]h&]uh1jhj? ubeh}(h]h ]h"]h$]h&]uh1jmhjZ hMhj ubjn)}(h``size_t size`` size of buffer h](jt)}(h``size_t size``h]jz)}(hj~ h]h size_t size}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj| ubah}(h]h ]h"]h$]h&]uh1jshY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjx ubj)}(hhh]h)}(hsize of bufferh]hsize of buffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhj ubah}(h]h ]h"]h$]h&]uh1jhjx ubeh}(h]h ]h"]h$]h&]uh1jmhj hMhj ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubh)}(hUnpacks CTA-861-G DRM infoframe DataBytes contained in the binary **buffer** into a structured **frame** of the HDMI Dynamic Range and Mastering (DRM) infoframe.h](hBUnpacks CTA-861-G DRM infoframe DataBytes contained in the binary }(hj hhhNhNubj%)}(h **buffer**h]hbuffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh into a structured }(hj hhhNhNubj%)}(h **frame**h]hframe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh9 of the HDMI Dynamic Range and Mastering (DRM) infoframe.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubh)}(h9Returns 0 on success or a negative error code on failure.h]h9Returns 0 on success or a negative error code on failure.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj3hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"hdmi_infoframe_unpack (C function)c.hdmi_infoframe_unpackhNtauh1jxhj3hhhNhNubj)}(hhh](j)}(hXint hdmi_infoframe_unpack (union hdmi_infoframe *frame, const void *buffer, size_t size)h]j)}(hWint hdmi_infoframe_unpack(union hdmi_infoframe *frame, const void *buffer, size_t size)h](j)}(hinth]hint}(hj1!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-!hhhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMUubj)}(h h]h }(hj@!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-!hhhj?!hMUubj)}(hhdmi_infoframe_unpackh]j)}(hhdmi_infoframe_unpackh]hhdmi_infoframe_unpack}(hjR!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjN!ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj-!hhhj?!hMUubj)}(h>(union hdmi_infoframe *frame, const void *buffer, size_t size)h](j)}(hunion hdmi_infoframe *frameh](j)}(hjh]hunion}(hjn!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjj!ubj)}(h h]h }(hj{!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjj!ubh)}(hhh]j)}(hhdmi_infoframeh]hhdmi_infoframe}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!modnameN classnameNjj)}j]j)}jjT!sbc.hdmi_infoframe_unpackasbuh1hhjj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjj!ubj+)}(hj9h]h*}(hj!hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjj!ubj)}(hframeh]hframe}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjf!ubj)}(hconst void *bufferh](j)}(hjUh]hconst}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(hvoidh]hvoid}(hj!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj)}(h h]h }(hj "hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubj+)}(hj9h]h*}(hj"hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj!ubj)}(hbufferh]hbuffer}(hj$"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjf!ubj)}(h size_t sizeh](h)}(hhh]j)}(hsize_th]hsize_t}(hj@"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj="ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjB"modnameN classnameNjj)}j]j!c.hdmi_infoframe_unpackasbuh1hhj9"ubj)}(h h]h }(hj^"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9"ubj)}(hsizeh]hsize}(hjl"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj9"ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjf!ubeh}(h]h ]h"]h$]h&]jjuh1jhj-!hhhj?!hMUubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj)!hhhj?!hMUubah}(h]j$!ah ](jjeh"]h$]h&]jj)jhuh1jhj?!hMUhj&!hhubj)}(hhh]h)}(h(unpack binary buffer to a HDMI infoframeh]h(unpack binary buffer to a HDMI infoframe}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhY/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:422: ./drivers/video/hdmi.chMUhj"hhubah}(h]h ]h"]h$]h&]uh1jhj&!hhhj?!hMUubeh}(h]h ](jfunctioneh"]h$]h&]jjjj"jj"jjjuh1jhhhj3hNhNubj)}(hX**Parameters** ``union hdmi_infoframe *frame`` HDMI infoframe ``const void *buffer`` source buffer ``size_t size`` size of buffer **Description** Unpacks the information contained in binary buffer **buffer** into a structured **frame** of a HDMI infoframe. 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kernelindentah"]h$]h&]uh1jhj#hhhNhNubh)}(h**Description**h]j%)}(hj%h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhK-hj#hhubh)}(hNote that this must match the layout of struct drm_mode_rect or the damage helpers like drm_atomic_helper_damage_iter_init() break.h]hNote that this must match the layout of struct drm_mode_rect or the damage helpers like drm_atomic_helper_damage_iter_init() break.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhK*hj#hhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jDRM_RECT_INIT (C macro)c.DRM_RECT_INIThNtauh1jxhj#hhhNhNubj)}(hhh](j)}(h DRM_RECT_INITh]j)}(h DRM_RECT_INITh]j)}(h DRM_RECT_INITh]j)}(hj%h]h DRM_RECT_INIT}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj%hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: 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drm_rect}(hjQ*hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjM*ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_rectuh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKQhjE*ubh in 16.16 fixed point}(hjE*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjl*hKQhjA*ubah}(h]h ]h"]h$]h&]uh1jS=hjl*hKQhj#hhubj)}(h**Parameters** ``r`` rectangle struct **Description** This is useful for e.g. printing plane source rectangles, which are in 16.16 fixed point.h](h)}(h**Parameters**h]j%)}(hj*h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKUhj}*ubji)}(hhh]jn)}(h``r`` rectangle struct h](jt)}(h``r``h]jz)}(hj*h]hr}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKRhj*ubj)}(hhh]h)}(hrectangle structh]hrectangle struct}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj*hKRhj*ubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jmhj*hKRhj*ubah}(h]h ]h"]h$]h&]uh1jhhj}*ubh)}(h**Description**h]j%)}(hj*h]h Description}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj*ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKThj}*ubh)}(hYThis is useful for e.g. printing plane source rectangles, which are in 16.16 fixed point.h]hYThis is useful for e.g. printing plane source rectangles, which are in 16.16 fixed point.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKShj}*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_rect_init (C function)c.drm_rect_inithNtauh1jxhj#hhhNhNubj)}(hhh](j)}(hLvoid drm_rect_init (struct drm_rect *r, int x, int y, int width, int height)h]j)}(hKvoid drm_rect_init(struct drm_rect *r, int x, int y, int width, int height)h](j)}(hvoidh]hvoid}(hj"+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhK^ubj)}(h h]h }(hj1+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+hhhj0+hK^ubj)}(h drm_rect_inith]j)}(h drm_rect_inith]h drm_rect_init}(hjC+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?+ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj+hhhj0+hK^ubj)}(h9(struct drm_rect *r, int x, int y, int width, int height)h](j)}(hstruct drm_rect *rh](j)}(hjh]hstruct}(hj_+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[+ubj)}(h h]h }(hjl+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[+ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj}+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjz+ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj+modnameN classnameNjj)}j]j)}jjE+sbc.drm_rect_initasbuh1hhj[+ubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[+ubj+)}(hj9h]h*}(hj+hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj[+ubj)}(hrh]hr}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjW+ubj)}(hint xh](j)}(hinth]hint}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubj)}(hxh]hx}(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjW+ubj)}(hint yh](j)}(hinth]hint}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(hyh]hy}(hj",hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjW+ubj)}(h int widthh](j)}(hinth]hint}(hj;,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7,ubj)}(h h]h }(hjI,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7,ubj)}(hwidthh]hwidth}(hjW,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjW+ubj)}(h int heighth](j)}(hinth]hint}(hjp,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl,ubj)}(h h]h }(hj~,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl,ubj)}(hheighth]hheight}(hj,hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjl,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjW+ubeh}(h]h ]h"]h$]h&]jjuh1jhj+hhhj0+hK^ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj+hhhj0+hK^ubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1jhj0+hK^hj+hhubj)}(hhh]h)}(h%initialize the rectangle from x/y/w/hh]h%initialize the rectangle from x/y/w/h}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhK^hj,hhubah}(h]h ]h"]h$]h&]uh1jhj+hhhj0+hK^ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj,jj,jjjuh1jhhhj#hNhNubj)}(h**Parameters** ``struct drm_rect *r`` rectangle ``int x`` x coordinate ``int y`` y coordinate ``int width`` width ``int height`` heighth](h)}(h**Parameters**h]j%)}(hj,h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj,ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKbhj,ubji)}(hhh](jn)}(h!``struct drm_rect *r`` rectangle h](jt)}(h``struct drm_rect *r``h]jz)}(hj,h]hstruct drm_rect *r}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj,ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhK_hj,ubj)}(hhh]h)}(h rectangleh]h rectangle}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj -hK_hj -ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jmhj -hK_hj,ubjn)}(h``int x`` x coordinate h](jt)}(h ``int x``h]jz)}(hj0-h]hint x}(hj2-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj.-ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhK`hj*-ubj)}(hhh]h)}(h x coordinateh]h x coordinate}(hjI-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjE-hK`hjF-ubah}(h]h ]h"]h$]h&]uh1jhj*-ubeh}(h]h ]h"]h$]h&]uh1jmhjE-hK`hj,ubjn)}(h``int y`` y coordinate h](jt)}(h ``int y``h]jz)}(hji-h]hint y}(hjk-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjg-ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKahjc-ubj)}(hhh]h)}(h y coordinateh]h y coordinate}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~-hKahj-ubah}(h]h ]h"]h$]h&]uh1jhjc-ubeh}(h]h ]h"]h$]h&]uh1jmhj~-hKahj,ubjn)}(h``int width`` width h](jt)}(h ``int width``h]jz)}(hj-h]h int width}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKbhj-ubj)}(hhh]h)}(hwidthh]hwidth}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKbhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jmhj-hKbhj,ubjn)}(h``int height`` heighth](jt)}(h``int height``h]jz)}(hj-h]h int height}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj-ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKdhj-ubj)}(hhh]h)}(hheighth]hheight}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKchj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jmhj-hKdhj,ubeh}(h]h ]h"]h$]h&]uh1jhhj,ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_rect_adjust_size (C function)c.drm_rect_adjust_sizehNtauh1jxhj#hhhNhNubj)}(hhh](j)}(h>void drm_rect_adjust_size (struct drm_rect *r, int dw, int dh)h]j)}(h=void drm_rect_adjust_size(struct drm_rect *r, int dw, int dh)h](j)}(hvoidh]hvoid}(hj5.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1.hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKoubj)}(h h]h }(hjD.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj1.hhhjC.hKoubj)}(hdrm_rect_adjust_sizeh]j)}(hdrm_rect_adjust_sizeh]hdrm_rect_adjust_size}(hjV.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjR.ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj1.hhhjC.hKoubj)}(h$(struct drm_rect *r, int dw, int dh)h](j)}(hstruct drm_rect *rh](j)}(hjh]hstruct}(hjr.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn.ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj.modnameN classnameNjj)}j]j)}jjX.sbc.drm_rect_adjust_sizeasbuh1hhjn.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn.ubj+)}(hj9h]h*}(hj.hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjn.ubj)}(hj+h]hr}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjn.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjj.ubj)}(hint dwh](j)}(hinth]hint}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(h h]h }(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubj)}(hdwh]hdw}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjj.ubj)}(hint dhh](j)}(hinth]hint}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj&/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(hdhh]hdh}(hj4/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjj.ubeh}(h]h ]h"]h$]h&]jjuh1jhj1.hhhjC.hKoubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj-.hhhjC.hKoubah}(h]j(.ah ](jjeh"]h$]h&]jj)jhuh1jhjC.hKohj*.hhubj)}(hhh]h)}(h adjust the size of the rectangleh]h adjust the size of the rectangle}(hj^/hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKohj[/hhubah}(h]h ]h"]h$]h&]uh1jhj*.hhhjC.hKoubeh}(h]h ](jfunctioneh"]h$]h&]jjjjv/jjv/jjjuh1jhhhj#hNhNubj)}(hX**Parameters** ``struct drm_rect *r`` rectangle to be adjusted ``int dw`` horizontal adjustment ``int dh`` vertical adjustment **Description** Change the size of rectangle **r** by **dw** in the horizontal direction, and by **dh** in the vertical direction, while keeping the center of **r** stationary. Positive **dw** and **dh** increase the size, negative values decrease it.h](h)}(h**Parameters**h]j%)}(hj/h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj~/ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKshjz/ubji)}(hhh](jn)}(h0``struct drm_rect *r`` rectangle to be adjusted h](jt)}(h``struct drm_rect *r``h]jz)}(hj/h]hstruct drm_rect *r}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKphj/ubj)}(hhh]h)}(hrectangle to be adjustedh]hrectangle to be adjusted}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hKphj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhj/hKphj/ubjn)}(h!``int dw`` horizontal adjustment h](jt)}(h ``int dw``h]jz)}(hj/h]hint dw}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKqhj/ubj)}(hhh]h)}(hhorizontal adjustmenth]hhorizontal adjustment}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hKqhj/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jmhj/hKqhj/ubjn)}(h``int dh`` vertical adjustment h](jt)}(h ``int dh``h]jz)}(hj0h]hint dh}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj0ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKrhj 0ubj)}(hhh]h)}(hvertical adjustmenth]hvertical adjustment}(hj*0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&0hKrhj'0ubah}(h]h ]h"]h$]h&]uh1jhj 0ubeh}(h]h ]h"]h$]h&]uh1jmhj&0hKrhj/ubeh}(h]h ]h"]h$]h&]uh1jhhjz/ubh)}(h**Description**h]j%)}(hjL0h]h Description}(hjN0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJ0ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKthjz/ubh)}(hChange the size of rectangle **r** by **dw** in the horizontal direction, and by **dh** in the vertical direction, while keeping the center of **r** stationary.h](hChange the size of rectangle }(hjb0hhhNhNubj%)}(h**r**h]hr}(hjj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjb0ubh by }(hjb0hhhNhNubj%)}(h**dw**h]hdw}(hj|0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjb0ubh% in the horizontal direction, and by }(hjb0hhhNhNubj%)}(h**dh**h]hdh}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjb0ubh8 in the vertical direction, while keeping the center of }(hjb0hhhNhNubj%)}(h**r**h]hr}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjb0ubh stationary.}(hjb0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKshjz/ubh)}(hJPositive **dw** and **dh** increase the size, negative values decrease it.h](h Positive }(hj0hhhNhNubj%)}(h**dw**h]hdw}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubh and }(hj0hhhNhNubj%)}(h**dh**h]hdh}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj0ubh0 increase the size, negative values decrease it.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKwhjz/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_rect_translate (C function)c.drm_rect_translatehNtauh1jxhj#hhhNhNubj)}(hhh](j)}(hhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj%>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj">ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj'>modnameN classnameNjj)}j]j)}jj=sbc.drm_rect_equalsasbuh1hhj=ubj)}(h h]h }(hjE>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubj+)}(hj9h]h*}(hjS>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj=ubj)}(hr1h]hr1}(hj`>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=ubj)}(hconst struct drm_rect *r2h](j)}(hjUh]hconst}(hjy>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju>ubj)}(hjh]hstruct}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju>ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj>modnameN classnameNjj)}j]jA>c.drm_rect_equalsasbuh1hhju>ubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju>ubj+)}(hj9h]h*}(hj>hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hju>ubj)}(hr2h]hr2}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhju>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=ubeh}(h]h ]h"]h$]h&]jjuh1jhj=hhhj=hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj=hhhj=hKubah}(h]j=ah ](jjeh"]h$]h&]jj)jhuh1jhj=hKhj=hhubj)}(hhh]h)}(h%determine if two rectangles are equalh]h%determine if two rectangles are equal}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhj?hhubah}(h]h ]h"]h$]h&]uh1jhj=hhhj=hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjj-?jj-?jjjuh1jhhhj#hNhNubj)}(h**Parameters** ``const struct drm_rect *r1`` first rectangle ``const struct drm_rect *r2`` second rectangle **Return** ``true`` if the rectangles are equal, ``false`` otherwise.h](h)}(h**Parameters**h]j%)}(hj7?h]h Parameters}(hj9?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5?ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhj1?ubji)}(hhh](jn)}(h.``const struct drm_rect *r1`` first rectangle h](jt)}(h``const struct drm_rect *r1``h]jz)}(hjV?h]hconst struct drm_rect *r1}(hjX?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjT?ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjP?ubj)}(hhh]h)}(hfirst rectangleh]hfirst rectangle}(hjo?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjk?hKhjl?ubah}(h]h ]h"]h$]h&]uh1jhjP?ubeh}(h]h ]h"]h$]h&]uh1jmhjk?hKhjM?ubjn)}(h/``const struct drm_rect *r2`` second rectangle h](jt)}(h``const struct drm_rect *r2``h]jz)}(hj?h]hconst struct drm_rect *r2}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhj?ubj)}(hhh]h)}(hsecond rectangleh]hsecond rectangle}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hKhj?ubah}(h]h ]h"]h$]h&]uh1jhj?ubeh}(h]h ]h"]h$]h&]uh1jmhj?hKhjM?ubeh}(h]h ]h"]h$]h&]uh1jhhj1?ubh)}(h **Return**h]j%)}(hj?h]hReturn}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?ubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhj1?ubh)}(h:``true`` if the rectangles are equal, ``false`` otherwise.h](jz)}(h``true``h]htrue}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubh if the rectangles are equal, }(hj?hhhNhNubjz)}(h ``false``h]hfalse}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?ubh otherwise.}(hj?hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhj1?ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_rect_fp_to_int (C function)c.drm_rect_fp_to_inthNtauh1jxhj#hhhNhNubj)}(hhh](j)}(hJvoid drm_rect_fp_to_int (struct drm_rect *dst, const struct drm_rect *src)h]j)}(hIvoid drm_rect_fp_to_int(struct drm_rect *dst, const struct drm_rect *src)h](j)}(hvoidh]hvoid}(hj/@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+@hhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKubj)}(h h]h }(hj>@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj+@hhhj=@hKubj)}(hdrm_rect_fp_to_inth]j)}(hdrm_rect_fp_to_inth]hdrm_rect_fp_to_int}(hjP@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjL@ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj+@hhhj=@hKubj)}(h2(struct drm_rect *dst, const struct drm_rect *src)h](j)}(hstruct drm_rect *dsth](j)}(hjh]hstruct}(hjl@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjh@ubj)}(h h]h }(hjy@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjh@ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj@modnameN classnameNjj)}j]j)}jjR@sbc.drm_rect_fp_to_intasbuh1hhjh@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjh@ubj+)}(hj9h]h*}(hj@hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjh@ubj)}(hdsth]hdst}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjh@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjd@ubj)}(hconst struct drm_rect *srch](j)}(hjUh]hconst}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(hjh]hstruct}(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj)}(h h]h }(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjAmodnameN classnameNjj)}j]j@c.drm_rect_fp_to_intasbuh1hhj@ubj)}(h h]h }(hj5AhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubj+)}(hj9h]h*}(hjCAhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj@ubj)}(hsrch]hsrc}(hjPAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjd@ubeh}(h]h ]h"]h$]h&]jjuh1jhj+@hhhj=@hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj'@hhhj=@hKubah}(h]j"@ah ](jjeh"]h$]h&]jj)jhuh1jhj=@hKhj$@hhubj)}(hhh]h)}(h5Convert a rect in 16.16 fixed point form to int form.h]h5Convert a rect in 16.16 fixed point form to int form.}(hjzAhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjwAhhubah}(h]h ]h"]h$]h&]uh1jhj$@hhhj=@hKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjAjjAjjjuh1jhhhj#hNhNubj)}(h**Parameters** ``struct drm_rect *dst`` rect to be stored the converted value ``const struct drm_rect *src`` rect in 16.16 fixed point formh](h)}(h**Parameters**h]j%)}(hjAh]h Parameters}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjAubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjAubji)}(hhh](jn)}(h?``struct drm_rect *dst`` rect to be stored the converted value h](jt)}(h``struct drm_rect *dst``h]jz)}(hjAh]hstruct drm_rect *dst}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjAubj)}(hhh]h)}(h%rect to be stored the converted valueh]h%rect to be stored the converted value}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjAhKhjAubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jmhjAhKhjAubjn)}(h=``const struct drm_rect *src`` rect in 16.16 fixed point formh](jt)}(h``const struct drm_rect *src``h]jz)}(hjAh]hconst struct drm_rect *src}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjAubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjAubj)}(hhh]h)}(hrect in 16.16 fixed point formh]hrect in 16.16 fixed point form}(hj BhhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhj Bubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jmhj BhKhjAubeh}(h]h ]h"]h$]h&]uh1jhhjAubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_rect_overlap (C function)c.drm_rect_overlaphNtauh1jxhj#hhhNhNubj)}(hhh](j)}(hJbool drm_rect_overlap (const struct drm_rect *a, const struct drm_rect *b)h]j)}(hIbool drm_rect_overlap(const struct drm_rect *a, const struct drm_rect *b)h](j)}(hjAh]hbool}(hjNBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJBhhh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKubj)}(h h]h }(hj\BhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJBhhhj[BhKubj)}(hdrm_rect_overlaph]j)}(hdrm_rect_overlaph]hdrm_rect_overlap}(hjnBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjBubah}(h]h ](jjeh"]h$]h&]jjuh1jhjJBhhhj[BhKubj)}(h4(const struct drm_rect *a, const struct drm_rect *b)h](j)}(hconst struct drm_rect *ah](j)}(hjUh]hconst}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(hjh]hstruct}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjBmodnameN classnameNjj)}j]j)}jjpBsbc.drm_rect_overlapasbuh1hhjBubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubj+)}(hj9h]h*}(hjBhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjBubj)}(hah]ha}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjBubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjBubj)}(hconst struct drm_rect *bh](j)}(hjUh]hconst}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hj$ChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(hjh]hstruct}(hj2ChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hj?ChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjPChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMCubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjRCmodnameN classnameNjj)}j]jBc.drm_rect_overlapasbuh1hhjCubj)}(h h]h }(hjnChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj+)}(hj9h]h*}(hj|ChhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjCubj)}(hbh]hb}(hjChhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjBubeh}(h]h ]h"]h$]h&]jjuh1jhjJBhhhj[BhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjFBhhhj[BhKubah}(h]jABah ](jjeh"]h$]h&]jj)jhuh1jhj[BhKhjCBhhubj)}(hhh]h)}(hCheck if two rectangles overlaph]hCheck if two rectangles overlap}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjChhubah}(h]h ]h"]h$]h&]uh1jhjCBhhhj[BhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjCjjCjjjuh1jhhhj#hNhNubj)}(h**Parameters** ``const struct drm_rect *a`` first rectangle ``const struct drm_rect *b`` second rectangle **Return** ``true`` if the rectangles overlap, ``false`` otherwise.h](h)}(h**Parameters**h]j%)}(hjCh]h Parameters}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjCubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjCubji)}(hhh](jn)}(h-``const struct drm_rect *a`` first rectangle h](jt)}(h``const struct drm_rect *a``h]jz)}(hjCh]hconst struct drm_rect *a}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjCubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjCubj)}(hhh]h)}(hfirst rectangleh]hfirst rectangle}(hj DhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj DhKhj Dubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jmhj DhKhjCubjn)}(h.``const struct drm_rect *b`` second rectangle h](jt)}(h``const struct drm_rect *b``h]jz)}(hj-Dh]hconst struct drm_rect *b}(hj/DhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj+Dubah}(h]h ]h"]h$]h&]uh1jsh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhj'Dubj)}(hhh]h)}(hsecond rectangleh]hsecond rectangle}(hjFDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjBDhKhjCDubah}(h]h ]h"]h$]h&]uh1jhj'Dubeh}(h]h ]h"]h$]h&]uh1jmhjBDhKhjCubeh}(h]h ]h"]h$]h&]uh1jhhjCubh)}(h **Return**h]j%)}(hjhDh]hReturn}(hjjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjfDubah}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjCubh)}(h8``true`` if the rectangles overlap, ``false`` otherwise.h](jz)}(h``true``h]htrue}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~Dubh if the rectangles overlap, }(hj~DhhhNhNubjz)}(h ``false``h]hfalse}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~Dubh otherwise.}(hj~DhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh[/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:431: ./include/drm/drm_rect.hhKhjCubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_rect_intersect (C function)c.drm_rect_intersecthNtauh1jxhj#hhhNhNubj)}(hhh](j)}(hHbool drm_rect_intersect (struct drm_rect *r1, const struct drm_rect *r2)h]j)}(hGbool drm_rect_intersect(struct drm_rect *r1, const struct drm_rect *r2)h](j)}(hjAh]hbool}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK!ubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDhhhjDhK!ubj)}(hdrm_rect_intersecth]j)}(hdrm_rect_intersecth]hdrm_rect_intersect}(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjDubah}(h]h ](jjeh"]h$]h&]jjuh1jhjDhhhjDhK!ubj)}(h0(struct drm_rect *r1, const struct drm_rect *r2)h](j)}(hstruct drm_rect *r1h](j)}(hjh]hstruct}(hj EhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hj'EhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj$Eubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj)EmodnameN classnameNjj)}j]j)}jjDsbc.drm_rect_intersectasbuh1hhjEubj)}(h h]h }(hjGEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubj+)}(hj9h]h*}(hjUEhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjEubj)}(hr1h]hr1}(hjbEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubj)}(hconst struct drm_rect *r2h](j)}(hjUh]hconst}(hj{EhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwEubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwEubj)}(hjh]hstruct}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwEubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwEubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjEmodnameN classnameNjj)}j]jCEc.drm_rect_intersectasbuh1hhjwEubj)}(h h]h }(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwEubj+)}(hj9h]h*}(hjEhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjwEubj)}(hr2h]hr2}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwEubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjEubeh}(h]h ]h"]h$]h&]jjuh1jhjDhhhjDhK!ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjDhhhjDhK!ubah}(h]jDah ](jjeh"]h$]h&]jj)jhuh1jhjDhK!hjDhhubj)}(hhh]h)}(hintersect two rectanglesh]hintersect two rectangles}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK!hjFhhubah}(h]h ]h"]h$]h&]uh1jhjDhhhjDhK!ubeh}(h]h ](jfunctioneh"]h$]h&]jjjj/Fjj/Fjjjuh1jhhhj#hNhNubj)}(hXP**Parameters** ``struct drm_rect *r1`` first rectangle ``const struct drm_rect *r2`` second rectangle **Description** Calculate the intersection of rectangles **r1** and **r2**. **r1** will be overwritten with the intersection. **Return** ``true`` if rectangle **r1** is still visible after the operation, ``false`` otherwise.h](h)}(h**Parameters**h]j%)}(hj9Fh]h Parameters}(hj;FhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7Fubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK%hj3Fubji)}(hhh](jn)}(h(``struct drm_rect *r1`` first rectangle h](jt)}(h``struct drm_rect *r1``h]jz)}(hjXFh]hstruct drm_rect *r1}(hjZFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjVFubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK"hjRFubj)}(hhh]h)}(hfirst rectangleh]hfirst rectangle}(hjqFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmFhK"hjnFubah}(h]h ]h"]h$]h&]uh1jhjRFubeh}(h]h ]h"]h$]h&]uh1jmhjmFhK"hjOFubjn)}(h/``const struct drm_rect *r2`` second rectangle h](jt)}(h``const struct drm_rect *r2``h]jz)}(hjFh]hconst struct drm_rect *r2}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjFubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK#hjFubj)}(hhh]h)}(hsecond rectangleh]hsecond rectangle}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhK#hjFubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jmhjFhK#hjOFubeh}(h]h ]h"]h$]h&]uh1jhhj3Fubh)}(h**Description**h]j%)}(hjFh]h Description}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK%hj3Fubh)}(hmCalculate the intersection of rectangles **r1** and **r2**. **r1** will be overwritten with the intersection.h](h)Calculate the intersection of rectangles }(hjFhhhNhNubj%)}(h**r1**h]hr1}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubh and }(hjFhhhNhNubj%)}(h**r2**h]hr2}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubh. }(hjFhhhNhNubj%)}(h**r1**h]hr1}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFubh+ will be overwritten with the intersection.}(hjFhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK$hj3Fubh)}(h **Return**h]j%)}(hj)Gh]hReturn}(hj+GhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'Gubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK'hj3Fubh)}(hW``true`` if rectangle **r1** is still visible after the operation, ``false`` otherwise.h](jz)}(h``true``h]htrue}(hjCGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?Gubh if rectangle }(hj?GhhhNhNubj%)}(h**r1**h]hr1}(hjUGhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj?Gubh' is still visible after the operation, }(hj?GhhhNhNubjz)}(h ``false``h]hfalse}(hjgGhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj?Gubh otherwise.}(hj?GhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chK(hj3Fubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_rect_clip_scaled (C function)c.drm_rect_clip_scaledhNtauh1jxhj#hhhNhNubj)}(hhh](j)}(hcbool drm_rect_clip_scaled (struct drm_rect *src, struct drm_rect *dst, const struct drm_rect *clip)h]j)}(hbbool drm_rect_clip_scaled(struct drm_rect *src, struct drm_rect *dst, const struct drm_rect *clip)h](j)}(hjAh]hbool}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKNubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGhhhjGhKNubj)}(hdrm_rect_clip_scaledh]j)}(hdrm_rect_clip_scaledh]hdrm_rect_clip_scaled}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ](jjeh"]h$]h&]jjuh1jhjGhhhjGhKNubj)}(hI(struct drm_rect *src, struct drm_rect *dst, const struct drm_rect *clip)h](j)}(hstruct drm_rect *srch](j)}(hjh]hstruct}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjGmodnameN classnameNjj)}j]j)}jjGsbc.drm_rect_clip_scaledasbuh1hhjGubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubj+)}(hj9h]h*}(hj(HhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjGubj)}(hsrch]hsrc}(hj5HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjGubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjGubj)}(hstruct drm_rect *dsth](j)}(hjh]hstruct}(hjNHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJHubj)}(h h]h }(hj[HhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJHubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjlHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiHubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjnHmodnameN classnameNjj)}j]jHc.drm_rect_clip_scaledasbuh1hhjJHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJHubj+)}(hj9h]h*}(hjHhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjJHubj)}(hdsth]hdst}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjJHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjGubj)}(hconst struct drm_rect *cliph](j)}(hjUh]hconst}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hjh]hstruct}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubh)}(hhh]j)}(hdrm_recth]hdrm_rect}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjHmodnameN classnameNjj)}j]jHc.drm_rect_clip_scaledasbuh1hhjHubj)}(h h]h }(hjIhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj+)}(hj9h]h*}(hj#IhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjHubj)}(hcliph]hclip}(hj0IhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjGubeh}(h]h ]h"]h$]h&]jjuh1jhjGhhhjGhKNubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjGhhhjGhKNubah}(h]jGah ](jjeh"]h$]h&]jj)jhuh1jhjGhKNhjGhhubj)}(hhh]h)}(hperform a scaled clip operationh]hperform a scaled clip operation}(hjZIhhhNhNubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKNhjWIhhubah}(h]h ]h"]h$]h&]uh1jhjGhhhjGhKNubeh}(h]h ](jfunctioneh"]h$]h&]jjjjrIjjrIjjjuh1jhhhj#hNhNubj)}(hX**Parameters** ``struct drm_rect *src`` source window rectangle ``struct drm_rect *dst`` destination window rectangle ``const struct drm_rect *clip`` clip rectangle **Description** Clip rectangle **dst** by rectangle **clip**. Clip rectangle **src** by the corresponding amounts, retaining the vertical and horizontal scaling factors from **src** to **dst**. **Return** ``true`` if rectangle **dst** is still visible after being clipped, ``false`` otherwise.h](h)}(h**Parameters**h]j%)}(hj|Ih]h Parameters}(hj~IhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzIubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKRhjvIubji)}(hhh](jn)}(h1``struct drm_rect *src`` source window rectangle h](jt)}(h``struct drm_rect *src``h]jz)}(hjIh]hstruct drm_rect *src}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKOhjIubj)}(hhh]h)}(hsource window rectangleh]hsource window rectangle}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhKOhjIubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjIhKOhjIubjn)}(h6``struct drm_rect *dst`` destination window rectangle h](jt)}(h``struct drm_rect *dst``h]jz)}(hjIh]hstruct drm_rect *dst}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjIubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKPhjIubj)}(hhh]h)}(hdestination window rectangleh]hdestination window rectangle}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhKPhjIubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjIhKPhjIubjn)}(h/``const struct drm_rect *clip`` clip rectangle h](jt)}(h``const struct drm_rect *clip``h]jz)}(hj Jh]hconst struct drm_rect *clip}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj Jubah}(h]h ]h"]h$]h&]uh1jsh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKQhjJubj)}(hhh]h)}(hclip rectangleh]hclip rectangle}(hj&JhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj"JhKQhj#Jubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jmhj"JhKQhjIubeh}(h]h ]h"]h$]h&]uh1jhhjvIubh)}(h**Description**h]j%)}(hjHJh]h Description}(hjJJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjFJubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKShjvIubh)}(hClip rectangle **dst** by rectangle **clip**. Clip rectangle **src** by the corresponding amounts, retaining the vertical and horizontal scaling factors from **src** to **dst**.h](hClip rectangle }(hj^JhhhNhNubj%)}(h**dst**h]hdst}(hjfJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^Jubh by rectangle }(hj^JhhhNhNubj%)}(h**clip**h]hclip}(hjxJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^Jubh. Clip rectangle }(hj^JhhhNhNubj%)}(h**src**h]hsrc}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^JubhZ by the corresponding amounts, retaining the vertical and horizontal scaling factors from }(hj^JhhhNhNubj%)}(h**src**h]hsrc}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^Jubh to }(hj^JhhhNhNubj%)}(h**dst**h]hdst}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj^Jubh.}(hj^JhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKRhjvIubh)}(h **Return**h]j%)}(hjJh]hReturn}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKVhjvIubh)}(hX``true`` if rectangle **dst** is still visible after being clipped, ``false`` otherwise.h](jz)}(h``true``h]htrue}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubh if rectangle }(hjJhhhNhNubj%)}(h**dst**h]hdst}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubh' is still visible after being clipped, }(hjJhhhNhNubjz)}(h ``false``h]hfalse}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubh otherwise.}(hjJhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh_/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:434: ./drivers/gpu/drm/drm_rect.chKWhjvIubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj#hhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_rect_calc_hscale (C function)c.drm_rect_calc_hscalehNtauh1jxhj#hhhNhNubj)}(hhh](j)}(hqint drm_rect_calc_hscale (const struct drm_rect *src, const struct drm_rect *dst, int min_hscale, int max_hscale)h]j)}(hpint drm_rect_calc_hscale(const struct drm_rect *src, const struct drm_rect *dst, int min_hscale, int max_hscale)h](j)}(hinth]hint}(hj@KhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:\ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj\hhhj+\hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj\hhhj+\hKubah}(h]j\ah ](jjeh"]h$]h&]jj)jhuh1jhj+\hKhj\hhubj)}(hhh]h)}(hflip work queueh]hflip work queue}(hj`\hhhNhNubah}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:443: ./include/drm/drm_flip_work.hhK6hj]\hhubah}(h]h ]h"]h$]h&]uh1jhj\hhhj+\hKubeh}(h]h ](jstructeh"]h$]h&]jjjjx\jjx\jjjuh1jhhhj[hNhNubj)}(hX**Definition**:: struct drm_flip_work { const char *name; drm_flip_func_t func; struct work_struct worker; struct list_head queued; struct list_head commited; spinlock_t lock; }; **Members** ``name`` debug name ``func`` callback fxn called for each committed item ``worker`` worker which calls **func** ``queued`` queued tasks ``commited`` commited tasks ``lock`` lock to access queued and commited listsh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj\ubh:}(hj\hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:443: ./include/drm/drm_flip_work.hhK:hj|\ubj@)}(hstruct drm_flip_work { const char *name; drm_flip_func_t func; struct work_struct worker; struct list_head queued; struct list_head commited; spinlock_t lock; };h]hstruct drm_flip_work { const char *name; drm_flip_func_t func; struct work_struct worker; struct list_head queued; struct list_head commited; spinlock_t lock; };}hj\sbah}(h]h ]h"]h$]h&]jjuh1j?h`/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:443: ./include/drm/drm_flip_work.hhK`, which encapsulates the above limitations into a nice interface. **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j%)}(hjmh]h Parameters}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chK{hjmubji)}(hhh](jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjmh]hstruct drm_device *dev}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKxhjmubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjmhKxhjmubah}(h]h ]h"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]uh1jmhjmhKxhjmubjn)}(h.``struct drm_crtc *crtc`` CRTC object to init h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hj!nh]hstruct drm_crtc *crtc}(hj#nhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKyhjnubj)}(hhh]h)}(hCRTC object to inith]hCRTC object to init}(hj:nhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj6nhKyhj7nubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhj6nhKyhjmubjn)}(hB``const struct drm_crtc_funcs *funcs`` callbacks for the new CRTC h](jt)}(h&``const struct drm_crtc_funcs *funcs``h]jz)}(hjZnh]h"const struct drm_crtc_funcs *funcs}(hj\nhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjXnubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKzhjTnubj)}(hhh]h)}(hcallbacks for the new CRTCh]hcallbacks for the new CRTC}(hjsnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjonhKzhjpnubah}(h]h ]h"]h$]h&]uh1jhjTnubeh}(h]h ]h"]h$]h&]uh1jmhjonhKzhjmubeh}(h]h ]h"]h$]h&]uh1jhhjmubh)}(h**Description**h]j%)}(hjnh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjnubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chK|hjmubh)}(hZInitialize a CRTC object with a default helper-provided primary plane and no cursor plane.h]hZInitialize a CRTC object with a default helper-provided primary plane and no cursor plane.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chK{hjmubh)}(hdNote that we make some assumptions about hardware limitations that may not be true for all hardware:h]hdNote that we make some assumptions about hardware limitations that may not be true for all hardware:}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chK~hjmubjCH)}(hhh](h)}(h%Primary plane cannot be repositioned.h]h)}(hjnh]h%Primary plane cannot be repositioned.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjnubah}(h]h ]h"]h$]h&]uh1hhjnubh)}(hPrimary plane cannot be scaled.h]h)}(hjnh]hPrimary plane cannot be scaled.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjnubah}(h]h ]h"]h$]h&]uh1hhjnubh)}(h)Primary plane must cover the entire CRTC.h]h)}(hjnh]h)Primary plane must cover the entire CRTC.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjnubah}(h]h ]h"]h$]h&]uh1hhjnubh)}(h&Subpixel positioning is not supported.h]h)}(hjoh]h&Subpixel positioning is not supported.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjoubah}(h]h ]h"]h$]h&]uh1hhjnubh)}(h`, which encapsulates the above limitations into a nice interface.h](hThis is purely a backwards compatibility helper for old drivers. Drivers should instead implement their own primary plane. Atomic drivers must do so. Drivers with the above hardware restriction can look into using }(hjKohhhNhNubh)}(hB:c:type:`struct drm_simple_display_pipe `h]jz)}(hjUoh]hstruct drm_simple_display_pipe}(hjWohhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjSoubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_simple_display_pipeuh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjKoubhA, which encapsulates the above limitations into a nice interface.}(hjKohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjrohKhjmubh)}(h **Return**h]j%)}(hjoh]hReturn}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj}oubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjmubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjmubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjfhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_mode_config_helper_suspend (C function) c.drm_mode_config_helper_suspendhNtauh1jxhjfhhhNhNubj)}(hhh](j)}(h;int drm_mode_config_helper_suspend (struct drm_device *dev)h]j)}(h:int drm_mode_config_helper_suspend(struct drm_device *dev)h](j)}(hinth]hint}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhjohKubj)}(hdrm_mode_config_helper_suspendh]j)}(hdrm_mode_config_helper_suspendh]hdrm_mode_config_helper_suspend}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubah}(h]h ](jjeh"]h$]h&]jjuh1jhjohhhjohKubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj!pmodnameN classnameNjj)}j]j)}jjosb c.drm_mode_config_helper_suspendasbuh1hhjoubj)}(h h]h }(hj?phhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubj+)}(hj9h]h*}(hjMphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjoubj)}(hdevh]hdev}(hjZphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjoubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjoubah}(h]h ]h"]h$]h&]jjuh1jhjohhhjohKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjohhhjohKubah}(h]joah ](jjeh"]h$]h&]jj)jhuh1jhjohKhjohhubj)}(hhh]h)}(hModeset suspend helperh]hModeset suspend helper}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjphhubah}(h]h ]h"]h$]h&]uh1jhjohhhjohKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjpjjpjjjuh1jhhhjfhNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device **Description** This helper function takes care of suspending the modeset side. It disables output polling if initialized, suspends fbdev if used and finally calls drm_atomic_helper_suspend(). If suspending fails, fbdev and polling is re-enabled. See also: drm_kms_helper_poll_disable() and drm_client_dev_suspend(). **Return** Zero on success, negative error code on error.h](h)}(h**Parameters**h]j%)}(hjph]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjpubji)}(hhh]jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjph]hstruct drm_device *dev}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjpubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhjphKhjpubah}(h]h ]h"]h$]h&]uh1jhjpubeh}(h]h ]h"]h$]h&]uh1jmhjphKhjpubah}(h]h ]h"]h$]h&]uh1jhhjpubh)}(h**Description**h]j%)}(hjqh]h Description}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjpubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjpubh)}(hThis helper function takes care of suspending the modeset side. It disables output polling if initialized, suspends fbdev if used and finally calls drm_atomic_helper_suspend(). If suspending fails, fbdev and polling is re-enabled.h]hThis helper function takes care of suspending the modeset side. It disables output polling if initialized, suspends fbdev if used and finally calls drm_atomic_helper_suspend(). If suspending fails, fbdev and polling is re-enabled.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjpubh)}(hESee also: drm_kms_helper_poll_disable() and drm_client_dev_suspend().h]hESee also: drm_kms_helper_poll_disable() and drm_client_dev_suspend().}(hj%qhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjpubh)}(h **Return**h]j%)}(hj6qh]hReturn}(hj8qhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj4qubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjpubh)}(h.Zero on success, negative error code on error.h]h.Zero on success, negative error code on error.}(hjLqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjfhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_mode_config_helper_resume (C function)c.drm_mode_config_helper_resumehNtauh1jxhjfhhhNhNubj)}(hhh](j)}(h:int drm_mode_config_helper_resume (struct drm_device *dev)h]j)}(h9int drm_mode_config_helper_resume(struct drm_device *dev)h](j)}(hinth]hint}(hj{qhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwqhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwqhhhjqhKubj)}(hdrm_mode_config_helper_resumeh]j)}(hdrm_mode_config_helper_resumeh]hdrm_mode_config_helper_resume}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ](jjeh"]h$]h&]jjuh1jhjwqhhhjqhKubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjqmodnameN classnameNjj)}j]j)}jjqsbc.drm_mode_config_helper_resumeasbuh1hhjqubj)}(h h]h }(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj+)}(hj9h]h*}(hjrhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjqubj)}(hdevh]hdev}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjqubah}(h]h ]h"]h$]h&]jjuh1jhjwqhhhjqhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjsqhhhjqhKubah}(h]jnqah ](jjeh"]h$]h&]jj)jhuh1jhjqhKhjpqhhubj)}(hhh]h)}(hModeset resume helperh]hModeset resume helper}(hj;rhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhj8rhhubah}(h]h ]h"]h$]h&]uh1jhjpqhhhjqhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjSrjjSrjjjuh1jhhhjfhNhNubj)}(hXn**Parameters** ``struct drm_device *dev`` DRM device **Description** This helper function takes care of resuming the modeset side. It calls drm_atomic_helper_resume(), resumes fbdev if used and enables output polling if initiaized. See also: drm_client_dev_resume() and drm_kms_helper_poll_enable(). **Return** Zero on success, negative error code on error.h](h)}(h**Parameters**h]j%)}(hj]rh]h Parameters}(hj_rhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj[rubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjWrubji)}(hhh]jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hj|rh]hstruct drm_device *dev}(hj~rhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzrubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjvrubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhKhjrubah}(h]h ]h"]h$]h&]uh1jhjvrubeh}(h]h ]h"]h$]h&]uh1jmhjrhKhjsrubah}(h]h ]h"]h$]h&]uh1jhhjWrubh)}(h**Description**h]j%)}(hjrh]h Description}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjWrubh)}(hThis helper function takes care of resuming the modeset side. It calls drm_atomic_helper_resume(), resumes fbdev if used and enables output polling if initiaized.h]hThis helper function takes care of resuming the modeset side. It calls drm_atomic_helper_resume(), resumes fbdev if used and enables output polling if initiaized.}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjWrubh)}(hCSee also: drm_client_dev_resume() and drm_kms_helper_poll_enable().h]hCSee also: drm_client_dev_resume() and drm_kms_helper_poll_enable().}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjWrubh)}(h **Return**h]j%)}(hjrh]hReturn}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjrubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjWrubh)}(h.Zero on success, negative error code on error.h]h.Zero on success, negative error code on error.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:455: ./drivers/gpu/drm/drm_modeset_helper.chKhjWrubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjfhhhNhNubeh}(h]auxiliary-modeset-helpersah ]h"]auxiliary modeset helpersah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h OF/DT Helpersh]h OF/DT Helpers}(hj$shhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!shhhhhMubh)}(hOA set of helper functions to aid DRM drivers in parsing standard DT properties.h]hOA set of helper functions to aid DRM drivers in parsing standard DT properties.}(hj2shhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:461: ./drivers/gpu/drm/drm_of.chKhj!shhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j"drm_of_crtc_port_mask (C function)c.drm_of_crtc_port_maskhNtauh1jxhj!shhhNhNubj)}(hhh](j)}(hQuint32_t drm_of_crtc_port_mask (struct drm_device *dev, struct device_node *port)h]j)}(hPuint32_t drm_of_crtc_port_mask(struct drm_device *dev, struct device_node *port)h](h)}(hhh]j)}(huint32_th]huint32_t}(hj]shhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjZsubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj_smodnameN classnameNjj)}j]j)}jdrm_of_crtc_port_masksbc.drm_of_crtc_port_maskasbuh1hhjVshhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVshhhj~shKubj)}(hdrm_of_crtc_port_maskh]j)}(hj{sh]hdrm_of_crtc_port_mask}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ](jjeh"]h$]h&]jjuh1jhjVshhhj~shKubj)}(h2(struct drm_device *dev, struct device_node *port)h](j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjsmodnameN classnameNjj)}j]jysc.drm_of_crtc_port_maskasbuh1hhjsubj)}(h h]h }(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubj+)}(hj9h]h*}(hjshhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjsubj)}(hdevh]hdev}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjsubj)}(hstruct device_node *porth](j)}(hjh]hstruct}(hjthhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hj)thhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubh)}(hhh]j)}(h device_nodeh]h device_node}(hj:thhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7tubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubj+)}(hj9h]h*}(hjKyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubj)}(hcompareh]hcompare}(hjXyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj+)}(hjh]h)}(hjfyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubj+)}(hjh]h(}(hjsyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubj)}(hjh]hstruct}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubh)}(hhh]j)}(hdeviceh]hdevice}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjymodnameN classnameNjj)}j]jmxc.drm_of_component_match_addasbuh1hhjyubj+)}(hj9h]h*}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubj+)}(hjQh]h,}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj)}(hvoidh]hvoid}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjyubj+)}(hj9h]h*}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubj+)}(hjh]h)}(hjyhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjyubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj+xubj)}(hstruct device_node *nodeh](j)}(hjh]hstruct}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj)}(h h]h }(hj$zhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubh)}(hhh]j)}(h device_nodeh]h device_node}(hj5zhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2zubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj7zmodnameN classnameNjj)}j]jmxc.drm_of_component_match_addasbuh1hhjzubj)}(h h]h }(hjSzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubj+)}(hj9h]h*}(hjazhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjzubj)}(hnodeh]hnode}(hjnzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj+xubeh}(h]h ]h"]h$]h&]jjuh1jhjwhhhjxhKTubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjwhhhjxhKTubah}(h]jwah ](jjeh"]h$]h&]jj)jhuh1jhjxhKThjwhhubj)}(hhh]h)}(h)Add a component helper OF node match ruleh]h)Add a component helper OF node match rule}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKThjzhhubah}(h]h ]h"]h$]h&]uh1jhjwhhhjxhKTubeh}(h]h ](jfunctioneh"]h$]h&]jjjjzjjzjjjuh1jhhhj!shNhNubj)}(h**Parameters** ``struct device *master`` master device ``struct component_match **matchptr`` component match pointer ``int (*compare)(struct device *, void *)`` compare function used for matching component ``struct device_node *node`` of_nodeh](h)}(h**Parameters**h]j%)}(hjzh]h Parameters}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjzubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKXhjzubji)}(hhh](jn)}(h(``struct device *master`` master device h](jt)}(h``struct device *master``h]jz)}(hjzh]hstruct device *master}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjzubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKUhjzubj)}(hhh]h)}(h master deviceh]h master device}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhKUhjzubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhjzhKUhjzubjn)}(h>``struct component_match **matchptr`` component match pointer h](jt)}(h%``struct component_match **matchptr``h]jz)}(hj{h]h!struct component_match **matchptr}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKVhj {ubj)}(hhh]h)}(hcomponent match pointerh]hcomponent match pointer}(hj+{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'{hKVhj({ubah}(h]h ]h"]h$]h&]uh1jhj {ubeh}(h]h ]h"]h$]h&]uh1jmhj'{hKVhjzubjn)}(hY``int (*compare)(struct device *, void *)`` compare function used for matching component h](jt)}(h+``int (*compare)(struct device *, void *)``h]jz)}(hjK{h]h'int (*compare)(struct device *, void *)}(hjM{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjI{ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKWhjE{ubj)}(hhh]h)}(h,compare function used for matching componenth]h,compare function used for matching component}(hjd{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`{hKWhja{ubah}(h]h ]h"]h$]h&]uh1jhjE{ubeh}(h]h ]h"]h$]h&]uh1jmhj`{hKWhjzubjn)}(h$``struct device_node *node`` of_nodeh](jt)}(h``struct device_node *node``h]jz)}(hj{h]hstruct device_node *node}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKYhj~{ubj)}(hhh]h)}(hof_nodeh]hof_node}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKXhj{ubah}(h]h ]h"]h$]h&]uh1jhj~{ubeh}(h]h ]h"]h$]h&]uh1jmhj{hKYhjzubeh}(h]h ]h"]h$]h&]uh1jhhjzubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_of_component_probe (C function)c.drm_of_component_probehNtauh1jxhj!shhhNhNubj)}(hhh](j)}(hint drm_of_component_probe (struct device *dev, int (*compare_of)(struct device *, void *), const struct component_master_ops *m_ops)h]j)}(hint drm_of_component_probe(struct device *dev, int (*compare_of)(struct device*, void*), const struct component_master_ops *m_ops)h](j)}(hinth]hint}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKfubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{hhhj{hKfubj)}(hdrm_of_component_probeh]j)}(hdrm_of_component_probeh]hdrm_of_component_probe}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj{ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj{hhhj{hKfubj)}(hh(struct device *dev, int (*compare_of)(struct device*, void*), const struct component_master_ops *m_ops)h](j)}(hstruct device *devh](j)}(hjh]hstruct}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(h h]h }(hj(|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubh)}(hhh]j)}(hdeviceh]hdevice}(hj9|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6|ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj;|modnameN classnameNjj)}j]j)}jj|sbc.drm_of_component_probeasbuh1hhj|ubj)}(h h]h }(hjY|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj+)}(hj9h]h*}(hjg|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj)}(hdevh]hdev}(hjt|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubj)}(h(int (*compare_of)(struct device*, void*)h](j)}(hinth]hint}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj+)}(hjh]h(}(hj|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj+)}(hj9h]h*}(hj|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj)}(h compare_ofh]h compare_of}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj+)}(hjh]h)}(hj|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj+)}(hjh]h(}(hj|hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj)}(hjh]hstruct}(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(h h]h }(hj|hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubh)}(hhh]j)}(hdeviceh]hdevice}(hj }hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj }modnameN classnameNjj)}j]jU|c.drm_of_component_probeasbuh1hhj|ubj+)}(hj9h]h*}(hj'}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj+)}(hjQh]h,}(hj4}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj)}(h h]h }(hjA}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj)}(hvoidh]hvoid}(hjO}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj|ubj+)}(hj9h]h*}(hj]}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubj+)}(hjh]h)}(hjj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj|ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubj)}(h(const struct component_master_ops *m_opsh](j)}(hjUh]hconst}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~}ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~}ubj)}(hjh]hstruct}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~}ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~}ubh)}(hhh]j)}(hcomponent_master_opsh]hcomponent_master_ops}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj}modnameN classnameNjj)}j]jU|c.drm_of_component_probeasbuh1hhj~}ubj)}(h h]h }(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~}ubj+)}(hj9h]h*}(hj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj~}ubj)}(hm_opsh]hm_ops}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~}ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj|ubeh}(h]h ]h"]h$]h&]jjuh1jhj{hhhj{hKfubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj{hhhj{hKfubah}(h]j{ah ](jjeh"]h$]h&]jj)jhuh1jhj{hKfhj{hhubj)}(hhh]h)}(h3Generic probe function for a component based masterh]h3Generic probe function for a component based master}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKfhj~hhubah}(h]h ]h"]h$]h&]uh1jhj{hhhj{hKfubeh}(h]h ](jfunctioneh"]h$]h&]jjjj6~jj6~jjjuh1jhhhj!shNhNubj)}(hXz**Parameters** ``struct device *dev`` master device containing the OF node ``int (*compare_of)(struct device *, void *)`` compare function used for matching components ``const struct component_master_ops *m_ops`` component master ops to be used **Description** Parse the platform device OF node and bind all the components associated with the master. Interface ports are added before the encoders in order to satisfy their .bind requirements See https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml for the bindings. Returns zero if successful, or one of the standard error codes if it fails.h](h)}(h**Parameters**h]j%)}(hj@~h]h Parameters}(hjB~hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj>~ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKjhj:~ubji)}(hhh](jn)}(h<``struct device *dev`` master device containing the OF node h](jt)}(h``struct device *dev``h]jz)}(hj_~h]hstruct device *dev}(hja~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj]~ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKghjY~ubj)}(hhh]h)}(h$master device containing the OF nodeh]h$master device containing the OF node}(hjx~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjt~hKghju~ubah}(h]h ]h"]h$]h&]uh1jhjY~ubeh}(h]h ]h"]h$]h&]uh1jmhjt~hKghjV~ubjn)}(h]``int (*compare_of)(struct device *, void *)`` compare function used for matching components h](jt)}(h.``int (*compare_of)(struct device *, void *)``h]jz)}(hj~h]h*int (*compare_of)(struct device *, void *)}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhhj~ubj)}(hhh]h)}(h-compare function used for matching componentsh]h-compare function used for matching components}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hKhhj~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hKhhjV~ubjn)}(hM``const struct component_master_ops *m_ops`` component master ops to be used h](jt)}(h,``const struct component_master_ops *m_ops``h]jz)}(hj~h]h(const struct component_master_ops *m_ops}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKihj~ubj)}(hhh]h)}(hcomponent master ops to be usedh]hcomponent master ops to be used}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~hKihj~ubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jmhj~hKihjV~ubeh}(h]h ]h"]h$]h&]uh1jhhj:~ubh)}(h**Description**h]j%)}(hj h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKkhj:~ubh)}(hParse the platform device OF node and bind all the components associated with the master. Interface ports are added before the encoders in order to satisfy their .bind requirementsh]hParse the platform device OF node and bind all the components associated with the master. Interface ports are added before the encoders in order to satisfy their .bind requirements}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKjhj:~ubh)}(hgSee https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml for the bindings.h](hSee }(hj1hhhNhNubj')}(hQhttps://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yamlh]hQhttps://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/graph.yaml}(hj9hhhNhNubah}(h]h ]h"]h$]h&]refurij;uh1j'hj1ubh for the bindings.}(hj1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKnhj:~ubh)}(hKReturns zero if successful, or one of the standard error codes if it fails.h]hKReturns zero if successful, or one of the standard error codes if it fails.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKqhj:~ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_of_find_panel_or_bridge (C function)c.drm_of_find_panel_or_bridgehNtauh1jxhj!shhhNhNubj)}(hhh](j)}(hint drm_of_find_panel_or_bridge (const struct device_node *np, int port, int endpoint, struct drm_panel **panel, struct drm_bridge **bridge)h]j)}(hint drm_of_find_panel_or_bridge(const struct device_node *np, int port, int endpoint, struct drm_panel **panel, struct drm_bridge **bridge)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~hhhjhKubj)}(hdrm_of_find_panel_or_bridgeh]j)}(hdrm_of_find_panel_or_bridgeh]hdrm_of_find_panel_or_bridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhj~hhhjhKubj)}(hl(const struct device_node *np, int port, int endpoint, struct drm_panel **panel, struct drm_bridge **bridge)h](j)}(hconst struct device_node *nph](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_of_find_panel_or_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj&hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hnph]hnp}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hint porth](j)}(hinth]hint}(hjLhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(h h]h }(hjZhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubj)}(hporth]hport}(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjHubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h int endpointh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubj)}(hendpointh]hendpoint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_panel **panelh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjÀhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_panelh]h drm_panel}(hjԀhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjрubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjրmodnameN classnameNjj)}j]jc.drm_of_find_panel_or_bridgeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj+)}(hj9h]h*}(hj hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hpanelh]hpanel}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct drm_bridge **bridgeh](j)}(hjh]hstruct}(hj3hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj)}(h h]h }(hj@hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubh)}(hhh]j)}(h drm_bridgeh]h drm_bridge}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjNubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjSmodnameN classnameNjj)}j]jc.drm_of_find_panel_or_bridgeasbuh1hhj/ubj)}(h h]h }(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubj+)}(hj9h]h*}(hj}hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj/ubj)}(hbridgeh]hbridge}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhj~hhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjzhhhjhKubah}(h]juah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjwhhubj)}(hhh]h)}(h'return connected panel or bridge deviceh]h'return connected panel or bridge device}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjwhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjفjjفjjjuh1jhhhj!shNhNubj)}(hX**Parameters** ``const struct device_node *np`` device tree node containing encoder output ports ``int port`` port in the device tree node ``int endpoint`` endpoint in the device tree node ``struct drm_panel **panel`` pointer to hold returned drm_panel ``struct drm_bridge **bridge`` pointer to hold returned drm_bridge **Description** Given a DT node's port and endpoint number, find the connected node and return either the associated struct drm_panel or drm_bridge device. Either **panel** or **bridge** must not be NULL. This function is deprecated and should not be used in new drivers. Use devm_drm_of_get_bridge() instead. Returns zero if successful, or one of the standard error codes if it fails.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhj݁ubji)}(hhh](jn)}(hR``const struct device_node *np`` device tree node containing encoder output ports h](jt)}(h ``const struct device_node *np``h]jz)}(hjh]hconst struct device_node *np}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhjubj)}(hhh]h)}(h0device tree node containing encoder output portsh]h0device tree node containing encoder output ports}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h*``int port`` port in the device tree node h](jt)}(h ``int port``h]jz)}(hj;h]hint port}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj9ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhj5ubj)}(hhh]h)}(hport in the device tree nodeh]hport in the device tree node}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhKhjQubah}(h]h ]h"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]uh1jmhjPhKhjubjn)}(h2``int endpoint`` endpoint in the device tree node h](jt)}(h``int endpoint``h]jz)}(hjth]h int endpoint}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhjnubj)}(hhh]h)}(h endpoint in the device tree nodeh]h endpoint in the device tree node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h@``struct drm_panel **panel`` pointer to hold returned drm_panel h](jt)}(h``struct drm_panel **panel``h]jz)}(hjh]hstruct drm_panel **panel}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhjubj)}(hhh]h)}(h"pointer to hold returned drm_panelh]h"pointer to hold returned drm_panel}(hjƂhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj‚hKhjÂubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj‚hKhjubjn)}(hC``struct drm_bridge **bridge`` pointer to hold returned drm_bridge h](jt)}(h``struct drm_bridge **bridge``h]jz)}(hjh]hstruct drm_bridge **bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhjubj)}(hhh]h)}(h#pointer to hold returned drm_bridgeh]h#pointer to hold returned drm_bridge}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubeh}(h]h ]h"]h$]h&]uh1jhhj݁ubh)}(h**Description**h]j%)}(hj!h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhj݁ubh)}(hGiven a DT node's port and endpoint number, find the connected node and return either the associated struct drm_panel or drm_bridge device. Either **panel** or **bridge** must not be NULL.h](hGiven a DT node’s port and endpoint number, find the connected node and return either the associated struct drm_panel or drm_bridge device. Either }(hj7hhhNhNubj%)}(h **panel**h]hpanel}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7ubh or }(hj7hhhNhNubj%)}(h **bridge**h]hbridge}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj7ubh must not be NULL.}(hj7hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhj݁ubh)}(hhThis function is deprecated and should not be used in new drivers. Use devm_drm_of_get_bridge() instead.h]hhThis function is deprecated and should not be used in new drivers. Use devm_drm_of_get_bridge() instead.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhj݁ubh)}(hKReturns zero if successful, or one of the standard error codes if it fails.h]hKReturns zero if successful, or one of the standard error codes if it fails.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chKhj݁ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j2drm_of_lvds_get_dual_link_pixel_order (C function)'c.drm_of_lvds_get_dual_link_pixel_orderhNtauh1jxhj!shhhNhNubj)}(hhh](j)}(hlint drm_of_lvds_get_dual_link_pixel_order (const struct device_node *port1, const struct device_node *port2)h]j)}(hkint drm_of_lvds_get_dual_link_pixel_order(const struct device_node *port1, const struct device_node *port2)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMkubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMkubj)}(h%drm_of_lvds_get_dual_link_pixel_orderh]j)}(h%drm_of_lvds_get_dual_link_pixel_orderh]h%drm_of_lvds_get_dual_link_pixel_order}(hjɃhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjŃubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMkubj)}(hB(const struct device_node *port1, const struct device_node *port2)h](j)}(hconst struct device_node *port1h](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j)}jj˃sb'c.drm_of_lvds_get_dual_link_pixel_orderasbuh1hhjubj)}(h h]h }(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjLhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hport1h]hport1}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj݃ubj)}(hconst struct device_node *port2h](j)}(hjUh]hconst}(hjrhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubh)}(hhh]j)}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j:'c.drm_of_lvds_get_dual_link_pixel_orderasbuh1hhjnubj)}(h h]h }(hjɄhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubj+)}(hj9h]h*}(hjׄhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjnubj)}(hport2h]hport2}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj݃ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMkubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMkubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMkhjhhubj)}(hhh]h)}(h%Get LVDS dual-link source pixel orderh]h%Get LVDS dual-link source pixel order}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMkhj hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMkubeh}(h]h ](jfunctioneh"]h$]h&]jjjj&jj&jjjuh1jhhhj!shNhNubj)}(hXJ**Parameters** ``const struct device_node *port1`` First DT port node of the Dual-link LVDS source ``const struct device_node *port2`` Second DT port node of the Dual-link LVDS source **Description** An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link source, which port shall transmit the even and odd pixels, based on the requirements of the connected sink. The pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL. If either port is not connected, this function returns -EPIPE. **port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS encoders carry the even and odd pixels. **Return** * DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** carries even pixels and **port2** carries odd pixels * DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** carries odd pixels and **port2** carries even pixels * -EINVAL - **port1** and **port2** are not connected to a dual-link LVDS sink, or the sink configuration is invalid * -EPIPE - when **port1** or **port2** are not connectedh](h)}(h**Parameters**h]j%)}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMohj*ubji)}(hhh](jn)}(hT``const struct device_node *port1`` First DT port node of the Dual-link LVDS source h](jt)}(h#``const struct device_node *port1``h]jz)}(hjOh]hconst struct device_node *port1}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMlhjIubj)}(hhh]h)}(h/First DT port node of the Dual-link LVDS sourceh]h/First DT port node of the Dual-link LVDS source}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhMlhjeubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjdhMlhjFubjn)}(hU``const struct device_node *port2`` Second DT port node of the Dual-link LVDS source h](jt)}(h#``const struct device_node *port2``h]jz)}(hjh]hconst struct device_node *port2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMmhjubj)}(hhh]h)}(h0Second DT port node of the Dual-link LVDS sourceh]h0Second DT port node of the Dual-link LVDS source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMmhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMmhjFubeh}(h]h ]h"]h$]h&]uh1jhhj*ubh)}(h**Description**h]j%)}(hjÅh]h Description}(hjŅhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMohj*ubh)}(hX$An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link source, which port shall transmit the even and odd pixels, based on the requirements of the connected sink.h]hX$An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link source, which port shall transmit the even and odd pixels, based on the requirements of the connected sink.}(hjمhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMnhj*ubh)}(hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.h]hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink’s DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMshj*ubh)}(h>If either port is not connected, this function returns -EPIPE.h]h>If either port is not connected, this function returns -EPIPE.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMxhj*ubh)}(h**port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS encoders carry the even and odd pixels.h](j%)}(h **port1**h]hport1}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h **port2**h]hport2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS encoders carry the even and odd pixels.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMzhj*ubh)}(h **Return**h]j%)}(hj7h]hReturn}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj5ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chM~hj*ubh)}(hhh](h)}(hcDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** carries even pixels and **port2** carries odd pixelsh]h)}(hcDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** carries even pixels and **port2** carries odd pixelsh](h%DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - }(hjThhhNhNubj%)}(h **port1**h]hport1}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubh carries even pixels and }(hjThhhNhNubj%)}(h **port2**h]hport2}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjTubh carries odd pixels}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjPubah}(h]h ]h"]h$]h&]uh1hhjMubh)}(hcDRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** carries odd pixels and **port2** carries even pixelsh]h)}(hcDRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** carries odd pixels and **port2** carries even pixelsh](h%DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - }(hjhhhNhNubj%)}(h **port1**h]hport1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh carries odd pixels and }(hjhhhNhNubj%)}(h **port2**h]hport2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh carries even pixels}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhjMubh)}(hr-EINVAL - **port1** and **port2** are not connected to a dual-link LVDS sink, or the sink configuration is invalidh]h)}(hr-EINVAL - **port1** and **port2** are not connected to a dual-link LVDS sink, or the sink configuration is invalidh](h -EINVAL - }(hjΆhhhNhNubj%)}(h **port1**h]hport1}(hjֆhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjΆubh and }(hjΆhhhNhNubj%)}(h **port2**h]hport2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjΆubhQ are not connected to a dual-link LVDS sink, or the sink configuration is invalid}(hjΆhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjʆubah}(h]h ]h"]h$]h&]uh1hhjMubh)}(h6-EPIPE - when **port1** or **port2** are not connectedh]h)}(hj h](h-EPIPE - when }(hj hhhNhNubj%)}(h **port1**h]hport1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh or }(hj hhhNhNubj%)}(h **port2**h]hport2}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubh are not connected}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhjMubeh}(h]h ]h"]h$]h&]j8j9uh1hhjhMhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j7drm_of_lvds_get_dual_link_pixel_order_sink (C function),c.drm_of_lvds_get_dual_link_pixel_order_sinkhNtauh1jxhj!shhhNhNubj)}(hhh](j)}(heint drm_of_lvds_get_dual_link_pixel_order_sink (struct device_node *port1, struct device_node *port2)h]j)}(hdint drm_of_lvds_get_dual_link_pixel_order_sink(struct device_node *port1, struct device_node *port2)h](j)}(hinth]hint}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMubj)}(h h]h }(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjehhhjwhMubj)}(h*drm_of_lvds_get_dual_link_pixel_order_sinkh]j)}(h*drm_of_lvds_get_dual_link_pixel_order_sinkh]h*drm_of_lvds_get_dual_link_pixel_order_sink}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjehhhjwhMubj)}(h6(struct device_node *port1, struct device_node *port2)h](j)}(hstruct device_node *port1h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hjćhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjƇmodnameN classnameNjj)}j]j)}jjsb,c.drm_of_lvds_get_dual_link_pixel_order_sinkasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hport1h]hport1}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct device_node *port2h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj%hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hj6hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj3ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj8modnameN classnameNjj)}j]j,c.drm_of_lvds_get_dual_link_pixel_order_sinkasbuh1hhjubj)}(h h]h }(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjbhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hport2h]hport2}(hjohhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjehhhjwhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjahhhjwhMubah}(h]j\ah ](jjeh"]h$]h&]jj)jhuh1jhjwhMhj^hhubj)}(hhh]h)}(h#Get LVDS dual-link sink pixel orderh]h#Get LVDS dual-link sink pixel order}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj^hhhjwhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj!shNhNubj)}(hX**Parameters** ``struct device_node *port1`` First DT port node of the Dual-link LVDS sink ``struct device_node *port2`` Second DT port node of the Dual-link LVDS sink **Description** An LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link sink, which port shall transmit the even and odd pixels, based on the requirements of the sink. The pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL. If either port is not connected, this function returns -EPIPE. **port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS decoders receive the even and odd pixels. **Return** * DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** receives even pixels and **port2** receives odd pixels * DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** receives odd pixels and **port2** receives even pixels * -EINVAL - **port1** or **port2** are NULL * -EPIPE - when **port1** or **port2** are not connectedh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubji)}(hhh](jn)}(hL``struct device_node *port1`` First DT port node of the Dual-link LVDS sink h](jt)}(h``struct device_node *port1``h]jz)}(hjڈh]hstruct device_node *port1}(hj܈hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj؈ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjԈubj)}(hhh]h)}(h-First DT port node of the Dual-link LVDS sinkh]h-First DT port node of the Dual-link LVDS sink}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjԈubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjшubjn)}(hM``struct device_node *port2`` Second DT port node of the Dual-link LVDS sink h](jt)}(h``struct device_node *port2``h]jz)}(hjh]hstruct device_node *port2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj ubj)}(hhh]h)}(h.Second DT port node of the Dual-link LVDS sinkh]h.Second DT port node of the Dual-link LVDS sink}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hMhj)ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj(hMhjшubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjNh]h Description}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(hXAn LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link sink, which port shall transmit the even and odd pixels, based on the requirements of the sink.h]hXAn LVDS dual-link connection is made of two links, with even pixels transitting on one link, and odd pixels on the other link. This function returns, for two ports of an LVDS dual-link sink, which port shall transmit the even and odd pixels, based on the requirements of the sink.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink's DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.h]hThe pixel order is determined from the dual-lvds-even-pixels and dual-lvds-odd-pixels properties in the sink’s DT port nodes. If those properties are not present, or if their usage is not valid, this function returns -EINVAL.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(h>If either port is not connected, this function returns -EPIPE.h]h>If either port is not connected, this function returns -EPIPE.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(h**port1** and **port2** are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS decoders receive the even and odd pixels.h](j%)}(h **port1**h]hport1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h **port2**h]hport2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh are typically DT sibling nodes, but may have different parents when, for instance, two separate LVDS decoders receive the even and odd pixels.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(h **Return**h]j%)}(hj‰h]hReturn}(hjĉhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(hhh](h)}(heDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** receives even pixels and **port2** receives odd pixelsh]h)}(heDRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - **port1** receives even pixels and **port2** receives odd pixelsh](h%DRM_LVDS_DUAL_LINK_EVEN_ODD_PIXELS - }(hj߉hhhNhNubj%)}(h **port1**h]hport1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj߉ubh receives even pixels and }(hj߉hhhNhNubj%)}(h **port2**h]hport2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj߉ubh receives odd pixels}(hj߉hhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjۉubah}(h]h ]h"]h$]h&]uh1hhj؉ubh)}(heDRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** receives odd pixels and **port2** receives even pixelsh]h)}(heDRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - **port1** receives odd pixels and **port2** receives even pixelsh](h%DRM_LVDS_DUAL_LINK_ODD_EVEN_PIXELS - }(hjhhhNhNubj%)}(h **port1**h]hport1}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh receives odd pixels and }(hjhhhNhNubj%)}(h **port2**h]hport2}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh receives even pixels}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhj؉ubh)}(h)-EINVAL - **port1** or **port2** are NULLh]h)}(hjWh](h -EINVAL - }(hjYhhhNhNubj%)}(h **port1**h]hport1}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubh or }(hjYhhhNhNubj%)}(h **port2**h]hport2}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjYubh are NULL}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjUubah}(h]h ]h"]h$]h&]uh1hhj؉ubh)}(h6-EPIPE - when **port1** or **port2** are not connectedh]h)}(hjh](h-EPIPE - when }(hjhhhNhNubj%)}(h **port1**h]hport1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh or }(hjhhhNhNubj%)}(h **port2**h]hport2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh are not connected}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhj؉ubeh}(h]h ]h"]h$]h&]j8j9uh1hhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_of_lvds_get_data_mapping (C function)c.drm_of_lvds_get_data_mappinghNtauh1jxhj!shhhNhNubj)}(hhh](j)}(hAint drm_of_lvds_get_data_mapping (const struct device_node *port)h]j)}(h@int drm_of_lvds_get_data_mapping(const struct device_node *port)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_of_lvds_get_data_mappingh]j)}(hdrm_of_lvds_get_data_mappingh]hdrm_of_lvds_get_data_mapping}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h (const struct device_node *port)h]j)}(hconst struct device_node *porth](j)}(hjUh]hconst}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(hjh]hstruct}(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj)}(h h]h }(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubh)}(hhh]j)}(h device_nodeh]h device_node}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjfubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjkmodnameN classnameNjj)}j]j)}jjsbc.drm_of_lvds_get_data_mappingasbuh1hhj,ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj,ubj)}(hporth]hport}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj(ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hGet LVDS data mappingh]hGet LVDS data mapping}(hj΋hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjˋhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhj!shNhNubj)}(hXs**Parameters** ``const struct device_node *port`` DT port node of the LVDS source or sink **Description** Convert DT "data-mapping" property string value into media bus format value. **Return** * MEDIA_BUS_FMT_RGB666_1X7X3_SPWG - data-mapping is "jeida-18" * MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA - data-mapping is "jeida-24" * MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA - data-mapping is "jeida-30" * MEDIA_BUS_FMT_RGB888_1X7X4_SPWG - data-mapping is "vesa-24" * MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG - data-mapping is "vesa-30" * -EINVAL - the "data-mapping" property is unsupported * -ENODEV - the "data-mapping" property is missingh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubji)}(hhh]jn)}(hK``const struct device_node *port`` DT port node of the LVDS source or sink h](jt)}(h"``const struct device_node *port``h]jz)}(hjh]hconst struct device_node *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj ubj)}(hhh]h)}(h'DT port node of the LVDS source or sinkh]h'DT port node of the LVDS source or sink}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hMhj%ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jmhj$hMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjJh]h Description}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjHubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(hLConvert DT "data-mapping" property string value into media bus format value.h]hPConvert DT “data-mapping” property string value into media bus format value.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(h **Return**h]j%)}(hjqh]hReturn}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjoubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(hhh](h)}(hMEDIA_BUS_FMT_RGB101010_1X7X5_SPWG - data-mapping is "vesa-30"h]h)}(hjh]hBMEDIA_BUS_FMT_RGB101010_1X7X5_SPWG - data-mapping is “vesa-30”}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h4-EINVAL - the "data-mapping" property is unsupportedh]h)}(hjh]h8-EINVAL - the “data-mapping” property is unsupported}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(h0-ENODEV - the "data-mapping" property is missingh]h)}(hjh]h4-ENODEV - the “data-mapping” property is missing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j8j9uh1hhjhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_of_get_data_lanes_count (C function)c.drm_of_get_data_lanes_counthNtauh1jxhj!shhhNhNubj)}(hhh](j)}(htint drm_of_get_data_lanes_count (const struct device_node *endpoint, const unsigned int min, const unsigned int max)h]j)}(hsint drm_of_get_data_lanes_count(const struct device_node *endpoint, const unsigned int min, const unsigned int max)h](j)}(hinth]hint}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjThhhjfhMubj)}(hdrm_of_get_data_lanes_counth]j)}(hdrm_of_get_data_lanes_counth]hdrm_of_get_data_lanes_count}(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjuubah}(h]h ](jjeh"]h$]h&]jjuh1jhjThhhjfhMubj)}(hT(const struct device_node *endpoint, const unsigned int min, const unsigned int max)h](j)}(h"const struct device_node *endpointh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hj΍hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjˍubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjЍmodnameN classnameNjj)}j]j)}jj{sbc.drm_of_get_data_lanes_countasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hendpointh]hendpoint}(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int minh](j)}(hjUh]hconst}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjKhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjghhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hminh]hmin}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hconst unsigned int maxh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hinth]hint}(hjŎhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjӎhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hmaxh]hmax}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjThhhjfhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjPhhhjfhMubah}(h]jKah ](jjeh"]h$]h&]jj)jhuh1jhjfhMhjMhhubj)}(hhh]h)}(hGet DSI/(e)DP data lane counth]hGet DSI/(e)DP data lane count}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjMhhhjfhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjj#jj#jjjuh1jhhhj!shNhNubj)}(hX**Parameters** ``const struct device_node *endpoint`` DT endpoint node of the DSI/(e)DP source or sink ``const unsigned int min`` minimum supported number of data lanes ``const unsigned int max`` maximum supported number of data lanes **Description** Count DT "data-lanes" property elements and check for validity. **Return** * min..max - positive integer count of "data-lanes" elements * -ve - the "data-lanes" property is missing or invalid * -EINVAL - the "data-lanes" property is unsupportedh](h)}(h**Parameters**h]j%)}(hj-h]h Parameters}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj+ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj'ubji)}(hhh](jn)}(hX``const struct device_node *endpoint`` DT endpoint node of the DSI/(e)DP source or sink h](jt)}(h&``const struct device_node *endpoint``h]jz)}(hjLh]h"const struct device_node *endpoint}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjFubj)}(hhh]h)}(h0DT endpoint node of the DSI/(e)DP source or sinkh]h0DT endpoint node of the DSI/(e)DP source or sink}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahMhjbubah}(h]h ]h"]h$]h&]uh1jhjFubeh}(h]h ]h"]h$]h&]uh1jmhjahMhjCubjn)}(hB``const unsigned int min`` minimum supported number of data lanes h](jt)}(h``const unsigned int min``h]jz)}(hjh]hconst unsigned int min}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubj)}(hhh]h)}(h&minimum supported number of data lanesh]h&minimum supported number of data lanes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjCubjn)}(hB``const unsigned int max`` maximum supported number of data lanes h](jt)}(h``const unsigned int max``h]jz)}(hjh]hconst unsigned int max}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubj)}(hhh]h)}(h&maximum supported number of data lanesh]h&maximum supported number of data lanes}(hj׏hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjӏhMhjԏubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjӏhMhjCubeh}(h]h ]h"]h$]h&]uh1jhhj'ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj'ubh)}(h?Count DT "data-lanes" property elements and check for validity.h]hCCount DT “data-lanes” property elements and check for validity.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj'ubh)}(h **Return**h]j%)}(hj h]hReturn}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj'ubh)}(hhh](h)}(h:min..max - positive integer count of "data-lanes" elementsh]h)}(hj;h]h>min..max - positive integer count of “data-lanes” elements}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj9ubah}(h]h ]h"]h$]h&]uh1hhj6ubh)}(h5-ve - the "data-lanes" property is missing or invalidh]h)}(hjSh]h9-ve - the “data-lanes” property is missing or invalid}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjQubah}(h]h ]h"]h$]h&]uh1hhj6ubh)}(h2-EINVAL - the "data-lanes" property is unsupportedh]h)}(hjkh]h6-EINVAL - the “data-lanes” property is unsupported}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjiubah}(h]h ]h"]h$]h&]uh1hhj6ubeh}(h]h ]h"]h$]h&]j8j9uh1hhjJhMhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j+drm_of_get_data_lanes_count_ep (C function) c.drm_of_get_data_lanes_count_ephNtauh1jxhj!shhhNhNubj)}(hhh](j)}(hint drm_of_get_data_lanes_count_ep (const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h]j)}(hint drm_of_get_data_lanes_count_ep(const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_of_get_data_lanes_count_eph]j)}(hdrm_of_get_data_lanes_count_eph]hdrm_of_get_data_lanes_count_ep}(hjȐhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjĐubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(hg(const struct device_node *port, int port_reg, int reg, const unsigned int min, const unsigned int max)h](j)}(hconst struct device_node *porth](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h device_nodeh]h device_node}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjʐsb c.drm_of_get_data_lanes_count_epasbuh1hhjubj)}(h h]h }(hj=hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjKhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hporth]hport}(hjXhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjܐubj)}(h int port_regh](j)}(hinth]hint}(hjqhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubj)}(hport_regh]hport_reg}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjmubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjܐubj)}(hint regh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hregh]hreg}(hj‘hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjܐubj)}(hconst unsigned int minh](j)}(hjUh]hconst}(hjۑhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjבubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjבubj)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjבubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjבubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjבubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjבubj)}(hminh]hmin}(hj.hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjבubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjܐubj)}(hconst unsigned int maxh](j)}(hjUh]hconst}(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hjThhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(hunsignedh]hunsigned}(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hjphhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(hinth]hint}(hj~hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubj)}(hmaxh]hmax}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjܐubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h)Get DSI/(e)DP data lane count by endpointh]h)Get DSI/(e)DP data lane count by endpoint}(hjĒhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjܒjjܒjjjuh1jhhhj!shNhNubj)}(hX**Parameters** ``const struct device_node *port`` DT port node of the DSI/(e)DP source or sink ``int port_reg`` identifier (value of reg property) of the parent port node ``int reg`` identifier (value of reg property) of the endpoint node ``const unsigned int min`` minimum supported number of data lanes ``const unsigned int max`` maximum supported number of data lanes **Description** Count DT "data-lanes" property elements and check for validity. This variant uses endpoint specifier. **Return** * min..max - positive integer count of "data-lanes" elements * -EINVAL - the "data-mapping" property is unsupported * -ENODEV - the "data-mapping" property is missingh](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubji)}(hhh](jn)}(hP``const struct device_node *port`` DT port node of the DSI/(e)DP source or sink h](jt)}(h"``const struct device_node *port``h]jz)}(hjh]hconst struct device_node *port}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubj)}(hhh]h)}(h,DT port node of the DSI/(e)DP source or sinkh]h,DT port node of the DSI/(e)DP source or sink}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hL``int port_reg`` identifier (value of reg property) of the parent port node h](jt)}(h``int port_reg``h]jz)}(hj>h]h int port_reg}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj<ubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj8ubj)}(hhh]h)}(h:identifier (value of reg property) of the parent port nodeh]h:identifier (value of reg property) of the parent port node}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShMhjTubah}(h]h ]h"]h$]h&]uh1jhj8ubeh}(h]h ]h"]h$]h&]uh1jmhjShMhjubjn)}(hD``int reg`` identifier (value of reg property) of the endpoint node h](jt)}(h ``int reg``h]jz)}(hjwh]hint reg}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjuubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjqubj)}(hhh]h)}(h7identifier (value of reg property) of the endpoint nodeh]h7identifier (value of reg property) of the endpoint node}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubjn)}(hB``const unsigned int min`` minimum supported number of data lanes h](jt)}(h``const unsigned int min``h]jz)}(hjh]hconst unsigned int min}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubj)}(hhh]h)}(h&minimum supported number of data lanesh]h&minimum supported number of data lanes}(hjɓhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjœhMhjƓubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjœhMhjubjn)}(hB``const unsigned int max`` maximum supported number of data lanes h](jt)}(h``const unsigned int max``h]jz)}(hjh]hconst unsigned int max}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jsh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubj)}(hhh]h)}(h&maximum supported number of data lanesh]h&maximum supported number of data lanes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj$h]h Description}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj"ubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(heCount DT "data-lanes" property elements and check for validity. This variant uses endpoint specifier.h]hiCount DT “data-lanes” property elements and check for validity. This variant uses endpoint specifier.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(h **Return**h]j%)}(hjKh]hReturn}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubh)}(hhh](h)}(h:min..max - positive integer count of "data-lanes" elementsh]h)}(hjfh]h>min..max - positive integer count of “data-lanes” elements}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjdubah}(h]h ]h"]h$]h&]uh1hhjaubh)}(h4-EINVAL - the "data-mapping" property is unsupportedh]h)}(hj~h]h8-EINVAL - the “data-mapping” property is unsupported}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhj|ubah}(h]h ]h"]h$]h&]uh1hhjaubh)}(h0-ENODEV - the "data-mapping" property is missingh]h)}(hjh]h4-ENODEV - the “data-mapping” property is missing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hh]/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:464: ./drivers/gpu/drm/drm_of.chMhjubah}(h]h ]h"]h$]h&]uh1hhjaubeh}(h]h ]h"]h$]h&]j8j9uh1hhjuhMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhj!shhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_of_get_dsi_bus (C function)c.drm_of_get_dsi_bushNtauh1jxhj!shhhNhNubj)}(hhh](j)}(h>struct mipi_dsi_host * drm_of_get_dsi_bus (struct device *dev)h]j)}(h` interface ties the primary plane together with the CRTC state this does not allow userspace to disable the primary plane itself. The default primary plane only expose XRBG8888 and ARGB8888 as valid pixel formats for the attached framebuffer.h](hThis helper library contains helpers to implement primary plane support on top of the normal CRTC configuration interface. Since the legacy }(hjhhhNhNubh)}(hB:c:type:`drm_mode_config_funcs.set_config `h]jz)}(hjh]h drm_mode_config_funcs.set_config}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_mode_config_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:470: ./drivers/gpu/drm/drm_plane_helper.chK*hjubh interface ties the primary plane together with the CRTC state this does not allow userspace to disable the primary plane itself. The default primary plane only expose XRBG8888 and ARGB8888 as valid pixel formats for the attached framebuffer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjӖhK*hjhhubh)}(hDrivers are highly recommended to implement proper support for primary planes, and newly merged drivers must not rely upon these transitional helpers.h]hDrivers are highly recommended to implement proper support for primary planes, and newly merged drivers must not rely upon these transitional helpers.}(hjޖhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:470: ./drivers/gpu/drm/drm_plane_helper.chK1hjhhubh)}(hThe plane helpers share the function table structures with other helpers, specifically also the atomic helpers. See :c:type:`struct drm_plane_helper_funcs ` for the details.h](htThe plane helpers share the function table structures with other helpers, specifically also the atomic helpers. See }(hjhhhNhNubh)}(h@:c:type:`struct drm_plane_helper_funcs `h]jz)}(hjh]hstruct drm_plane_helper_funcs}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_plane_helper_funcsuh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:470: ./drivers/gpu/drm/drm_plane_helper.chK5hjubh for the details.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK5hjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j,drm_plane_helper_update_primary (C function)!c.drm_plane_helper_update_primaryhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hXint drm_plane_helper_update_primary (struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h]j)}(hXint drm_plane_helper_update_primary(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hj8hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKubj)}(h h]h }(hjGhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj4hhhjFhKubj)}(hdrm_plane_helper_update_primaryh]j)}(hdrm_plane_helper_update_primaryh]hdrm_plane_helper_update_primary}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUubah}(h]h ](jjeh"]h$]h&]jjuh1jhj4hhhjFhKubj)}(h(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj[sb!c.drm_plane_helper_update_primaryasbuh1hhjqubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjqubj)}(hplaneh]hplane}(hjΗhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.drm_plane_helper_update_primaryasbuh1hhjubj)}(h h]h }(hj#hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj1hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcrtch]hcrtc}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(hstruct drm_framebuffer *fbh](j)}(hjh]hstruct}(hjWhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj)}(h h]h }(hjdhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjuhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjwmodnameN classnameNjj)}j]j!c.drm_plane_helper_update_primaryasbuh1hhjSubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjSubj)}(hfbh]hfb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjSubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(h int crtc_xh](j)}(hinth]hint}(hjǘhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjØubj)}(h h]h }(hj՘hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjØubj)}(hcrtc_xh]hcrtc_x}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjØubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(h int crtc_yh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcrtc_yh]hcrtc_y}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(hunsigned int crtc_wh](j)}(hunsignedh]hunsigned}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(hinth]hint}(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(h h]h }(hj[hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubj)}(hcrtc_wh]hcrtc_w}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(hunsigned int crtc_hh](j)}(hunsignedh]hunsigned}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubj)}(hcrtc_hh]hcrtc_h}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(huint32_t src_xh](h)}(hhh]j)}(huint32_th]huint32_t}(hj֙hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjәubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjؙmodnameN classnameNjj)}j]j!c.drm_plane_helper_update_primaryasbuh1hhjϙubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjϙubj)}(hsrc_xh]hsrc_x}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjϙubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(huint32_t src_yh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j!c.drm_plane_helper_update_primaryasbuh1hhjubj)}(h h]h }(hj<hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsrc_yh]hsrc_y}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(huint32_t src_wh](h)}(hhh]j)}(huint32_th]huint32_t}(hjfhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjcubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjhmodnameN classnameNjj)}j]j!c.drm_plane_helper_update_primaryasbuh1hhj_ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubj)}(hsrc_wh]hsrc_w}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(huint32_t src_hh](h)}(hhh]j)}(huint32_th]huint32_t}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.drm_plane_helper_update_primaryasbuh1hhjubj)}(h h]h }(hj̚hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hsrc_hh]hsrc_h}(hjښhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j!c.drm_plane_helper_update_primaryasbuh1hhjubj)}(h h]h }(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj=hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjmubeh}(h]h ]h"]h$]h&]jjuh1jhj4hhhjFhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj0hhhjFhKubah}(h]j+ah ](jjeh"]h$]h&]jj)jhuh1jhjFhKhj-hhubj)}(hhh]h)}(h"Helper for updating primary planesh]h"Helper for updating primary planes}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjqhhubah}(h]h ]h"]h$]h&]uh1jhj-hhhjFhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXq**Parameters** ``struct drm_plane *plane`` plane to update ``struct drm_crtc *crtc`` the plane's new CRTC ``struct drm_framebuffer *fb`` the plane's new framebuffer ``int crtc_x`` x coordinate within CRTC ``int crtc_y`` y coordinate within CRTC ``unsigned int crtc_w`` width coordinate within CRTC ``unsigned int crtc_h`` height coordinate within CRTC ``uint32_t src_x`` x coordinate within source ``uint32_t src_y`` y coordinate within source ``uint32_t src_w`` width coordinate within source ``uint32_t src_h`` height coordinate within source ``struct drm_modeset_acquire_ctx *ctx`` modeset locking context **Description** This helper validates the given parameters and updates the primary plane. This function is only useful for non-atomic modesetting. Don't use it in new drivers. **Return** Zero on success, or an errno code otherwise.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubji)}(hhh](jn)}(h,``struct drm_plane *plane`` plane to update h](jt)}(h``struct drm_plane *plane``h]jz)}(hjh]hstruct drm_plane *plane}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubj)}(hhh]h)}(hplane to updateh]hplane to update}(hjΛhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjʛhKhj˛ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjʛhKhjubjn)}(h/``struct drm_crtc *crtc`` the plane's new CRTC h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjh]hstruct drm_crtc *crtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubj)}(hhh]h)}(hthe plane's new CRTCh]hthe plane’s new CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h;``struct drm_framebuffer *fb`` the plane's new framebuffer h](jt)}(h``struct drm_framebuffer *fb``h]jz)}(hj'h]hstruct drm_framebuffer *fb}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj%ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj!ubj)}(hhh]h)}(hthe plane's new framebufferh]hthe plane’s new framebuffer}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj<hKhj=ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jmhj<hKhjubjn)}(h(``int crtc_x`` x coordinate within CRTC h](jt)}(h``int crtc_x``h]jz)}(hj`h]h int crtc_x}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj^ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjZubj)}(hhh]h)}(hx coordinate within CRTCh]hx coordinate within CRTC}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhKhjvubah}(h]h ]h"]h$]h&]uh1jhjZubeh}(h]h ]h"]h$]h&]uh1jmhjuhKhjubjn)}(h(``int crtc_y`` y coordinate within CRTC h](jt)}(h``int crtc_y``h]jz)}(hjh]h int crtc_y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubj)}(hhh]h)}(hy coordinate within CRTCh]hy coordinate within CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h5``unsigned int crtc_w`` width coordinate within CRTC h](jt)}(h``unsigned int crtc_w``h]jz)}(hjҜh]hunsigned int crtc_w}(hjԜhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjМubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj̜ubj)}(hhh]h)}(hwidth coordinate within CRTCh]hwidth coordinate within CRTC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhj̜ubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h6``unsigned int crtc_h`` height coordinate within CRTC h](jt)}(h``unsigned int crtc_h``h]jz)}(hj h]hunsigned int crtc_h}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubj)}(hhh]h)}(hheight coordinate within CRTCh]hheight coordinate within CRTC}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hKhj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hKhjubjn)}(h.``uint32_t src_x`` x coordinate within source h](jt)}(h``uint32_t src_x``h]jz)}(hjDh]huint32_t src_x}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjBubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj>ubj)}(hhh]h)}(hx coordinate within sourceh]hx coordinate within source}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjYhKhjZubah}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jmhjYhKhjubjn)}(h.``uint32_t src_y`` y coordinate within source h](jt)}(h``uint32_t src_y``h]jz)}(hj}h]huint32_t src_y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj{ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjwubj)}(hhh]h)}(hy coordinate within sourceh]hy coordinate within source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h2``uint32_t src_w`` width coordinate within source h](jt)}(h``uint32_t src_w``h]jz)}(hjh]huint32_t src_w}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubj)}(hhh]h)}(hwidth coordinate within sourceh]hwidth coordinate within source}(hjϝhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj˝hKhj̝ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj˝hKhjubjn)}(h3``uint32_t src_h`` height coordinate within source h](jt)}(h``uint32_t src_h``h]jz)}(hjh]huint32_t src_h}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubj)}(hhh]h)}(hheight coordinate within sourceh]hheight coordinate within source}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(h@``struct drm_modeset_acquire_ctx *ctx`` modeset locking context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hj(h]h#struct drm_modeset_acquire_ctx *ctx}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj"ubj)}(hhh]h)}(hmodeset locking contexth]hmodeset locking context}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=hKhj>ubah}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ]h"]h$]h&]uh1jmhj=hKhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjch]h Description}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjaubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(hIThis helper validates the given parameters and updates the primary plane.h]hIThis helper validates the given parameters and updates the primary plane.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubh)}(hUThis function is only useful for non-atomic modesetting. Don't use it in new drivers.h]hWThis function is only useful for non-atomic modesetting. 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This function is only useful for non-atomic modesetting. Don't use it in new drivers. **Return** An errno code.h](h)}(h**Parameters**h]j%)}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj.ubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj*ubji)}(hhh](jn)}(h-``struct drm_plane *plane`` plane to disable h](jt)}(h``struct drm_plane *plane``h]jz)}(hjOh]hstruct drm_plane *plane}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjMubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjIubj)}(hhh]h)}(hplane to disableh]hplane to disable}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhKhjeubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jmhjdhKhjFubjn)}(h@``struct drm_modeset_acquire_ctx *ctx`` modeset locking context h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhjubj)}(hhh]h)}(hmodeset locking contexth]hmodeset locking context}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjFubeh}(h]h ]h"]h$]h&]uh1jhhj*ubh)}(h**Description**h]j%)}(hjàh]h Description}(hjŠhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj*ubh)}(hFThis helper returns an error when trying to disable the primary plane.h]hFThis helper returns an error when trying to disable the primary plane.}(hj٠hhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj*ubh)}(hUThis function is only useful for non-atomic modesetting. Don't use it in new drivers.h]hWThis function is only useful for non-atomic modesetting. Don’t use it in new drivers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj*ubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj*ubh)}(hAn errno code.h]hAn errno code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chKhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_plane_helper_destroy (C function)c.drm_plane_helper_destroyhNtauh1jxhjhhhNhNubj)}(hhh](j)}(h7void drm_plane_helper_destroy (struct drm_plane *plane)h]j)}(h6void drm_plane_helper_destroy(struct drm_plane *plane)h](j)}(hvoidh]hvoid}(hj>hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chM ubj)}(h h]h }(hjMhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj:hhhjLhM ubj)}(hdrm_plane_helper_destroyh]j)}(hdrm_plane_helper_destroyh]hdrm_plane_helper_destroy}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj[ubah}(h]h ](jjeh"]h$]h&]jjuh1jhj:hhhjLhM ubj)}(h(struct drm_plane *plane)h]j)}(hstruct drm_plane *planeh](j)}(hjh]hstruct}(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubh)}(hhh]j)}(h drm_planeh]h drm_plane}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjasbc.drm_plane_helper_destroyasbuh1hhjwubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubj+)}(hj9h]h*}(hjǡhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjwubj)}(hplaneh]hplane}(hjԡhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjsubah}(h]h ]h"]h$]h&]jjuh1jhj:hhhjLhM ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj6hhhjLhM ubah}(h]j1ah ](jjeh"]h$]h&]jj)jhuh1jhjLhM hj3hhubj)}(hhh]h)}(h$Helper for primary plane destructionh]h$Helper for primary plane destruction}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chM hjhhubah}(h]h ]h"]h$]h&]uh1jhj3hhhjLhM ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX$**Parameters** ``struct drm_plane *plane`` plane to destroy **Description** Provides a default plane destroy handler for primary planes. This handler is called during CRTC destruction. We disable the primary plane, remove it from the DRM plane list, and deallocate the plane structure.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chMhjubji)}(hhh]jn)}(h-``struct drm_plane *plane`` plane to destroy h](jt)}(h``struct drm_plane *plane``h]jz)}(hj?h]hstruct drm_plane *plane}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj=ubah}(h]h ]h"]h$]h&]uh1jshg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chMhj9ubj)}(hhh]h)}(hplane to destroyh]hplane to destroy}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjThMhjUubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jmhjThMhj6ubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjzh]h Description}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjxubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chMhjubh)}(hProvides a default plane destroy handler for primary planes. This handler is called during CRTC destruction. We disable the primary plane, remove it from the DRM plane list, and deallocate the plane structure.h]hProvides a default plane destroy handler for primary planes. This handler is called during CRTC destruction. We disable the primary plane, remove it from the DRM plane list, and deallocate the plane structure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhg/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:473: ./drivers/gpu/drm/drm_plane_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h]legacy-plane-helper-referenceah ]h"]legacy plane helper referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h.Legacy CRTC/Modeset Helper Functions Referenceh]h.Legacy CRTC/Modeset Helper Functions Reference}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hXThe CRTC modeset helper library provides a default set_config implementation in drm_crtc_helper_set_config(). Plus a few other convenience functions using the same callbacks which drivers can use to e.g. restore the modeset configuration on resume with drm_helper_resume_force_mode().h]hXThe CRTC modeset helper library provides a default set_config implementation in drm_crtc_helper_set_config(). Plus a few other convenience functions using the same callbacks which drivers can use to e.g. restore the modeset configuration on resume with drm_helper_resume_force_mode().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:479: ./drivers/gpu/drm/drm_crtc_helper.chKBhjhhubh)}(hX(Note that this helper library doesn't track the current power state of CRTCs and encoders. It can call callbacks like :c:type:`drm_encoder_helper_funcs.dpms ` even though the hardware is already in the desired state. This deficiency has been fixed in the atomic helpers.h](hxNote that this helper library doesn’t track the current power state of CRTCs and encoders. It can call callbacks like }(hj΢hhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jz)}(hjآh]hdrm_encoder_helper_funcs.dpms}(hjڢhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj֢ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:479: ./drivers/gpu/drm/drm_crtc_helper.chKGhj΢ubhp even though the hardware is already in the desired state. This deficiency has been fixed in the atomic helpers.}(hj΢hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKGhjhhubh)}(hXThe driver callbacks are mostly compatible with the atomic modeset helpers, except for the handling of the primary plane: Atomic helpers require that the primary plane is implemented as a real standalone plane and not directly tied to the CRTC state. For easier transition this library provides functions to implement the old semantics required by the CRTC helpers using the new plane and atomic helper callbacks.h]hXThe driver callbacks are mostly compatible with the atomic modeset helpers, except for the handling of the primary plane: Atomic helpers require that the primary plane is implemented as a real standalone plane and not directly tied to the CRTC state. For easier transition this library provides functions to implement the old semantics required by the CRTC helpers using the new plane and atomic helper callbacks.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:479: ./drivers/gpu/drm/drm_crtc_helper.chKLhjhhubh)}(hDrivers are strongly urged to convert to the atomic helpers (by way of first converting to the plane helpers). New drivers must not use these functions but need to implement the atomic interface instead, potentially using the atomic helpers for that.h]hDrivers are strongly urged to convert to the atomic helpers (by way of first converting to the plane helpers). New drivers must not use these functions but need to implement the atomic interface instead, potentially using the atomic helpers for that.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:479: ./drivers/gpu/drm/drm_crtc_helper.chKShjhhubh)}(hXThese legacy modeset helpers use the same function table structures as all other modesetting helpers. See the documentation for struct :c:type:`drm_crtc_helper_funcs`, :c:type:`struct drm_encoder_helper_funcs ` and struct :c:type:`drm_connector_helper_funcs`.h](hThese legacy modeset helpers use the same function table structures as all other modesetting helpers. See the documentation for struct }(hjhhhNhNubh)}(h:c:type:`drm_crtc_helper_funcs`h]jz)}(hj(h]hdrm_crtc_helper_funcs}(hj*hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj&ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:479: ./drivers/gpu/drm/drm_crtc_helper.chKXhjubh, }(hjhhhNhNubh)}(hD:c:type:`struct drm_encoder_helper_funcs `h]jz)}(hjLh]hstruct drm_encoder_helper_funcs}(hjNhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjJubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjEhKXhjubh and struct }(hjhhhNhNubh)}(h$:c:type:`drm_connector_helper_funcs`h]jz)}(hjoh]hdrm_connector_helper_funcs}(hjqhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjmubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_helper_funcsuh1hhjEhKXhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjEhKXhjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_helper_encoder_in_use (C function)c.drm_helper_encoder_in_usehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hdisable() hooks on a disabled function, or ->enable() hooks on an enabled functions. drm_helper_disable_unused_functions() on the other hand throws such guarantees into the wind and calls disable hooks unconditionally on unused functions.h](h)}(h**Parameters**h]j%)}(hj'h]h Parameters}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj%ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chKhj!ubji)}(hhh]jn)}(h&``struct drm_device *dev`` DRM device h](jt)}(h``struct drm_device *dev``h]jz)}(hjFh]hstruct drm_device *dev}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjDubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chKhj@ubj)}(hhh]h)}(h DRM deviceh]h DRM device}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[hKhj\ubah}(h]h ]h"]h$]h&]uh1jhj@ubeh}(h]h ]h"]h$]h&]uh1jmhj[hKhj=ubah}(h]h ]h"]h$]h&]uh1jhhj!ubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chKhj!ubh)}(hXOThis function walks through the entire mode setting configuration of **dev**. It will remove any CRTC links of unused encoders and encoder links of disconnected connectors. Then it will disable all unused encoders and CRTCs either by calling their disable callback if available or by calling their dpms callback with DRM_MODE_DPMS_OFF.h](hEThis function walks through the entire mode setting configuration of }(hjhhhNhNubj%)}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubhX. It will remove any CRTC links of unused encoders and encoder links of disconnected connectors. Then it will disable all unused encoders and CRTCs either by calling their disable callback if available or by calling their dpms callback with DRM_MODE_DPMS_OFF.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chKhj!ubh)}(h**NOTE**h]j%)}(hjh]hNOTE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chKhj!ubh)}(hXThis function is part of the legacy modeset helper library and will cause major confusion with atomic drivers. This is because atomic helpers guarantee to never call ->disable() hooks on a disabled function, or ->enable() hooks on an enabled functions. drm_helper_disable_unused_functions() on the other hand throws such guarantees into the wind and calls disable hooks unconditionally on unused functions.h]hXThis function is part of the legacy modeset helper library and will cause major confusion with atomic drivers. This is because atomic helpers guarantee to never call ->disable() hooks on a disabled function, or ->enable() hooks on an enabled functions. drm_helper_disable_unused_functions() on the other hand throws such guarantees into the wind and calls disable hooks unconditionally on unused functions.}(hjШhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chKhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j%drm_crtc_helper_set_mode (C function)c.drm_crtc_helper_set_modehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hbool drm_crtc_helper_set_mode (struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *old_fb)h]j)}(hbool drm_crtc_helper_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *old_fb)h](j)}(hjAh]hbool}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMubj)}(h h]h }(hj hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj hMubj)}(hdrm_crtc_helper_set_modeh]j)}(hdrm_crtc_helper_set_modeh]hdrm_crtc_helper_set_mode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj hMubj)}(hd(struct drm_crtc *crtc, struct drm_display_mode *mode, int x, int y, struct drm_framebuffer *old_fb)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj)}(h h]h }(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjVubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj[modnameN classnameNjj)}j]j)}jj!sbc.drm_crtc_helper_set_modeasbuh1hhj7ubj)}(h h]h }(hjyhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj7ubj)}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubj)}(hstruct drm_display_mode *modeh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_display_modeh]hdrm_display_mode}(hj˩hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjȩubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjͩmodnameN classnameNjj)}j]juc.drm_crtc_helper_set_modeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hmodeh]hmode}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubj)}(hint xh](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hj+hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hj+h]hx}(hj9hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubj)}(hint yh](j)}(hinth]hint}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(h h]h }(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubj)}(hj$,h]hy}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubj)}(hstruct drm_framebuffer *old_fbh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_framebufferh]hdrm_framebuffer}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]juc.drm_crtc_helper_set_modeasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjϪhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hold_fbh]hold_fb}(hjܪhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj3ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhj hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj hMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhj hMhjhhubj)}(hhh]h)}(hinternal helper to set a modeh]hinternal helper to set a mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXv**Parameters** ``struct drm_crtc *crtc`` CRTC to program ``struct drm_display_mode *mode`` mode to use ``int x`` horizontal offset into the surface ``int y`` vertical offset into the surface ``struct drm_framebuffer *old_fb`` old framebuffer, for cleanup **Description** Try to set **mode** on **crtc**. Give **crtc** and its associated connectors a chance to fixup or reject the mode prior to trying to set it. This is an internal helper that drivers could e.g. use to update properties that require the entire output pipe to be disabled and re-enabled in a new configuration. For example for changing whether audio is enabled on a hdmi link or for changing panel fitter or dither attributes. It is also called by the drm_crtc_helper_set_config() helper function to drive the mode setting sequence. **Return** True if the mode was set successfully, false otherwise.h](h)}(h**Parameters**h]j%)}(hj(h]h Parameters}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj&ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hj"ubji)}(hhh](jn)}(h*``struct drm_crtc *crtc`` CRTC to program h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjGh]hstruct drm_crtc *crtc}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjEubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjAubj)}(hhh]h)}(hCRTC to programh]hCRTC to program}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj\hM hj]ubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jmhj\hM hj>ubjn)}(h.``struct drm_display_mode *mode`` mode to use h](jt)}(h!``struct drm_display_mode *mode``h]jz)}(hjh]hstruct drm_display_mode *mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj~ubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjzubj)}(hhh]h)}(h mode to useh]h mode to use}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjzubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj>ubjn)}(h-``int x`` horizontal offset into the surface h](jt)}(h ``int x``h]jz)}(hjh]hint x}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjubj)}(hhh]h)}(h"horizontal offset into the surfaceh]h"horizontal offset into the surface}(hjҫhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjΫhM hjϫubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjΫhM hj>ubjn)}(h+``int y`` vertical offset into the surface h](jt)}(h ``int y``h]jz)}(hjh]hint y}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjubj)}(hhh]h)}(h vertical offset into the surfaceh]h vertical offset into the surface}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hj>ubjn)}(h@``struct drm_framebuffer *old_fb`` old framebuffer, for cleanup h](jt)}(h"``struct drm_framebuffer *old_fb``h]jz)}(hj+h]hstruct drm_framebuffer *old_fb}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hj%ubj)}(hhh]h)}(hold framebuffer, for cleanuph]hold framebuffer, for cleanup}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hM hjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj@hM hj>ubeh}(h]h ]h"]h$]h&]uh1jhhj"ubh)}(h**Description**h]j%)}(hjfh]h Description}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjdubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj"ubh)}(hXTry to set **mode** on **crtc**. Give **crtc** and its associated connectors a chance to fixup or reject the mode prior to trying to set it. This is an internal helper that drivers could e.g. use to update properties that require the entire output pipe to be disabled and re-enabled in a new configuration. For example for changing whether audio is enabled on a hdmi link or for changing panel fitter or dither attributes. It is also called by the drm_crtc_helper_set_config() helper function to drive the mode setting sequence.h](h Try to set }(hj|hhhNhNubj%)}(h**mode**h]hmode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh on }(hj|hhhNhNubj%)}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh. Give }(hj|hhhNhNubj%)}(h**crtc**h]hcrtc}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubhX and its associated connectors a chance to fixup or reject the mode prior to trying to set it. This is an internal helper that drivers could e.g. use to update properties that require the entire output pipe to be disabled and re-enabled in a new configuration. For example for changing whether audio is enabled on a hdmi link or for changing panel fitter or dither attributes. It is also called by the drm_crtc_helper_set_config() helper function to drive the mode setting sequence.}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj"ubh)}(h **Return**h]j%)}(hjìh]hReturn}(hjŬhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj"ubh)}(h7True if the mode was set successfully, false otherwise.h]h7True if the mode was set successfully, false otherwise.}(hj٬hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_crtc_helper_atomic_check (C function)c.drm_crtc_helper_atomic_checkhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hXint drm_crtc_helper_atomic_check (struct drm_crtc *crtc, struct drm_atomic_state *state)h]j)}(hWint drm_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_crtc_helper_atomic_checkh]j)}(hdrm_crtc_helper_atomic_checkh]hdrm_crtc_helper_atomic_check}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj%ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h7(struct drm_crtc *crtc, struct drm_atomic_state *state)h](j)}(hstruct drm_crtc *crtch](j)}(hjh]hstruct}(hjEhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj)}(h h]h }(hjRhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubh)}(hhh]j)}(hdrm_crtch]hdrm_crtc}(hjchhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjemodnameN classnameNjj)}j]j)}jj+sbc.drm_crtc_helper_atomic_checkasbuh1hhjAubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjAubj)}(hcrtch]hcrtc}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=ubj)}(hstruct drm_atomic_state *stateh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjĭhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_atomic_stateh]hdrm_atomic_state}(hjխhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjҭubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj׭modnameN classnameNjj)}j]jc.drm_crtc_helper_atomic_checkasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hstateh]hstate}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj=ubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h!Helper to check CRTC atomic-stateh]h!Helper to check CRTC atomic-state}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj5hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjPjjPjjjuh1jhhhjhNhNubj)}(hXb**Parameters** ``struct drm_crtc *crtc`` CRTC to check ``struct drm_atomic_state *state`` atomic state object **Description** Provides a default CRTC-state check handler for CRTCs that only have one primary plane attached to it. This is often the case for the CRTC of simple framebuffers. **Return** Zero on success, or an errno code otherwise.h](h)}(h**Parameters**h]j%)}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjTubji)}(hhh](jn)}(h(``struct drm_crtc *crtc`` CRTC to check h](jt)}(h``struct drm_crtc *crtc``h]jz)}(hjyh]hstruct drm_crtc *crtc}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjsubj)}(hhh]h)}(h CRTC to checkh]h CRTC to check}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjpubjn)}(h7``struct drm_atomic_state *state`` atomic state object h](jt)}(h"``struct drm_atomic_state *state``h]jz)}(hjh]hstruct drm_atomic_state *state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubj)}(hhh]h)}(hatomic state objecth]hatomic state object}(hjˮhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjǮhMhjȮubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjǮhMhjpubeh}(h]h ]h"]h$]h&]uh1jhhjTubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjTubh)}(hProvides a default CRTC-state check handler for CRTCs that only have one primary plane attached to it. This is often the case for the CRTC of simple framebuffers.h]hProvides a default CRTC-state check handler for CRTCs that only have one primary plane attached to it. This is often the case for the CRTC of simple framebuffers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjTubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjTubh)}(h,Zero on success, or an errno code otherwise.h]h,Zero on success, or an errno code otherwise.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j'drm_crtc_helper_set_config (C function)c.drm_crtc_helper_set_confighNtauh1jxhjhhhNhNubj)}(hhh](j)}(h^int drm_crtc_helper_set_config (struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h]j)}(h]int drm_crtc_helper_set_config(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hinth]hint}(hjYhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjUhhhjghMubj)}(hdrm_crtc_helper_set_configh]j)}(hdrm_crtc_helper_set_configh]hdrm_crtc_helper_set_config}(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjvubah}(h]h ](jjeh"]h$]h&]jjuh1jhjUhhhjghMubj)}(h?(struct drm_mode_set *set, struct drm_modeset_acquire_ctx *ctx)h](j)}(hstruct drm_mode_set *seth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(h drm_mode_seth]h drm_mode_set}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj|sbc.drm_crtc_helper_set_configasbuh1hhjubj)}(h h]h }(hjԯhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hseth]hset}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h#struct drm_modeset_acquire_ctx *ctxh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_modeset_acquire_ctxh]hdrm_modeset_acquire_ctx}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj(modnameN classnameNjj)}j]jЯc.drm_crtc_helper_set_configasbuh1hhjubj)}(h h]h }(hjDhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjRhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hctxh]hctx}(hj_hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjUhhhjghMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjQhhhjghMubah}(h]jLah ](jjeh"]h$]h&]jj)jhuh1jhjghMhjNhhubj)}(hhh]h)}(hset a new config from userspaceh]hset a new config from userspace}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjNhhhjghMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXF**Parameters** ``struct drm_mode_set *set`` mode set configuration ``struct drm_modeset_acquire_ctx *ctx`` lock acquire context, not used here **Description** The drm_crtc_helper_set_config() helper function implements the of :c:type:`drm_crtc_funcs.set_config ` callback for drivers using the legacy CRTC helpers. It first tries to locate the best encoder for each connector by calling the connector **drm_connector_helper_funcs.best_encoder** helper operation. After locating the appropriate encoders, the helper function will call the mode_fixup encoder and CRTC helper operations to adjust the requested mode, or reject it completely in which case an error will be returned to the application. If the new configuration after mode adjustment is identical to the current configuration the helper function will return without performing any other operation. If the adjusted mode is identical to the current mode but changes to the frame buffer need to be applied, the drm_crtc_helper_set_config() function will call the CRTC :c:type:`drm_crtc_helper_funcs.mode_set_base ` helper operation. If the adjusted mode differs from the current mode, or if the ->mode_set_base() helper operation is not provided, the helper function performs a full mode set sequence by calling the ->prepare(), ->mode_set() and ->commit() CRTC and encoder helper operations, in that order. Alternatively it can also use the dpms and disable helper operations. For details see :c:type:`struct drm_crtc_helper_funcs ` and struct :c:type:`drm_encoder_helper_funcs`. This function is deprecated. New drivers must implement atomic modeset support, for which this function is unsuitable. Instead drivers should use drm_atomic_helper_set_config(). **Return** Returns 0 on success, negative errno numbers on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubji)}(hhh](jn)}(h4``struct drm_mode_set *set`` mode set configuration h](jt)}(h``struct drm_mode_set *set``h]jz)}(hjʰh]hstruct drm_mode_set *set}(hj̰hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjȰubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjİubj)}(hhh]h)}(hmode set configurationh]hmode set configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj߰hMhjubah}(h]h ]h"]h$]h&]uh1jhjİubeh}(h]h ]h"]h$]h&]uh1jmhj߰hMhjubjn)}(hL``struct drm_modeset_acquire_ctx *ctx`` lock acquire context, not used here h](jt)}(h'``struct drm_modeset_acquire_ctx *ctx``h]jz)}(hjh]h#struct drm_modeset_acquire_ctx *ctx}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubj)}(hhh]h)}(h#lock acquire context, not used hereh]h#lock acquire context, not used here}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj>h]h Description}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj<ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hThe drm_crtc_helper_set_config() helper function implements the of :c:type:`drm_crtc_funcs.set_config ` callback for drivers using the legacy CRTC helpers.h](hCThe drm_crtc_helper_set_config() helper function implements the of }(hjThhhNhNubh)}(h4:c:type:`drm_crtc_funcs.set_config `h]jz)}(hj^h]hdrm_crtc_funcs.set_config}(hj`hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjTubh4 callback for drivers using the legacy CRTC helpers.}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhj{hMhjubh)}(hIt first tries to locate the best encoder for each connector by calling the connector **drm_connector_helper_funcs.best_encoder** helper operation.h](hVIt first tries to locate the best encoder for each connector by calling the connector }(hjhhhNhNubj%)}(h+**drm_connector_helper_funcs.best_encoder**h]h'drm_connector_helper_funcs.best_encoder}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh helper operation.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjubh)}(hXAfter locating the appropriate encoders, the helper function will call the mode_fixup encoder and CRTC helper operations to adjust the requested mode, or reject it completely in which case an error will be returned to the application. If the new configuration after mode adjustment is identical to the current configuration the helper function will return without performing any other operation.h]hXAfter locating the appropriate encoders, the helper function will call the mode_fixup encoder and CRTC helper operations to adjust the requested mode, or reject it completely in which case an error will be returned to the application. If the new configuration after mode adjustment is identical to the current configuration the helper function will return without performing any other operation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjubh)}(hIf the adjusted mode is identical to the current mode but changes to the frame buffer need to be applied, the drm_crtc_helper_set_config() function will call the CRTC :c:type:`drm_crtc_helper_funcs.mode_set_base ` helper operation.h](hIf the adjusted mode is identical to the current mode but changes to the frame buffer need to be applied, the drm_crtc_helper_set_config() function will call the CRTC }(hjhhhNhNubh)}(hE:c:type:`drm_crtc_helper_funcs.mode_set_base `h]jz)}(hjh]h#drm_crtc_helper_funcs.mode_set_base}(hj±hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh helper operation.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjݱhMhjubh)}(hXIf the adjusted mode differs from the current mode, or if the ->mode_set_base() helper operation is not provided, the helper function performs a full mode set sequence by calling the ->prepare(), ->mode_set() and ->commit() CRTC and encoder helper operations, in that order. Alternatively it can also use the dpms and disable helper operations. For details see :c:type:`struct drm_crtc_helper_funcs ` and struct :c:type:`drm_encoder_helper_funcs`.h](hXiIf the adjusted mode differs from the current mode, or if the ->mode_set_base() helper operation is not provided, the helper function performs a full mode set sequence by calling the ->prepare(), ->mode_set() and ->commit() CRTC and encoder helper operations, in that order. Alternatively it can also use the dpms and disable helper operations. For details see }(hjhhhNhNubh)}(h>:c:type:`struct drm_crtc_helper_funcs `h]jz)}(hjh]hstruct drm_crtc_helper_funcs}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh and struct }(hjhhhNhNubh)}(h":c:type:`drm_encoder_helper_funcs`h]jz)}(hjh]hdrm_encoder_helper_funcs}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjhMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hThis function is deprecated. New drivers must implement atomic modeset support, for which this function is unsuitable. Instead drivers should use drm_atomic_helper_set_config().h]hThis function is deprecated. New drivers must implement atomic modeset support, for which this function is unsuitable. Instead drivers should use drm_atomic_helper_set_config().}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjubh)}(h **Return**h]j%)}(hjNh]hReturn}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjLubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM$hjubh)}(h8Returns 0 on success, negative errno numbers on failure.h]h8Returns 0 on success, negative errno numbers on failure.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM%hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j&drm_helper_connector_dpms (C function)c.drm_helper_connector_dpmshNtauh1jxhjhhhNhNubj)}(hhh](j)}(hIint drm_helper_connector_dpms (struct drm_connector *connector, int mode)h]j)}(hHint drm_helper_connector_dpms(struct drm_connector *connector, int mode)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMyubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMyubj)}(hdrm_helper_connector_dpmsh]j)}(hdrm_helper_connector_dpmsh]hdrm_helper_connector_dpms}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMyubj)}(h+(struct drm_connector *connector, int mode)h](j)}(hstruct drm_connector *connectorh](j)}(hjh]hstruct}(hjвhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubj)}(h h]h }(hjݲhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubh)}(hhh]j)}(h drm_connectorh]h drm_connector}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsbc.drm_helper_connector_dpmsasbuh1hhj̲ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj̲ubj)}(h connectorh]h connector}(hj)hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj̲ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjȲubj)}(hint modeh](j)}(hinth]hint}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(h h]h }(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubj)}(hmodeh]hmode}(hj^hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjȲubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMyubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMyubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMyhjhhubj)}(hhh]h)}(h$connector dpms helper implementationh]h$connector dpms helper implementation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMyhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMyubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX8**Parameters** ``struct drm_connector *connector`` affected connector ``int mode`` DPMS mode **Description** The drm_helper_connector_dpms() helper function implements the :c:type:`drm_connector_funcs.dpms ` callback for drivers using the legacy CRTC helpers. This is the main helper function provided by the CRTC helper framework for implementing the DPMS connector attribute. It computes the new desired DPMS state for all encoders and CRTCs in the output mesh and calls the :c:type:`drm_crtc_helper_funcs.dpms ` and :c:type:`drm_encoder_helper_funcs.dpms ` callbacks provided by the driver. This function is deprecated. New drivers must implement atomic modeset support, where DPMS is handled in the DRM core. **Return** Always returns 0.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM}hjubji)}(hhh](jn)}(h7``struct drm_connector *connector`` affected connector h](jt)}(h#``struct drm_connector *connector``h]jz)}(hjɳh]hstruct drm_connector *connector}(hj˳hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjdzubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMzhjóubj)}(hhh]h)}(haffected connectorh]haffected connector}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj޳hMzhj߳ubah}(h]h ]h"]h$]h&]uh1jhjóubeh}(h]h ]h"]h$]h&]uh1jmhj޳hMzhjubjn)}(h``int mode`` DPMS mode h](jt)}(h ``int mode``h]jz)}(hjh]hint mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM{hjubj)}(hhh]h)}(h DPMS modeh]h DPMS mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM{hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM{hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj=h]h Description}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj;ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM}hjubh)}(hThe drm_helper_connector_dpms() helper function implements the :c:type:`drm_connector_funcs.dpms ` callback for drivers using the legacy CRTC helpers.h](h?The drm_helper_connector_dpms() helper function implements the }(hjShhhNhNubh)}(h8:c:type:`drm_connector_funcs.dpms `h]jz)}(hj]h]hdrm_connector_funcs.dpms}(hj_hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_connector_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM|hjSubh4 callback for drivers using the legacy CRTC helpers.}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjzhM|hjubh)}(hX~This is the main helper function provided by the CRTC helper framework for implementing the DPMS connector attribute. It computes the new desired DPMS state for all encoders and CRTCs in the output mesh and calls the :c:type:`drm_crtc_helper_funcs.dpms ` and :c:type:`drm_encoder_helper_funcs.dpms ` callbacks provided by the driver.h](hThis is the main helper function provided by the CRTC helper framework for implementing the DPMS connector attribute. It computes the new desired DPMS state for all encoders and CRTCs in the output mesh and calls the }(hjhhhNhNubh)}(h<:c:type:`drm_crtc_helper_funcs.dpms `h]jz)}(hjh]hdrm_crtc_helper_funcs.dpms}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_crtc_helper_funcsuh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh and }(hjhhhNhNubh)}(hB:c:type:`drm_encoder_helper_funcs.dpms `h]jz)}(hjh]hdrm_encoder_helper_funcs.dpms}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_encoder_helper_funcsuh1hhjhMhjubh" callbacks provided by the driver.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubh)}(hwThis function is deprecated. New drivers must implement atomic modeset support, where DPMS is handled in the DRM core.h]hwThis function is deprecated. New drivers must implement atomic modeset support, where DPMS is handled in the DRM core.}(hjڴhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubh)}(hAlways returns 0.h]hAlways returns 0.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_helper_resume_force_mode (C function)c.drm_helper_resume_force_modehNtauh1jxhjhhhNhNubj)}(hhh](j)}(h:void drm_helper_resume_force_mode (struct drm_device *dev)h]j)}(h9void drm_helper_resume_force_mode(struct drm_device *dev)h](j)}(hvoidh]hvoid}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMubj)}(h h]h }(hj?hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj,hhhj>hMubj)}(hdrm_helper_resume_force_modeh]j)}(hdrm_helper_resume_force_modeh]hdrm_helper_resume_force_mode}(hjQhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjMubah}(h]h ](jjeh"]h$]h&]jjuh1jhj,hhhj>hMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hjmhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj)}(h h]h }(hjzhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjSsbc.drm_helper_resume_force_modeasbuh1hhjiubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjiubj)}(hdevh]hdev}(hjƵhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjiubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjeubah}(h]h ]h"]h$]h&]jjuh1jhj,hhhj>hMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj(hhhj>hMubah}(h]j#ah ](jjeh"]h$]h&]jj)jhuh1jhj>hMhj%hhubj)}(hhh]h)}(h(force-restore mode setting configurationh]h(force-restore mode setting configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhj%hhhj>hMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXL**Parameters** ``struct drm_device *dev`` drm_device which should be restored **Description** Drivers which use the mode setting helpers can use this function to force-restore the mode setting configuration e.g. on resume or when something else might have trampled over the hw state (like some overzealous old BIOSen tended to do). This helper doesn't provide a error return value since restoring the old config should never fail due to resource allocation issues since the driver has successfully set the restored configuration already. Hence this should boil down to the equivalent of a few dpms on calls, which also don't provide an error code. Drivers where simply restoring an old configuration again might fail (e.g. due to slight differences in allocating shared resources when the configuration is restored in a different order than when userspace set it up) need to use their own restore logic. This function is deprecated. New drivers should implement atomic mode- setting and use the atomic suspend/resume helpers. See also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubji)}(hhh]jn)}(h?``struct drm_device *dev`` drm_device which should be restored h](jt)}(h``struct drm_device *dev``h]jz)}(hj1h]hstruct drm_device *dev}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj/ubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj+ubj)}(hhh]h)}(h#drm_device which should be restoredh]h#drm_device which should be restored}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjFhMhjGubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jmhjFhMhj(ubah}(h]h ]h"]h$]h&]uh1jhhj ubh)}(h**Description**h]j%)}(hjlh]h Description}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjjubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubh)}(hDrivers which use the mode setting helpers can use this function to force-restore the mode setting configuration e.g. on resume or when something else might have trampled over the hw state (like some overzealous old BIOSen tended to do).h]hDrivers which use the mode setting helpers can use this function to force-restore the mode setting configuration e.g. on resume or when something else might have trampled over the hw state (like some overzealous old BIOSen tended to do).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubh)}(hX;This helper doesn't provide a error return value since restoring the old config should never fail due to resource allocation issues since the driver has successfully set the restored configuration already. Hence this should boil down to the equivalent of a few dpms on calls, which also don't provide an error code.h]hX?This helper doesn’t provide a error return value since restoring the old config should never fail due to resource allocation issues since the driver has successfully set the restored configuration already. Hence this should boil down to the equivalent of a few dpms on calls, which also don’t provide an error code.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubh)}(hDrivers where simply restoring an old configuration again might fail (e.g. due to slight differences in allocating shared resources when the configuration is restored in a different order than when userspace set it up) need to use their own restore logic.h]hDrivers where simply restoring an old configuration again might fail (e.g. due to slight differences in allocating shared resources when the configuration is restored in a different order than when userspace set it up) need to use their own restore logic.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubh)}(hyThis function is deprecated. New drivers should implement atomic mode- setting and use the atomic suspend/resume helpers.h]hyThis function is deprecated. New drivers should implement atomic mode- setting and use the atomic suspend/resume helpers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubh)}(hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()h]hASee also: drm_atomic_helper_suspend(), drm_atomic_helper_resume()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j)drm_helper_force_disable_all (C function)c.drm_helper_force_disable_allhNtauh1jxhjhhhNhNubj)}(hhh](j)}(h9int drm_helper_force_disable_all (struct drm_device *dev)h]j)}(h8int drm_helper_force_disable_all(struct drm_device *dev)h](j)}(hinth]hint}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_helper_force_disable_allh]j)}(hdrm_helper_force_disable_allh]hdrm_helper_force_disable_all}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h(struct drm_device *dev)h]j)}(hstruct drm_device *devh](j)}(hjh]hstruct}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj)}(h h]h }(hj7hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubh)}(hhh]j)}(h drm_deviceh]h drm_device}(hjHhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjEubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjJmodnameN classnameNjj)}j]j)}jjsbc.drm_helper_force_disable_allasbuh1hhj&ubj)}(h h]h }(hjhhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubj+)}(hj9h]h*}(hjvhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj&ubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhj"ubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(h#Forcibly turn off all enabled CRTCsh]h#Forcibly turn off all enabled CRTCs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjŷjjŷjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_device *dev`` DRM device whose CRTCs to turn off **Description** Drivers may want to call this on unload to ensure that all displays are unlit and the GPU is in a consistent, low power state. Takes modeset locks. **Note** This should only be used by non-atomic legacy drivers. For an atomic version look at drm_atomic_helper_shutdown(). **Return** Zero on success, error code on failure.h](h)}(h**Parameters**h]j%)}(hjϷh]h Parameters}(hjѷhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjͷubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjɷubji)}(hhh]jn)}(h>``struct drm_device *dev`` DRM device whose CRTCs to turn off h](jt)}(h``struct drm_device *dev``h]jz)}(hjh]hstruct drm_device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjubj)}(hhh]h)}(h"DRM device whose CRTCs to turn offh]h"DRM device whose CRTCs to turn off}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM hjubah}(h]h ]h"]h$]h&]uh1jhhjɷubh)}(h**Description**h]j%)}(hj)h]h Description}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj'ubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjɷubh)}(hDrivers may want to call this on unload to ensure that all displays are unlit and the GPU is in a consistent, low power state. Takes modeset locks.h]hDrivers may want to call this on unload to ensure that all displays are unlit and the GPU is in a consistent, low power state. Takes modeset locks.}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjɷubh)}(h**Note**h]j%)}(hjPh]hNote}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chM hjɷubh)}(hrThis should only be used by non-atomic legacy drivers. For an atomic version look at drm_atomic_helper_shutdown().h]hrThis should only be used by non-atomic legacy drivers. For an atomic version look at drm_atomic_helper_shutdown().}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjɷubh)}(h **Return**h]j%)}(hjwh]hReturn}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjuubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjɷubh)}(h'Zero on success, error code on failure.h]h'Zero on success, error code on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhf/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:482: ./drivers/gpu/drm/drm_crtc_helper.chMhjɷubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h].legacy-crtc-modeset-helper-functions-referenceah ]h"].legacy crtc/modeset helper functions referenceah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(hPrivacy-screen classh]hPrivacy-screen class}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hXThis class allows non KMS drivers, from e.g. drivers/platform/x86 to register a privacy-screen device, which the KMS drivers can then use to implement the standard privacy-screen properties, see :ref:`Standard Connector Properties`.h](hThis class allows non KMS drivers, from e.g. drivers/platform/x86 to register a privacy-screen device, which the KMS drivers can then use to implement the standard privacy-screen properties, see }(hjhhhNhNubh)}(hC:ref:`Standard Connector Properties`h]hinline)}(hjƸh]hStandard Connector Properties}(hjʸhhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jȸhjĸubah}(h]h ]h"]h$]h&]refdocj refdomainjԸreftyperef refexplicitrefwarnjstandard_connector_propertiesuh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:488: ./drivers/gpu/drm/drm_privacy_screen.chKhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKhjhhubh)}(hKMS drivers using a privacy-screen class device are advised to use the drm_connector_attach_privacy_screen_provider() and drm_connector_update_privacy_screen() helpers for dealing with this.h]hKMS drivers using a privacy-screen class device are advised to use the drm_connector_attach_privacy_screen_provider() and drm_connector_update_privacy_screen() helpers for dealing with this.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:488: ./drivers/gpu/drm/drm_privacy_screen.chKhjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j!drm_privacy_screen_ops (C struct)c.drm_privacy_screen_opshNtauh1jxhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhNubj)}(hhh](j)}(hdrm_privacy_screen_opsh]j)}(hstruct drm_privacy_screen_opsh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKubj)}(h h]h }(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhj'hKubj)}(hdrm_privacy_screen_opsh]j)}(hjh]hdrm_privacy_screen_ops}(hj:hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj6ubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhj'hKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhj'hKubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jhj'hKhjhhubj)}(hhh]h)}(hdrm_privacy_screen operationsh]hdrm_privacy_screen operations}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKhjYhhubah}(h]h ]h"]h$]h&]uh1jhjhhhj'hKubeh}(h]h ](jstructeh"]h$]h&]jjjjtjjtjjjuh1jhhhjhjhNubj)}(hX7**Definition**:: struct drm_privacy_screen_ops { int (*set_sw_state)(struct drm_privacy_screen *priv, enum drm_privacy_screen_status sw_state); void (*get_hw_state)(struct drm_privacy_screen *priv); }; **Members** ``set_sw_state`` Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver's responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen's lock held. ``get_hw_state`` Called to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.h](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj|ubh:}(hj|hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKhjxubj@)}(hstruct drm_privacy_screen_ops { int (*set_sw_state)(struct drm_privacy_screen *priv, enum drm_privacy_screen_status sw_state); void (*get_hw_state)(struct drm_privacy_screen *priv); };h]hstruct drm_privacy_screen_ops { int (*set_sw_state)(struct drm_privacy_screen *priv, enum drm_privacy_screen_status sw_state); void (*get_hw_state)(struct drm_privacy_screen *priv); };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKhjxubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKhjxubji)}(hhh](jn)}(hXF``set_sw_state`` Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver's responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen's lock held. h](jt)}(h``set_sw_state``h]jz)}(hjɹh]h set_sw_state}(hj˹hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjǹubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK hjùubj)}(hhh]h)}(hX4Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver's responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen's lock held.h]hX8Called to request a change of the privacy-screen state. The privacy-screen class code contains a check to avoid this getting called when the hw_state reports the state is locked. It is the driver’s responsibility to update sw_state and hw_state. This is always called with the drm_privacy_screen’s lock held.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKhj߹ubah}(h]h ]h"]h$]h&]uh1jhjùubeh}(h]h ]h"]h$]h&]uh1jmhj޹hK hjubjn)}(h``get_hw_state`` Called to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.h](jt)}(h``get_hw_state``h]jz)}(hjh]h get_hw_state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK'hjubj)}(hhh]h)}(hCalled to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.h]hCalled to request that the driver gets the current privacy-screen state from the hardware and then updates sw_state and hw_state accordingly. This will be called by the core just before the privacy-screen is registered in sysfs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK%hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK'hjubeh}(h]h ]h"]h$]h&]uh1jhhjxubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhjhNubh)}(h**Description**h]j%)}(hjFh]h Description}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjDubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK+hjhhubh)}(hDefines the operations which the privacy-screen class code may call. These functions should be implemented by the privacy-screen driver.h]hDefines the operations which the privacy-screen class code may call. These functions should be implemented by the privacy-screen driver.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKhjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](jdrm_privacy_screen (C struct)c.drm_privacy_screenhNtauh1jxhjhhhjhNubj)}(hhh](j)}(hdrm_privacy_screenh]j)}(hstruct drm_privacy_screenh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_privacy_screenh]j)}(hj~h]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj|hhhjhKubah}(h]jwah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjyhhubj)}(hhh]h)}(h central privacy-screen structureh]h central privacy-screen structure}(hjƺhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK-hjúhhubah}(h]h ]h"]h$]h&]uh1jhjyhhhjhKubeh}(h]h ](jstructeh"]h$]h&]jjjj޺jj޺jjjuh1jhhhjhjhNubj)}(hXM**Definition**:: struct drm_privacy_screen { struct device dev; struct mutex lock; struct list_head list; struct blocking_notifier_head notifier_head; const struct drm_privacy_screen_ops *ops; enum drm_privacy_screen_status sw_state; enum drm_privacy_screen_status hw_state; void *drvdata; }; **Members** ``dev`` device used to register the privacy-screen in sysfs. ``lock`` mutex protection all fields in this struct. ``list`` privacy-screen devices list list-entry. ``notifier_head`` privacy-screen notifier head. ``ops`` :c:type:`struct drm_privacy_screen_ops ` for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen. ``sw_state`` The privacy-screen's software state, see :ref:`Standard Connector Properties` for more info. ``hw_state`` The privacy-screen's hardware state, see :ref:`Standard Connector Properties` for more info. ``drvdata`` Private data owned by the privacy screen providerh](h)}(h**Definition**::h](j%)}(h**Definition**h]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK1hjubj@)}(hX3struct drm_privacy_screen { struct device dev; struct mutex lock; struct list_head list; struct blocking_notifier_head notifier_head; const struct drm_privacy_screen_ops *ops; enum drm_privacy_screen_status sw_state; enum drm_privacy_screen_status hw_state; void *drvdata; };h]hX3struct drm_privacy_screen { struct device dev; struct mutex lock; struct list_head list; struct blocking_notifier_head notifier_head; const struct drm_privacy_screen_ops *ops; enum drm_privacy_screen_status sw_state; enum drm_privacy_screen_status hw_state; void *drvdata; };}hjsbah}(h]h ]h"]h$]h&]jjuh1j?hl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK3hjubh)}(h **Members**h]j%)}(hjh]hMembers}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK>hjubji)}(hhh](jn)}(h=``dev`` device used to register the privacy-screen in sysfs. h](jt)}(h``dev``h]jz)}(hj3h]hdev}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj1ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK4hj-ubj)}(hhh]h)}(h4device used to register the privacy-screen in sysfs.h]h4device used to register the privacy-screen in sysfs.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhK4hjIubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jmhjHhK4hj*ubjn)}(h5``lock`` mutex protection all fields in this struct. h](jt)}(h``lock``h]jz)}(hjlh]hlock}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK6hjfubj)}(hhh]h)}(h+mutex protection all fields in this struct.h]h+mutex protection all fields in this struct.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK6hjubah}(h]h ]h"]h$]h&]uh1jhjfubeh}(h]h ]h"]h$]h&]uh1jmhjhK6hj*ubjn)}(h1``list`` privacy-screen devices list list-entry. h](jt)}(h``list``h]jz)}(hjh]hlist}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK8hjubj)}(hhh]h)}(h'privacy-screen devices list list-entry.h]h'privacy-screen devices list list-entry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK8hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK8hj*ubjn)}(h0``notifier_head`` privacy-screen notifier head. h](jt)}(h``notifier_head``h]jz)}(hj޻h]h notifier_head}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjܻubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK:hjػubj)}(hhh]h)}(hprivacy-screen notifier head.h]hprivacy-screen notifier head.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK:hjubah}(h]h ]h"]h$]h&]uh1jhjػubeh}(h]h ]h"]h$]h&]uh1jmhjhK:hj*ubjn)}(h``ops`` :c:type:`struct drm_privacy_screen_ops ` for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen. h](jt)}(h``ops``h]jz)}(hjh]hops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK>hjubj)}(hhh]h)}(h:c:type:`struct drm_privacy_screen_ops ` for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen.h](h)}(h@:c:type:`struct drm_privacy_screen_ops `h]jz)}(hj6h]hstruct drm_privacy_screen_ops}(hj8hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj4ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_privacy_screen_opsuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhK=hj0ubhY for this privacy-screen. This is NULL if the driver has unregistered the privacy-screen.}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjShK=hj-ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj,hK>hj*ubjn)}(h``sw_state`` The privacy-screen's software state, see :ref:`Standard Connector Properties` for more info. h](jt)}(h ``sw_state``h]jz)}(hjph]hsw_state}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjnubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKDhjjubj)}(hhh]h)}(h{The privacy-screen's software state, see :ref:`Standard Connector Properties` for more info.h](h+The privacy-screen’s software state, see }(hjhhhNhNubh)}(hC:ref:`Standard Connector Properties`h]jɸ)}(hjh]hStandard Connector Properties}(hjhhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jȸhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftyperef refexplicitrefwarnjstandard_connector_propertiesuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKBhjubh for more info.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKBhjubah}(h]h ]h"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]uh1jmhjhKDhj*ubjn)}(h``hw_state`` The privacy-screen's hardware state, see :ref:`Standard Connector Properties` for more info. h](jt)}(h ``hw_state``h]jz)}(hjμh]hhw_state}(hjмhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj̼ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKJhjȼubj)}(hhh]h)}(h{The privacy-screen's hardware state, see :ref:`Standard Connector Properties` for more info.h](h+The privacy-screen’s hardware state, see }(hjhhhNhNubh)}(hC:ref:`Standard Connector Properties`h]jɸ)}(hjh]hStandard Connector Properties}(hjhhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jȸhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftyperef refexplicitrefwarnjstandard_connector_propertiesuh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKHhjubh for more info.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKHhjubah}(h]h ]h"]h$]h&]uh1jhjȼubeh}(h]h ]h"]h$]h&]uh1jmhjhKJhj*ubjn)}(h=``drvdata`` Private data owned by the privacy screen providerh](jt)}(h ``drvdata``h]jz)}(hj,h]hdrvdata}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]uh1jshl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKMhj&ubj)}(hhh]h)}(h1Private data owned by the privacy screen providerh]h1Private data owned by the privacy screen provider}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhl/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:491: ./include/drm/drm_privacy_screen_driver.hhKNhjBubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jmhjAhKMhj*ubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhjhNubh)}(h**Description**h]j%)}(hjoh]h Description}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjmubah}(h]h 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h](jt)}(h``list``h]jz)}(hj]h]hlist}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj[ubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:494: ./include/drm/drm_privacy_screen_machine.hhKhjWubj)}(hhh]h)}(hLookup list list-entry.h]hLookup list list-entry.}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjrhKhjsubah}(h]h ]h"]h$]h&]uh1jhjWubeh}(h]h ]h"]h$]h&]uh1jmhjrhKhjTubjn)}(h>``dev_id`` Consumer device name or NULL to match all devices. h](jt)}(h ``dev_id``h]jz)}(hjh]hdev_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:494: ./include/drm/drm_privacy_screen_machine.hhKhjubj)}(hhh]h)}(h2Consumer device name or NULL to match all devices.h]h2Consumer device name or NULL to match all devices.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjTubjn)}(hD``con_id`` Consumer connector name or NULL to match all connectors. h](jt)}(h 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]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjTubeh}(h]h ]h"]h$]h&]uh1jhhj ubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhjhNubh)}(h**Description**h]j%)}(hjKh]h Description}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjIubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:494: ./include/drm/drm_privacy_screen_machine.hhKhjhhubh)}(huUsed for the static lookup-list for mapping privacy-screen consumer dev-connector pairs to a privacy-screen provider.h]huUsed for the static lookup-list for mapping privacy-screen consumer dev-connector pairs to a privacy-screen provider.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhm/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:494: ./include/drm/drm_privacy_screen_machine.hhKhjhhubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_privacy_screen_lookup_add (C function)c.drm_privacy_screen_lookup_addhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hMvoid drm_privacy_screen_lookup_add (struct drm_privacy_screen_lookup *lookup)h]j)}(hLvoid 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]j6ah"]h$]h&]uh1j*hj¿ubj)}(hlookuph]hlookup}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj¿ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjhhhjhK.ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhK.ubah}(h]j|ah ](jjeh"]h$]h&]jj)jhuh1jhjhK.hj~hhubj)}(hhh]h)}(h5add an entry to the static privacy-screen lookup listh]h5add an entry to the static privacy-screen lookup list}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chK.hjFhhubah}(h]h ]h"]h$]h&]uh1jhj~hhhjhK.ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjajjajjjuh1jhhhjhNhNubj)}(hX'**Parameters** ``struct drm_privacy_screen_lookup *lookup`` lookup list entry to add **Description** Add an entry to the static privacy-screen lookup list. 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So the passed in :c:type:`struct drm_privacy_screen_lookup ` must not be free-ed until it is removed from the lookup list by calling drm_privacy_screen_lookup_remove().h](h)}(h**Parameters**h]j%)}(hjkh]h Parameters}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjiubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chK2hjeubji)}(hhh]jn)&}(hF``struct drm_privacy_screen_lookup *lookup`` lookup list entry to add h](jt)}(h,``struct drm_privacy_screen_lookup *lookup``h]jz)}(hjh]h(struct drm_privacy_screen_lookup *lookup}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chK0hjubj)}(hhh]h)}(hlookup list entry to addh]hlookup list entry to add}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhK0hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhK0hjubah}(h]h ]h"]h$]h&]uh1jhhjeubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chK2hjeubh)}(hXAdd an entry to the static privacy-screen lookup list. Note the :c:type:`struct list_head ` which is part of the :c:type:`struct drm_privacy_screen_lookup ` gets added to a list owned by the privacy-screen core. So the passed in :c:type:`struct drm_privacy_screen_lookup ` must not be free-ed until it is removed from the lookup list by calling drm_privacy_screen_lookup_remove().h](h@Add an entry to the static privacy-screen lookup list. Note the }(hjhhhNhNubh)}(h&:c:type:`struct list_head `h]jz)}(hjh]hstruct list_head}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj list_headuh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chK1hjubh which is part of the }(hjhhhNhNubh)}(hF:c:type:`struct drm_privacy_screen_lookup `h]jz)}(hj h]h struct drm_privacy_screen_lookup}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_privacy_screen_lookupuh1hhjhK1hjubhI gets added to a list owned by the privacy-screen core. So the passed in }(hjhhhNhNubh)}(hF:c:type:`struct drm_privacy_screen_lookup `h]jz)}(hj,h]h struct drm_privacy_screen_lookup}(hj.hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhj*ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_privacy_screen_lookupuh1hhjhK1hjubhl must not be free-ed until it is removed from the lookup list by calling drm_privacy_screen_lookup_remove().}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhK1hjeubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j-drm_privacy_screen_lookup_remove (C function)"c.drm_privacy_screen_lookup_removehNtauh1jxhjhhhNhNubj)}(hhh](j)}(hPvoid drm_privacy_screen_lookup_remove (struct drm_privacy_screen_lookup *lookup)h]j)}(hOvoid drm_privacy_screen_lookup_remove(struct drm_privacy_screen_lookup *lookup)h](j)}(hvoidh]hvoid}(hjshhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjohhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKAubj)}(h h]h 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*lookup``h]jz)}(hjth]h(struct drm_privacy_screen_lookup *lookup}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjrubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKChjnubj)}(hhh]h)}(hlookup list entry to removeh]hlookup list entry to remove}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKChjubah}(h]h ]h"]h$]h&]uh1jhjnubeh}(h]h ]h"]h$]h&]uh1jmhjhKChjkubah}(h]h ]h"]h$]h&]uh1jhhjOubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKEhjOubh)}(hqRemove an entry previously added with drm_privacy_screen_lookup_add() from the static privacy-screen lookup list.h]hqRemove an entry previously added with drm_privacy_screen_lookup_add() from the static privacy-screen lookup list.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKDhjOubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_privacy_screen_get (C function)c.drm_privacy_screen_gethNtauh1jxhjhhhNhNubj)}(hhh](j)}(h[struct drm_privacy_screen * drm_privacy_screen_get (struct device *dev, const char *con_id)h]j)}(hYstruct drm_privacy_screen *drm_privacy_screen_get(struct device *dev, const char *con_id)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKgubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKgubh)}(hhh]j)}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_privacy_screen_getsbc.drm_privacy_screen_getasbuh1hhjhhhjhKgubj)}(h h]h }(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKgubj+)}(hj9h]h*}(hjBhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhKgubj)}(hdrm_privacy_screen_geth]j)}(hj1h]hdrm_privacy_screen_get}(hjShhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjOubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKgubj)}(h((struct device *dev, const char *con_id)h](j)}(hstruct device *devh](j)}(hjh]hstruct}(hjnhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj)}(h h]h }(hj{hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubh)}(hhh]j)}(hdeviceh]hdevice}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j/c.drm_privacy_screen_getasbuh1hhjjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjjubj)}(hdevh]hdev}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubj)}(hconst char *con_idh](j)}(hjUh]hconst}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(hcharh]hchar}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hcon_idh]hcon_id}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjfubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKgubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKgubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKghjhhubj)}(hhh]h)}(hget a privacy-screen providerh]hget a privacy-screen provider}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKghjIhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKgubeh}(h]h ](jfunctioneh"]h$]h&]jjjjdjjdjjjuh1jhhhjhNhNubj)}(hXi**Parameters** ``struct device *dev`` consumer-device for which to get a privacy-screen provider ``const char *con_id`` (video)connector name for which to get a privacy-screen provider **Description** Get a privacy-screen provider for a privacy-screen attached to the display described by the **dev** and **con_id** parameters. **Return** * A pointer to a :c:type:`struct drm_privacy_screen ` on success. * ERR_PTR(-ENODEV) if no matching privacy-screen is found * ERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen, but it has not been registered yet.h](h)}(h**Parameters**h]j%)}(hjnh]h Parameters}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjlubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKkhjhubji)}(hhh](jn)}(hR``struct device *dev`` consumer-device for which to get a privacy-screen provider h](jt)}(h``struct device *dev``h]jz)}(hjh]hstruct device *dev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhhjubj)}(hhh]h)}(h:consumer-device for which to get a privacy-screen providerh]h:consumer-device for which to get a privacy-screen provider}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhhjubjn)}(hX``const char *con_id`` (video)connector name for which to get a privacy-screen provider h](jt)}(h``const char *con_id``h]jz)}(hjh]hconst char *con_id}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKihjubj)}(hhh]h)}(h@(video)connector name for which to get a privacy-screen providerh]h@(video)connector name for which to get a privacy-screen provider}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKihjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKihjubeh}(h]h ]h"]h$]h&]uh1jhhjhubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKkhjhubh)}(h~Get a privacy-screen provider for a privacy-screen attached to the display described by the **dev** and **con_id** parameters.h](h\Get a privacy-screen provider for a privacy-screen attached to the display described by the }(hjhhhNhNubj%)}(h**dev**h]hdev}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh and }(hjhhhNhNubj%)}(h **con_id**h]hcon_id}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubh parameters.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKjhjhubh)}(h **Return**h]j%)}(hjLh]hReturn}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjJubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKmhjhubh)}(hhh](h)}(hSA pointer to a :c:type:`struct drm_privacy_screen ` on success.h]h)}(hjgh](hA pointer to a }(hjihhhNhNubh)}(h8:c:type:`struct drm_privacy_screen `h]jz)}(hjrh]hstruct drm_privacy_screen}(hjthhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jyhjpubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjdrm_privacy_screenuh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKnhjiubh on success.}(hjihhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhKnhjeubah}(h]h ]h"]h$]h&]uh1hhjbubh)}(h7ERR_PTR(-ENODEV) if no matching privacy-screen is foundh]h)}(hjh]h7ERR_PTR(-ENODEV) if no matching privacy-screen is found}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKohjubah}(h]h ]h"]h$]h&]uh1hhjbubh)}(hxERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen, but it has not been registered yet.h]ji)}(hhh]jn)}(haERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen, but it has not been registered yet.h](jt)}(h=ERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen,h]h=ERR_PTR(-EPROBE_DEFER) if there is a matching privacy-screen,}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKphjubj)}(hhh]h)}(h#but it has not been registered yet.h]h#but it has not been registered yet.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKqhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKphjubah}(h]h ]h"]h$]h&]uh1jhhjubah}(h]h ]h"]h$]h&]uh1hhjbubeh}(h]h ]h"]h$]h&]j8j9uh1hhjhKnhjhubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j#drm_privacy_screen_put (C function)c.drm_privacy_screen_puthNtauh1jxhjhhhNhNubj)}(hhh](j)}(h=void drm_privacy_screen_put (struct drm_privacy_screen *priv)h]j)}(hubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhj:ubj)}(hhh]h)}(hnew sw-state value to seth]hnew sw-state value to set}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjUhKhjVubah}(h]h ]h"]h$]h&]uh1jhj:ubeh}(h]h ]h"]h$]h&]uh1jmhjUhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj{h]h Description}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjyubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhjubh)}(hX_Set the sw-state of a privacy screen. If the privacy-screen is not in a locked hw-state, then the actual and hw-state of the privacy-screen will be immediately updated to the new value. If the privacy-screen is in a locked hw-state, then the new sw-state will be remembered as the requested state to put the privacy-screen in when it becomes unlocked.h]hX_Set the sw-state of a privacy screen. If the privacy-screen is not in a locked hw-state, then the actual and hw-state of the privacy-screen will be immediately updated to the new value. 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drm_privacy_screen *priv, enum drm_privacy_screen_status *sw_state_ret, enum drm_privacy_screen_status *hw_state_ret)h]j)}(hvoid drm_privacy_screen_get_state(struct drm_privacy_screen *priv, enum drm_privacy_screen_status *sw_state_ret, enum drm_privacy_screen_status *hw_state_ret)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhKubj)}(hdrm_privacy_screen_get_stateh]j)}(hdrm_privacy_screen_get_stateh]hdrm_privacy_screen_get_state}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhKubj)}(h}(struct drm_privacy_screen *priv, enum drm_privacy_screen_status *sw_state_ret, enum drm_privacy_screen_status *hw_state_ret)h](j)}(hstruct drm_privacy_screen *privh](j)}(hjh]hstruct}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj)}(h h]h }(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubh)}(hhh]j)}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj?ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjDmodnameN classnameNjj)}j]j)}jj sbc.drm_privacy_screen_get_stateasbuh1hhj ubj)}(h h]h }(hjbhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubj+)}(hj9h]h*}(hjphhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hj ubj)}(hprivh]hpriv}(hj}hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h,enum drm_privacy_screen_status *sw_state_reth](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_privacy_screen_statush]hdrm_privacy_screen_status}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j^c.drm_privacy_screen_get_stateasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h sw_state_reth]h sw_state_ret}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h,enum drm_privacy_screen_status *hw_state_reth](j)}(hj8h]henum}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_privacy_screen_statush]hdrm_privacy_screen_status}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj&modnameN classnameNjj)}j]j^c.drm_privacy_screen_get_stateasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjPhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(h hw_state_reth]h hw_state_ret}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhKubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhKhjhhubj)}(hhh]h)}(h"get privacy-screen's current stateh]h$get privacy-screen’s current state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_privacy_screen *priv`` privacy screen to get the state for ``enum drm_privacy_screen_status *sw_state_ret`` address where to store the privacy-screens current sw-state ``enum drm_privacy_screen_status *hw_state_ret`` address where to store the privacy-screens current hw-state **Description** Get the current state of a privacy-screen, both the sw-state and the hw-state.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhjubji)}(hhh](jn)}(hH``struct drm_privacy_screen *priv`` privacy screen to get the state for h](jt)}(h#``struct drm_privacy_screen *priv``h]jz)}(hjh]hstruct drm_privacy_screen *priv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhjubj)}(hhh]h)}(h#privacy screen to get the state forh]h#privacy screen to get the state for}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(hm``enum drm_privacy_screen_status *sw_state_ret`` address where to store the privacy-screens current sw-state h](jt)}(h0``enum drm_privacy_screen_status *sw_state_ret``h]jz)}(hjh]h,enum drm_privacy_screen_status *sw_state_ret}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhjubj)}(hhh]h)}(h;address where to store the privacy-screens current sw-stateh]h;address where to store the privacy-screens current sw-state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhKhjubjn)}(hm``enum drm_privacy_screen_status *hw_state_ret`` address where to store the privacy-screens current hw-state h](jt)}(h0``enum drm_privacy_screen_status *hw_state_ret``h]jz)}(hj:h]h,enum drm_privacy_screen_status *hw_state_ret}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj8ubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhj4ubj)}(hhh]h)}(h;address where to store the privacy-screens current hw-stateh]h;address where to store the privacy-screens current hw-state}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjOhKhjPubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jmhjOhKhjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjuh]h Description}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjsubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chKhjubh)}(hNGet the current state of a privacy-screen, both the sw-state and the hw-state.h]hNGet the current state of a privacy-screen, both the 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](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h<(struct drm_privacy_screen *priv, struct notifier_block *nb)h](j)}(hstruct drm_privacy_screen *privh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb&c.drm_privacy_screen_register_notifierasbuh1hhjubj)}(h h]h }(hj5hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjChhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hprivh]hpriv}(hjPhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(hstruct notifier_block *nbh](j)}(hjh]hstruct}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj)}(h h]h }(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubh)}(hhh]j)}(hnotifier_blockh]hnotifier_block}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j1&c.drm_privacy_screen_register_notifierasbuh1hhjeubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjeubj)}(hnbh]hnb}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjeubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjhhubj)}(hhh]h)}(hregister a notifierh]hregister a notifier}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXv**Parameters** ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with ``struct notifier_block *nb`` Notifier-block for the notifier to register **Description** Register a notifier with the privacy-screen to be notified of changes made to the privacy-screen state from outside of the privacy-screen class. E.g. the state may be changed by the hardware itself in response to a hotkey press. The notifier is called with no locks held. The new hw_state and sw_state can be retrieved using the drm_privacy_screen_get_state() function. A pointer to the drm_privacy_screen's struct is passed as the ``void *data`` argument of the notifier_block's notifier_call. The notifier will NOT be called when changes are made through drm_privacy_screen_set_sw_state(). It is only called for external changes. **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hj h]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj ubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM hjubji)}(hhh](jn)}(hQ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with h](jt)}(h#``struct drm_privacy_screen *priv``h]jz)}(hj+h]hstruct drm_privacy_screen *priv}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhj)ubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhj%ubj)}(hhh]h)}(h,Privacy screen to register the notifier withh]h,Privacy screen to register the notifier with}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj@hMhjAubah}(h]h ]h"]h$]h&]uh1jhj%ubeh}(h]h ]h"]h$]h&]uh1jmhj@hMhj"ubjn)}(hJ``struct notifier_block *nb`` Notifier-block for the notifier to register h](jt)}(h``struct notifier_block *nb``h]jz)}(hjdh]hstruct notifier_block *nb}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjbubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhj^ubj)}(hhh]h)}(h+Notifier-block for the notifier to registerh]h+Notifier-block for the notifier to register}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjyhMhjzubah}(h]h ]h"]h$]h&]uh1jhj^ubeh}(h]h ]h"]h$]h&]uh1jmhjyhMhj"ubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM hjubh)}(hRegister a notifier with the privacy-screen to be notified of changes made to the privacy-screen state from outside of the privacy-screen class. E.g. the state may be changed by the hardware itself in response to a hotkey press.h]hRegister a notifier with the privacy-screen to be notified of changes made to the privacy-screen state from outside of the privacy-screen class. E.g. the state may be changed by the hardware itself in response to a hotkey press.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM hjubh)}(hX The notifier is called with no locks held. The new hw_state and sw_state can be retrieved using the drm_privacy_screen_get_state() function. A pointer to the drm_privacy_screen's struct is passed as the ``void *data`` argument of the notifier_block's notifier_call.h](hThe notifier is called with no locks held. The new hw_state and sw_state can be retrieved using the drm_privacy_screen_get_state() function. A pointer to the drm_privacy_screen’s struct is passed as the }(hjhhhNhNubjz)}(h``void *data``h]h void *data}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubh2 argument of the notifier_block’s notifier_call.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(hThe notifier will NOT be called when changes are made through drm_privacy_screen_set_sw_state(). It is only called for external changes.h]hThe notifier will NOT be called when changes are made through drm_privacy_screen_set_sw_state(). It is only called for external changes.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_privacy_screen_unregister_notifier (C function)(c.drm_privacy_screen_unregister_notifierhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hgint drm_privacy_screen_unregister_notifier (struct drm_privacy_screen *priv, struct notifier_block *nb)h]j)}(hfint drm_privacy_screen_unregister_notifier(struct drm_privacy_screen *priv, struct notifier_block *nb)h](j)}(hinth]hint}(hj;hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM!ubj)}(h h]h }(hjJhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj7hhhjIhM!ubj)}(h&drm_privacy_screen_unregister_notifierh]j)}(h&drm_privacy_screen_unregister_notifierh]h&drm_privacy_screen_unregister_notifier}(hj\hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjXubah}(h]h ](jjeh"]h$]h&]jjuh1jhj7hhhjIhM!ubj)}(h<(struct drm_privacy_screen *priv, struct notifier_block *nb)h](j)}(hstruct drm_privacy_screen *privh](j)}(hjh]hstruct}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubh)}(hhh]j)}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jj^sb(c.drm_privacy_screen_unregister_notifierasbuh1hhjtubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjtubj)}(hprivh]hpriv}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjpubj)}(hstruct notifier_block *nbh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hnotifier_blockh]hnotifier_block}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj modnameN classnameNjj)}j]j(c.drm_privacy_screen_unregister_notifierasbuh1hhjubj)}(h h]h }(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hj4hhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hnbh]hnb}(hjAhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjpubeh}(h]h ]h"]h$]h&]jjuh1jhj7hhhjIhM!ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhj3hhhjIhM!ubah}(h]j.ah ](jjeh"]h$]h&]jj)jhuh1jhjIhM!hj0hhubj)}(hhh]h)}(hunregister a notifierh]hunregister a notifier}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM!hjhhhubah}(h]h ]h"]h$]h&]uh1jhj0hhhjIhM!ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjjjjjjuh1jhhhjhNhNubj)}(hXJ**Parameters** ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with ``struct notifier_block *nb`` Notifier-block for the notifier to register **Description** Unregister a notifier registered with drm_privacy_screen_register_notifier(). **Return** 0 on success, negative error code on failure.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM%hjubji)}(hhh](jn)}(hQ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with h](jt)}(h#``struct drm_privacy_screen *priv``h]jz)}(hjh]hstruct drm_privacy_screen *priv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM"hjubj)}(hhh]h)}(h,Privacy screen to register the notifier withh]h,Privacy screen to register the notifier with}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM"hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM"hjubjn)}(hJ``struct notifier_block *nb`` Notifier-block for the notifier to register h](jt)}(h``struct notifier_block *nb``h]jz)}(hjh]hstruct notifier_block *nb}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM#hjubj)}(hhh]h)}(h+Notifier-block for the notifier to registerh]h+Notifier-block for the notifier to register}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM#hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM#hjubeh}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj h]h Description}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM%hjubh)}(hMUnregister a notifier registered with drm_privacy_screen_register_notifier().h]hMUnregister a notifier registered with drm_privacy_screen_register_notifier().}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM$hjubh)}(h **Return**h]j%)}(hjGh]hReturn}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjEubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM&hjubh)}(h-0 on success, negative error code on failure.h]h-0 on success, negative error code on failure.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM'hjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j(drm_privacy_screen_register (C function)c.drm_privacy_screen_registerhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hstruct drm_privacy_screen * drm_privacy_screen_register (struct device *parent, const struct drm_privacy_screen_ops *ops, void *data)h]j)}(hstruct drm_privacy_screen *drm_privacy_screen_register(struct device *parent, const struct drm_privacy_screen_ops *ops, void *data)h](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM|ubh)}(hhh]j)}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jdrm_privacy_screen_registersbc.drm_privacy_screen_registerasbuh1hhjhhhjhM|ubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhM|ubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjhhhjhM|ubj)}(hdrm_privacy_screen_registerh]j)}(hjh]hdrm_privacy_screen_register}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhM|ubj)}(hM(struct device *parent, const struct drm_privacy_screen_ops *ops, void *data)h](j)}(hstruct device *parenth](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdeviceh]hdevice}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetj&modnameN classnameNjj)}j]jc.drm_privacy_screen_registerasbuh1hhjubj)}(h h]h }(hjBhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjPhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hparenth]hparent}(hj]hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h(const struct drm_privacy_screen_ops *opsh](j)}(hjUh]hconst}(hjvhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubh)}(hhh]j)}(hdrm_privacy_screen_opsh]hdrm_privacy_screen_ops}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]jc.drm_privacy_screen_registerasbuh1hhjrubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjrubj)}(hopsh]hops}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubj)}(h void *datah](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hdatah]hdata}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubeh}(h]h ]h"]h$]h&]jjuh1jhjhhhjhM|ubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjhhhjhM|ubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jhjhM|hjhhubj)}(hhh]h)}(hregister a privacy-screenh]hregister a privacy-screen}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM|hjQhhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhM|ubeh}(h]h ](jfunctioneh"]h$]h&]jjjjljjljjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct device *parent`` parent-device for the privacy-screen ``const struct drm_privacy_screen_ops *ops`` :c:type:`struct drm_privacy_screen_ops ` pointer with ops for the privacy-screen ``void *data`` Private data owned by the privacy screen provider **Description** Create and register a privacy-screen. **Return** * A pointer to the created privacy-screen on success. * An ERR_PTR(errno) on failure.h](h)}(h**Parameters**h]j%)}(hjvh]h Parameters}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjtubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjpubji)}(hhh](jn)}(h?``struct device *parent`` parent-device for the privacy-screen h](jt)}(h``struct device *parent``h]jz)}(hjh]hstruct device *parent}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM}hjubj)}(hhh]h)}(h$parent-device for the privacy-screenh]h$parent-device for the privacy-screen}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhM}hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhjhM}hjubjn)}(h``const struct drm_privacy_screen_ops *ops`` :c:type:`struct drm_privacy_screen_ops ` pointer with ops for the privacy-screen h](jt)}(h,``const struct drm_privacy_screen_ops *ops``h]jz)}(hjh]h(const struct drm_privacy_screen_ops *ops}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chM~hjubj)}(hhh]h)}(hh:c:type:`struct drm_privacy_screen_ops ` pointer with ops for the privacy-screenh](h)}(h@:c:type:`struct drm_privacy_screen_ops `h]jz)}(hjh]hstruct drm_privacy_screen_ops}(hjhhhNhNubah}(h]h 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./drivers/gpu/drm/drm_privacy_screen.chMhjpubh)}(h%Create and register a privacy-screen.h]h%Create and register a privacy-screen.}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjpubh)}(h **Return**h]j%)}(hjh]hReturn}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjpubh)}(hhh](h)}(h3A pointer to the created privacy-screen on success.h]h)}(hjh]h3A pointer to the created privacy-screen on success.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubh)}(hAn ERR_PTR(errno) on failure.h]h)}(hjh]hAn ERR_PTR(errno) on failure.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubah}(h]h ]h"]h$]h&]uh1hhjubeh}(h]h ]h"]h$]h&]j8j9uh1hhjhMhjpubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j*drm_privacy_screen_unregister (C function)c.drm_privacy_screen_unregisterhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hDvoid drm_privacy_screen_unregister (struct drm_privacy_screen *priv)h]j)}(hCvoid drm_privacy_screen_unregister(struct drm_privacy_screen *priv)h](j)}(hvoidh]hvoid}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjhhhjhMubj)}(hdrm_privacy_screen_unregisterh]j)}(hdrm_privacy_screen_unregisterh]hdrm_privacy_screen_unregister}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjhhhjhMubj)}(h!(struct drm_privacy_screen *priv)h]j)}(hstruct drm_privacy_screen *privh](j)}(hjh]hstruct}(hj4hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0ubj)}(h h]h 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registered with drm_privacy_screen_register(). May be called with a NULL or ERR_PTR, in which case it is a no-op.h](h)}(h**Parameters**h]j%)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubji)}(hhh]jn)}(hA``struct drm_privacy_screen *priv`` privacy-screen to unregister h](jt)}(h#``struct drm_privacy_screen *priv``h]jz)}(hjh]hstruct drm_privacy_screen *priv}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubj)}(hhh]h)}(hprivacy-screen to unregisterh]hprivacy-screen to unregister}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jmhj hMhjubah}(h]h ]h"]h$]h&]uh1jhhjubh)}(h**Description**h]j%)}(hj3h]h Description}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hj1ubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubh)}(hUnregister a privacy-screen registered with drm_privacy_screen_register(). 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May be called with a NULL or ERR_PTR, in which case it is a no-op.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubjy)}(hhh]h}(h]h ]h"]h$]h&]entries](j3drm_privacy_screen_call_notifier_chain (C function)(c.drm_privacy_screen_call_notifier_chainhNtauh1jxhjhhhNhNubj)}(hhh](j)}(hMvoid drm_privacy_screen_call_notifier_chain (struct drm_privacy_screen *priv)h]j)}(hLvoid drm_privacy_screen_call_notifier_chain(struct drm_privacy_screen *priv)h](j)}(hvoidh]hvoid}(hjxhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjthhhjhMubj)}(h&drm_privacy_screen_call_notifier_chainh]j)}(h&drm_privacy_screen_call_notifier_chainh]h&drm_privacy_screen_call_notifier_chain}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ](jjeh"]h$]h&]jjuh1jhjthhhjhMubj)}(h!(struct drm_privacy_screen *priv)h]j)}(hstruct drm_privacy_screen *privh](j)}(hjh]hstruct}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubh)}(hhh]j)}(hdrm_privacy_screenh]hdrm_privacy_screen}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&] refdomainjreftypej reftargetjmodnameN classnameNjj)}j]j)}jjsb(c.drm_privacy_screen_call_notifier_chainasbuh1hhjubj)}(h h]h }(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubj+)}(hj9h]h*}(hjhhhNhNubah}(h]h ]j6ah"]h$]h&]uh1j*hjubj)}(hprivh]hpriv}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]noemphjjuh1jhjubah}(h]h ]h"]h$]h&]jjuh1jhjthhhjhMubeh}(h]h ]h"]h$]h&]jjjuh1jjjhjphhhjhMubah}(h]jkah ](jjeh"]h$]h&]jj)jhuh1jhjhMhjmhhubj)}(hhh]h)}(h notify consumers of state changeh]h notify consumers of state change}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhj5hhubah}(h]h ]h"]h$]h&]uh1jhjmhhhjhMubeh}(h]h ](jfunctioneh"]h$]h&]jjjjPjjPjjjuh1jhhhjhNhNubj)}(hX**Parameters** ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with **Description** A privacy-screen provider driver can call this functions upon external changes to the privacy-screen state. E.g. the state may be changed by the hardware itself in response to a hotkey press. This function must be called without holding the privacy-screen lock. the driver must update sw_state and hw_state to reflect the new state before calling this function. The expected behavior from the driver upon receiving an external state change event is: 1. Take the lock; 2. Update sw_state and hw_state; 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().h](h)}(h**Parameters**h]j%)}(hjZh]h Parameters}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjXubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjTubji)}(hhh]jn)}(hQ``struct drm_privacy_screen *priv`` Privacy screen to register the notifier with h](jt)}(h#``struct drm_privacy_screen *priv``h]jz)}(hjyh]hstruct drm_privacy_screen *priv}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jyhjwubah}(h]h ]h"]h$]h&]uh1jshi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjsubj)}(hhh]h)}(h,Privacy screen to register the notifier withh]h,Privacy screen to register the notifier with}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjsubeh}(h]h ]h"]h$]h&]uh1jmhjhMhjpubah}(h]h ]h"]h$]h&]uh1jhhjTubh)}(h**Description**h]j%)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j$hjubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjTubh)}(hX;A privacy-screen provider driver can call this functions upon external changes to the privacy-screen state. E.g. the state may be changed by the hardware itself in response to a hotkey press. This function must be called without holding the privacy-screen lock. the driver must update sw_state and hw_state to reflect the new state before calling this function. The expected behavior from the driver upon receiving an external state change event is: 1. Take the lock; 2. Update sw_state and hw_state; 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().h]hX;A privacy-screen provider driver can call this functions upon external changes to the privacy-screen state. E.g. the state may be changed by the hardware itself in response to a hotkey press. This function must be called without holding the privacy-screen lock. the driver must update sw_state and hw_state to reflect the new state before calling this function. The expected behavior from the driver upon receiving an external state change event is: 1. Take the lock; 2. Update sw_state and hw_state; 3. Release the lock. 4. Call drm_privacy_screen_call_notifier_chain().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhi/var/lib/git/docbuild/linux/Documentation/gpu/drm-kms-helpers:497: ./drivers/gpu/drm/drm_privacy_screen.chMhjTubeh}(h]h ] kernelindentah"]h$]h&]uh1jhjhhhNhNubeh}(h]privacy-screen-classah ]h"]privacy-screen classah$]h&]uh1hhhhhhhhMubeh}(h]mode-setting-helper-functionsah ]h"]mode setting helper functionsah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}(j~:]js:ajw@]jm@aj]jaunameids}(jjj:j:j;Bj~:j:Bj7BoverviewNj<j<j~j{jjjk jh j0j0j2Bj/Bj[j[j/j,jE jB jjj}@jz@jjw@jjjBjBj>Dj;DjfIjcIj$Jj!JjjjZjWjtjqjjjjjjj 'j'j99j69j'j'j(j(functions referenceNj@j@jRjRj XjXjwjwjkjhjxjxjyjyjzjzjcj`jocjlcj j j9j9j`j`j]jZj0j-j#j#j[j[j}fjzfjsjsjjjjjjjju nametypes}(jj:j;Bj:BjZj<j~jjk j0j2Bj[j/jE jj}@jjjBj>DjfIj$JjjZjtjjjj 'j99j'j(j[j@jRj Xjwjkjxjyjzjcjocj j9j`j]j0j#j[j}fjsjjjjuh}(jhj:j:jjjjjjjDjIjqjvjq)jv)j+j+j76j<6jd8ji8j~:j:j7Bj:js;j:j<jz;j{j<j<j<jv>j{>j?j?jAjAjCjCj+Fj0FjKjKjNjNj|RjRj$Tj)TjVjVjZj Zj1\j6\j[^j`^j`j`jbjbjdjdjfjfjhjhjkjkj:mj?mjdojiojqjqjsjsjvjvjxjyj7{j<{j|j|j~j~jǀj̀jjjjjjj^jcj4j9jjjjj/j4jYj^jjjVj[jjjОj՞j;j@jJjOjjjjjjj;j@j˵jеjjjjjjjEjJjjjcjhjjjh jjjj j%jjj~jjjjdjijjjjjKjPjjjjjjjjjjj:j?jvj{jjjjjUjZjjj5j:j_jdjj jjjjjjjjjjjFjKjjj0jn j j jr jw j! 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